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-rw-r--r--drivers/tty/serial/8250/8250.c11
-rw-r--r--drivers/tty/serial/8250/8250.h1
-rw-r--r--drivers/tty/serial/8250/8250_pci.c38
-rw-r--r--include/uapi/linux/serial_core.h3
4 files changed, 52 insertions, 1 deletions
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c
index d085e3a8ec06..f9320437a649 100644
--- a/drivers/tty/serial/8250/8250.c
+++ b/drivers/tty/serial/8250/8250.c
@@ -300,6 +300,12 @@ static const struct serial8250_config uart_config[] = {
300 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00, 300 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
301 .flags = UART_CAP_FIFO, 301 .flags = UART_CAP_FIFO,
302 }, 302 },
303 [PORT_BRCM_TRUMANAGE] = {
304 .name = "TruManage",
305 .fifo_size = 1,
306 .tx_loadsz = 1024,
307 .flags = UART_CAP_HFIFO,
308 },
303 [PORT_8250_CIR] = { 309 [PORT_8250_CIR] = {
304 .name = "CIR port" 310 .name = "CIR port"
305 } 311 }
@@ -1490,6 +1496,11 @@ void serial8250_tx_chars(struct uart_8250_port *up)
1490 port->icount.tx++; 1496 port->icount.tx++;
1491 if (uart_circ_empty(xmit)) 1497 if (uart_circ_empty(xmit))
1492 break; 1498 break;
1499 if (up->capabilities & UART_CAP_HFIFO) {
1500 if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
1501 BOTH_EMPTY)
1502 break;
1503 }
1493 } while (--count > 0); 1504 } while (--count > 0);
1494 1505
1495 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 1506 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
index 3b4ea84898c2..12caa1292b75 100644
--- a/drivers/tty/serial/8250/8250.h
+++ b/drivers/tty/serial/8250/8250.h
@@ -40,6 +40,7 @@ struct serial8250_config {
40#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */ 40#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
41#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */ 41#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
42#define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */ 42#define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
43#define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
43 44
44#define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */ 45#define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
45#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */ 46#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 8a2c3d934187..a27a98e1b066 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1085,6 +1085,18 @@ pci_omegapci_setup(struct serial_private *priv,
1085 return setup_port(priv, port, 2, idx * 8, 0); 1085 return setup_port(priv, port, 2, idx * 8, 0);
1086} 1086}
1087 1087
1088static int
1089pci_brcm_trumanage_setup(struct serial_private *priv,
1090 const struct pciserial_board *board,
1091 struct uart_8250_port *port, int idx)
1092{
1093 int ret = pci_default_setup(priv, board, port, idx);
1094
1095 port->port.type = PORT_BRCM_TRUMANAGE;
1096 port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE);
1097 return ret;
1098}
1099
1088static int skip_tx_en_setup(struct serial_private *priv, 1100static int skip_tx_en_setup(struct serial_private *priv,
1089 const struct pciserial_board *board, 1101 const struct pciserial_board *board,
1090 struct uart_8250_port *port, int idx) 1102 struct uart_8250_port *port, int idx)
@@ -1304,6 +1316,7 @@ pci_wch_ch353_setup(struct serial_private *priv,
1304#define PCI_DEVICE_ID_COMMTECH_4224PCIE 0x0020 1316#define PCI_DEVICE_ID_COMMTECH_4224PCIE 0x0020
1305#define PCI_DEVICE_ID_COMMTECH_4228PCIE 0x0021 1317#define PCI_DEVICE_ID_COMMTECH_4228PCIE 0x0021
1306#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022 1318#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022
1319#define PCI_DEVICE_ID_BROADCOM_TRUMANAGE 0x160a
1307 1320
1308 1321
1309/* Unknown vendors/cards - this should not be in linux/pci_ids.h */ 1322/* Unknown vendors/cards - this should not be in linux/pci_ids.h */
@@ -1954,6 +1967,17 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
1954 .setup = pci_xr17v35x_setup, 1967 .setup = pci_xr17v35x_setup,
1955 }, 1968 },
1956 /* 1969 /*
1970 * Broadcom TruManage (NetXtreme)
1971 */
1972 {
1973 .vendor = PCI_VENDOR_ID_BROADCOM,
1974 .device = PCI_DEVICE_ID_BROADCOM_TRUMANAGE,
1975 .subvendor = PCI_ANY_ID,
1976 .subdevice = PCI_ANY_ID,
1977 .setup = pci_brcm_trumanage_setup,
1978 },
1979
1980 /*
1957 * Default "match everything" terminator entry 1981 * Default "match everything" terminator entry
1958 */ 1982 */
1959 { 1983 {
@@ -2148,6 +2172,7 @@ enum pci_board_num_t {
2148 pbn_ce4100_1_115200, 2172 pbn_ce4100_1_115200,
2149 pbn_omegapci, 2173 pbn_omegapci,
2150 pbn_NETMOS9900_2s_115200, 2174 pbn_NETMOS9900_2s_115200,
2175 pbn_brcm_trumanage,
2151}; 2176};
2152 2177
2153/* 2178/*
@@ -2892,6 +2917,12 @@ static struct pciserial_board pci_boards[] = {
2892 .num_ports = 2, 2917 .num_ports = 2,
2893 .base_baud = 115200, 2918 .base_baud = 115200,
2894 }, 2919 },
2920 [pbn_brcm_trumanage] = {
2921 .flags = FL_BASE0,
2922 .num_ports = 1,
2923 .reg_shift = 2,
2924 .base_baud = 115200,
2925 },
2895}; 2926};
2896 2927
2897static const struct pci_device_id blacklist[] = { 2928static const struct pci_device_id blacklist[] = {
@@ -4471,6 +4502,13 @@ static struct pci_device_id serial_pci_tbl[] = {
4471 pbn_omegapci }, 4502 pbn_omegapci },
4472 4503
4473 /* 4504 /*
4505 * Broadcom TruManage
4506 */
4507 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BROADCOM_TRUMANAGE,
4508 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
4509 pbn_brcm_trumanage },
4510
4511 /*
4474 * AgeStar as-prs2-009 4512 * AgeStar as-prs2-009
4475 */ 4513 */
4476 { PCI_VENDOR_ID_AGESTAR, PCI_DEVICE_ID_AGESTAR_9375, 4514 { PCI_VENDOR_ID_AGESTAR, PCI_DEVICE_ID_AGESTAR_9375,
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index 78f99d97475b..2c6c85f18ea0 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -50,7 +50,8 @@
50#define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */ 50#define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
51#define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */ 51#define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */
52#define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */ 52#define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */
53#define PORT_MAX_8250 24 /* max port ID */ 53#define PORT_BRCM_TRUMANAGE 24
54#define PORT_MAX_8250 25 /* max port ID */
54 55
55/* 56/*
56 * ARM specific type numbers. These are not currently guaranteed 57 * ARM specific type numbers. These are not currently guaranteed