178 files changed, 8121 insertions, 1444 deletions

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 6528e215c5fe..5216b419016a 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -4,14 +4,13 @@ Exynos processors include support for multiple power domains which are used
 to gate power to one or more peripherals on the processor.
 
 Required Properties:
-- compatiable: should be one of the following.
+- compatible: should be one of the following.
     * samsung,exynos4210-pd - for exynos4210 type power domain.
 - reg: physical base address of the controller and length of memory mapped
     region.
 
-Optional Properties:
-- samsung,exynos4210-pd-off: Specifies that the power domain is in turned-off
-    state during boot and remains to be turned-off until explicitly turned-on.
+Node of a device using power domains must have a samsung,power-domain property
+defined with a phandle to respective power domain.
 
 Example:
 
@@ -19,3 +18,11 @@ Example:
                 compatible = "samsung,exynos4210-pd";
                 reg = <0x10023C00 0x10>;
         };
+
+Example of the node using power domain:
+
+        node {
+                /* ... */
+                samsung,power-domain = <&lcd0>;
+                /* ... */
+        };
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index ac9e7516756e..f79818711e83 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -41,6 +41,10 @@ i.MX6 Quad SABRE Smart Device Board
 Required root node properties:
     - compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
 
+i.MX6 Quad SABRE Automotive Board
+Required root node properties:
+    - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
+
 Generic i.MX boards
 -------------------
 
diff --git a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
new file mode 100644
index 000000000000..37824fac688e
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
@@ -0,0 +1,14 @@
+* Samsung SATA PHY Controller
+
+SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
+Each SATA PHY controller should have its own node.
+
+Required properties:
+- compatible        : compatible list, contains "samsung,exynos5-sata-phy"
+- reg               : <registers mapping>
+
+Example:
+        sata@ffe07000 {
+                compatible = "samsung,exynos5-sata-phy";
+                reg = <0xffe07000 0x1000>;
+        };
diff --git a/Documentation/devicetree/bindings/ata/exynos-sata.txt b/Documentation/devicetree/bindings/ata/exynos-sata.txt
new file mode 100644
index 000000000000..0849f1025e34
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/exynos-sata.txt
@@ -0,0 +1,17 @@
+* Samsung AHCI SATA Controller
+
+SATA nodes are defined to describe on-chip Serial ATA controllers.
+Each SATA controller should have its own node.
+
+Required properties:
+- compatible        : compatible list, contains "samsung,exynos5-sata"
+- interrupts        : <interrupt mapping for SATA IRQ>
+- reg               : <registers mapping>
+- samsung,sata-freq : <frequency in MHz>
+
+Example:
+        sata@ffe08000 {
+                compatible = "samsung,exynos5-sata";
+                reg = <0xffe08000 0x1000>;
+                interrupts = <115>;
+        };
diff --git a/Documentation/devicetree/bindings/clock/imx25-clock.txt b/Documentation/devicetree/bindings/clock/imx25-clock.txt
new file mode 100644
index 000000000000..c2a3525ecb4e
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/imx25-clock.txt
@@ -0,0 +1,162 @@
+* Clock bindings for Freescale i.MX25
+
+Required properties:
+- compatible: Should be "fsl,imx25-ccm"
+- reg: Address and length of the register set
+- interrupts: Should contain CCM interrupt
+- #clock-cells: Should be <1>
+
+The clock consumer should specify the desired clock by having the clock
+ID in its "clocks" phandle cell.  The following is a full list of i.MX25
+clocks and IDs.
+
+        Clock                   ID
+        ---------------------------
+        dummy                   0
+        osc                     1
+        mpll                    2
+        upll                    3
+        mpll_cpu_3_4            4
+        cpu_sel                 5
+        cpu                     6
+        ahb                     7
+        usb_div                 8
+        ipg                     9
+        per0_sel                10
+        per1_sel                11
+        per2_sel                12
+        per3_sel                13
+        per4_sel                14
+        per5_sel                15
+        per6_sel                16
+        per7_sel                17
+        per8_sel                18
+        per9_sel                19
+        per10_sel               20
+        per11_sel               21
+        per12_sel               22
+        per13_sel               23
+        per14_sel               24
+        per15_sel               25
+        per0                    26
+        per1                    27
+        per2                    28
+        per3                    29
+        per4                    30
+        per5                    31
+        per6                    32
+        per7                    33
+        per8                    34
+        per9                    35
+        per10                   36
+        per11                   37
+        per12                   38
+        per13                   39
+        per14                   40
+        per15                   41
+        csi_ipg_per             42
+        epit_ipg_per            43
+        esai_ipg_per            44
+        esdhc1_ipg_per          45
+        esdhc2_ipg_per          46
+        gpt_ipg_per             47
+        i2c_ipg_per             48
+        lcdc_ipg_per            49
+        nfc_ipg_per             50
+        owire_ipg_per           51
+        pwm_ipg_per             52
+        sim1_ipg_per            53
+        sim2_ipg_per            54
+        ssi1_ipg_per            55
+        ssi2_ipg_per            56
+        uart_ipg_per            57
+        ata_ahb                 58
+        reserved                59
+        csi_ahb                 60
+        emi_ahb                 61
+        esai_ahb                62
+        esdhc1_ahb              63
+        esdhc2_ahb              64
+        fec_ahb                 65
+        lcdc_ahb                66
+        rtic_ahb                67
+        sdma_ahb                68
+        slcdc_ahb               69
+        usbotg_ahb              70
+        reserved                71
+        reserved                72
+        reserved                73
+        reserved                74
+        can1_ipg                75
+        can2_ipg                76
+        csi_ipg                 77
+        cspi1_ipg               78
+        cspi2_ipg               79
+        cspi3_ipg               80
+        dryice_ipg              81
+        ect_ipg                 82
+        epit1_ipg               83
+        epit2_ipg               84
+        reserved                85
+        esdhc1_ipg              86
+        esdhc2_ipg              87
+        fec_ipg                 88
+        reserved                89
+        reserved                90
+        reserved                91
+        gpt1_ipg                92
+        gpt2_ipg                93
+        gpt3_ipg                94
+        gpt4_ipg                95
+        reserved                96
+        reserved                97
+        reserved                98
+        iim_ipg                 99
+        reserved                100
+        reserved                101
+        kpp_ipg                 102
+        lcdc_ipg                103
+        reserved                104
+        pwm1_ipg                105
+        pwm2_ipg                106
+        pwm3_ipg                107
+        pwm4_ipg                108
+        rngb_ipg                109
+        reserved                110
+        scc_ipg                 111
+        sdma_ipg                112
+        sim1_ipg                113
+        sim2_ipg                114
+        slcdc_ipg               115
+        spba_ipg                116
+        ssi1_ipg                117
+        ssi2_ipg                118
+        tsc_ipg                 119
+        uart1_ipg               120
+        uart2_ipg               121
+        uart3_ipg               122
+        uart4_ipg               123
+        uart5_ipg               124
+        reserved                125
+        wdt_ipg                 126
+
+Examples:
+
+clks: ccm@53f80000 {
+        compatible = "fsl,imx25-ccm";
+        reg = <0x53f80000 0x4000>;
+        interrupts = <31>;
+        clock-output-names = ...
+                        "uart_ipg",
+                        "uart_serial",
+                        ...;
+};
+
+uart1: serial@43f90000 {
+        compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+        reg = <0x43f90000 0x4000>;
+        interrupts = <45>;
+        clocks = <&clks 79>, <&clks 50>;
+        clock-names = "ipg", "per";
+        status = "disabled";
+};
diff --git a/Documentation/devicetree/bindings/clock/zynq-7000.txt b/Documentation/devicetree/bindings/clock/zynq-7000.txt
new file mode 100644
index 000000000000..23ae1db1bc13
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/zynq-7000.txt
@@ -0,0 +1,55 @@
+Device Tree Clock bindings for the Zynq 7000 EPP
+
+The Zynq EPP has several different clk providers, each with there own bindings.
+The purpose of this document is to document their usage.
+
+See clock_bindings.txt for more information on the generic clock bindings.
+See Chapter 25 of Zynq TRM for more information about Zynq clocks.
+
+== PLLs ==
+
+Used to describe the ARM_PLL, DDR_PLL, and IO_PLL.
+
+Required properties:
+- #clock-cells : shall be 0 (only one clock is output from this node)
+- compatible : "xlnx,zynq-pll"
+- reg : pair of u32 values, which are the address offsets within the SLCR
+        of the relevant PLL_CTRL register and PLL_CFG register respectively
+- clocks : phandle for parent clock.  should be the phandle for ps_clk
+
+Optional properties:
+- clock-output-names : name of the output clock
+
+Example:
+        armpll: armpll {
+                #clock-cells = <0>;
+                compatible = "xlnx,zynq-pll";
+                clocks = <&ps_clk>;
+                reg = <0x100 0x110>;
+                clock-output-names = "armpll";
+        };
+
+== Peripheral clocks ==
+
+Describes clock node for the SDIO, SMC, SPI, QSPI, and UART clocks.
+
+Required properties:
+- #clock-cells : shall be 1
+- compatible : "xlnx,zynq-periph-clock"
+- reg : a single u32 value, describing the offset within the SLCR where
+        the CLK_CTRL register is found for this peripheral
+- clocks : phandle for parent clocks.  should hold phandles for
+           the IO_PLL, ARM_PLL, and DDR_PLL in order
+- clock-output-names : names of the output clock(s).  For peripherals that have
+                       two output clocks (for example, the UART), two clocks
+                       should be listed.
+
+Example:
+        uart_clk: uart_clk {
+                #clock-cells = <1>;
+                compatible = "xlnx,zynq-periph-clock";
+                clocks = <&iopll &armpll &ddrpll>;
+                reg = <0x154>;
+                clock-output-names = "uart0_ref_clk",
+                                     "uart1_ref_clk";
+        };
diff --git a/Documentation/devicetree/bindings/drm/exynos/hdmi.txt b/Documentation/devicetree/bindings/drm/exynos/hdmi.txt
new file mode 100644
index 000000000000..589edee37394
--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/exynos/hdmi.txt
@@ -0,0 +1,22 @@
+Device-Tree bindings for drm hdmi driver
+
+Required properties:
+- compatible: value should be "samsung,exynos5-hdmi".
+- reg: physical base address of the hdmi and length of memory mapped
+        region.
+- interrupts: interrupt number to the cpu.
+- hpd-gpio: following information about the hotplug gpio pin.
+        a) phandle of the gpio controller node.
+        b) pin number within the gpio controller.
+        c) pin function mode.
+        d) optional flags and pull up/down.
+        e) drive strength.
+
+Example:
+
+        hdmi {
+                compatible = "samsung,exynos5-hdmi";
+                reg = <0x14530000 0x100000>;
+                interrupts = <0 95 0>;
+                hpd-gpio = <&gpx3 7 0xf 1 3>;
+        };
diff --git a/Documentation/devicetree/bindings/drm/exynos/hdmiddc.txt b/Documentation/devicetree/bindings/drm/exynos/hdmiddc.txt
new file mode 100644
index 000000000000..fa166d945809
--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/exynos/hdmiddc.txt
@@ -0,0 +1,12 @@
+Device-Tree bindings for hdmiddc driver
+
+Required properties:
+- compatible: value should be "samsung,exynos5-hdmiddc".
+- reg: I2C address of the hdmiddc device.
+
+Example:
+
+        hdmiddc {
+                compatible = "samsung,exynos5-hdmiddc";
+                reg = <0x50>;
+        };
diff --git a/Documentation/devicetree/bindings/drm/exynos/hdmiphy.txt b/Documentation/devicetree/bindings/drm/exynos/hdmiphy.txt
new file mode 100644
index 000000000000..858f4f9b902f
--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/exynos/hdmiphy.txt
@@ -0,0 +1,12 @@
+Device-Tree bindings for hdmiphy driver
+
+Required properties:
+- compatible: value should be "samsung,exynos5-hdmiphy".
+- reg: I2C address of the hdmiphy device.
+
+Example:
+
+        hdmiphy {
+                compatible = "samsung,exynos5-hdmiphy";
+                reg = <0x38>;
+        };
diff --git a/Documentation/devicetree/bindings/drm/exynos/mixer.txt b/Documentation/devicetree/bindings/drm/exynos/mixer.txt
new file mode 100644
index 000000000000..9b2ea0343566
--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/exynos/mixer.txt
@@ -0,0 +1,15 @@
+Device-Tree bindings for mixer driver
+
+Required properties:
+- compatible: value should be "samsung,exynos5-mixer".
+- reg: physical base address of the mixer and length of memory mapped
+        region.
+- interrupts: interrupt number to the cpu.
+
+Example:
+
+        mixer {
+                compatible = "samsung,exynos5-mixer";
+                reg = <0x14450000 0x10000>;
+                interrupts = <0 94 0>;
+        };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-poweroff.txt b/Documentation/devicetree/bindings/gpio/gpio-poweroff.txt
new file mode 100644
index 000000000000..558cdf3c9abc
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-poweroff.txt
@@ -0,0 +1,22 @@
+GPIO line that should be set high/low to power off a device
+
+Required properties:
+- compatible : should be "gpio-poweroff".
+- gpios : The GPIO to set high/low, see "gpios property" in
+  Documentation/devicetree/bindings/gpio/gpio.txt. If the pin should be
+  low to power down the board set it to "Active Low", otherwise set
+  gpio to "Active High".
+
+Optional properties:
+- input : Initially configure the GPIO line as an input. Only reconfigure
+  it to an output when the pm_power_off function is called. If this optional
+  property is not specified, the GPIO is initialized as an output in its
+  inactive state.
+
+
+Examples:
+
+gpio-poweroff {
+        compatible = "gpio-poweroff";
+        gpios = <&gpio 4 0>; /* GPIO 4 Active Low */
+};
diff --git a/Documentation/devicetree/bindings/input/touchscreen/bu21013.txt b/Documentation/devicetree/bindings/input/touchscreen/bu21013.txt
new file mode 100644
index 000000000000..ca5a2c86480c
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/touchscreen/bu21013.txt
@@ -0,0 +1,28 @@
+* Rohm BU21013 Touch Screen
+
+Required properties:
+ - compatible              : "rohm,bu21013_tp"
+ - reg                     :  I2C device address
+
+Optional properties:
+ - touch-gpio              : GPIO pin registering a touch event
+ - <supply_name>-supply    : Phandle to a regulator supply
+ - rohm,touch-max-x        : Maximum outward permitted limit in the X axis
+ - rohm,touch-max-y        : Maximum outward permitted limit in the Y axis
+ - rohm,flip-x             : Flip touch coordinates on the X axis
+ - rohm,flip-y             : Flip touch coordinates on the Y axis
+
+Example:
+
+        i2c@80110000 {
+                bu21013_tp@0x5c {
+                        compatible = "rohm,bu21013_tp";
+                        reg = <0x5c>;
+                        touch-gpio = <&gpio2 20 0x4>;
+                        avdd-supply = <&ab8500_ldo_aux1_reg>;
+
+                        rohm,touch-max-x = <384>;
+                        rohm,touch-max-y = <704>;
+                        rohm,flip-y;
+                };
+        };
diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt
new file mode 100644
index 000000000000..67ec3d4ccc7f
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -0,0 +1,23 @@
+* Samsung Multi Format Codec (MFC)
+
+Multi Format Codec (MFC) is the IP present in Samsung SoCs which
+supports high resolution decoding and encoding functionalities.
+The MFC device driver is a v4l2 driver which can encode/decode
+video raw/elementary streams and has support for all popular
+video codecs.
+
+Required properties:
+  - compatible : value should be either one among the following
+        (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
+        (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
+
+  - reg : Physical base address of the IP registers and length of memory
+          mapped region.
+
+  - interrupts : MFC interrupt number to the CPU.
+
+  - samsung,mfc-r : Base address of the first memory bank used by MFC
+                    for DMA contiguous memory allocation and its size.
+
+  - samsung,mfc-l : Base address of the second memory bank used by MFC
+                    for DMA contiguous memory allocation and its size.
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
index 361bccb7ec89..95daf6335c37 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
@@ -7,8 +7,10 @@ Required properties:
 - compatible: "marvell,88f6180-pinctrl",
               "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
               "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl"
+              "marvell,98dx4122-pinctrl"
 
 This driver supports all kirkwood variants, i.e. 88f6180, 88f619x, and 88f628x.
+It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
 
 Available mpp pins/groups and functions:
 Note: brackets (x) are not part of the mpp name for marvell,function and given
@@ -277,3 +279,40 @@ mpp46         46       gpio, ts(mp10), tdm(fs), lcd(hsync)
 mpp47         47       gpio, ts(mp11), tdm(drx), lcd(vsync)
 mpp48         48       gpio, ts(mp12), tdm(dtx), lcd(d16)
 mpp49         49       gpo, tdm(rx0ql), pex(clkreq), lcd(d17)
+
+* Marvell Bobcat 98dx4122
+
+name          pins     functions
+================================================================================
+mpp0          0        gpio, nand(io2), spi(cs)
+mpp1          1        gpo, nand(io3), spi(mosi)
+mpp2          2        gpo, nand(io4), spi(sck)
+mpp3          3        gpo, nand(io5), spi(miso)
+mpp4          4        gpio, nand(io6), uart0(rxd)
+mpp5          5        gpo, nand(io7), uart0(txd)
+mpp6          6        sysrst(out), spi(mosi)
+mpp7          7        gpo, pex(rsto), spi(cs)
+mpp8          8        gpio, twsi0(sda), uart0(rts), uart1(rts)
+mpp9          9        gpio, twsi(sck), uart0(cts), uart1(cts)
+mpp10         10       gpo, spi(sck), uart0(txd)
+mpp11         11       gpio, spi(miso), uart0(rxd)
+mpp13         13       gpio, uart1(txd)
+mpp14         14       gpio, uart1(rxd)
+mpp15         15       gpio, uart0(rts)
+mpp16         16       gpio, uart0(cts)
+mpp18         18       gpo, nand(io0)
+mpp19         19       gpo, nand(io1)
+mpp34         34       gpio
+mpp35         35       gpio
+mpp36         36       gpio
+mpp37         37       gpio
+mpp38         38       gpio
+mpp39         39       gpio
+mpp40         40       gpio
+mpp41         41       gpio
+mpp42         42       gpio
+mpp43         43       gpio
+mpp44         44       gpio
+mpp45         45       gpio
+mpp49         49       gpio
+
diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt
new file mode 100644
index 000000000000..6bc09ec14c4d
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ehci-orion.txt
@@ -0,0 +1,15 @@
+* EHCI controller, Orion Marvell variants
+
+Required properties:
+- compatible: must be "marvell,orion-ehci"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- interrupts: The EHCI interrupt
+
+Example:
+
+        ehci@50000 {
+                compatible = "marvell,orion-ehci";
+                reg = <0x50000 0x1000>;
+                interrupts = <19>;
+        };
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 770a0193ca1b..902b1b1f568e 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -55,4 +55,5 @@ ti	Texas Instruments
 via     VIA Technologies, Inc.
 wlf     Wolfson Microelectronics
 wm      Wondermedia Technologies, Inc.
+winbond Winbond Electronics corp.
 xlnx    Xilinx
diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
new file mode 100644
index 000000000000..2957ebb5aa71
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
@@ -0,0 +1,15 @@
+* Atmel Watchdog Timers
+
+** at91sam9-wdt
+
+Required properties:
+- compatible: must be "atmel,at91sam9260-wdt".
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+Example:
+
+        watchdog@fffffd40 {
+                compatible = "atmel,at91sam9260-wdt";
+                reg = <0xfffffd40 0x10>;
+        };
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 08330d9e6a9c..3bb60c8adbff 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -536,6 +536,8 @@ config ARCH_DOVE
         select CPU_V7
         select GENERIC_CLOCKEVENTS
         select MIGHT_HAVE_PCI
+        select PINCTRL
+        select PINCTRL_DOVE
         select PLAT_ORION_LEGACY
         select USB_ARCH_HAS_EHCI
         help
@@ -548,6 +550,8 @@ config ARCH_KIRKWOOD
         select GENERIC_CLOCKEVENTS
         select PCI
         select PCI_QUIRKS
+        select PINCTRL
+        select PINCTRL_KIRKWOOD
         select PLAT_ORION_LEGACY
         help
           Support for the following Marvell Kirkwood series SoCs:
@@ -962,6 +966,7 @@ config ARCH_ZYNQ
         bool "Xilinx Zynq ARM Cortex A9 Platform"
         select ARM_AMBA
         select ARM_GIC
+        select COMMON_CLK
         select CPU_V7
         select GENERIC_CLOCKEVENTS
         select ICST
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 04a3f0d1d053..512b39438548 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -132,6 +132,23 @@ choice
                   their output to UART1 serial port on DaVinci TNETV107X
                   devices.
 
+        config DEBUG_ZYNQ_UART0
+                bool "Kernel low-level debugging on Xilinx Zynq using UART0"
+                depends on ARCH_ZYNQ
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to UART0 on the Zynq platform.
+
+        config DEBUG_ZYNQ_UART1
+                bool "Kernel low-level debugging on Xilinx Zynq using UART1"
+                depends on ARCH_ZYNQ
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to UART1 on the Zynq platform.
+
+                  If you have a ZC702 board and want early boot messages to
+                  appear on the USB serial adaptor, select this option.
+
         config DEBUG_DC21285_PORT
                 bool "Kernel low-level debugging messages via footbridge serial port"
                 depends on FOOTBRIDGE
@@ -209,20 +226,12 @@ choice
                   Say Y here if you want kernel low-level debugging support
                   on i.MX50 or i.MX53.
 
-        config DEBUG_IMX6Q_UART2
-                bool "i.MX6Q Debug UART2"
+        config DEBUG_IMX6Q_UART
+                bool "i.MX6Q Debug UART"
                 depends on SOC_IMX6Q
                 help
                   Say Y here if you want kernel low-level debugging support
-                  on i.MX6Q UART2. This is correct for e.g. the SabreLite
-                  board.
-
-        config DEBUG_IMX6Q_UART4
-                bool "i.MX6Q Debug UART4"
-                depends on SOC_IMX6Q
-                help
-                  Say Y here if you want kernel low-level debugging support
-                  on i.MX6Q UART4.
+                  on i.MX6Q.
 
         config DEBUG_MMP_UART2
                 bool "Kernel low-level debugging message via MMP UART2"
@@ -434,6 +443,15 @@ choice
 
 endchoice
 
+config DEBUG_IMX6Q_UART_PORT
+        int "i.MX6Q Debug UART Port (1-5)" if DEBUG_IMX6Q_UART
+        range 1 5
+        default 1
+        depends on SOC_IMX6Q
+        help
+          Choose UART port on which kernel low-level debug messages
+          should be output.
+
 config DEBUG_LL_INCLUDE
         string
         default "debug/icedcc.S" if DEBUG_ICEDCC
@@ -443,8 +461,7 @@ config DEBUG_LL_INCLUDE
                                  DEBUG_IMX31_IMX35_UART || \
                                  DEBUG_IMX51_UART || \
                                  DEBUG_IMX50_IMX53_UART ||\
-                                 DEBUG_IMX6Q_UART2 || \
-                                 DEBUG_IMX6Q_UART4
+                                 DEBUG_IMX6Q_UART
         default "debug/highbank.S" if DEBUG_HIGHBANK_UART
         default "debug/mvebu.S" if DEBUG_MVEBU_UART
         default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f3f2f80cdf3b..2af359cfe985 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -34,6 +34,8 @@ dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
 
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
 dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb
+dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
+        da850-evm.dtb
 dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
         dove-cubox.dtb \
         dove-dove-db.dtb
@@ -41,7 +43,10 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
         exynos4210-smdkv310.dtb \
         exynos4210-trats.dtb \
         exynos5250-smdk5250.dtb \
-        exynos5440-ssdk5440.dtb
+        exynos5440-ssdk5440.dtb \
+        exynos4412-smdk4412.dtb \
+        exynos5250-smdk5250.dtb \
+        exynos5250-snow.dtb
 dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
         ecx-2000.dtb
 dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
@@ -79,16 +84,20 @@ dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \
         imx53-qsb.dtb \
         imx53-smd.dtb \
         imx6q-arm2.dtb \
+        imx6q-sabreauto.dtb \
         imx6q-sabrelite.dtb \
         imx6q-sabresd.dtb
 dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
         imx23-olinuxino.dtb \
         imx23-stmp378x_devb.dtb \
+        imx28-apf28.dtb \
+        imx28-apf28dev.dtb \
         imx28-apx4devkit.dtb \
         imx28-cfa10036.dtb \
         imx28-cfa10049.dtb \
         imx28-evk.dtb \
         imx28-m28evk.dtb \
+        imx28-sps1.dtb \
         imx28-tx28.dtb
 dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
         omap3-beagle.dtb \
@@ -105,7 +114,10 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
         am335x-bone.dtb
 dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
 dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
-dtb-$(CONFIG_ARCH_U8500) += snowball.dtb
+dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
+        hrefprev60.dtb \
+        hrefv60plus.dtb \
+        ccu9540.dtb
 dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
         r8a7740-armadillo800eva.dtb \
         sh73a0-kzm9g.dtb \
@@ -137,6 +149,7 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
 dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
         wm8505-ref.dtb \
         wm8650-mid.dtb
+dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
 
 targets += dtbs
 endif
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index b1d3fab60e0a..c528b4b429b9 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -479,6 +479,12 @@
                                         trigger-external;
                                 };
                         };
+
+                        watchdog@fffffd40 {
+                                compatible = "atmel,at91sam9260-wdt";
+                                reg = <0xfffffd40 0x10>;
+                                status = "disabled";
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 66106eecf1ed..00485e1dff93 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -404,6 +404,12 @@
                                 #size-cells = <0>;
                                 status = "disabled";
                         };
+
+                        watchdog@fffffd40 {
+                                compatible = "atmel,at91sam9260-wdt";
+                                reg = <0xfffffd40 0x10>;
+                                status = "disabled";
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 0741caeeced1..485fc395efc6 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -473,6 +473,12 @@
                                 #size-cells = <0>;
                                 status = "disabled";
                         };
+
+                        watchdog@fffffd40 {
+                                compatible = "atmel,at91sam9260-wdt";
+                                reg = <0xfffffd40 0x10>;
+                                status = "disabled";
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/ccu9540.dts b/arch/arm/boot/dts/ccu9540.dts
new file mode 100644
index 000000000000..04305463f00d
--- /dev/null
+++ b/arch/arm/boot/dts/ccu9540.dts
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "dbx5x0.dtsi"
+
+/ {
+        model = "ST-Ericsson CCU9540 platform with Device Tree";
+        compatible = "st-ericsson,ccu9540", "st-ericsson,u9540";
+
+        memory {
+                reg = <0x00000000 0x20000000>;
+        };
+
+        soc-u9500 {
+                uart@80120000 {
+                        status = "okay";
+                };
+
+                uart@80121000 {
+                        status = "okay";
+                };
+
+                uart@80007000 {
+                        status = "okay";
+                };
+
+                // External Micro SD slot
+                sdi0_per1@80126000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <100000000>;
+                        bus-width = <4>;
+                        mmc-cap-sd-highspeed;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
+
+                        cd-gpios  = <&gpio7 6 0x4>; // 230
+                        cd-inverted;
+
+                        status = "okay";
+                };
+
+
+                // WLAN SDIO channel
+                sdi1_per2@80118000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+
+                        status = "okay";
+                };
+
+                // On-board eMMC
+                sdi4_per2@80114000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <100000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
+
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi
new file mode 100644
index 000000000000..fddd17417433
--- /dev/null
+++ b/arch/arm/boot/dts/cros5250-common.dtsi
@@ -0,0 +1,184 @@
+/*
+ * Common device tree include for all Exynos 5250 boards based off of Daisy.
+ *
+ * Copyright (c) 2012 Google, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+        aliases {
+        };
+
+        memory {
+                reg = <0x40000000 0x80000000>;
+        };
+
+        chosen {
+        };
+
+        i2c@12C60000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <378000>;
+                gpios = <&gpb3 0 2 3 0>,
+                        <&gpb3 1 2 3 0>;
+        };
+
+        i2c@12C70000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <378000>;
+                gpios = <&gpb3 2 2 3 0>,
+                        <&gpb3 3 2 3 0>;
+        };
+
+        i2c@12C80000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+
+                /*
+                 * Disabled pullups since external part has its own pullups and
+                 * double-pulling gets us out of spec in some cases.
+                 */
+                gpios = <&gpa0 6 3 0 0>,
+                        <&gpa0 7 3 0 0>;
+
+                hdmiddc@50 {
+                        compatible = "samsung,exynos5-hdmiddc";
+                        reg = <0x50>;
+                };
+        };
+
+        i2c@12C90000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+                gpios = <&gpa1 2 3 3 0>,
+                        <&gpa1 3 3 3 0>;
+        };
+
+        i2c@12CA0000 {
+                status = "disabled";
+        };
+
+        i2c@12CB0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+                gpios = <&gpa2 2 3 3 0>,
+                        <&gpa2 3 3 3 0>;
+        };
+
+        i2c@12CC0000 {
+                status = "disabled";
+        };
+
+        i2c@12CD0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+                gpios = <&gpb2 2 3 3 0>,
+                        <&gpb2 3 3 3 0>;
+        };
+
+        i2c@12CE0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <378000>;
+
+                hdmiphy@38 {
+                        compatible = "samsung,exynos5-hdmiphy";
+                        reg = <0x38>;
+                };
+        };
+
+        dwmmc0@12200000 {
+                num-slots = <1>;
+                supports-highspeed;
+                broken-cd;
+                fifo-depth = <0x80>;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3 3>;
+                samsung,dw-mshc-ddr-timing = <1 2 3>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <8>;
+                        gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
+                                <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
+                                <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
+                                <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
+                                <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
+                };
+        };
+
+        dwmmc1@12210000 {
+                status = "disabled";
+        };
+
+        dwmmc2@12220000 {
+                num-slots = <1>;
+                supports-highspeed;
+                fifo-depth = <0x80>;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3 3>;
+                samsung,dw-mshc-ddr-timing = <1 2 3>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <4>;
+                        samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
+                        wp-gpios = <&gpc2 1 0 0 3>;
+                        gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
+                                <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
+                                <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>;
+                };
+        };
+
+        dwmmc3@12230000 {
+                num-slots = <1>;
+                supports-highspeed;
+                broken-cd;
+                fifo-depth = <0x80>;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3 3>;
+                samsung,dw-mshc-ddr-timing = <1 2 3>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <4>;
+                        /* See board-specific dts files for GPIOs */
+                };
+        };
+
+        spi_0: spi@12d20000 {
+                status = "disabled";
+        };
+
+        spi_1: spi@12d30000 {
+                gpios = <&gpa2 4 2 3 0>,
+                        <&gpa2 6 2 3 0>,
+                        <&gpa2 7 2 3 0>;
+                samsung,spi-src-clk = <0>;
+                num-cs = <1>;
+        };
+
+        spi_2: spi@12d40000 {
+                status = "disabled";
+        };
+
+        hdmi {
+                hpd-gpio = <&gpx3 7 0xf 1 3>;
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+
+                power {
+                        label = "Power";
+                        gpios = <&gpx1 3 0 0x10000 0>;
+                        linux,code = <116>; /* KEY_POWER */
+                        gpio-key,wakeup;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi
index 731086b2fca2..0d69322f689f 100644
--- a/arch/arm/boot/dts/dbx5x0.dtsi
+++ b/arch/arm/boot/dts/dbx5x0.dtsi
@@ -217,123 +217,103 @@
                                 // DB8500_REGULATOR_VAPE
                                 db8500_vape_reg: db8500_vape {
                                         regulator-compatible = "db8500_vape";
-                                        regulator-name = "db8500-vape";
                                         regulator-always-on;
                                 };
 
                                 // DB8500_REGULATOR_VARM
                                 db8500_varm_reg: db8500_varm {
                                         regulator-compatible = "db8500_varm";
-                                        regulator-name = "db8500-varm";
                                 };
 
                                 // DB8500_REGULATOR_VMODEM
                                 db8500_vmodem_reg: db8500_vmodem {
                                         regulator-compatible = "db8500_vmodem";
-                                        regulator-name = "db8500-vmodem";
                                 };
 
                                 // DB8500_REGULATOR_VPLL
                                 db8500_vpll_reg: db8500_vpll {
                                         regulator-compatible = "db8500_vpll";
-                                        regulator-name = "db8500-vpll";
                                 };
 
                                 // DB8500_REGULATOR_VSMPS1
                                 db8500_vsmps1_reg: db8500_vsmps1 {
                                         regulator-compatible = "db8500_vsmps1";
-                                        regulator-name = "db8500-vsmps1";
                                 };
 
                                 // DB8500_REGULATOR_VSMPS2
                                 db8500_vsmps2_reg: db8500_vsmps2 {
                                         regulator-compatible = "db8500_vsmps2";
-                                        regulator-name = "db8500-vsmps2";
                                 };
 
                                 // DB8500_REGULATOR_VSMPS3
                                 db8500_vsmps3_reg: db8500_vsmps3 {
                                         regulator-compatible = "db8500_vsmps3";
-                                        regulator-name = "db8500-vsmps3";
                                 };
 
                                 // DB8500_REGULATOR_VRF1
                                 db8500_vrf1_reg: db8500_vrf1 {
                                         regulator-compatible = "db8500_vrf1";
-                                        regulator-name = "db8500-vrf1";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SVAMMDSP
                                 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
                                         regulator-compatible = "db8500_sva_mmdsp";
-                                        regulator-name = "db8500-sva-mmdsp";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
                                 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
                                         regulator-compatible = "db8500_sva_mmdsp_ret";
-                                        regulator-name = "db8500-sva-mmdsp-ret";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SVAPIPE
                                 db8500_sva_pipe_reg: db8500_sva_pipe {
                                         regulator-compatible = "db8500_sva_pipe";
-                                        regulator-name = "db8500_sva_pipe";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SIAMMDSP
                                 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
                                         regulator-compatible = "db8500_sia_mmdsp";
-                                        regulator-name = "db8500_sia_mmdsp";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
                                 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
-                                        regulator-name = "db8500-sia-mmdsp-ret";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SIAPIPE
                                 db8500_sia_pipe_reg: db8500_sia_pipe {
                                         regulator-compatible = "db8500_sia_pipe";
-                                        regulator-name = "db8500-sia-pipe";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SGA
                                 db8500_sga_reg: db8500_sga {
                                         regulator-compatible = "db8500_sga";
-                                        regulator-name = "db8500-sga";
                                         vin-supply = <&db8500_vape_reg>;
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_B2R2_MCDE
                                 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
                                         regulator-compatible = "db8500_b2r2_mcde";
-                                        regulator-name = "db8500-b2r2-mcde";
                                         vin-supply = <&db8500_vape_reg>;
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM12
                                 db8500_esram12_reg: db8500_esram12 {
                                         regulator-compatible = "db8500_esram12";
-                                        regulator-name = "db8500-esram12";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM12RET
                                 db8500_esram12_ret_reg: db8500_esram12_ret {
                                         regulator-compatible = "db8500_esram12_ret";
-                                        regulator-name = "db8500-esram12-ret";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM34
                                 db8500_esram34_reg: db8500_esram34 {
                                         regulator-compatible = "db8500_esram34";
-                                        regulator-name = "db8500-esram34";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM34RET
                                 db8500_esram34_ret_reg: db8500_esram34_ret {
                                         regulator-compatible = "db8500_esram34_ret";
-                                        regulator-name = "db8500-esram34-ret";
                                 };
                         };
 
@@ -412,7 +392,6 @@
                                         // supplies to the display/camera
                                         ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
                                                 regulator-compatible = "ab8500_ldo_aux1";
-                                                regulator-name = "V-DISPLAY";
                                                 regulator-min-microvolt = <2500000>;
                                                 regulator-max-microvolt = <2900000>;
                                                 regulator-boot-on;
@@ -423,7 +402,6 @@
                                         // supplies to the on-board eMMC
                                         ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
                                                 regulator-compatible = "ab8500_ldo_aux2";
-                                                regulator-name = "V-eMMC1";
                                                 regulator-min-microvolt = <1100000>;
                                                 regulator-max-microvolt = <3300000>;
                                         };
@@ -431,7 +409,6 @@
                                         // supply for VAUX3; SDcard slots
                                         ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
                                                 regulator-compatible = "ab8500_ldo_aux3";
-                                                regulator-name = "V-MMC-SD";
                                                 regulator-min-microvolt = <1100000>;
                                                 regulator-max-microvolt = <3300000>;
                                         };
@@ -439,49 +416,41 @@
                                         // supply for v-intcore12; VINTCORE12 LDO
                                         ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
                                                 regulator-compatible = "ab8500_ldo_initcore";
-                                                regulator-name = "V-INTCORE";
                                         };
 
                                         // supply for tvout; gpadc; TVOUT LDO
                                         ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
                                                 regulator-compatible = "ab8500_ldo_tvout";
-                                                regulator-name = "V-TVOUT";
                                         };
 
                                         // supply for ab8500-usb; USB LDO
                                         ab8500_ldo_usb_reg: ab8500_ldo_usb {
                                                 regulator-compatible = "ab8500_ldo_usb";
-                                                regulator-name = "dummy";
                                         };
 
                                         // supply for ab8500-vaudio; VAUDIO LDO
                                         ab8500_ldo_audio_reg: ab8500_ldo_audio {
                                                 regulator-compatible = "ab8500_ldo_audio";
-                                                regulator-name = "V-AUD";
                                         };
 
                                         // supply for v-anamic1 VAMic1-LDO
                                         ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
                                                 regulator-compatible = "ab8500_ldo_anamic1";
-                                                regulator-name = "V-AMIC1";
                                         };
 
                                         // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
                                         ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
                                                 regulator-compatible = "ab8500_ldo_amamic2";
-                                                regulator-name = "V-AMIC2";
                                         };
 
                                         // supply for v-dmic; VDMIC LDO
                                         ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
                                                 regulator-compatible = "ab8500_ldo_dmic";
-                                                regulator-name = "V-DMIC";
                                         };
 
                                         // supply for U8500 CSI/DSI; VANA LDO
                                         ab8500_ldo_ana_reg: ab8500_ldo_ana {
                                                 regulator-compatible = "ab8500_ldo_ana";
-                                                regulator-name = "V-CSI/DSI";
                                         };
                                 };
                         };
@@ -585,42 +554,42 @@
                         status = "disabled";
                 };
 
-                sdi@80126000 {
+                sdi0_per1@80126000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80126000 0x1000>;
                         interrupts = <0 60 0x4>;
                         status = "disabled";
                 };
 
-                sdi@80118000 {
+                sdi1_per2@80118000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80118000 0x1000>;
                         interrupts = <0 50 0x4>;
                         status = "disabled";
                 };
 
-                sdi@80005000 {
+                sdi2_per3@80005000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80005000 0x1000>;
                         interrupts = <0 41 0x4>;
                         status = "disabled";
                 };
 
-                sdi@80119000 {
+                sdi3_per2@80119000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80119000 0x1000>;
                         interrupts = <0 59 0x4>;
                         status = "disabled";
                 };
 
-                sdi@80114000 {
+                sdi4_per2@80114000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80114000 0x1000>;
                         interrupts = <0 99 0x4>;
                         status = "disabled";
                 };
 
-                sdi@80008000 {
+                sdi5_per3@80008000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80008000 0x1000>;
                         interrupts = <0 100 0x4>;
@@ -674,5 +643,18 @@
                         status = "disabled";
                  };
 
+                vmmci: regulator-gpio {
+                        compatible = "regulator-gpio";
+
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <2600000>;
+                        regulator-name = "mmci-reg";
+                        regulator-type = "voltage";
+
+                        states = <1800000 0x1
+                                  2900000 0x0>;
+
+                        status = "disabled";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts
index 0adbd5a38095..fed7d3f9f431 100644
--- a/arch/arm/boot/dts/dove-cubox.dts
+++ b/arch/arm/boot/dts/dove-cubox.dts
@@ -40,3 +40,13 @@
                 reg = <0>;
         };
 };
+
+&pinctrl {
+        pinctrl-0 = <&pmx_gpio_18>;
+        pinctrl-names = "default";
+
+        pmx_gpio_18: pmx-gpio-18 {
+                marvell,pins = "mpp18";
+                marvell,function = "gpio";
+        };
+};
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 5a00022383e7..61f391412a5a 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -4,6 +4,12 @@
         compatible = "marvell,dove";
         model = "Marvell Armada 88AP510 SoC";
 
+        aliases {
+                gpio0 = &gpio0;
+                gpio1 = &gpio1;
+                gpio2 = &gpio2;
+        };
+
         soc@f1000000 {
                 compatible = "simple-bus";
                 #address-cells = <1>;
@@ -72,7 +78,8 @@
                         #gpio-cells = <2>;
                         gpio-controller;
                         reg = <0xd0400 0x20>;
-                        ngpio = <32>;
+                        ngpios = <32>;
+                        interrupt-controller;
                         interrupts = <12>, <13>, <14>, <60>;
                 };
 
@@ -81,7 +88,8 @@
                         #gpio-cells = <2>;
                         gpio-controller;
                         reg = <0xd0420 0x20>;
-                        ngpio = <32>;
+                        ngpios = <32>;
+                        interrupt-controller;
                         interrupts = <61>;
                 };
 
@@ -90,7 +98,12 @@
                         #gpio-cells = <2>;
                         gpio-controller;
                         reg = <0xe8400 0x0c>;
-                        ngpio = <8>;
+                        ngpios = <8>;
+                };
+
+                pinctrl: pinctrl@d0200 {
+                        compatible = "marvell,dove-pinctrl";
+                        reg = <0xd0200 0x10>;
                 };
 
                 spi0: spi@10600 {
diff --git a/arch/arm/boot/dts/evk-pro3.dts b/arch/arm/boot/dts/evk-pro3.dts
index b7354e6506de..96e50f569433 100644
--- a/arch/arm/boot/dts/evk-pro3.dts
+++ b/arch/arm/boot/dts/evk-pro3.dts
@@ -22,10 +22,22 @@
                                 status = "okay";
                         };
 
+                        usart0: serial@fffb0000 {
+                                status = "okay";
+                        };
+
+                        usart2: serial@fffb8000 {
+                                status = "okay";
+                        };
+
                         usb1: gadget@fffa4000 {
                                 atmel,vbus-gpio = <&pioC 5 0>;
                                 status = "okay";
                         };
+
+                        watchdog@fffffd40 {
+                                status = "okay";
+                        };
                 };
 
                 usb0: ohci@00500000 {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 96d4462730fb..e1347fceb5bc 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -28,6 +28,44 @@
                 spi0 = &spi_0;
                 spi1 = &spi_1;
                 spi2 = &spi_2;
+                i2c0 = &i2c_0;
+                i2c1 = &i2c_1;
+                i2c2 = &i2c_2;
+                i2c3 = &i2c_3;
+                i2c4 = &i2c_4;
+                i2c5 = &i2c_5;
+                i2c6 = &i2c_6;
+                i2c7 = &i2c_7;
+        };
+
+        pd_mfc: mfc-power-domain@10023C40 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023C40 0x20>;
+        };
+
+        pd_g3d: g3d-power-domain@10023C60 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023C60 0x20>;
+        };
+
+        pd_lcd0: lcd0-power-domain@10023C80 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023C80 0x20>;
+        };
+
+        pd_tv: tv-power-domain@10023C20 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023C20 0x20>;
+        };
+
+        pd_cam: cam-power-domain@10023C00 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023C00 0x20>;
+        };
+
+        pd_gps: gps-power-domain@10023CE0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023CE0 0x20>;
         };
 
         gic:interrupt-controller@10490000 {
@@ -121,7 +159,7 @@
                 status = "disabled";
         };
 
-        i2c@13860000 {
+        i2c_0: i2c@13860000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -130,7 +168,7 @@
                 status = "disabled";
         };
 
-        i2c@13870000 {
+        i2c_1: i2c@13870000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -139,7 +177,7 @@
                 status = "disabled";
         };
 
-        i2c@13880000 {
+        i2c_2: i2c@13880000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -148,7 +186,7 @@
                 status = "disabled";
         };
 
-        i2c@13890000 {
+        i2c_3: i2c@13890000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -157,7 +195,7 @@
                 status = "disabled";
         };
 
-        i2c@138A0000 {
+        i2c_4: i2c@138A0000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -166,7 +204,7 @@
                 status = "disabled";
         };
 
-        i2c@138B0000 {
+        i2c_5: i2c@138B0000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -175,7 +213,7 @@
                 status = "disabled";
         };
 
-        i2c@138C0000 {
+        i2c_6: i2c@138C0000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -184,7 +222,7 @@
                 status = "disabled";
         };
 
-        i2c@138D0000 {
+        i2c_7: i2c@138D0000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index 3e68f52e8454..f2710018e84e 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -22,38 +22,54 @@
         compatible = "insignal,origen", "samsung,exynos4210";
 
         memory {
-                reg = <0x40000000 0x40000000>;
+                reg = <0x40000000 0x10000000
+                       0x50000000 0x10000000
+                       0x60000000 0x10000000
+                       0x70000000 0x10000000>;
         };
 
         chosen {
                 bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
         };
 
+        mmc_reg: voltage-regulator {
+                compatible = "regulator-fixed";
+                regulator-name = "VMEM_VDD_2.8V";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&gpx1 1 0>;
+                enable-active-high;
+        };
+
         sdhci@12530000 {
-                samsung,sdhci-bus-width = <4>;
-                linux,mmc_cap_4_bit_data;
-                samsung,sdhci-cd-internal;
-                gpio-cd = <&gpk2 2 2 3 3>;
-                gpios = <&gpk2 0 2 0 3>,
-                        <&gpk2 1 2 0 3>,
-                        <&gpk2 3 2 3 3>,
-                        <&gpk2 4 2 3 3>,
-                        <&gpk2 5 2 3 3>,
-                        <&gpk2 6 2 3 3>;
+                bus-width = <4>;
+                pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
+                pinctrl-names = "default";
+                vmmc-supply = <&mmc_reg>;
                 status = "okay";
         };
 
         sdhci@12510000 {
-                samsung,sdhci-bus-width = <4>;
-                linux,mmc_cap_4_bit_data;
-                samsung,sdhci-cd-internal;
-                gpio-cd = <&gpk0 2 2 3 3>;
-                gpios = <&gpk0 0 2 0 3>,
-                        <&gpk0 1 2 0 3>,
-                        <&gpk0 3 2 3 3>,
-                        <&gpk0 4 2 3 3>,
-                        <&gpk0 5 2 3 3>,
-                        <&gpk0 6 2 3 3>;
+                bus-width = <4>;
+                pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>;
+                pinctrl-names = "default";
+                vmmc-supply = <&mmc_reg>;
+                status = "okay";
+        };
+
+        serial@13800000 {
+                status = "okay";
+        };
+
+        serial@13810000 {
+                status = "okay";
+        };
+
+        serial@13820000 {
+                status = "okay";
+        };
+
+        serial@13830000 {
                 status = "okay";
         };
 
@@ -64,35 +80,35 @@
 
                 up {
                         label = "Up";
-                        gpios = <&gpx2 0 0 0x10000 2>;
+                        gpios = <&gpx2 0 1>;
                         linux,code = <103>;
                         gpio-key,wakeup;
                 };
 
                 down {
                         label = "Down";
-                        gpios = <&gpx2 1 0 0x10000 2>;
+                        gpios = <&gpx2 1 1>;
                         linux,code = <108>;
                         gpio-key,wakeup;
                 };
 
                 back {
                         label = "Back";
-                        gpios = <&gpx1 7 0 0x10000 2>;
+                        gpios = <&gpx1 7 1>;
                         linux,code = <158>;
                         gpio-key,wakeup;
                 };
 
                 home {
                         label = "Home";
-                        gpios = <&gpx1 6 0 0x10000 2>;
+                        gpios = <&gpx1 6 1>;
                         linux,code = <102>;
                         gpio-key,wakeup;
                 };
 
                 menu {
                         label = "Menu";
-                        gpios = <&gpx1 5 0 0x10000 2>;
+                        gpios = <&gpx1 5 1>;
                         linux,code = <139>;
                         gpio-key,wakeup;
                 };
@@ -101,7 +117,7 @@
         leds {
                 compatible = "gpio-leds";
                 status {
-                        gpios = <&gpx1 3 0 0x10000 2>;
+                        gpios = <&gpx1 3 1>;
                         linux,default-trigger = "heartbeat";
                 };
         };
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
index 6a4a1a04221c..55a2efb763d1 100644
--- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -482,196 +482,196 @@
                         samsung,pins = "gpk0-0";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd0_cmd: sd0-cmd {
                         samsung,pins = "gpk0-1";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd0_cd: sd0-cd {
                         samsung,pins = "gpk0-2";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd0_bus1: sd0-bus-width1 {
                         samsung,pins = "gpk0-3";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd0_bus4: sd0-bus-width4 {
                         samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd0_bus8: sd0-bus-width8 {
                         samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_clk: sd4-clk {
                         samsung,pins = "gpk0-0";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_cmd: sd4-cmd {
                         samsung,pins = "gpk0-1";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_cd: sd4-cd {
                         samsung,pins = "gpk0-2";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_bus1: sd4-bus-width1 {
                         samsung,pins = "gpk0-3";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_bus4: sd4-bus-width4 {
                         samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_bus8: sd4-bus-width8 {
                         samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <4>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd1_clk: sd1-clk {
                         samsung,pins = "gpk1-0";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd1_cmd: sd1-cmd {
                         samsung,pins = "gpk1-1";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd1_cd: sd1-cd {
                         samsung,pins = "gpk1-2";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd1_bus1: sd1-bus-width1 {
                         samsung,pins = "gpk1-3";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd1_bus4: sd1-bus-width4 {
                         samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_clk: sd2-clk {
                         samsung,pins = "gpk2-0";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_cmd: sd2-cmd {
                         samsung,pins = "gpk2-1";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_cd: sd2-cd {
                         samsung,pins = "gpk2-2";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_bus1: sd2-bus-width1 {
                         samsung,pins = "gpk2-3";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_bus4: sd2-bus-width4 {
                         samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_bus8: sd2-bus-width8 {
                         samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd3_clk: sd3-clk {
                         samsung,pins = "gpk3-0";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd3_cmd: sd3-cmd {
                         samsung,pins = "gpk3-1";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd3_cd: sd3-cd {
                         samsung,pins = "gpk3-2";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd3_bus1: sd3-bus-width1 {
                         samsung,pins = "gpk3-3";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd3_bus4: sd3-bus-width4 {
                         samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 eint0: ext-int0 {
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 63610c3ba3af..9b23a8255e39 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -43,6 +43,22 @@
                 status = "okay";
         };
 
+        serial@13800000 {
+                status = "okay";
+        };
+
+        serial@13810000 {
+                status = "okay";
+        };
+
+        serial@13820000 {
+                status = "okay";
+        };
+
+        serial@13830000 {
+                status = "okay";
+        };
+
         keypad@100A0000 {
                 samsung,keypad-num-rows = <2>;
                 samsung,keypad-num-columns = <8>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index a21511c14071..c346b64dff55 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -35,24 +35,15 @@
                 regulator-name = "VMEM_VDD_2.8V";
                 regulator-min-microvolt = <2800000>;
                 regulator-max-microvolt = <2800000>;
-                gpio = <&gpk0 2 1 0 0>;
+                gpio = <&gpk0 2 0>;
                 enable-active-high;
         };
 
         sdhci_emmc: sdhci@12510000 {
                 bus-width = <8>;
                 non-removable;
-                broken-voltage;
-                gpios = <&gpk0 0 2 0 3>,
-                        <&gpk0 1 2 0 3>,
-                        <&gpk0 3 2 2 3>,
-                        <&gpk0 4 2 2 3>,
-                        <&gpk0 5 2 2 3>,
-                        <&gpk0 6 2 2 3>,
-                        <&gpk1 3 3 3 3>,
-                        <&gpk1 4 3 3 3>,
-                        <&gpk1 5 3 3 3>,
-                        <&gpk1 6 3 3 3>;
+                pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
+                pinctrl-names = "default";
                 vmmc-supply = <&vemmc_reg>;
                 status = "okay";
         };
@@ -73,12 +64,74 @@
                 status = "okay";
         };
 
+        gpio-keys {
+                compatible = "gpio-keys";
+
+                vol-down-key {
+                        gpios = <&gpx2 1 1>;
+                        linux,code = <114>;
+                        label = "volume down";
+                        debounce-interval = <10>;
+                };
+
+                vol-up-key {
+                        gpios = <&gpx2 0 1>;
+                        linux,code = <115>;
+                        label = "volume up";
+                        debounce-interval = <10>;
+                };
+
+                power-key {
+                        gpios = <&gpx2 7 1>;
+                        linux,code = <116>;
+                        label = "power";
+                        debounce-interval = <10>;
+                        gpio-key,wakeup;
+                };
+
+                ok-key {
+                        gpios = <&gpx3 5 1>;
+                        linux,code = <352>;
+                        label = "ok";
+                        debounce-interval = <10>;
+                };
+        };
+
+        tsp_reg: voltage-regulator {
+                compatible = "regulator-fixed";
+                regulator-name = "TSP_FIXED_VOLTAGES";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&gpl0 3 0>;
+                enable-active-high;
+        };
+
+        i2c@13890000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-slave-addr = <0x10>;
+                samsung,i2c-max-bus-freq = <400000>;
+                pinctrl-0 = <&i2c3_bus>;
+                pinctrl-names = "default";
+                status = "okay";
+
+                mms114-touchscreen@48 {
+                        compatible = "melfas,mms114";
+                        reg = <0x48>;
+                        interrupt-parent = <&gpx0>;
+                        interrupts = <4 2>;
+                        x-size = <720>;
+                        y-size = <1280>;
+                        avdd-supply = <&tsp_reg>;
+                        vdd-supply = <&tsp_reg>;
+                };
+        };
+
         i2c@138B0000 {
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-slave-addr = <0x10>;
                 samsung,i2c-max-bus-freq = <100000>;
-                gpios = <&gpb 6 3 3 0>,
-                        <&gpb 7 3 3 0>;
+                pinctrl-0 = <&i2c5_bus>;
+                pinctrl-names = "default";
                 status = "okay";
 
                 max8997_pmic@66 {
@@ -93,9 +146,9 @@
                         max8997,pmic-ignore-gpiodvs-side-effect;
                         max8997,pmic-buck125-default-dvs-idx = <0>;
 
-                        max8997,pmic-buck125-dvs-gpios = <&gpx0 5 1 0 0>,
-                                                         <&gpx0 6 1 0 0>,
-                                                         <&gpl0 0 1 0 0>;
+                        max8997,pmic-buck125-dvs-gpios = <&gpx0 5 0>,
+                                                         <&gpx0 6 0>,
+                                                         <&gpl0 0 0>;
 
                         max8997,pmic-buck1-dvs-voltage = <1350000>, <1300000>,
                                                          <1250000>, <1200000>,
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index d877dbe7ac0e..e31bfc4a6f09 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -31,6 +31,11 @@
                 pinctrl2 = &pinctrl_2;
         };
 
+        pd_lcd1: lcd1-power-domain@10023CA0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023CA0 0x20>;
+        };
+
         gic:interrupt-controller@10490000 {
                 cpu-offset = <0x8000>;
         };
@@ -64,4 +69,11 @@
                 compatible = "samsung,pinctrl-exynos4210";
                 reg = <0x03860000 0x1000>;
         };
+
+        tmu@100C0000 {
+                compatible = "samsung,exynos4210-tmu";
+                interrupt-parent = <&combiner>;
+                reg = <0x100C0000 0x100>;
+                interrupts = <2 4>;
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
new file mode 100644
index 000000000000..c6ae2005961f
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -0,0 +1,28 @@
+/*
+ * Samsung's Exynos4212 SoC device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212
+ * based board files can include this file and provide values for board specfic
+ * bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "exynos4x12.dtsi"
+
+/ {
+        compatible = "samsung,exynos4212";
+
+        gic:interrupt-controller@10490000 {
+                cpu-offset = <0x8000>;
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts
new file mode 100644
index 000000000000..f05bf575cc45
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -0,0 +1,45 @@
+/*
+ * Samsung's Exynos4412 based SMDK board device tree source
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Device tree source file for Samsung's SMDK4412 board which is based on
+ * Samsung's Exynos4412 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos4412.dtsi"
+
+/ {
+        model = "Samsung SMDK evaluation board based on Exynos4412";
+        compatible = "samsung,smdk4412", "samsung,exynos4412";
+
+        memory {
+                reg = <0x40000000 0x40000000>;
+        };
+
+        chosen {
+                bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
+        };
+
+        serial@13800000 {
+                status = "okay";
+        };
+
+        serial@13810000 {
+                status = "okay";
+        };
+
+        serial@13820000 {
+                status = "okay";
+        };
+
+        serial@13830000 {
+                status = "okay";
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
new file mode 100644
index 000000000000..d7dfe312772a
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -0,0 +1,28 @@
+/*
+ * Samsung's Exynos4412 SoC device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
+ * based board files can include this file and provide values for board specfic
+ * bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * Exynos4412 SoC. As device tree coverage for Exynos4412 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "exynos4x12.dtsi"
+
+/ {
+        compatible = "samsung,exynos4412";
+
+        gic:interrupt-controller@10490000 {
+                cpu-offset = <0x4000>;
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
new file mode 100644
index 000000000000..8e6115adcd97
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
@@ -0,0 +1,965 @@
+/*
+ * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung's Exynos4x12 SoCs pin-mux and pin-config optiosn are listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+        pinctrl@11400000 {
+                gpa0: gpa0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpa1: gpa1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpb: gpb {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpc0: gpc0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpc1: gpc1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpd0: gpd0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpd1: gpd1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf0: gpf0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf1: gpf1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf2: gpf2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf3: gpf3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpj0: gpj0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpj1: gpj1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                uart0_data: uart0-data {
+                        samsung,pins = "gpa0-0", "gpa0-1";
+                        samsung,pin-function = <0x2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart0_fctl: uart0-fctl {
+                        samsung,pins = "gpa0-2", "gpa0-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart1_data: uart1-data {
+                        samsung,pins = "gpa0-4", "gpa0-5";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart1_fctl: uart1-fctl {
+                        samsung,pins = "gpa0-6", "gpa0-7";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c2_bus: i2c2-bus {
+                        samsung,pins = "gpa0-6", "gpa0-7";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart2_data: uart2-data {
+                        samsung,pins = "gpa1-0", "gpa1-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart2_fctl: uart2-fctl {
+                        samsung,pins = "gpa1-2", "gpa1-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart_audio_a: uart-audio-a {
+                        samsung,pins = "gpa1-0", "gpa1-1";
+                        samsung,pin-function = <4>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c3_bus: i2c3-bus {
+                        samsung,pins = "gpa1-2", "gpa1-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart3_data: uart3-data {
+                        samsung,pins = "gpa1-4", "gpa1-5";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart_audio_b: uart-audio-b {
+                        samsung,pins = "gpa1-4", "gpa1-5";
+                        samsung,pin-function = <4>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                spi0_bus: spi0-bus {
+                        samsung,pins = "gpb-0", "gpb-2", "gpb-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c4_bus: i2c4-bus {
+                        samsung,pins = "gpb-0", "gpb-1";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                spi1_bus: spi1-bus {
+                        samsung,pins = "gpb-4", "gpb-6", "gpb-7";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c5_bus: i2c5-bus {
+                        samsung,pins = "gpb-2", "gpb-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2s1_bus: i2s1-bus {
+                        samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
+                                        "gpc0-4";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pcm1_bus: pcm1-bus {
+                        samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
+                                        "gpc0-4";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                ac97_bus: ac97-bus {
+                        samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
+                                        "gpc0-4";
+                        samsung,pin-function = <4>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2s2_bus: i2s2-bus {
+                        samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
+                                        "gpc1-4";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pcm2_bus: pcm2-bus {
+                        samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
+                                        "gpc1-4";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                spdif_bus: spdif-bus {
+                        samsung,pins = "gpc1-0", "gpc1-1";
+                        samsung,pin-function = <4>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c6_bus: i2c6-bus {
+                        samsung,pins = "gpc1-3", "gpc1-4";
+                        samsung,pin-function = <4>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                spi2_bus: spi2-bus {
+                        samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4";
+                        samsung,pin-function = <5>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pwm0_out: pwm0-out {
+                        samsung,pins = "gpd0-0";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pwm1_out: pwm1-out {
+                        samsung,pins = "gpd0-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_ctrl: lcd-ctrl {
+                        samsung,pins = "gpd0-0", "gpd0-1";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c7_bus: i2c7-bus {
+                        samsung,pins = "gpd0-2", "gpd0-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pwm2_out: pwm2-out {
+                        samsung,pins = "gpd0-2";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pwm3_out: pwm3-out {
+                        samsung,pins = "gpd0-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c0_bus: i2c0-bus {
+                        samsung,pins = "gpd1-0", "gpd1-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                mipi0_clk: mipi0-clk {
+                        samsung,pins = "gpd1-0", "gpd1-1";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c1_bus: i2c1-bus {
+                        samsung,pins = "gpd1-2", "gpd1-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                mipi1_clk: mipi1-clk {
+                        samsung,pins = "gpd1-2", "gpd1-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_clk: lcd-clk {
+                        samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_data16: lcd-data-width16 {
+                        samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2",
+                                        "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0",
+                                        "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7",
+                                        "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_data18: lcd-data-width18 {
+                        samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1",
+                                        "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7",
+                                        "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
+                                        "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1",
+                                        "gpf3-2", "gpf3-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_data24: lcd-data-width24 {
+                        samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7",
+                                        "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3",
+                                        "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7",
+                                        "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
+                                        "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
+                                        "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_ldi: lcd-ldi {
+                        samsung,pins = "gpf3-4";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                cam_port_a: cam-port-a {
+                        samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
+                                        "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
+                                        "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-3",
+                                        "gpj1-4";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+        };
+
+        pinctrl@11000000 {
+                gpk0: gpk0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpk1: gpk1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpk2: gpk2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpk3: gpk3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpl0: gpl0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpl1: gpl1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpl2: gpl2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpm0: gpm0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpm1: gpm1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpm2: gpm2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpm3: gpm3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpm4: gpm4 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpy0: gpy0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy1: gpy1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy2: gpy2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy3: gpy3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy4: gpy4 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy5: gpy5 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy6: gpy6 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpx0: gpx0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        interrupt-parent = <&gic>;
+                        interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
+                                     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
+                        #interrupt-cells = <2>;
+                };
+
+                gpx1: gpx1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        interrupt-parent = <&gic>;
+                        interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
+                                     <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
+                        #interrupt-cells = <2>;
+                };
+
+                gpx2: gpx2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpx3: gpx3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                sd0_clk: sd0-clk {
+                        samsung,pins = "gpk0-0";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd0_cmd: sd0-cmd {
+                        samsung,pins = "gpk0-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd0_cd: sd0-cd {
+                        samsung,pins = "gpk0-2";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd0_bus1: sd0-bus-width1 {
+                        samsung,pins = "gpk0-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd0_bus4: sd0-bus-width4 {
+                        samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd0_bus8: sd0-bus-width8 {
+                        samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_clk: sd4-clk {
+                        samsung,pins = "gpk0-0";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_cmd: sd4-cmd {
+                        samsung,pins = "gpk0-1";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_cd: sd4-cd {
+                        samsung,pins = "gpk0-2";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_bus1: sd4-bus-width1 {
+                        samsung,pins = "gpk0-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_bus4: sd4-bus-width4 {
+                        samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_bus8: sd4-bus-width8 {
+                        samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <4>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd1_clk: sd1-clk {
+                        samsung,pins = "gpk1-0";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd1_cmd: sd1-cmd {
+                        samsung,pins = "gpk1-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd1_cd: sd1-cd {
+                        samsung,pins = "gpk1-2";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd1_bus1: sd1-bus-width1 {
+                        samsung,pins = "gpk1-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd1_bus4: sd1-bus-width4 {
+                        samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_clk: sd2-clk {
+                        samsung,pins = "gpk2-0";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_cmd: sd2-cmd {
+                        samsung,pins = "gpk2-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_cd: sd2-cd {
+                        samsung,pins = "gpk2-2";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_bus1: sd2-bus-width1 {
+                        samsung,pins = "gpk2-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_bus4: sd2-bus-width4 {
+                        samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_bus8: sd2-bus-width8 {
+                        samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd3_clk: sd3-clk {
+                        samsung,pins = "gpk3-0";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd3_cmd: sd3-cmd {
+                        samsung,pins = "gpk3-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd3_cd: sd3-cd {
+                        samsung,pins = "gpk3-2";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd3_bus1: sd3-bus-width1 {
+                        samsung,pins = "gpk3-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd3_bus4: sd3-bus-width4 {
+                        samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                keypad_col0: keypad-col0 {
+                        samsung,pins = "gpl2-0";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col1: keypad-col1 {
+                        samsung,pins = "gpl2-1";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col2: keypad-col2 {
+                        samsung,pins = "gpl2-2";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col3: keypad-col3 {
+                        samsung,pins = "gpl2-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col4: keypad-col4 {
+                        samsung,pins = "gpl2-4";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col5: keypad-col5 {
+                        samsung,pins = "gpl2-5";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col6: keypad-col6 {
+                        samsung,pins = "gpl2-6";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col7: keypad-col7 {
+                        samsung,pins = "gpl2-7";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                cam_port_b: cam-port-b {
+                        samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
+                                        "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
+                                        "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1",
+                                        "gpm2-2";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                eint0: ext-int0 {
+                        samsung,pins = "gpx0-0";
+                        samsung,pin-function = <0xf>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                eint8: ext-int8 {
+                        samsung,pins = "gpx1-0";
+                        samsung,pin-function = <0xf>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                eint15: ext-int15 {
+                        samsung,pins = "gpx1-7";
+                        samsung,pin-function = <0xf>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                eint16: ext-int16 {
+                        samsung,pins = "gpx2-0";
+                        samsung,pin-function = <0xf>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                eint31: ext-int31 {
+                        samsung,pins = "gpx3-7";
+                        samsung,pin-function = <0xf>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+        };
+
+        pinctrl@03860000 {
+                gpz: gpz {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                i2s0_bus: i2s0-bus {
+                        samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
+                                        "gpz-4", "gpz-5", "gpz-6";
+                        samsung,pin-function = <0x2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pcm0_bus: pcm0-bus {
+                        samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
+                                        "gpz-4";
+                        samsung,pin-function = <0x3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+        };
+
+        pinctrl@106E0000 {
+                gpv0: gpv0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpv1: gpv1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpv2: gpv2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpv3: gpv3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpv4: gpv4 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                c2c_bus: c2c-bus {
+                        samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3",
+                                        "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7",
+                                        "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3",
+                                        "gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7",
+                                        "gpv2-0", "gpv2-1", "gpv2-2", "gpv2-3",
+                                        "gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7",
+                                        "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3",
+                                        "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7",
+                                        "gpv4-0", "gpv4-1";
+                        samsung,pin-function = <0x2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
new file mode 100644
index 000000000000..179a62e46c9d
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -0,0 +1,69 @@
+/*
+ * Samsung's Exynos4x12 SoCs device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12
+ * based board files can include this file and provide values for board specfic
+ * bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "exynos4.dtsi"
+/include/ "exynos4x12-pinctrl.dtsi"
+
+/ {
+        aliases {
+                pinctrl0 = &pinctrl_0;
+                pinctrl1 = &pinctrl_1;
+                pinctrl2 = &pinctrl_2;
+                pinctrl3 = &pinctrl_3;
+        };
+
+        combiner:interrupt-controller@10440000 {
+                interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
+                             <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
+                             <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
+                             <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
+                             <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>;
+        };
+
+        pinctrl_0: pinctrl@11400000 {
+                compatible = "samsung,pinctrl-exynos4x12";
+                reg = <0x11400000 0x1000>;
+                interrupts = <0 47 0>;
+        };
+
+        pinctrl_1: pinctrl@11000000 {
+                compatible = "samsung,pinctrl-exynos4x12";
+                reg = <0x11000000 0x1000>;
+                interrupts = <0 46 0>;
+
+                wakup_eint: wakeup-interrupt-controller {
+                        compatible = "samsung,exynos4210-wakeup-eint";
+                        interrupt-parent = <&gic>;
+                        interrupts = <0 32 0>;
+                };
+        };
+
+        pinctrl_2: pinctrl@03860000 {
+                compatible = "samsung,pinctrl-exynos4x12";
+                reg = <0x03860000 0x1000>;
+                interrupt-parent = <&combiner>;
+                interrupts = <10 0>;
+        };
+
+        pinctrl_3: pinctrl@106E0000 {
+                compatible = "samsung,pinctrl-exynos4x12";
+                reg = <0x106E0000 0x1000>;
+                interrupts = <0 72 0>;
+        };
+};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index a352df403b7a..942d5761ca97 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -17,10 +17,6 @@
         compatible = "samsung,smdk5250", "samsung,exynos5250";
 
         aliases {
-                mshc0 = &dwmmc_0;
-                mshc1 = &dwmmc_1;
-                mshc2 = &dwmmc_2;
-                mshc3 = &dwmmc_3;
         };
 
         memory {
@@ -55,8 +51,31 @@
                 };
         };
 
+        i2c@121D0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <40000>;
+                samsung,i2c-slave-addr = <0x38>;
+
+                sata-phy {
+                        compatible = "samsung,sata-phy";
+                        reg = <0x38>;
+                };
+        };
+
+        sata@122F0000 {
+                samsung,sata-freq = <66>;
+        };
+
         i2c@12C80000 {
-                status = "disabled";
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+                gpios = <&gpa0 6 3 3 0>,
+                        <&gpa0 7 3 3 0>;
+
+                hdmiddc@50 {
+                        compatible = "samsung,exynos5-hdmiddc";
+                        reg = <0x50>;
+                };
         };
 
         i2c@12C90000 {
@@ -79,7 +98,17 @@
                 status = "disabled";
         };
 
-        dwmmc_0: dwmmc0@12200000 {
+        i2c@12CE0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+
+                hdmiphy@38 {
+                        compatible = "samsung,exynos5-hdmiphy";
+                        reg = <0x38>;
+                };
+        };
+
+        dwmmc0@12200000 {
                 num-slots = <1>;
                 supports-highspeed;
                 broken-cd;
@@ -100,11 +129,11 @@
                 };
         };
 
-        dwmmc_1: dwmmc1@12210000 {
+        dwmmc1@12210000 {
                 status = "disabled";
         };
 
-        dwmmc_2: dwmmc2@12220000 {
+        dwmmc2@12220000 {
                 num-slots = <1>;
                 supports-highspeed;
                 fifo-depth = <0x80>;
@@ -125,7 +154,7 @@
                 };
         };
 
-        dwmmc_3: dwmmc3@12230000 {
+        dwmmc3@12230000 {
                 status = "disabled";
         };
 
@@ -166,4 +195,13 @@
         spi_2: spi@12d40000 {
                 status = "disabled";
         };
+
+        hdmi {
+                hpd-gpio = <&gpx3 7 0xf 1 3>;
+        };
+
+        codec@11000000 {
+                samsung,mfc-r = <0x43000000 0x800000>;
+                samsung,mfc-l = <0x51000000 0x800000>;
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
new file mode 100644
index 000000000000..17dd951c1cd2
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -0,0 +1,43 @@
+/*
+ * Google Snow board device tree source
+ *
+ * Copyright (c) 2012 Google, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos5250.dtsi"
+/include/ "cros5250-common.dtsi"
+
+/ {
+        model = "Google Snow";
+        compatible = "google,snow", "samsung,exynos5250";
+
+        gpio-keys {
+                compatible = "gpio-keys";
+
+                lid-switch {
+                        label = "Lid";
+                        gpios = <&gpx3 5 0 0x10000 0>;
+                        linux,input-type = <5>; /* EV_SW */
+                        linux,code = <0>; /* SW_LID */
+                        debounce-interval = <1>;
+                        gpio-key,wakeup;
+                };
+        };
+
+        /*
+         * On Snow we've got SIP WiFi and so can keep drive strengths low to
+         * reduce EMI.
+         */
+        dwmmc3@12230000 {
+                slot@0 {
+                        gpios = <&gpc4 0 2 0 0>, <&gpc4 1 2 3 0>,
+                                <&gpc4 3 2 3 0>, <&gpc4 4 2 3 0>,
+                                <&gpc4 5 2 3 0>, <&gpc4 6 2 3 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index dddfd6e444dc..36d8246ea50e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -31,6 +31,10 @@
                 gsc1 = &gsc_1;
                 gsc2 = &gsc_2;
                 gsc3 = &gsc_3;
+                mshc0 = &dwmmc_0;
+                mshc1 = &dwmmc_1;
+                mshc2 = &dwmmc_2;
+                mshc3 = &dwmmc_3;
         };
 
         gic:interrupt-controller@10481000 {
@@ -62,12 +66,24 @@
                 interrupts = <0 42 0>;
         };
 
+        codec@11000000 {
+                compatible = "samsung,mfc-v6";
+                reg = <0x11000000 0x10000>;
+                interrupts = <0 96 0>;
+        };
+
         rtc {
                 compatible = "samsung,s3c6410-rtc";
                 reg = <0x101E0000 0x100>;
                 interrupts = <0 43 0>, <0 44 0>;
         };
 
+        tmu@10060000 {
+                compatible = "samsung,exynos5250-tmu";
+                reg = <0x10060000 0x100>;
+                interrupts = <0 65 0>;
+        };
+
         serial@12C00000 {
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x12C00000 0x100>;
@@ -92,6 +108,17 @@
                 interrupts = <0 54 0>;
         };
 
+        sata@122F0000 {
+                compatible = "samsung,exynos5-sata-ahci";
+                reg = <0x122F0000 0x1ff>;
+                interrupts = <0 115 0>;
+        };
+
+        sata-phy@12170000 {
+                compatible = "samsung,exynos5-sata-phy";
+                reg = <0x12170000 0x1ff>;
+        };
+
         i2c@12C60000 {
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x12C60000 0x100>;
@@ -156,6 +183,21 @@
                 #size-cells = <0>;
         };
 
+        i2c@12CE0000 {
+                compatible = "samsung,s3c2440-hdmiphy-i2c";
+                reg = <0x12CE0000 0x1000>;
+                interrupts = <0 64 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+        };
+
+        i2c@121D0000 {
+                compatible = "samsung,exynos5-sata-phy-i2c";
+                reg = <0x121D0000 0x100>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+        };
+
         spi_0: spi@12d20000 {
                 compatible = "samsung,exynos4210-spi";
                 reg = <0x12d20000 0x100>;
@@ -186,7 +228,7 @@
                 #size-cells = <0>;
         };
 
-        dwmmc0@12200000 {
+        dwmmc_0: dwmmc0@12200000 {
                 compatible = "samsung,exynos5250-dw-mshc";
                 reg = <0x12200000 0x1000>;
                 interrupts = <0 75 0>;
@@ -194,7 +236,7 @@
                 #size-cells = <0>;
         };
 
-        dwmmc1@12210000 {
+        dwmmc_1: dwmmc1@12210000 {
                 compatible = "samsung,exynos5250-dw-mshc";
                 reg = <0x12210000 0x1000>;
                 interrupts = <0 76 0>;
@@ -202,7 +244,7 @@
                 #size-cells = <0>;
         };
 
-        dwmmc2@12220000 {
+        dwmmc_2: dwmmc2@12220000 {
                 compatible = "samsung,exynos5250-dw-mshc";
                 reg = <0x12220000 0x1000>;
                 interrupts = <0 77 0>;
@@ -210,7 +252,7 @@
                 #size-cells = <0>;
         };
 
-        dwmmc3@12230000 {
+        dwmmc_3: dwmmc3@12230000 {
                 compatible = "samsung,exynos5250-dw-mshc";
                 reg = <0x12230000 0x1000>;
                 interrupts = <0 78 0>;
@@ -520,4 +562,16 @@
                 reg = <0x13e30000 0x1000>;
                 interrupts = <0 88 0>;
         };
+
+        hdmi {
+                compatible = "samsung,exynos5-hdmi";
+                reg = <0x14530000 0x100000>;
+                interrupts = <0 95 0>;
+        };
+
+        mixer {
+                compatible = "samsung,exynos5-mixer";
+                reg = <0x14450000 0x10000>;
+                interrupts = <0 94 0>;
+        };
 };
diff --git a/arch/arm/boot/dts/href.dtsi b/arch/arm/boot/dts/href.dtsi
new file mode 100644
index 000000000000..592fb9dc35bd
--- /dev/null
+++ b/arch/arm/boot/dts/href.dtsi
@@ -0,0 +1,273 @@
+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "dbx5x0.dtsi"
+
+/ {
+        memory {
+                reg = <0x00000000 0x20000000>;
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                button@1 {
+                        linux,code = <11>;
+                        label = "SFH7741 Proximity Sensor";
+                };
+        };
+
+        soc-u9500 {
+                uart@80120000 {
+                        status = "okay";
+                };
+
+                uart@80121000 {
+                        status = "okay";
+                };
+
+                uart@80007000 {
+                        status = "okay";
+                };
+
+                i2c@80004000 {
+                        tc3589x@42 {
+                                compatible = "tc3589x";
+                                reg = <0x42>;
+                                interrupt-parent = <&gpio6>;
+                                interrupts = <25 0x1>;
+
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+
+                                tc3589x_gpio: tc3589x_gpio {
+                                        compatible = "tc3589x-gpio";
+                                        interrupts = <0 0x1>;
+
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                };
+                        };
+                };
+
+                i2c@80128000 {
+                        lp5521@0x33 {
+                                compatible = "lp5521";
+                                reg = <0x33>;
+                        };
+
+                        lp5521@0x34 {
+                                compatible = "lp5521";
+                                reg = <0x34>;
+                        };
+
+                        bh1780@0x29 {
+                                compatible = "rohm,bh1780gli";
+                                reg = <0x33>;
+                        };
+                };
+
+                // External Micro SD slot
+                sdi0_per1@80126000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+                        mmc-cap-sd-highspeed;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
+
+                        cd-gpios  = <&tc3589x_gpio 3 0x4>;
+
+                        status = "okay";
+                };
+
+                // WLAN SDIO channel
+                sdi1_per2@80118000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+
+                        status = "okay";
+                };
+
+                // PoP:ed eMMC
+                sdi2_per3@80005000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+
+                        status = "okay";
+                };
+
+                // On-board eMMC
+                sdi4_per2@80114000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
+
+                        status = "okay";
+                };
+
+                sound {
+                        compatible = "stericsson,snd-soc-mop500";
+
+                        stericsson,cpu-dai = <&msp1 &msp3>;
+                        stericsson,audio-codec = <&codec>;
+                };
+
+                msp1: msp@80124000 {
+                        status = "okay";
+                };
+
+                msp3: msp@80125000 {
+                        status = "okay";
+                };
+
+                prcmu@80157000 {
+                        db8500-prcmu-regulators {
+                                db8500_vape_reg: db8500_vape {
+                                        regulator-name = "db8500-vape";
+                                };
+
+                                db8500_varm_reg: db8500_varm {
+                                        regulator-name = "db8500-varm";
+                                };
+
+                                db8500_vmodem_reg: db8500_vmodem {
+                                        regulator-name = "db8500-vmodem";
+                                };
+
+                                db8500_vpll_reg: db8500_vpll {
+                                        regulator-name = "db8500-vpll";
+                                };
+
+                                db8500_vsmps1_reg: db8500_vsmps1 {
+                                        regulator-name = "db8500-vsmps1";
+                                };
+
+                                db8500_vsmps2_reg: db8500_vsmps2 {
+                                        regulator-name = "db8500-vsmps2";
+                                };
+
+                                db8500_vsmps3_reg: db8500_vsmps3 {
+                                        regulator-name = "db8500-vsmps3";
+                                };
+
+                                db8500_vrf1_reg: db8500_vrf1 {
+                                        regulator-name = "db8500-vrf1";
+                                };
+
+                                db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
+                                        regulator-name = "db8500-sva-mmdsp";
+                                };
+
+                                db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
+                                        regulator-name = "db8500-sva-mmdsp-ret";
+                                };
+
+                                db8500_sva_pipe_reg: db8500_sva_pipe {
+                                        regulator-name = "db8500_sva_pipe";
+                                };
+
+                                db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
+                                        regulator-name = "db8500_sia_mmdsp";
+                                };
+
+                                db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
+                                        regulator-name = "db8500-sia-mmdsp-ret";
+                                };
+
+                                db8500_sia_pipe_reg: db8500_sia_pipe {
+                                        regulator-name = "db8500-sia-pipe";
+                                };
+
+                                db8500_sga_reg: db8500_sga {
+                                        regulator-name = "db8500-sga";
+                                };
+
+                                db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
+                                        regulator-name = "db8500-b2r2-mcde";
+                                };
+
+                                db8500_esram12_reg: db8500_esram12 {
+                                        regulator-name = "db8500-esram12";
+                                };
+
+                                db8500_esram12_ret_reg: db8500_esram12_ret {
+                                        regulator-name = "db8500-esram12-ret";
+                                };
+
+                                db8500_esram34_reg: db8500_esram34 {
+                                        regulator-name = "db8500-esram34";
+                                };
+
+                                db8500_esram34_ret_reg: db8500_esram34_ret {
+                                        regulator-name = "db8500-esram34-ret";
+                                };
+                        };
+
+                        ab8500@5 {
+                                ab8500-regulators {
+                                        ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
+                                                regulator-name = "V-DISPLAY";
+                                        };
+
+                                        ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
+                                                regulator-name = "V-eMMC1";
+                                        };
+
+                                        ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
+                                                regulator-name = "V-MMC-SD";
+                                        };
+
+                                        ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
+                                                regulator-name = "V-INTCORE";
+                                        };
+
+                                        ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
+                                                regulator-name = "V-TVOUT";
+                                        };
+
+                                        ab8500_ldo_usb_reg: ab8500_ldo_usb {
+                                                regulator-name = "dummy";
+                                        };
+
+                                        ab8500_ldo_audio_reg: ab8500_ldo_audio {
+                                                regulator-name = "V-AUD";
+                                        };
+
+                                        ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
+                                                regulator-name = "V-AMIC1";
+                                        };
+
+                                        ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
+                                                regulator-name = "V-AMIC2";
+                                        };
+
+                                        ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
+                                                regulator-name = "V-DMIC";
+                                        };
+
+                                        ab8500_ldo_ana_reg: ab8500_ldo_ana {
+                                                regulator-name = "V-CSI/DSI";
+                                        };
+                                };
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/hrefprev60.dts b/arch/arm/boot/dts/hrefprev60.dts
new file mode 100644
index 000000000000..eec29c4a86dc
--- /dev/null
+++ b/arch/arm/boot/dts/hrefprev60.dts
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "dbx5x0.dtsi"
+/include/ "href.dtsi"
+/include/ "stuib.dtsi"
+
+/ {
+        model = "ST-Ericsson HREF (pre-v60) platform with Device Tree";
+        compatible = "st-ericsson,mop500", "st-ericsson,u8500";
+
+        gpio_keys {
+                button@1 {
+                        gpios = <&tc3589x_gpio 7 0x4>;
+                };
+        };
+
+        soc-u9500 {
+                i2c@80004000 {
+                        tps61052@33 {
+                                compatible = "tps61052";
+                                reg = <0x33>;
+                        };
+                };
+
+                i2c@80110000 {
+                        bu21013_tp@0x5c {
+                                reset-gpio = <&tc3589x_gpio 13 0x4>;
+                        };
+                };
+
+                vmmci: regulator-gpio {
+                        gpios = <&tc3589x_gpio 18 0x4>;
+                        gpio-enable = <&tc3589x_gpio 17 0x4>;
+
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/hrefv60plus.dts b/arch/arm/boot/dts/hrefv60plus.dts
index 2131d77dc9c9..55f4191a626e 100644
--- a/arch/arm/boot/dts/hrefv60plus.dts
+++ b/arch/arm/boot/dts/hrefv60plus.dts
@@ -11,85 +11,200 @@
 
 /dts-v1/;
 /include/ "dbx5x0.dtsi"
+/include/ "href.dtsi"
+/include/ "stuib.dtsi"
 
 / {
-        model = "ST-Ericsson HREF platform with Device Tree";
-        compatible = "st-ericsson,hrefv60+";
+        model = "ST-Ericsson HREF (v60+) platform with Device Tree";
+        compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
 
-        memory {
-                reg = <0x00000000 0x20000000>;
+        gpio_keys {
+                button@1 {
+                        gpios = <&gpio6 25 0x4>;
+                };
         };
 
         soc-u9500 {
-                uart@80120000 {
+                i2c@80110000 {
+                        bu21013_tp@0x5c {
+                                reset-gpio = <&gpio4 15 0x4>;
+                        };
+                };
+
+                // External Micro SD slot
+                sdi0_per1@80126000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+                        mmc-cap-sd-highspeed;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
+
+                        cd-gpios  = <&tc3589x_gpio 3 0x4>;
+
                         status = "okay";
                 };
 
-                uart@80121000 {
+                // WLAN SDIO channel
+                sdi1_per2@80118000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+
                         status = "okay";
                 };
 
-                uart@80007000 {
+                // PoP:ed eMMC
+                sdi2_per3@80005000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+
                         status = "okay";
                 };
 
-                i2c@80004000 {
-                        tc3589x@42 {
-                                compatible = "tc3589x";
-                                reg = <0x42>;
-                                interrupt-parent = <&gpio6>;
-                                interrupts = <25 0x1>;
+                // On-board eMMC
+                sdi4_per2@80114000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
 
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
+                        status = "okay";
+                };
 
-                                tc3589x_gpio: tc3589x_gpio {
-                                        compatible = "tc3589x-gpio";
-                                        interrupts = <0 0x1>;
+                prcmu@80157000 {
+                        db8500-prcmu-regulators {
+                                db8500_vape_reg: db8500_vape {
+                                        regulator-name = "db8500-vape";
+                                };
 
-                                        interrupt-controller;
-                                        #interrupt-cells = <2>;
-                                        gpio-controller;
-                                        #gpio-cells = <2>;
+                                db8500_varm_reg: db8500_varm {
+                                        regulator-name = "db8500-varm";
                                 };
-                        };
 
-                        tps61052@33 {
-                                compatible = "tps61052";
-                                reg = <0x33>;
-                        };
-                };
+                                db8500_vmodem_reg: db8500_vmodem {
+                                        regulator-name = "db8500-vmodem";
+                                };
 
-                i2c@80128000 {
-                        lp5521@0x33 {
-                                compatible = "lp5521";
-                                reg = <0x33>;
-                        };
+                                db8500_vpll_reg: db8500_vpll {
+                                        regulator-name = "db8500-vpll";
+                                };
 
-                        lp5521@0x34 {
-                                compatible = "lp5521";
-                                reg = <0x34>;
-                        };
+                                db8500_vsmps1_reg: db8500_vsmps1 {
+                                        regulator-name = "db8500-vsmps1";
+                                };
+
+                                db8500_vsmps2_reg: db8500_vsmps2 {
+                                        regulator-name = "db8500-vsmps2";
+                                };
+
+                                db8500_vsmps3_reg: db8500_vsmps3 {
+                                        regulator-name = "db8500-vsmps3";
+                                };
+
+                                db8500_vrf1_reg: db8500_vrf1 {
+                                        regulator-name = "db8500-vrf1";
+                                };
+
+                                db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
+                                        regulator-name = "db8500-sva-mmdsp";
+                                };
+
+                                db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
+                                        regulator-name = "db8500-sva-mmdsp-ret";
+                                };
+
+                                db8500_sva_pipe_reg: db8500_sva_pipe {
+                                        regulator-name = "db8500_sva_pipe";
+                                };
 
-                        bh1780@0x29 {
-                                compatible = "rohm,bh1780gli";
-                                reg = <0x33>;
+                                db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
+                                        regulator-name = "db8500_sia_mmdsp";
+                                };
+
+                                db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
+                                        regulator-name = "db8500-sia-mmdsp-ret";
+                                };
+
+                                db8500_sia_pipe_reg: db8500_sia_pipe {
+                                        regulator-name = "db8500-sia-pipe";
+                                };
+
+                                db8500_sga_reg: db8500_sga {
+                                        regulator-name = "db8500-sga";
+                                };
+
+                                db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
+                                        regulator-name = "db8500-b2r2-mcde";
+                                };
+
+                                db8500_esram12_reg: db8500_esram12 {
+                                        regulator-name = "db8500-esram12";
+                                };
+
+                                db8500_esram12_ret_reg: db8500_esram12_ret {
+                                        regulator-name = "db8500-esram12-ret";
+                                };
+
+                                db8500_esram34_reg: db8500_esram34 {
+                                        regulator-name = "db8500-esram34";
+                                };
+
+                                db8500_esram34_ret_reg: db8500_esram34_ret {
+                                        regulator-name = "db8500-esram34-ret";
+                                };
                         };
-                };
 
-                sound {
-                        compatible = "stericsson,snd-soc-mop500";
+                        ab8500@5 {
+                                ab8500-regulators {
+                                        ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
+                                                regulator-name = "V-DISPLAY";
+                                        };
 
-                        stericsson,cpu-dai = <&msp1 &msp3>;
-                        stericsson,audio-codec = <&codec>;
-                };
+                                        ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
+                                                regulator-name = "V-eMMC1";
+                                        };
 
-                msp1: msp@80124000 {
-                        status = "okay";
-                };
+                                        ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
+                                                regulator-name = "V-MMC-SD";
+                                        };
 
-                msp3: msp@80125000 {
-                        status = "okay";
+                                        ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
+                                                regulator-name = "V-INTCORE";
+                                        };
+
+                                        ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
+                                                regulator-name = "V-TVOUT";
+                                        };
+
+                                        ab8500_ldo_usb_reg: ab8500_ldo_usb {
+                                                regulator-name = "dummy";
+                                        };
+
+                                        ab8500_ldo_audio_reg: ab8500_ldo_audio {
+                                                regulator-name = "V-AUD";
+                                        };
+
+                                        ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
+                                                regulator-name = "V-AMIC1";
+                                        };
+
+                                        ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
+                                                regulator-name = "V-AMIC2";
+                                        };
+
+                                        ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
+                                                regulator-name = "V-DMIC";
+                                        };
+
+                                        ab8500_ldo_ana_reg: ab8500_ldo_ana {
+                                                regulator-name = "V-CSI/DSI";
+                                        };
+                                };
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts
index 384d8b66f337..7c43b8e70b9f 100644
--- a/arch/arm/boot/dts/imx23-olinuxino.dts
+++ b/arch/arm/boot/dts/imx23-olinuxino.dts
@@ -40,6 +40,15 @@
                                         reg = <0>;
                                         fsl,pinmux-ids = <
                                                 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                                led_pin_gpio0_17: led_gpio0_17@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
                                                 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
                                         >;
                                         fsl,drive-strength = <0>;
@@ -47,6 +56,15 @@
                                         fsl,pull-up = <0>;
                                 };
                         };
+
+                        ssp1: ssp@80034000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx23-spi";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&spi2_pins_a>;
+                                status = "okay";
+                        };
                 };
 
                 apbx@80040000 {
@@ -91,11 +109,12 @@
 
         leds {
                 compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pin_gpio0_17>;
 
                 user {
                         label = "green";
-                        gpios = <&gpio2 1 0>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio2 1 1>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 6d31aa383460..65415c598a5e 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -279,6 +279,19 @@
                                         fsl,voltage = <1>;
                                         fsl,pull-up = <0>;
                                 };
+
+                                spi2_pins_a: spi2@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
+                                                0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
+                                                0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
+                                                0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
+                                        >;
+                                        fsl,drive-strength = <1>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
                         };
 
                         digctl@8001c000 {
diff --git a/arch/arm/boot/dts/imx25-karo-tx25.dts b/arch/arm/boot/dts/imx25-karo-tx25.dts
new file mode 100644
index 000000000000..d81f8a0b9794
--- /dev/null
+++ b/arch/arm/boot/dts/imx25-karo-tx25.dts
@@ -0,0 +1,44 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx25.dtsi"
+
+/ {
+        model = "Ka-Ro TX25";
+        compatible = "karo,imx25-tx25", "fsl,imx25";
+
+        memory {
+                reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
+        };
+
+        soc {
+                aips@43f00000 {
+                        uart1: serial@43f90000 {
+                                status = "okay";
+                        };
+                };
+
+                spba@50000000 {
+                        fec: ethernet@50038000 {
+                                status = "okay";
+                                phy-mode = "rmii";
+                        };
+                };
+
+                emi@80000000 {
+                        nand@bb000000 {
+                                nand-on-flash-bbt;
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
new file mode 100644
index 000000000000..e1b13ebc96d6
--- /dev/null
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -0,0 +1,515 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        aliases {
+                serial0 = &uart1;
+                serial1 = &uart2;
+                serial2 = &uart3;
+                serial3 = &uart4;
+                serial4 = &uart5;
+                gpio0 = &gpio1;
+                gpio1 = &gpio2;
+                gpio2 = &gpio3;
+                gpio3 = &gpio4;
+                usb0 = &usbotg;
+                usb1 = &usbhost1;
+        };
+
+        asic: asic-interrupt-controller@68000000 {
+                compatible = "fsl,imx25-asic", "fsl,avic";
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                reg = <0x68000000 0x8000000>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                osc {
+                        compatible = "fsl,imx-osc", "fixed-clock";
+                        clock-frequency = <24000000>;
+                };
+        };
+
+        soc {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                interrupt-parent = <&asic>;
+                ranges;
+
+                aips@43f00000 { /* AIPS1 */
+                        compatible = "fsl,aips-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x43f00000 0x100000>;
+                        ranges;
+
+                        i2c1: i2c@43f80000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
+                                reg = <0x43f80000 0x4000>;
+                                clocks = <&clks 48>;
+                                clock-names = "";
+                                interrupts = <3>;
+                                status = "disabled";
+                        };
+
+                        i2c3: i2c@43f84000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
+                                reg = <0x43f84000 0x4000>;
+                                clocks = <&clks 48>;
+                                clock-names = "";
+                                interrupts = <10>;
+                                status = "disabled";
+                        };
+
+                        can1: can@43f88000 {
+                                compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
+                                reg = <0x43f88000 0x4000>;
+                                interrupts = <43>;
+                                clocks = <&clks 75>, <&clks 75>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        can2: can@43f8c000 {
+                                compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
+                                reg = <0x43f8c000 0x4000>;
+                                interrupts = <44>;
+                                clocks = <&clks 76>, <&clks 76>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        uart1: serial@43f90000 {
+                                compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+                                reg = <0x43f90000 0x4000>;
+                                interrupts = <45>;
+                                clocks = <&clks 120>, <&clks 57>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        uart2: serial@43f94000 {
+                                compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+                                reg = <0x43f94000 0x4000>;
+                                interrupts = <32>;
+                                clocks = <&clks 121>, <&clks 57>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        i2c2: i2c@43f98000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
+                                reg = <0x43f98000 0x4000>;
+                                clocks = <&clks 48>;
+                                clock-names = "";
+                                interrupts = <4>;
+                                status = "disabled";
+                        };
+
+                        owire@43f9c000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                reg = <0x43f9c000 0x4000>;
+                                clocks = <&clks 51>;
+                                clock-names = "";
+                                interrupts = <2>;
+                                status = "disabled";
+                        };
+
+                        spi1: cspi@43fa4000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
+                                reg = <0x43fa4000 0x4000>;
+                                clocks = <&clks 62>;
+                                clock-names = "ipg";
+                                interrupts = <14>;
+                                status = "disabled";
+                        };
+
+                        kpp@43fa8000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                reg = <0x43fa8000 0x4000>;
+                                clocks = <&clks 102>;
+                                clock-names = "";
+                                interrupts = <24>;
+                                status = "disabled";
+                        };
+
+                        iomuxc@43fac000{
+                                compatible = "fsl,imx25-iomuxc";
+                                reg = <0x43fac000 0x4000>;
+                        };
+
+                        audmux@43fb0000 {
+                                compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
+                                reg = <0x43fb0000 0x4000>;
+                                status = "disabled";
+                        };
+                };
+
+                spba@50000000 {
+                        compatible = "fsl,spba-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x50000000 0x40000>;
+                        ranges;
+
+                        spi3: cspi@50004000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
+                                reg = <0x50004000 0x4000>;
+                                interrupts = <0>;
+                                clocks = <&clks 80>;
+                                clock-names = "ipg";
+                                status = "disabled";
+                        };
+
+                        uart4: serial@50008000 {
+                                compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+                                reg = <0x50008000 0x4000>;
+                                interrupts = <5>;
+                                clocks = <&clks 123>, <&clks 57>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        uart3: serial@5000c000 {
+                                compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+                                reg = <0x5000c000 0x4000>;
+                                interrupts = <18>;
+                                clocks = <&clks 122>, <&clks 57>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        spi2: cspi@50010000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
+                                reg = <0x50010000 0x4000>;
+                                clocks = <&clks 79>;
+                                clock-names = "ipg";
+                                interrupts = <13>;
+                                status = "disabled";
+                        };
+
+                        ssi2: ssi@50014000 {
+                                compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
+                                reg = <0x50014000 0x4000>;
+                                interrupts = <11>;
+                                status = "disabled";
+                        };
+
+                        esai@50018000 {
+                                reg = <0x50018000 0x4000>;
+                                interrupts = <7>;
+                        };
+
+                        uart5: serial@5002c000 {
+                                compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+                                reg = <0x5002c000 0x4000>;
+                                interrupts = <40>;
+                                clocks = <&clks 124>, <&clks 57>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        tsc: tsc@50030000 {
+                                compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
+                                reg = <0x50030000 0x4000>;
+                                interrupts = <46>;
+                                clocks = <&clks 119>;
+                                clock-names = "ipg";
+                                status = "disabled";
+                        };
+
+                        ssi1: ssi@50034000 {
+                                compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
+                                reg = <0x50034000 0x4000>;
+                                interrupts = <12>;
+                                status = "disabled";
+                        };
+
+                        fec: ethernet@50038000 {
+                                compatible = "fsl,imx25-fec";
+                                reg = <0x50038000 0x4000>;
+                                interrupts = <57>;
+                                clocks = <&clks 88>, <&clks 65>;
+                                clock-names = "ipg", "ahb";
+                                status = "disabled";
+                        };
+                };
+
+                aips@53f00000 { /* AIPS2 */
+                        compatible = "fsl,aips-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x53f00000 0x100000>;
+                        ranges;
+
+                        clks: ccm@53f80000 {
+                                compatible = "fsl,imx25-ccm";
+                                reg = <0x53f80000 0x4000>;
+                                interrupts = <31>;
+                                #clock-cells = <1>;
+                        };
+
+                        gpt4: timer@53f84000 {
+                                compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
+                                reg = <0x53f84000 0x4000>;
+                                clocks = <&clks 9>, <&clks 45>;
+                                clock-names = "ipg", "per";
+                                interrupts = <1>;
+                        };
+
+                        gpt3: timer@53f88000 {
+                                compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
+                                reg = <0x53f88000 0x4000>;
+                                clocks = <&clks 9>, <&clks 47>;
+                                clock-names = "ipg", "per";
+                                interrupts = <29>;
+                        };
+
+                        gpt2: timer@53f8c000 {
+                                compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
+                                reg = <0x53f8c000 0x4000>;
+                                clocks = <&clks 9>, <&clks 47>;
+                                clock-names = "ipg", "per";
+                                interrupts = <53>;
+                        };
+
+                        gpt1: timer@53f90000 {
+                                compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
+                                reg = <0x53f90000 0x4000>;
+                                clocks = <&clks 9>, <&clks 47>;
+                                clock-names = "ipg", "per";
+                                interrupts = <54>;
+                        };
+
+                        epit1: timer@53f94000 {
+                                compatible = "fsl,imx25-epit";
+                                reg = <0x53f94000 0x4000>;
+                                interrupts = <28>;
+                        };
+
+                        epit2: timer@53f98000 {
+                                compatible = "fsl,imx25-epit";
+                                reg = <0x53f98000 0x4000>;
+                                interrupts = <27>;
+                        };
+
+                        gpio4: gpio@53f9c000 {
+                                compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
+                                reg = <0x53f9c000 0x4000>;
+                                interrupts = <23>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
+                        pwm2: pwm@53fa0000 {
+                                compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
+                                #pwm-cells = <2>;
+                                reg = <0x53fa0000 0x4000>;
+                                clocks = <&clks 106>, <&clks 36>;
+                                clock-names = "ipg", "per";
+                                interrupts = <36>;
+                        };
+
+                        gpio3: gpio@53fa4000 {
+                                compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
+                                reg = <0x53fa4000 0x4000>;
+                                interrupts = <16>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
+                        pwm3: pwm@53fa8000 {
+                                compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
+                                #pwm-cells = <2>;
+                                reg = <0x53fa8000 0x4000>;
+                                clocks = <&clks 107>, <&clks 36>;
+                                clock-names = "ipg", "per";
+                                interrupts = <41>;
+                        };
+
+                        esdhc1: esdhc@53fb4000 {
+                                compatible = "fsl,imx25-esdhc";
+                                reg = <0x53fb4000 0x4000>;
+                                interrupts = <9>;
+                                clocks = <&clks 86>, <&clks 63>, <&clks 45>;
+                                clock-names = "ipg", "ahb", "per";
+                                status = "disabled";
+                        };
+
+                        esdhc2: esdhc@53fb8000 {
+                                compatible = "fsl,imx25-esdhc";
+                                reg = <0x53fb8000 0x4000>;
+                                interrupts = <8>;
+                                clocks = <&clks 87>, <&clks 64>, <&clks 46>;
+                                clock-names = "ipg", "ahb", "per";
+                                status = "disabled";
+                        };
+
+                        lcdc@53fbc000 {
+                                reg = <0x53fbc000 0x4000>;
+                                interrupts = <39>;
+                                clocks = <&clks 103>, <&clks 66>, <&clks 49>;
+                                clock-names = "ipg", "ahb", "per";
+                                status = "disabled";
+                        };
+
+                        slcdc@53fc0000 {
+                                reg = <0x53fc0000 0x4000>;
+                                interrupts = <38>;
+                                status = "disabled";
+                        };
+
+                        pwm4: pwm@53fc8000 {
+                                compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
+                                reg = <0x53fc8000 0x4000>;
+                                clocks = <&clks 108>, <&clks 36>;
+                                clock-names = "ipg", "per";
+                                interrupts = <42>;
+                        };
+
+                        gpio1: gpio@53fcc000 {
+                                compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
+                                reg = <0x53fcc000 0x4000>;
+                                interrupts = <52>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
+                        gpio2: gpio@53fd0000 {
+                                compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
+                                reg = <0x53fd0000 0x4000>;
+                                interrupts = <51>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
+                        sdma@53fd4000 {
+                                compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
+                                reg = <0x53fd4000 0x4000>;
+                                clocks = <&clks 112>, <&clks 68>;
+                                clock-names = "ipg", "ahb";
+                                interrupts = <34>;
+                        };
+
+                        wdog@53fdc000 {
+                                compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
+                                reg = <0x53fdc000 0x4000>;
+                                clocks = <&clks 126>;
+                                clock-names = "";
+                                interrupts = <55>;
+                        };
+
+                        pwm1: pwm@53fe0000 {
+                                compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
+                                #pwm-cells = <2>;
+                                reg = <0x53fe0000 0x4000>;
+                                clocks = <&clks 105>, <&clks 36>;
+                                clock-names = "ipg", "per";
+                                interrupts = <26>;
+                        };
+
+                        usbphy1: usbphy@1 {
+                                compatible = "nop-usbphy";
+                                status = "disabled";
+                        };
+
+                        usbphy2: usbphy@2 {
+                                compatible = "nop-usbphy";
+                                status = "disabled";
+                        };
+
+                        usbotg: usb@53ff4000 {
+                                compatible = "fsl,imx25-usb", "fsl,imx27-usb";
+                                reg = <0x53ff4000 0x0200>;
+                                interrupts = <37>;
+                                clocks = <&clks 9>, <&clks 70>, <&clks 8>;
+                                clock-names = "ipg", "ahb", "per";
+                                fsl,usbmisc = <&usbmisc 0>;
+                                status = "disabled";
+                        };
+
+                        usbhost1: usb@53ff4400 {
+                                compatible = "fsl,imx25-usb", "fsl,imx27-usb";
+                                reg = <0x53ff4400 0x0200>;
+                                interrupts = <35>;
+                                clocks = <&clks 9>, <&clks 70>, <&clks 8>;
+                                clock-names = "ipg", "ahb", "per";
+                                fsl,usbmisc = <&usbmisc 1>;
+                                status = "disabled";
+                        };
+
+                        usbmisc: usbmisc@53ff4600 {
+                                #index-cells = <1>;
+                                compatible = "fsl,imx25-usbmisc";
+                                clocks = <&clks 9>, <&clks 70>, <&clks 8>;
+                                clock-names = "ipg", "ahb", "per";
+                                reg = <0x53ff4600 0x00f>;
+                                status = "disabled";
+                        };
+
+                        dryice@53ffc000 {
+                                compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
+                                reg = <0x53ffc000 0x4000>;
+                                clocks = <&clks 81>;
+                                clock-names = "ipg";
+                                interrupts = <25>;
+                        };
+                };
+
+                emi@80000000 {
+                        compatible = "fsl,emi-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x80000000 0x3b002000>;
+                        ranges;
+
+                        nand@bb000000 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+
+                                compatible = "fsl,imx25-nand";
+                                reg = <0xbb000000 0x2000>;
+                                clocks = <&clks 50>;
+                                clock-names = "";
+                                interrupts = <33>;
+                                status = "disabled";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx27-apf27.dts b/arch/arm/boot/dts/imx27-apf27.dts
new file mode 100644
index 000000000000..c0327c054de2
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-apf27.dts
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr>
+ * Copyright 2012 Armadeus Systems <support@armadeus.com>
+ *
+ * Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx27.dtsi"
+
+/ {
+        model = "Armadeus Systems APF27 module";
+        compatible = "armadeus,imx27-apf27", "fsl,imx27";
+
+        memory {
+                reg = <0xa0000000 0x04000000>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                osc26m {
+                        compatible = "fsl,imx-osc26m", "fixed-clock";
+                        clock-frequency = <0>;
+                };
+        };
+
+        soc {
+                aipi@10000000 {
+                        serial@1000a000 {
+                                status = "okay";
+                        };
+
+                        ethernet@1002b000 {
+                                status = "okay";
+                        };
+                };
+
+                nand@d8000000 {
+                        status = "okay";
+                        nand-bus-width = <16>;
+                        nand-ecc-mode = "hw";
+                        nand-on-flash-bbt;
+
+                        partition@0 {
+                                label = "u-boot";
+                                reg = <0x0 0x100000>;
+                        };
+
+                        partition@100000 {
+                                label = "env";
+                                reg = <0x100000 0x80000>;
+                        };
+
+                        partition@180000 {
+                                label = "env2";
+                                reg = <0x180000 0x80000>;
+                        };
+
+                        partition@200000 {
+                                label = "firmware";
+                                reg = <0x200000 0x80000>;
+                        };
+
+                        partition@280000 {
+                                label = "dtb";
+                                reg = <0x280000 0x80000>;
+                        };
+
+                        partition@300000 {
+                                label = "kernel";
+                                reg = <0x300000 0x500000>;
+                        };
+
+                        partition@800000 {
+                                label = "rootfs";
+                                reg = <0x800000 0xf800000>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 67d672792b0d..b8d3905915ac 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -58,7 +58,7 @@
                         reg = <0x10000000 0x10000000>;
                         ranges;
 
-                        wdog@10002000 {
+                        wdog: wdog@10002000 {
                                 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
                                 reg = <0x10002000 0x4000>;
                                 interrupts = <27>;
@@ -218,7 +218,8 @@
                                 status = "disabled";
                         };
                 };
-                nand@d8000000 {
+
+                nfc: nand@d8000000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
 
diff --git a/arch/arm/boot/dts/imx28-apf28.dts b/arch/arm/boot/dts/imx28-apf28.dts
new file mode 100644
index 000000000000..7eb075876c4c
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-apf28.dts
@@ -0,0 +1,85 @@
+/*
+ * Copyright 2012 Armadeus Systems - <support@armadeus.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx28.dtsi"
+
+/ {
+        model = "Armadeus Systems APF28 module";
+        compatible = "armadeus,imx28-apf28", "fsl,imx28";
+
+        memory {
+                reg = <0x40000000 0x08000000>;
+        };
+
+        apb@80000000 {
+                apbh@80000000 {
+                        gpmi-nand@8000c000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
+                                status = "okay";
+
+                                partition@0 {
+                                        label = "u-boot";
+                                        reg = <0x0 0x300000>;
+                                };
+
+                                partition@300000 {
+                                        label = "env";
+                                        reg = <0x300000 0x80000>;
+                                };
+
+                                partition@380000 {
+                                        label = "env2";
+                                        reg = <0x380000 0x80000>;
+                                };
+
+                                partition@400000 {
+                                        label = "dtb";
+                                        reg = <0x400000 0x80000>;
+                                };
+
+                                partition@480000 {
+                                        label = "splash";
+                                        reg = <0x480000 0x80000>;
+                                };
+
+                                partition@500000 {
+                                        label = "kernel";
+                                        reg = <0x500000 0x800000>;
+                                };
+
+                                partition@d00000 {
+                                        label = "rootfs";
+                                        reg = <0xd00000 0xf300000>;
+                                };
+                        };
+                };
+
+                apbx@80040000 {
+                        duart: serial@80074000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&duart_pins_a>;
+                                status = "okay";
+                        };
+                };
+        };
+
+        ahb@80080000 {
+                mac0: ethernet@800f0000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac0_pins_a>;
+                        phy-reset-gpios = <&gpio4 13 0>;
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx28-apf28dev.dts b/arch/arm/boot/dts/imx28-apf28dev.dts
new file mode 100644
index 000000000000..6d8865bfb4b7
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-apf28dev.dts
@@ -0,0 +1,154 @@
+/*
+ * Copyright 2012 Armadeus Systems - <support@armadeus.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/* APF28Dev is a docking board for the APF28 SOM */
+/include/ "imx28-apf28.dts"
+
+/ {
+        model = "Armadeus Systems APF28Dev docking/development board";
+        compatible = "armadeus,imx28-apf28dev", "armadeus,imx28-apf28", "fsl,imx28";
+
+        apb@80000000 {
+                apbh@80000000 {
+                        ssp0: ssp@80010000 {
+                                compatible = "fsl,imx28-mmc";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&mmc0_4bit_pins_a
+                                        &mmc0_cd_cfg &mmc0_sck_cfg>;
+                                bus-width = <4>;
+                                status = "okay";
+                        };
+
+                        ssp2: ssp@80014000 {
+                                compatible = "fsl,imx28-spi";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&spi2_pins_a>;
+                                status = "okay";
+                        };
+
+                        pinctrl@80018000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&hog_pins_apf28dev>;
+
+                                hog_pins_apf28dev: hog@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x1103 /* MX28_PAD_LCD_D16__GPIO_1_16 */
+                                                0x1113 /* MX28_PAD_LCD_D17__GPIO_1_17 */
+                                                0x1123 /* MX28_PAD_LCD_D18__GPIO_1_18 */
+                                                0x1133 /* MX28_PAD_LCD_D19__GPIO_1_19 */
+                                                0x1143 /* MX28_PAD_LCD_D20__GPIO_1_20 */
+                                                0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */
+                                                0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                                lcdif_pins_apf28dev: lcdif-apf28dev@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
+                                                0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
+                                                0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
+                                                0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+                        };
+
+                        lcdif@80030000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&lcdif_16bit_pins_a
+                                                &lcdif_pins_apf28dev>;
+                                status = "okay";
+                        };
+                };
+
+                apbx@80040000 {
+                        lradc@80050000 {
+                                status = "okay";
+                        };
+
+                        i2c0: i2c@80058000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&i2c0_pins_a>;
+                                status = "okay";
+                        };
+
+                        pwm: pwm@80064000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pwm3_pins_a &pwm4_pins_a>;
+                                status = "okay";
+                        };
+
+                        usbphy0: usbphy@8007c000 {
+                                status = "okay";
+                        };
+
+                        usbphy1: usbphy@8007e000 {
+                                status = "okay";
+                        };
+                };
+        };
+
+        ahb@80080000 {
+                usb0: usb@80080000 {
+                        vbus-supply = <&reg_usb0_vbus>;
+                        status = "okay";
+                };
+
+                usb1: usb@80090000 {
+                        status = "okay";
+                };
+
+                mac1: ethernet@800f4000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac1_pins_a>;
+                        phy-reset-gpios = <&gpio0 23 0>;
+                        status = "okay";
+                };
+        };
+
+        regulators {
+                compatible = "simple-bus";
+
+                reg_usb0_vbus: usb0_vbus {
+                        compatible = "regulator-fixed";
+                        regulator-name = "usb0_vbus";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        gpio = <&gpio1 23 1>;
+                };
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                user {
+                        label = "Heartbeat";
+                        gpios = <&gpio0 21 0>;
+                        linux,default-trigger = "heartbeat";
+                };
+        };
+
+        backlight {
+                compatible = "pwm-backlight";
+
+                pwms = <&pwm 3 191000>;
+                brightness-levels = <0 4 8 16 32 64 128 255>;
+                default-brightness-level = <6>;
+        };
+};
diff --git a/arch/arm/boot/dts/imx28-cfa10036.dts b/arch/arm/boot/dts/imx28-cfa10036.dts
index c03a577beca3..1594694532b9 100644
--- a/arch/arm/boot/dts/imx28-cfa10036.dts
+++ b/arch/arm/boot/dts/imx28-cfa10036.dts
@@ -22,6 +22,31 @@
 
         apb@80000000 {
                 apbh@80000000 {
+                        pinctrl@80018000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&hog_pins_cfa10036>;
+
+                                hog_pins_cfa10036: hog-10036@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x2073 /* MX28_PAD_SSP0_D7__GPIO_2_7 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                                led_pins_cfa10036: leds-10036@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x3043 /* MX28_PAD_AUART1_RX__GPIO_3_4 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+                        };
+
                         ssp0: ssp@80010000 {
                                 compatible = "fsl,imx28-mmc";
                                 pinctrl-names = "default";
@@ -33,16 +58,37 @@
                 };
 
                 apbx@80040000 {
+                        pwm: pwm@80064000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pwm4_pins_a>;
+                                status = "okay";
+                        };
+
                         duart: serial@80074000 {
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&duart_pins_b>;
                                 status = "okay";
                         };
+
+                        i2c0: i2c@80058000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&i2c0_pins_b>;
+                                status = "okay";
+
+                                ssd1307: oled@3c {
+                                        compatible = "solomon,ssd1307fb-i2c";
+                                        reg = <0x3c>;
+                                        pwms = <&pwm 4 3000>;
+                                        reset-gpios = <&gpio2 7 0>;
+                                };
+                        };
                 };
         };
 
         leds {
                 compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pins_cfa10036>;
 
                 power {
                         gpios = <&gpio3 4 1>;
diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts
index 05c892e931e3..b222614ac9e0 100644
--- a/arch/arm/boot/dts/imx28-cfa10049.dts
+++ b/arch/arm/boot/dts/imx28-cfa10049.dts
@@ -22,6 +22,22 @@
         apb@80000000 {
                 apbh@80000000 {
                         pinctrl@80018000 {
+                                pinctrl-names = "default", "default";
+                                pinctrl-1 = <&hog_pins_cfa10049>;
+
+                                hog_pins_cfa10049: hog-10049@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
+                                                0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */
+                                                0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */
+                                                0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
                                 spi3_pins_cfa10049: spi3-cfa10049@0 {
                                         reg = <0>;
                                         fsl,pinmux-ids = <
@@ -29,6 +45,7 @@
                                                 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */
                                                 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */
                                                 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */
+                                                0x01b2 /* MX28_PAD_GPMI_CLE__SSP3_D5 */
                                         >;
                                         fsl,drive-strength = <1>;
                                         fsl,voltage = <1>;
@@ -60,6 +77,11 @@
                                         spi-max-frequency = <100000>;
                                 };
 
+                                dac0: dh2228@2 {
+                                        compatible = "rohm,dh2228fv";
+                                        reg = <2>;
+                                        spi-max-frequency = <100000>;
+                                };
                         };
                 };
 
@@ -96,4 +118,15 @@
                         gpio = <&gpio0 7 1>;
                 };
         };
+
+        ahb@80080000 {
+                mac0: ethernet@800f0000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac0_pins_a>;
+                        phy-reset-gpios = <&gpio2 21 0>;
+                        phy-reset-duration = <100>;
+                        status = "okay";
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index a0ad71ca3a44..2da316e04409 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -76,7 +76,6 @@
                                                 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */
                                                 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */
                                                 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
-                                                0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
                                                 0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */
                                                 0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */
                                         >;
@@ -85,6 +84,16 @@
                                         fsl,pull-up = <0>;
                                 };
 
+                                led_pin_gpio3_5: led_gpio3_5@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
                                 gpmi_pins_evk: gpmi-nand-evk@0 {
                                         reg = <0>;
                                         fsl,pinmux-ids = <
@@ -288,6 +297,8 @@
 
         leds {
                 compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pin_gpio3_5>;
 
                 user {
                         label = "Heartbeat";
diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts
new file mode 100644
index 000000000000..e6cde8aa7fff
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-sps1.dts
@@ -0,0 +1,169 @@
+/*
+ * Copyright (C) 2012 Marek Vasut <marex@denx.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx28.dtsi"
+
+/ {
+        model = "SchulerControl GmbH, SC SPS 1";
+        compatible = "schulercontrol,imx28-sps1", "fsl,imx28";
+
+        memory {
+                reg = <0x40000000 0x08000000>;
+        };
+
+        apb@80000000 {
+                apbh@80000000 {
+                        pinctrl@80018000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&hog_pins_a>;
+
+                                hog_pins_a: hog-gpios@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x0003 /* MX28_PAD_GPMI_D00__GPIO_0_0 */
+                                                0x0033 /* MX28_PAD_GPMI_D03__GPIO_0_3 */
+                                                0x0063 /* MX28_PAD_GPMI_D06__GPIO_0_6 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                        };
+
+                        ssp0: ssp@80010000 {
+                                compatible = "fsl,imx28-mmc";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&mmc0_4bit_pins_a>;
+                                bus-width = <4>;
+                                status = "okay";
+                        };
+
+                        ssp2: ssp@80014000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx28-spi";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&spi2_pins_a>;
+                                status = "okay";
+
+                                flash: m25p80@0 {
+                                        #address-cells = <1>;
+                                        #size-cells = <1>;
+                                        compatible = "everspin,mr25h256", "mr25h256";
+                                        spi-max-frequency = <40000000>;
+                                        reg = <0>;
+                                };
+                        };
+                };
+
+                apbx@80040000 {
+                        i2c0: i2c@80058000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&i2c0_pins_a>;
+                                clock-frequency = <400000>;
+                                status = "okay";
+
+                                rtc: rtc@51 {
+                                        compatible = "nxp,pcf8563";
+                                        reg = <0x51>;
+                                };
+
+                                eeprom: eeprom@52 {
+                                        compatible = "atmel,24c64";
+                                        reg = <0x52>;
+                                        pagesize = <32>;
+                                };
+                        };
+
+                        duart: serial@80074000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&duart_pins_a>;
+                                status = "okay";
+                        };
+
+                        usbphy0: usbphy@8007c000 {
+                                status = "okay";
+                        };
+
+                        auart0: serial@8006a000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&auart0_pins_a>;
+                                status = "okay";
+                        };
+                };
+        };
+
+        ahb@80080000 {
+                usb0: usb@80080000 {
+                        vbus-supply = <&reg_usb0_vbus>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&usbphy0_pins_b>;
+                        status = "okay";
+                };
+
+                mac0: ethernet@800f0000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac0_pins_a>;
+                        status = "okay";
+                };
+
+                mac1: ethernet@800f4000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac1_pins_a>;
+                        status = "okay";
+                };
+        };
+
+        regulators {
+                compatible = "simple-bus";
+
+                reg_usb0_vbus: usb0_vbus {
+                        compatible = "regulator-fixed";
+                        regulator-name = "usb0_vbus";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        gpio = <&gpio3 9 0>;
+                };
+        };
+
+        leds {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "gpio-leds";
+                status = "okay";
+
+                led@1 {
+                        label = "sps1-1:yellow:user";
+                        gpios = <&gpio0 6 0>;
+                        linux,default-trigger = "heartbeat";
+                        reg = <0>;
+                };
+
+                led@2 {
+                        label = "sps1-2:red:user";
+                        gpios = <&gpio0 3 0>;
+                        linux,default-trigger = "heartbeat";
+                        reg = <1>;
+                };
+
+                led@3 {
+                        label = "sps1-3:red:user";
+                        gpios = <&gpio0 0 0>;
+                        default-trigger = "heartbeat";
+                        reg = <2>;
+                };
+
+        };
+};
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index b4587b27ae42..13b7053d799e 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -492,6 +492,16 @@
                                         fsl,pull-up = <0>;
                                 };
 
+                                pwm3_pins_a: pwm3@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x31c0 /* MX28_PAD_PWM3__PWM_3 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
                                 pwm4_pins_a: pwm4@0 {
                                         reg = <0>;
                                         fsl,pinmux-ids = <
@@ -535,6 +545,31 @@
                                         fsl,pull-up = <0>;
                                 };
 
+                                lcdif_16bit_pins_a: lcdif-16bit@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
+                                                0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
+                                                0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
+                                                0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
+                                                0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
+                                                0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
+                                                0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
+                                                0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
+                                                0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
+                                                0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
+                                                0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
+                                                0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
+                                                0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
+                                                0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
+                                                0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
+                                                0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
                                 can0_pins_a: can0@0 {
                                         reg = <0>;
                                         fsl,pinmux-ids = <
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 2781e47cff0d..1f5d45eff45e 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -83,7 +83,7 @@
                                 reg = <0x70000000 0x40000>;
                                 ranges;
 
-                                esdhc@70004000 { /* ESDHC1 */
+                                esdhc1: esdhc@70004000 {
                                         compatible = "fsl,imx51-esdhc";
                                         reg = <0x70004000 0x4000>;
                                         interrupts = <1>;
@@ -92,12 +92,13 @@
                                         status = "disabled";
                                 };
 
-                                esdhc@70008000 { /* ESDHC2 */
+                                esdhc2: esdhc@70008000 {
                                         compatible = "fsl,imx51-esdhc";
                                         reg = <0x70008000 0x4000>;
                                         interrupts = <2>;
                                         clocks = <&clks 45>, <&clks 0>, <&clks 72>;
                                         clock-names = "ipg", "ahb", "per";
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
 
@@ -110,7 +111,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@70010000 { /* ECSPI1 */
+                                ecspi1: ecspi@70010000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx51-ecspi";
@@ -131,47 +132,49 @@
                                         status = "disabled";
                                 };
 
-                                esdhc@70020000 { /* ESDHC3 */
+                                esdhc3: esdhc@70020000 {
                                         compatible = "fsl,imx51-esdhc";
                                         reg = <0x70020000 0x4000>;
                                         interrupts = <3>;
                                         clocks = <&clks 46>, <&clks 0>, <&clks 73>;
                                         clock-names = "ipg", "ahb", "per";
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
 
-                                esdhc@70024000 { /* ESDHC4 */
+                                esdhc4: esdhc@70024000 {
                                         compatible = "fsl,imx51-esdhc";
                                         reg = <0x70024000 0x4000>;
                                         interrupts = <4>;
                                         clocks = <&clks 47>, <&clks 0>, <&clks 74>;
                                         clock-names = "ipg", "ahb", "per";
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
                         };
 
-                        usb@73f80000 {
+                        usbotg: usb@73f80000 {
                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                 reg = <0x73f80000 0x0200>;
                                 interrupts = <18>;
                                 status = "disabled";
                         };
 
-                        usb@73f80200 {
+                        usbh1: usb@73f80200 {
                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                 reg = <0x73f80200 0x0200>;
                                 interrupts = <14>;
                                 status = "disabled";
                         };
 
-                        usb@73f80400 {
+                        usbh2: usb@73f80400 {
                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                 reg = <0x73f80400 0x0200>;
                                 interrupts = <16>;
                                 status = "disabled";
                         };
 
-                        usb@73f80600 {
+                        usbh3: usb@73f80600 {
                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                 reg = <0x73f80600 0x0200>;
                                 interrupts = <17>;
@@ -218,14 +221,14 @@
                                 #interrupt-cells = <2>;
                         };
 
-                        wdog@73f98000 { /* WDOG1 */
+                        wdog1: wdog@73f98000 {
                                 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
                                 reg = <0x73f98000 0x4000>;
                                 interrupts = <58>;
                                 clocks = <&clks 0>;
                         };
 
-                        wdog@73f9c000 { /* WDOG2 */
+                        wdog2: wdog@73f9c000 {
                                 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
                                 reg = <0x73f9c000 0x4000>;
                                 interrupts = <59>;
@@ -233,7 +236,7 @@
                                 status = "disabled";
                         };
 
-                        iomuxc@73fa8000 {
+                        iomuxc: iomuxc@73fa8000 {
                                 compatible = "fsl,imx51-iomuxc";
                                 reg = <0x73fa8000 0x4000>;
 
@@ -460,7 +463,7 @@
                         reg = <0x80000000 0x10000000>;
                         ranges;
 
-                        ecspi@83fac000 { /* ECSPI2 */
+                        ecspi2: ecspi@83fac000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx51-ecspi";
@@ -471,7 +474,7 @@
                                 status = "disabled";
                         };
 
-                        sdma@83fb0000 {
+                        sdma: sdma@83fb0000 {
                                 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
                                 reg = <0x83fb0000 0x4000>;
                                 interrupts = <6>;
@@ -480,7 +483,7 @@
                                 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
                         };
 
-                        cspi@83fc0000 {
+                        cspi: cspi@83fc0000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
@@ -491,7 +494,7 @@
                                 status = "disabled";
                         };
 
-                        i2c@83fc4000 { /* I2C2 */
+                        i2c2: i2c@83fc4000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
@@ -501,7 +504,7 @@
                                 status = "disabled";
                         };
 
-                        i2c@83fc8000 { /* I2C1 */
+                        i2c1: i2c@83fc8000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
@@ -521,13 +524,13 @@
                                 status = "disabled";
                         };
 
-                        audmux@83fd0000 {
+                        audmux: audmux@83fd0000 {
                                 compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";
                                 reg = <0x83fd0000 0x4000>;
                                 status = "disabled";
                         };
 
-                        nand@83fdb000 {
+                        nfc: nand@83fdb000 {
                                 compatible = "fsl,imx51-nand";
                                 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
                                 interrupts = <8>;
@@ -545,7 +548,7 @@
                                 status = "disabled";
                         };
 
-                        ethernet@83fec000 {
+                        fec: ethernet@83fec000 {
                                 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
                                 reg = <0x83fec000 0x4000>;
                                 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index 08948af86d1a..b0075537195b 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -60,10 +60,17 @@
                                                         697  0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
                                                         701  0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
                                                         868  0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
+                                                        1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */
+                                                >;
+                                        };
+
+                                        led_pin_gpio7_7: led_gpio7_7@0 {
+                                                fsl,pins = <
                                                         873  0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
                                                 >;
                                         };
                                 };
+
                         };
 
                         uart1: serial@53fbc000 {
@@ -100,76 +107,93 @@
                                 pmic: dialog@48 {
                                         compatible = "dlg,da9053-aa", "dlg,da9052";
                                         reg = <0x48>;
+                                        interrupt-parent = <&gpio7>;
+                                        interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */
 
                                         regulators {
-                                                buck0 {
+                                                buck1_reg: buck1 {
                                                         regulator-min-microvolt = <500000>;
                                                         regulator-max-microvolt = <2075000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                buck1 {
+                                                buck2_reg: buck2 {
                                                         regulator-min-microvolt = <500000>;
                                                         regulator-max-microvolt = <2075000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                buck2 {
+                                                buck3_reg: buck3 {
                                                         regulator-min-microvolt = <925000>;
                                                         regulator-max-microvolt = <2500000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                buck3 {
+                                                buck4_reg: buck4 {
                                                         regulator-min-microvolt = <925000>;
                                                         regulator-max-microvolt = <2500000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo4 {
+                                                ldo1_reg: ldo1 {
                                                         regulator-min-microvolt = <600000>;
                                                         regulator-max-microvolt = <1800000>;
+                                                        regulator-boot-on;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo5 {
+                                                ldo2_reg: ldo2 {
+                                                        regulator-min-microvolt = <600000>;
+                                                        regulator-max-microvolt = <1800000>;
+                                                        regulator-always-on;
+                                                };
+
+                                                ldo3_reg: ldo3 {
                                                         regulator-min-microvolt = <600000>;
                                                         regulator-max-microvolt = <1800000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo6 {
+                                                ldo4_reg: ldo4 {
                                                         regulator-min-microvolt = <1725000>;
                                                         regulator-max-microvolt = <3300000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo7 {
+                                                ldo5_reg: ldo5 {
                                                         regulator-min-microvolt = <1725000>;
                                                         regulator-max-microvolt = <3300000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo8 {
+                                                ldo6_reg: ldo6 {
                                                         regulator-min-microvolt = <1200000>;
                                                         regulator-max-microvolt = <3600000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo9 {
+                                                ldo7_reg: ldo7 {
                                                         regulator-min-microvolt = <1200000>;
                                                         regulator-max-microvolt = <3600000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo10 {
+                                                ldo8_reg: ldo8 {
                                                         regulator-min-microvolt = <1200000>;
                                                         regulator-max-microvolt = <3600000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo11 {
+                                                ldo9_reg: ldo9 {
                                                         regulator-min-microvolt = <1200000>;
                                                         regulator-max-microvolt = <3600000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo12 {
+                                                ldo10_reg: ldo10 {
                                                         regulator-min-microvolt = <1250000>;
                                                         regulator-max-microvolt = <3650000>;
-                                                };
-
-                                                ldo13 {
-                                                        regulator-min-microvolt = <1200000>;
-                                                        regulator-max-microvolt = <3600000>;
+                                                        regulator-always-on;
                                                 };
                                         };
                                 };
@@ -216,6 +240,8 @@
 
         leds {
                 compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pin_gpio7_7>;
 
                 user {
                         label = "Heartbeat";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index da9a047ce4cf..552aed4ff982 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -88,21 +88,23 @@
                                 reg = <0x50000000 0x40000>;
                                 ranges;
 
-                                esdhc@50004000 { /* ESDHC1 */
+                                esdhc1: esdhc@50004000 {
                                         compatible = "fsl,imx53-esdhc";
                                         reg = <0x50004000 0x4000>;
                                         interrupts = <1>;
                                         clocks = <&clks 44>, <&clks 0>, <&clks 71>;
                                         clock-names = "ipg", "ahb", "per";
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
 
-                                esdhc@50008000 { /* ESDHC2 */
+                                esdhc2: esdhc@50008000 {
                                         compatible = "fsl,imx53-esdhc";
                                         reg = <0x50008000 0x4000>;
                                         interrupts = <2>;
                                         clocks = <&clks 45>, <&clks 0>, <&clks 72>;
                                         clock-names = "ipg", "ahb", "per";
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
 
@@ -115,7 +117,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@50010000 { /* ECSPI1 */
+                                ecspi1: ecspi@50010000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
@@ -136,47 +138,49 @@
                                         status = "disabled";
                                 };
 
-                                esdhc@50020000 { /* ESDHC3 */
+                                esdhc3: esdhc@50020000 {
                                         compatible = "fsl,imx53-esdhc";
                                         reg = <0x50020000 0x4000>;
                                         interrupts = <3>;
                                         clocks = <&clks 46>, <&clks 0>, <&clks 73>;
                                         clock-names = "ipg", "ahb", "per";
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
 
-                                esdhc@50024000 { /* ESDHC4 */
+                                esdhc4: esdhc@50024000 {
                                         compatible = "fsl,imx53-esdhc";
                                         reg = <0x50024000 0x4000>;
                                         interrupts = <4>;
                                         clocks = <&clks 47>, <&clks 0>, <&clks 74>;
                                         clock-names = "ipg", "ahb", "per";
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
                         };
 
-                        usb@53f80000 {
+                        usbotg: usb@53f80000 {
                                 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
                                 reg = <0x53f80000 0x0200>;
                                 interrupts = <18>;
                                 status = "disabled";
                         };
 
-                        usb@53f80200 {
+                        usbh1: usb@53f80200 {
                                 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
                                 reg = <0x53f80200 0x0200>;
                                 interrupts = <14>;
                                 status = "disabled";
                         };
 
-                        usb@53f80400 {
+                        usbh2: usb@53f80400 {
                                 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
                                 reg = <0x53f80400 0x0200>;
                                 interrupts = <16>;
                                 status = "disabled";
                         };
 
-                        usb@53f80600 {
+                        usbh3: usb@53f80600 {
                                 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
                                 reg = <0x53f80600 0x0200>;
                                 interrupts = <17>;
@@ -223,14 +227,14 @@
                                 #interrupt-cells = <2>;
                         };
 
-                        wdog@53f98000 { /* WDOG1 */
+                        wdog1: wdog@53f98000 {
                                 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
                                 reg = <0x53f98000 0x4000>;
                                 interrupts = <58>;
                                 clocks = <&clks 0>;
                         };
 
-                        wdog@53f9c000 { /* WDOG2 */
+                        wdog2: wdog@53f9c000 {
                                 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
                                 reg = <0x53f9c000 0x4000>;
                                 interrupts = <59>;
@@ -238,7 +242,7 @@
                                 status = "disabled";
                         };
 
-                        iomuxc@53fa8000 {
+                        iomuxc: iomuxc@53fa8000 {
                                 compatible = "fsl,imx53-iomuxc";
                                 reg = <0x53fa8000 0x4000>;
 
@@ -338,6 +342,24 @@
                                         };
                                 };
 
+                                can1 {
+                                        pinctrl_can1_1: can1grp-1 {
+                                                fsl,pins = <
+                                                        847 0x80000000  /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */
+                                                        853 0x80000000  /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */
+                                                >;
+                                        };
+                                };
+
+                                can2 {
+                                        pinctrl_can2_1: can2grp-1 {
+                                                fsl,pins = <
+                                                        67  0x80000000  /* MX53_PAD_KEY_COL4__CAN2_TXCAN */
+                                                        74  0x80000000  /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */
+                                                >;
+                                        };
+                                };
+
                                 i2c1 {
                                         pinctrl_i2c1_1: i2c1grp-1 {
                                                 fsl,pins = <
@@ -356,6 +378,15 @@
                                         };
                                 };
 
+                                i2c3 {
+                                        pinctrl_i2c3_1: i2c3grp-1 {
+                                                fsl,pins = <
+                                                        1102 0xc0000000 /* MX53_PAD_GPIO_6__I2C3_SDA */
+                                                        1130 0xc0000000 /* MX53_PAD_GPIO_5__I2C3_SCL */
+                                                >;
+                                        };
+                                };
+
                                 uart1 {
                                         pinctrl_uart1_1: uart1grp-1 {
                                                 fsl,pins = <
@@ -391,6 +422,25 @@
                                                 >;
                                         };
                                 };
+
+                                uart4 {
+                                        pinctrl_uart4_1: uart4grp-1 {
+                                                fsl,pins = <
+                                                        11 0x1c5        /* MX53_PAD_KEY_COL0__UART4_TXD_MUX */
+                                                        18 0x1c5        /* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */
+                                                >;
+                                        };
+                                };
+
+                                uart5 {
+                                        pinctrl_uart5_1: uart5grp-1 {
+                                                fsl,pins = <
+                                                        24 0x1c5        /* MX53_PAD_KEY_COL1__UART5_TXD_MUX */
+                                                        31 0x1c5        /* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */
+                                                >;
+                                        };
+                                };
+
                         };
 
                         pwm1: pwm@53fb4000 {
@@ -484,7 +534,7 @@
                                 #interrupt-cells = <2>;
                         };
 
-                        i2c@53fec000 { /* I2C3 */
+                        i2c3: i2c@53fec000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
@@ -520,7 +570,7 @@
                                 status = "disabled";
                         };
 
-                        ecspi@63fac000 { /* ECSPI2 */
+                        ecspi2: ecspi@63fac000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
@@ -531,7 +581,7 @@
                                 status = "disabled";
                         };
 
-                        sdma@63fb0000 {
+                        sdma: sdma@63fb0000 {
                                 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
                                 reg = <0x63fb0000 0x4000>;
                                 interrupts = <6>;
@@ -540,7 +590,7 @@
                                 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
                         };
 
-                        cspi@63fc0000 {
+                        cspi: cspi@63fc0000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
@@ -551,7 +601,7 @@
                                 status = "disabled";
                         };
 
-                        i2c@63fc4000 { /* I2C2 */
+                        i2c2: i2c@63fc4000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
@@ -561,7 +611,7 @@
                                 status = "disabled";
                         };
 
-                        i2c@63fc8000 { /* I2C1 */
+                        i2c1: i2c@63fc8000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
@@ -581,13 +631,13 @@
                                 status = "disabled";
                         };
 
-                        audmux@63fd0000 {
+                        audmux: audmux@63fd0000 {
                                 compatible = "fsl,imx53-audmux", "fsl,imx31-audmux";
                                 reg = <0x63fd0000 0x4000>;
                                 status = "disabled";
                         };
 
-                        nand@63fdb000 {
+                        nfc: nand@63fdb000 {
                                 compatible = "fsl,imx53-nand";
                                 reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>;
                                 interrupts = <8>;
@@ -605,7 +655,7 @@
                                 status = "disabled";
                         };
 
-                        ethernet@63fec000 {
+                        fec: ethernet@63fec000 {
                                 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
                                 reg = <0x63fec000 0x4000>;
                                 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts
new file mode 100644
index 000000000000..826e4ad1477e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx6q.dtsi"
+
+/ {
+        model = "Freescale i.MX6 Quad SABRE Automotive Board";
+        compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
+
+        memory {
+                reg = <0x10000000 0x80000000>;
+        };
+
+        soc {
+                aips-bus@02000000 { /* AIPS1 */
+                        iomuxc@020e0000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_hog>;
+
+                                hog {
+                                        pinctrl_hog: hoggrp {
+                                                fsl,pins = <
+                                                        1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */
+                                                        13   0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */
+                                                >;
+                                        };
+                                };
+                        };
+                };
+
+                aips-bus@02100000 { /* AIPS2 */
+                        uart4: serial@021f0000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_uart4_1>;
+                                status = "okay";
+                        };
+
+                        ethernet@02188000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_enet_2>;
+                                phy-mode = "rgmii";
+                                status = "okay";
+                        };
+
+                        usdhc@02198000 { /* uSDHC3 */
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usdhc3_1>;
+                                cd-gpios = <&gpio6 15 0>;
+                                wp-gpios = <&gpio1 13 0>;
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index e596c28c214d..a42402562b7b 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -38,6 +38,8 @@
                                 hog {
                                         pinctrl_hog: hoggrp {
                                                 fsl,pins = <
+                                                        1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */
+                                                        1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */
                                                         1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */
                                                         1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */
                                                         1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */
@@ -73,4 +75,20 @@
                         };
                 };
         };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+
+                volume-up {
+                        label = "Volume Up";
+                        gpios = <&gpio1 4 0>;
+                        linux,code = <115>; /* KEY_VOLUMEUP */
+                };
+
+                volume-down {
+                        label = "Volume Down";
+                        gpios = <&gpio1 5 0>;
+                        linux,code = <114>; /* KEY_VOLUMEDOWN */
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index cce1d874c7a5..d6265ca97119 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -36,6 +36,14 @@
                         compatible = "arm,cortex-a9";
                         reg = <0>;
                         next-level-cache = <&L2>;
+                        operating-points = <
+                                /* kHz    uV */
+                                792000  1100000
+                                396000  950000
+                                198000  850000
+                        >;
+                        clock-latency = <61036>; /* two CLK32 periods */
+                        cpu0-supply = <&reg_cpu>;
                 };
 
                 cpu@1 {
@@ -100,7 +108,7 @@
                         clocks = <&clks 106>;
                 };
 
-                gpmi-nand@00112000 {
+                nfc: gpmi-nand@00112000 {
                         compatible = "fsl,imx6q-gpmi-nand";
                         #address-cells = <1>;
                         #size-cells = <1>;
@@ -144,12 +152,12 @@
                                 reg = <0x02000000 0x40000>;
                                 ranges;
 
-                                spdif@02004000 {
+                                spdif: spdif@02004000 {
                                         reg = <0x02004000 0x4000>;
                                         interrupts = <0 52 0x04>;
                                 };
 
-                                ecspi@02008000 { /* eCSPI1 */
+                                ecspi1: ecspi@02008000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -160,7 +168,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@0200c000 { /* eCSPI2 */
+                                ecspi2: ecspi@0200c000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -171,7 +179,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@02010000 { /* eCSPI3 */
+                                ecspi3: ecspi@02010000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -182,7 +190,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@02014000 { /* eCSPI4 */
+                                ecspi4: ecspi@02014000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -193,7 +201,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@02018000 { /* eCSPI5 */
+                                ecspi5: ecspi@02018000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -213,7 +221,7 @@
                                         status = "disabled";
                                 };
 
-                                esai@02024000 {
+                                esai: esai@02024000 {
                                         reg = <0x02024000 0x4000>;
                                         interrupts = <0 51 0x04>;
                                 };
@@ -248,7 +256,7 @@
                                         status = "disabled";
                                 };
 
-                                asrc@02034000 {
+                                asrc: asrc@02034000 {
                                         reg = <0x02034000 0x4000>;
                                         interrupts = <0 50 0x04>;
                                 };
@@ -258,7 +266,7 @@
                                 };
                         };
 
-                        vpu@02040000 {
+                        vpu: vpu@02040000 {
                                 reg = <0x02040000 0x3c000>;
                                 interrupts = <0 3 0x04 0 12 0x04>;
                         };
@@ -267,7 +275,7 @@
                                 reg = <0x0207c000 0x4000>;
                         };
 
-                        pwm@02080000 { /* PWM1 */
+                        pwm1: pwm@02080000 {
                                 #pwm-cells = <2>;
                                 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                 reg = <0x02080000 0x4000>;
@@ -276,7 +284,7 @@
                                 clock-names = "ipg", "per";
                         };
 
-                        pwm@02084000 { /* PWM2 */
+                        pwm2: pwm@02084000 {
                                 #pwm-cells = <2>;
                                 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                 reg = <0x02084000 0x4000>;
@@ -285,7 +293,7 @@
                                 clock-names = "ipg", "per";
                         };
 
-                        pwm@02088000 { /* PWM3 */
+                        pwm3: pwm@02088000 {
                                 #pwm-cells = <2>;
                                 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                 reg = <0x02088000 0x4000>;
@@ -294,7 +302,7 @@
                                 clock-names = "ipg", "per";
                         };
 
-                        pwm@0208c000 { /* PWM4 */
+                        pwm4: pwm@0208c000 {
                                 #pwm-cells = <2>;
                                 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                 reg = <0x0208c000 0x4000>;
@@ -303,17 +311,17 @@
                                 clock-names = "ipg", "per";
                         };
 
-                        flexcan@02090000 { /* CAN1 */
+                        can1: flexcan@02090000 {
                                 reg = <0x02090000 0x4000>;
                                 interrupts = <0 110 0x04>;
                         };
 
-                        flexcan@02094000 { /* CAN2 */
+                        can2: flexcan@02094000 {
                                 reg = <0x02094000 0x4000>;
                                 interrupts = <0 111 0x04>;
                         };
 
-                        gpt@02098000 {
+                        gpt: gpt@02098000 {
                                 compatible = "fsl,imx6q-gpt";
                                 reg = <0x02098000 0x4000>;
                                 interrupts = <0 55 0x04>;
@@ -389,19 +397,19 @@
                                 #interrupt-cells = <2>;
                         };
 
-                        kpp@020b8000 {
+                        kpp: kpp@020b8000 {
                                 reg = <0x020b8000 0x4000>;
                                 interrupts = <0 82 0x04>;
                         };
 
-                        wdog@020bc000 { /* WDOG1 */
+                        wdog1: wdog@020bc000 {
                                 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
                                 reg = <0x020bc000 0x4000>;
                                 interrupts = <0 80 0x04>;
                                 clocks = <&clks 0>;
                         };
 
-                        wdog@020c0000 { /* WDOG2 */
+                        wdog2: wdog@020c0000 {
                                 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
                                 reg = <0x020c0000 0x4000>;
                                 interrupts = <0 81 0x04>;
@@ -463,7 +471,7 @@
                                         anatop-max-voltage = <2750000>;
                                 };
 
-                                regulator-vddcore@140 {
+                                reg_cpu: regulator-vddcore@140 {
                                         compatible = "fsl,anatop-regulator";
                                         regulator-name = "cpu";
                                         regulator-min-microvolt = <725000>;
@@ -521,27 +529,35 @@
                         };
 
                         snvs@020cc000 {
-                                reg = <0x020cc000 0x4000>;
-                                interrupts = <0 19 0x04 0 20 0x04>;
+                                compatible = "fsl,sec-v4.0-mon", "simple-bus";
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                ranges = <0 0x020cc000 0x4000>;
+
+                                snvs-rtc-lp@34 {
+                                        compatible = "fsl,sec-v4.0-mon-rtc-lp";
+                                        reg = <0x34 0x58>;
+                                        interrupts = <0 19 0x04 0 20 0x04>;
+                                };
                         };
 
-                        epit@020d0000 { /* EPIT1 */
+                        epit1: epit@020d0000 { /* EPIT1 */
                                 reg = <0x020d0000 0x4000>;
                                 interrupts = <0 56 0x04>;
                         };
 
-                        epit@020d4000 { /* EPIT2 */
+                        epit2: epit@020d4000 { /* EPIT2 */
                                 reg = <0x020d4000 0x4000>;
                                 interrupts = <0 57 0x04>;
                         };
 
-                        src@020d8000 {
+                        src: src@020d8000 {
                                 compatible = "fsl,imx6q-src";
                                 reg = <0x020d8000 0x4000>;
                                 interrupts = <0 91 0x04 0 96 0x04>;
                         };
 
-                        gpc@020dc000 {
+                        gpc: gpc@020dc000 {
                                 compatible = "fsl,imx6q-gpc";
                                 reg = <0x020dc000 0x4000>;
                                 interrupts = <0 89 0x04 0 90 0x04>;
@@ -552,7 +568,7 @@
                                 reg = <0x020e0000 0x38>;
                         };
 
-                        iomuxc@020e0000 {
+                        iomuxc: iomuxc@020e0000 {
                                 compatible = "fsl,imx6q-iomuxc";
                                 reg = <0x020e0000 0x4000>;
 
@@ -765,17 +781,17 @@
                                 };
                         };
 
-                        dcic@020e4000 { /* DCIC1 */
+                        dcic1: dcic@020e4000 {
                                 reg = <0x020e4000 0x4000>;
                                 interrupts = <0 124 0x04>;
                         };
 
-                        dcic@020e8000 { /* DCIC2 */
+                        dcic2: dcic@020e8000 {
                                 reg = <0x020e8000 0x4000>;
                                 interrupts = <0 125 0x04>;
                         };
 
-                        sdma@020ec000 {
+                        sdma: sdma@020ec000 {
                                 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
                                 reg = <0x020ec000 0x4000>;
                                 interrupts = <0 2 0x04>;
@@ -801,7 +817,7 @@
                                 reg = <0x0217c000 0x4000>;
                         };
 
-                        usb@02184000 { /* USB OTG */
+                        usbotg: usb@02184000 {
                                 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                                 reg = <0x02184000 0x200>;
                                 interrupts = <0 43 0x04>;
@@ -811,7 +827,7 @@
                                 status = "disabled";
                         };
 
-                        usb@02184200 { /* USB1 */
+                        usbh1: usb@02184200 {
                                 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                                 reg = <0x02184200 0x200>;
                                 interrupts = <0 40 0x04>;
@@ -821,7 +837,7 @@
                                 status = "disabled";
                         };
 
-                        usb@02184400 { /* USB2 */
+                        usbh2: usb@02184400 {
                                 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                                 reg = <0x02184400 0x200>;
                                 interrupts = <0 41 0x04>;
@@ -830,7 +846,7 @@
                                 status = "disabled";
                         };
 
-                        usb@02184600 { /* USB3 */
+                        usbh3: usb@02184600 {
                                 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                                 reg = <0x02184600 0x200>;
                                 interrupts = <0 42 0x04>;
@@ -839,14 +855,14 @@
                                 status = "disabled";
                         };
 
-                        usbmisc: usbmisc@02184800 {
+                        usbmisc: usbmisc: usbmisc@02184800 {
                                 #index-cells = <1>;
                                 compatible = "fsl,imx6q-usbmisc";
                                 reg = <0x02184800 0x200>;
                                 clocks = <&clks 162>;
                         };
 
-                        ethernet@02188000 {
+                        fec: ethernet@02188000 {
                                 compatible = "fsl,imx6q-fec";
                                 reg = <0x02188000 0x4000>;
                                 interrupts = <0 118 0x04 0 119 0x04>;
@@ -860,43 +876,47 @@
                                 interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
                         };
 
-                        usdhc@02190000 { /* uSDHC1 */
+                        usdhc1: usdhc@02190000 {
                                 compatible = "fsl,imx6q-usdhc";
                                 reg = <0x02190000 0x4000>;
                                 interrupts = <0 22 0x04>;
                                 clocks = <&clks 163>, <&clks 163>, <&clks 163>;
                                 clock-names = "ipg", "ahb", "per";
+                                bus-width = <4>;
                                 status = "disabled";
                         };
 
-                        usdhc@02194000 { /* uSDHC2 */
+                        usdhc2: usdhc@02194000 {
                                 compatible = "fsl,imx6q-usdhc";
                                 reg = <0x02194000 0x4000>;
                                 interrupts = <0 23 0x04>;
                                 clocks = <&clks 164>, <&clks 164>, <&clks 164>;
                                 clock-names = "ipg", "ahb", "per";
+                                bus-width = <4>;
                                 status = "disabled";
                         };
 
-                        usdhc@02198000 { /* uSDHC3 */
+                        usdhc3: usdhc@02198000 {
                                 compatible = "fsl,imx6q-usdhc";
                                 reg = <0x02198000 0x4000>;
                                 interrupts = <0 24 0x04>;
                                 clocks = <&clks 165>, <&clks 165>, <&clks 165>;
                                 clock-names = "ipg", "ahb", "per";
+                                bus-width = <4>;
                                 status = "disabled";
                         };
 
-                        usdhc@0219c000 { /* uSDHC4 */
+                        usdhc4: usdhc@0219c000 {
                                 compatible = "fsl,imx6q-usdhc";
                                 reg = <0x0219c000 0x4000>;
                                 interrupts = <0 25 0x04>;
                                 clocks = <&clks 166>, <&clks 166>, <&clks 166>;
                                 clock-names = "ipg", "ahb", "per";
+                                bus-width = <4>;
                                 status = "disabled";
                         };
 
-                        i2c@021a0000 { /* I2C1 */
+                        i2c1: i2c@021a0000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -906,7 +926,7 @@
                                 status = "disabled";
                         };
 
-                        i2c@021a4000 { /* I2C2 */
+                        i2c2: i2c@021a4000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -916,7 +936,7 @@
                                 status = "disabled";
                         };
 
-                        i2c@021a8000 { /* I2C3 */
+                        i2c3: i2c@021a8000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -930,12 +950,12 @@
                                 reg = <0x021ac000 0x4000>;
                         };
 
-                        mmdc@021b0000 { /* MMDC0 */
+                        mmdc0: mmdc@021b0000 { /* MMDC0 */
                                 compatible = "fsl,imx6q-mmdc";
                                 reg = <0x021b0000 0x4000>;
                         };
 
-                        mmdc@021b4000 { /* MMDC1 */
+                        mmdc1: mmdc@021b4000 { /* MMDC1 */
                                 reg = <0x021b4000 0x4000>;
                         };
 
@@ -963,7 +983,7 @@
                                 interrupts = <0 109 0x04>;
                         };
 
-                        audmux@021d8000 {
+                        audmux: audmux@021d8000 {
                                 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
                                 reg = <0x021d8000 0x4000>;
                                 status = "disabled";
diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi
new file mode 100644
index 000000000000..d6c9d65cbaeb
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-6281.dtsi
@@ -0,0 +1,44 @@
+/ {
+        ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+                        compatible = "marvell,88f6281-pinctrl";
+                        reg = <0x10000 0x20>;
+
+                        pmx_nand: pmx-nand {
+                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+                                               "mpp4", "mpp5", "mpp18",
+                                               "mpp19";
+                                marvell,function = "nand";
+                        };
+                        pmx_sata0: pmx-sata0 {
+                                marvell,pins = "mpp5", "mpp21", "mpp23";
+                                marvell,function = "sata0";
+                        };
+                        pmx_sata1: pmx-sata1 {
+                                marvell,pins = "mpp4", "mpp20", "mpp22";
+                                marvell,function = "sata1";
+                        };
+                        pmx_spi: pmx-spi {
+                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
+                                marvell,function = "spi";
+                        };
+                        pmx_twsi0: pmx-twsi0 {
+                                marvell,pins = "mpp8", "mpp9";
+                                marvell,function = "twsi0";
+                        };
+                        pmx_uart0: pmx-uart0 {
+                                marvell,pins = "mpp10", "mpp11";
+                                marvell,function = "uart0";
+                        };
+                        pmx_uart1: pmx-uart1 {
+                                marvell,pins = "mpp13", "mpp14";
+                                marvell,function = "uart1";
+                        };
+                        pmx_sdio: pmx-sdio {
+                                marvell,pins = "mpp12", "mpp13", "mpp14",
+                                               "mpp15", "mpp16", "mpp17";
+                                marvell,function = "sdio";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi
new file mode 100644
index 000000000000..9ae2004d5675
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
@@ -0,0 +1,45 @@
+/ {
+        ocp@f1000000 {
+
+                pinctrl: pinctrl@10000 {
+                        compatible = "marvell,88f6282-pinctrl";
+                        reg = <0x10000 0x20>;
+
+                        pmx_sata0: pmx-sata0 {
+                                marvell,pins = "mpp5", "mpp21", "mpp23";
+                                marvell,function = "sata0";
+                        };
+                        pmx_sata1: pmx-sata1 {
+                                marvell,pins = "mpp4", "mpp20", "mpp22";
+                                marvell,function = "sata1";
+                        };
+                        pmx_spi: pmx-spi {
+                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
+                                marvell,function = "spi";
+                        };
+                        pmx_twsi0: pmx-twsi0 {
+                                marvell,pins = "mpp8", "mpp9";
+                                marvell,function = "twsi0";
+                        };
+                        pmx_uart0: pmx-uart0 {
+                                marvell,pins = "mpp10", "mpp11";
+                                marvell,function = "uart0";
+                        };
+
+                        pmx_uart1: pmx-uart1 {
+                                marvell,pins = "mpp13", "mpp14";
+                                marvell,function = "uart1";
+                        };
+                };
+
+                i2c@11100 {
+                        compatible = "marvell,mv64xxx-i2c";
+                        reg = <0x11100 0x20>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupts = <32>;
+                        clock-frequency = <100000>;
+                        status = "disabled";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
new file mode 100644
index 000000000000..3271e4c8ea07
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
@@ -0,0 +1,31 @@
+/ {
+        ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+                        compatible = "marvell,98dx4122-pinctrl";
+                        reg = <0x10000 0x20>;
+
+                        pmx_nand: pmx-nand {
+                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+                                               "mpp4", "mpp5", "mpp18",
+                                               "mpp19";
+                                marvell,function = "nand";
+                        };
+                        pmx_spi: pmx-spi {
+                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
+                                marvell,function = "spi";
+                        };
+                        pmx_twsi0: pmx-twsi0 {
+                                marvell,pins = "mpp8", "mpp9";
+                                marvell,function = "twsi0";
+                        };
+                        pmx_uart0: pmx-uart0 {
+                                marvell,pins = "mpp10", "mpp11";
+                                marvell,function = "uart0";
+                        };
+                        pmx_uart1: pmx-uart1 {
+                                marvell,pins = "mpp13", "mpp14";
+                                marvell,function = "uart1";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
index 9b32d0272825..6875ac00c174 100644
--- a/arch/arm/boot/dts/kirkwood-dnskw.dtsi
+++ b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
@@ -1,4 +1,5 @@
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "D-Link DNS NASes (kirkwood-based)";
@@ -35,7 +36,116 @@
                                       6000 2>;
         };
 
+        gpio_poweroff {
+                compatible = "gpio-poweroff";
+                gpios = <&gpio1 4 0>;
+        };
+
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_nand &pmx_uart1
+                                      &pmx_sata0 &pmx_sata1
+                                      &pmx_led_power
+                                      &pmx_led_red_right_hdd
+                                      &pmx_led_red_left_hdd
+                                      &pmx_led_red_usb_325
+                                      &pmx_button_power
+                                      &pmx_led_red_usb_320
+                                      &pmx_power_off &pmx_power_back_on
+                                      &pmx_power_sata0 &pmx_power_sata1
+                                      &pmx_present_sata0 &pmx_present_sata1
+                                      &pmx_led_white_usb &pmx_fan_tacho
+                                      &pmx_fan_high_speed &pmx_fan_low_speed
+                                      &pmx_button_unmount &pmx_button_reset
+                                      &pmx_temp_alarm >;
+                        pinctrl-names = "default";
+
+                        pmx_sata0: pmx-sata0 {
+                                marvell,pins = "mpp20";
+                                marvell,function = "sata1";
+                        };
+                        pmx_sata1: pmx-sata1 {
+                                marvell,pins = "mpp21";
+                                marvell,function = "sata0";
+                        };
+                        pmx_led_power: pmx-led-power {
+                                marvell,pins = "mpp26";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_red_right_hdd: pmx-led-red-right-hdd {
+                                marvell,pins = "mpp27";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_red_left_hdd: pmx-led-red-left-hdd {
+                                marvell,pins = "mpp28";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_red_usb_325: pmx-led-red-usb-325 {
+                                marvell,pins = "mpp29";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_power: pmx-button-power {
+                                marvell,pins = "mpp34";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_red_usb_320: pmx-led-red-usb-320 {
+                                marvell,pins = "mpp35";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_off: pmx-power-off {
+                                marvell,pins = "mpp36";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_back_on: pmx-power-back-on {
+                                marvell,pins = "mpp37";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_sata0: pmx-power-sata0 {
+                                marvell,pins = "mpp39";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_sata1: pmx-power-sata1 {
+                                marvell,pins = "mpp40";
+                                marvell,function = "gpio";
+                        };
+                        pmx_present_sata0: pmx-present-sata0 {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+                        pmx_present_sata1: pmx-present-sata1 {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_white_usb: pmx-led-white-usb {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_fan_tacho: pmx-fan-tacho {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                        pmx_fan_high_speed: pmx-fan-high-speed {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+                        pmx_fan_low_speed: pmx-fan-low-speed {
+                                marvell,pins = "mpp46";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_unmount: pmx-button-unmount {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_reset: pmx-button-reset {
+                                marvell,pins = "mpp48";
+                                marvell,function = "gpio";
+                        };
+                        pmx_temp_alarm: pmx-temp-alarm {
+                                marvell,pins = "mpp49";
+                                marvell,function = "gpio";
+                        };
+                };
                 sata@80000 {
                         status = "okay";
                         nr-ports = <2>;
@@ -43,6 +153,7 @@
 
                 nand@3000000 {
                         status = "okay";
+                        chip-delay = <35>;
 
                         partition@0 {
                                 label = "u-boot";
@@ -76,4 +187,33 @@
                         };
                 };
         };
+
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                sata0_power: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "SATA0 Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio1 7 0>;
+                };
+                sata1_power: regulator@2 {
+                        compatible = "regulator-fixed";
+                        reg = <2>;
+                        regulator-name = "SATA1 Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio1 8 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts
index 08a582414b88..2e3dd34e21a5 100644
--- a/arch/arm/boot/dts/kirkwood-dockstar.dts
+++ b/arch/arm/boot/dts/kirkwood-dockstar.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "Seagate FreeAgent Dockstar";
@@ -16,6 +17,25 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_usb_power_enable
+                                      &pmx_led_green &pmx_led_orange >;
+                        pinctrl-names = "default";
+
+                        pmx_usb_power_enable: pmx-usb-power-enable {
+                                marvell,pins = "mpp29";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_green: pmx-led-green {
+                                marvell,pins = "mpp46";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_orange: pmx-led-orange {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                };
                 serial@12000 {
                         clock-frequency = <200000000>;
                         status = "ok";
@@ -54,4 +74,21 @@
                         gpios = <&gpio1 15 1>;
                 };
         };
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                usb_power: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "USB Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio0 29 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts
index 26e281fbf6bc..f2d386c95b07 100644
--- a/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "Globalscale Technologies Dreamplug";
@@ -16,6 +17,26 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_spi
+                                      &pmx_led_bluetooth &pmx_led_wifi
+                                      &pmx_led_wifi_ap >;
+                        pinctrl-names = "default";
+
+                        pmx_led_bluetooth: pmx-led-bluetooth {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_wifi: pmx-led-wifi {
+                                marvell,pins = "mpp48";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_wifi_ap: pmx-led-wifi-ap {
+                                marvell,pins = "mpp49";
+                                marvell,function = "gpio";
+                        };
+                };
                 serial@12000 {
                         clock-frequency = <200000000>;
                         status = "ok";
diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts
index 7c8238fbb6f9..1b133e0c566e 100644
--- a/arch/arm/boot/dts/kirkwood-goflexnet.dts
+++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "Seagate GoFlex Net";
@@ -16,6 +17,61 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_usb_power_enable &pmx_led_orange
+                                      &pmx_led_left_cap_0 &pmx_led_left_cap_1
+                                      &pmx_led_left_cap_2 &pmx_led_left_cap_3
+                                      &pmx_led_right_cap_0 &pmx_led_right_cap_1
+                                      &pmx_led_right_cap_2 &pmx_led_right_cap_3
+                                    >;
+                        pinctrl-names = "default";
+
+                        pmx_usb_power_enable: pmx-usb-power-enable {
+                                marvell,pins = "mpp29";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_right_cap_0: pmx-led_right_cap_0 {
+                                marvell,pins = "mpp38";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_right_cap_1: pmx-led_right_cap_1 {
+                                marvell,pins = "mpp39";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_right_cap_2: pmx-led_right_cap_2 {
+                                marvell,pins = "mpp40";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_right_cap_3: pmx-led_right_cap_3 {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_left_cap_0: pmx-led_left_cap_0 {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_left_cap_1: pmx-led_left_cap_1 {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_left_cap_2: pmx-led_left_cap_2 {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_left_cap_3: pmx-led_left_cap_3 {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_green: pmx-led_green {
+                                marvell,pins = "mpp46";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_orange: pmx-led_orange {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                };
                 serial@12000 {
                         clock-frequency = <200000000>;
                         status = "ok";
@@ -96,4 +152,21 @@
                         gpios = <&gpio1 9 0>;
                 };
         };
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                usb_power: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "USB Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio0 29 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts
index 66794ed75ff1..71902da33d63 100644
--- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
@@ -16,6 +17,39 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_nand
+                                      &pmx_led_os_red &pmx_power_off
+                                      &pmx_led_os_green &pmx_led_usb_transfer
+                                      &pmx_button_reset &pmx_button_usb_copy >;
+                        pinctrl-names = "default";
+
+                        pmx_led_os_red: pmx-led-os-red {
+                                marvell,pins = "mpp22";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_off: pmx-power-off {
+                                marvell,pins = "mpp24";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_os_green: pmx-led-os-green {
+                                marvell,pins = "mpp25";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_usb_transfer: pmx-led-usb-transfer {
+                                marvell,pins = "mpp27";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_reset: pmx-button-reset {
+                                marvell,pins = "mpp28";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_usb_copy: pmx-button-usb-copy {
+                                marvell,pins = "mpp29";
+                                marvell,function = "gpio";
+                        };
+                };
                 serial@12000 {
                         clock-frequency = <200000000>;
                         status = "okay";
@@ -79,4 +113,10 @@
                         gpios = <&gpio0 27 0>;
                 };
         };
+        gpio_poweroff {
+                compatible = "gpio-poweroff";
+                gpios = <&gpio0 24 0>;
+        };
+
+
 };
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts
index d97cd9d4753e..504f16be8b54 100644
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "Iomega Iconnect";
@@ -18,6 +19,56 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_gpio_12 &pmx_gpio_35
+                                      &pmx_gpio_41 &pmx_gpio_42
+                                      &pmx_gpio_43 &pmx_gpio_44
+                                      &pmx_gpio_45 &pmx_gpio_46
+                                      &pmx_gpio_47 &pmx_gpio_48 >;
+                        pinctrl-names = "default";
+
+                        pmx_gpio_12: pmx-gpio-12 {
+                                marvell,pins = "mpp12";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_35: pmx-gpio-35 {
+                                marvell,pins = "mpp35";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_41: pmx-gpio-41 {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_42: pmx-gpio-42 {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_43: pmx-gpio-43 {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_44: pmx-gpio-44 {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_45: pmx-gpio-45 {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_46: pmx-gpio-46 {
+                                marvell,pins = "mpp46";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_47: pmx-gpio-47 {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_48: pmx-gpio-48 {
+                                marvell,pins = "mpp48";
+                                marvell,function = "gpio";
+                        };
+                };
                 i2c@11000 {
                         status = "okay";
 
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index 865aeec40a26..6cae4599c4b3 100644
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "Iomega StorCenter ix2-200";
@@ -16,6 +17,94 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_button_reset &pmx_button_power
+                                      &pmx_led_backup &pmx_led_power
+                                      &pmx_button_otb &pmx_led_rebuild
+                                      &pmx_led_health
+                                      &pmx_led_sata_brt_ctrl_1
+                                      &pmx_led_sata_brt_ctrl_2
+                                      &pmx_led_backup_brt_ctrl_1
+                                      &pmx_led_backup_brt_ctrl_2
+                                      &pmx_led_power_brt_ctrl_1
+                                      &pmx_led_power_brt_ctrl_2
+                                      &pmx_led_health_brt_ctrl_1
+                                      &pmx_led_health_brt_ctrl_2
+                                      &pmx_led_rebuild_brt_ctrl_1
+                                      &pmx_led_rebuild_brt_ctrl_2 >;
+                        pinctrl-names = "default";
+
+                        pmx_button_reset: pmx-button-reset {
+                                marvell,pins = "mpp12";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_power: pmx-button-power {
+                                marvell,pins = "mpp14";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_backup: pmx-led-backup {
+                                marvell,pins = "mpp15";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_power: pmx-led-power {
+                                marvell,pins = "mpp16";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_otb: pmx-button-otb {
+                                marvell,pins = "mpp35";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_rebuild: pmx-led-rebuild {
+                                marvell,pins = "mpp36";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_health: pmx-led_health {
+                                marvell,pins = "mpp37";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_sata_brt_ctrl_1: pmx-led-sata-brt-ctrl-1 {
+                                marvell,pins = "mpp38";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_sata_brt_ctrl_2: pmx-led-sata-brt-ctrl-2 {
+                                marvell,pins = "mpp39";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_backup_brt_ctrl_1: pmx-led-backup-brt-ctrl-1 {
+                                marvell,pins = "mpp40";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_backup_brt_ctrl_2: pmx-led-backup-brt-ctrl-2 {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_power_brt_ctrl_1: pmx-led-power-brt-ctrl-1 {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_power_brt_ctrl_2: pmx-led-power-brt-ctrl-2 {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_health_brt_ctrl_1: pmx-led-health-brt-ctrl-1 {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_health_brt_ctrl_2: pmx-led-health-brt-ctrl-2 {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+
+                };
                 i2c@11000 {
                         status = "okay";
 
diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
index 75bdb93fed26..8db3123ac80f 100644
--- a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
+++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-98dx4122.dtsi"
 
 / {
         model = "Keymile Kirkwood Reference Design";
@@ -16,6 +17,22 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_nand &pmx_i2c_gpio_sda
+                                &pmx_i2c_gpio_scl >;
+                        pinctrl-names = "default";
+
+                        pmx_i2c_gpio_sda: pmx-gpio-sda {
+                                marvell,pins = "mpp8";
+                                marvell,function = "gpio";
+                        };
+                        pmx_i2c_gpio_scl: pmx-gpio-scl {
+                                marvell,pins = "mpp9";
+                                marvell,function = "gpio";
+                        };
+                };
+
                 serial@12000 {
                         clock-frequency = <200000000>;
                         status = "ok";
diff --git a/arch/arm/boot/dts/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
index 798e60eeedf3..37d45c4f88fb 100644
--- a/arch/arm/boot/dts/kirkwood-lsxl.dtsi
+++ b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
@@ -1,4 +1,5 @@
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         chosen {
@@ -6,6 +7,71 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_power_hdd &pmx_usb_vbus
+                                      &pmx_fan_low &pmx_fan_high
+                                      &pmx_led_function_red &pmx_led_alarm
+                                      &pmx_led_info &pmx_led_power
+                                      &pmx_fan_lock &pmx_button_function
+                                      &pmx_power_switch &pmx_power_auto_switch
+                                      &pmx_led_function_blue >;
+                        pinctrl-names = "default";
+
+                        pmx_power_hdd: pmx-power-hdd {
+                                marvell,pins = "mpp10";
+                                marvell,function = "gpo";
+                        };
+                        pmx_usb_vbus: pmx-usb-vbus {
+                                marvell,pins = "mpp11";
+                                marvell,function = "gpio";
+                        };
+                        pmx_fan_high: pmx-fan-high {
+                                marvell,pins = "mpp18";
+                                marvell,function = "gpo";
+                        };
+                        pmx_fan_low: pmx-fan-low {
+                                marvell,pins = "mpp19";
+                                marvell,function = "gpo";
+                        };
+                        pmx_led_function_blue: pmx-led-function-blue {
+                                marvell,pins = "mpp36";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_alarm: pmx-led-alarm {
+                                marvell,pins = "mpp37";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_info: pmx-led-info {
+                                marvell,pins = "mpp38";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_power: pmx-led-power {
+                                marvell,pins = "mpp39";
+                                marvell,function = "gpio";
+                        };
+                        pmx_fan_lock: pmx-fan-lock {
+                                marvell,pins = "mpp40";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_function: pmx-button-function {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_switch: pmx-power-switch {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_auto_switch: pmx-power-auto-switch {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_function_red: pmx-led-function_red {
+                                marvell,pins = "mpp48";
+                                marvell,function = "gpio";
+                        };
+
+                };
                 sata@80000 {
                         status = "okay";
                         nr-ports = <1>;
@@ -105,4 +171,33 @@
                                       5000 0>;
                 alarm-gpios = <&gpio1 8 0>;
         };
+
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                usb_power: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "USB Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio0 11 0>;
+                };
+                hdd_power: regulator@2 {
+                        compatible = "regulator-fixed";
+                        reg = <2>;
+                        regulator-name = "HDD Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio0 10 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/kirkwood-mplcec4.dts b/arch/arm/boot/dts/kirkwood-mplcec4.dts
index ac3c080bed21..262c65403760 100644
--- a/arch/arm/boot/dts/kirkwood-mplcec4.dts
+++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "MPL CEC4";
@@ -16,6 +17,64 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_nand &pmx_uart0
+                                      &pmx_led_health &pmx_sdio
+                                      &pmx_sata0 &pmx_sata1
+                                      &pmx_led_user1o
+                                      &pmx_led_user1g &pmx_led_user0o
+                                      &pmx_led_user0g &pmx_led_misc
+                                      &pmx_sdio_cd
+                                    >;
+                        pinctrl-names = "default";
+
+                        pmx_led_health: pmx-led-health {
+                                marvell,pins = "mpp7";
+                                marvell,function = "gpo";
+                        };
+
+                        pmx_sata1: pmx-sata1 {
+                                marvell,pins = "mpp34";
+                                marvell,function = "sata1";
+                        };
+
+                        pmx_sata0: pmx-sata0 {
+                                marvell,pins = "mpp35";
+                                marvell,function = "sata0";
+                        };
+
+                        pmx_led_user1o: pmx-led-user1o {
+                                marvell,pins = "mpp40";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_user1g: pmx-led-user1g {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_user0o: pmx-led-user0o {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_user0g: pmx-led-user0g {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_misc: pmx-led-misc {
+                                marvell,pins = "mpp46";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_sdio_cd: pmx-sdio-cd {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                };
+
                 i2c@11000 {
                         status = "okay";
 
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
index 9a2606c8b78f..49d3d74d4d38 100644
--- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6282.dtsi"
 
 / {
         model = "Plat'Home OpenBlocksA6";
@@ -29,11 +30,69 @@
                 nand@3000000 {
                         chip-delay = <25>;
                         status = "okay";
+
+                        partition@0 {
+                                label = "uboot";
+                                reg = <0x0 0x90000>;
+                        };
+
+                        partition@90000 {
+                                label = "env";
+                                reg = <0x90000 0x44000>;
+                        };
+
+                        partition@d4000 {
+                                label = "test";
+                                reg = <0xd4000 0x24000>;
+                        };
+
+                        partition@f4000 {
+                                label = "conf";
+                                reg = <0xf4000 0x400000>;
+                        };
+
+                        partition@4f4000 {
+                                label = "linux";
+                                reg = <0x4f4000 0x1d20000>;
+                        };
+
+                        partition@2214000 {
+                                label = "user";
+                                reg = <0x2214000 0x1dec000>;
+                        };
                 };
 
                 sata@80000 {
                         nr-ports = <1>;
                         status = "okay";
                 };
+
+                i2c@11100 {
+                        status = "okay";
+
+                        s35390a: s35390a@30 {
+                                compatible = "s35390a";
+                                reg = <0x30>;
+                        };
+                };
         };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+
+                led-red {
+                        label = "obsa6:red:stat";
+                        gpios = <&gpio1 9 1>;
+                };
+
+                led-green {
+                        label = "obsa6:green:stat";
+                        gpios = <&gpio1 10 1>;
+                };
+
+                led-yellow {
+                        label = "obsa6:yellow:stat";
+                        gpios = <&gpio1 11 1>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6281.dts b/arch/arm/boot/dts/kirkwood-ts219-6281.dts
index ccbf32757800..8295c833887f 100644
--- a/arch/arm/boot/dts/kirkwood-ts219-6281.dts
+++ b/arch/arm/boot/dts/kirkwood-ts219-6281.dts
@@ -1,8 +1,39 @@
 /dts-v1/;
 
 /include/ "kirkwood-ts219.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
+        ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_uart0 &pmx_uart1 &pmx_spi
+                                      &pmx_twsi0 &pmx_sata0 &pmx_sata1
+                                      &pmx_ram_size &pmx_reset_button
+                                      &pmx_USB_copy_button &pmx_board_id>;
+                        pinctrl-names = "default";
+
+                        pmx_ram_size: pmx-ram-size {
+                                /* RAM: 0: 256 MB, 1: 512 MB */
+                                marvell,pins = "mpp36";
+                                marvell,function = "gpio";
+                        };
+                        pmx_USB_copy_button: pmx-USB-copy-button {
+                                marvell,pins = "mpp15";
+                                marvell,function = "gpio";
+                        };
+                        pmx_reset_button: pmx-reset-button {
+                                marvell,pins = "mpp16";
+                                marvell,function = "gpio";
+                        };
+                        pmx_board_id: pmx-board-id {
+                                /* 0: TS-11x, 1: TS-21x */
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                };
+        };
+
         gpio_keys {
                 compatible = "gpio-keys";
                 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6282.dts b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
index fbe9932161a1..df3f95dfba33 100644
--- a/arch/arm/boot/dts/kirkwood-ts219-6282.dts
+++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
@@ -1,8 +1,39 @@
 /dts-v1/;
 
 /include/ "kirkwood-ts219.dtsi"
+/include/ "kirkwood-6282.dtsi"
 
 / {
+        ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_uart0 &pmx_uart1 &pmx_spi
+                                      &pmx_twsi0 &pmx_sata0 &pmx_sata1
+                                      &pmx_ram_size &pmx_reset_button
+                                      &pmx_USB_copy_button &pmx_board_id>;
+                        pinctrl-names = "default";
+
+                        pmx_ram_size: pmx-ram-size {
+                                /* RAM: 0: 256 MB, 1: 512 MB */
+                                marvell,pins = "mpp36";
+                                marvell,function = "gpio";
+                        };
+                        pmx_reset_button: pmx-reset-button {
+                                marvell,pins = "mpp37";
+                                marvell,function = "gpio";
+                        };
+                        pmx_USB_copy_button: pmx-USB-copy-button {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_board_id: pmx-board-id {
+                                /* 0: TS-11x, 1: TS-21x */
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                };
+        };
+
         gpio_keys {
                 compatible = "gpio-keys";
                 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 4e5b8154a5be..a990c30f0a26 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -4,6 +4,10 @@
         compatible = "marvell,kirkwood";
         interrupt-parent = <&intc>;
 
+        aliases {
+               gpio0 = &gpio0;
+               gpio1 = &gpio1;
+        };
         intc: interrupt-controller {
                 compatible = "marvell,orion-intc", "marvell,intc";
                 interrupt-controller;
@@ -24,7 +28,8 @@
                         #gpio-cells = <2>;
                         gpio-controller;
                         reg = <0x10100 0x40>;
-                        ngpio = <32>;
+                        ngpios = <32>;
+                        interrupt-controller;
                         interrupts = <35>, <36>, <37>, <38>;
                 };
 
@@ -33,7 +38,8 @@
                         #gpio-cells = <2>;
                         gpio-controller;
                         reg = <0x10140 0x40>;
-                        ngpio = <18>;
+                        ngpios = <18>;
+                        interrupt-controller;
                         interrupts = <39>, <40>, <41>;
                 };
 
@@ -77,6 +83,13 @@
                         status = "okay";
                 };
 
+                ehci@50000 {
+                        compatible = "marvell,orion-ehci";
+                        reg = <0x50000 0x1000>;
+                        interrupts = <19>;
+                        status = "okay";
+                };
+
                 sata@80000 {
                         compatible = "marvell,orion-sata";
                         reg = <0x80000 0x5000>;
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index e5ffe960dbf3..1582f484a867 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -182,6 +182,13 @@
                                 pnx,timeout = <0x64>;
                         };
 
+                        mpwm: mpwm@400E8000 {
+                                compatible = "nxp,lpc3220-motor-pwm";
+                                reg = <0x400E8000 0x78>;
+                                status = "disabled";
+                                #pwm-cells = <2>;
+                        };
+
                         i2cusb: i2c@31020300 {
                                 compatible = "nxp,pnx-i2c";
                                 reg = <0x31020300 0x100>;
diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts
index c6f85f0bc531..27f31a5fa494 100644
--- a/arch/arm/boot/dts/snowball.dts
+++ b/arch/arm/boot/dts/snowball.dts
@@ -14,7 +14,7 @@
 
 / {
         model = "Calao Systems Snowball platform with device tree";
-        compatible = "calaosystems,snowball-a9500";
+        compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
 
         memory {
                 reg = <0x00000000 0x20000000>;
@@ -147,10 +147,10 @@
                 };
 
                 // External Micro SD slot
-                sdi@80126000 {
+                sdi0_per1@80126000 {
                         arm,primecell-periphid = <0x10480180>;
                         max-frequency = <50000000>;
-                        bus-width = <8>;
+                        bus-width = <4>;
                         mmc-cap-mmc-highspeed;
                         vmmc-supply = <&ab8500_ldo_aux3_reg>;
 
@@ -161,7 +161,7 @@
                 };
 
                 // On-board eMMC
-                sdi@80114000 {
+                sdi4_per2@80114000 {
                         arm,primecell-periphid = <0x10480180>;
                         max-frequency = <50000000>;
                         bus-width = <8>;
@@ -214,5 +214,137 @@
                 cpufreq-cooling {
                         status = "okay";
                 };
+
+                prcmu@80157000 {
+                        db8500-prcmu-regulators {
+                                db8500_vape_reg: db8500_vape {
+                                        regulator-name = "db8500-vape";
+                                };
+
+                                db8500_varm_reg: db8500_varm {
+                                        regulator-name = "db8500-varm";
+                                };
+
+                                db8500_vmodem_reg: db8500_vmodem {
+                                        regulator-name = "db8500-vmodem";
+                                };
+
+                                db8500_vpll_reg: db8500_vpll {
+                                        regulator-name = "db8500-vpll";
+                                };
+
+                                db8500_vsmps1_reg: db8500_vsmps1 {
+                                        regulator-name = "db8500-vsmps1";
+                                };
+
+                                db8500_vsmps2_reg: db8500_vsmps2 {
+                                        regulator-name = "db8500-vsmps2";
+                                };
+
+                                db8500_vsmps3_reg: db8500_vsmps3 {
+                                        regulator-name = "db8500-vsmps3";
+                                };
+
+                                db8500_vrf1_reg: db8500_vrf1 {
+                                        regulator-name = "db8500-vrf1";
+                                };
+
+                                db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
+                                        regulator-name = "db8500-sva-mmdsp";
+                                };
+
+                                db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
+                                        regulator-name = "db8500-sva-mmdsp-ret";
+                                };
+
+                                db8500_sva_pipe_reg: db8500_sva_pipe {
+                                        regulator-name = "db8500_sva_pipe";
+                                };
+
+                                db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
+                                        regulator-name = "db8500_sia_mmdsp";
+                                };
+
+                                db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
+                                        regulator-name = "db8500-sia-mmdsp-ret";
+                                };
+
+                                db8500_sia_pipe_reg: db8500_sia_pipe {
+                                        regulator-name = "db8500-sia-pipe";
+                                };
+
+                                db8500_sga_reg: db8500_sga {
+                                        regulator-name = "db8500-sga";
+                                };
+
+                                db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
+                                        regulator-name = "db8500-b2r2-mcde";
+                                };
+
+                                db8500_esram12_reg: db8500_esram12 {
+                                        regulator-name = "db8500-esram12";
+                                };
+
+                                db8500_esram12_ret_reg: db8500_esram12_ret {
+                                        regulator-name = "db8500-esram12-ret";
+                                };
+
+                                db8500_esram34_reg: db8500_esram34 {
+                                        regulator-name = "db8500-esram34";
+                                };
+
+                                db8500_esram34_ret_reg: db8500_esram34_ret {
+                                        regulator-name = "db8500-esram34-ret";
+                                };
+                        };
+
+                        ab8500@5 {
+                                ab8500-regulators {
+                                        ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
+                                                regulator-name = "V-DISPLAY";
+                                        };
+
+                                        ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
+                                                regulator-name = "V-eMMC1";
+                                        };
+
+                                        ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
+                                                regulator-name = "V-MMC-SD";
+                                        };
+
+                                        ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
+                                                regulator-name = "V-INTCORE";
+                                        };
+
+                                        ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
+                                                regulator-name = "V-TVOUT";
+                                        };
+
+                                        ab8500_ldo_usb_reg: ab8500_ldo_usb {
+                                                regulator-name = "dummy";
+                                        };
+
+                                        ab8500_ldo_audio_reg: ab8500_ldo_audio {
+                                                regulator-name = "V-AUD";
+                                        };
+
+                                        ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
+                                                regulator-name = "V-AMIC1";
+                                        };
+
+                                        ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
+                                                regulator-name = "V-AMIC2";
+                                        };
+
+                                        ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
+                                                regulator-name = "V-DMIC";
+                                        };
+
+                                        ab8500_ldo_ana_reg: ab8500_ldo_ana {
+                                                regulator-name = "V-CSI/DSI";
+                                        };
+                                };
+                        };
+                };
         };
 };
diff --git a/arch/arm/boot/dts/stuib.dtsi b/arch/arm/boot/dts/stuib.dtsi
new file mode 100644
index 000000000000..39446a247e79
--- /dev/null
+++ b/arch/arm/boot/dts/stuib.dtsi
@@ -0,0 +1,78 @@
+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+        soc-u9500 {
+                i2c@80004000 {
+                        stmpe1601: stmpe1601@40 {
+                                compatible = "st,stmpe1601";
+                                reg = <0x40>;
+                                interrupts = <26 0x1>;
+                                interrupt-parent = <&gpio6>;
+                                interrupt-controller;
+
+                                wakeup-source;
+                                st,autosleep-timeout = <1024>;
+
+                                stmpe_keypad {
+                                        compatible = "st,stmpe-keypad";
+
+                                        debounce-interval = <64>;
+                                        st,scan-count = <8>;
+                                        st,no-autorepeat;
+
+                                        linux,keymap = <0x205006b
+                                                        0x4010074
+                                                        0x3050072
+                                                        0x1030004
+                                                        0x502006a
+                                                        0x500000a
+                                                        0x5008b
+                                                        0x706001c
+                                                        0x405000b
+                                                        0x6070003
+                                                        0x3040067
+                                                        0x303006c
+                                                        0x60400e7
+                                                        0x602009e
+                                                        0x4020073
+                                                        0x5050002
+                                                        0x4030069
+                                                        0x3020008>;
+                                };
+                        };
+                };
+
+                i2c@80110000 {
+                        bu21013_tp@0x5c {
+                                compatible = "rhom,bu21013_tp";
+                                reg = <0x5c>;
+                                touch-gpio = <&gpio2 20 0x4>;
+                                avdd-supply = <&ab8500_ldo_aux1_reg>;
+
+                                rhom,touch-max-x = <384>;
+                                rhom,touch-max-y = <704>;
+                                rhom,flip-y;
+                        };
+
+                        bu21013_tp@0x5d {
+                                compatible = "rhom,bu21013_tp";
+                                reg = <0x5d>;
+                                touch-gpio = <&gpio2 20 0x4>;
+                                avdd-supply = <&ab8500_ldo_aux1_reg>;
+
+                                rhom,touch-max-x = <384>;
+                                rhom,touch-max-y = <704>;
+                                rhom,flip-y;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index 74b8a47adf91..43eb72af8948 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -10,6 +10,18 @@
                 reg = <0x00000000 0x40000000>;
         };
 
+        host1x {
+                hdmi {
+                        status = "okay";
+
+                        vdd-supply = <&hdmi_vdd_reg>;
+                        pll-supply = <&hdmi_pll_reg>;
+
+                        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+                        nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+                };
+        };
+
         pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
@@ -262,9 +274,9 @@
                 };
         };
 
-        i2c@7000c400 {
+        hdmi_ddc: i2c@7000c400 {
                 status = "okay";
-                clock-frequency = <400000>;
+                clock-frequency = <100000>;
         };
 
         i2c@7000c500 {
@@ -369,13 +381,13 @@
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                ldo7 {
+                                hdmi_vdd_reg: ldo7 {
                                         regulator-name = "vdd_ldo7,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                ldo8 {
+                                hdmi_pll_reg: ldo8 {
                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
@@ -396,6 +408,11 @@
                                 };
                         };
                 };
+
+                temperature-sensor@4c {
+                        compatible = "adi,adt7461";
+                        reg = <0x4c>;
+                };
         };
 
         pmc {
diff --git a/arch/arm/boot/dts/tegra20-plutux.dts b/arch/arm/boot/dts/tegra20-plutux.dts
index 331a3ef24d59..289480026fbf 100644
--- a/arch/arm/boot/dts/tegra20-plutux.dts
+++ b/arch/arm/boot/dts/tegra20-plutux.dts
@@ -6,6 +6,12 @@
         model = "Avionic Design Plutux board";
         compatible = "ad,plutux", "ad,tamonten", "nvidia,tegra20";
 
+        host1x {
+                hdmi {
+                        status = "okay";
+                };
+        };
+
         i2c@7000c000 {
                 wm8903: wm8903@1a {
                         compatible = "wlf,wm8903";
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index e58a0e60f711..420459825b46 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -561,6 +561,12 @@
                 status = "okay";
         };
 
+        sdhci@c8000000 {
+                status = "okay";
+                power-gpios = <&gpio 86 0>; /* gpio PK6 */
+                bus-width = <4>;
+        };
+
         sdhci@c8000400 {
                 status = "okay";
                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index 5b3d8b157b33..a239ccdfaa52 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -8,6 +8,16 @@
                 reg = <0x00000000 0x20000000>;
         };
 
+        host1x {
+                hdmi {
+                        vdd-supply = <&hdmi_vdd_reg>;
+                        pll-supply = <&hdmi_pll_reg>;
+
+                        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+                        nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+                };
+        };
+
         pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
@@ -62,10 +72,6 @@
                                 nvidia,pins = "dap4";
                                 nvidia,function = "dap4";
                         };
-                        ddc {
-                                nvidia,pins = "ddc";
-                                nvidia,function = "i2c2";
-                        };
                         dta {
                                 nvidia,pins = "dta", "dtd";
                                 nvidia,function = "sdio2";
@@ -91,7 +97,7 @@
                                 nvidia,function = "pcie";
                         };
                         hdint {
-                                nvidia,pins = "hdint", "pta";
+                                nvidia,pins = "hdint";
                                 nvidia,function = "hdmi";
                         };
                         i2cp {
@@ -230,6 +236,39 @@
                                 nvidia,pull = <1>;
                         };
                 };
+
+                state_i2cmux_ddc: pinmux_i2cmux_ddc {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "i2c2";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "rsvd4";
+                        };
+                };
+
+                state_i2cmux_pta: pinmux_i2cmux_pta {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "rsvd4";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "i2c2";
+                        };
+                };
+
+                state_i2cmux_idle: pinmux_i2cmux_idle {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "rsvd4";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "rsvd4";
+                        };
+                };
         };
 
         i2s@70002800 {
@@ -246,6 +285,36 @@
                 status = "okay";
         };
 
+        i2c@7000c400 {
+                clock-frequency = <100000>;
+                status = "okay";
+        };
+
+        i2cmux {
+                compatible = "i2c-mux-pinctrl";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                i2c-parent = <&{/i2c@7000c400}>;
+
+                pinctrl-names = "ddc", "pta", "idle";
+                pinctrl-0 = <&state_i2cmux_ddc>;
+                pinctrl-1 = <&state_i2cmux_pta>;
+                pinctrl-2 = <&state_i2cmux_idle>;
+
+                hdmi_ddc: i2c@0 {
+                        reg = <0>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                i2c@1 {
+                        reg = <1>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+        };
+
         i2c@7000d000 {
                 clock-frequency = <400000>;
                 status = "okay";
@@ -348,13 +417,13 @@
                                         regulator-max-microvolt = <2850000>;
                                 };
 
-                                ldo7 {
+                                hdmi_vdd_reg: ldo7 {
                                         regulator-name = "vdd_ldo7,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                ldo8 {
+                                hdmi_pll_reg: ldo8 {
                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
@@ -381,6 +450,11 @@
                                 };
                         };
                 };
+
+                temperature-sensor@4c {
+                        compatible = "onnn,nct1008";
+                        reg = <0x4c>;
+                };
         };
 
         pmc {
diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts
index 9aff31b0fe4a..402b21004bef 100644
--- a/arch/arm/boot/dts/tegra20-tec.dts
+++ b/arch/arm/boot/dts/tegra20-tec.dts
@@ -6,10 +6,13 @@
         model = "Avionic Design Tamonten Evaluation Carrier";
         compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20";
 
-        i2c@7000c000 {
-                clock-frequency = <400000>;
-                status = "okay";
+        host1x {
+                hdmi {
+                        status = "okay";
+                };
+        };
 
+        i2c@7000c000 {
                 wm8903: wm8903@1a {
                         compatible = "wlf,wm8903";
                         reg = <0x1a>;
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 27fb8a67ea42..b70b4cb754c8 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -10,6 +10,18 @@
                 reg = <0x00000000 0x40000000>;
         };
 
+        host1x {
+                hdmi {
+                        status = "okay";
+
+                        vdd-supply = <&hdmi_vdd_reg>;
+                        pll-supply = <&hdmi_pll_reg>;
+
+                        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+                        nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+                };
+        };
+
         pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
@@ -249,14 +261,24 @@
                 clock-frequency = <216000000>;
         };
 
-        i2c@7000c000 {
+        dvi_ddc: i2c@7000c000 {
                 status = "okay";
-                clock-frequency = <400000>;
+                clock-frequency = <100000>;
         };
 
-        i2c@7000c400 {
+        spi@7000c380 {
                 status = "okay";
-                clock-frequency = <400000>;
+                spi-max-frequency = <48000000>;
+                spi-flash@0 {
+                        compatible = "winbond,w25q80bl";
+                        reg = <0>;
+                        spi-max-frequency = <48000000>;
+                };
+        };
+
+        hdmi_ddc: i2c@7000c400 {
+                status = "okay";
+                clock-frequency = <100000>;
         };
 
         i2c@7000c500 {
@@ -300,6 +322,30 @@
                 bus-width = <4>;
         };
 
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                hdmi_vdd_reg: regulator@0 {
+                        compatible = "regulator-fixed";
+                        reg = <0>;
+                        regulator-name = "avdd_hdmi";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                };
+
+                hdmi_pll_reg: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "avdd_hdmi_pll";
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <1800000>;
+                        regulator-always-on;
+                };
+        };
+
         sound {
                 compatible = "nvidia,tegra-audio-trimslice";
                 nvidia,i2s-controller = <&tegra_i2s1>;
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 86854f1abd58..adc47547eaae 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -64,11 +64,6 @@
                                 nvidia,pins = "dap4";
                                 nvidia,function = "dap4";
                         };
-                        ddc {
-                                nvidia,pins = "ddc", "owc", "spdi", "spdo",
-                                        "uac";
-                                nvidia,function = "rsvd2";
-                        };
                         dta {
                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
                                 nvidia,function = "vi";
@@ -98,7 +93,7 @@
                                 nvidia,function = "pcie";
                         };
                         hdint {
-                                nvidia,pins = "hdint", "pta";
+                                nvidia,pins = "hdint";
                                 nvidia,function = "hdmi";
                         };
                         i2cp {
@@ -129,6 +124,10 @@
                                         "lspi", "lvp1", "lvs";
                                 nvidia,function = "displaya";
                         };
+                        owc {
+                                nvidia,pins = "owc", "spdi", "spdo", "uac";
+                                nvidia,function = "rsvd2";
+                        };
                         pmc {
                                 nvidia,pins = "pmc";
                                 nvidia,function = "pwr_on";
@@ -237,6 +236,49 @@
                                         "ld23_22";
                                 nvidia,pull = <1>;
                         };
+                        drive_sdio1 {
+                                nvidia,pins = "drive_sdio1";
+                                nvidia,high-speed-mode = <0>;
+                                nvidia,schmitt = <1>;
+                                nvidia,low-power-mode = <3>;
+                                nvidia,pull-down-strength = <31>;
+                                nvidia,pull-up-strength = <31>;
+                                nvidia,slew-rate-rising = <3>;
+                                nvidia,slew-rate-falling = <3>;
+                        };
+                };
+
+                state_i2cmux_ddc: pinmux_i2cmux_ddc {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "i2c2";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "rsvd4";
+                        };
+                };
+
+                state_i2cmux_pta: pinmux_i2cmux_pta {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "rsvd4";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "i2c2";
+                        };
+                };
+
+                state_i2cmux_idle: pinmux_i2cmux_idle {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "rsvd4";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "rsvd4";
+                        };
                 };
         };
 
@@ -281,6 +323,31 @@
                 clock-frequency = <400000>;
         };
 
+        i2cmux {
+                compatible = "i2c-mux-pinctrl";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                i2c-parent = <&{/i2c@7000c400}>;
+
+                pinctrl-names = "ddc", "pta", "idle";
+                pinctrl-0 = <&state_i2cmux_ddc>;
+                pinctrl-1 = <&state_i2cmux_pta>;
+                pinctrl-2 = <&state_i2cmux_idle>;
+
+                i2c@0 {
+                        reg = <0>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                i2c@1 {
+                        reg = <1>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+        };
+
         i2c@7000c500 {
                 status = "okay";
                 clock-frequency = <400000>;
@@ -406,6 +473,11 @@
                                 };
                         };
                 };
+
+                temperature-sensor@4c {
+                        compatible = "onnn,nct1008";
+                        reg = <0x4c>;
+                };
         };
 
         pmc {
@@ -425,6 +497,12 @@
                 status = "okay";
         };
 
+        sdhci@c8000000 {
+                status = "okay";
+                power-gpios = <&gpio 86 0>; /* gpio PK6 */
+                bus-width = <4>;
+        };
+
         sdhci@c8000400 {
                 status = "okay";
                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index 94a71c91beb5..20d576ecd555 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -10,6 +10,18 @@
                 reg = <0x00000000 0x20000000>;
         };
 
+        host1x {
+                hdmi {
+                        status = "okay";
+
+                        vdd-supply = <&hdmi_vdd_reg>;
+                        pll-supply = <&hdmi_pll_reg>;
+
+                        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+                        nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+                };
+        };
+
         pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
@@ -246,6 +258,11 @@
                 clock-frequency = <216000000>;
         };
 
+        hdmi_ddc: i2c@7000c400 {
+                status = "okay";
+                clock-frequency = <100000>;
+        };
+
         i2c@7000d000 {
                 status = "okay";
                 clock-frequency = <100000>;
@@ -356,7 +373,7 @@
                                         regulator-always-on;
                                 };
 
-                                ldo6 {
+                                hdmi_pll_reg: ldo6 {
                                         regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
@@ -388,7 +405,7 @@
                                         regulator-always-on;
                                 };
 
-                                ldo11 {
+                                hdmi_vdd_reg: ldo11 {
                                         regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index f40cfbaa7c7e..fba998e3954a 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -4,6 +4,93 @@
         compatible = "nvidia,tegra20";
         interrupt-parent = <&intc>;
 
+        host1x {
+                compatible = "nvidia,tegra20-host1x", "simple-bus";
+                reg = <0x50000000 0x00024000>;
+                interrupts = <0 65 0x04   /* mpcore syncpt */
+                              0 67 0x04>; /* mpcore general */
+
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                ranges = <0x54000000 0x54000000 0x04000000>;
+
+                mpe {
+                        compatible = "nvidia,tegra20-mpe";
+                        reg = <0x54040000 0x00040000>;
+                        interrupts = <0 68 0x04>;
+                };
+
+                vi {
+                        compatible = "nvidia,tegra20-vi";
+                        reg = <0x54080000 0x00040000>;
+                        interrupts = <0 69 0x04>;
+                };
+
+                epp {
+                        compatible = "nvidia,tegra20-epp";
+                        reg = <0x540c0000 0x00040000>;
+                        interrupts = <0 70 0x04>;
+                };
+
+                isp {
+                        compatible = "nvidia,tegra20-isp";
+                        reg = <0x54100000 0x00040000>;
+                        interrupts = <0 71 0x04>;
+                };
+
+                gr2d {
+                        compatible = "nvidia,tegra20-gr2d";
+                        reg = <0x54140000 0x00040000>;
+                        interrupts = <0 72 0x04>;
+                };
+
+                gr3d {
+                        compatible = "nvidia,tegra20-gr3d";
+                        reg = <0x54180000 0x00040000>;
+                };
+
+                dc@54200000 {
+                        compatible = "nvidia,tegra20-dc";
+                        reg = <0x54200000 0x00040000>;
+                        interrupts = <0 73 0x04>;
+
+                        rgb {
+                                status = "disabled";
+                        };
+                };
+
+                dc@54240000 {
+                        compatible = "nvidia,tegra20-dc";
+                        reg = <0x54240000 0x00040000>;
+                        interrupts = <0 74 0x04>;
+
+                        rgb {
+                                status = "disabled";
+                        };
+                };
+
+                hdmi {
+                        compatible = "nvidia,tegra20-hdmi";
+                        reg = <0x54280000 0x00040000>;
+                        interrupts = <0 75 0x04>;
+                        status = "disabled";
+                };
+
+                tvo {
+                        compatible = "nvidia,tegra20-tvo";
+                        reg = <0x542c0000 0x00040000>;
+                        interrupts = <0 76 0x04>;
+                        status = "disabled";
+                };
+
+                dsi {
+                        compatible = "nvidia,tegra20-dsi";
+                        reg = <0x54300000 0x00040000>;
+                        status = "disabled";
+                };
+        };
+
         cache-controller@50043000 {
                 compatible = "arm,pl310-cache";
                 reg = <0x50043000 0x1000>;
@@ -147,6 +234,16 @@
                 status = "disabled";
         };
 
+        spi@7000c380 {
+                compatible = "nvidia,tegra20-sflash";
+                reg = <0x7000c380 0x80>;
+                interrupts = <0 39 0x04>;
+                nvidia,dma-request-selector = <&apbdma 11>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
         i2c@7000c400 {
                 compatible = "nvidia,tegra20-i2c";
                 reg = <0x7000c400 0x100>;
@@ -174,6 +271,46 @@
                 status = "disabled";
         };
 
+        spi@7000d400 {
+                compatible = "nvidia,tegra20-slink";
+                reg = <0x7000d400 0x200>;
+                interrupts = <0 59 0x04>;
+                nvidia,dma-request-selector = <&apbdma 15>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000d600 {
+                compatible = "nvidia,tegra20-slink";
+                reg = <0x7000d600 0x200>;
+                interrupts = <0 82 0x04>;
+                nvidia,dma-request-selector = <&apbdma 16>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000d800 {
+                compatible = "nvidia,tegra20-slink";
+                reg = <0x7000d480 0x200>;
+                interrupts = <0 83 0x04>;
+                nvidia,dma-request-selector = <&apbdma 17>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000da00 {
+                compatible = "nvidia,tegra20-slink";
+                reg = <0x7000da00 0x200>;
+                interrupts = <0 93 0x04>;
+                nvidia,dma-request-selector = <&apbdma 18>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
         pmc {
                 compatible = "nvidia,tegra20-pmc";
                 reg = <0x7000e400 0x400>;
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
index dd4222f00eca..adc88aa50eb6 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a02.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
@@ -83,5 +83,11 @@
                         gpio = <&gpio 83 0>; /* GPIO PK3 */
                 };
         };
+
+        sdhci@78000400 {
+                status = "okay";
+                power-gpios = <&gpio 28 0>; /* gpio PD4 */
+                bus-width = <4>;
+        };
 };
 
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
index 0828f097ca86..08163e145d57 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
@@ -95,4 +95,10 @@
                         gpio = <&gpio 232 0>; /* GPIO PDD0 */
                 };
         };
+
+        sdhci@78000400 {
+                status = "okay";
+                power-gpios = <&gpio 27 0>; /* gpio PD3 */
+                bus-width = <4>;
+        };
 };
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index b1271a894327..bdb2a660f376 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -52,6 +52,22 @@
                                 nvidia,pull = <2>;
                                 nvidia,tristate = <0>;
                         };
+                        sdmmc3_clk_pa6 {
+                                nvidia,pins = "sdmmc3_clk_pa6";
+                                nvidia,function = "sdmmc3";
+                                nvidia,pull = <0>;
+                                nvidia,tristate = <0>;
+                        };
+                        sdmmc3_cmd_pa7 {
+                                nvidia,pins =   "sdmmc3_cmd_pa7",
+                                                "sdmmc3_dat0_pb7",
+                                                "sdmmc3_dat1_pb6",
+                                                "sdmmc3_dat2_pb5",
+                                                "sdmmc3_dat3_pb4";
+                                nvidia,function = "sdmmc3";
+                                nvidia,pull = <2>;
+                                nvidia,tristate = <0>;
+                        };
                         sdmmc4_clk_pcc4 {
                                 nvidia,pins =   "sdmmc4_clk_pcc4",
                                                 "sdmmc4_rst_n_pcc3";
@@ -81,6 +97,15 @@
                                 nvidia,pull = <0>;
                                 nvidia,tristate = <0>;
                         };
+                        sdio3 {
+                                nvidia,pins = "drive_sdio3";
+                                nvidia,high-speed-mode = <0>;
+                                nvidia,schmitt = <0>;
+                                nvidia,pull-down-strength = <46>;
+                                nvidia,pull-up-strength = <42>;
+                                nvidia,slew-rate-rising = <1>;
+                                nvidia,slew-rate-falling = <1>;
+                        };
                 };
         };
 
@@ -250,6 +275,16 @@
                 };
         };
 
+        spi@7000da00 {
+                status = "okay";
+                spi-max-frequency = <25000000>;
+                spi-flash@1 {
+                        compatible = "winbond,w25q32";
+                        reg = <1>;
+                        spi-max-frequency = <20000000>;
+                };
+        };
+
         ahub {
                 i2s@70080400 {
                         status = "okay";
@@ -384,6 +419,8 @@
                         regulator-name = "vdd_com";
                         regulator-min-microvolt = <3300000>;
                         regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                        regulator-boot-on;
                         enable-active-high;
                         gpio = <&gpio 24 0>; /* gpio PD0 */
                         vin-supply = <&sys_3v3_reg>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index fed8dca1692d..efa603d47a6a 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -4,6 +4,93 @@
         compatible = "nvidia,tegra30";
         interrupt-parent = <&intc>;
 
+        host1x {
+                compatible = "nvidia,tegra30-host1x", "simple-bus";
+                reg = <0x50000000 0x00024000>;
+                interrupts = <0 65 0x04   /* mpcore syncpt */
+                              0 67 0x04>; /* mpcore general */
+
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                ranges = <0x54000000 0x54000000 0x04000000>;
+
+                mpe {
+                        compatible = "nvidia,tegra30-mpe";
+                        reg = <0x54040000 0x00040000>;
+                        interrupts = <0 68 0x04>;
+                };
+
+                vi {
+                        compatible = "nvidia,tegra30-vi";
+                        reg = <0x54080000 0x00040000>;
+                        interrupts = <0 69 0x04>;
+                };
+
+                epp {
+                        compatible = "nvidia,tegra30-epp";
+                        reg = <0x540c0000 0x00040000>;
+                        interrupts = <0 70 0x04>;
+                };
+
+                isp {
+                        compatible = "nvidia,tegra30-isp";
+                        reg = <0x54100000 0x00040000>;
+                        interrupts = <0 71 0x04>;
+                };
+
+                gr2d {
+                        compatible = "nvidia,tegra30-gr2d";
+                        reg = <0x54140000 0x00040000>;
+                        interrupts = <0 72 0x04>;
+                };
+
+                gr3d {
+                        compatible = "nvidia,tegra30-gr3d";
+                        reg = <0x54180000 0x00040000>;
+                };
+
+                dc@54200000 {
+                        compatible = "nvidia,tegra30-dc";
+                        reg = <0x54200000 0x00040000>;
+                        interrupts = <0 73 0x04>;
+
+                        rgb {
+                                status = "disabled";
+                        };
+                };
+
+                dc@54240000 {
+                        compatible = "nvidia,tegra30-dc";
+                        reg = <0x54240000 0x00040000>;
+                        interrupts = <0 74 0x04>;
+
+                        rgb {
+                                status = "disabled";
+                        };
+                };
+
+                hdmi {
+                        compatible = "nvidia,tegra30-hdmi";
+                        reg = <0x54280000 0x00040000>;
+                        interrupts = <0 75 0x04>;
+                        status = "disabled";
+                };
+
+                tvo {
+                        compatible = "nvidia,tegra30-tvo";
+                        reg = <0x542c0000 0x00040000>;
+                        interrupts = <0 76 0x04>;
+                        status = "disabled";
+                };
+
+                dsi {
+                        compatible = "nvidia,tegra30-dsi";
+                        reg = <0x54300000 0x00040000>;
+                        status = "disabled";
+                };
+        };
+
         cache-controller@50043000 {
                 compatible = "arm,pl310-cache";
                 reg = <0x50043000 0x1000>;
@@ -177,6 +264,66 @@
                 status = "disabled";
         };
 
+        spi@7000d400 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000d400 0x200>;
+                interrupts = <0 59 0x04>;
+                nvidia,dma-request-selector = <&apbdma 15>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000d600 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000d600 0x200>;
+                interrupts = <0 82 0x04>;
+                nvidia,dma-request-selector = <&apbdma 16>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000d800 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000d480 0x200>;
+                interrupts = <0 83 0x04>;
+                nvidia,dma-request-selector = <&apbdma 17>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000da00 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000da00 0x200>;
+                interrupts = <0 93 0x04>;
+                nvidia,dma-request-selector = <&apbdma 18>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000dc00 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000dc00 0x200>;
+                interrupts = <0 94 0x04>;
+                nvidia,dma-request-selector = <&apbdma 27>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000de00 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000de00 0x200>;
+                interrupts = <0 79 0x04>;
+                nvidia,dma-request-selector = <&apbdma 28>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
         pmc {
                 compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
                 reg = <0x7000e400 0x400>;
diff --git a/arch/arm/boot/dts/u9540.dts b/arch/arm/boot/dts/u9540.dts
new file mode 100644
index 000000000000..95892ec6c342
--- /dev/null
+++ b/arch/arm/boot/dts/u9540.dts
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "dbx5x0.dtsi"
+
+/ {
+        model = "ST-Ericsson U9540 platform with Device Tree";
+        compatible = "st-ericsson,u9540";
+
+        memory {
+                reg = <0x00000000 0x20000000>;
+        };
+
+        soc-u9500 {
+                uart@80120000 {
+                        status = "okay";
+                };
+
+                uart@80121000 {
+                        status = "okay";
+                };
+
+                uart@80007000 {
+                        status = "okay";
+                };
+
+                // External Micro SD slot
+                sdi0_per1@80126000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <100000000>;
+                        bus-width = <4>;
+                        mmc-cap-sd-highspeed;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
+
+                        cd-gpios  = <&gpio7 6 0x4>; // 230
+                        cd-inverted;
+
+                        status = "okay";
+                };
+
+
+                // WLAN SDIO channel
+                sdi1_per2@80118000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+
+                        status = "okay";
+                };
+
+                // On-board eMMC
+                sdi4_per2@80114000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <100000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
+
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
new file mode 100644
index 000000000000..401c1262d4ed
--- /dev/null
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -0,0 +1,166 @@
+/*
+ *  Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+/include/ "skeleton.dtsi"
+
+/ {
+        compatible = "xlnx,zynq-7000";
+
+        amba {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                interrupt-parent = <&intc>;
+                ranges;
+
+                intc: interrupt-controller@f8f01000 {
+                        compatible = "arm,cortex-a9-gic";
+                        #interrupt-cells = <3>;
+                        #address-cells = <1>;
+                        interrupt-controller;
+                        reg = <0xF8F01000 0x1000>,
+                              <0xF8F00100 0x100>;
+                };
+
+                L2: cache-controller {
+                        compatible = "arm,pl310-cache";
+                        reg = <0xF8F02000 0x1000>;
+                        arm,data-latency = <2 3 2>;
+                        arm,tag-latency = <2 3 2>;
+                        cache-unified;
+                        cache-level = <2>;
+                };
+
+                uart0: uart@e0000000 {
+                        compatible = "xlnx,xuartps";
+                        reg = <0xE0000000 0x1000>;
+                        interrupts = <0 27 4>;
+                        clock = <50000000>;
+                };
+
+                uart1: uart@e0001000 {
+                        compatible = "xlnx,xuartps";
+                        reg = <0xE0001000 0x1000>;
+                        interrupts = <0 50 4>;
+                        clock = <50000000>;
+                };
+
+                slcr: slcr@f8000000 {
+                        compatible = "xlnx,zynq-slcr";
+                        reg = <0xF8000000 0x1000>;
+
+                        clocks {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                ps_clk: ps_clk {
+                                        #clock-cells = <0>;
+                                        compatible = "fixed-clock";
+                                        /* clock-frequency set in board-specific file */
+                                        clock-output-names = "ps_clk";
+                                };
+                                armpll: armpll {
+                                        #clock-cells = <0>;
+                                        compatible = "xlnx,zynq-pll";
+                                        clocks = <&ps_clk>;
+                                        reg = <0x100 0x110>;
+                                        clock-output-names = "armpll";
+                                };
+                                ddrpll: ddrpll {
+                                        #clock-cells = <0>;
+                                        compatible = "xlnx,zynq-pll";
+                                        clocks = <&ps_clk>;
+                                        reg = <0x104 0x114>;
+                                        clock-output-names = "ddrpll";
+                                };
+                                iopll: iopll {
+                                        #clock-cells = <0>;
+                                        compatible = "xlnx,zynq-pll";
+                                        clocks = <&ps_clk>;
+                                        reg = <0x108 0x118>;
+                                        clock-output-names = "iopll";
+                                };
+                                uart_clk: uart_clk {
+                                        #clock-cells = <1>;
+                                        compatible = "xlnx,zynq-periph-clock";
+                                        clocks = <&iopll &armpll &ddrpll>;
+                                        reg = <0x154>;
+                                        clock-output-names = "uart0_ref_clk",
+                                                             "uart1_ref_clk";
+                                };
+                                cpu_clk: cpu_clk {
+                                        #clock-cells = <1>;
+                                        compatible = "xlnx,zynq-cpu-clock";
+                                        clocks = <&iopll &armpll &ddrpll>;
+                                        reg = <0x120 0x1C4>;
+                                        clock-output-names = "cpu_6x4x",
+                                                             "cpu_3x2x",
+                                                             "cpu_2x",
+                                                             "cpu_1x";
+                                };
+                        };
+                };
+
+                ttc0: ttc0@f8001000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "xlnx,ttc";
+                        reg = <0xF8001000 0x1000>;
+                        clocks = <&cpu_clk 3>;
+                        clock-names = "cpu_1x";
+                        clock-ranges;
+
+                        ttc0_0: ttc0.0 {
+                                status = "disabled";
+                                reg = <0>;
+                                interrupts = <0 10 4>;
+                        };
+                        ttc0_1: ttc0.1 {
+                                status = "disabled";
+                                reg = <1>;
+                                interrupts = <0 11 4>;
+                        };
+                        ttc0_2: ttc0.2 {
+                                status = "disabled";
+                                reg = <2>;
+                                interrupts = <0 12 4>;
+                        };
+                };
+
+                ttc1: ttc1@f8002000 {
+                        #interrupt-parent = <&intc>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "xlnx,ttc";
+                        reg = <0xF8002000 0x1000>;
+                        clocks = <&cpu_clk 3>;
+                        clock-names = "cpu_1x";
+                        clock-ranges;
+
+                        ttc1_0: ttc1.0 {
+                                status = "disabled";
+                                reg = <0>;
+                                interrupts = <0 37 4>;
+                        };
+                        ttc1_1: ttc1.1 {
+                                status = "disabled";
+                                reg = <1>;
+                                interrupts = <0 38 4>;
+                        };
+                        ttc1_2: ttc1.2 {
+                                status = "disabled";
+                                reg = <2>;
+                                interrupts = <0 39 4>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts
deleted file mode 100644
index 574bc044f572..000000000000
--- a/arch/arm/boot/dts/zynq-ep107.dts
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- *  Copyright (C) 2011 Xilinx
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/dts-v1/;
-/ {
-        model = "Xilinx Zynq EP107";
-        compatible = "xlnx,zynq-ep107";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&intc>;
-
-        memory {
-                device_type = "memory";
-                reg = <0x0 0x10000000>;
-        };
-
-        chosen {
-                bootargs = "console=ttyPS0,9600 root=/dev/ram rw initrd=0x800000,8M earlyprintk";
-                linux,stdout-path = &uart0;
-        };
-
-        amba {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <1>;
-                ranges;
-
-                intc: interrupt-controller@f8f01000 {
-                        compatible = "arm,cortex-a9-gic";
-                        #interrupt-cells = <3>;
-                        #address-cells = <1>;
-                        interrupt-controller;
-                        reg = <0xF8F01000 0x1000>,
-                              <0xF8F00100 0x100>;
-                };
-
-                L2: cache-controller {
-                        compatible = "arm,pl310-cache";
-                        reg = <0xF8F02000 0x1000>;
-                        arm,data-latency = <2 3 2>;
-                        arm,tag-latency = <2 3 2>;
-                        cache-unified;
-                        cache-level = <2>;
-                };
-
-                uart0: uart@e0000000 {
-                        compatible = "xlnx,xuartps";
-                        reg = <0xE0000000 0x1000>;
-                        interrupts = <0 27 4>;
-                        clock = <50000000>;
-                };
-        };
-};
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
new file mode 100644
index 000000000000..c772942a399a
--- /dev/null
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -0,0 +1,44 @@
+/*
+ *  Copyright (C) 2011 Xilinx
+ *  Copyright (C) 2012 National Instruments Corp.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+        model = "Zynq ZC702 Development Board";
+        compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x40000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyPS1,115200 earlyprintk";
+        };
+
+};
+
+&ps_clk {
+        clock-frequency = <33333330>;
+};
+
+&ttc0_0 {
+        status = "ok";
+        compatible = "xlnx,ttc-counter-clocksource";
+};
+
+&ttc0_1 {
+        status = "ok";
+        compatible = "xlnx,ttc-counter-clockevent";
+};
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index 048aaca60814..7bf535104e26 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -61,6 +61,8 @@ CONFIG_MTD_NAND_GPMI_NAND=y
 CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_ENC28J60=y
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_SMSC95XX=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_WLAN is not set
@@ -158,6 +160,10 @@ CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=y
 CONFIG_PRINTK_TIME=y
 CONFIG_FRAME_WARN=2048
 CONFIG_MAGIC_SYSRQ=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 250625d5223f..231dca604737 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -78,6 +78,7 @@ CONFIG_AB8500_CORE=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_AB8500=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_GPIO=y
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB_GADGET=y
 CONFIG_AB8500_USB=y
diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S
index 0b65d792f664..0c4e17d4d359 100644
--- a/arch/arm/include/debug/imx.S
+++ b/arch/arm/include/debug/imx.S
@@ -10,6 +10,20 @@
  * published by the Free Software Foundation.
  *
  */
+#define IMX6Q_UART1_BASE_ADDR   0x02020000
+#define IMX6Q_UART2_BASE_ADDR   0x021e8000
+#define IMX6Q_UART3_BASE_ADDR   0x021ec000
+#define IMX6Q_UART4_BASE_ADDR   0x021f0000
+#define IMX6Q_UART5_BASE_ADDR   0x021f4000
+
+/*
+ * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
+ * of IMX6Q_UART##n##_BASE_ADDR.
+ */
+#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
+#define IMX6Q_UART_BASE(n)      IMX6Q_UART_BASE_ADDR(n)
+#define IMX6Q_DEBUG_UART_BASE   IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
+
 #ifdef CONFIG_DEBUG_IMX1_UART
 #define UART_PADDR      0x00206000
 #elif defined (CONFIG_DEBUG_IMX25_UART)
@@ -22,10 +36,8 @@
 #define UART_PADDR      0x73fbc000
 #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
 #define UART_PADDR      0x53fbc000
-#elif defined (CONFIG_DEBUG_IMX6Q_UART2)
-#define UART_PADDR      0x021e8000
-#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
-#define UART_PADDR      0x021f0000
+#elif defined (CONFIG_DEBUG_IMX6Q_UART)
+#define UART_PADDR      IMX6Q_DEBUG_UART_BASE
 #endif
 
 /*
diff --git a/arch/arm/mach-davinci/Makefile.boot b/arch/arm/mach-davinci/Makefile.boot
index 5c5a95a9d7d2..04a6c4e67b14 100644
--- a/arch/arm/mach-davinci/Makefile.boot
+++ b/arch/arm/mach-davinci/Makefile.boot
@@ -11,5 +11,3 @@ else
 params_phys-y   := 0x80000100
 initrd_phys-y   := 0x80800000
 endif
-
-dtb-$(CONFIG_MACH_DA8XX_DT)     += da850-enbw-cmc.dtb da850-evm.dtb
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 070c7b6d3d86..91d5b6f1d5af 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -63,6 +63,7 @@ config SOC_EXYNOS5250
         depends on ARCH_EXYNOS5
         select S5P_PM if PM
         select S5P_SLEEP if PM
+        select S5P_DEV_MFC
         select SAMSUNG_DMADEV
         help
           Enable EXYNOS5250 SoC support
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 66135eedf491..b189881657ec 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -52,7 +52,6 @@ obj-$(CONFIG_ARCH_EXYNOS4)		+= dev-audio.o
 obj-$(CONFIG_EXYNOS4_DEV_AHCI)          += dev-ahci.o
 obj-$(CONFIG_EXYNOS_DEV_DMA)            += dma.o
 obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI)      += dev-ohci.o
-obj-$(CONFIG_EXYNOS_DEV_DRM)            += dev-drm.o
 obj-$(CONFIG_EXYNOS_DEV_SYSMMU)         += dev-sysmmu.o
 
 obj-$(CONFIG_ARCH_EXYNOS)               += setup-i2c0.o
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index fa8a13405c94..efead60b9436 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -576,6 +576,10 @@ static struct clk exynos4_init_clocks_off[] = {
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 15),
         }, {
+                .name           = "tmu_apbif",
+                .enable         = exynos4_clk_ip_perir_ctrl,
+                .ctrlbit        = (1 << 17),
+        }, {
                 .name           = "keypad",
                 .enable         = exynos4_clk_ip_perir_ctrl,
                 .ctrlbit        = (1 << 16),
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index 4478757b9301..7652f5d78a56 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -196,6 +196,11 @@ static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable)
         return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable);
 }
 
+static int exynos5_clk_hdmiphy_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
+}
+
 /* Core list of CMU_CPU side */
 
 static struct clksrc_clk exynos5_clk_mout_apll = {
@@ -616,6 +621,11 @@ static struct clk exynos5_init_clocks_off[] = {
                 .enable         = exynos5_clk_ip_peric_ctrl,
                 .ctrlbit        = (1 << 24),
         }, {
+                .name           = "tmu_apbif",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peris_ctrl,
+                .ctrlbit        = (1 << 21),
+        }, {
                 .name           = "rtc",
                 .parent         = &exynos5_clk_aclk_66.clk,
                 .enable         = exynos5_clk_ip_peris_ctrl,
@@ -664,17 +674,22 @@ static struct clk exynos5_init_clocks_off[] = {
                 .ctrlbit        = (1 << 25),
         }, {
                 .name           = "mfc",
-                .devname        = "s5p-mfc",
+                .devname        = "s5p-mfc-v6",
                 .enable         = exynos5_clk_ip_mfc_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "hdmi",
-                .devname        = "exynos4-hdmi",
+                .devname        = "exynos5-hdmi",
                 .enable         = exynos5_clk_ip_disp1_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
+                .name           = "hdmiphy",
+                .devname        = "exynos5-hdmi",
+                .enable         = exynos5_clk_hdmiphy_ctrl,
+                .ctrlbit        = (1 << 0),
+        }, {
                 .name           = "mixer",
-                .devname        = "s5p-mixer",
+                .devname        = "exynos5-mixer",
                 .enable         = exynos5_clk_ip_disp1_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index e05f6cca2c9b..3f257e76bfde 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -1020,11 +1020,14 @@ static int __init exynos_init_irq_eint(void)
          * platforms switch over to using the pinctrl driver, the wakeup
          * interrupt support code here can be completely removed.
          */
+        static const struct of_device_id exynos_pinctrl_ids[] = {
+                { .compatible = "samsung,pinctrl-exynos4210", },
+                { .compatible = "samsung,pinctrl-exynos4x12", },
+        };
         struct device_node *pctrl_np, *wkup_np;
-        const char *pctrl_compat = "samsung,pinctrl-exynos4210";
         const char *wkup_compat = "samsung,exynos4210-wakeup-eint";
 
-        for_each_compatible_node(pctrl_np, NULL, pctrl_compat) {
+        for_each_matching_node(pctrl_np, exynos_pinctrl_ids) {
                 if (of_device_is_available(pctrl_np)) {
                         wkup_np = of_find_compatible_node(pctrl_np, NULL,
                                                         wkup_compat);
diff --git a/arch/arm/mach-exynos/dev-drm.c b/arch/arm/mach-exynos/dev-drm.c
deleted file mode 100644
index 17c9c6ecc2e0..000000000000
--- a/arch/arm/mach-exynos/dev-drm.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos/dev-drm.c
- *
- * Copyright (c) 2012 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * EXYNOS - core DRM device
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-
-#include <plat/devs.h>
-
-static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32);
-
-struct platform_device exynos_device_drm = {
-        .name   = "exynos-drm",
-        .dev    = {
-                .dma_mask               = &exynos_drm_dma_mask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        }
-};
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index e0f0ae3e0cf9..1f4dc35cd4b9 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -136,6 +136,9 @@
 #define EXYNOS4_IRQ_TSI                 IRQ_SPI(115)
 #define EXYNOS4_IRQ_SATA                IRQ_SPI(116)
 
+#define EXYNOS4_IRQ_TMU_TRIG0           COMBINER_IRQ(2, 4)
+#define EXYNOS4_IRQ_TMU_TRIG1           COMBINER_IRQ(3, 4)
+
 #define EXYNOS4_IRQ_SYSMMU_MDMA0_0      COMBINER_IRQ(4, 0)
 #define EXYNOS4_IRQ_SYSMMU_SSS_0        COMBINER_IRQ(4, 1)
 #define EXYNOS4_IRQ_SYSMMU_FIMC0_0      COMBINER_IRQ(4, 2)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 61b74e12d12b..1df6abbf53b8 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -89,6 +89,8 @@
 #define EXYNOS4_PA_TWD                  0x10500600
 #define EXYNOS4_PA_L2CC                 0x10502000
 
+#define EXYNOS4_PA_TMU                  0x100C0000
+
 #define EXYNOS4_PA_MDMA0                0x10810000
 #define EXYNOS4_PA_MDMA1                0x12850000
 #define EXYNOS4_PA_S_MDMA1              0x12840000
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index 6df99c06419d..92757ff817ae 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -78,6 +78,8 @@ static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = {
         OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_MDMA1, "dma-pl330.2", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-tmu", EXYNOS4_PA_TMU,
+                                "exynos-tmu", NULL),
         {},
 };
 
@@ -95,6 +97,8 @@ static void __init exynos4_dt_machine_init(void)
 
 static char const *exynos4_dt_compat[] __initdata = {
         "samsung,exynos4210",
+        "samsung,exynos4212",
+        "samsung,exynos4412",
         NULL
 };
 
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index f1326be80b91..929de766d490 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -12,6 +12,8 @@
 #include <linux/of_platform.h>
 #include <linux/of_fdt.h>
 #include <linux/serial_core.h>
+#include <linux/memblock.h>
+#include <linux/of_fdt.h>
 
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
@@ -19,6 +21,7 @@
 
 #include <plat/cpu.h>
 #include <plat/regs-serial.h>
+#include <plat/mfc.h>
 
 #include "common.h"
 
@@ -48,6 +51,20 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
                                 "s3c2440-i2c.0", NULL),
         OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
                                 "s3c2440-i2c.1", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
+                                "s3c2440-i2c.2", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3),
+                                "s3c2440-i2c.3", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4),
+                                "s3c2440-i2c.4", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5),
+                                "s3c2440-i2c.5", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6),
+                                "s3c2440-i2c.6", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7),
+                                "s3c2440-i2c.7", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
+                                "s3c2440-hdmiphy-i2c", NULL),
         OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
                                 "dw_mmc.0", NULL),
         OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
@@ -62,6 +79,12 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
                                 "exynos4210-spi.1", NULL),
         OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
                                 "exynos4210-spi.2", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000,
+                                "exynos5-sata", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000,
+                                "exynos5-sata-phy", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000,
+                                "exynos5-sata-phy-i2c", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
@@ -73,6 +96,13 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
                                 "exynos-gsc.2", NULL),
         OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
                                 "exynos-gsc.3", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
+                                "exynos5-hdmi", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
+                                "exynos5-mixer", NULL),
+        OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000,
+                                "exynos-tmu", NULL),
         {},
 };
 
@@ -108,6 +138,17 @@ static char const *exynos5_dt_compat[] __initdata = {
         NULL
 };
 
+static void __init exynos5_reserve(void)
+{
+        struct s5p_mfc_dt_meminfo mfc_mem;
+
+        /* Reserve memory for MFC only if it's available */
+        mfc_mem.compatible = "samsung,mfc-v6";
+        if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
+                s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
+                                mfc_mem.lsize);
+}
+
 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
         .init_irq       = exynos5_init_irq,
@@ -119,4 +160,5 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
         .timer          = &exynos4_timer,
         .dt_compat      = exynos5_dt_compat,
         .restart        = exynos5_restart,
+        .reserve        = exynos5_reserve,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 69359a0c8a1c..27d4ed8b116e 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -1326,9 +1326,6 @@ static struct platform_device *nuri_devices[] __initdata = {
         &cam_vdda_fixed_rdev,
         &cam_8m_12v_fixed_rdev,
         &exynos4_bus_devfreq,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
 };
 
 static void __init nuri_map_io(void)
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index c606080b5dfa..e6f4191cd14c 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -711,9 +711,6 @@ static struct platform_device *origen_devices[] __initdata = {
         &s5p_device_mfc_l,
         &s5p_device_mfc_r,
         &s5p_device_mixer,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &exynos4_device_ohci,
         &origen_device_gpiokeys,
         &origen_lcd_hv070wsa,
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index ddb92631252d..a1555a73c7af 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -317,9 +317,6 @@ static struct platform_device *smdk4x12_devices[] __initdata = {
         &s5p_device_mfc,
         &s5p_device_mfc_l,
         &s5p_device_mfc_r,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &samsung_device_keypad,
 };
 
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index 8dd6a1e8030d..063cb94b934d 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -300,9 +300,6 @@ static struct platform_device *smdkv310_devices[] __initdata = {
         &s5p_device_fimc_md,
         &s5p_device_g2d,
         &s5p_device_jpeg,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &exynos4_device_ac97,
         &exynos4_device_i2s0,
         &exynos4_device_ohci,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 2d6bc83d5c99..9e3340f18950 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -1080,9 +1080,6 @@ static struct platform_device *universal_devices[] __initdata = {
         &s5p_device_onenand,
         &s5p_device_fimd0,
         &s5p_device_jpeg,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &s3c_device_usb_hsotg,
         &s5p_device_mfc,
         &s5p_device_mfc_l,
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index c0bc83a7663e..9f1351de52f7 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -19,6 +19,8 @@
 #include <linux/pm_domain.h>
 #include <linux/delay.h>
 #include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/sched.h>
 
 #include <mach/regs-pmu.h>
 #include <plat/devs.h>
@@ -83,12 +85,88 @@ static struct exynos_pm_domain PD = {			\
 }
 
 #ifdef CONFIG_OF
+static void exynos_add_device_to_domain(struct exynos_pm_domain *pd,
+                                         struct device *dev)
+{
+        int ret;
+
+        dev_dbg(dev, "adding to power domain %s\n", pd->pd.name);
+
+        while (1) {
+                ret = pm_genpd_add_device(&pd->pd, dev);
+                if (ret != -EAGAIN)
+                        break;
+                cond_resched();
+        }
+
+        pm_genpd_dev_need_restore(dev, true);
+}
+
+static void exynos_remove_device_from_domain(struct device *dev)
+{
+        struct generic_pm_domain *genpd = dev_to_genpd(dev);
+        int ret;
+
+        dev_dbg(dev, "removing from power domain %s\n", genpd->name);
+
+        while (1) {
+                ret = pm_genpd_remove_device(genpd, dev);
+                if (ret != -EAGAIN)
+                        break;
+                cond_resched();
+        }
+}
+
+static void exynos_read_domain_from_dt(struct device *dev)
+{
+        struct platform_device *pd_pdev;
+        struct exynos_pm_domain *pd;
+        struct device_node *node;
+
+        node = of_parse_phandle(dev->of_node, "samsung,power-domain", 0);
+        if (!node)
+                return;
+        pd_pdev = of_find_device_by_node(node);
+        if (!pd_pdev)
+                return;
+        pd = platform_get_drvdata(pd_pdev);
+        exynos_add_device_to_domain(pd, dev);
+}
+
+static int exynos_pm_notifier_call(struct notifier_block *nb,
+                                    unsigned long event, void *data)
+{
+        struct device *dev = data;
+
+        switch (event) {
+        case BUS_NOTIFY_BIND_DRIVER:
+                if (dev->of_node)
+                        exynos_read_domain_from_dt(dev);
+
+                break;
+
+        case BUS_NOTIFY_UNBOUND_DRIVER:
+                exynos_remove_device_from_domain(dev);
+
+                break;
+        }
+        return NOTIFY_DONE;
+}
+
+static struct notifier_block platform_nb = {
+        .notifier_call = exynos_pm_notifier_call,
+};
+
 static __init int exynos_pm_dt_parse_domains(void)
 {
+        struct platform_device *pdev;
         struct device_node *np;
 
         for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
                 struct exynos_pm_domain *pd;
+                int on;
+
+                pdev = of_find_device_by_node(np);
 
                 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
                 if (!pd) {
@@ -97,15 +175,22 @@ static __init int exynos_pm_dt_parse_domains(void)
                         return -ENOMEM;
                 }
 
-                if (of_get_property(np, "samsung,exynos4210-pd-off", NULL))
-                        pd->is_off = true;
-                pd->name = np->name;
+                pd->pd.name = kstrdup(np->name, GFP_KERNEL);
+                pd->name = pd->pd.name;
                 pd->base = of_iomap(np, 0);
                 pd->pd.power_off = exynos_pd_power_off;
                 pd->pd.power_on = exynos_pd_power_on;
                 pd->pd.of_node = np;
-                pm_genpd_init(&pd->pd, NULL, false);
+
+                platform_set_drvdata(pdev, pd);
+
+                on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN;
+
+                pm_genpd_init(&pd->pd, NULL, !on);
         }
+
+        bus_register_notifier(&platform_bus_type, &platform_nb);
+
         return 0;
 }
 #else
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 4e24b8c77eb4..1ad0d76de8c7 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -272,6 +272,13 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD
 
 endchoice
 
+config MACH_IMX25_DT
+        bool "Support i.MX25 platforms from device tree"
+        select SOC_IMX25
+        help
+          Include support for Freescale i.MX25 based platforms
+          using the device tree for discovery
+
 comment "MX27 platforms:"
 
 config MACH_MX27ADS
@@ -831,7 +838,14 @@ config	SOC_IMX53
 
 config SOC_IMX6Q
         bool "i.MX6 Quad support"
+        select ARCH_HAS_CPUFREQ
+        select ARCH_HAS_OPP
         select ARM_CPU_SUSPEND if PM
+        select ARM_ERRATA_743622
+        select ARM_ERRATA_751472
+        select ARM_ERRATA_754322
+        select ARM_ERRATA_764369 if SMP
+        select ARM_ERRATA_775420
         select ARM_GIC
         select COMMON_CLK
         select CPU_V7
@@ -843,6 +857,10 @@ config SOC_IMX6Q
         select MFD_SYSCON
         select PINCTRL
         select PINCTRL_IMX6Q
+        select PL310_ERRATA_588369 if CACHE_PL310
+        select PL310_ERRATA_727915 if CACHE_PL310
+        select PL310_ERRATA_769419 if CACHE_PL310
+        select PM_OPP if PM
 
         help
           This enables support for Freescale i.MX6 Quad processor.
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index fe47b71469c9..0634b3152c24 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
 obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
 obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
 obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
+obj-$(CONFIG_MACH_IMX25_DT) += imx25-dt.o
 
 # i.MX27 based machines
 obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index bc885801cd68..b197aa73dc4b 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -23,6 +23,9 @@
 #include <linux/io.h>
 #include <linux/clkdev.h>
 #include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
 #include "clk.h"
 #include "common.h"
@@ -55,6 +58,8 @@
 
 #define ccm(x)  (CRM_BASE + (x))
 
+static struct clk_onecell_data clk_data;
+
 static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", };
 static const char *per_sel_clks[] = { "ahb", "upll", };
 
@@ -64,24 +69,30 @@ enum mx25_clks {
         per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel,
         per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5,
         per6, per7, per8, per9, per10, per11, per12, per13, per14, per15,
-        csi_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per, gpt_ipg_per, i2c_ipg_per,
-        lcdc_ipg_per, nfc_ipg_per, ssi1_ipg_per, ssi2_ipg_per, uart_ipg_per,
-        csi_ahb, esdhc1_ahb, esdhc2_ahb, fec_ahb, lcdc_ahb, sdma_ahb,
-        usbotg_ahb, can1_ipg, can2_ipg, csi_ipg, cspi1_ipg, cspi2_ipg,
-        cspi3_ipg, dryice_ipg, esdhc1_ipg, esdhc2_ipg, fec_ipg, iim_ipg,
-        kpp_ipg, lcdc_ipg, pwm1_ipg, pwm2_ipg, pwm3_ipg, pwm4_ipg, sdma_ipg,
-        ssi1_ipg, ssi2_ipg, tsc_ipg, uart1_ipg, uart2_ipg, uart3_ipg,
-        uart4_ipg, uart5_ipg, wdt_ipg, clk_max
+        csi_ipg_per, epit_ipg_per, esai_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per,
+        gpt_ipg_per, i2c_ipg_per, lcdc_ipg_per, nfc_ipg_per, owire_ipg_per,
+        pwm_ipg_per, sim1_ipg_per, sim2_ipg_per, ssi1_ipg_per, ssi2_ipg_per,
+        uart_ipg_per, ata_ahb, reserved1, csi_ahb, emi_ahb, esai_ahb, esdhc1_ahb,
+        esdhc2_ahb, fec_ahb, lcdc_ahb, rtic_ahb, sdma_ahb, slcdc_ahb, usbotg_ahb,
+        reserved2, reserved3, reserved4, reserved5, can1_ipg, can2_ipg, csi_ipg,
+        cspi1_ipg, cspi2_ipg, cspi3_ipg, dryice_ipg, ect_ipg, epit1_ipg, epit2_ipg,
+        reserved6, esdhc1_ipg, esdhc2_ipg, fec_ipg, reserved7, reserved8, reserved9,
+        gpt1_ipg, gpt2_ipg, gpt3_ipg, gpt4_ipg, reserved10, reserved11, reserved12,
+        iim_ipg, reserved13, reserved14, kpp_ipg, lcdc_ipg, reserved15, pwm1_ipg,
+        pwm2_ipg, pwm3_ipg, pwm4_ipg, rngb_ipg, reserved16, scc_ipg, sdma_ipg,
+        sim1_ipg, sim2_ipg, slcdc_ipg, spba_ipg, ssi1_ipg, ssi2_ipg, tsc_ipg,
+        uart1_ipg, uart2_ipg, uart3_ipg, uart4_ipg, uart5_ipg, reserved17,
+        wdt_ipg, clk_max
 };
 
 static struct clk *clk[clk_max];
 
-int __init mx25_clocks_init(void)
+static int __init __mx25_clocks_init(unsigned long osc_rate)
 {
         int i;
 
         clk[dummy] = imx_clk_fixed("dummy", 0);
-        clk[osc] = imx_clk_fixed("osc", 24000000);
+        clk[osc] = imx_clk_fixed("osc", osc_rate);
         clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL));
         clk[upll] = imx_clk_pllv1("upll", "osc", ccm(CCM_UPCTL));
         clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4);
@@ -123,22 +134,36 @@ int __init mx25_clocks_init(void)
         clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6);
         clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6);
         clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0);
+        clk[epit_ipg_per] = imx_clk_gate("epit_ipg_per", "per1", ccm(CCM_CGCR0),  1);
+        clk[esai_ipg_per] = imx_clk_gate("esai_ipg_per", "per2", ccm(CCM_CGCR0),  2);
         clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0),  3);
         clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0),  4);
         clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0),  5);
         clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0),  6);
         clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0),  7);
         clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0),  8);
+        clk[owire_ipg_per] = imx_clk_gate("owire_ipg_per", "per9", ccm(CCM_CGCR0),  9);
+        clk[pwm_ipg_per] = imx_clk_gate("pwm_ipg_per", "per10", ccm(CCM_CGCR0),  10);
+        clk[sim1_ipg_per] = imx_clk_gate("sim1_ipg_per", "per11", ccm(CCM_CGCR0),  11);
+        clk[sim2_ipg_per] = imx_clk_gate("sim2_ipg_per", "per12", ccm(CCM_CGCR0),  12);
         clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);
         clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);
         clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);
+        clk[ata_ahb] = imx_clk_gate("ata_ahb", "ahb", ccm(CCM_CGCR0), 16);
+        /* CCM_CGCR0(17): reserved */
         clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18);
+        clk[emi_ahb] = imx_clk_gate("emi_ahb", "ahb", ccm(CCM_CGCR0), 19);
+        clk[esai_ahb] = imx_clk_gate("esai_ahb", "ahb", ccm(CCM_CGCR0), 20);
         clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21);
         clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22);
         clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23);
         clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24);
+        clk[rtic_ahb] = imx_clk_gate("rtic_ahb", "ahb", ccm(CCM_CGCR0), 25);
         clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26);
+        clk[slcdc_ahb] = imx_clk_gate("slcdc_ahb", "ahb", ccm(CCM_CGCR0), 27);
         clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28);
+        /* CCM_CGCR0(29-31): reserved */
+        /* CCM_CGCR1(0): reserved in datasheet, used as audmux in FSL kernel */
         clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1),  2);
         clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1),  3);
         clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1),  4);
@@ -146,17 +171,41 @@ int __init mx25_clocks_init(void)
         clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1),  6);
         clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1),  7);
         clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1),  8);
+        clk[ect_ipg] = imx_clk_gate("ect_ipg", "ipg", ccm(CCM_CGCR1),  9);
+        clk[epit1_ipg] = imx_clk_gate("epit1_ipg", "ipg", ccm(CCM_CGCR1),  10);
+        clk[epit2_ipg] = imx_clk_gate("epit2_ipg", "ipg", ccm(CCM_CGCR1),  11);
+        /* CCM_CGCR1(12): reserved in datasheet, used as esai in FSL kernel */
         clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13);
         clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14);
         clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15);
+        /* CCM_CGCR1(16): reserved in datasheet, used as gpio1 in FSL kernel */
+        /* CCM_CGCR1(17): reserved in datasheet, used as gpio2 in FSL kernel */
+        /* CCM_CGCR1(18): reserved in datasheet, used as gpio3 in FSL kernel */
+        clk[gpt1_ipg] = imx_clk_gate("gpt1_ipg", "ipg", ccm(CCM_CGCR1), 19);
+        clk[gpt2_ipg] = imx_clk_gate("gpt2_ipg", "ipg", ccm(CCM_CGCR1), 20);
+        clk[gpt3_ipg] = imx_clk_gate("gpt3_ipg", "ipg", ccm(CCM_CGCR1), 21);
+        clk[gpt4_ipg] = imx_clk_gate("gpt4_ipg", "ipg", ccm(CCM_CGCR1), 22);
+        /* CCM_CGCR1(23): reserved in datasheet, used as i2c1 in FSL kernel */
+        /* CCM_CGCR1(24): reserved in datasheet, used as i2c2 in FSL kernel */
+        /* CCM_CGCR1(25): reserved in datasheet, used as i2c3 in FSL kernel */
         clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26);
+        /* CCM_CGCR1(27): reserved in datasheet, used as iomuxc in FSL kernel */
+        /* CCM_CGCR1(28): reserved in datasheet, used as kpp in FSL kernel */
         clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28);
         clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29);
+        /* CCM_CGCR1(30): reserved in datasheet, used as owire in FSL kernel */
         clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31);
         clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2),  0);
         clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2),  1);
         clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2),  2);
+        clk[rngb_ipg] = imx_clk_gate("rngb_ipg", "ipg", ccm(CCM_CGCR2),  3);
+        /* CCM_CGCR2(4): reserved in datasheet, used as rtic in FSL kernel */
+        clk[scc_ipg] = imx_clk_gate("scc_ipg", "ipg", ccm(CCM_CGCR2),  5);
         clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2),  6);
+        clk[sim1_ipg] = imx_clk_gate("sim1_ipg", "ipg", ccm(CCM_CGCR2),  7);
+        clk[sim2_ipg] = imx_clk_gate("sim2_ipg", "ipg", ccm(CCM_CGCR2),  8);
+        clk[slcdc_ipg] = imx_clk_gate("slcdc_ipg", "ipg", ccm(CCM_CGCR2),  9);
+        clk[spba_ipg] = imx_clk_gate("spba_ipg", "ipg", ccm(CCM_CGCR2),  10);
         clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11);
         clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12);
         clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13);
@@ -165,6 +214,7 @@ int __init mx25_clocks_init(void)
         clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16);
         clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17);
         clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18);
+        /* CCM_CGCR2(19): reserved in datasheet, but used as wdt in FSL kernel */
         clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19);
 
         for (i = 0; i < ARRAY_SIZE(clk); i++)
@@ -172,6 +222,18 @@ int __init mx25_clocks_init(void)
                         pr_err("i.MX25 clk %d: register failed with %ld\n",
                                 i, PTR_ERR(clk[i]));
 
+        clk_prepare_enable(clk[emi_ahb]);
+
+        clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
+        clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
+
+        return 0;
+}
+
+int __init mx25_clocks_init(void)
+{
+        __mx25_clocks_init(24000000);
+
         /* i.mx25 has the i.mx21 type uart */
         clk_register_clkdev(clk[uart1_ipg], "ipg", "imx21-uart.0");
         clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.0");
@@ -183,8 +245,6 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.3");
         clk_register_clkdev(clk[uart5_ipg], "ipg", "imx21-uart.4");
         clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.4");
-        clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
-        clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
         clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");
         clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.0");
         clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");
@@ -242,5 +302,40 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[iim_ipg], "iim", NULL);
 
         mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
+
+        return 0;
+}
+
+int __init mx25_clocks_init_dt(void)
+{
+        struct device_node *np;
+        void __iomem *base;
+        int irq;
+        unsigned long osc_rate = 24000000;
+
+        /* retrieve the freqency of fixed clocks from device tree */
+        for_each_compatible_node(np, NULL, "fixed-clock") {
+                u32 rate;
+                if (of_property_read_u32(np, "clock-frequency", &rate))
+                        continue;
+
+                if (of_device_is_compatible(np, "fsl,imx-osc"))
+                        osc_rate = rate;
+        }
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,imx25-ccm");
+        clk_data.clks = clk;
+        clk_data.clk_num = ARRAY_SIZE(clk);
+        of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+
+        __mx25_clocks_init(osc_rate);
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt");
+        base = of_iomap(np, 0);
+        WARN_ON(!base);
+        irq = irq_of_parse_and_map(np, 0);
+
+        mxc_timer_init(base, irq);
+
         return 0;
 }
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 448476958e7f..7f2c10c7413a 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -424,6 +424,7 @@ int __init mx6q_clocks_init(void)
         clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
         clk_register_clkdev(clk[ahb], "ahb", NULL);
         clk_register_clkdev(clk[cko1], "cko1", NULL);
+        clk_register_clkdev(clk[arm], NULL, "cpu0");
 
         /*
          * The gpmi needs 100MHz frequency in the EDO/Sync mode,
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index ef8db6b34841..7191ab4434e5 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -66,6 +66,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
                         unsigned long ckih1, unsigned long ckih2);
 extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
                         unsigned long ckih1, unsigned long ckih2);
+extern int mx25_clocks_init_dt(void);
 extern int mx27_clocks_init_dt(void);
 extern int mx31_clocks_init_dt(void);
 extern int mx51_clocks_init_dt(void);
diff --git a/arch/arm/mach-imx/imx25-dt.c b/arch/arm/mach-imx/imx25-dt.c
new file mode 100644
index 000000000000..e17dfbc42192
--- /dev/null
+++ b/arch/arm/mach-imx/imx25-dt.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/irq.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include "common.h"
+#include "mx25.h"
+
+static void __init imx25_dt_init(void)
+{
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static void __init imx25_timer_init(void)
+{
+        mx25_clocks_init_dt();
+}
+
+static struct sys_timer imx25_timer = {
+        .init = imx25_timer_init,
+};
+
+static const char * const imx25_dt_board_compat[] __initconst = {
+        "fsl,imx25",
+        NULL
+};
+
+DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
+        .map_io         = mx25_map_io,
+        .init_early     = imx25_init_early,
+        .init_irq       = mx25_init_irq,
+        .handle_irq     = imx25_handle_irq,
+        .timer          = &imx25_timer,
+        .init_machine   = imx25_dt_init,
+        .dt_compat      = imx25_dt_board_compat,
+        .restart        = mxc_restart,
+MACHINE_END
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c
index 5f1510363ee7..2fdc9bf2fb5e 100644
--- a/arch/arm/mach-imx/lluart.c
+++ b/arch/arm/mach-imx/lluart.c
@@ -17,17 +17,25 @@
 
 #include "hardware.h"
 
+#define IMX6Q_UART1_BASE_ADDR   0x02020000
+#define IMX6Q_UART2_BASE_ADDR   0x021e8000
+#define IMX6Q_UART3_BASE_ADDR   0x021ec000
+#define IMX6Q_UART4_BASE_ADDR   0x021f0000
+#define IMX6Q_UART5_BASE_ADDR   0x021f4000
+
+/*
+ * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
+ * of IMX6Q_UART##n##_BASE_ADDR.
+ */
+#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
+#define IMX6Q_UART_BASE(n)      IMX6Q_UART_BASE_ADDR(n)
+#define IMX6Q_DEBUG_UART_BASE   IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
+
 static struct map_desc imx_lluart_desc = {
-#ifdef CONFIG_DEBUG_IMX6Q_UART2
-        .virtual        = MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR),
-        .pfn            = __phys_to_pfn(MX6Q_UART2_BASE_ADDR),
-        .length         = MX6Q_UART2_SIZE,
-        .type           = MT_DEVICE,
-#endif
-#ifdef CONFIG_DEBUG_IMX6Q_UART4
-        .virtual        = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR),
-        .pfn            = __phys_to_pfn(MX6Q_UART4_BASE_ADDR),
-        .length         = MX6Q_UART4_SIZE,
+#ifdef CONFIG_DEBUG_IMX6Q_UART
+        .virtual        = IMX_IO_P2V(IMX6Q_DEBUG_UART_BASE),
+        .pfn            = __phys_to_pfn(IMX6Q_DEBUG_UART_BASE),
+        .length         = 0x4000,
         .type           = MT_DEVICE,
 #endif
 };
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index cce33e433bd1..4eb1b3ac794c 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -38,6 +38,40 @@
 #include "cpuidle.h"
 #include "hardware.h"
 
+#define IMX6Q_ANALOG_DIGPROG    0x260
+
+static int imx6q_revision(void)
+{
+        struct device_node *np;
+        void __iomem *base;
+        static u32 rev;
+
+        if (!rev) {
+                np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
+                if (!np)
+                        return IMX_CHIP_REVISION_UNKNOWN;
+                base = of_iomap(np, 0);
+                if (!base) {
+                        of_node_put(np);
+                        return IMX_CHIP_REVISION_UNKNOWN;
+                }
+                rev =  readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
+                iounmap(base);
+                of_node_put(np);
+        }
+
+        switch (rev & 0xff) {
+        case 0:
+                return IMX_CHIP_REVISION_1_0;
+        case 1:
+                return IMX_CHIP_REVISION_1_1;
+        case 2:
+                return IMX_CHIP_REVISION_1_2;
+        default:
+                return IMX_CHIP_REVISION_UNKNOWN;
+        }
+}
+
 void imx6q_restart(char mode, const char *cmd)
 {
         struct device_node *np;
@@ -204,6 +238,7 @@ static void __init imx6q_timer_init(void)
 {
         mx6q_clocks_init();
         twd_local_timer_of_register();
+        imx_print_silicon_rev("i.MX6Q", imx6q_revision());
 }
 
 static struct sys_timer imx6q_timer = {
diff --git a/arch/arm/mach-imx/mx6q.h b/arch/arm/mach-imx/mx6q.h
index f7e7dbac8f4b..19d3f54db5af 100644
--- a/arch/arm/mach-imx/mx6q.h
+++ b/arch/arm/mach-imx/mx6q.h
@@ -27,9 +27,5 @@
 #define MX6Q_CCM_SIZE                   0x4000
 #define MX6Q_ANATOP_BASE_ADDR           0x020c8000
 #define MX6Q_ANATOP_SIZE                0x1000
-#define MX6Q_UART2_BASE_ADDR            0x021e8000
-#define MX6Q_UART2_SIZE                 0x4000
-#define MX6Q_UART4_BASE_ADDR            0x021f0000
-#define MX6Q_UART4_SIZE                 0x4000
 
 #endif  /* __MACH_MX6Q_H__ */
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index d018ad4bcc3c..503d7dd944ff 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -46,6 +46,11 @@ config MACH_GURUPLUG
 
 config ARCH_KIRKWOOD_DT
         bool "Marvell Kirkwood Flattened Device Tree"
+        select POWER_SUPPLY
+        select POWER_RESET
+        select POWER_RESET_GPIO
+        select REGULATOR
+        select REGULATOR_FIXED_VOLTAGE
         select USE_OF
         help
           Say 'Y' here if you want your kernel to support the
diff --git a/arch/arm/mach-kirkwood/board-dnskw.c b/arch/arm/mach-kirkwood/board-dnskw.c
index 43d16d6714b8..a1aa87f09180 100644
--- a/arch/arm/mach-kirkwood/board-dnskw.c
+++ b/arch/arm/mach-kirkwood/board-dnskw.c
@@ -17,51 +17,11 @@
 #include <linux/mv643xx_eth.h>
 #include <linux/gpio.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data dnskw_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 };
 
-static unsigned int dnskw_mpp_config[] __initdata = {
-        MPP13_UART1_TXD,        /* Custom ... */
-        MPP14_UART1_RXD,        /* ... Controller (DNS-320 only) */
-        MPP20_SATA1_ACTn,       /* LED: White Right HDD */
-        MPP21_SATA0_ACTn,       /* LED: White Left HDD */
-        MPP24_GPIO,
-        MPP25_GPIO,
-        MPP26_GPIO,     /* LED: Power */
-        MPP27_GPIO,     /* LED: Red Right HDD */
-        MPP28_GPIO,     /* LED: Red Left HDD */
-        MPP29_GPIO,     /* LED: Red USB (DNS-325 only) */
-        MPP30_GPIO,
-        MPP31_GPIO,
-        MPP32_GPIO,
-        MPP33_GPO,
-        MPP34_GPIO,     /* Button: Front power */
-        MPP35_GPIO,     /* LED: Red USB (DNS-320 only) */
-        MPP36_GPIO,     /* Power: Turn off board */
-        MPP37_GPIO,     /* Power: Turn back on after power failure */
-        MPP38_GPIO,
-        MPP39_GPIO,     /* Power: SATA0 */
-        MPP40_GPIO,     /* Power: SATA1 */
-        MPP41_GPIO,     /* SATA0 present */
-        MPP42_GPIO,     /* SATA1 present */
-        MPP43_GPIO,     /* LED: White USB */
-        MPP44_GPIO,     /* Fan: Tachometer Pin */
-        MPP45_GPIO,     /* Fan: high speed */
-        MPP46_GPIO,     /* Fan: low speed */
-        MPP47_GPIO,     /* Button: Back unmount */
-        MPP48_GPIO,     /* Button: Back reset */
-        MPP49_GPIO,     /* Temp Alarm (DNS-325) Pin of U5 (DNS-320) */
-        0
-};
-
-static void dnskw_power_off(void)
-{
-        gpio_set_value(36, 1);
-}
-
 /* Register any GPIO for output and set the value */
 static void __init dnskw_gpio_register(unsigned gpio, char *name, int def)
 {
@@ -76,22 +36,8 @@ static void __init dnskw_gpio_register(unsigned gpio, char *name, int def)
 
 void __init dnskw_init(void)
 {
-        kirkwood_mpp_conf(dnskw_mpp_config);
-
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&dnskw_ge00_data);
 
-        /* Register power-off GPIO. */
-        if (gpio_request(36, "dnskw:power:off") == 0
-            && gpio_direction_output(36, 0) == 0)
-                pm_power_off = dnskw_power_off;
-        else
-                pr_err("dnskw: failed to configure power-off GPIO\n");
-
-        /* Ensure power is supplied to both HDDs */
-        dnskw_gpio_register(39, "dnskw:power:sata0", 1);
-        dnskw_gpio_register(40, "dnskw:power:sata1", 1);
-
         /* Set NAS to turn back on after a power failure */
         dnskw_gpio_register(37, "dnskw:power:recover", 1);
 }
diff --git a/arch/arm/mach-kirkwood/board-dockstar.c b/arch/arm/mach-kirkwood/board-dockstar.c
index 6912882b0aa9..d7196db33984 100644
--- a/arch/arm/mach-kirkwood/board-dockstar.c
+++ b/arch/arm/mach-kirkwood/board-dockstar.c
@@ -17,32 +17,16 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data dockstar_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
 };
 
-static unsigned int dockstar_mpp_config[] __initdata = {
-        MPP29_GPIO,     /* USB Power Enable */
-        MPP46_GPIO,     /* LED green */
-        MPP47_GPIO,     /* LED orange */
-        0
-};
-
 void __init dockstar_dt_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(dockstar_mpp_config);
-
-        if (gpio_request(29, "USB Power Enable") != 0 ||
-            gpio_direction_output(29, 1) != 0)
-                pr_err("can't setup GPIO 29 (USB Power Enable)\n");
-        kirkwood_ehci_init();
-
         kirkwood_ge00_init(&dockstar_ge00_data);
 }
diff --git a/arch/arm/mach-kirkwood/board-dreamplug.c b/arch/arm/mach-kirkwood/board-dreamplug.c
index 8a8ebe09e512..08248e24ffcd 100644
--- a/arch/arm/mach-kirkwood/board-dreamplug.c
+++ b/arch/arm/mach-kirkwood/board-dreamplug.c
@@ -17,7 +17,6 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/mmc-mvsdio.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data dreamplug_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
@@ -31,25 +30,11 @@ static struct mvsdio_platform_data dreamplug_mvsdio_data = {
         /* unfortunately the CD signal has not been connected */
 };
 
-static unsigned int dreamplug_mpp_config[] __initdata = {
-        MPP0_SPI_SCn,
-        MPP1_SPI_MOSI,
-        MPP2_SPI_SCK,
-        MPP3_SPI_MISO,
-        MPP47_GPIO,     /* Bluetooth LED */
-        MPP48_GPIO,     /* Wifi LED */
-        MPP49_GPIO,     /* Wifi AP LED */
-        0
-};
-
 void __init dreamplug_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(dreamplug_mpp_config);
-
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&dreamplug_ge00_data);
         kirkwood_ge01_init(&dreamplug_ge01_data);
         kirkwood_sdio_init(&dreamplug_mvsdio_data);
diff --git a/arch/arm/mach-kirkwood/board-goflexnet.c b/arch/arm/mach-kirkwood/board-goflexnet.c
index 5dcd0d62aa42..9db979aec82e 100644
--- a/arch/arm/mach-kirkwood/board-goflexnet.c
+++ b/arch/arm/mach-kirkwood/board-goflexnet.c
@@ -19,40 +19,16 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data goflexnet_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
 };
 
-static unsigned int goflexnet_mpp_config[] __initdata = {
-        MPP29_GPIO,     /* USB Power Enable */
-        MPP47_GPIO,     /* LED Orange */
-        MPP46_GPIO,     /* LED Green */
-        MPP45_GPIO,     /* LED Left Capacity 3 */
-        MPP44_GPIO,     /* LED Left Capacity 2 */
-        MPP43_GPIO,     /* LED Left Capacity 1 */
-        MPP42_GPIO,     /* LED Left Capacity 0 */
-        MPP41_GPIO,     /* LED Right Capacity 3 */
-        MPP40_GPIO,     /* LED Right Capacity 2 */
-        MPP39_GPIO,     /* LED Right Capacity 1 */
-        MPP38_GPIO,     /* LED Right Capacity 0 */
-        0
-};
-
 void __init goflexnet_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(goflexnet_mpp_config);
-
-        if (gpio_request(29, "USB Power Enable") != 0 ||
-            gpio_direction_output(29, 1) != 0)
-                pr_err("can't setup GPIO 29 (USB Power Enable)\n");
-        kirkwood_ehci_init();
-
         kirkwood_ge00_init(&goflexnet_ge00_data);
 }
diff --git a/arch/arm/mach-kirkwood/board-ib62x0.c b/arch/arm/mach-kirkwood/board-ib62x0.c
index 6d3a56421142..9f6f496380d8 100644
--- a/arch/arm/mach-kirkwood/board-ib62x0.c
+++ b/arch/arm/mach-kirkwood/board-ib62x0.c
@@ -14,52 +14,17 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
 #include <linux/input.h>
 #include "common.h"
-#include "mpp.h"
-
-#define IB62X0_GPIO_POWER_OFF   24
 
 static struct mv643xx_eth_platform_data ib62x0_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 };
 
-static unsigned int ib62x0_mpp_config[] __initdata = {
-        MPP0_NF_IO2,
-        MPP1_NF_IO3,
-        MPP2_NF_IO4,
-        MPP3_NF_IO5,
-        MPP4_NF_IO6,
-        MPP5_NF_IO7,
-        MPP18_NF_IO0,
-        MPP19_NF_IO1,
-        MPP22_GPIO,     /* OS LED red */
-        MPP24_GPIO,     /* Power off device */
-        MPP25_GPIO,     /* OS LED green */
-        MPP27_GPIO,     /* USB transfer LED */
-        MPP28_GPIO,     /* Reset button */
-        MPP29_GPIO,     /* USB Copy button */
-        0
-};
-
-static void ib62x0_power_off(void)
-{
-        gpio_set_value(IB62X0_GPIO_POWER_OFF, 1);
-}
-
 void __init ib62x0_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(ib62x0_mpp_config);
-
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&ib62x0_ge00_data);
-        if (gpio_request(IB62X0_GPIO_POWER_OFF, "ib62x0:power:off") == 0 &&
-            gpio_direction_output(IB62X0_GPIO_POWER_OFF, 0) == 0)
-                pm_power_off = ib62x0_power_off;
-        else
-                pr_err("board-ib62x0: failed to configure power-off GPIO\n");
 }
diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c
index 24f5aa7f698b..c8ebde4919e2 100644
--- a/arch/arm/mach-kirkwood/board-iconnect.c
+++ b/arch/arm/mach-kirkwood/board-iconnect.c
@@ -13,31 +13,13 @@
 #include <linux/of.h>
 #include <linux/mv643xx_eth.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data iconnect_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(11),
 };
 
-static unsigned int iconnect_mpp_config[] __initdata = {
-        MPP12_GPIO,
-        MPP35_GPIO,
-        MPP41_GPIO,
-        MPP42_GPIO,
-        MPP43_GPIO,
-        MPP44_GPIO,
-        MPP45_GPIO,
-        MPP46_GPIO,
-        MPP47_GPIO,
-        MPP48_GPIO,
-        0
-};
-
 void __init iconnect_init(void)
 {
-        kirkwood_mpp_conf(iconnect_mpp_config);
-
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&iconnect_ge00_data);
 }
 
diff --git a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
index e4ed62c28f54..f655b2637b0e 100644
--- a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
+++ b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
@@ -13,7 +13,6 @@
 #include <linux/mv643xx_eth.h>
 #include <linux/ethtool.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_NONE,
@@ -21,35 +20,10 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static unsigned int iomega_ix2_200_mpp_config[] __initdata = {
-        MPP12_GPIO,                     /* Reset Button */
-        MPP14_GPIO,                     /* Power Button */
-        MPP15_GPIO,                     /* Backup LED (blue) */
-        MPP16_GPIO,                     /* Power LED (white) */
-        MPP35_GPIO,                     /* OTB Button */
-        MPP36_GPIO,                     /* Rebuild LED (white) */
-        MPP37_GPIO,                     /* Health LED (red) */
-        MPP38_GPIO,                     /* SATA LED brightness control 1 */
-        MPP39_GPIO,                     /* SATA LED brightness control 2 */
-        MPP40_GPIO,                     /* Backup LED brightness control 1 */
-        MPP41_GPIO,                     /* Backup LED brightness control 2 */
-        MPP42_GPIO,                     /* Power LED brightness control 1 */
-        MPP43_GPIO,                     /* Power LED brightness control 2 */
-        MPP44_GPIO,                     /* Health LED brightness control 1 */
-        MPP45_GPIO,                     /* Health LED brightness control 2 */
-        MPP46_GPIO,                     /* Rebuild LED brightness control 1 */
-        MPP47_GPIO,                     /* Rebuild LED brightness control 2 */
-        0
-};
-
 void __init iomega_ix2_200_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(iomega_ix2_200_mpp_config);
-
-        kirkwood_ehci_init();
-
         kirkwood_ge01_init(&iomega_ix2_200_ge00_data);
 }
diff --git a/arch/arm/mach-kirkwood/board-km_kirkwood.c b/arch/arm/mach-kirkwood/board-km_kirkwood.c
index f7d32834b757..44e4605ba0bf 100644
--- a/arch/arm/mach-kirkwood/board-km_kirkwood.c
+++ b/arch/arm/mach-kirkwood/board-km_kirkwood.c
@@ -18,27 +18,15 @@
 #include <linux/clk.h>
 #include <linux/clk-private.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data km_kirkwood_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
 };
 
-static unsigned int km_kirkwood_mpp_config[] __initdata = {
-        MPP8_GPIO,      /* I2C SDA */
-        MPP9_GPIO,      /* I2C SCL */
-        0
-};
-
 void __init km_kirkwood_init(void)
 {
         struct clk *sata_clk;
         /*
-         * Basic setup. Needs to be called early.
-         */
-        kirkwood_mpp_conf(km_kirkwood_mpp_config);
-
-        /*
          * Our variant of kirkwood (integrated in the Bobcat) hangs on accessing
          * SATA bits (14-15) of the Clock Gating Control Register. Since these
          * devices are also not present in this variant, their clocks get
@@ -52,6 +40,5 @@ void __init km_kirkwood_init(void)
         if (!IS_ERR(sata_clk))
                 sata_clk->flags |= CLK_IGNORE_UNUSED;
 
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&km_kirkwood_ge00_data);
 }
diff --git a/arch/arm/mach-kirkwood/board-lsxl.c b/arch/arm/mach-kirkwood/board-lsxl.c
index 7e18cad9b796..4ec8b7ae784a 100644
--- a/arch/arm/mach-kirkwood/board-lsxl.c
+++ b/arch/arm/mach-kirkwood/board-lsxl.c
@@ -15,9 +15,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data lsxl_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
@@ -27,23 +25,6 @@ static struct mv643xx_eth_platform_data lsxl_ge01_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 };
 
-static unsigned int lsxl_mpp_config[] __initdata = {
-        MPP10_GPO,      /* HDD Power Enable */
-        MPP11_GPIO,     /* USB Vbus Enable */
-        MPP18_GPO,      /* FAN High Enable# */
-        MPP19_GPO,      /* FAN Low Enable# */
-        MPP36_GPIO,     /* Function Blue LED */
-        MPP37_GPIO,     /* Alarm LED */
-        MPP38_GPIO,     /* Info LED */
-        MPP39_GPIO,     /* Power LED */
-        MPP40_GPIO,     /* Fan Lock */
-        MPP41_GPIO,     /* Function Button */
-        MPP42_GPIO,     /* Power Switch */
-        MPP43_GPIO,     /* Power Auto Switch */
-        MPP48_GPIO,     /* Function Red LED */
-        0
-};
-
 /*
  * On the LS-XHL/LS-CHLv2, the shutdown process is following:
  * - Userland monitors key events until the power switch goes to off position
@@ -57,21 +38,12 @@ static void lsxl_power_off(void)
         kirkwood_restart('h', NULL);
 }
 
-#define LSXL_GPIO_HDD_POWER 10
-#define LSXL_GPIO_USB_POWER 11
-
 void __init lsxl_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(lsxl_mpp_config);
-
-        /* usb and sata power on */
-        gpio_set_value(LSXL_GPIO_USB_POWER, 1);
-        gpio_set_value(LSXL_GPIO_HDD_POWER, 1);
 
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&lsxl_ge00_data);
         kirkwood_ge01_init(&lsxl_ge01_data);
 
diff --git a/arch/arm/mach-kirkwood/board-mplcec4.c b/arch/arm/mach-kirkwood/board-mplcec4.c
index e78a227468e6..56bfe5a1605a 100644
--- a/arch/arm/mach-kirkwood/board-mplcec4.c
+++ b/arch/arm/mach-kirkwood/board-mplcec4.c
@@ -24,52 +24,16 @@ static struct mv643xx_eth_platform_data mplcec4_ge01_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(2),
 };
 
-static unsigned int mplcec4_mpp_config[] __initdata = {
-        MPP0_NF_IO2,
-        MPP1_NF_IO3,
-        MPP2_NF_IO4,
-        MPP3_NF_IO5,
-        MPP4_NF_IO6,
-        MPP5_NF_IO7,
-        MPP6_SYSRST_OUTn,
-        MPP7_GPO,       /* Status LED Green High Active */
-        MPP10_UART0_TXD,
-        MPP11_UART0_RXD,
-        MPP12_SD_CLK,
-        MPP13_SD_CMD,   /* Alt UART1_TXD */
-        MPP14_SD_D0,    /* Alt UART1_RXD */
-        MPP15_SD_D1,
-        MPP16_SD_D2,
-        MPP17_SD_D3,
-        MPP18_NF_IO0,
-        MPP19_NF_IO1,
-        MPP28_GPIO,     /* Input SYS_POR_DET (active High) */
-        MPP29_GPIO,     /* Input SYS_RTC_INT (active High) */
-        MPP34_SATA1_ACTn,
-        MPP35_SATA0_ACTn,
-        MPP40_GPIO,     /* LED User1 orange */
-        MPP41_GPIO,     /* LED User1 green */
-        MPP44_GPIO,     /* LED User0 orange */
-        MPP45_GPIO,     /* LED User0 green */
-        MPP46_GPIO,     /* Status LED Yellow High Active */
-        MPP47_GPIO,     /* SD_CD# (in/IRQ)*/
-        0
-};
-
-
 static struct mvsdio_platform_data mplcec4_mvsdio_data = {
         .gpio_card_detect = 47, /* MPP47 used as SD card detect */
 };
 
 
-
 void __init mplcec4_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(mplcec4_mpp_config);
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&mplcec4_ge00_data);
         kirkwood_ge01_init(&mplcec4_ge01_data);
         kirkwood_sdio_init(&mplcec4_mvsdio_data);
diff --git a/arch/arm/mach-kirkwood/board-ns2.c b/arch/arm/mach-kirkwood/board-ns2.c
index 78596c4f76d2..8821720ab5a4 100644
--- a/arch/arm/mach-kirkwood/board-ns2.c
+++ b/arch/arm/mach-kirkwood/board-ns2.c
@@ -73,7 +73,6 @@ void __init ns2_init(void)
          */
         kirkwood_mpp_conf(ns2_mpp_config);
 
-        kirkwood_ehci_init();
         if (of_machine_is_compatible("lacie,netspace_lite_v2") ||
             of_machine_is_compatible("lacie,netspace_mini_v2"))
                 ns2_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
diff --git a/arch/arm/mach-kirkwood/board-nsa310.c b/arch/arm/mach-kirkwood/board-nsa310.c
index 027ce83f3fe5..f58d2e1a4042 100644
--- a/arch/arm/mach-kirkwood/board-nsa310.c
+++ b/arch/arm/mach-kirkwood/board-nsa310.c
@@ -85,10 +85,6 @@ void __init nsa310_init(void)
 
         nsa310_gpio_init();
 
-        /* this can be removed once the mainline kirkwood.dtsi gets
-         * the ehci configuration by default */
-        kirkwood_ehci_init();
-
         kirkwood_pcie_id(&dev, &rev);
 
         i2c_register_board_info(0, ARRAY_AND_SIZE(nsa310_i2c_info));
diff --git a/arch/arm/mach-kirkwood/board-openblocks_a6.c b/arch/arm/mach-kirkwood/board-openblocks_a6.c
index e807e8cfdd44..815fc6451d52 100644
--- a/arch/arm/mach-kirkwood/board-openblocks_a6.c
+++ b/arch/arm/mach-kirkwood/board-openblocks_a6.c
@@ -55,8 +55,8 @@ static unsigned int openblocks_a6_mpp_config[] __initdata = {
         MPP38_GPIO, /* INIT */
         MPP39_GPIO, /* USB OC */
         MPP41_GPIO, /* LED: Red */
-        MPP42_GPIO, /* LED: Yellow */
-        MPP43_GPIO, /* LED: Green */
+        MPP42_GPIO, /* LED: Green */
+        MPP43_GPIO, /* LED: Yellow */
         0,
 };
 
@@ -66,6 +66,5 @@ void __init openblocks_a6_init(void)
          * Basic setup. Needs to be called early.
          */
         kirkwood_mpp_conf(openblocks_a6_mpp_config);
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&openblocks_ge00_data);
 }
diff --git a/arch/arm/mach-kirkwood/board-ts219.c b/arch/arm/mach-kirkwood/board-ts219.c
index f3bfedae3a20..acb0187c7ee1 100644
--- a/arch/arm/mach-kirkwood/board-ts219.c
+++ b/arch/arm/mach-kirkwood/board-ts219.c
@@ -23,47 +23,21 @@
 #include <asm/mach/arch.h>
 #include <mach/kirkwood.h>
 #include "common.h"
-#include "mpp.h"
 #include "tsx1x-common.h"
 
 static struct mv643xx_eth_platform_data qnap_ts219_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 };
 
-static unsigned int qnap_ts219_mpp_config[] __initdata = {
-        MPP0_SPI_SCn,
-        MPP1_SPI_MOSI,
-        MPP2_SPI_SCK,
-        MPP3_SPI_MISO,
-        MPP4_SATA1_ACTn,
-        MPP5_SATA0_ACTn,
-        MPP8_TW0_SDA,
-        MPP9_TW0_SCK,
-        MPP10_UART0_TXD,
-        MPP11_UART0_RXD,
-        MPP13_UART1_TXD,        /* PIC controller */
-        MPP14_UART1_RXD,        /* PIC controller */
-        MPP15_GPIO,             /* USB Copy button (on devices with 88F6281) */
-        MPP16_GPIO,             /* Reset button (on devices with 88F6281) */
-        MPP36_GPIO,             /* RAM: 0: 256 MB, 1: 512 MB */
-        MPP37_GPIO,             /* Reset button (on devices with 88F6282) */
-        MPP43_GPIO,             /* USB Copy button (on devices with 88F6282) */
-        MPP44_GPIO,             /* Board ID: 0: TS-11x, 1: TS-21x */
-        0
-};
-
 void __init qnap_dt_ts219_init(void)
 {
         u32 dev, rev;
 
-        kirkwood_mpp_conf(qnap_ts219_mpp_config);
-
         kirkwood_pcie_id(&dev, &rev);
         if (dev == MV88F6282_DEV_ID)
                 qnap_ts219_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
 
         kirkwood_ge00_init(&qnap_ts219_ge00_data);
-        kirkwood_ehci_init();
 
         pm_power_off = qnap_tsx1x_power_off;
 }
diff --git a/arch/arm/mach-kirkwood/board-usi_topkick.c b/arch/arm/mach-kirkwood/board-usi_topkick.c
index e2ec9d891fe3..15e69fcde9f4 100644
--- a/arch/arm/mach-kirkwood/board-usi_topkick.c
+++ b/arch/arm/mach-kirkwood/board-usi_topkick.c
@@ -76,7 +76,6 @@ void __init usi_topkick_init(void)
         /* SATA0 power enable */
         gpio_set_value(TOPKICK_SATA0_PWR_ENABLE, 1);
 
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&topkick_ge00_data);
         kirkwood_sdio_init(&topkick_mvsdio_data);
 }
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 4748ec551a68..98070370d602 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -100,6 +100,25 @@ static struct fb_videomode apx4devkit_video_modes[] = {
         },
 };
 
+static struct fb_videomode apf28dev_video_modes[] = {
+        {
+                .name = "LW700",
+                .refresh = 60,
+                .xres = 800,
+                .yres = 480,
+                .pixclock = 30303, /* picosecond */
+                .left_margin = 96,
+                .right_margin = 96, /* at least 3 & 1 */
+                .upper_margin = 0x14,
+                .lower_margin = 0x15,
+                .hsync_len = 64,
+                .vsync_len = 4,
+                .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
+                                FB_SYNC_DATA_ENABLE_HIGH_ACT |
+                                FB_SYNC_DOTCLK_FAILING_ACT,
+        },
+};
+
 static struct mxsfb_platform_data mxsfb_pdata __initdata;
 
 /*
@@ -160,6 +179,7 @@ static struct sys_timer imx28_timer = {
 enum mac_oui {
         OUI_FSL,
         OUI_DENX,
+        OUI_CRYSTALFONTZ,
 };
 
 static void __init update_fec_mac_prop(enum mac_oui oui)
@@ -175,8 +195,12 @@ static void __init update_fec_mac_prop(enum mac_oui oui)
                 np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
                 if (!np)
                         return;
+
                 from = np;
 
+                if (of_get_property(np, "local-mac-address", NULL))
+                        continue;
+
                 newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
                 if (!newmac)
                         return;
@@ -205,6 +229,11 @@ static void __init update_fec_mac_prop(enum mac_oui oui)
                         macaddr[1] = 0xe5;
                         macaddr[2] = 0x4e;
                         break;
+                case OUI_CRYSTALFONTZ:
+                        macaddr[0] = 0x58;
+                        macaddr[1] = 0xb9;
+                        macaddr[2] = 0xe1;
+                        break;
                 }
                 val = ocotp[i];
                 macaddr[3] = (val >> 16) & 0xff;
@@ -261,6 +290,11 @@ static void __init m28evk_init(void)
         mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
 }
 
+static void __init sc_sps1_init(void)
+{
+        enable_clk_enet_out();
+}
+
 static int apx4devkit_phy_fixup(struct phy_device *phy)
 {
         phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
@@ -355,6 +389,22 @@ static void __init tx28_post_init(void)
         pinctrl_put(pctl);
 }
 
+static void __init cfa10049_init(void)
+{
+        enable_clk_enet_out();
+        update_fec_mac_prop(OUI_CRYSTALFONTZ);
+}
+
+static void __init apf28_init(void)
+{
+        enable_clk_enet_out();
+
+        mxsfb_pdata.mode_list = apf28dev_video_modes;
+        mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
+        mxsfb_pdata.default_bpp = 16;
+        mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
+}
+
 static void __init mxs_machine_init(void)
 {
         if (of_machine_is_compatible("fsl,imx28-evk"))
@@ -365,6 +415,12 @@ static void __init mxs_machine_init(void)
                 m28evk_init();
         else if (of_machine_is_compatible("bluegiga,apx4devkit"))
                 apx4devkit_init();
+        else if (of_machine_is_compatible("crystalfontz,cfa10049"))
+                cfa10049_init();
+        else if (of_machine_is_compatible("armadeus,imx28-apf28"))
+                apf28_init();
+        else if (of_machine_is_compatible("schulercontrol,imx28-sps1"))
+                sc_sps1_init();
 
         of_platform_populate(NULL, of_default_bus_match_table,
                              mxs_auxdata_lookup, NULL);
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c
index 7c3792613392..856f4c796061 100644
--- a/arch/arm/mach-mxs/timer.c
+++ b/arch/arm/mach-mxs/timer.c
@@ -29,6 +29,7 @@
 #include <linux/of_irq.h>
 
 #include <asm/mach/time.h>
+#include <asm/sched_clock.h>
 #include <mach/mxs.h>
 #include <mach/common.h>
 
@@ -233,15 +234,22 @@ static struct clocksource clocksource_mxs = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+static u32 notrace mxs_read_sched_clock_v2(void)
+{
+        return ~readl_relaxed(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1));
+}
+
 static int __init mxs_clocksource_init(struct clk *timer_clk)
 {
         unsigned int c = clk_get_rate(timer_clk);
 
         if (timrot_is_v1())
                 clocksource_register_hz(&clocksource_mxs, c);
-        else
+        else {
                 clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1),
                         "mxs_timer", c, 200, 32, clocksource_mmio_readl_down);
+                setup_sched_clock(mxs_read_sched_clock_v2, 32, c);
+        }
 
         return 0;
 }
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index 33631c9f1218..bde91a58e105 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -149,15 +149,6 @@ static struct platform_device snd_soc_mop500 = {
         },
 };
 
-/* Platform device for Ux500-PCM */
-static struct platform_device ux500_pcm = {
-                .name = "ux500-pcm",
-                .id = 0,
-                .dev = {
-                        .platform_data = NULL,
-                },
-};
-
 struct msp_i2s_platform_data msp2_platform_data = {
         .id = MSP_I2S_2,
         .msp_i2s_dma_rx = &msp2_dma_rx,
@@ -185,10 +176,3 @@ void mop500_audio_init(struct device *parent)
         db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1,
                            &msp3_platform_data);
 }
-
-/* Due for removal once the MSP driver has been fully DT:ed. */
-void mop500_of_audio_init(struct device *parent)
-{
-        pr_info("%s: Register platform-device 'ux500-pcm'\n", __func__);
-        platform_device_register(&ux500_pcm);
-}
diff --git a/arch/arm/mach-ux500/board-mop500-stuib.c b/arch/arm/mach-ux500/board-mop500-stuib.c
index 8c979770d872..564f57d5d8a7 100644
--- a/arch/arm/mach-ux500/board-mop500-stuib.c
+++ b/arch/arm/mach-ux500/board-mop500-stuib.c
@@ -162,18 +162,6 @@ static struct bu21013_platform_device tsc_plat_device = {
         .y_flip = true,
 };
 
-static struct bu21013_platform_device tsc_plat2_device = {
-        .cs_en = bu21013_gpio_board_init,
-        .cs_dis = bu21013_gpio_board_exit,
-        .irq_read_val = bu21013_read_pin_val,
-        .irq = NOMADIK_GPIO_TO_IRQ(TOUCH_GPIO_PIN),
-        .touch_x_max = TOUCH_XMAX,
-        .touch_y_max = TOUCH_YMAX,
-        .ext_clk = false,
-        .x_flip = false,
-        .y_flip = true,
-};
-
 static struct i2c_board_info __initdata u8500_i2c3_devices_stuib[] = {
         {
                 I2C_BOARD_INFO("bu21013_tp", 0x5C),
@@ -181,21 +169,17 @@ static struct i2c_board_info __initdata u8500_i2c3_devices_stuib[] = {
         },
         {
                 I2C_BOARD_INFO("bu21013_tp", 0x5D),
-                .platform_data = &tsc_plat2_device,
+                .platform_data = &tsc_plat_device,
         },
 
 };
 
 void __init mop500_stuib_init(void)
 {
-        if (machine_is_hrefv60()) {
+        if (machine_is_hrefv60())
                 tsc_plat_device.cs_pin = HREFV60_TOUCH_RST_GPIO;
-                tsc_plat2_device.cs_pin = HREFV60_TOUCH_RST_GPIO;
-        } else {
+        else
                 tsc_plat_device.cs_pin = GPIO_BU21013_CS;
-                tsc_plat2_device.cs_pin = GPIO_BU21013_CS;
-
-        }
 
         mop500_uib_i2c_add(0, mop500_i2c0_devices_stuib,
                         ARRAY_SIZE(mop500_i2c0_devices_stuib));
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index e6ad161449da..5b70212c2536 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -33,8 +33,6 @@
 #include <linux/smsc911x.h>
 #include <linux/gpio_keys.h>
 #include <linux/delay.h>
-#include <linux/of.h>
-#include <linux/of_platform.h>
 #include <linux/leds.h>
 #include <linux/pinctrl/consumer.h>
 #include <linux/platform_data/pinctrl-nomadik.h>
@@ -525,7 +523,7 @@ static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
 };
 #endif
 
-static struct pl022_ssp_controller ssp0_plat = {
+struct pl022_ssp_controller ssp0_plat = {
         .bus_id = 0,
 #ifdef CONFIG_STE_DMA40
         .enable_dma = 1,
@@ -602,7 +600,7 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
 };
 #endif
 
-static struct amba_pl011_data uart0_plat = {
+struct amba_pl011_data uart0_plat = {
 #ifdef CONFIG_STE_DMA40
         .dma_filter = stedma40_filter,
         .dma_rx_param = &uart0_dma_cfg_rx,
@@ -610,7 +608,7 @@ static struct amba_pl011_data uart0_plat = {
 #endif
 };
 
-static struct amba_pl011_data uart1_plat = {
+struct amba_pl011_data uart1_plat = {
 #ifdef CONFIG_STE_DMA40
         .dma_filter = stedma40_filter,
         .dma_rx_param = &uart1_dma_cfg_rx,
@@ -618,7 +616,7 @@ static struct amba_pl011_data uart1_plat = {
 #endif
 };
 
-static struct amba_pl011_data uart2_plat = {
+struct amba_pl011_data uart2_plat = {
 #ifdef CONFIG_STE_DMA40
         .dma_filter = stedma40_filter,
         .dma_rx_param = &uart2_dma_cfg_rx,
@@ -681,8 +679,6 @@ static void __init mop500_init_machine(void)
 
         /* This board has full regulator constraints */
         regulator_has_full_constraints();
-
-        mop500_uib_init();
 }
 
 static void __init snowball_init_machine(void)
@@ -747,8 +743,6 @@ static void __init hrefv60_init_machine(void)
 
         /* This board has full regulator constraints */
         regulator_has_full_constraints();
-
-        mop500_uib_init();
 }
 
 MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
@@ -794,135 +788,5 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
         .timer          = &ux500_timer,
         .handle_irq     = gic_handle_irq,
         .init_machine   = snowball_init_machine,
-        .init_late      = ux500_init_late,
-MACHINE_END
-
-#ifdef CONFIG_MACH_UX500_DT
-
-struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
-        /* Requires call-back bindings. */
-        OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
-        /* Requires DMA and call-back bindings. */
-        OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
-        OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
-        OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
-        /* Requires DMA bindings. */
-        OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0",  &ssp0_plat),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0",  &mop500_sdi0_data),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1",  &mop500_sdi1_data),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2",  &mop500_sdi2_data),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4",  &mop500_sdi4_data),
-        /* Requires clock name bindings. */
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
-        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
-        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
-        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
-        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
-        OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
-        /* Requires device name bindings. */
-        OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
-        /* Requires clock name and DMA bindings. */
-        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
-                "ux500-msp-i2s.0", &msp0_platform_data),
-        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
-                "ux500-msp-i2s.1", &msp1_platform_data),
-        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
-                "ux500-msp-i2s.2", &msp2_platform_data),
-        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
-                "ux500-msp-i2s.3", &msp3_platform_data),
-        {},
-};
-
-static const struct of_device_id u8500_local_bus_nodes[] = {
-        /* only create devices below soc node */
-        { .compatible = "stericsson,db8500", },
-        { .compatible = "stericsson,db8500-prcmu", },
-        { .compatible = "simple-bus"},
-        { },
-};
-
-static void __init u8500_init_machine(void)
-{
-        struct device *parent = NULL;
-        int i2c0_devs;
-        int i;
-
-        /* Pinmaps must be in place before devices register */
-        if (of_machine_is_compatible("st-ericsson,mop500"))
-                mop500_pinmaps_init();
-        else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
-                snowball_pinmaps_init();
-        else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
-                hrefv60_pinmaps_init();
-
-        parent = u8500_of_init_devices();
-
-        for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
-                mop500_platform_devs[i]->dev.parent = parent;
-
-        /* automatically probe child nodes of db8500 device */
-        of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);
-
-        if (of_machine_is_compatible("st-ericsson,mop500")) {
-                mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
-
-                platform_add_devices(mop500_platform_devs,
-                                ARRAY_SIZE(mop500_platform_devs));
-
-                mop500_sdi_init(parent);
-                mop500_audio_init(parent);
-                i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
-                i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
-                i2c_register_board_info(2, mop500_i2c2_devices,
-                                        ARRAY_SIZE(mop500_i2c2_devices));
-
-                mop500_uib_init();
-
-        } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
-                mop500_of_audio_init(parent);
-        } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
-                /*
-                 * The HREFv60 board removed a GPIO expander and routed
-                 * all these GPIO pins to the internal GPIO controller
-                 * instead.
-                 */
-                mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
-                platform_add_devices(mop500_platform_devs,
-                                ARRAY_SIZE(mop500_platform_devs));
-
-                mop500_uib_init();
-        }
-
-        /* This board has full regulator constraints */
-        regulator_has_full_constraints();
-}
-
-static const char * u8500_dt_board_compat[] = {
-        "calaosystems,snowball-a9500",
-        "st-ericsson,hrefv60+",
-        "st-ericsson,u8500",
-        "st-ericsson,mop500",
-        NULL,
-};
-
-
-DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)")
-        .smp            = smp_ops(ux500_smp_ops),
-        .map_io         = u8500_map_io,
-        .init_irq       = ux500_init_irq,
-        /* we re-use nomadik timer here */
-        .timer          = &ux500_timer,
-        .handle_irq     = gic_handle_irq,
-        .init_machine   = u8500_init_machine,
-        .init_late      = ux500_init_late,
-        .dt_compat      = u8500_dt_board_compat,
+        .init_late      = NULL,
 MACHINE_END
-#endif
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index aca39a68712a..eaa605f5d90d 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -89,6 +89,10 @@ extern struct msp_i2s_platform_data msp1_platform_data;
 extern struct msp_i2s_platform_data msp2_platform_data;
 extern struct msp_i2s_platform_data msp3_platform_data;
 extern struct arm_pmu_platdata db8500_pmu_platdata;
+extern struct amba_pl011_data uart0_plat;
+extern struct amba_pl011_data uart1_plat;
+extern struct amba_pl011_data uart2_plat;
+extern struct pl022_ssp_controller ssp0_plat;
 
 extern void mop500_sdi_init(struct device *parent);
 extern void snowball_sdi_init(struct device *parent);
@@ -100,14 +104,8 @@ void __init mop500_pinmaps_init(void);
 void __init snowball_pinmaps_init(void);
 void __init hrefv60_pinmaps_init(void);
 void mop500_audio_init(struct device *parent);
-/* Due for removal once the MSP driver has been fully DT:ed. */
-void mop500_of_audio_init(struct device *parent);
 
 int __init mop500_uib_init(void);
 void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
                 unsigned n);
-
-/* TODO: Once all pieces are DT:ed, remove completely. */
-struct device * __init u8500_of_init_devices(void);
-
 #endif
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 5c5ad70e48be..93442fcd9eb0 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -17,12 +17,16 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/mfd/abx500/ab8500.h>
-#include <linux/platform_data/usb-musb-ux500.h>
-#include <linux/platform_data/pinctrl-nomadik.h>
+#include <linux/mfd/dbx500-prcmu.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/regulator/machine.h>
 #include <linux/random.h>
 
 #include <asm/pmu.h>
 #include <asm/mach/map.h>
+#include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <mach/hardware.h>
 #include <mach/setup.h>
 #include <mach/devices.h>
@@ -30,6 +34,7 @@
 
 #include "devices-db8500.h"
 #include "ste-dma40-db8500.h"
+#include "board-mop500.h"
 
 /* minimum static i/o mapping required to boot U8500 platforms */
 static struct map_desc u8500_uart_io_desc[] __initdata = {
@@ -227,12 +232,12 @@ struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
         return parent;
 }
 
+#ifdef CONFIG_MACH_UX500_DT
+
 /* TODO: Once all pieces are DT:ed, remove completely. */
-struct device * __init u8500_of_init_devices(void)
+static struct device * __init u8500_of_init_devices(void)
 {
-        struct device *parent;
-
-        parent = db8500_soc_device_init();
+        struct device *parent = db8500_soc_device_init();
 
         db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
 
@@ -248,3 +253,95 @@ struct device * __init u8500_of_init_devices(void)
 
         return parent;
 }
+
+static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
+        /* Requires call-back bindings. */
+        OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
+        /* Requires DMA bindings. */
+        OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
+        OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
+        OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
+        OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0",  &ssp0_plat),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0",  &mop500_sdi0_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1",  &mop500_sdi1_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2",  &mop500_sdi2_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4",  &mop500_sdi4_data),
+        /* Requires clock name bindings. */
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
+        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
+        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
+        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
+        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
+        OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
+        /* Requires device name bindings. */
+        OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
+        /* Requires clock name and DMA bindings. */
+        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
+                "ux500-msp-i2s.0", &msp0_platform_data),
+        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
+                "ux500-msp-i2s.1", &msp1_platform_data),
+        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
+                "ux500-msp-i2s.2", &msp2_platform_data),
+        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
+                "ux500-msp-i2s.3", &msp3_platform_data),
+        {},
+};
+
+static const struct of_device_id u8500_local_bus_nodes[] = {
+        /* only create devices below soc node */
+        { .compatible = "stericsson,db8500", },
+        { .compatible = "stericsson,db8500-prcmu", },
+        { .compatible = "simple-bus"},
+        { },
+};
+
+static void __init u8500_init_machine(void)
+{
+        struct device *parent = NULL;
+
+        /* Pinmaps must be in place before devices register */
+        if (of_machine_is_compatible("st-ericsson,mop500"))
+                mop500_pinmaps_init();
+        else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
+                snowball_pinmaps_init();
+        else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
+                hrefv60_pinmaps_init();
+        else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
+                /* TODO: Add pinmaps for ccu9540 board. */
+
+        /* TODO: Export SoC, USB, cpu-freq and DMA40 */
+        parent = u8500_of_init_devices();
+
+        /* automatically probe child nodes of db8500 device */
+        of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);
+}
+
+static const char * stericsson_dt_platform_compat[] = {
+        "st-ericsson,u8500",
+        "st-ericsson,u8540",
+        "st-ericsson,u9500",
+        "st-ericsson,u9540",
+        NULL,
+};
+
+DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
+        .smp            = smp_ops(ux500_smp_ops),
+        .map_io         = u8500_map_io,
+        .init_irq       = ux500_init_irq,
+        /* we re-use nomadik timer here */
+        .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
+        .init_machine   = u8500_init_machine,
+        .init_late      = NULL,
+        .dt_compat      = stericsson_dt_platform_compat,
+MACHINE_END
+
+#endif
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 1f3fbc2bb776..721e7b4275f3 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -26,6 +26,8 @@
 #include <mach/setup.h>
 #include <mach/devices.h>
 
+#include "board-mop500.h"
+
 void __iomem *_PRCMU_BASE;
 
 /*
@@ -82,6 +84,7 @@ void __init ux500_init_irq(void)
 
 void __init ux500_init_late(void)
 {
+        mop500_uib_init();
 }
 
 static const char * __init ux500_get_machine(void)
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index ba8d14f78d4d..79bf5fb4dad3 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -19,12 +19,15 @@
 #include <linux/cpumask.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/clk/zynq.h>
+#include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/of.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/mach/time.h>
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/hardware/gic.h>
@@ -84,15 +87,36 @@ static struct map_desc io_desc[] __initdata = {
 
 #ifdef CONFIG_DEBUG_LL
         {
-                .virtual        = UART0_VIRT,
-                .pfn            = __phys_to_pfn(UART0_PHYS),
-                .length         = UART0_SIZE,
+                .virtual        = LL_UART_VADDR,
+                .pfn            = __phys_to_pfn(LL_UART_PADDR),
+                .length         = UART_SIZE,
                 .type           = MT_DEVICE,
         },
 #endif
 
 };
 
+static void __init xilinx_zynq_timer_init(void)
+{
+        struct device_node *np;
+        void __iomem *slcr;
+
+        np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
+        slcr = of_iomap(np, 0);
+        WARN_ON(!slcr);
+
+        xilinx_zynq_clocks_init(slcr);
+
+        xttcpss_timer_init();
+}
+
+/*
+ * Instantiate and initialize the system timer structure
+ */
+static struct sys_timer xttcpss_sys_timer = {
+        .init           = xilinx_zynq_timer_init,
+};
+
 /**
  * xilinx_map_io() - Create memory mappings needed for early I/O.
  */
@@ -102,7 +126,8 @@ static void __init xilinx_map_io(void)
 }
 
 static const char *xilinx_dt_match[] = {
-        "xlnx,zynq-ep107",
+        "xlnx,zynq-zc702",
+        "xlnx,zynq-7000",
         NULL
 };
 
diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h
index a009644a1555..954b91c13c91 100644
--- a/arch/arm/mach-zynq/common.h
+++ b/arch/arm/mach-zynq/common.h
@@ -17,8 +17,6 @@
 #ifndef __MACH_ZYNQ_COMMON_H__
 #define __MACH_ZYNQ_COMMON_H__
 
-#include <asm/mach/time.h>
-
-extern struct sys_timer xttcpss_sys_timer;
+void __init xttcpss_timer_init(void);
 
 #endif
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h
index 1b8bf0ecbcb0..5ebbd8e6eeee 100644
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h
@@ -25,8 +25,9 @@
  * address that is known to work.
  */
 #define UART0_PHYS              0xE0000000
-#define UART0_SIZE              SZ_4K
-#define UART0_VIRT              0xF0001000
+#define UART1_PHYS              0xE0001000
+#define UART_SIZE               SZ_4K
+#define UART_VIRT               0xF0001000
 
 #define TTC0_PHYS               0xF8001000
 #define TTC0_SIZE               SZ_4K
@@ -36,12 +37,17 @@
 #define SCU_PERIPH_SIZE         SZ_8K
 #define SCU_PERIPH_VIRT         (TTC0_VIRT - SCU_PERIPH_SIZE)
 
+#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
+# define LL_UART_PADDR          UART1_PHYS
+#else
+# define LL_UART_PADDR          UART0_PHYS
+#endif
+
+#define LL_UART_VADDR           UART_VIRT
+
 /* The following are intended for the devices that are mapped early */
 
 #define TTC0_BASE                       IOMEM(TTC0_VIRT)
 #define SCU_PERIPH_BASE                 IOMEM(SCU_PERIPH_VIRT)
 
-#define LL_UART_PADDR   UART0_PHYS
-#define LL_UART_VADDR   UART0_VIRT
-
 #endif
diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c
index c2c96cc7d6e7..9662306aa12f 100644
--- a/arch/arm/mach-zynq/timer.c
+++ b/arch/arm/mach-zynq/timer.c
@@ -23,32 +23,15 @@
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/slab.h>
+#include <linux/clk-provider.h>
 
-#include <asm/mach/time.h>
 #include <mach/zynq_soc.h>
 #include "common.h"
 
-#define IRQ_TIMERCOUNTER0       42
-
-/*
- * This driver configures the 2 16-bit count-up timers as follows:
- *
- * T1: Timer 1, clocksource for generic timekeeping
- * T2: Timer 2, clockevent source for hrtimers
- * T3: Timer 3, <unused>
- *
- * The input frequency to the timer module for emulation is 2.5MHz which is
- * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
- * the timers are clocked at 78.125KHz (12.8 us resolution).
- *
- * The input frequency to the timer module in silicon will be 200MHz. With the
- * pre-scaler of 32, the timers are clocked at 6.25MHz (160ns resolution).
- */
-#define XTTCPSS_CLOCKSOURCE     0       /* Timer 1 as a generic timekeeping */
-#define XTTCPSS_CLOCKEVENT      1       /* Timer 2 as a clock event */
-
-#define XTTCPSS_TIMER_BASE              TTC0_BASE
-#define XTTCPCC_EVENT_TIMER_IRQ         (IRQ_TIMERCOUNTER0 + 1)
 /*
  * Timer Register Offset Definitions of Timer 1, Increment base address by 4
  * and use same offsets for Timer 2
@@ -65,9 +48,14 @@
 
 #define XTTCPSS_CNT_CNTRL_DISABLE_MASK  0x1
 
-/* Setup the timers to use pre-scaling */
-
-#define TIMER_RATE (PERIPHERAL_CLOCK_RATE / 32)
+/* Setup the timers to use pre-scaling, using a fixed value for now that will
+ * work across most input frequency, but it may need to be more dynamic
+ */
+#define PRESCALE_EXPONENT       11      /* 2 ^ PRESCALE_EXPONENT = PRESCALE */
+#define PRESCALE                2048    /* The exponent must match this */
+#define CLK_CNTRL_PRESCALE      ((PRESCALE_EXPONENT - 1) << 1)
+#define CLK_CNTRL_PRESCALE_EN   1
+#define CNT_CNTRL_RESET         (1<<4)
 
 /**
  * struct xttcpss_timer - This definition defines local timer structure
@@ -75,11 +63,25 @@
  * @base_addr:  Base address of timer
  **/
 struct xttcpss_timer {
-        void __iomem *base_addr;
+        void __iomem    *base_addr;
 };
 
-static struct xttcpss_timer timers[2];
-static struct clock_event_device xttcpss_clockevent;
+struct xttcpss_timer_clocksource {
+        struct xttcpss_timer    xttc;
+        struct clocksource      cs;
+};
+
+#define to_xttcpss_timer_clksrc(x) \
+                container_of(x, struct xttcpss_timer_clocksource, cs)
+
+struct xttcpss_timer_clockevent {
+        struct xttcpss_timer            xttc;
+        struct clock_event_device       ce;
+        struct clk                      *clk;
+};
+
+#define to_xttcpss_timer_clkevent(x) \
+                container_of(x, struct xttcpss_timer_clockevent, ce)
 
 /**
  * xttcpss_set_interval - Set the timer interval value
@@ -101,7 +103,7 @@ static void xttcpss_set_interval(struct xttcpss_timer *timer,
 
         /* Reset the counter (0x10) so that it starts from 0, one-shot
            mode makes this needed for timing to be right. */
-        ctrl_reg |= 0x10;
+        ctrl_reg |= CNT_CNTRL_RESET;
         ctrl_reg &= ~XTTCPSS_CNT_CNTRL_DISABLE_MASK;
         __raw_writel(ctrl_reg, timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
 }
@@ -116,90 +118,31 @@ static void xttcpss_set_interval(struct xttcpss_timer *timer,
  **/
 static irqreturn_t xttcpss_clock_event_interrupt(int irq, void *dev_id)
 {
-        struct clock_event_device *evt = &xttcpss_clockevent;
-        struct xttcpss_timer *timer = dev_id;
+        struct xttcpss_timer_clockevent *xttce = dev_id;
+        struct xttcpss_timer *timer = &xttce->xttc;
 
         /* Acknowledge the interrupt and call event handler */
         __raw_writel(__raw_readl(timer->base_addr + XTTCPSS_ISR_OFFSET),
                         timer->base_addr + XTTCPSS_ISR_OFFSET);
 
-        evt->event_handler(evt);
+        xttce->ce.event_handler(&xttce->ce);
 
         return IRQ_HANDLED;
 }
 
-static struct irqaction event_timer_irq = {
-        .name   = "xttcpss clockevent",
-        .flags  = IRQF_DISABLED | IRQF_TIMER,
-        .handler = xttcpss_clock_event_interrupt,
-};
-
 /**
- * xttcpss_timer_hardware_init - Initialize the timer hardware
- *
- * Initialize the hardware to start the clock source, get the clock
- * event timer ready to use, and hook up the interrupt.
- **/
-static void __init xttcpss_timer_hardware_init(void)
-{
-        /* Setup the clock source counter to be an incrementing counter
-         * with no interrupt and it rolls over at 0xFFFF. Pre-scale
-           it by 32 also. Let it start running now.
-         */
-        timers[XTTCPSS_CLOCKSOURCE].base_addr = XTTCPSS_TIMER_BASE;
-
-        __raw_writel(0x0, timers[XTTCPSS_CLOCKSOURCE].base_addr +
-                                XTTCPSS_IER_OFFSET);
-        __raw_writel(0x9, timers[XTTCPSS_CLOCKSOURCE].base_addr +
-                                XTTCPSS_CLK_CNTRL_OFFSET);
-        __raw_writel(0x10, timers[XTTCPSS_CLOCKSOURCE].base_addr +
-                                XTTCPSS_CNT_CNTRL_OFFSET);
-
-        /* Setup the clock event timer to be an interval timer which
-         * is prescaled by 32 using the interval interrupt. Leave it
-         * disabled for now.
-         */
-
-        timers[XTTCPSS_CLOCKEVENT].base_addr = XTTCPSS_TIMER_BASE + 4;
-
-        __raw_writel(0x23, timers[XTTCPSS_CLOCKEVENT].base_addr +
-                        XTTCPSS_CNT_CNTRL_OFFSET);
-        __raw_writel(0x9, timers[XTTCPSS_CLOCKEVENT].base_addr +
-                        XTTCPSS_CLK_CNTRL_OFFSET);
-        __raw_writel(0x1, timers[XTTCPSS_CLOCKEVENT].base_addr +
-                        XTTCPSS_IER_OFFSET);
-
-        /* Setup IRQ the clock event timer */
-        event_timer_irq.dev_id = &timers[XTTCPSS_CLOCKEVENT];
-        setup_irq(XTTCPCC_EVENT_TIMER_IRQ, &event_timer_irq);
-}
-
-/**
- * __raw_readl_cycles - Reads the timer counter register
+ * __xttc_clocksource_read - Reads the timer counter register
  *
  * returns: Current timer counter register value
  **/
-static cycle_t __raw_readl_cycles(struct clocksource *cs)
+static cycle_t __xttc_clocksource_read(struct clocksource *cs)
 {
-        struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKSOURCE];
+        struct xttcpss_timer *timer = &to_xttcpss_timer_clksrc(cs)->xttc;
 
         return (cycle_t)__raw_readl(timer->base_addr +
                                 XTTCPSS_COUNT_VAL_OFFSET);
 }
 
-
-/*
- * Instantiate and initialize the clock source structure
- */
-static struct clocksource clocksource_xttcpss = {
-        .name           = "xttcpss_timer1",
-        .rating         = 200,                  /* Reasonable clock source */
-        .read           = __raw_readl_cycles,
-        .mask           = CLOCKSOURCE_MASK(16),
-        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-
 /**
  * xttcpss_set_next_event - Sets the time interval for next event
  *
@@ -211,7 +154,8 @@ static struct clocksource clocksource_xttcpss = {
 static int xttcpss_set_next_event(unsigned long cycles,
                                         struct clock_event_device *evt)
 {
-        struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKEVENT];
+        struct xttcpss_timer_clockevent *xttce = to_xttcpss_timer_clkevent(evt);
+        struct xttcpss_timer *timer = &xttce->xttc;
 
         xttcpss_set_interval(timer, cycles);
         return 0;
@@ -226,12 +170,15 @@ static int xttcpss_set_next_event(unsigned long cycles,
 static void xttcpss_set_mode(enum clock_event_mode mode,
                                         struct clock_event_device *evt)
 {
-        struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKEVENT];
+        struct xttcpss_timer_clockevent *xttce = to_xttcpss_timer_clkevent(evt);
+        struct xttcpss_timer *timer = &xttce->xttc;
         u32 ctrl_reg;
 
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
-                xttcpss_set_interval(timer, TIMER_RATE / HZ);
+                xttcpss_set_interval(timer,
+                                     DIV_ROUND_CLOSEST(clk_get_rate(xttce->clk),
+                                                       PRESCALE * HZ));
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
         case CLOCK_EVT_MODE_UNUSED:
@@ -252,15 +199,106 @@ static void xttcpss_set_mode(enum clock_event_mode mode,
         }
 }
 
-/*
- * Instantiate and initialize the clock event structure
- */
-static struct clock_event_device xttcpss_clockevent = {
-        .name           = "xttcpss_timer2",
-        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .set_next_event = xttcpss_set_next_event,
-        .set_mode       = xttcpss_set_mode,
-        .rating         = 200,
+static void __init zynq_ttc_setup_clocksource(struct device_node *np,
+                                             void __iomem *base)
+{
+        struct xttcpss_timer_clocksource *ttccs;
+        struct clk *clk;
+        int err;
+        u32 reg;
+
+        ttccs = kzalloc(sizeof(*ttccs), GFP_KERNEL);
+        if (WARN_ON(!ttccs))
+                return;
+
+        err = of_property_read_u32(np, "reg", &reg);
+        if (WARN_ON(err))
+                return;
+
+        clk = of_clk_get_by_name(np, "cpu_1x");
+        if (WARN_ON(IS_ERR(clk)))
+                return;
+
+        err = clk_prepare_enable(clk);
+        if (WARN_ON(err))
+                return;
+
+        ttccs->xttc.base_addr = base + reg * 4;
+
+        ttccs->cs.name = np->name;
+        ttccs->cs.rating = 200;
+        ttccs->cs.read = __xttc_clocksource_read;
+        ttccs->cs.mask = CLOCKSOURCE_MASK(16);
+        ttccs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+        __raw_writel(0x0,  ttccs->xttc.base_addr + XTTCPSS_IER_OFFSET);
+        __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN,
+                     ttccs->xttc.base_addr + XTTCPSS_CLK_CNTRL_OFFSET);
+        __raw_writel(CNT_CNTRL_RESET,
+                     ttccs->xttc.base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
+
+        err = clocksource_register_hz(&ttccs->cs, clk_get_rate(clk) / PRESCALE);
+        if (WARN_ON(err))
+                return;
+}
+
+static void __init zynq_ttc_setup_clockevent(struct device_node *np,
+                                            void __iomem *base)
+{
+        struct xttcpss_timer_clockevent *ttcce;
+        int err, irq;
+        u32 reg;
+
+        ttcce = kzalloc(sizeof(*ttcce), GFP_KERNEL);
+        if (WARN_ON(!ttcce))
+                return;
+
+        err = of_property_read_u32(np, "reg", &reg);
+        if (WARN_ON(err))
+                return;
+
+        ttcce->xttc.base_addr = base + reg * 4;
+
+        ttcce->clk = of_clk_get_by_name(np, "cpu_1x");
+        if (WARN_ON(IS_ERR(ttcce->clk)))
+                return;
+
+        err = clk_prepare_enable(ttcce->clk);
+        if (WARN_ON(err))
+                return;
+
+        irq = irq_of_parse_and_map(np, 0);
+        if (WARN_ON(!irq))
+                return;
+
+        ttcce->ce.name = np->name;
+        ttcce->ce.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
+        ttcce->ce.set_next_event = xttcpss_set_next_event;
+        ttcce->ce.set_mode = xttcpss_set_mode;
+        ttcce->ce.rating = 200;
+        ttcce->ce.irq = irq;
+
+        __raw_writel(0x23, ttcce->xttc.base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
+        __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN,
+                     ttcce->xttc.base_addr + XTTCPSS_CLK_CNTRL_OFFSET);
+        __raw_writel(0x1,  ttcce->xttc.base_addr + XTTCPSS_IER_OFFSET);
+
+        err = request_irq(irq, xttcpss_clock_event_interrupt, IRQF_TIMER,
+                          np->name, ttcce);
+        if (WARN_ON(err))
+                return;
+
+        clockevents_config_and_register(&ttcce->ce,
+                                        clk_get_rate(ttcce->clk) / PRESCALE,
+                                        1, 0xfffe);
+}
+
+static const __initconst struct of_device_id zynq_ttc_match[] = {
+        { .compatible = "xlnx,ttc-counter-clocksource",
+                .data = zynq_ttc_setup_clocksource, },
+        { .compatible = "xlnx,ttc-counter-clockevent",
+                .data = zynq_ttc_setup_clockevent, },
+        {}
 };
 
 /**
@@ -269,30 +307,27 @@ static struct clock_event_device xttcpss_clockevent = {
  * Initializes the timer hardware and register the clock source and clock event
  * timers with Linux kernal timer framework
  **/
-static void __init xttcpss_timer_init(void)
+void __init xttcpss_timer_init(void)
 {
-        xttcpss_timer_hardware_init();
-        clocksource_register_hz(&clocksource_xttcpss, TIMER_RATE);
-
-        /* Calculate the parameters to allow the clockevent to operate using
-           integer math
-        */
-        clockevents_calc_mult_shift(&xttcpss_clockevent, TIMER_RATE, 4);
-
-        xttcpss_clockevent.max_delta_ns =
-                clockevent_delta2ns(0xfffe, &xttcpss_clockevent);
-        xttcpss_clockevent.min_delta_ns =
-                clockevent_delta2ns(1, &xttcpss_clockevent);
-
-        /* Indicate that clock event is on 1st CPU as SMP boot needs it */
-
-        xttcpss_clockevent.cpumask = cpumask_of(0);
-        clockevents_register_device(&xttcpss_clockevent);
+        struct device_node *np;
+
+        for_each_compatible_node(np, NULL, "xlnx,ttc") {
+                struct device_node *np_chld;
+                void __iomem *base;
+
+                base = of_iomap(np, 0);
+                if (WARN_ON(!base))
+                        return;
+
+                for_each_available_child_of_node(np, np_chld) {
+                        int (*cb)(struct device_node *np, void __iomem *base);
+                        const struct of_device_id *match;
+
+                        match = of_match_node(zynq_ttc_match, np_chld);
+                        if (match) {
+                                cb = match->data;
+                                cb(np_chld, base);
+                        }
+                }
+        }
 }
-
-/*
- * Instantiate and initialize the system timer structure
- */
-struct sys_timer xttcpss_sys_timer = {
-        .init           = xttcpss_timer_init,
-};
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index 1867944415ca..8db0b981ca64 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -41,7 +41,7 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
 static int __init orion_add_irq_domain(struct device_node *np,
                                        struct device_node *interrupt_parent)
 {
-        int i = 0, irq_gpio;
+        int i = 0;
         void __iomem *base;
 
         do {
@@ -54,10 +54,6 @@ static int __init orion_add_irq_domain(struct device_node *np,
 
         irq_domain_add_legacy(np, i * 32, 0, 0,
                               &irq_domain_simple_ops, NULL);
-
-        irq_gpio = i * 32;
-        orion_gpio_of_init(irq_gpio);
-
         return 0;
 }
 
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index a17d7b3e3725..bc50b20a8ffc 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -929,6 +929,7 @@ struct platform_device s5p_device_mfc_r = {
                 .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
 };
+
 #endif /* CONFIG_S5P_DEV_MFC */
 
 /* MIPI CSIS */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index a9b8096b8252..f53beba2b63d 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -132,8 +132,6 @@ extern struct platform_device exynos4_device_pcm1;
 extern struct platform_device exynos4_device_pcm2;
 extern struct platform_device exynos4_device_spdif;
 
-extern struct platform_device exynos_device_drm;
-
 extern struct platform_device samsung_asoc_dma;
 extern struct platform_device samsung_asoc_idma;
 extern struct platform_device samsung_device_keypad;
diff --git a/arch/arm/plat-samsung/include/plat/mfc.h b/arch/arm/plat-samsung/include/plat/mfc.h
index ac13227272f0..e6d7c42d68b6 100644
--- a/arch/arm/plat-samsung/include/plat/mfc.h
+++ b/arch/arm/plat-samsung/include/plat/mfc.h
@@ -10,6 +10,14 @@
 #ifndef __PLAT_SAMSUNG_MFC_H
 #define __PLAT_SAMSUNG_MFC_H __FILE__
 
+struct s5p_mfc_dt_meminfo {
+        unsigned long   loff;
+        unsigned long   lsize;
+        unsigned long   roff;
+        unsigned long   rsize;
+        char            *compatible;
+};
+
 /**
  * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver
  * @rbase:      base address for MFC 'right' memory interface
@@ -24,4 +32,7 @@
 void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
                                 phys_addr_t lbase, unsigned int lsize);
 
+int __init s5p_fdt_find_mfc_mem(unsigned long node, const char *uname,
+                                int depth, void *data);
+
 #endif /* __PLAT_SAMSUNG_MFC_H */
diff --git a/arch/arm/plat-samsung/s5p-dev-mfc.c b/arch/arm/plat-samsung/s5p-dev-mfc.c
index ad6089465e2a..5ec104b5408b 100644
--- a/arch/arm/plat-samsung/s5p-dev-mfc.c
+++ b/arch/arm/plat-samsung/s5p-dev-mfc.c
@@ -14,6 +14,8 @@
 #include <linux/dma-mapping.h>
 #include <linux/memblock.h>
 #include <linux/ioport.h>
+#include <linux/of_fdt.h>
+#include <linux/of.h>
 
 #include <mach/map.h>
 #include <plat/devs.h>
@@ -69,3 +71,35 @@ static int __init s5p_mfc_memory_init(void)
         return 0;
 }
 device_initcall(s5p_mfc_memory_init);
+
+#ifdef CONFIG_OF
+int __init s5p_fdt_find_mfc_mem(unsigned long node, const char *uname,
+                                int depth, void *data)
+{
+        __be32 *prop;
+        unsigned long len;
+        struct s5p_mfc_dt_meminfo *mfc_mem = data;
+
+        if (!data)
+                return 0;
+
+        if (!of_flat_dt_is_compatible(node, mfc_mem->compatible))
+                return 0;
+
+        prop = of_get_flat_dt_prop(node, "samsung,mfc-l", &len);
+        if (!prop || (len != 2 * sizeof(unsigned long)))
+                return 0;
+
+        mfc_mem->loff = be32_to_cpu(prop[0]);
+        mfc_mem->lsize = be32_to_cpu(prop[1]);
+
+        prop = of_get_flat_dt_prop(node, "samsung,mfc-r", &len);
+        if (!prop || (len != 2 * sizeof(unsigned long)))
+                return 0;
+
+        mfc_mem->roff = be32_to_cpu(prop[0]);
+        mfc_mem->rsize = be32_to_cpu(prop[1]);
+
+        return 1;
+}
+#endif
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index a96bda3d3b84..4e1ccb1e6614 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_MACH_LOONGSON1)	+= clk-ls1x.o
 obj-$(CONFIG_ARCH_U8500)        += ux500/
 obj-$(CONFIG_ARCH_VT8500)       += clk-vt8500.o
 obj-$(CONFIG_ARCH_SUNXI)        += clk-sunxi.o
+obj-$(CONFIG_ARCH_ZYNQ)         += clk-zynq.o
 
 # Chip specific
 obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
diff --git a/drivers/clk/clk-zynq.c b/drivers/clk/clk-zynq.c
new file mode 100644
index 000000000000..37a30514fd66
--- /dev/null
+++ b/drivers/clk/clk-zynq.c
@@ -0,0 +1,383 @@
+/*
+ * Copyright (c) 2012 National Instruments
+ *
+ * Josh Cartwright <josh.cartwright@ni.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/kernel.h>
+#include <linux/clk-provider.h>
+
+static void __iomem *slcr_base;
+
+struct zynq_pll_clk {
+        struct clk_hw   hw;
+        void __iomem    *pll_ctrl;
+        void __iomem    *pll_cfg;
+};
+
+#define to_zynq_pll_clk(hw)     container_of(hw, struct zynq_pll_clk, hw)
+
+#define CTRL_PLL_FDIV(x)        ((x) >> 12)
+
+static unsigned long zynq_pll_recalc_rate(struct clk_hw *hw,
+                                          unsigned long parent_rate)
+{
+        struct zynq_pll_clk *pll = to_zynq_pll_clk(hw);
+        return parent_rate * CTRL_PLL_FDIV(ioread32(pll->pll_ctrl));
+}
+
+static const struct clk_ops zynq_pll_clk_ops = {
+        .recalc_rate    = zynq_pll_recalc_rate,
+};
+
+static void __init zynq_pll_clk_setup(struct device_node *np)
+{
+        struct clk_init_data init;
+        struct zynq_pll_clk *pll;
+        const char *parent_name;
+        struct clk *clk;
+        u32 regs[2];
+        int ret;
+
+        ret = of_property_read_u32_array(np, "reg", regs, ARRAY_SIZE(regs));
+        if (WARN_ON(ret))
+                return;
+
+        pll = kzalloc(sizeof(*pll), GFP_KERNEL);
+        if (WARN_ON(!pll))
+                return;
+
+        pll->pll_ctrl = slcr_base + regs[0];
+        pll->pll_cfg  = slcr_base + regs[1];
+
+        of_property_read_string(np, "clock-output-names", &init.name);
+
+        init.ops = &zynq_pll_clk_ops;
+        parent_name = of_clk_get_parent_name(np, 0);
+        init.parent_names = &parent_name;
+        init.num_parents = 1;
+
+        pll->hw.init = &init;
+
+        clk = clk_register(NULL, &pll->hw);
+        if (WARN_ON(IS_ERR(clk)))
+                return;
+
+        ret = of_clk_add_provider(np, of_clk_src_simple_get, clk);
+        if (WARN_ON(ret))
+                return;
+}
+
+struct zynq_periph_clk {
+        struct clk_hw           hw;
+        struct clk_onecell_data onecell_data;
+        struct clk              *gates[2];
+        void __iomem            *clk_ctrl;
+        spinlock_t              clkact_lock;
+};
+
+#define to_zynq_periph_clk(hw)  container_of(hw, struct zynq_periph_clk, hw)
+
+static const u8 periph_clk_parent_map[] = {
+        0, 0, 1, 2
+};
+#define PERIPH_CLK_CTRL_SRC(x)  (periph_clk_parent_map[((x) & 0x30) >> 4])
+#define PERIPH_CLK_CTRL_DIV(x)  (((x) & 0x3F00) >> 8)
+
+static unsigned long zynq_periph_recalc_rate(struct clk_hw *hw,
+                                             unsigned long parent_rate)
+{
+        struct zynq_periph_clk *periph = to_zynq_periph_clk(hw);
+        return parent_rate / PERIPH_CLK_CTRL_DIV(ioread32(periph->clk_ctrl));
+}
+
+static u8 zynq_periph_get_parent(struct clk_hw *hw)
+{
+        struct zynq_periph_clk *periph = to_zynq_periph_clk(hw);
+        return PERIPH_CLK_CTRL_SRC(ioread32(periph->clk_ctrl));
+}
+
+static const struct clk_ops zynq_periph_clk_ops = {
+        .recalc_rate    = zynq_periph_recalc_rate,
+        .get_parent     = zynq_periph_get_parent,
+};
+
+static void __init zynq_periph_clk_setup(struct device_node *np)
+{
+        struct zynq_periph_clk *periph;
+        const char *parent_names[3];
+        struct clk_init_data init;
+        int clk_num = 0, err;
+        const char *name;
+        struct clk *clk;
+        u32 reg;
+        int i;
+
+        err = of_property_read_u32(np, "reg", &reg);
+        if (WARN_ON(err))
+                return;
+
+        periph = kzalloc(sizeof(*periph), GFP_KERNEL);
+        if (WARN_ON(!periph))
+                return;
+
+        periph->clk_ctrl = slcr_base + reg;
+        spin_lock_init(&periph->clkact_lock);
+
+        init.name = np->name;
+        init.ops = &zynq_periph_clk_ops;
+        for (i = 0; i < ARRAY_SIZE(parent_names); i++)
+                parent_names[i] = of_clk_get_parent_name(np, i);
+        init.parent_names = parent_names;
+        init.num_parents = ARRAY_SIZE(parent_names);
+
+        periph->hw.init = &init;
+
+        clk = clk_register(NULL, &periph->hw);
+        if (WARN_ON(IS_ERR(clk)))
+                return;
+
+        err = of_clk_add_provider(np, of_clk_src_simple_get, clk);
+        if (WARN_ON(err))
+                return;
+
+        err = of_property_read_string_index(np, "clock-output-names", 0,
+                                            &name);
+        if (WARN_ON(err))
+                return;
+
+        periph->gates[0] = clk_register_gate(NULL, name, np->name, 0,
+                                             periph->clk_ctrl, 0, 0,
+                                             &periph->clkact_lock);
+        if (WARN_ON(IS_ERR(periph->gates[0])))
+                return;
+        clk_num++;
+
+        /* some periph clks have 2 downstream gates */
+        err = of_property_read_string_index(np, "clock-output-names", 1,
+                                            &name);
+        if (err != -ENODATA) {
+                periph->gates[1] = clk_register_gate(NULL, name, np->name, 0,
+                                                     periph->clk_ctrl, 1, 0,
+                                                     &periph->clkact_lock);
+                if (WARN_ON(IS_ERR(periph->gates[1])))
+                        return;
+                clk_num++;
+        }
+
+        periph->onecell_data.clks = periph->gates;
+        periph->onecell_data.clk_num = clk_num;
+
+        err = of_clk_add_provider(np, of_clk_src_onecell_get,
+                                  &periph->onecell_data);
+        if (WARN_ON(err))
+                return;
+}
+
+/* CPU Clock domain is modelled as a mux with 4 children subclks, whose
+ * derivative rates depend on CLK_621_TRUE
+ */
+
+struct zynq_cpu_clk {
+        struct clk_hw           hw;
+        struct clk_onecell_data onecell_data;
+        struct clk              *subclks[4];
+        void __iomem            *clk_ctrl;
+        spinlock_t              clkact_lock;
+};
+
+#define to_zynq_cpu_clk(hw)     container_of(hw, struct zynq_cpu_clk, hw)
+
+static const u8 zynq_cpu_clk_parent_map[] = {
+        1, 1, 2, 0
+};
+#define CPU_CLK_SRCSEL(x)       (zynq_cpu_clk_parent_map[(((x) & 0x30) >> 4)])
+#define CPU_CLK_CTRL_DIV(x)     (((x) & 0x3F00) >> 8)
+
+static u8 zynq_cpu_clk_get_parent(struct clk_hw *hw)
+{
+        struct zynq_cpu_clk *cpuclk = to_zynq_cpu_clk(hw);
+        return CPU_CLK_SRCSEL(ioread32(cpuclk->clk_ctrl));
+}
+
+static unsigned long zynq_cpu_clk_recalc_rate(struct clk_hw *hw,
+                                              unsigned long parent_rate)
+{
+        struct zynq_cpu_clk *cpuclk = to_zynq_cpu_clk(hw);
+        return parent_rate / CPU_CLK_CTRL_DIV(ioread32(cpuclk->clk_ctrl));
+}
+
+static const struct clk_ops zynq_cpu_clk_ops = {
+        .get_parent     = zynq_cpu_clk_get_parent,
+        .recalc_rate    = zynq_cpu_clk_recalc_rate,
+};
+
+struct zynq_cpu_subclk {
+        struct clk_hw   hw;
+        void __iomem    *clk_621;
+        enum {
+                CPU_SUBCLK_6X4X,
+                CPU_SUBCLK_3X2X,
+                CPU_SUBCLK_2X,
+                CPU_SUBCLK_1X,
+        } which;
+};
+
+#define CLK_621_TRUE(x) ((x) & 1)
+
+#define to_zynq_cpu_subclk(hw)  container_of(hw, struct zynq_cpu_subclk, hw);
+
+static unsigned long zynq_cpu_subclk_recalc_rate(struct clk_hw *hw,
+                                                 unsigned long parent_rate)
+{
+        unsigned long uninitialized_var(rate);
+        struct zynq_cpu_subclk *subclk;
+        bool is_621;
+
+        subclk = to_zynq_cpu_subclk(hw)
+        is_621 = CLK_621_TRUE(ioread32(subclk->clk_621));
+
+        switch (subclk->which) {
+        case CPU_SUBCLK_6X4X:
+                rate = parent_rate;
+                break;
+        case CPU_SUBCLK_3X2X:
+                rate = parent_rate / 2;
+                break;
+        case CPU_SUBCLK_2X:
+                rate = parent_rate / (is_621 ? 3 : 2);
+                break;
+        case CPU_SUBCLK_1X:
+                rate = parent_rate / (is_621 ? 6 : 4);
+                break;
+        };
+
+        return rate;
+}
+
+static const struct clk_ops zynq_cpu_subclk_ops = {
+        .recalc_rate    = zynq_cpu_subclk_recalc_rate,
+};
+
+static struct clk *zynq_cpu_subclk_setup(struct device_node *np, u8 which,
+                                         void __iomem *clk_621)
+{
+        struct zynq_cpu_subclk *subclk;
+        struct clk_init_data init;
+        struct clk *clk;
+        int err;
+
+        err = of_property_read_string_index(np, "clock-output-names",
+                                            which, &init.name);
+        if (WARN_ON(err))
+                goto err_read_output_name;
+
+        subclk = kzalloc(sizeof(*subclk), GFP_KERNEL);
+        if (!subclk)
+                goto err_subclk_alloc;
+
+        subclk->clk_621 = clk_621;
+        subclk->which = which;
+
+        init.ops = &zynq_cpu_subclk_ops;
+        init.parent_names = &np->name;
+        init.num_parents = 1;
+
+        subclk->hw.init = &init;
+
+        clk = clk_register(NULL, &subclk->hw);
+        if (WARN_ON(IS_ERR(clk)))
+                goto err_clk_register;
+
+        return clk;
+
+err_clk_register:
+        kfree(subclk);
+err_subclk_alloc:
+err_read_output_name:
+        return ERR_PTR(-EINVAL);
+}
+
+static void __init zynq_cpu_clk_setup(struct device_node *np)
+{
+        struct zynq_cpu_clk *cpuclk;
+        const char *parent_names[3];
+        struct clk_init_data init;
+        void __iomem *clk_621;
+        struct clk *clk;
+        u32 reg[2];
+        int err;
+        int i;
+
+        err = of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg));
+        if (WARN_ON(err))
+                return;
+
+        cpuclk = kzalloc(sizeof(*cpuclk), GFP_KERNEL);
+        if (WARN_ON(!cpuclk))
+                return;
+
+        cpuclk->clk_ctrl = slcr_base + reg[0];
+        clk_621 = slcr_base + reg[1];
+        spin_lock_init(&cpuclk->clkact_lock);
+
+        init.name = np->name;
+        init.ops = &zynq_cpu_clk_ops;
+        for (i = 0; i < ARRAY_SIZE(parent_names); i++)
+                parent_names[i] = of_clk_get_parent_name(np, i);
+        init.parent_names = parent_names;
+        init.num_parents = ARRAY_SIZE(parent_names);
+
+        cpuclk->hw.init = &init;
+
+        clk = clk_register(NULL, &cpuclk->hw);
+        if (WARN_ON(IS_ERR(clk)))
+                return;
+
+        err = of_clk_add_provider(np, of_clk_src_simple_get, clk);
+        if (WARN_ON(err))
+                return;
+
+        for (i = 0; i < 4; i++) {
+                cpuclk->subclks[i] = zynq_cpu_subclk_setup(np, i, clk_621);
+                if (WARN_ON(IS_ERR(cpuclk->subclks[i])))
+                        return;
+        }
+
+        cpuclk->onecell_data.clks = cpuclk->subclks;
+        cpuclk->onecell_data.clk_num = i;
+
+        err = of_clk_add_provider(np, of_clk_src_onecell_get,
+                                  &cpuclk->onecell_data);
+        if (WARN_ON(err))
+                return;
+}
+
+static const __initconst struct of_device_id zynq_clk_match[] = {
+        { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
+        { .compatible = "xlnx,zynq-pll", .data = zynq_pll_clk_setup, },
+        { .compatible = "xlnx,zynq-periph-clock",
+                .data = zynq_periph_clk_setup, },
+        { .compatible = "xlnx,zynq-cpu-clock", .data = zynq_cpu_clk_setup, },
+        {}
+};
+
+void __init xilinx_zynq_clocks_init(void __iomem *slcr)
+{
+        slcr_base = slcr;
+        of_clk_init(zynq_clk_match);
+}
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 14a6c2913e49..a5cbeec6f6db 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -171,7 +171,7 @@ config GPIO_MSM_V2
 
 config GPIO_MVEBU
         def_bool y
-        depends on ARCH_MVEBU
+        depends on PLAT_ORION
         select GPIO_GENERIC
         select GENERIC_IRQ_CHIP
 
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index a006f0db15af..88f41e51565b 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -2797,27 +2797,6 @@ static __init void exynos4_gpiolib_init(void)
         int group = 0;
         void __iomem *gpx_base;
 
-#ifdef CONFIG_PINCTRL_SAMSUNG
-                /*
-                 * This gpio driver includes support for device tree support and
-                 * there are platforms using it. In order to maintain
-                 * compatibility with those platforms, and to allow non-dt
-                 * Exynos4210 platforms to use this gpiolib support, a check
-                 * is added to find out if there is a active pin-controller
-                 * driver support available. If it is available, this gpiolib
-                 * support is ignored and the gpiolib support available in
-                 * pin-controller driver is used. This is a temporary check and
-                 * will go away when all of the Exynos4210 platforms have
-                 * switched to using device tree and the pin-ctrl driver.
-                 */
-                struct device_node *pctrl_np;
-                const char *pctrl_compat = "samsung,pinctrl-exynos4210";
-                pctrl_np = of_find_compatible_node(NULL, NULL, pctrl_compat);
-                if (pctrl_np)
-                        if (of_device_is_available(pctrl_np))
-                                return;
-#endif
-
         /* gpio part1 */
         gpio_base1 = ioremap(EXYNOS4_PA_GPIO1, SZ_4K);
         if (gpio_base1 == NULL) {
@@ -3032,6 +3011,28 @@ static __init int samsung_gpiolib_init(void)
         int i, nr_chips;
         int group = 0;
 
+#ifdef CONFIG_PINCTRL_SAMSUNG
+        /*
+        * This gpio driver includes support for device tree support and there
+        * are platforms using it. In order to maintain compatibility with those
+        * platforms, and to allow non-dt Exynos4210 platforms to use this
+        * gpiolib support, a check is added to find out if there is a active
+        * pin-controller driver support available. If it is available, this
+        * gpiolib support is ignored and the gpiolib support available in
+        * pin-controller driver is used. This is a temporary check and will go
+        * away when all of the Exynos4210 platforms have switched to using
+        * device tree and the pin-ctrl driver.
+        */
+        struct device_node *pctrl_np;
+        static const struct of_device_id exynos_pinctrl_ids[] = {
+                { .compatible = "samsung,pinctrl-exynos4210", },
+                { .compatible = "samsung,pinctrl-exynos4x12", },
+        };
+        for_each_matching_node(pctrl_np, exynos_pinctrl_ids)
+                if (pctrl_np && of_device_is_available(pctrl_np))
+                        return -ENODEV;
+#endif
+
         samsung_gpiolib_set_cfg(samsung_gpio_cfgs, ARRAY_SIZE(samsung_gpio_cfgs));
 
         if (soc_is_s3c24xx()) {
diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c
index ffe74b27d66d..40c9c3eecd94 100644
--- a/drivers/pinctrl/mvebu/pinctrl-dove.c
+++ b/drivers/pinctrl/mvebu/pinctrl-dove.c
@@ -22,22 +22,22 @@
 
 #include "pinctrl-mvebu.h"
 
-#define DOVE_SB_REGS_VIRT_BASE          0xfde00000
-#define DOVE_MPP_VIRT_BASE              (DOVE_SB_REGS_VIRT_BASE | 0xd0200)
+#define DOVE_SB_REGS_VIRT_BASE          IOMEM(0xfde00000)
+#define DOVE_MPP_VIRT_BASE              (DOVE_SB_REGS_VIRT_BASE + 0xd0200)
 #define DOVE_PMU_MPP_GENERAL_CTRL       (DOVE_MPP_VIRT_BASE + 0x10)
 #define  DOVE_AU0_AC97_SEL              BIT(16)
-#define DOVE_GLOBAL_CONFIG_1            (DOVE_SB_REGS_VIRT_BASE | 0xe802C)
+#define DOVE_GLOBAL_CONFIG_1            (DOVE_SB_REGS_VIRT_BASE + 0xe802C)
 #define  DOVE_TWSI_ENABLE_OPTION1       BIT(7)
-#define DOVE_GLOBAL_CONFIG_2            (DOVE_SB_REGS_VIRT_BASE | 0xe8030)
+#define DOVE_GLOBAL_CONFIG_2            (DOVE_SB_REGS_VIRT_BASE + 0xe8030)
 #define  DOVE_TWSI_ENABLE_OPTION2       BIT(20)
 #define  DOVE_TWSI_ENABLE_OPTION3       BIT(21)
 #define  DOVE_TWSI_OPTION3_GPIO         BIT(22)
-#define DOVE_SSP_CTRL_STATUS_1          (DOVE_SB_REGS_VIRT_BASE | 0xe8034)
+#define DOVE_SSP_CTRL_STATUS_1          (DOVE_SB_REGS_VIRT_BASE + 0xe8034)
 #define  DOVE_SSP_ON_AU1                BIT(0)
-#define DOVE_MPP_GENERAL_VIRT_BASE      (DOVE_SB_REGS_VIRT_BASE | 0xe803c)
+#define DOVE_MPP_GENERAL_VIRT_BASE      (DOVE_SB_REGS_VIRT_BASE + 0xe803c)
 #define  DOVE_AU1_SPDIFO_GPIO_EN        BIT(1)
 #define  DOVE_NAND_GPIO_EN              BIT(0)
-#define DOVE_GPIO_LO_VIRT_BASE          (DOVE_SB_REGS_VIRT_BASE | 0xd0400)
+#define DOVE_GPIO_LO_VIRT_BASE          (DOVE_SB_REGS_VIRT_BASE + 0xd0400)
 #define DOVE_MPP_CTRL4_VIRT_BASE        (DOVE_GPIO_LO_VIRT_BASE + 0x40)
 #define  DOVE_SPI_GPIO_SEL              BIT(5)
 #define  DOVE_UART1_GPIO_SEL            BIT(4)
@@ -234,6 +234,14 @@ static int dove_audio1_ctrl_set(struct mvebu_mpp_ctrl *ctrl,
         unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
         unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
 
+        /*
+         * clear all audio1 related bits before configure
+         */
+        gcfg2 &= ~DOVE_TWSI_OPTION3_GPIO;
+        gmpp &= ~DOVE_AU1_SPDIFO_GPIO_EN;
+        sspc1 &= ~DOVE_SSP_ON_AU1;
+        mpp4 &= ~DOVE_AU1_GPIO_SEL;
+
         if (config & BIT(0))
                 gcfg2 |= DOVE_TWSI_OPTION3_GPIO;
         if (config & BIT(1))
diff --git a/drivers/pinctrl/mvebu/pinctrl-kirkwood.c b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
index 9a74ef674a0e..fa6ce31c94d9 100644
--- a/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
+++ b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
@@ -21,340 +21,341 @@
 
 #include "pinctrl-mvebu.h"
 
-#define V(f6180, f6190, f6192, f6281, f6282)            \
+#define V(f6180, f6190, f6192, f6281, f6282, dx4122)    \
         ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) |   \
-         (f6281 << 3) | (f6282 << 4))
+         (f6281 << 3) | (f6282 << 4) | (dx4122 << 5))
 
 enum kirkwood_variant {
-        VARIANT_MV88F6180 = V(1, 0, 0, 0, 0),
-        VARIANT_MV88F6190 = V(0, 1, 0, 0, 0),
-        VARIANT_MV88F6192 = V(0, 0, 1, 0, 0),
-        VARIANT_MV88F6281 = V(0, 0, 0, 1, 0),
-        VARIANT_MV88F6282 = V(0, 0, 0, 0, 1),
+        VARIANT_MV88F6180       = V(1, 0, 0, 0, 0, 0),
+        VARIANT_MV88F6190       = V(0, 1, 0, 0, 0, 0),
+        VARIANT_MV88F6192       = V(0, 0, 1, 0, 0, 0),
+        VARIANT_MV88F6281       = V(0, 0, 0, 1, 0, 0),
+        VARIANT_MV88F6282       = V(0, 0, 0, 0, 1, 0),
+        VARIANT_MV98DX4122      = V(0, 0, 0, 0, 0, 1),
 };
 
 static struct mvebu_mpp_mode mv88f6xxx_mpp_modes[] = {
         MPP_MODE(0,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "nand", "io2",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "spi", "cs",       V(1, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "nand", "io2",     V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "spi", "cs",       V(1, 1, 1, 1, 1, 1))),
         MPP_MODE(1,
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "nand", "io3",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "spi", "mosi",     V(1, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "nand", "io3",     V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "spi", "mosi",     V(1, 1, 1, 1, 1, 1))),
         MPP_MODE(2,
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "nand", "io4",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "spi", "sck",      V(1, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "nand", "io4",     V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "spi", "sck",      V(1, 1, 1, 1, 1, 1))),
         MPP_MODE(3,
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "nand", "io5",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "spi", "miso",     V(1, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "nand", "io5",     V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "spi", "miso",     V(1, 1, 1, 1, 1, 1))),
         MPP_MODE(4,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "nand", "io6",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "uart0", "rxd",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "sata1", "act",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "hsync",    V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xd, "ptp", "clk",      V(1, 1, 1, 1, 0))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "nand", "io6",     V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "uart0", "rxd",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x5, "sata1", "act",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "hsync",    V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xd, "ptp", "clk",      V(1, 1, 1, 1, 0, 0))),
         MPP_MODE(5,
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "nand", "io7",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "uart0", "txd",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "ptp", "trig",     V(1, 1, 1, 1, 0)),
-                MPP_VAR_FUNCTION(0x5, "sata0", "act",    V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "vsync",    V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "nand", "io7",     V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "uart0", "txd",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x4, "ptp", "trig",     V(1, 1, 1, 1, 0, 0)),
+                MPP_VAR_FUNCTION(0x5, "sata0", "act",    V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "vsync",    V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(6,
-                MPP_VAR_FUNCTION(0x0, "sysrst", "out",   V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "spi", "mosi",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "ptp", "trig",     V(1, 1, 1, 1, 0))),
+                MPP_VAR_FUNCTION(0x0, "sysrst", "out",   V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "spi", "mosi",     V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "ptp", "trig",     V(1, 1, 1, 1, 0, 0))),
         MPP_MODE(7,
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "pex", "rsto",     V(1, 1, 1, 1, 0)),
-                MPP_VAR_FUNCTION(0x2, "spi", "cs",       V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ptp", "trig",     V(1, 1, 1, 1, 0)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "pwm",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "pex", "rsto",     V(1, 1, 1, 1, 0, 1)),
+                MPP_VAR_FUNCTION(0x2, "spi", "cs",       V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x3, "ptp", "trig",     V(1, 1, 1, 1, 0, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "pwm",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(8,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "twsi0", "sda",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "uart0", "rts",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "uart1", "rts",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "mii-1", "rxerr",  V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "sata1", "prsnt",  V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xc, "ptp", "clk",      V(1, 1, 1, 1, 0)),
-                MPP_VAR_FUNCTION(0xd, "mii", "col",      V(1, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "twsi0", "sda",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "uart0", "rts",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x3, "uart1", "rts",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x4, "mii-1", "rxerr",  V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x5, "sata1", "prsnt",  V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xc, "ptp", "clk",      V(1, 1, 1, 1, 0, 0)),
+                MPP_VAR_FUNCTION(0xd, "mii", "col",      V(1, 1, 1, 1, 1, 0))),
         MPP_MODE(9,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "twsi0", "sck",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "uart0", "cts",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "uart1", "cts",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "sata0", "prsnt",  V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xc, "ptp", "evreq",    V(1, 1, 1, 1, 0)),
-                MPP_VAR_FUNCTION(0xd, "mii", "crs",      V(1, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "twsi0", "sck",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "uart0", "cts",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x3, "uart1", "cts",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x5, "sata0", "prsnt",  V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xc, "ptp", "evreq",    V(1, 1, 1, 1, 0, 0)),
+                MPP_VAR_FUNCTION(0xd, "mii", "crs",      V(1, 1, 1, 1, 1, 0))),
         MPP_MODE(10,
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "spi", "sck",      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0X3, "uart0", "txd",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "sata1", "act",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xc, "ptp", "trig",     V(1, 1, 1, 1, 0))),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "spi", "sck",      V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0X3, "uart0", "txd",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x5, "sata1", "act",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xc, "ptp", "trig",     V(1, 1, 1, 1, 0, 0))),
         MPP_MODE(11,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "spi", "miso",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "uart0", "rxd",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "ptp-1", "evreq",  V(1, 1, 1, 1, 0)),
-                MPP_VAR_FUNCTION(0xc, "ptp-2", "trig",   V(1, 1, 1, 1, 0)),
-                MPP_VAR_FUNCTION(0xd, "ptp", "clk",      V(1, 1, 1, 1, 0)),
-                MPP_VAR_FUNCTION(0x5, "sata0", "act",    V(0, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "spi", "miso",     V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x3, "uart0", "rxd",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x4, "ptp-1", "evreq",  V(1, 1, 1, 1, 0, 0)),
+                MPP_VAR_FUNCTION(0xc, "ptp-2", "trig",   V(1, 1, 1, 1, 0, 0)),
+                MPP_VAR_FUNCTION(0xd, "ptp", "clk",      V(1, 1, 1, 1, 0, 0)),
+                MPP_VAR_FUNCTION(0x5, "sata0", "act",    V(0, 1, 1, 1, 1, 0))),
         MPP_MODE(12,
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 0, 1)),
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 0)),
-                MPP_VAR_FUNCTION(0x1, "sdio", "clk",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xa, "audio", "spdifo", V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xb, "spi", "mosi",     V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xd, "twsi1", "sda",    V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 0, 0)),
+                MPP_VAR_FUNCTION(0x1, "sdio", "clk",     V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xa, "audio", "spdifo", V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "spi", "mosi",     V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xd, "twsi1", "sda",    V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(13,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "sdio", "cmd",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "uart1", "txd",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xa, "audio", "rmclk",  V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "pwm",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "sdio", "cmd",     V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "uart1", "txd",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0xa, "audio", "rmclk",  V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "pwm",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(14,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "sdio", "d0",      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "uart1", "rxd",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",  V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xa, "audio", "spdifi", V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xb, "audio-1", "sdi",  V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xd, "mii", "col",      V(1, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "sdio", "d0",      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "uart1", "rxd",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",  V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xa, "audio", "spdifi", V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "audio-1", "sdi",  V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xd, "mii", "col",      V(1, 1, 1, 1, 1, 0))),
         MPP_MODE(15,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "sdio", "d1",      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "uart0", "rts",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "uart1", "txd",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "sata0", "act",    V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "spi", "cs",       V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "sdio", "d1",      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "uart0", "rts",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x3, "uart1", "txd",    V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "sata0", "act",    V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "spi", "cs",       V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(16,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "sdio", "d2",      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "uart0", "cts",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "uart1", "rxd",    V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "sata1", "act",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "extclk",   V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xd, "mii", "crs",      V(1, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "sdio", "d2",      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "uart0", "cts",    V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x3, "uart1", "rxd",    V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "sata1", "act",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "extclk",   V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xd, "mii", "crs",      V(1, 1, 1, 1, 1, 0))),
         MPP_MODE(17,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "sdio", "d3",      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",  V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xa, "sata1", "act",    V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xd, "twsi1", "sck",    V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "sdio", "d3",      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",  V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xa, "sata1", "act",    V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xd, "twsi1", "sck",    V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(18,
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "nand", "io0",     V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "pex", "clkreq",   V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "nand", "io0",     V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "pex", "clkreq",   V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(19,
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "nand", "io1",     V(1, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(1, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "nand", "io1",     V(1, 1, 1, 1, 1, 1))),
         MPP_MODE(20,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp0",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "tx0ql",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "txd0",     V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "sata1", "act",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d0",       V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xc, "mii", "rxerr",    V(1, 0, 0, 0, 0))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp0",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "tx0ql",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "txd0",     V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x5, "sata1", "act",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d0",       V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xc, "mii", "rxerr",    V(1, 0, 0, 0, 0, 0))),
         MPP_MODE(21,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp1",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "rx0ql",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "txd1",     V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(1, 0, 0, 0, 0)),
-                MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "sata0", "act",    V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d1",       V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp1",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "rx0ql",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "txd1",     V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(1, 0, 0, 0, 0, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x5, "sata0", "act",    V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d1",       V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(22,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp2",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "tx2ql",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "txd2",     V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(1, 0, 0, 0, 0)),
-                MPP_VAR_FUNCTION(0x4, "audio", "rmclk",  V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "sata1", "prsnt",  V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d2",       V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp2",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "tx2ql",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "txd2",     V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(1, 0, 0, 0, 0, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "rmclk",  V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x5, "sata1", "prsnt",  V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d2",       V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(23,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp3",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "rx2ql",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "txd3",     V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "rmclk",  V(1, 0, 0, 0, 0)),
-                MPP_VAR_FUNCTION(0x4, "audio", "bclk",   V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "sata0", "prsnt",  V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d3",       V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp3",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "rx2ql",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "txd3",     V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "rmclk",  V(1, 0, 0, 0, 0, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "bclk",   V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x5, "sata0", "prsnt",  V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d3",       V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(24,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp4",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs0",  V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "rxd0",     V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "bclk",   V(1, 0, 0, 0, 0)),
-                MPP_VAR_FUNCTION(0x4, "audio", "sdo",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d4",       V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp4",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs0",  V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "rxd0",     V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "bclk",   V(1, 0, 0, 0, 0, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "sdo",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d4",       V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(25,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp5",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "spi-sck",  V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "rxd1",     V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "sdo",    V(1, 0, 0, 0, 0)),
-                MPP_VAR_FUNCTION(0x4, "audio", "lrclk",  V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d5",       V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp5",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "spi-sck",  V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "rxd1",     V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "sdo",    V(1, 0, 0, 0, 0, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "lrclk",  V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d5",       V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(26,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp6",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "spi-miso", V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "rxd2",     V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "lrclk",  V(1, 0, 0, 0, 0)),
-                MPP_VAR_FUNCTION(0x4, "audio", "mclk",   V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d6",       V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp6",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "spi-miso", V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "rxd2",     V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "lrclk",  V(1, 0, 0, 0, 0, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "mclk",   V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d6",       V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(27,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp7",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "spi-mosi", V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "rxd3",     V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "mclk",   V(1, 0, 0, 0, 0)),
-                MPP_VAR_FUNCTION(0x4, "audio", "sdi",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d7",       V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp7",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "spi-mosi", V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "rxd3",     V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "mclk",   V(1, 0, 0, 0, 0, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "sdi",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d7",       V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(28,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp8",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "int",      V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "col",      V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "sdi",    V(1, 0, 0, 0, 0)),
-                MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d8",       V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp8",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "int",      V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "col",      V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "sdi",    V(1, 0, 0, 0, 0, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d8",       V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(29,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp9",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "rst",      V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "txclk",    V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(1, 0, 0, 0, 0)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d9",       V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(1, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp9",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "rst",      V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "txclk",    V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(1, 0, 0, 0, 0, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d9",       V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(30,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp10",      V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "pclk",     V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "rxctl",    V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d10",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp10",      V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "pclk",     V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "rxctl",    V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d10",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(31,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp11",      V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "fs",       V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "rxclk",    V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d11",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp11",      V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "fs",       V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "rxclk",    V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d11",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(32,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp12",      V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "drx",      V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "txclko",   V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d12",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp12",      V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "drx",      V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "txclko",   V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d12",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(33,
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "dtx",      V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "txctl",    V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d13",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "dtx",      V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "txctl",    V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d13",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(34,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs1",  V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "txen",     V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "sata1", "act",    V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d14",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs1",  V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "txen",     V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x5, "sata1", "act",    V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d14",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(35,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "tx0ql",    V(0, 0, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x3, "ge1", "rxerr",    V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "sata0", "act",    V(0, 1, 1, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d15",      V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xc, "mii", "rxerr",    V(0, 1, 1, 1, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 1, 1, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "tx0ql",    V(0, 0, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x3, "ge1", "rxerr",    V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x5, "sata0", "act",    V(0, 1, 1, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d15",      V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xc, "mii", "rxerr",    V(0, 1, 1, 1, 1, 0))),
         MPP_MODE(36,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp0",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs1",  V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "twsi1", "sda",    V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp0",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs1",  V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "twsi1", "sda",    V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(37,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp1",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "tx2ql",    V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "twsi1", "sck",    V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp1",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "tx2ql",    V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "twsi1", "sck",    V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(38,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp2",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "rx2ql",    V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "rmclk",  V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d18",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp2",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "rx2ql",    V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "rmclk",  V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d18",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(39,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp3",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs0",  V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "bclk",   V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d19",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp3",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs0",  V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "bclk",   V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d19",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(40,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp4",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "spi-sck",  V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "sdo",    V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d20",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp4",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "spi-sck",  V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "sdo",    V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d20",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(41,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp5",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "spi-miso", V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "lrclk",  V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d21",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp5",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "spi-miso", V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "lrclk",  V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d21",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(42,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp6",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "spi-mosi", V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "mclk",   V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d22",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp6",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "spi-mosi", V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "mclk",   V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d22",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(43,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp7",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "int",      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "sdi",    V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d23",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp7",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "int",      V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "sdi",    V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d23",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(44,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp8",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "rst",      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "clk",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp8",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "rst",      V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "clk",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(45,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp9",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "pclk",     V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "e",        V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 1)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp9",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "pclk",     V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "e",        V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(46,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp10",      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "fs",       V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "hsync",    V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp10",      V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "fs",       V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "hsync",    V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(47,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp11",      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "drx",      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "vsync",    V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp11",      V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "drx",      V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "vsync",    V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(48,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp12",      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "dtx",      V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d16",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp12",      V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "dtx",      V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d16",      V(0, 0, 0, 0, 1, 0))),
         MPP_MODE(49,
-                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 0)),
-                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0x1, "ts", "mp9",       V(0, 0, 0, 1, 0)),
-                MPP_VAR_FUNCTION(0x2, "tdm", "rx0ql",    V(0, 0, 0, 1, 1)),
-                MPP_VAR_FUNCTION(0x5, "ptp", "clk",      V(0, 0, 0, 1, 0)),
-                MPP_VAR_FUNCTION(0xa, "pex", "clkreq",   V(0, 0, 0, 0, 1)),
-                MPP_VAR_FUNCTION(0xb, "lcd", "d17",      V(0, 0, 0, 0, 1))),
+                MPP_VAR_FUNCTION(0x0, "gpio", NULL,      V(0, 0, 0, 1, 0, 1)),
+                MPP_VAR_FUNCTION(0x0, "gpo", NULL,       V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0x1, "ts", "mp9",       V(0, 0, 0, 1, 0, 0)),
+                MPP_VAR_FUNCTION(0x2, "tdm", "rx0ql",    V(0, 0, 0, 1, 1, 0)),
+                MPP_VAR_FUNCTION(0x5, "ptp", "clk",      V(0, 0, 0, 1, 0, 0)),
+                MPP_VAR_FUNCTION(0xa, "pex", "clkreq",   V(0, 0, 0, 0, 1, 0)),
+                MPP_VAR_FUNCTION(0xb, "lcd", "d17",      V(0, 0, 0, 0, 1, 0))),
 };
 
 static struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = {
@@ -433,12 +434,23 @@ static struct mvebu_pinctrl_soc_info mv88f6282_info = {
         .ngpioranges = ARRAY_SIZE(mv88f628x_gpio_ranges),
 };
 
+static struct mvebu_pinctrl_soc_info mv98dx4122_info = {
+        .variant = VARIANT_MV98DX4122,
+        .controls = mv88f628x_mpp_controls,
+        .ncontrols = ARRAY_SIZE(mv88f628x_mpp_controls),
+        .modes = mv88f6xxx_mpp_modes,
+        .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
+        .gpioranges = mv88f628x_gpio_ranges,
+        .ngpioranges = ARRAY_SIZE(mv88f628x_gpio_ranges),
+};
+
 static struct of_device_id kirkwood_pinctrl_of_match[] __devinitdata = {
         { .compatible = "marvell,88f6180-pinctrl", .data = &mv88f6180_info },
         { .compatible = "marvell,88f6190-pinctrl", .data = &mv88f6190_info },
         { .compatible = "marvell,88f6192-pinctrl", .data = &mv88f6192_info },
         { .compatible = "marvell,88f6281-pinctrl", .data = &mv88f6281_info },
         { .compatible = "marvell,88f6282-pinctrl", .data = &mv88f6282_info },
+        { .compatible = "marvell,98dx4122-pinctrl", .data = &mv98dx4122_info },
         { }
 };
 
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 49a893972318..b1d956d81f0c 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -335,6 +335,9 @@ config AB8500_BATTERY_THERM_ON_BATCTRL
         help
           Say Y to enable battery temperature measurements using
           thermistor connected on BATCTRL ADC.
+
+source "drivers/power/reset/Kconfig"
+
 endif # POWER_SUPPLY
 
 source "drivers/power/avs/Kconfig"
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index b949cf85590c..f1d99f4a0bc3 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -49,3 +49,4 @@ obj-$(CONFIG_CHARGER_MAX8997)	+= max8997_charger.o
 obj-$(CONFIG_CHARGER_MAX8998)   += max8998_charger.o
 obj-$(CONFIG_POWER_AVS)         += avs/
 obj-$(CONFIG_CHARGER_SMB347)    += smb347-charger.o
+obj-$(CONFIG_POWER_RESET)       += reset/
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
new file mode 100644
index 000000000000..6461b489fb09
--- /dev/null
+++ b/drivers/power/reset/Kconfig
@@ -0,0 +1,15 @@
+menuconfig POWER_RESET
+        bool "Board level reset or power off"
+        help
+          Provides a number of drivers which either reset a complete board
+          or shut it down, by manipulating the main power supply on the board.
+
+          Say Y here to enable board reset and power off
+
+config POWER_RESET_GPIO
+        bool "GPIO power-off driver"
+        depends on OF_GPIO && POWER_RESET
+        help
+          This driver supports turning off your board via a GPIO line.
+          If your board needs a GPIO high/low to power down, say Y and
+          create a binding in your devicetree.
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
new file mode 100644
index 000000000000..751488a4a0c5
--- /dev/null
+++ b/drivers/power/reset/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
diff --git a/drivers/power/reset/gpio-poweroff.c b/drivers/power/reset/gpio-poweroff.c
new file mode 100644
index 000000000000..0491e5335d02
--- /dev/null
+++ b/drivers/power/reset/gpio-poweroff.c
@@ -0,0 +1,129 @@
+/*
+ * Toggles a GPIO pin to power down a device
+ *
+ * Jamie Lentin <jm@lentin.co.uk>
+ * Andrew Lunn <andrew@lunn.ch>
+ *
+ * Copyright (C) 2012 Jamie Lentin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/of_platform.h>
+#include <linux/of_gpio.h>
+#include <linux/module.h>
+
+/*
+ * Hold configuration here, cannot be more than one instance of the driver
+ * since pm_power_off itself is global.
+ */
+static int gpio_num = -1;
+static int gpio_active_low;
+
+static void gpio_poweroff_do_poweroff(void)
+{
+        BUG_ON(gpio_num == -1);
+
+        /* drive it active */
+        gpio_direction_output(gpio_num, !gpio_active_low);
+        mdelay(100);
+        /* rising edge or drive inactive */
+        gpio_set_value(gpio_num, gpio_active_low);
+        mdelay(100);
+        /* falling edge */
+        gpio_set_value(gpio_num, !gpio_active_low);
+
+        /* give it some time */
+        mdelay(3000);
+
+        WARN_ON(1);
+}
+
+static int __devinit gpio_poweroff_probe(struct platform_device *pdev)
+{
+        enum of_gpio_flags flags;
+        bool input = false;
+        int ret;
+
+        /* If a pm_power_off function has already been added, leave it alone */
+        if (pm_power_off != NULL) {
+                pr_err("%s: pm_power_off function already registered",
+                       __func__);
+                return -EBUSY;
+        }
+
+        gpio_num = of_get_gpio_flags(pdev->dev.of_node, 0, &flags);
+        if (gpio_num < 0) {
+                pr_err("%s: Could not get GPIO configuration: %d",
+                       __func__, gpio_num);
+                return -ENODEV;
+        }
+        gpio_active_low = flags & OF_GPIO_ACTIVE_LOW;
+
+        if (of_get_property(pdev->dev.of_node, "input", NULL))
+                input = true;
+
+        ret = gpio_request(gpio_num, "poweroff-gpio");
+        if (ret) {
+                pr_err("%s: Could not get GPIO %d", __func__, gpio_num);
+                return ret;
+        }
+        if (input) {
+                if (gpio_direction_input(gpio_num)) {
+                        pr_err("Could not set direction of GPIO %d to input",
+                               gpio_num);
+                        goto err;
+                }
+        } else {
+                if (gpio_direction_output(gpio_num, gpio_active_low)) {
+                        pr_err("Could not set direction of GPIO %d", gpio_num);
+                        goto err;
+                }
+        }
+
+        pm_power_off = &gpio_poweroff_do_poweroff;
+        return 0;
+
+err:
+        gpio_free(gpio_num);
+        return -ENODEV;
+}
+
+static int __devexit gpio_poweroff_remove(struct platform_device *pdev)
+{
+        if (gpio_num != -1)
+                gpio_free(gpio_num);
+        if (pm_power_off == &gpio_poweroff_do_poweroff)
+                pm_power_off = NULL;
+
+        return 0;
+}
+
+static const struct of_device_id of_gpio_poweroff_match[] = {
+        { .compatible = "gpio-poweroff", },
+        {},
+};
+
+static struct platform_driver gpio_poweroff_driver = {
+        .probe = gpio_poweroff_probe,
+        .remove = __devexit_p(gpio_poweroff_remove),
+        .driver = {
+                   .name = "poweroff-gpio",
+                   .owner = THIS_MODULE,
+                   .of_match_table = of_gpio_poweroff_match,
+                   },
+};
+
+module_platform_driver(gpio_poweroff_driver);
+
+MODULE_AUTHOR("Jamie Lentin <jm@lentin.co.uk>");
+MODULE_DESCRIPTION("GPIO poweroff driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:poweroff-gpio");
diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
index f74794c93152..a7d1f5b4c4ed 100644
--- a/drivers/usb/host/ehci-orion.c
+++ b/drivers/usb/host/ehci-orion.c
@@ -14,6 +14,9 @@
 #include <linux/mbus.h>
 #include <linux/clk.h>
 #include <linux/platform_data/usb-ehci-orion.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
 
 #define rdl(off)        __raw_readl(hcd->regs + (off))
 #define wrl(off, val)   __raw_writel((val), hcd->regs + (off))
@@ -167,6 +170,8 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
         }
 }
 
+static u64 ehci_orion_dma_mask = DMA_BIT_MASK(32);
+
 static int ehci_orion_drv_probe(struct platform_device *pdev)
 {
         struct orion_ehci_data *pd = pdev->dev.platform_data;
@@ -177,13 +182,17 @@ static int ehci_orion_drv_probe(struct platform_device *pdev)
         struct clk *clk;
         void __iomem *regs;
         int irq, err;
+        enum orion_ehci_phy_ver phy_version;
 
         if (usb_disabled())
                 return -ENODEV;
 
         pr_debug("Initializing Orion-SoC USB Host Controller\n");
 
-        irq = platform_get_irq(pdev, 0);
+        if (pdev->dev.of_node)
+                irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
+        else
+                irq = platform_get_irq(pdev, 0);
         if (irq <= 0) {
                 dev_err(&pdev->dev,
                         "Found HC with no IRQ. Check %s setup!\n",
@@ -201,6 +210,14 @@ static int ehci_orion_drv_probe(struct platform_device *pdev)
                 goto err1;
         }
 
+        /*
+         * Right now device-tree probed devices don't get dma_mask
+         * set. Since shared usb code relies on it, set it here for
+         * now. Once we have dma capability bindings this can go away.
+         */
+        if (!pdev->dev.dma_mask)
+                pdev->dev.dma_mask = &ehci_orion_dma_mask;
+
         if (!request_mem_region(res->start, resource_size(res),
                                 ehci_orion_hc_driver.description)) {
                 dev_dbg(&pdev->dev, "controller already in use\n");
@@ -248,7 +265,12 @@ static int ehci_orion_drv_probe(struct platform_device *pdev)
         /*
          * setup Orion USB controller.
          */
-        switch (pd->phy_version) {
+        if (pdev->dev.of_node)
+                phy_version = EHCI_PHY_NA;
+        else
+                phy_version = pd->phy_version;
+
+        switch (phy_version) {
         case EHCI_PHY_NA:       /* dont change USB phy settings */
                 break;
         case EHCI_PHY_ORION:
@@ -303,9 +325,19 @@ static int __exit ehci_orion_drv_remove(struct platform_device *pdev)
 
 MODULE_ALIAS("platform:orion-ehci");
 
+static const struct of_device_id ehci_orion_dt_ids[] __devinitdata = {
+        { .compatible = "marvell,orion-ehci", },
+        {},
+};
+MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
+
 static struct platform_driver ehci_orion_driver = {
         .probe          = ehci_orion_drv_probe,
         .remove         = __exit_p(ehci_orion_drv_remove),
         .shutdown       = usb_hcd_platform_shutdown,
-        .driver.name    = "orion-ehci",
+        .driver = {
+                .name   = "orion-ehci",
+                .owner  = THIS_MODULE,
+                .of_match_table = of_match_ptr(ehci_orion_dt_ids),
+        },
 };
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 05e1be85fdee..dc42e44b6bc1 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -32,6 +32,7 @@
 #include <linux/timer.h>
 #include <linux/bitops.h>
 #include <linux/uaccess.h>
+#include <linux/of.h>
 
 #include "at91sam9_wdt.h"
 
@@ -302,11 +303,21 @@ static int __exit at91wdt_remove(struct platform_device *pdev)
         return res;
 }
 
+#if defined(CONFIG_OF)
+static const struct of_device_id at91_wdt_dt_ids[] __initconst = {
+        { .compatible = "atmel,at91sam9260-wdt" },
+        { /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
+#endif
+
 static struct platform_driver at91wdt_driver = {
         .remove         = __exit_p(at91wdt_remove),
         .driver         = {
                 .name   = "at91_wdt",
                 .owner  = THIS_MODULE,
+                .of_match_table = of_match_ptr(at91_wdt_dt_ids),
         },
 };
 
diff --git a/include/linux/clk/zynq.h b/include/linux/clk/zynq.h
new file mode 100644
index 000000000000..56be7cd9aa8b
--- /dev/null
+++ b/include/linux/clk/zynq.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2012 National Instruments
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_CLK_ZYNQ_H_
+#define __LINUX_CLK_ZYNQ_H_
+
+void __init xilinx_zynq_clocks_init(void __iomem *slcr);
+
+#endif