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-rw-r--r--arch/blackfin/mach-bf537/head.S24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index b4377dddc127..2c2652bee7e5 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -470,38 +470,38 @@ ENTRY(_bfin_reset)
470 SSYNC; 470 SSYNC;
471 471
472#if defined(CONFIG_MTD_M25P80) 472#if defined(CONFIG_MTD_M25P80)
473/* 473 /*
474 * The following code fix the SPI flash reboot issue, 474 * The following code fix the SPI flash reboot issue,
475 * /CS signal of the chip which is using PF10 return to GPIO mode 475 * /CS signal of the chip which is using PF10 return to GPIO mode
476 */ 476 */
477 p0.h = hi(PORTF_FER); 477 p0.h = hi(PORTF_FER);
478 p0.l = lo(PORTF_FER); 478 p0.l = lo(PORTF_FER);
479 r0.l = 0x0000; 479 r0.l = 0x0000;
480 w[p0] = r0.l; 480 w[p0] = r0.l;
481 SSYNC; 481 SSYNC;
482 482
483/* /CS return to high */ 483 /* /CS return to high */
484 p0.h = hi(PORTFIO); 484 p0.h = hi(PORTFIO);
485 p0.l = lo(PORTFIO); 485 p0.l = lo(PORTFIO);
486 r0.l = 0xFFFF; 486 r0.l = 0xFFFF;
487 w[p0] = r0.l; 487 w[p0] = r0.l;
488 SSYNC; 488 SSYNC;
489 489
490/* Delay some time, This is necessary */ 490 /* Delay some time, This is necessary */
491 r1.h = 0; 491 r1.h = 0;
492 r1.l = 0x400; 492 r1.l = 0x400;
493 p1 = r1; 493 p1 = r1;
494 lsetup (_delay_lab1,_delay_lab1_end ) lc1 = p1; 494 lsetup (.L_delay_lab1, .L_delay_lab1_end) lc1 = p1;
495_delay_lab1: 495.L_delay_lab1:
496 r0.h = 0; 496 r0.h = 0;
497 r0.l = 0x8000; 497 r0.l = 0x8000;
498 p0 = r0; 498 p0 = r0;
499 lsetup (_delay_lab0,_delay_lab0_end ) lc0 = p0; 499 lsetup (.L_delay_lab0, .L_delay_lab0_end) lc0 = p0;
500_delay_lab0: 500.L_delay_lab0:
501 nop; 501 nop;
502_delay_lab0_end: 502.L_delay_lab0_end:
503 nop; 503 nop;
504_delay_lab1_end: 504.L_delay_lab1_end:
505 nop; 505 nop;
506#endif 506#endif
507 507