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-rw-r--r--sound/soc/davinci/davinci-mcasp.c31
1 files changed, 16 insertions, 15 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index 002351f9fc40..6b1bfd9de57d 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -154,6 +154,13 @@ static bool mcasp_is_synchronous(struct davinci_mcasp *mcasp)
154 154
155static void mcasp_start_rx(struct davinci_mcasp *mcasp) 155static void mcasp_start_rx(struct davinci_mcasp *mcasp)
156{ 156{
157 if (mcasp->rxnumevt) { /* enable FIFO */
158 u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET;
159
160 mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
161 mcasp_set_bits(mcasp, reg, FIFO_ENABLE);
162 }
163
157 /* Start clocks */ 164 /* Start clocks */
158 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST); 165 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST);
159 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST); 166 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST);
@@ -181,6 +188,13 @@ static void mcasp_start_tx(struct davinci_mcasp *mcasp)
181{ 188{
182 u32 cnt; 189 u32 cnt;
183 190
191 if (mcasp->txnumevt) { /* enable FIFO */
192 u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET;
193
194 mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
195 mcasp_set_bits(mcasp, reg, FIFO_ENABLE);
196 }
197
184 /* Start clocks */ 198 /* Start clocks */
185 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); 199 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST);
186 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); 200 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST);
@@ -201,25 +215,12 @@ static void mcasp_start_tx(struct davinci_mcasp *mcasp)
201 215
202static void davinci_mcasp_start(struct davinci_mcasp *mcasp, int stream) 216static void davinci_mcasp_start(struct davinci_mcasp *mcasp, int stream)
203{ 217{
204 u32 reg;
205
206 mcasp->streams++; 218 mcasp->streams++;
207 219
208 if (stream == SNDRV_PCM_STREAM_PLAYBACK) { 220 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
209 if (mcasp->txnumevt) { /* enable FIFO */
210 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET;
211 mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
212 mcasp_set_bits(mcasp, reg, FIFO_ENABLE);
213 }
214 mcasp_start_tx(mcasp); 221 mcasp_start_tx(mcasp);
215 } else { 222 else
216 if (mcasp->rxnumevt) { /* enable FIFO */
217 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET;
218 mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
219 mcasp_set_bits(mcasp, reg, FIFO_ENABLE);
220 }
221 mcasp_start_rx(mcasp); 223 mcasp_start_rx(mcasp);
222 }
223} 224}
224 225
225static void mcasp_stop_rx(struct davinci_mcasp *mcasp) 226static void mcasp_stop_rx(struct davinci_mcasp *mcasp)