diff options
-rw-r--r-- | arch/arm/mach-omap2/powerdomain.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomain44xx.c | 122 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomains44xx_data.c | 17 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/powerdomain.h | 7 |
4 files changed, 115 insertions, 41 deletions
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 8a0dcd05afeb..a76ad3f0ca65 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/errno.h> | 20 | #include <linux/errno.h> |
21 | #include <linux/string.h> | 21 | #include <linux/string.h> |
22 | #include "cm2xxx_3xxx.h" | 22 | #include "cm2xxx_3xxx.h" |
23 | #include "prcm44xx.h" | ||
23 | #include "cm44xx.h" | 24 | #include "cm44xx.h" |
24 | #include "prm2xxx_3xxx.h" | 25 | #include "prm2xxx_3xxx.h" |
25 | #include "prm44xx.h" | 26 | #include "prm44xx.h" |
@@ -72,12 +73,19 @@ static int _pwrdm_register(struct powerdomain *pwrdm) | |||
72 | { | 73 | { |
73 | int i; | 74 | int i; |
74 | 75 | ||
75 | if (!pwrdm) | 76 | if (!pwrdm || !pwrdm->name) |
76 | return -EINVAL; | 77 | return -EINVAL; |
77 | 78 | ||
78 | if (!omap_chip_is(pwrdm->omap_chip)) | 79 | if (!omap_chip_is(pwrdm->omap_chip)) |
79 | return -EINVAL; | 80 | return -EINVAL; |
80 | 81 | ||
82 | if (cpu_is_omap44xx() && | ||
83 | pwrdm->prcm_partition == OMAP4430_INVALID_PRCM_PARTITION) { | ||
84 | pr_err("powerdomain: %s: missing OMAP4 PRCM partition ID\n", | ||
85 | pwrdm->name); | ||
86 | return -EINVAL; | ||
87 | } | ||
88 | |||
81 | if (_pwrdm_lookup(pwrdm->name)) | 89 | if (_pwrdm_lookup(pwrdm->name)) |
82 | return -EEXIST; | 90 | return -EEXIST; |
83 | 91 | ||
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c index 4c5ab1a2d44b..28bf5e3b000c 100644 --- a/arch/arm/mach-omap2/powerdomain44xx.c +++ b/arch/arm/mach-omap2/powerdomain44xx.c | |||
@@ -20,48 +20,70 @@ | |||
20 | #include <plat/prcm.h> | 20 | #include <plat/prcm.h> |
21 | #include "prm2xxx_3xxx.h" | 21 | #include "prm2xxx_3xxx.h" |
22 | #include "prm44xx.h" | 22 | #include "prm44xx.h" |
23 | #include "prminst44xx.h" | ||
23 | #include "prm-regbits-44xx.h" | 24 | #include "prm-regbits-44xx.h" |
24 | #include "powerdomains.h" | 25 | #include "powerdomains.h" |
25 | 26 | ||
26 | static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) | 27 | static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) |
27 | { | 28 | { |
28 | omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, | 29 | omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK, |
29 | (pwrst << OMAP_POWERSTATE_SHIFT), | 30 | (pwrst << OMAP_POWERSTATE_SHIFT), |
30 | pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); | 31 | pwrdm->prcm_partition, |
32 | pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); | ||
31 | return 0; | 33 | return 0; |
32 | } | 34 | } |
33 | 35 | ||
34 | static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) | 36 | static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) |
35 | { | 37 | { |
36 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | 38 | u32 v; |
37 | OMAP4_PM_PWSTCTRL, OMAP_POWERSTATE_MASK); | 39 | |
40 | v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, | ||
41 | OMAP4_PM_PWSTCTRL); | ||
42 | v &= OMAP_POWERSTATE_MASK; | ||
43 | v >>= OMAP_POWERSTATE_SHIFT; | ||
44 | |||
45 | return v; | ||
38 | } | 46 | } |
39 | 47 | ||
40 | static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) | 48 | static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) |
41 | { | 49 | { |
42 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | 50 | u32 v; |
43 | OMAP4_PM_PWSTST, OMAP_POWERSTATEST_MASK); | 51 | |
52 | v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, | ||
53 | OMAP4_PM_PWSTST); | ||
54 | v &= OMAP_POWERSTATEST_MASK; | ||
55 | v >>= OMAP_POWERSTATEST_SHIFT; | ||
56 | |||
57 | return v; | ||
44 | } | 58 | } |
45 | 59 | ||
46 | static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) | 60 | static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) |
47 | { | 61 | { |
48 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, | 62 | u32 v; |
49 | OMAP4430_LASTPOWERSTATEENTERED_MASK); | 63 | |
64 | v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, | ||
65 | OMAP4_PM_PWSTST); | ||
66 | v &= OMAP4430_LASTPOWERSTATEENTERED_MASK; | ||
67 | v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT; | ||
68 | |||
69 | return v; | ||
50 | } | 70 | } |
51 | 71 | ||
52 | static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) | 72 | static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) |
53 | { | 73 | { |
54 | omap2_prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, | 74 | omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, |
55 | (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), | 75 | (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), |
56 | pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); | 76 | pwrdm->prcm_partition, |
77 | pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); | ||
57 | return 0; | 78 | return 0; |
58 | } | 79 | } |
59 | 80 | ||
60 | static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) | 81 | static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) |
61 | { | 82 | { |
62 | omap2_prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, | 83 | omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, |
63 | OMAP4430_LASTPOWERSTATEENTERED_MASK, | 84 | OMAP4430_LASTPOWERSTATEENTERED_MASK, |
64 | pwrdm->prcm_offs, OMAP4_PM_PWSTST); | 85 | pwrdm->prcm_partition, |
86 | pwrdm->prcm_offs, OMAP4_PM_PWSTST); | ||
65 | return 0; | 87 | return 0; |
66 | } | 88 | } |
67 | 89 | ||
@@ -70,69 +92,91 @@ static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) | |||
70 | u32 v; | 92 | u32 v; |
71 | 93 | ||
72 | v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); | 94 | v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); |
73 | omap2_prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, | 95 | omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, |
74 | pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); | 96 | pwrdm->prcm_partition, pwrdm->prcm_offs, |
97 | OMAP4_PM_PWSTCTRL); | ||
75 | 98 | ||
76 | return 0; | 99 | return 0; |
77 | } | 100 | } |
78 | 101 | ||
79 | static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, | 102 | static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, |
80 | u8 pwrst) | 103 | u8 pwrst) |
81 | { | 104 | { |
82 | u32 m; | 105 | u32 m; |
83 | 106 | ||
84 | m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); | 107 | m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); |
85 | 108 | ||
86 | omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, | 109 | omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), |
87 | OMAP4_PM_PWSTCTRL); | 110 | pwrdm->prcm_partition, pwrdm->prcm_offs, |
111 | OMAP4_PM_PWSTCTRL); | ||
88 | 112 | ||
89 | return 0; | 113 | return 0; |
90 | } | 114 | } |
91 | 115 | ||
92 | static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, | 116 | static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, |
93 | u8 pwrst) | 117 | u8 pwrst) |
94 | { | 118 | { |
95 | u32 m; | 119 | u32 m; |
96 | 120 | ||
97 | m = omap2_pwrdm_get_mem_bank_retst_mask(bank); | 121 | m = omap2_pwrdm_get_mem_bank_retst_mask(bank); |
98 | 122 | ||
99 | omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, | 123 | omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), |
100 | OMAP4_PM_PWSTCTRL); | 124 | pwrdm->prcm_partition, pwrdm->prcm_offs, |
125 | OMAP4_PM_PWSTCTRL); | ||
101 | 126 | ||
102 | return 0; | 127 | return 0; |
103 | } | 128 | } |
104 | 129 | ||
105 | static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) | 130 | static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) |
106 | { | 131 | { |
107 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, | 132 | u32 v; |
108 | OMAP4430_LOGICSTATEST_MASK); | 133 | |
134 | v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, | ||
135 | OMAP4_PM_PWSTST); | ||
136 | v &= OMAP4430_LOGICSTATEST_MASK; | ||
137 | v >>= OMAP4430_LOGICSTATEST_SHIFT; | ||
138 | |||
139 | return v; | ||
109 | } | 140 | } |
110 | 141 | ||
111 | static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) | 142 | static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) |
112 | { | 143 | { |
113 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | 144 | u32 v; |
114 | OMAP4_PM_PWSTCTRL, | 145 | |
115 | OMAP4430_LOGICRETSTATE_MASK); | 146 | v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, |
147 | OMAP4_PM_PWSTCTRL); | ||
148 | v &= OMAP4430_LOGICRETSTATE_MASK; | ||
149 | v >>= OMAP4430_LOGICRETSTATE_SHIFT; | ||
150 | |||
151 | return v; | ||
116 | } | 152 | } |
117 | 153 | ||
118 | static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) | 154 | static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) |
119 | { | 155 | { |
120 | u32 m; | 156 | u32 m, v; |
121 | 157 | ||
122 | m = omap2_pwrdm_get_mem_bank_stst_mask(bank); | 158 | m = omap2_pwrdm_get_mem_bank_stst_mask(bank); |
123 | 159 | ||
124 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, | 160 | v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, |
125 | m); | 161 | OMAP4_PM_PWSTST); |
162 | v &= m; | ||
163 | v >>= __ffs(m); | ||
164 | |||
165 | return v; | ||
126 | } | 166 | } |
127 | 167 | ||
128 | static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) | 168 | static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) |
129 | { | 169 | { |
130 | u32 m; | 170 | u32 m, v; |
131 | 171 | ||
132 | m = omap2_pwrdm_get_mem_bank_retst_mask(bank); | 172 | m = omap2_pwrdm_get_mem_bank_retst_mask(bank); |
133 | 173 | ||
134 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | 174 | v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, |
135 | OMAP4_PM_PWSTCTRL, m); | 175 | OMAP4_PM_PWSTCTRL); |
176 | v &= m; | ||
177 | v >>= __ffs(m); | ||
178 | |||
179 | return v; | ||
136 | } | 180 | } |
137 | 181 | ||
138 | static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) | 182 | static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) |
@@ -146,14 +190,16 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) | |||
146 | */ | 190 | */ |
147 | 191 | ||
148 | /* XXX Is this udelay() value meaningful? */ | 192 | /* XXX Is this udelay() value meaningful? */ |
149 | while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) & | 193 | while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition, |
194 | pwrdm->prcm_offs, | ||
195 | OMAP4_PM_PWSTST) & | ||
150 | OMAP_INTRANSITION_MASK) && | 196 | OMAP_INTRANSITION_MASK) && |
151 | (c++ < PWRDM_TRANSITION_BAILOUT)) | 197 | (c++ < PWRDM_TRANSITION_BAILOUT)) |
152 | udelay(1); | 198 | udelay(1); |
153 | 199 | ||
154 | if (c > PWRDM_TRANSITION_BAILOUT) { | 200 | if (c > PWRDM_TRANSITION_BAILOUT) { |
155 | printk(KERN_ERR "powerdomain: waited too long for " | 201 | printk(KERN_ERR "powerdomain: waited too long for " |
156 | "powerdomain %s to complete transition\n", pwrdm->name); | 202 | "powerdomain %s to complete transition\n", pwrdm->name); |
157 | return -EAGAIN; | 203 | return -EAGAIN; |
158 | } | 204 | } |
159 | 205 | ||
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index 069a21d54911..823f4770f947 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include "powerdomains.h" | 26 | #include "powerdomains.h" |
27 | 27 | ||
28 | #include "prcm-common.h" | 28 | #include "prcm-common.h" |
29 | #include "prcm44xx.h" | ||
29 | #include "prm-regbits-44xx.h" | 30 | #include "prm-regbits-44xx.h" |
30 | #include "prm44xx.h" | 31 | #include "prm44xx.h" |
31 | #include "prcm_mpu44xx.h" | 32 | #include "prcm_mpu44xx.h" |
@@ -34,6 +35,7 @@ | |||
34 | static struct powerdomain core_44xx_pwrdm = { | 35 | static struct powerdomain core_44xx_pwrdm = { |
35 | .name = "core_pwrdm", | 36 | .name = "core_pwrdm", |
36 | .prcm_offs = OMAP4430_PRM_CORE_INST, | 37 | .prcm_offs = OMAP4430_PRM_CORE_INST, |
38 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
37 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 39 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
38 | .pwrsts = PWRSTS_RET_ON, | 40 | .pwrsts = PWRSTS_RET_ON, |
39 | .pwrsts_logic_ret = PWRSTS_OFF_RET, | 41 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
@@ -59,6 +61,7 @@ static struct powerdomain core_44xx_pwrdm = { | |||
59 | static struct powerdomain gfx_44xx_pwrdm = { | 61 | static struct powerdomain gfx_44xx_pwrdm = { |
60 | .name = "gfx_pwrdm", | 62 | .name = "gfx_pwrdm", |
61 | .prcm_offs = OMAP4430_PRM_GFX_INST, | 63 | .prcm_offs = OMAP4430_PRM_GFX_INST, |
64 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
62 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 65 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
63 | .pwrsts = PWRSTS_OFF_ON, | 66 | .pwrsts = PWRSTS_OFF_ON, |
64 | .banks = 1, | 67 | .banks = 1, |
@@ -75,6 +78,7 @@ static struct powerdomain gfx_44xx_pwrdm = { | |||
75 | static struct powerdomain abe_44xx_pwrdm = { | 78 | static struct powerdomain abe_44xx_pwrdm = { |
76 | .name = "abe_pwrdm", | 79 | .name = "abe_pwrdm", |
77 | .prcm_offs = OMAP4430_PRM_ABE_INST, | 80 | .prcm_offs = OMAP4430_PRM_ABE_INST, |
81 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
78 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 82 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
79 | .pwrsts = PWRSTS_OFF_RET_ON, | 83 | .pwrsts = PWRSTS_OFF_RET_ON, |
80 | .pwrsts_logic_ret = PWRDM_POWER_OFF, | 84 | .pwrsts_logic_ret = PWRDM_POWER_OFF, |
@@ -94,6 +98,7 @@ static struct powerdomain abe_44xx_pwrdm = { | |||
94 | static struct powerdomain dss_44xx_pwrdm = { | 98 | static struct powerdomain dss_44xx_pwrdm = { |
95 | .name = "dss_pwrdm", | 99 | .name = "dss_pwrdm", |
96 | .prcm_offs = OMAP4430_PRM_DSS_INST, | 100 | .prcm_offs = OMAP4430_PRM_DSS_INST, |
101 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
97 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 102 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
98 | .pwrsts = PWRSTS_OFF_RET_ON, | 103 | .pwrsts = PWRSTS_OFF_RET_ON, |
99 | .pwrsts_logic_ret = PWRSTS_OFF, | 104 | .pwrsts_logic_ret = PWRSTS_OFF, |
@@ -111,6 +116,7 @@ static struct powerdomain dss_44xx_pwrdm = { | |||
111 | static struct powerdomain tesla_44xx_pwrdm = { | 116 | static struct powerdomain tesla_44xx_pwrdm = { |
112 | .name = "tesla_pwrdm", | 117 | .name = "tesla_pwrdm", |
113 | .prcm_offs = OMAP4430_PRM_TESLA_INST, | 118 | .prcm_offs = OMAP4430_PRM_TESLA_INST, |
119 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
114 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 120 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
115 | .pwrsts = PWRSTS_OFF_RET_ON, | 121 | .pwrsts = PWRSTS_OFF_RET_ON, |
116 | .pwrsts_logic_ret = PWRSTS_OFF_RET, | 122 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
@@ -132,6 +138,7 @@ static struct powerdomain tesla_44xx_pwrdm = { | |||
132 | static struct powerdomain wkup_44xx_pwrdm = { | 138 | static struct powerdomain wkup_44xx_pwrdm = { |
133 | .name = "wkup_pwrdm", | 139 | .name = "wkup_pwrdm", |
134 | .prcm_offs = OMAP4430_PRM_WKUP_INST, | 140 | .prcm_offs = OMAP4430_PRM_WKUP_INST, |
141 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
135 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 142 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
136 | .pwrsts = PWRSTS_ON, | 143 | .pwrsts = PWRSTS_ON, |
137 | .banks = 1, | 144 | .banks = 1, |
@@ -147,6 +154,7 @@ static struct powerdomain wkup_44xx_pwrdm = { | |||
147 | static struct powerdomain cpu0_44xx_pwrdm = { | 154 | static struct powerdomain cpu0_44xx_pwrdm = { |
148 | .name = "cpu0_pwrdm", | 155 | .name = "cpu0_pwrdm", |
149 | .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, | 156 | .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, |
157 | .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, | ||
150 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 158 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
151 | .pwrsts = PWRSTS_OFF_RET_ON, | 159 | .pwrsts = PWRSTS_OFF_RET_ON, |
152 | .pwrsts_logic_ret = PWRSTS_OFF_RET, | 160 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
@@ -163,6 +171,7 @@ static struct powerdomain cpu0_44xx_pwrdm = { | |||
163 | static struct powerdomain cpu1_44xx_pwrdm = { | 171 | static struct powerdomain cpu1_44xx_pwrdm = { |
164 | .name = "cpu1_pwrdm", | 172 | .name = "cpu1_pwrdm", |
165 | .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, | 173 | .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, |
174 | .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, | ||
166 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 175 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
167 | .pwrsts = PWRSTS_OFF_RET_ON, | 176 | .pwrsts = PWRSTS_OFF_RET_ON, |
168 | .pwrsts_logic_ret = PWRSTS_OFF_RET, | 177 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
@@ -179,6 +188,7 @@ static struct powerdomain cpu1_44xx_pwrdm = { | |||
179 | static struct powerdomain emu_44xx_pwrdm = { | 188 | static struct powerdomain emu_44xx_pwrdm = { |
180 | .name = "emu_pwrdm", | 189 | .name = "emu_pwrdm", |
181 | .prcm_offs = OMAP4430_PRM_EMU_INST, | 190 | .prcm_offs = OMAP4430_PRM_EMU_INST, |
191 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
182 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 192 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
183 | .pwrsts = PWRSTS_OFF_ON, | 193 | .pwrsts = PWRSTS_OFF_ON, |
184 | .banks = 1, | 194 | .banks = 1, |
@@ -194,6 +204,7 @@ static struct powerdomain emu_44xx_pwrdm = { | |||
194 | static struct powerdomain mpu_44xx_pwrdm = { | 204 | static struct powerdomain mpu_44xx_pwrdm = { |
195 | .name = "mpu_pwrdm", | 205 | .name = "mpu_pwrdm", |
196 | .prcm_offs = OMAP4430_PRM_MPU_INST, | 206 | .prcm_offs = OMAP4430_PRM_MPU_INST, |
207 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
197 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 208 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
198 | .pwrsts = PWRSTS_OFF_RET_ON, | 209 | .pwrsts = PWRSTS_OFF_RET_ON, |
199 | .pwrsts_logic_ret = PWRSTS_OFF_RET, | 210 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
@@ -214,6 +225,7 @@ static struct powerdomain mpu_44xx_pwrdm = { | |||
214 | static struct powerdomain ivahd_44xx_pwrdm = { | 225 | static struct powerdomain ivahd_44xx_pwrdm = { |
215 | .name = "ivahd_pwrdm", | 226 | .name = "ivahd_pwrdm", |
216 | .prcm_offs = OMAP4430_PRM_IVAHD_INST, | 227 | .prcm_offs = OMAP4430_PRM_IVAHD_INST, |
228 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
217 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 229 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
218 | .pwrsts = PWRSTS_OFF_RET_ON, | 230 | .pwrsts = PWRSTS_OFF_RET_ON, |
219 | .pwrsts_logic_ret = PWRDM_POWER_OFF, | 231 | .pwrsts_logic_ret = PWRDM_POWER_OFF, |
@@ -237,6 +249,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { | |||
237 | static struct powerdomain cam_44xx_pwrdm = { | 249 | static struct powerdomain cam_44xx_pwrdm = { |
238 | .name = "cam_pwrdm", | 250 | .name = "cam_pwrdm", |
239 | .prcm_offs = OMAP4430_PRM_CAM_INST, | 251 | .prcm_offs = OMAP4430_PRM_CAM_INST, |
252 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
240 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 253 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
241 | .pwrsts = PWRSTS_OFF_ON, | 254 | .pwrsts = PWRSTS_OFF_ON, |
242 | .banks = 1, | 255 | .banks = 1, |
@@ -253,6 +266,7 @@ static struct powerdomain cam_44xx_pwrdm = { | |||
253 | static struct powerdomain l3init_44xx_pwrdm = { | 266 | static struct powerdomain l3init_44xx_pwrdm = { |
254 | .name = "l3init_pwrdm", | 267 | .name = "l3init_pwrdm", |
255 | .prcm_offs = OMAP4430_PRM_L3INIT_INST, | 268 | .prcm_offs = OMAP4430_PRM_L3INIT_INST, |
269 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
256 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 270 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
257 | .pwrsts = PWRSTS_OFF_RET_ON, | 271 | .pwrsts = PWRSTS_OFF_RET_ON, |
258 | .pwrsts_logic_ret = PWRSTS_OFF_RET, | 272 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
@@ -270,6 +284,7 @@ static struct powerdomain l3init_44xx_pwrdm = { | |||
270 | static struct powerdomain l4per_44xx_pwrdm = { | 284 | static struct powerdomain l4per_44xx_pwrdm = { |
271 | .name = "l4per_pwrdm", | 285 | .name = "l4per_pwrdm", |
272 | .prcm_offs = OMAP4430_PRM_L4PER_INST, | 286 | .prcm_offs = OMAP4430_PRM_L4PER_INST, |
287 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
273 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 288 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
274 | .pwrsts = PWRSTS_OFF_RET_ON, | 289 | .pwrsts = PWRSTS_OFF_RET_ON, |
275 | .pwrsts_logic_ret = PWRSTS_OFF_RET, | 290 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
@@ -292,6 +307,7 @@ static struct powerdomain l4per_44xx_pwrdm = { | |||
292 | static struct powerdomain always_on_core_44xx_pwrdm = { | 307 | static struct powerdomain always_on_core_44xx_pwrdm = { |
293 | .name = "always_on_core_pwrdm", | 308 | .name = "always_on_core_pwrdm", |
294 | .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, | 309 | .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, |
310 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
295 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 311 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
296 | .pwrsts = PWRSTS_ON, | 312 | .pwrsts = PWRSTS_ON, |
297 | }; | 313 | }; |
@@ -300,6 +316,7 @@ static struct powerdomain always_on_core_44xx_pwrdm = { | |||
300 | static struct powerdomain cefuse_44xx_pwrdm = { | 316 | static struct powerdomain cefuse_44xx_pwrdm = { |
301 | .name = "cefuse_pwrdm", | 317 | .name = "cefuse_pwrdm", |
302 | .prcm_offs = OMAP4430_PRM_CEFUSE_INST, | 318 | .prcm_offs = OMAP4430_PRM_CEFUSE_INST, |
319 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
303 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 320 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
304 | .pwrsts = PWRSTS_OFF_ON, | 321 | .pwrsts = PWRSTS_OFF_ON, |
305 | }; | 322 | }; |
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h index b79eebb27a70..a0d3a30de9fd 100644 --- a/arch/arm/plat-omap/include/plat/powerdomain.h +++ b/arch/arm/plat-omap/include/plat/powerdomain.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * OMAP2/3 powerdomain control | 2 | * OMAP2/3/4 powerdomain control |
3 | * | 3 | * |
4 | * Copyright (C) 2007-2008 Texas Instruments, Inc. | 4 | * Copyright (C) 2007-2008 Texas Instruments, Inc. |
5 | * Copyright (C) 2007-2010 Nokia Corporation | 5 | * Copyright (C) 2007-2010 Nokia Corporation |
@@ -24,7 +24,6 @@ | |||
24 | 24 | ||
25 | #include <plat/cpu.h> | 25 | #include <plat/cpu.h> |
26 | 26 | ||
27 | |||
28 | /* Powerdomain basic power states */ | 27 | /* Powerdomain basic power states */ |
29 | #define PWRDM_POWER_OFF 0x0 | 28 | #define PWRDM_POWER_OFF 0x0 |
30 | #define PWRDM_POWER_RET 0x1 | 29 | #define PWRDM_POWER_RET 0x1 |
@@ -84,6 +83,7 @@ struct powerdomain; | |||
84 | * @name: Powerdomain name | 83 | * @name: Powerdomain name |
85 | * @omap_chip: represents the OMAP chip types containing this pwrdm | 84 | * @omap_chip: represents the OMAP chip types containing this pwrdm |
86 | * @prcm_offs: the address offset from CM_BASE/PRM_BASE | 85 | * @prcm_offs: the address offset from CM_BASE/PRM_BASE |
86 | * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs | ||
87 | * @pwrsts: Possible powerdomain power states | 87 | * @pwrsts: Possible powerdomain power states |
88 | * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION | 88 | * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION |
89 | * @flags: Powerdomain flags | 89 | * @flags: Powerdomain flags |
@@ -96,6 +96,8 @@ struct powerdomain; | |||
96 | * @state_counter: | 96 | * @state_counter: |
97 | * @timer: | 97 | * @timer: |
98 | * @state_timer: | 98 | * @state_timer: |
99 | * | ||
100 | * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h. | ||
99 | */ | 101 | */ |
100 | struct powerdomain { | 102 | struct powerdomain { |
101 | const char *name; | 103 | const char *name; |
@@ -107,6 +109,7 @@ struct powerdomain { | |||
107 | const u8 banks; | 109 | const u8 banks; |
108 | const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS]; | 110 | const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS]; |
109 | const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS]; | 111 | const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS]; |
112 | const u8 prcm_partition; | ||
110 | struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; | 113 | struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; |
111 | struct list_head node; | 114 | struct list_head node; |
112 | int state; | 115 | int state; |