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-rw-r--r--arch/arm/boot/dts/tegra-harmony.dts70
-rw-r--r--arch/arm/boot/dts/tegra-seaboard.dts28
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi139
-rw-r--r--arch/arm/mach-tegra/Kconfig6
-rw-r--r--arch/arm/mach-tegra/Makefile3
-rw-r--r--arch/arm/mach-tegra/Makefile.boot3
-rw-r--r--arch/arm/mach-tegra/board-dt.c119
7 files changed, 368 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
new file mode 100644
index 000000000000..4c053340ce33
--- /dev/null
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -0,0 +1,70 @@
1/dts-v1/;
2
3/memreserve/ 0x1c000000 0x04000000;
4/include/ "tegra20.dtsi"
5
6/ {
7 model = "NVIDIA Tegra2 Harmony evaluation board";
8 compatible = "nvidia,harmony", "nvidia,tegra20";
9
10 chosen {
11 bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk0p2 rw rootwait";
12 };
13
14 memory@0 {
15 reg = < 0x00000000 0x40000000 >;
16 };
17
18 i2c@7000c000 {
19 clock-frequency = <400000>;
20
21 codec: wm8903@1a {
22 compatible = "wlf,wm8903";
23 reg = <0x1a>;
24 interrupts = < 347 >;
25
26 gpio-controller;
27 #gpio-cells = <2>;
28
29 /* 0x8000 = Not configured */
30 gpio-cfg = < 0x8000 0x8000 0 0x8000 0x8000 >;
31 };
32 };
33
34 i2c@7000c400 {
35 clock-frequency = <400000>;
36 };
37
38 i2c@7000c500 {
39 clock-frequency = <400000>;
40 };
41
42 i2c@7000d000 {
43 clock-frequency = <400000>;
44 };
45
46 sound {
47 compatible = "nvidia,harmony-sound", "nvidia,tegra-wm8903";
48
49 spkr-en-gpios = <&codec 2 0>;
50 hp-det-gpios = <&gpio 178 0>;
51 int-mic-en-gpios = <&gpio 184 0>;
52 ext-mic-en-gpios = <&gpio 185 0>;
53 };
54
55 serial@70006300 {
56 clock-frequency = < 216000000 >;
57 };
58
59 sdhci@c8000200 {
60 gpios = <&gpio 69 0>, /* cd, gpio PI5 */
61 <&gpio 57 0>, /* wp, gpio PH1 */
62 <&gpio 155 0>; /* power, gpio PT3 */
63 };
64
65 sdhci@c8000600 {
66 gpios = <&gpio 58 0>, /* cd, gpio PH2 */
67 <&gpio 59 0>, /* wp, gpio PH3 */
68 <&gpio 70 0>; /* power, gpio PI6 */
69 };
70};
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
new file mode 100644
index 000000000000..1940cae00748
--- /dev/null
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -0,0 +1,28 @@
1/dts-v1/;
2
3/memreserve/ 0x1c000000 0x04000000;
4/include/ "tegra20.dtsi"
5
6/ {
7 model = "NVIDIA Seaboard";
8 compatible = "nvidia,seaboard", "nvidia,tegra20";
9
10 chosen {
11 bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
12 };
13
14 memory {
15 device_type = "memory";
16 reg = < 0x00000000 0x40000000 >;
17 };
18
19 serial@70006300 {
20 clock-frequency = < 216000000 >;
21 };
22
23 sdhci@c8000400 {
24 gpios = <&gpio 69 0>, /* cd, gpio PI5 */
25 <&gpio 57 0>, /* wp, gpio PH1 */
26 <&gpio 70 0>; /* power, gpio PI6 */
27 };
28};
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
new file mode 100644
index 000000000000..5727595cde61
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -0,0 +1,139 @@
1/include/ "skeleton.dtsi"
2
3/ {
4 compatible = "nvidia,tegra20";
5 interrupt-parent = <&intc>;
6
7 intc: interrupt-controller@50041000 {
8 compatible = "nvidia,tegra20-gic";
9 interrupt-controller;
10 #interrupt-cells = <1>;
11 reg = < 0x50041000 0x1000 >,
12 < 0x50040100 0x0100 >;
13 };
14
15 i2c@7000c000 {
16 #address-cells = <1>;
17 #size-cells = <0>;
18 compatible = "nvidia,tegra20-i2c";
19 reg = <0x7000C000 0x100>;
20 interrupts = < 70 >;
21 };
22
23 i2c@7000c400 {
24 #address-cells = <1>;
25 #size-cells = <0>;
26 compatible = "nvidia,tegra20-i2c";
27 reg = <0x7000C400 0x100>;
28 interrupts = < 116 >;
29 };
30
31 i2c@7000c500 {
32 #address-cells = <1>;
33 #size-cells = <0>;
34 compatible = "nvidia,tegra20-i2c";
35 reg = <0x7000C500 0x100>;
36 interrupts = < 124 >;
37 };
38
39 i2c@7000d000 {
40 #address-cells = <1>;
41 #size-cells = <0>;
42 compatible = "nvidia,tegra20-i2c";
43 reg = <0x7000D000 0x200>;
44 interrupts = < 85 >;
45 };
46
47 i2s@70002800 {
48 #address-cells = <1>;
49 #size-cells = <0>;
50 compatible = "nvidia,tegra20-i2s";
51 reg = <0x70002800 0x200>;
52 interrupts = < 45 >;
53 dma-channel = < 2 >;
54 };
55
56 i2s@70002a00 {
57 #address-cells = <1>;
58 #size-cells = <0>;
59 compatible = "nvidia,tegra20-i2s";
60 reg = <0x70002a00 0x200>;
61 interrupts = < 35 >;
62 dma-channel = < 1 >;
63 };
64
65 das@70000c00 {
66 #address-cells = <1>;
67 #size-cells = <0>;
68 compatible = "nvidia,tegra20-das";
69 reg = <0x70000c00 0x80>;
70 };
71
72 gpio: gpio@6000d000 {
73 compatible = "nvidia,tegra20-gpio";
74 reg = < 0x6000d000 0x1000 >;
75 interrupts = < 64 65 66 67 87 119 121 >;
76 #gpio-cells = <2>;
77 gpio-controller;
78 };
79
80 serial@70006000 {
81 compatible = "nvidia,tegra20-uart";
82 reg = <0x70006000 0x40>;
83 reg-shift = <2>;
84 interrupts = < 68 >;
85 };
86
87 serial@70006040 {
88 compatible = "nvidia,tegra20-uart";
89 reg = <0x70006040 0x40>;
90 reg-shift = <2>;
91 interrupts = < 69 >;
92 };
93
94 serial@70006200 {
95 compatible = "nvidia,tegra20-uart";
96 reg = <0x70006200 0x100>;
97 reg-shift = <2>;
98 interrupts = < 78 >;
99 };
100
101 serial@70006300 {
102 compatible = "nvidia,tegra20-uart";
103 reg = <0x70006300 0x100>;
104 reg-shift = <2>;
105 interrupts = < 122 >;
106 };
107
108 serial@70006400 {
109 compatible = "nvidia,tegra20-uart";
110 reg = <0x70006400 0x100>;
111 reg-shift = <2>;
112 interrupts = < 123 >;
113 };
114
115 sdhci@c8000000 {
116 compatible = "nvidia,tegra20-sdhci";
117 reg = <0xc8000000 0x200>;
118 interrupts = < 46 >;
119 };
120
121 sdhci@c8000200 {
122 compatible = "nvidia,tegra20-sdhci";
123 reg = <0xc8000200 0x200>;
124 interrupts = < 47 >;
125 };
126
127 sdhci@c8000400 {
128 compatible = "nvidia,tegra20-sdhci";
129 reg = <0xc8000400 0x200>;
130 interrupts = < 51 >;
131 };
132
133 sdhci@c8000600 {
134 compatible = "nvidia,tegra20-sdhci";
135 reg = <0xc8000600 0x200>;
136 interrupts = < 63 >;
137 };
138};
139
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 5ec1846aa1d0..4b8abf93bd95 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -51,6 +51,12 @@ config MACH_SEABOARD
51 also be included for some of the derivative boards that 51 also be included for some of the derivative boards that
52 have large similarities with the seaboard design. 52 have large similarities with the seaboard design.
53 53
54config MACH_TEGRA_DT
55 bool "Generic Tegra board (FDT support)"
56 select USE_OF
57 help
58 Support for generic nVidia Tegra boards using Flattened Device Tree
59
54config MACH_TRIMSLICE 60config MACH_TRIMSLICE
55 bool "TrimSlice board" 61 bool "TrimSlice board"
56 select TEGRA_PCI 62 select TEGRA_PCI
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index ed58ef9019b5..f11b9100114a 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -29,5 +29,8 @@ obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o
29obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o 29obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o
30obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o 30obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o
31 31
32obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o
33obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o
34
32obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o 35obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o
33obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o 36obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o
diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot
index db52d61a7386..428ad122be03 100644
--- a/arch/arm/mach-tegra/Makefile.boot
+++ b/arch/arm/mach-tegra/Makefile.boot
@@ -1,3 +1,6 @@
1zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00008000 1zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00008000
2params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 2params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
3initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 3initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
4
5dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb
6dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
new file mode 100644
index 000000000000..9f47e04446f3
--- /dev/null
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -0,0 +1,119 @@
1/*
2 * nVidia Tegra device tree board support
3 *
4 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
5 * Copyright (C) 2010 Google, Inc.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/serial_8250.h>
22#include <linux/clk.h>
23#include <linux/dma-mapping.h>
24#include <linux/irqdomain.h>
25#include <linux/of.h>
26#include <linux/of_address.h>
27#include <linux/of_fdt.h>
28#include <linux/of_irq.h>
29#include <linux/of_platform.h>
30#include <linux/pda_power.h>
31#include <linux/io.h>
32#include <linux/i2c.h>
33#include <linux/i2c-tegra.h>
34
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/mach/time.h>
38#include <asm/setup.h>
39
40#include <mach/iomap.h>
41#include <mach/irqs.h>
42
43#include "board.h"
44#include "board-harmony.h"
45#include "clock.h"
46#include "devices.h"
47
48void harmony_pinmux_init(void);
49void seaboard_pinmux_init(void);
50
51
52struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
53 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
54 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
55 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
56 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
57 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
58 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
59 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
60 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
61 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
62 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.1", NULL),
63 OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
64 {}
65};
66
67static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
68 /* name parent rate enabled */
69 { "uartd", "pll_p", 216000000, true },
70 { NULL, NULL, 0, 0},
71};
72
73static struct of_device_id tegra_dt_match_table[] __initdata = {
74 { .compatible = "simple-bus", },
75 {}
76};
77
78static struct of_device_id tegra_dt_gic_match[] __initdata = {
79 { .compatible = "nvidia,tegra20-gic", },
80 {}
81};
82
83static void __init tegra_dt_init(void)
84{
85 struct device_node *node;
86
87 node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match,
88 TEGRA_ARM_INT_DIST_BASE);
89 if (node)
90 irq_domain_add_simple(node, INT_GIC_BASE);
91
92 tegra_clk_init_from_table(tegra_dt_clk_init_table);
93
94 if (of_machine_is_compatible("nvidia,harmony"))
95 harmony_pinmux_init();
96 else if (of_machine_is_compatible("nvidia,seaboard"))
97 seaboard_pinmux_init();
98
99 /*
100 * Finished with the static registrations now; fill in the missing
101 * devices
102 */
103 of_platform_populate(NULL, tegra_dt_match_table, tegra20_auxdata_lookup, NULL);
104}
105
106static const char * tegra_dt_board_compat[] = {
107 "nvidia,harmony",
108 "nvidia,seaboard",
109 NULL
110};
111
112DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
113 .map_io = tegra_map_common_io,
114 .init_early = tegra_init_early,
115 .init_irq = tegra_init_irq,
116 .timer = &tegra_timer,
117 .init_machine = tegra_dt_init,
118 .dt_compat = tegra_dt_board_compat,
119MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 10:52:09 -0500