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-rw-r--r--Documentation/usb/callbacks.txt8
-rw-r--r--Documentation/usb/linux-cdc-acm.inf4
-rw-r--r--Documentation/usb/linux.inf6
-rw-r--r--arch/arm/mach-exynos4/Kconfig1
-rw-r--r--arch/arm/mach-exynos4/Makefile2
-rw-r--r--arch/arm/mach-exynos4/cpu.c7
-rw-r--r--arch/arm/mach-exynos4/include/mach/map.h4
-rw-r--r--arch/arm/mach-exynos4/include/mach/regs-pmu.h3
-rw-r--r--arch/arm/mach-exynos4/include/mach/regs-usb-phy.h64
-rw-r--r--arch/arm/mach-exynos4/mach-nuri.c16
-rw-r--r--arch/arm/mach-exynos4/usb-phy.c136
-rw-r--r--arch/arm/plat-s5p/Kconfig5
-rw-r--r--arch/arm/plat-s5p/Makefile1
-rw-r--r--arch/arm/plat-s5p/dev-ehci.c57
-rw-r--r--arch/arm/plat-s5p/include/plat/ehci.h21
-rw-r--r--arch/arm/plat-s5p/include/plat/map-s5p.h2
-rw-r--r--arch/arm/plat-s5p/include/plat/usb-phy.h22
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h2
-rw-r--r--arch/mips/ath79/Kconfig5
-rw-r--r--drivers/Makefile5
-rw-r--r--drivers/hid/hid-core.c20
-rw-r--r--drivers/hid/hid-ids.h21
-rw-r--r--drivers/usb/Kconfig4
-rw-r--r--drivers/usb/Makefile6
-rw-r--r--drivers/usb/class/cdc-acm.c466
-rw-r--r--drivers/usb/class/cdc-acm.h23
-rw-r--r--drivers/usb/class/cdc-wdm.c14
-rw-r--r--drivers/usb/core/config.c2
-rw-r--r--drivers/usb/core/devices.c22
-rw-r--r--drivers/usb/core/file.c8
-rw-r--r--drivers/usb/core/hcd.c1
-rw-r--r--drivers/usb/core/hub.c131
-rw-r--r--drivers/usb/core/sysfs.c13
-rw-r--r--drivers/usb/core/usb.c3
-rw-r--r--drivers/usb/core/usb.h2
-rw-r--r--drivers/usb/early/ehci-dbgp.c5
-rw-r--r--drivers/usb/gadget/Kconfig18
-rw-r--r--drivers/usb/gadget/ci13xxx_udc.c75
-rw-r--r--drivers/usb/gadget/dbgp.c14
-rw-r--r--drivers/usb/gadget/dummy_hcd.c21
-rw-r--r--drivers/usb/gadget/f_mass_storage.c60
-rw-r--r--drivers/usb/gadget/file_storage.c53
-rw-r--r--drivers/usb/gadget/fsl_qe_udc.h2
-rw-r--r--drivers/usb/gadget/fsl_udc_core.c438
-rw-r--r--drivers/usb/gadget/fsl_usb2_udc.h6
-rw-r--r--drivers/usb/gadget/gadget_chips.h9
-rw-r--r--drivers/usb/gadget/printer.c2
-rw-r--r--drivers/usb/gadget/s3c-hsotg.c226
-rw-r--r--drivers/usb/gadget/storage_common.c18
-rw-r--r--drivers/usb/host/Kconfig47
-rw-r--r--drivers/usb/host/ehci-ath79.c202
-rw-r--r--drivers/usb/host/ehci-atmel.c2
-rw-r--r--drivers/usb/host/ehci-au1xxx.c12
-rw-r--r--drivers/usb/host/ehci-cns3xxx.c2
-rw-r--r--drivers/usb/host/ehci-dbg.c2
-rw-r--r--drivers/usb/host/ehci-fsl.c221
-rw-r--r--drivers/usb/host/ehci-fsl.h4
-rw-r--r--drivers/usb/host/ehci-grlib.c242
-rw-r--r--drivers/usb/host/ehci-hcd.c17
-rw-r--r--drivers/usb/host/ehci-hub.c10
-rw-r--r--drivers/usb/host/ehci-ixp4xx.c2
-rw-r--r--drivers/usb/host/ehci-msm.c2
-rw-r--r--drivers/usb/host/ehci-mxc.c2
-rw-r--r--drivers/usb/host/ehci-octeon.c2
-rw-r--r--drivers/usb/host/ehci-omap.c2
-rw-r--r--drivers/usb/host/ehci-orion.c2
-rw-r--r--drivers/usb/host/ehci-pci.c2
-rw-r--r--drivers/usb/host/ehci-pmcmsp.c2
-rw-r--r--drivers/usb/host/ehci-ppc-of.c2
-rw-r--r--drivers/usb/host/ehci-ps3.c2
-rw-r--r--drivers/usb/host/ehci-q.c4
-rw-r--r--drivers/usb/host/ehci-s5p.c202
-rw-r--r--drivers/usb/host/ehci-sh.c2
-rw-r--r--drivers/usb/host/ehci-spear.c2
-rw-r--r--drivers/usb/host/ehci-tegra.c74
-rw-r--r--drivers/usb/host/ehci-vt8500.c3
-rw-r--r--drivers/usb/host/ehci-w90x900.c2
-rw-r--r--drivers/usb/host/ehci-xilinx-of.c2
-rw-r--r--drivers/usb/host/ehci.h15
-rw-r--r--drivers/usb/host/isp1760-hcd.c1583
-rw-r--r--drivers/usb/host/isp1760-hcd.h78
-rw-r--r--drivers/usb/host/octeon2-common.c45
-rw-r--r--drivers/usb/host/ohci-ath79.c151
-rw-r--r--drivers/usb/host/ohci-hcd.c5
-rw-r--r--drivers/usb/host/ohci-s3c2410.c58
-rw-r--r--drivers/usb/host/sl811-hcd.c8
-rw-r--r--drivers/usb/host/u132-hcd.c3
-rw-r--r--drivers/usb/host/uhci-debug.c17
-rw-r--r--drivers/usb/host/uhci-grlib.c194
-rw-r--r--drivers/usb/host/uhci-hcd.c442
-rw-r--r--drivers/usb/host/uhci-hcd.h109
-rw-r--r--drivers/usb/host/uhci-hub.c41
-rw-r--r--drivers/usb/host/uhci-pci.c301
-rw-r--r--drivers/usb/host/xhci-dbg.c51
-rw-r--r--drivers/usb/host/xhci-hub.c165
-rw-r--r--drivers/usb/host/xhci-mem.c124
-rw-r--r--drivers/usb/host/xhci-pci.c1
-rw-r--r--drivers/usb/host/xhci-ring.c477
-rw-r--r--drivers/usb/host/xhci.c124
-rw-r--r--drivers/usb/host/xhci.h136
-rw-r--r--drivers/usb/misc/ftdi-elan.c3
-rw-r--r--drivers/usb/misc/ldusb.c52
-rw-r--r--drivers/usb/misc/usbtest.c125
-rw-r--r--drivers/usb/musb/am35x.c11
-rw-r--r--drivers/usb/musb/blackfin.c7
-rw-r--r--drivers/usb/musb/da8xx.c11
-rw-r--r--drivers/usb/musb/davinci.c5
-rw-r--r--drivers/usb/musb/musb_core.c65
-rw-r--r--drivers/usb/musb/musb_debug.h2
-rw-r--r--drivers/usb/musb/musb_gadget.c9
-rw-r--r--drivers/usb/musb/musb_host.c2
-rw-r--r--drivers/usb/musb/musb_virthub.c5
-rw-r--r--drivers/usb/musb/omap2430.c7
-rw-r--r--drivers/usb/musb/tusb6010.c16
-rw-r--r--drivers/usb/otg/Kconfig8
-rw-r--r--drivers/usb/otg/Makefile2
-rw-r--r--drivers/usb/otg/fsl_otg.c1169
-rw-r--r--drivers/usb/otg/fsl_otg.h406
-rw-r--r--drivers/usb/otg/gpio_vbus.c14
-rw-r--r--drivers/usb/otg/isp1301_omap.c26
-rw-r--r--drivers/usb/otg/langwell_otg.c40
-rw-r--r--drivers/usb/otg/msm_otg.c673
-rw-r--r--drivers/usb/otg/otg.c35
-rw-r--r--drivers/usb/otg/otg_fsm.c349
-rw-r--r--drivers/usb/otg/otg_fsm.h154
-rw-r--r--drivers/usb/otg/twl4030-usb.c9
-rw-r--r--drivers/usb/otg/twl6030-usb.c2
-rw-r--r--drivers/usb/renesas_usbhs/Kconfig16
-rw-r--r--drivers/usb/renesas_usbhs/Makefile9
-rw-r--r--drivers/usb/renesas_usbhs/common.c437
-rw-r--r--drivers/usb/renesas_usbhs/common.h230
-rw-r--r--drivers/usb/renesas_usbhs/mod.c328
-rw-r--r--drivers/usb/renesas_usbhs/mod.h137
-rw-r--r--drivers/usb/renesas_usbhs/mod_gadget.c1384
-rw-r--r--drivers/usb/renesas_usbhs/pipe.c877
-rw-r--r--drivers/usb/renesas_usbhs/pipe.h104
-rw-r--r--drivers/usb/serial/Kconfig9
-rw-r--r--drivers/usb/serial/Makefile1
-rw-r--r--drivers/usb/serial/cp210x.c4
-rw-r--r--drivers/usb/serial/ftdi_sio.c1
-rw-r--r--drivers/usb/serial/ftdi_sio_ids.h5
-rw-r--r--drivers/usb/serial/garmin_gps.c20
-rw-r--r--drivers/usb/serial/moto_modem.c1
-rw-r--r--drivers/usb/serial/option.c8
-rw-r--r--drivers/usb/serial/sam-ba.c206
-rw-r--r--include/linux/fsl_devices.h16
-rw-r--r--include/linux/usb.h6
-rw-r--r--include/linux/usb/ch9.h2
-rw-r--r--include/linux/usb/ehci_def.h15
-rw-r--r--include/linux/usb/gadget.h4
-rw-r--r--include/linux/usb/msm_hsusb.h79
-rw-r--r--include/linux/usb/msm_hsusb_hw.h2
-rw-r--r--include/linux/usb/otg.h6
-rw-r--r--include/linux/usb/renesas_usbhs.h156
154 files changed, 11753 insertions, 2771 deletions
diff --git a/Documentation/usb/callbacks.txt b/Documentation/usb/callbacks.txt
index bfb36b34b79e..9e85846bdb98 100644
--- a/Documentation/usb/callbacks.txt
+++ b/Documentation/usb/callbacks.txt
@@ -95,9 +95,11 @@ pre_reset
95 95
96int (*pre_reset)(struct usb_interface *intf); 96int (*pre_reset)(struct usb_interface *intf);
97 97
98Another driver or user space is triggering a reset on the device which 98A driver or user space is triggering a reset on the device which
99contains the interface passed as an argument. Cease IO and save any 99contains the interface passed as an argument. Cease IO, wait for all
100device state you need to restore. 100outstanding URBs to complete, and save any device state you need to
101restore. No more URBs may be submitted until the post_reset method
102is called.
101 103
102If you need to allocate memory here, use GFP_NOIO or GFP_ATOMIC, if you 104If you need to allocate memory here, use GFP_NOIO or GFP_ATOMIC, if you
103are in atomic context. 105are in atomic context.
diff --git a/Documentation/usb/linux-cdc-acm.inf b/Documentation/usb/linux-cdc-acm.inf
index 612e7220fb29..37a02ce54841 100644
--- a/Documentation/usb/linux-cdc-acm.inf
+++ b/Documentation/usb/linux-cdc-acm.inf
@@ -90,10 +90,10 @@ ServiceBinary=%12%\USBSER.sys
90[SourceDisksFiles] 90[SourceDisksFiles]
91[SourceDisksNames] 91[SourceDisksNames]
92[DeviceList] 92[DeviceList]
93%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_0525&PID_A4AB&MI_02 93%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_1D6B&PID_0104&MI_02
94 94
95[DeviceList.NTamd64] 95[DeviceList.NTamd64]
96%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_0525&PID_A4AB&MI_02 96%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_1D6B&PID_0104&MI_02
97 97
98 98
99;------------------------------------------------------------------------------ 99;------------------------------------------------------------------------------
diff --git a/Documentation/usb/linux.inf b/Documentation/usb/linux.inf
index 4dee95851224..4ffa715b0ae8 100644
--- a/Documentation/usb/linux.inf
+++ b/Documentation/usb/linux.inf
@@ -18,15 +18,15 @@ DriverVer = 06/21/2006,6.0.6000.16384
18 18
19; Decoration for x86 architecture 19; Decoration for x86 architecture
20[LinuxDevices.NTx86] 20[LinuxDevices.NTx86]
21%LinuxDevice% = RNDIS.NT.5.1, USB\VID_0525&PID_a4a2, USB\VID_0525&PID_a4ab&MI_00 21%LinuxDevice% = RNDIS.NT.5.1, USB\VID_0525&PID_a4a2, USB\VID_1d6b&PID_0104&MI_00
22 22
23; Decoration for x64 architecture 23; Decoration for x64 architecture
24[LinuxDevices.NTamd64] 24[LinuxDevices.NTamd64]
25%LinuxDevice% = RNDIS.NT.5.1, USB\VID_0525&PID_a4a2, USB\VID_0525&PID_a4ab&MI_00 25%LinuxDevice% = RNDIS.NT.5.1, USB\VID_0525&PID_a4a2, USB\VID_1d6b&PID_0104&MI_00
26 26
27; Decoration for ia64 architecture 27; Decoration for ia64 architecture
28[LinuxDevices.NTia64] 28[LinuxDevices.NTia64]
29%LinuxDevice% = RNDIS.NT.5.1, USB\VID_0525&PID_a4a2, USB\VID_0525&PID_a4ab&MI_00 29%LinuxDevice% = RNDIS.NT.5.1, USB\VID_0525&PID_a4a2, USB\VID_1d6b&PID_0104&MI_00
30 30
31;@@@ This is the common setting for setup 31;@@@ This is the common setting for setup
32[ControlFlags] 32[ControlFlags]
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index e849f67be47d..805196207ce8 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -170,6 +170,7 @@ config MACH_NURI
170 select S3C_DEV_HSMMC3 170 select S3C_DEV_HSMMC3
171 select S3C_DEV_I2C1 171 select S3C_DEV_I2C1
172 select S3C_DEV_I2C5 172 select S3C_DEV_I2C5
173 select S5P_DEV_USB_EHCI
173 select EXYNOS4_SETUP_I2C1 174 select EXYNOS4_SETUP_I2C1
174 select EXYNOS4_SETUP_I2C5 175 select EXYNOS4_SETUP_I2C5
175 select EXYNOS4_SETUP_SDHCI 176 select EXYNOS4_SETUP_SDHCI
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index 9be104f63c0b..777897551e42 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -54,3 +54,5 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o
54obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o 54obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o
55obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o 55obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o
56obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 56obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
57
58obj-$(CONFIG_USB_SUPPORT) += usb-phy.o
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 793011391943..08813a6f66b1 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -97,7 +97,12 @@ static struct map_desc exynos4_iodesc[] __initdata = {
97 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), 97 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
98 .length = SZ_4K, 98 .length = SZ_4K,
99 .type = MT_DEVICE, 99 .type = MT_DEVICE,
100 }, 100 }, {
101 .virtual = (unsigned long)S5P_VA_USB_HSPHY,
102 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
103 .length = SZ_4K,
104 .type = MT_DEVICE,
105 }
101}; 106};
102 107
103static void exynos4_idle(void) 108static void exynos4_idle(void)
diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h
index 6330b73b9ea7..0009e77a05fc 100644
--- a/arch/arm/mach-exynos4/include/mach/map.h
+++ b/arch/arm/mach-exynos4/include/mach/map.h
@@ -101,6 +101,9 @@
101 101
102#define EXYNOS4_PA_SROMC 0x12570000 102#define EXYNOS4_PA_SROMC 0x12570000
103 103
104#define EXYNOS4_PA_EHCI 0x12580000
105#define EXYNOS4_PA_HSPHY 0x125B0000
106
104#define EXYNOS4_PA_UART 0x13800000 107#define EXYNOS4_PA_UART 0x13800000
105 108
106#define EXYNOS4_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) 109#define EXYNOS4_PA_IIC(x) (0x13860000 + ((x) * 0x10000))
@@ -143,6 +146,7 @@
143#define S5P_PA_SROMC EXYNOS4_PA_SROMC 146#define S5P_PA_SROMC EXYNOS4_PA_SROMC
144#define S5P_PA_SYSCON EXYNOS4_PA_SYSCON 147#define S5P_PA_SYSCON EXYNOS4_PA_SYSCON
145#define S5P_PA_TIMER EXYNOS4_PA_TIMER 148#define S5P_PA_TIMER EXYNOS4_PA_TIMER
149#define S5P_PA_EHCI EXYNOS4_PA_EHCI
146 150
147#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD 151#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD
148 152
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index 62b0014d05e0..a9643371f8e7 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -33,6 +33,9 @@
33#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) 33#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
34#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608) 34#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608)
35 35
36#define S5P_USBHOST_PHY_CONTROL S5P_PMUREG(0x0708)
37#define S5P_USBHOST_PHY_ENABLE (1 << 0)
38
36#define S5P_MIPI_DPHY_CONTROL(n) S5P_PMUREG(0x0710 + (n) * 4) 39#define S5P_MIPI_DPHY_CONTROL(n) S5P_PMUREG(0x0710 + (n) * 4)
37#define S5P_MIPI_DPHY_ENABLE (1 << 0) 40#define S5P_MIPI_DPHY_ENABLE (1 << 0)
38#define S5P_MIPI_DPHY_SRESETN (1 << 1) 41#define S5P_MIPI_DPHY_SRESETN (1 << 1)
diff --git a/arch/arm/mach-exynos4/include/mach/regs-usb-phy.h b/arch/arm/mach-exynos4/include/mach/regs-usb-phy.h
new file mode 100644
index 000000000000..703118d5173c
--- /dev/null
+++ b/arch/arm/mach-exynos4/include/mach/regs-usb-phy.h
@@ -0,0 +1,64 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10
11#ifndef __PLAT_S5P_REGS_USB_PHY_H
12#define __PLAT_S5P_REGS_USB_PHY_H
13
14#define EXYNOS4_HSOTG_PHYREG(x) ((x) + S5P_VA_USB_HSPHY)
15
16#define EXYNOS4_PHYPWR EXYNOS4_HSOTG_PHYREG(0x00)
17#define PHY1_HSIC_NORMAL_MASK (0xf << 9)
18#define PHY1_HSIC1_SLEEP (1 << 12)
19#define PHY1_HSIC1_FORCE_SUSPEND (1 << 11)
20#define PHY1_HSIC0_SLEEP (1 << 10)
21#define PHY1_HSIC0_FORCE_SUSPEND (1 << 9)
22
23#define PHY1_STD_NORMAL_MASK (0x7 << 6)
24#define PHY1_STD_SLEEP (1 << 8)
25#define PHY1_STD_ANALOG_POWERDOWN (1 << 7)
26#define PHY1_STD_FORCE_SUSPEND (1 << 6)
27
28#define PHY0_NORMAL_MASK (0x39 << 0)
29#define PHY0_SLEEP (1 << 5)
30#define PHY0_OTG_DISABLE (1 << 4)
31#define PHY0_ANALOG_POWERDOWN (1 << 3)
32#define PHY0_FORCE_SUSPEND (1 << 0)
33
34#define EXYNOS4_PHYCLK EXYNOS4_HSOTG_PHYREG(0x04)
35#define PHY1_COMMON_ON_N (1 << 7)
36#define PHY0_COMMON_ON_N (1 << 4)
37#define PHY0_ID_PULLUP (1 << 2)
38#define CLKSEL_MASK (0x3 << 0)
39#define CLKSEL_SHIFT (0)
40#define CLKSEL_48M (0x0 << 0)
41#define CLKSEL_12M (0x2 << 0)
42#define CLKSEL_24M (0x3 << 0)
43
44#define EXYNOS4_RSTCON EXYNOS4_HSOTG_PHYREG(0x08)
45#define HOST_LINK_PORT_SWRST_MASK (0xf << 6)
46#define HOST_LINK_PORT2_SWRST (1 << 9)
47#define HOST_LINK_PORT1_SWRST (1 << 8)
48#define HOST_LINK_PORT0_SWRST (1 << 7)
49#define HOST_LINK_ALL_SWRST (1 << 6)
50
51#define PHY1_SWRST_MASK (0x7 << 3)
52#define PHY1_HSIC_SWRST (1 << 5)
53#define PHY1_STD_SWRST (1 << 4)
54#define PHY1_ALL_SWRST (1 << 3)
55
56#define PHY0_SWRST_MASK (0x7 << 0)
57#define PHY0_PHYLINK_SWRST (1 << 2)
58#define PHY0_HLINK_SWRST (1 << 1)
59#define PHY0_SWRST (1 << 0)
60
61#define EXYNOS4_PHY1CON EXYNOS4_HSOTG_PHYREG(0x34)
62#define FPENABLEN (1 << 0)
63
64#endif /* __PLAT_S5P_REGS_USB_PHY_H */
diff --git a/arch/arm/mach-exynos4/mach-nuri.c b/arch/arm/mach-exynos4/mach-nuri.c
index b79ad010d194..bb5d12f43af8 100644
--- a/arch/arm/mach-exynos4/mach-nuri.c
+++ b/arch/arm/mach-exynos4/mach-nuri.c
@@ -30,6 +30,8 @@
30#include <plat/cpu.h> 30#include <plat/cpu.h>
31#include <plat/devs.h> 31#include <plat/devs.h>
32#include <plat/sdhci.h> 32#include <plat/sdhci.h>
33#include <plat/ehci.h>
34#include <plat/clock.h>
33 35
34#include <mach/map.h> 36#include <mach/map.h>
35 37
@@ -262,6 +264,16 @@ static struct i2c_board_info i2c5_devs[] __initdata = {
262 /* max8997, To be updated */ 264 /* max8997, To be updated */
263}; 265};
264 266
267/* USB EHCI */
268static struct s5p_ehci_platdata nuri_ehci_pdata;
269
270static void __init nuri_ehci_init(void)
271{
272 struct s5p_ehci_platdata *pdata = &nuri_ehci_pdata;
273
274 s5p_ehci_set_platdata(pdata);
275}
276
265static struct platform_device *nuri_devices[] __initdata = { 277static struct platform_device *nuri_devices[] __initdata = {
266 /* Samsung Platform Devices */ 278 /* Samsung Platform Devices */
267 &emmc_fixed_voltage, 279 &emmc_fixed_voltage,
@@ -270,6 +282,7 @@ static struct platform_device *nuri_devices[] __initdata = {
270 &s3c_device_hsmmc3, 282 &s3c_device_hsmmc3,
271 &s3c_device_wdt, 283 &s3c_device_wdt,
272 &s3c_device_timer[0], 284 &s3c_device_timer[0],
285 &s5p_device_ehci,
273 286
274 /* NURI Devices */ 287 /* NURI Devices */
275 &nuri_gpio_keys, 288 &nuri_gpio_keys,
@@ -291,6 +304,9 @@ static void __init nuri_machine_init(void)
291 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); 304 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
292 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); 305 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
293 306
307 nuri_ehci_init();
308 clk_xusbxti.rate = 24000000;
309
294 /* Last */ 310 /* Last */
295 platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); 311 platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
296} 312}
diff --git a/arch/arm/mach-exynos4/usb-phy.c b/arch/arm/mach-exynos4/usb-phy.c
new file mode 100644
index 000000000000..0883c1b824b9
--- /dev/null
+++ b/arch/arm/mach-exynos4/usb-phy.c
@@ -0,0 +1,136 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
12#include <linux/clk.h>
13#include <linux/delay.h>
14#include <linux/err.h>
15#include <linux/io.h>
16#include <linux/platform_device.h>
17#include <mach/regs-pmu.h>
18#include <mach/regs-usb-phy.h>
19#include <plat/cpu.h>
20#include <plat/usb-phy.h>
21
22static int exynos4_usb_phy1_init(struct platform_device *pdev)
23{
24 struct clk *otg_clk;
25 struct clk *xusbxti_clk;
26 u32 phyclk;
27 u32 rstcon;
28 int err;
29
30 otg_clk = clk_get(&pdev->dev, "otg");
31 if (IS_ERR(otg_clk)) {
32 dev_err(&pdev->dev, "Failed to get otg clock\n");
33 return PTR_ERR(otg_clk);
34 }
35
36 err = clk_enable(otg_clk);
37 if (err) {
38 clk_put(otg_clk);
39 return err;
40 }
41
42 writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE,
43 S5P_USBHOST_PHY_CONTROL);
44
45 /* set clock frequency for PLL */
46 phyclk = readl(EXYNOS4_PHYCLK) & ~CLKSEL_MASK;
47
48 xusbxti_clk = clk_get(&pdev->dev, "xusbxti");
49 if (xusbxti_clk && !IS_ERR(xusbxti_clk)) {
50 switch (clk_get_rate(xusbxti_clk)) {
51 case 12 * MHZ:
52 phyclk |= CLKSEL_12M;
53 break;
54 case 24 * MHZ:
55 phyclk |= CLKSEL_24M;
56 break;
57 default:
58 case 48 * MHZ:
59 /* default reference clock */
60 break;
61 }
62 clk_put(xusbxti_clk);
63 }
64
65 writel(phyclk, EXYNOS4_PHYCLK);
66
67 /* floating prevention logic: disable */
68 writel((readl(EXYNOS4_PHY1CON) | FPENABLEN), EXYNOS4_PHY1CON);
69
70 /* set to normal HSIC 0 and 1 of PHY1 */
71 writel((readl(EXYNOS4_PHYPWR) & ~PHY1_HSIC_NORMAL_MASK),
72 EXYNOS4_PHYPWR);
73
74 /* set to normal standard USB of PHY1 */
75 writel((readl(EXYNOS4_PHYPWR) & ~PHY1_STD_NORMAL_MASK), EXYNOS4_PHYPWR);
76
77 /* reset all ports of both PHY and Link */
78 rstcon = readl(EXYNOS4_RSTCON) | HOST_LINK_PORT_SWRST_MASK |
79 PHY1_SWRST_MASK;
80 writel(rstcon, EXYNOS4_RSTCON);
81 udelay(10);
82
83 rstcon &= ~(HOST_LINK_PORT_SWRST_MASK | PHY1_SWRST_MASK);
84 writel(rstcon, EXYNOS4_RSTCON);
85 udelay(50);
86
87 clk_disable(otg_clk);
88 clk_put(otg_clk);
89
90 return 0;
91}
92
93static int exynos4_usb_phy1_exit(struct platform_device *pdev)
94{
95 struct clk *otg_clk;
96 int err;
97
98 otg_clk = clk_get(&pdev->dev, "otg");
99 if (IS_ERR(otg_clk)) {
100 dev_err(&pdev->dev, "Failed to get otg clock\n");
101 return PTR_ERR(otg_clk);
102 }
103
104 err = clk_enable(otg_clk);
105 if (err) {
106 clk_put(otg_clk);
107 return err;
108 }
109
110 writel((readl(EXYNOS4_PHYPWR) | PHY1_STD_ANALOG_POWERDOWN),
111 EXYNOS4_PHYPWR);
112
113 writel(readl(S5P_USBHOST_PHY_CONTROL) & ~S5P_USBHOST_PHY_ENABLE,
114 S5P_USBHOST_PHY_CONTROL);
115
116 clk_disable(otg_clk);
117 clk_put(otg_clk);
118
119 return 0;
120}
121
122int s5p_usb_phy_init(struct platform_device *pdev, int type)
123{
124 if (type == S5P_USB_PHY_HOST)
125 return exynos4_usb_phy1_init(pdev);
126
127 return -EINVAL;
128}
129
130int s5p_usb_phy_exit(struct platform_device *pdev, int type)
131{
132 if (type == S5P_USB_PHY_HOST)
133 return exynos4_usb_phy1_exit(pdev);
134
135 return -EINVAL;
136}
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 849229716586..6751bcf7b888 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -85,6 +85,11 @@ config S5P_DEV_CSIS1
85 help 85 help
86 Compile in platform device definitions for MIPI-CSIS channel 1 86 Compile in platform device definitions for MIPI-CSIS channel 1
87 87
88config S5P_DEV_USB_EHCI
89 bool
90 help
91 Compile in platform device definition for USB EHCI
92
88config S5P_SETUP_MIPIPHY 93config S5P_SETUP_MIPIPHY
89 bool 94 bool
90 help 95 help
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 42afff7f60be..e234cc4d49a0 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -33,4 +33,5 @@ obj-$(CONFIG_S5P_DEV_FIMC3) += dev-fimc3.o
33obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o 33obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o
34obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o 34obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o
35obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o 35obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o
36obj-$(CONFIG_S5P_DEV_USB_EHCI) += dev-ehci.o
36obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o 37obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o
diff --git a/arch/arm/plat-s5p/dev-ehci.c b/arch/arm/plat-s5p/dev-ehci.c
new file mode 100644
index 000000000000..94080fff9e9b
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-ehci.c
@@ -0,0 +1,57 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
12#include <linux/platform_device.h>
13#include <mach/irqs.h>
14#include <mach/map.h>
15#include <plat/devs.h>
16#include <plat/ehci.h>
17#include <plat/usb-phy.h>
18
19/* USB EHCI Host Controller registration */
20static struct resource s5p_ehci_resource[] = {
21 [0] = {
22 .start = S5P_PA_EHCI,
23 .end = S5P_PA_EHCI + SZ_256 - 1,
24 .flags = IORESOURCE_MEM,
25 },
26 [1] = {
27 .start = IRQ_USB_HOST,
28 .end = IRQ_USB_HOST,
29 .flags = IORESOURCE_IRQ,
30 }
31};
32
33static u64 s5p_device_ehci_dmamask = 0xffffffffUL;
34
35struct platform_device s5p_device_ehci = {
36 .name = "s5p-ehci",
37 .id = -1,
38 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
39 .resource = s5p_ehci_resource,
40 .dev = {
41 .dma_mask = &s5p_device_ehci_dmamask,
42 .coherent_dma_mask = 0xffffffffUL
43 }
44};
45
46void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
47{
48 struct s5p_ehci_platdata *npd;
49
50 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
51 &s5p_device_ehci);
52
53 if (!npd->phy_init)
54 npd->phy_init = s5p_usb_phy_init;
55 if (!npd->phy_exit)
56 npd->phy_exit = s5p_usb_phy_exit;
57}
diff --git a/arch/arm/plat-s5p/include/plat/ehci.h b/arch/arm/plat-s5p/include/plat/ehci.h
new file mode 100644
index 000000000000..6ae6810c7569
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/ehci.h
@@ -0,0 +1,21 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10
11#ifndef __PLAT_S5P_EHCI_H
12#define __PLAT_S5P_EHCI_H
13
14struct s5p_ehci_platdata {
15 int (*phy_init)(struct platform_device *pdev, int type);
16 int (*phy_exit)(struct platform_device *pdev, int type);
17};
18
19extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd);
20
21#endif /* __PLAT_S5P_EHCI_H */
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
index d973d39666a3..a6c3d327ce72 100644
--- a/arch/arm/plat-s5p/include/plat/map-s5p.h
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -39,7 +39,7 @@
39#define S5P_VA_TWD S5P_VA_COREPERI(0x600) 39#define S5P_VA_TWD S5P_VA_COREPERI(0x600)
40#define S5P_VA_GIC_DIST S5P_VA_COREPERI(0x1000) 40#define S5P_VA_GIC_DIST S5P_VA_COREPERI(0x1000)
41 41
42#define S3C_VA_USB_HSPHY S3C_ADDR(0x02900000) 42#define S5P_VA_USB_HSPHY S3C_ADDR(0x02900000)
43 43
44#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) 44#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
45#define VA_VIC0 VA_VIC(0) 45#define VA_VIC0 VA_VIC(0)
diff --git a/arch/arm/plat-s5p/include/plat/usb-phy.h b/arch/arm/plat-s5p/include/plat/usb-phy.h
new file mode 100644
index 000000000000..6dd6bcfca3ce
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/usb-phy.h
@@ -0,0 +1,22 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10
11#ifndef __PLAT_S5P_USB_PHY_H
12#define __PLAT_S5P_USB_PHY_H
13
14enum s5p_usb_phy_type {
15 S5P_USB_PHY_DEVICE,
16 S5P_USB_PHY_HOST,
17};
18
19extern int s5p_usb_phy_init(struct platform_device *pdev, int type);
20extern int s5p_usb_phy_exit(struct platform_device *pdev, int type);
21
22#endif /* __PLAT_S5P_REGS_USB_PHY_H */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index f0da6b70fba4..3f38debbb108 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -142,6 +142,8 @@ extern struct platform_device s5p_device_fimc3;
142extern struct platform_device s5p_device_mipi_csis0; 142extern struct platform_device s5p_device_mipi_csis0;
143extern struct platform_device s5p_device_mipi_csis1; 143extern struct platform_device s5p_device_mipi_csis1;
144 144
145extern struct platform_device s5p_device_ehci;
146
145extern struct platform_device exynos4_device_sysmmu; 147extern struct platform_device exynos4_device_sysmmu;
146 148
147/* s3c2440 specific devices */ 149/* s3c2440 specific devices */
diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
index b05828260f7f..47707410582c 100644
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -26,12 +26,17 @@ config ATH79_MACH_PB44
26endmenu 26endmenu
27 27
28config SOC_AR71XX 28config SOC_AR71XX
29 select USB_ARCH_HAS_EHCI
30 select USB_ARCH_HAS_OHCI
29 def_bool n 31 def_bool n
30 32
31config SOC_AR724X 33config SOC_AR724X
34 select USB_ARCH_HAS_EHCI
35 select USB_ARCH_HAS_OHCI
32 def_bool n 36 def_bool n
33 37
34config SOC_AR913X 38config SOC_AR913X
39 select USB_ARCH_HAS_EHCI
35 def_bool n 40 def_bool n
36 41
37config ATH79_DEV_AR913X_WMAC 42config ATH79_DEV_AR913X_WMAC
diff --git a/drivers/Makefile b/drivers/Makefile
index 3f135b6fb014..0cf73a90fca8 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -64,11 +64,10 @@ obj-$(CONFIG_ATA_OVER_ETH) += block/aoe/
64obj-$(CONFIG_PARIDE) += block/paride/ 64obj-$(CONFIG_PARIDE) += block/paride/
65obj-$(CONFIG_TC) += tc/ 65obj-$(CONFIG_TC) += tc/
66obj-$(CONFIG_UWB) += uwb/ 66obj-$(CONFIG_UWB) += uwb/
67obj-$(CONFIG_USB_OTG_UTILS) += usb/otg/ 67obj-$(CONFIG_USB_OTG_UTILS) += usb/
68obj-$(CONFIG_USB) += usb/ 68obj-$(CONFIG_USB) += usb/
69obj-$(CONFIG_USB_MUSB_HDRC) += usb/musb/
70obj-$(CONFIG_PCI) += usb/ 69obj-$(CONFIG_PCI) += usb/
71obj-$(CONFIG_USB_GADGET) += usb/gadget/ 70obj-$(CONFIG_USB_GADGET) += usb/
72obj-$(CONFIG_SERIO) += input/serio/ 71obj-$(CONFIG_SERIO) += input/serio/
73obj-$(CONFIG_GAMEPORT) += input/gameport/ 72obj-$(CONFIG_GAMEPORT) += input/gameport/
74obj-$(CONFIG_INPUT) += input/ 73obj-$(CONFIG_INPUT) += input/
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index 408c4bea4d8d..86a64fa6e26d 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1760,19 +1760,37 @@ static const struct hid_device_id hid_ignore_list[] = {
1760 { HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_GPEN_560) }, 1760 { HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_GPEN_560) },
1761 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_KYE, 0x0058) }, 1761 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_KYE, 0x0058) },
1762 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_CASSY) }, 1762 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_CASSY) },
1763 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_CASSY2) },
1763 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_POCKETCASSY) }, 1764 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_POCKETCASSY) },
1765 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_POCKETCASSY2) },
1764 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOBILECASSY) }, 1766 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOBILECASSY) },
1767 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOBILECASSY2) },
1768 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MICROCASSYVOLTAGE) },
1769 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MICROCASSYCURRENT) },
1770 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MICROCASSYTIME) },
1771 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MICROCASSYTEMPERATURE) },
1772 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MICROCASSYPH) },
1765 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_JWM) }, 1773 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_JWM) },
1766 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_DMMP) }, 1774 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_DMMP) },
1767 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_UMIP) }, 1775 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_UMIP) },
1768 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_XRAY1) }, 1776 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_UMIC) },
1777 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_UMIB) },
1778 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_XRAY) },
1769 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_XRAY2) }, 1779 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_XRAY2) },
1770 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_VIDEOCOM) }, 1780 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_VIDEOCOM) },
1781 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOTOR) },
1771 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_COM3LAB) }, 1782 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_COM3LAB) },
1772 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_TELEPORT) }, 1783 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_TELEPORT) },
1773 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_NETWORKANALYSER) }, 1784 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_NETWORKANALYSER) },
1774 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_POWERCONTROL) }, 1785 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_POWERCONTROL) },
1775 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MACHINETEST) }, 1786 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MACHINETEST) },
1787 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOSTANALYSER) },
1788 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOSTANALYSER2) },
1789 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_ABSESP) },
1790 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_AUTODATABUS) },
1791 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MCT) },
1792 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_HYBRID) },
1793 { HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_HEATCONTROL) },
1776 { HID_USB_DEVICE(USB_VENDOR_ID_MCC, USB_DEVICE_ID_MCC_PMD1024LS) }, 1794 { HID_USB_DEVICE(USB_VENDOR_ID_MCC, USB_DEVICE_ID_MCC_PMD1024LS) },
1777 { HID_USB_DEVICE(USB_VENDOR_ID_MCC, USB_DEVICE_ID_MCC_PMD1208LS) }, 1795 { HID_USB_DEVICE(USB_VENDOR_ID_MCC, USB_DEVICE_ID_MCC_PMD1208LS) },
1778 { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_PICKIT1) }, 1796 { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_PICKIT1) },
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index 00a94b535d28..a8a05835fb49 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -367,19 +367,38 @@
367 367
368#define USB_VENDOR_ID_LD 0x0f11 368#define USB_VENDOR_ID_LD 0x0f11
369#define USB_DEVICE_ID_LD_CASSY 0x1000 369#define USB_DEVICE_ID_LD_CASSY 0x1000
370#define USB_DEVICE_ID_LD_CASSY2 0x1001
370#define USB_DEVICE_ID_LD_POCKETCASSY 0x1010 371#define USB_DEVICE_ID_LD_POCKETCASSY 0x1010
372#define USB_DEVICE_ID_LD_POCKETCASSY2 0x1011
371#define USB_DEVICE_ID_LD_MOBILECASSY 0x1020 373#define USB_DEVICE_ID_LD_MOBILECASSY 0x1020
374#define USB_DEVICE_ID_LD_MOBILECASSY2 0x1021
375#define USB_DEVICE_ID_LD_MICROCASSYVOLTAGE 0x1031
376#define USB_DEVICE_ID_LD_MICROCASSYCURRENT 0x1032
377#define USB_DEVICE_ID_LD_MICROCASSYTIME 0x1033
378#define USB_DEVICE_ID_LD_MICROCASSYTEMPERATURE 0x1035
379#define USB_DEVICE_ID_LD_MICROCASSYPH 0x1038
372#define USB_DEVICE_ID_LD_JWM 0x1080 380#define USB_DEVICE_ID_LD_JWM 0x1080
373#define USB_DEVICE_ID_LD_DMMP 0x1081 381#define USB_DEVICE_ID_LD_DMMP 0x1081
374#define USB_DEVICE_ID_LD_UMIP 0x1090 382#define USB_DEVICE_ID_LD_UMIP 0x1090
375#define USB_DEVICE_ID_LD_XRAY1 0x1100 383#define USB_DEVICE_ID_LD_UMIC 0x10A0
384#define USB_DEVICE_ID_LD_UMIB 0x10B0
385#define USB_DEVICE_ID_LD_XRAY 0x1100
376#define USB_DEVICE_ID_LD_XRAY2 0x1101 386#define USB_DEVICE_ID_LD_XRAY2 0x1101
387#define USB_DEVICE_ID_LD_XRAYCT 0x1110
377#define USB_DEVICE_ID_LD_VIDEOCOM 0x1200 388#define USB_DEVICE_ID_LD_VIDEOCOM 0x1200
389#define USB_DEVICE_ID_LD_MOTOR 0x1210
378#define USB_DEVICE_ID_LD_COM3LAB 0x2000 390#define USB_DEVICE_ID_LD_COM3LAB 0x2000
379#define USB_DEVICE_ID_LD_TELEPORT 0x2010 391#define USB_DEVICE_ID_LD_TELEPORT 0x2010
380#define USB_DEVICE_ID_LD_NETWORKANALYSER 0x2020 392#define USB_DEVICE_ID_LD_NETWORKANALYSER 0x2020
381#define USB_DEVICE_ID_LD_POWERCONTROL 0x2030 393#define USB_DEVICE_ID_LD_POWERCONTROL 0x2030
382#define USB_DEVICE_ID_LD_MACHINETEST 0x2040 394#define USB_DEVICE_ID_LD_MACHINETEST 0x2040
395#define USB_DEVICE_ID_LD_MOSTANALYSER 0x2050
396#define USB_DEVICE_ID_LD_MOSTANALYSER2 0x2051
397#define USB_DEVICE_ID_LD_ABSESP 0x2060
398#define USB_DEVICE_ID_LD_AUTODATABUS 0x2070
399#define USB_DEVICE_ID_LD_MCT 0x2080
400#define USB_DEVICE_ID_LD_HYBRID 0x2090
401#define USB_DEVICE_ID_LD_HEATCONTROL 0x20A0
383 402
384#define USB_VENDOR_ID_LOGITECH 0x046d 403#define USB_VENDOR_ID_LOGITECH 0x046d
385#define USB_DEVICE_ID_LOGITECH_RECEIVER 0xc101 404#define USB_DEVICE_ID_LOGITECH_RECEIVER 0xc101
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 006489d82dc3..48f1781352f1 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -65,8 +65,10 @@ config USB_ARCH_HAS_EHCI
65 default y if ARCH_CNS3XXX 65 default y if ARCH_CNS3XXX
66 default y if ARCH_VT8500 66 default y if ARCH_VT8500
67 default y if PLAT_SPEAR 67 default y if PLAT_SPEAR
68 default y if PLAT_S5P
68 default y if ARCH_MSM 69 default y if ARCH_MSM
69 default y if MICROBLAZE 70 default y if MICROBLAZE
71 default y if SPARC_LEON
70 default PCI 72 default PCI
71 73
72# ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface. 74# ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface.
@@ -116,6 +118,8 @@ source "drivers/usb/host/Kconfig"
116 118
117source "drivers/usb/musb/Kconfig" 119source "drivers/usb/musb/Kconfig"
118 120
121source "drivers/usb/renesas_usbhs/Kconfig"
122
119source "drivers/usb/class/Kconfig" 123source "drivers/usb/class/Kconfig"
120 124
121source "drivers/usb/storage/Kconfig" 125source "drivers/usb/storage/Kconfig"
diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index 239f050efa35..30ddf8dc4f72 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_USB_R8A66597_HCD) += host/
22obj-$(CONFIG_USB_HWA_HCD) += host/ 22obj-$(CONFIG_USB_HWA_HCD) += host/
23obj-$(CONFIG_USB_ISP1760_HCD) += host/ 23obj-$(CONFIG_USB_ISP1760_HCD) += host/
24obj-$(CONFIG_USB_IMX21_HCD) += host/ 24obj-$(CONFIG_USB_IMX21_HCD) += host/
25obj-$(CONFIG_USB_FSL_MPH_DR_OF) += host/
25 26
26obj-$(CONFIG_USB_C67X00_HCD) += c67x00/ 27obj-$(CONFIG_USB_C67X00_HCD) += c67x00/
27 28
@@ -45,3 +46,8 @@ obj-$(CONFIG_EARLY_PRINTK_DBGP) += early/
45 46
46obj-$(CONFIG_USB_ATM) += atm/ 47obj-$(CONFIG_USB_ATM) += atm/
47obj-$(CONFIG_USB_SPEEDTOUCH) += atm/ 48obj-$(CONFIG_USB_SPEEDTOUCH) += atm/
49
50obj-$(CONFIG_USB_MUSB_HDRC) += musb/
51obj-$(CONFIG_USB_RENESAS_USBHS) += renesas_usbhs/
52obj-$(CONFIG_USB_OTG_UTILS) += otg/
53obj-$(CONFIG_USB_GADGET) += gadget/
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index e057e5381465..58754b508a0f 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -7,35 +7,12 @@
7 * Copyright (c) 2000 Vojtech Pavlik <vojtech@suse.cz> 7 * Copyright (c) 2000 Vojtech Pavlik <vojtech@suse.cz>
8 * Copyright (c) 2004 Oliver Neukum <oliver@neukum.name> 8 * Copyright (c) 2004 Oliver Neukum <oliver@neukum.name>
9 * Copyright (c) 2005 David Kubicek <dave@awk.cz> 9 * Copyright (c) 2005 David Kubicek <dave@awk.cz>
10 * Copyright (c) 2011 Johan Hovold <jhovold@gmail.com>
10 * 11 *
11 * USB Abstract Control Model driver for USB modems and ISDN adapters 12 * USB Abstract Control Model driver for USB modems and ISDN adapters
12 * 13 *
13 * Sponsored by SuSE 14 * Sponsored by SuSE
14 * 15 *
15 * ChangeLog:
16 * v0.9 - thorough cleaning, URBification, almost a rewrite
17 * v0.10 - some more cleanups
18 * v0.11 - fixed flow control, read error doesn't stop reads
19 * v0.12 - added TIOCM ioctls, added break handling, made struct acm
20 * kmalloced
21 * v0.13 - added termios, added hangup
22 * v0.14 - sized down struct acm
23 * v0.15 - fixed flow control again - characters could be lost
24 * v0.16 - added code for modems with swapped data and control interfaces
25 * v0.17 - added new style probing
26 * v0.18 - fixed new style probing for devices with more configurations
27 * v0.19 - fixed CLOCAL handling (thanks to Richard Shih-Ping Chan)
28 * v0.20 - switched to probing on interface (rather than device) class
29 * v0.21 - revert to probing on device for devices with multiple configs
30 * v0.22 - probe only the control interface. if usbcore doesn't choose the
31 * config we want, sysadmin changes bConfigurationValue in sysfs.
32 * v0.23 - use softirq for rx processing, as needed by tty layer
33 * v0.24 - change probe method to evaluate CDC union descriptor
34 * v0.25 - downstream tasks paralelized to maximize throughput
35 * v0.26 - multiple write urbs, writesize increased
36 */
37
38/*
39 * This program is free software; you can redistribute it and/or modify 16 * This program is free software; you can redistribute it and/or modify
40 * it under the terms of the GNU General Public License as published by 17 * it under the terms of the GNU General Public License as published by
41 * the Free Software Foundation; either version 2 of the License, or 18 * the Free Software Foundation; either version 2 of the License, or
@@ -74,13 +51,7 @@
74#include "cdc-acm.h" 51#include "cdc-acm.h"
75 52
76 53
77#define ACM_CLOSE_TIMEOUT 15 /* seconds to let writes drain */ 54#define DRIVER_AUTHOR "Armin Fuerst, Pavel Machek, Johannes Erdfelt, Vojtech Pavlik, David Kubicek, Johan Hovold"
78
79/*
80 * Version Information
81 */
82#define DRIVER_VERSION "v0.26"
83#define DRIVER_AUTHOR "Armin Fuerst, Pavel Machek, Johannes Erdfelt, Vojtech Pavlik, David Kubicek"
84#define DRIVER_DESC "USB Abstract Control Model driver for USB modems and ISDN adapters" 55#define DRIVER_DESC "USB Abstract Control Model driver for USB modems and ISDN adapters"
85 56
86static struct usb_driver acm_driver; 57static struct usb_driver acm_driver;
@@ -94,12 +65,6 @@ static DEFINE_MUTEX(open_mutex);
94static const struct tty_port_operations acm_port_ops = { 65static const struct tty_port_operations acm_port_ops = {
95}; 66};
96 67
97#ifdef VERBOSE_DEBUG
98#define verbose 1
99#else
100#define verbose 0
101#endif
102
103/* 68/*
104 * Functions for ACM control messages. 69 * Functions for ACM control messages.
105 */ 70 */
@@ -111,8 +76,9 @@ static int acm_ctrl_msg(struct acm *acm, int request, int value,
111 request, USB_RT_ACM, value, 76 request, USB_RT_ACM, value,
112 acm->control->altsetting[0].desc.bInterfaceNumber, 77 acm->control->altsetting[0].desc.bInterfaceNumber,
113 buf, len, 5000); 78 buf, len, 5000);
114 dbg("acm_control_msg: rq: 0x%02x val: %#x len: %#x result: %d", 79 dev_dbg(&acm->control->dev,
115 request, value, len, retval); 80 "%s - rq 0x%02x, val %#x, len %#x, result %d\n",
81 __func__, request, value, len, retval);
116 return retval < 0 ? retval : 0; 82 return retval < 0 ? retval : 0;
117} 83}
118 84
@@ -192,7 +158,9 @@ static int acm_start_wb(struct acm *acm, struct acm_wb *wb)
192 158
193 rc = usb_submit_urb(wb->urb, GFP_ATOMIC); 159 rc = usb_submit_urb(wb->urb, GFP_ATOMIC);
194 if (rc < 0) { 160 if (rc < 0) {
195 dbg("usb_submit_urb(write bulk) failed: %d", rc); 161 dev_err(&acm->data->dev,
162 "%s - usb_submit_urb(write bulk) failed: %d\n",
163 __func__, rc);
196 acm_write_done(acm, wb); 164 acm_write_done(acm, wb);
197 } 165 }
198 return rc; 166 return rc;
@@ -211,7 +179,8 @@ static int acm_write_start(struct acm *acm, int wbn)
211 return -ENODEV; 179 return -ENODEV;
212 } 180 }
213 181
214 dbg("%s susp_count: %d", __func__, acm->susp_count); 182 dev_vdbg(&acm->data->dev, "%s - susp_count %d\n", __func__,
183 acm->susp_count);
215 usb_autopm_get_interface_async(acm->control); 184 usb_autopm_get_interface_async(acm->control);
216 if (acm->susp_count) { 185 if (acm->susp_count) {
217 if (!acm->delayed_wb) 186 if (!acm->delayed_wb)
@@ -287,10 +256,14 @@ static void acm_ctrl_irq(struct urb *urb)
287 case -ENOENT: 256 case -ENOENT:
288 case -ESHUTDOWN: 257 case -ESHUTDOWN:
289 /* this urb is terminated, clean up */ 258 /* this urb is terminated, clean up */
290 dbg("%s - urb shutting down with status: %d", __func__, status); 259 dev_dbg(&acm->control->dev,
260 "%s - urb shutting down with status: %d\n",
261 __func__, status);
291 return; 262 return;
292 default: 263 default:
293 dbg("%s - nonzero urb status received: %d", __func__, status); 264 dev_dbg(&acm->control->dev,
265 "%s - nonzero urb status received: %d\n",
266 __func__, status);
294 goto exit; 267 goto exit;
295 } 268 }
296 269
@@ -302,8 +275,8 @@ static void acm_ctrl_irq(struct urb *urb)
302 data = (unsigned char *)(dr + 1); 275 data = (unsigned char *)(dr + 1);
303 switch (dr->bNotificationType) { 276 switch (dr->bNotificationType) {
304 case USB_CDC_NOTIFY_NETWORK_CONNECTION: 277 case USB_CDC_NOTIFY_NETWORK_CONNECTION:
305 dbg("%s network", dr->wValue ? 278 dev_dbg(&acm->control->dev, "%s - network connection: %d\n",
306 "connected to" : "disconnected from"); 279 __func__, dr->wValue);
307 break; 280 break;
308 281
309 case USB_CDC_NOTIFY_SERIAL_STATE: 282 case USB_CDC_NOTIFY_SERIAL_STATE:
@@ -313,7 +286,8 @@ static void acm_ctrl_irq(struct urb *urb)
313 if (tty) { 286 if (tty) {
314 if (!acm->clocal && 287 if (!acm->clocal &&
315 (acm->ctrlin & ~newctrl & ACM_CTRL_DCD)) { 288 (acm->ctrlin & ~newctrl & ACM_CTRL_DCD)) {
316 dbg("calling hangup"); 289 dev_dbg(&acm->control->dev,
290 "%s - calling hangup\n", __func__);
317 tty_hangup(tty); 291 tty_hangup(tty);
318 } 292 }
319 tty_kref_put(tty); 293 tty_kref_put(tty);
@@ -321,7 +295,10 @@ static void acm_ctrl_irq(struct urb *urb)
321 295
322 acm->ctrlin = newctrl; 296 acm->ctrlin = newctrl;
323 297
324 dbg("input control lines: dcd%c dsr%c break%c ring%c framing%c parity%c overrun%c", 298 dev_dbg(&acm->control->dev,
299 "%s - input control lines: dcd%c dsr%c break%c "
300 "ring%c framing%c parity%c overrun%c\n",
301 __func__,
325 acm->ctrlin & ACM_CTRL_DCD ? '+' : '-', 302 acm->ctrlin & ACM_CTRL_DCD ? '+' : '-',
326 acm->ctrlin & ACM_CTRL_DSR ? '+' : '-', 303 acm->ctrlin & ACM_CTRL_DSR ? '+' : '-',
327 acm->ctrlin & ACM_CTRL_BRK ? '+' : '-', 304 acm->ctrlin & ACM_CTRL_BRK ? '+' : '-',
@@ -332,7 +309,10 @@ static void acm_ctrl_irq(struct urb *urb)
332 break; 309 break;
333 310
334 default: 311 default:
335 dbg("unknown notification %d received: index %d len %d data0 %d data1 %d", 312 dev_dbg(&acm->control->dev,
313 "%s - unknown notification %d received: index %d "
314 "len %d data0 %d data1 %d\n",
315 __func__,
336 dr->bNotificationType, dr->wIndex, 316 dr->bNotificationType, dr->wIndex,
337 dr->wLength, data[0], data[1]); 317 dr->wLength, data[0], data[1]);
338 break; 318 break;
@@ -340,166 +320,96 @@ static void acm_ctrl_irq(struct urb *urb)
340exit: 320exit:
341 retval = usb_submit_urb(urb, GFP_ATOMIC); 321 retval = usb_submit_urb(urb, GFP_ATOMIC);
342 if (retval) 322 if (retval)
343 dev_err(&urb->dev->dev, "%s - usb_submit_urb failed with " 323 dev_err(&acm->control->dev, "%s - usb_submit_urb failed: %d\n",
344 "result %d", __func__, retval); 324 __func__, retval);
345} 325}
346 326
347/* data interface returns incoming bytes, or we got unthrottled */ 327static int acm_submit_read_urb(struct acm *acm, int index, gfp_t mem_flags)
348static void acm_read_bulk(struct urb *urb)
349{ 328{
350 struct acm_rb *buf; 329 int res;
351 struct acm_ru *rcv = urb->context; 330
352 struct acm *acm = rcv->instance; 331 if (!test_and_clear_bit(index, &acm->read_urbs_free))
353 int status = urb->status; 332 return 0;
354 333
355 dbg("Entering acm_read_bulk with status %d", status); 334 dev_vdbg(&acm->data->dev, "%s - urb %d\n", __func__, index);
356 335
357 if (!ACM_READY(acm)) { 336 res = usb_submit_urb(acm->read_urbs[index], mem_flags);
358 dev_dbg(&acm->data->dev, "Aborting, acm not ready"); 337 if (res) {
359 return; 338 if (res != -EPERM) {
339 dev_err(&acm->data->dev,
340 "%s - usb_submit_urb failed: %d\n",
341 __func__, res);
342 }
343 set_bit(index, &acm->read_urbs_free);
344 return res;
360 } 345 }
361 usb_mark_last_busy(acm->dev);
362 346
363 if (status) 347 return 0;
364 dev_dbg(&acm->data->dev, "bulk rx status %d\n", status); 348}
365 349
366 buf = rcv->buffer; 350static int acm_submit_read_urbs(struct acm *acm, gfp_t mem_flags)
367 buf->size = urb->actual_length; 351{
352 int res;
353 int i;
368 354
369 if (likely(status == 0)) { 355 for (i = 0; i < acm->rx_buflimit; ++i) {
370 spin_lock(&acm->read_lock); 356 res = acm_submit_read_urb(acm, i, mem_flags);
371 acm->processing++; 357 if (res)
372 list_add_tail(&rcv->list, &acm->spare_read_urbs); 358 return res;
373 list_add_tail(&buf->list, &acm->filled_read_bufs);
374 spin_unlock(&acm->read_lock);
375 } else {
376 /* we drop the buffer due to an error */
377 spin_lock(&acm->read_lock);
378 list_add_tail(&rcv->list, &acm->spare_read_urbs);
379 list_add(&buf->list, &acm->spare_read_bufs);
380 spin_unlock(&acm->read_lock);
381 /* nevertheless the tasklet must be kicked unconditionally
382 so the queue cannot dry up */
383 } 359 }
384 if (likely(!acm->susp_count)) 360
385 tasklet_schedule(&acm->urb_task); 361 return 0;
386} 362}
387 363
388static void acm_rx_tasklet(unsigned long _acm) 364static void acm_process_read_urb(struct acm *acm, struct urb *urb)
389{ 365{
390 struct acm *acm = (void *)_acm;
391 struct acm_rb *buf;
392 struct tty_struct *tty; 366 struct tty_struct *tty;
393 struct acm_ru *rcv;
394 unsigned long flags;
395 unsigned char throttled;
396
397 dbg("Entering acm_rx_tasklet");
398 367
399 if (!ACM_READY(acm)) { 368 if (!urb->actual_length)
400 dbg("acm_rx_tasklet: ACM not ready");
401 return; 369 return;
402 }
403
404 spin_lock_irqsave(&acm->throttle_lock, flags);
405 throttled = acm->throttle;
406 spin_unlock_irqrestore(&acm->throttle_lock, flags);
407 if (throttled) {
408 dbg("acm_rx_tasklet: throttled");
409 return;
410 }
411 370
412 tty = tty_port_tty_get(&acm->port); 371 tty = tty_port_tty_get(&acm->port);
372 if (!tty)
373 return;
413 374
414next_buffer: 375 tty_insert_flip_string(tty, urb->transfer_buffer, urb->actual_length);
415 spin_lock_irqsave(&acm->read_lock, flags); 376 tty_flip_buffer_push(tty);
416 if (list_empty(&acm->filled_read_bufs)) {
417 spin_unlock_irqrestore(&acm->read_lock, flags);
418 goto urbs;
419 }
420 buf = list_entry(acm->filled_read_bufs.next,
421 struct acm_rb, list);
422 list_del(&buf->list);
423 spin_unlock_irqrestore(&acm->read_lock, flags);
424
425 dbg("acm_rx_tasklet: procesing buf 0x%p, size = %d", buf, buf->size);
426
427 if (tty) {
428 spin_lock_irqsave(&acm->throttle_lock, flags);
429 throttled = acm->throttle;
430 spin_unlock_irqrestore(&acm->throttle_lock, flags);
431 if (!throttled) {
432 tty_insert_flip_string(tty, buf->base, buf->size);
433 tty_flip_buffer_push(tty);
434 } else {
435 tty_kref_put(tty);
436 dbg("Throttling noticed");
437 spin_lock_irqsave(&acm->read_lock, flags);
438 list_add(&buf->list, &acm->filled_read_bufs);
439 spin_unlock_irqrestore(&acm->read_lock, flags);
440 return;
441 }
442 }
443
444 spin_lock_irqsave(&acm->read_lock, flags);
445 list_add(&buf->list, &acm->spare_read_bufs);
446 spin_unlock_irqrestore(&acm->read_lock, flags);
447 goto next_buffer;
448 377
449urbs:
450 tty_kref_put(tty); 378 tty_kref_put(tty);
379}
451 380
452 while (!list_empty(&acm->spare_read_bufs)) { 381static void acm_read_bulk_callback(struct urb *urb)
453 spin_lock_irqsave(&acm->read_lock, flags); 382{
454 if (list_empty(&acm->spare_read_urbs)) { 383 struct acm_rb *rb = urb->context;
455 acm->processing = 0; 384 struct acm *acm = rb->instance;
456 spin_unlock_irqrestore(&acm->read_lock, flags); 385 unsigned long flags;
457 return;
458 }
459 rcv = list_entry(acm->spare_read_urbs.next,
460 struct acm_ru, list);
461 list_del(&rcv->list);
462 spin_unlock_irqrestore(&acm->read_lock, flags);
463 386
464 buf = list_entry(acm->spare_read_bufs.next, 387 dev_vdbg(&acm->data->dev, "%s - urb %d, len %d\n", __func__,
465 struct acm_rb, list); 388 rb->index, urb->actual_length);
466 list_del(&buf->list); 389 set_bit(rb->index, &acm->read_urbs_free);
467 390
468 rcv->buffer = buf; 391 if (!acm->dev) {
392 dev_dbg(&acm->data->dev, "%s - disconnected\n", __func__);
393 return;
394 }
395 usb_mark_last_busy(acm->dev);
469 396
470 if (acm->is_int_ep) 397 if (urb->status) {
471 usb_fill_int_urb(rcv->urb, acm->dev, 398 dev_dbg(&acm->data->dev, "%s - non-zero urb status: %d\n",
472 acm->rx_endpoint, 399 __func__, urb->status);
473 buf->base, 400 return;
474 acm->readsize,
475 acm_read_bulk, rcv, acm->bInterval);
476 else
477 usb_fill_bulk_urb(rcv->urb, acm->dev,
478 acm->rx_endpoint,
479 buf->base,
480 acm->readsize,
481 acm_read_bulk, rcv);
482 rcv->urb->transfer_dma = buf->dma;
483 rcv->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
484
485 /* This shouldn't kill the driver as unsuccessful URBs are
486 returned to the free-urbs-pool and resubmited ASAP */
487 spin_lock_irqsave(&acm->read_lock, flags);
488 if (acm->susp_count ||
489 usb_submit_urb(rcv->urb, GFP_ATOMIC) < 0) {
490 list_add(&buf->list, &acm->spare_read_bufs);
491 list_add(&rcv->list, &acm->spare_read_urbs);
492 acm->processing = 0;
493 spin_unlock_irqrestore(&acm->read_lock, flags);
494 return;
495 } else {
496 spin_unlock_irqrestore(&acm->read_lock, flags);
497 dbg("acm_rx_tasklet: sending urb 0x%p, rcv 0x%p, buf 0x%p", rcv->urb, rcv, buf);
498 }
499 } 401 }
402 acm_process_read_urb(acm, urb);
403
404 /* throttle device if requested by tty */
500 spin_lock_irqsave(&acm->read_lock, flags); 405 spin_lock_irqsave(&acm->read_lock, flags);
501 acm->processing = 0; 406 acm->throttled = acm->throttle_req;
502 spin_unlock_irqrestore(&acm->read_lock, flags); 407 if (!acm->throttled && !acm->susp_count) {
408 spin_unlock_irqrestore(&acm->read_lock, flags);
409 acm_submit_read_urb(acm, rb->index, GFP_ATOMIC);
410 } else {
411 spin_unlock_irqrestore(&acm->read_lock, flags);
412 }
503} 413}
504 414
505/* data interface wrote those outgoing bytes */ 415/* data interface wrote those outgoing bytes */
@@ -509,9 +419,9 @@ static void acm_write_bulk(struct urb *urb)
509 struct acm *acm = wb->instance; 419 struct acm *acm = wb->instance;
510 unsigned long flags; 420 unsigned long flags;
511 421
512 if (verbose || urb->status 422 if (urb->status || (urb->actual_length != urb->transfer_buffer_length))
513 || (urb->actual_length != urb->transfer_buffer_length)) 423 dev_vdbg(&acm->data->dev, "%s - len %d/%d, status %d\n",
514 dev_dbg(&acm->data->dev, "tx %d/%d bytes -- > %d\n", 424 __func__,
515 urb->actual_length, 425 urb->actual_length,
516 urb->transfer_buffer_length, 426 urb->transfer_buffer_length,
517 urb->status); 427 urb->status);
@@ -521,8 +431,6 @@ static void acm_write_bulk(struct urb *urb)
521 spin_unlock_irqrestore(&acm->write_lock, flags); 431 spin_unlock_irqrestore(&acm->write_lock, flags);
522 if (ACM_READY(acm)) 432 if (ACM_READY(acm))
523 schedule_work(&acm->work); 433 schedule_work(&acm->work);
524 else
525 wake_up_interruptible(&acm->drain_wait);
526} 434}
527 435
528static void acm_softint(struct work_struct *work) 436static void acm_softint(struct work_struct *work)
@@ -530,7 +438,8 @@ static void acm_softint(struct work_struct *work)
530 struct acm *acm = container_of(work, struct acm, work); 438 struct acm *acm = container_of(work, struct acm, work);
531 struct tty_struct *tty; 439 struct tty_struct *tty;
532 440
533 dev_vdbg(&acm->data->dev, "tx work\n"); 441 dev_vdbg(&acm->data->dev, "%s\n", __func__);
442
534 if (!ACM_READY(acm)) 443 if (!ACM_READY(acm))
535 return; 444 return;
536 tty = tty_port_tty_get(&acm->port); 445 tty = tty_port_tty_get(&acm->port);
@@ -548,8 +457,6 @@ static int acm_tty_open(struct tty_struct *tty, struct file *filp)
548{ 457{
549 struct acm *acm; 458 struct acm *acm;
550 int rv = -ENODEV; 459 int rv = -ENODEV;
551 int i;
552 dbg("Entering acm_tty_open.");
553 460
554 mutex_lock(&open_mutex); 461 mutex_lock(&open_mutex);
555 462
@@ -559,6 +466,8 @@ static int acm_tty_open(struct tty_struct *tty, struct file *filp)
559 else 466 else
560 rv = 0; 467 rv = 0;
561 468
469 dev_dbg(&acm->control->dev, "%s\n", __func__);
470
562 set_bit(TTY_NO_WRITE_SPLIT, &tty->flags); 471 set_bit(TTY_NO_WRITE_SPLIT, &tty->flags);
563 472
564 tty->driver_data = acm; 473 tty->driver_data = acm;
@@ -578,38 +487,28 @@ static int acm_tty_open(struct tty_struct *tty, struct file *filp)
578 487
579 acm->ctrlurb->dev = acm->dev; 488 acm->ctrlurb->dev = acm->dev;
580 if (usb_submit_urb(acm->ctrlurb, GFP_KERNEL)) { 489 if (usb_submit_urb(acm->ctrlurb, GFP_KERNEL)) {
581 dbg("usb_submit_urb(ctrl irq) failed"); 490 dev_err(&acm->control->dev,
491 "%s - usb_submit_urb(ctrl irq) failed\n", __func__);
582 goto bail_out; 492 goto bail_out;
583 } 493 }
584 494
585 if (0 > acm_set_control(acm, acm->ctrlout = ACM_CTRL_DTR | ACM_CTRL_RTS) && 495 if (0 > acm_set_control(acm, acm->ctrlout = ACM_CTRL_DTR | ACM_CTRL_RTS) &&
586 (acm->ctrl_caps & USB_CDC_CAP_LINE)) 496 (acm->ctrl_caps & USB_CDC_CAP_LINE))
587 goto full_bailout; 497 goto bail_out;
588 498
589 usb_autopm_put_interface(acm->control); 499 usb_autopm_put_interface(acm->control);
590 500
591 INIT_LIST_HEAD(&acm->spare_read_urbs); 501 if (acm_submit_read_urbs(acm, GFP_KERNEL))
592 INIT_LIST_HEAD(&acm->spare_read_bufs); 502 goto bail_out;
593 INIT_LIST_HEAD(&acm->filled_read_bufs);
594
595 for (i = 0; i < acm->rx_buflimit; i++)
596 list_add(&(acm->ru[i].list), &acm->spare_read_urbs);
597 for (i = 0; i < acm->rx_buflimit; i++)
598 list_add(&(acm->rb[i].list), &acm->spare_read_bufs);
599
600 acm->throttle = 0;
601 503
602 set_bit(ASYNCB_INITIALIZED, &acm->port.flags); 504 set_bit(ASYNCB_INITIALIZED, &acm->port.flags);
603 rv = tty_port_block_til_ready(&acm->port, tty, filp); 505 rv = tty_port_block_til_ready(&acm->port, tty, filp);
604 tasklet_schedule(&acm->urb_task);
605 506
606 mutex_unlock(&acm->mutex); 507 mutex_unlock(&acm->mutex);
607out: 508out:
608 mutex_unlock(&open_mutex); 509 mutex_unlock(&open_mutex);
609 return rv; 510 return rv;
610 511
611full_bailout:
612 usb_kill_urb(acm->ctrlurb);
613bail_out: 512bail_out:
614 acm->port.count--; 513 acm->port.count--;
615 mutex_unlock(&acm->mutex); 514 mutex_unlock(&acm->mutex);
@@ -622,26 +521,24 @@ early_bail:
622 521
623static void acm_tty_unregister(struct acm *acm) 522static void acm_tty_unregister(struct acm *acm)
624{ 523{
625 int i, nr; 524 int i;
626 525
627 nr = acm->rx_buflimit;
628 tty_unregister_device(acm_tty_driver, acm->minor); 526 tty_unregister_device(acm_tty_driver, acm->minor);
629 usb_put_intf(acm->control); 527 usb_put_intf(acm->control);
630 acm_table[acm->minor] = NULL; 528 acm_table[acm->minor] = NULL;
631 usb_free_urb(acm->ctrlurb); 529 usb_free_urb(acm->ctrlurb);
632 for (i = 0; i < ACM_NW; i++) 530 for (i = 0; i < ACM_NW; i++)
633 usb_free_urb(acm->wb[i].urb); 531 usb_free_urb(acm->wb[i].urb);
634 for (i = 0; i < nr; i++) 532 for (i = 0; i < acm->rx_buflimit; i++)
635 usb_free_urb(acm->ru[i].urb); 533 usb_free_urb(acm->read_urbs[i]);
636 kfree(acm->country_codes); 534 kfree(acm->country_codes);
637 kfree(acm); 535 kfree(acm);
638} 536}
639 537
640static int acm_tty_chars_in_buffer(struct tty_struct *tty);
641
642static void acm_port_down(struct acm *acm) 538static void acm_port_down(struct acm *acm)
643{ 539{
644 int i, nr = acm->rx_buflimit; 540 int i;
541
645 mutex_lock(&open_mutex); 542 mutex_lock(&open_mutex);
646 if (acm->dev) { 543 if (acm->dev) {
647 usb_autopm_get_interface(acm->control); 544 usb_autopm_get_interface(acm->control);
@@ -649,10 +546,8 @@ static void acm_port_down(struct acm *acm)
649 usb_kill_urb(acm->ctrlurb); 546 usb_kill_urb(acm->ctrlurb);
650 for (i = 0; i < ACM_NW; i++) 547 for (i = 0; i < ACM_NW; i++)
651 usb_kill_urb(acm->wb[i].urb); 548 usb_kill_urb(acm->wb[i].urb);
652 tasklet_disable(&acm->urb_task); 549 for (i = 0; i < acm->rx_buflimit; i++)
653 for (i = 0; i < nr; i++) 550 usb_kill_urb(acm->read_urbs[i]);
654 usb_kill_urb(acm->ru[i].urb);
655 tasklet_enable(&acm->urb_task);
656 acm->control->needs_remote_wakeup = 0; 551 acm->control->needs_remote_wakeup = 0;
657 usb_autopm_put_interface(acm->control); 552 usb_autopm_put_interface(acm->control);
658 } 553 }
@@ -698,13 +593,13 @@ static int acm_tty_write(struct tty_struct *tty,
698 int wbn; 593 int wbn;
699 struct acm_wb *wb; 594 struct acm_wb *wb;
700 595
701 dbg("Entering acm_tty_write to write %d bytes,", count);
702
703 if (!ACM_READY(acm)) 596 if (!ACM_READY(acm))
704 return -EINVAL; 597 return -EINVAL;
705 if (!count) 598 if (!count)
706 return 0; 599 return 0;
707 600
601 dev_vdbg(&acm->data->dev, "%s - count %d\n", __func__, count);
602
708 spin_lock_irqsave(&acm->write_lock, flags); 603 spin_lock_irqsave(&acm->write_lock, flags);
709 wbn = acm_wb_alloc(acm); 604 wbn = acm_wb_alloc(acm);
710 if (wbn < 0) { 605 if (wbn < 0) {
@@ -714,7 +609,7 @@ static int acm_tty_write(struct tty_struct *tty,
714 wb = &acm->wb[wbn]; 609 wb = &acm->wb[wbn];
715 610
716 count = (count > acm->writesize) ? acm->writesize : count; 611 count = (count > acm->writesize) ? acm->writesize : count;
717 dbg("Get %d bytes...", count); 612 dev_vdbg(&acm->data->dev, "%s - write %d\n", __func__, count);
718 memcpy(wb->buf, buf, count); 613 memcpy(wb->buf, buf, count);
719 wb->len = count; 614 wb->len = count;
720 spin_unlock_irqrestore(&acm->write_lock, flags); 615 spin_unlock_irqrestore(&acm->write_lock, flags);
@@ -751,22 +646,31 @@ static int acm_tty_chars_in_buffer(struct tty_struct *tty)
751static void acm_tty_throttle(struct tty_struct *tty) 646static void acm_tty_throttle(struct tty_struct *tty)
752{ 647{
753 struct acm *acm = tty->driver_data; 648 struct acm *acm = tty->driver_data;
649
754 if (!ACM_READY(acm)) 650 if (!ACM_READY(acm))
755 return; 651 return;
756 spin_lock_bh(&acm->throttle_lock); 652
757 acm->throttle = 1; 653 spin_lock_irq(&acm->read_lock);
758 spin_unlock_bh(&acm->throttle_lock); 654 acm->throttle_req = 1;
655 spin_unlock_irq(&acm->read_lock);
759} 656}
760 657
761static void acm_tty_unthrottle(struct tty_struct *tty) 658static void acm_tty_unthrottle(struct tty_struct *tty)
762{ 659{
763 struct acm *acm = tty->driver_data; 660 struct acm *acm = tty->driver_data;
661 unsigned int was_throttled;
662
764 if (!ACM_READY(acm)) 663 if (!ACM_READY(acm))
765 return; 664 return;
766 spin_lock_bh(&acm->throttle_lock); 665
767 acm->throttle = 0; 666 spin_lock_irq(&acm->read_lock);
768 spin_unlock_bh(&acm->throttle_lock); 667 was_throttled = acm->throttled;
769 tasklet_schedule(&acm->urb_task); 668 acm->throttled = 0;
669 acm->throttle_req = 0;
670 spin_unlock_irq(&acm->read_lock);
671
672 if (was_throttled)
673 acm_submit_read_urbs(acm, GFP_KERNEL);
770} 674}
771 675
772static int acm_tty_break_ctl(struct tty_struct *tty, int state) 676static int acm_tty_break_ctl(struct tty_struct *tty, int state)
@@ -777,7 +681,8 @@ static int acm_tty_break_ctl(struct tty_struct *tty, int state)
777 return -EINVAL; 681 return -EINVAL;
778 retval = acm_send_break(acm, state ? 0xffff : 0); 682 retval = acm_send_break(acm, state ? 0xffff : 0);
779 if (retval < 0) 683 if (retval < 0)
780 dbg("send break failed"); 684 dev_dbg(&acm->control->dev, "%s - send break failed\n",
685 __func__);
781 return retval; 686 return retval;
782} 687}
783 688
@@ -872,7 +777,9 @@ static void acm_tty_set_termios(struct tty_struct *tty,
872 777
873 if (memcmp(&acm->line, &newline, sizeof newline)) { 778 if (memcmp(&acm->line, &newline, sizeof newline)) {
874 memcpy(&acm->line, &newline, sizeof newline); 779 memcpy(&acm->line, &newline, sizeof newline);
875 dbg("set line: %d %d %d %d", le32_to_cpu(newline.dwDTERate), 780 dev_dbg(&acm->control->dev, "%s - set line: %d %d %d %d\n",
781 __func__,
782 le32_to_cpu(newline.dwDTERate),
876 newline.bCharFormat, newline.bParityType, 783 newline.bCharFormat, newline.bParityType,
877 newline.bDataBits); 784 newline.bDataBits);
878 acm_set_line(acm, &acm->line); 785 acm_set_line(acm, &acm->line);
@@ -897,11 +804,11 @@ static void acm_write_buffers_free(struct acm *acm)
897static void acm_read_buffers_free(struct acm *acm) 804static void acm_read_buffers_free(struct acm *acm)
898{ 805{
899 struct usb_device *usb_dev = interface_to_usbdev(acm->control); 806 struct usb_device *usb_dev = interface_to_usbdev(acm->control);
900 int i, n = acm->rx_buflimit; 807 int i;
901 808
902 for (i = 0; i < n; i++) 809 for (i = 0; i < acm->rx_buflimit; i++)
903 usb_free_coherent(usb_dev, acm->readsize, 810 usb_free_coherent(usb_dev, acm->readsize,
904 acm->rb[i].base, acm->rb[i].dma); 811 acm->read_buffers[i].base, acm->read_buffers[i].dma);
905} 812}
906 813
907/* Little helper: write buffers allocate */ 814/* Little helper: write buffers allocate */
@@ -1133,7 +1040,7 @@ skip_normal_probe:
1133 epwrite = t; 1040 epwrite = t;
1134 } 1041 }
1135made_compressed_probe: 1042made_compressed_probe:
1136 dbg("interfaces are valid"); 1043 dev_dbg(&intf->dev, "interfaces are valid\n");
1137 for (minor = 0; minor < ACM_TTY_MINORS && acm_table[minor]; minor++); 1044 for (minor = 0; minor < ACM_TTY_MINORS && acm_table[minor]; minor++);
1138 1045
1139 if (minor == ACM_TTY_MINORS) { 1046 if (minor == ACM_TTY_MINORS) {
@@ -1143,7 +1050,7 @@ made_compressed_probe:
1143 1050
1144 acm = kzalloc(sizeof(struct acm), GFP_KERNEL); 1051 acm = kzalloc(sizeof(struct acm), GFP_KERNEL);
1145 if (acm == NULL) { 1052 if (acm == NULL) {
1146 dev_dbg(&intf->dev, "out of memory (acm kzalloc)\n"); 1053 dev_err(&intf->dev, "out of memory (acm kzalloc)\n");
1147 goto alloc_fail; 1054 goto alloc_fail;
1148 } 1055 }
1149 1056
@@ -1162,11 +1069,7 @@ made_compressed_probe:
1162 acm->ctrlsize = ctrlsize; 1069 acm->ctrlsize = ctrlsize;
1163 acm->readsize = readsize; 1070 acm->readsize = readsize;
1164 acm->rx_buflimit = num_rx_buf; 1071 acm->rx_buflimit = num_rx_buf;
1165 acm->urb_task.func = acm_rx_tasklet;
1166 acm->urb_task.data = (unsigned long) acm;
1167 INIT_WORK(&acm->work, acm_softint); 1072 INIT_WORK(&acm->work, acm_softint);
1168 init_waitqueue_head(&acm->drain_wait);
1169 spin_lock_init(&acm->throttle_lock);
1170 spin_lock_init(&acm->write_lock); 1073 spin_lock_init(&acm->write_lock);
1171 spin_lock_init(&acm->read_lock); 1074 spin_lock_init(&acm->read_lock);
1172 mutex_init(&acm->mutex); 1075 mutex_init(&acm->mutex);
@@ -1179,53 +1082,69 @@ made_compressed_probe:
1179 1082
1180 buf = usb_alloc_coherent(usb_dev, ctrlsize, GFP_KERNEL, &acm->ctrl_dma); 1083 buf = usb_alloc_coherent(usb_dev, ctrlsize, GFP_KERNEL, &acm->ctrl_dma);
1181 if (!buf) { 1084 if (!buf) {
1182 dev_dbg(&intf->dev, "out of memory (ctrl buffer alloc)\n"); 1085 dev_err(&intf->dev, "out of memory (ctrl buffer alloc)\n");
1183 goto alloc_fail2; 1086 goto alloc_fail2;
1184 } 1087 }
1185 acm->ctrl_buffer = buf; 1088 acm->ctrl_buffer = buf;
1186 1089
1187 if (acm_write_buffers_alloc(acm) < 0) { 1090 if (acm_write_buffers_alloc(acm) < 0) {
1188 dev_dbg(&intf->dev, "out of memory (write buffer alloc)\n"); 1091 dev_err(&intf->dev, "out of memory (write buffer alloc)\n");
1189 goto alloc_fail4; 1092 goto alloc_fail4;
1190 } 1093 }
1191 1094
1192 acm->ctrlurb = usb_alloc_urb(0, GFP_KERNEL); 1095 acm->ctrlurb = usb_alloc_urb(0, GFP_KERNEL);
1193 if (!acm->ctrlurb) { 1096 if (!acm->ctrlurb) {
1194 dev_dbg(&intf->dev, "out of memory (ctrlurb kmalloc)\n"); 1097 dev_err(&intf->dev, "out of memory (ctrlurb kmalloc)\n");
1195 goto alloc_fail5; 1098 goto alloc_fail5;
1196 } 1099 }
1197 for (i = 0; i < num_rx_buf; i++) { 1100 for (i = 0; i < num_rx_buf; i++) {
1198 struct acm_ru *rcv = &(acm->ru[i]); 1101 struct acm_rb *rb = &(acm->read_buffers[i]);
1102 struct urb *urb;
1199 1103
1200 rcv->urb = usb_alloc_urb(0, GFP_KERNEL); 1104 rb->base = usb_alloc_coherent(acm->dev, readsize, GFP_KERNEL,
1201 if (rcv->urb == NULL) { 1105 &rb->dma);
1202 dev_dbg(&intf->dev, 1106 if (!rb->base) {
1203 "out of memory (read urbs usb_alloc_urb)\n"); 1107 dev_err(&intf->dev, "out of memory "
1108 "(read bufs usb_alloc_coherent)\n");
1204 goto alloc_fail6; 1109 goto alloc_fail6;
1205 } 1110 }
1111 rb->index = i;
1112 rb->instance = acm;
1206 1113
1207 rcv->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; 1114 urb = usb_alloc_urb(0, GFP_KERNEL);
1208 rcv->instance = acm; 1115 if (!urb) {
1209 } 1116 dev_err(&intf->dev,
1210 for (i = 0; i < num_rx_buf; i++) { 1117 "out of memory (read urbs usb_alloc_urb)\n");
1211 struct acm_rb *rb = &(acm->rb[i]); 1118 goto alloc_fail6;
1212 1119 }
1213 rb->base = usb_alloc_coherent(acm->dev, readsize, 1120 urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
1214 GFP_KERNEL, &rb->dma); 1121 urb->transfer_dma = rb->dma;
1215 if (!rb->base) { 1122 if (acm->is_int_ep) {
1216 dev_dbg(&intf->dev, 1123 usb_fill_int_urb(urb, acm->dev,
1217 "out of memory (read bufs usb_alloc_coherent)\n"); 1124 acm->rx_endpoint,
1218 goto alloc_fail7; 1125 rb->base,
1126 acm->readsize,
1127 acm_read_bulk_callback, rb,
1128 acm->bInterval);
1129 } else {
1130 usb_fill_bulk_urb(urb, acm->dev,
1131 acm->rx_endpoint,
1132 rb->base,
1133 acm->readsize,
1134 acm_read_bulk_callback, rb);
1219 } 1135 }
1136
1137 acm->read_urbs[i] = urb;
1138 __set_bit(i, &acm->read_urbs_free);
1220 } 1139 }
1221 for (i = 0; i < ACM_NW; i++) { 1140 for (i = 0; i < ACM_NW; i++) {
1222 struct acm_wb *snd = &(acm->wb[i]); 1141 struct acm_wb *snd = &(acm->wb[i]);
1223 1142
1224 snd->urb = usb_alloc_urb(0, GFP_KERNEL); 1143 snd->urb = usb_alloc_urb(0, GFP_KERNEL);
1225 if (snd->urb == NULL) { 1144 if (snd->urb == NULL) {
1226 dev_dbg(&intf->dev, 1145 dev_err(&intf->dev,
1227 "out of memory (write urbs usb_alloc_urb)"); 1146 "out of memory (write urbs usb_alloc_urb)\n");
1228 goto alloc_fail8; 1147 goto alloc_fail7;
1229 } 1148 }
1230 1149
1231 if (usb_endpoint_xfer_int(epwrite)) 1150 if (usb_endpoint_xfer_int(epwrite))
@@ -1244,7 +1163,7 @@ made_compressed_probe:
1244 1163
1245 i = device_create_file(&intf->dev, &dev_attr_bmCapabilities); 1164 i = device_create_file(&intf->dev, &dev_attr_bmCapabilities);
1246 if (i < 0) 1165 if (i < 0)
1247 goto alloc_fail8; 1166 goto alloc_fail7;
1248 1167
1249 if (cfd) { /* export the country data */ 1168 if (cfd) { /* export the country data */
1250 acm->country_codes = kmalloc(cfd->bLength - 4, GFP_KERNEL); 1169 acm->country_codes = kmalloc(cfd->bLength - 4, GFP_KERNEL);
@@ -1296,14 +1215,13 @@ skip_countries:
1296 acm_table[minor] = acm; 1215 acm_table[minor] = acm;
1297 1216
1298 return 0; 1217 return 0;
1299alloc_fail8: 1218alloc_fail7:
1300 for (i = 0; i < ACM_NW; i++) 1219 for (i = 0; i < ACM_NW; i++)
1301 usb_free_urb(acm->wb[i].urb); 1220 usb_free_urb(acm->wb[i].urb);
1302alloc_fail7:
1303 acm_read_buffers_free(acm);
1304alloc_fail6: 1221alloc_fail6:
1305 for (i = 0; i < num_rx_buf; i++) 1222 for (i = 0; i < num_rx_buf; i++)
1306 usb_free_urb(acm->ru[i].urb); 1223 usb_free_urb(acm->read_urbs[i]);
1224 acm_read_buffers_free(acm);
1307 usb_free_urb(acm->ctrlurb); 1225 usb_free_urb(acm->ctrlurb);
1308alloc_fail5: 1226alloc_fail5:
1309 acm_write_buffers_free(acm); 1227 acm_write_buffers_free(acm);
@@ -1318,17 +1236,14 @@ alloc_fail:
1318static void stop_data_traffic(struct acm *acm) 1236static void stop_data_traffic(struct acm *acm)
1319{ 1237{
1320 int i; 1238 int i;
1321 dbg("Entering stop_data_traffic");
1322 1239
1323 tasklet_disable(&acm->urb_task); 1240 dev_dbg(&acm->control->dev, "%s\n", __func__);
1324 1241
1325 usb_kill_urb(acm->ctrlurb); 1242 usb_kill_urb(acm->ctrlurb);
1326 for (i = 0; i < ACM_NW; i++) 1243 for (i = 0; i < ACM_NW; i++)
1327 usb_kill_urb(acm->wb[i].urb); 1244 usb_kill_urb(acm->wb[i].urb);
1328 for (i = 0; i < acm->rx_buflimit; i++) 1245 for (i = 0; i < acm->rx_buflimit; i++)
1329 usb_kill_urb(acm->ru[i].urb); 1246 usb_kill_urb(acm->read_urbs[i]);
1330
1331 tasklet_enable(&acm->urb_task);
1332 1247
1333 cancel_work_sync(&acm->work); 1248 cancel_work_sync(&acm->work);
1334} 1249}
@@ -1389,11 +1304,9 @@ static int acm_suspend(struct usb_interface *intf, pm_message_t message)
1389 if (message.event & PM_EVENT_AUTO) { 1304 if (message.event & PM_EVENT_AUTO) {
1390 int b; 1305 int b;
1391 1306
1392 spin_lock_irq(&acm->read_lock); 1307 spin_lock_irq(&acm->write_lock);
1393 spin_lock(&acm->write_lock); 1308 b = acm->transmitting;
1394 b = acm->processing + acm->transmitting; 1309 spin_unlock_irq(&acm->write_lock);
1395 spin_unlock(&acm->write_lock);
1396 spin_unlock_irq(&acm->read_lock);
1397 if (b) 1310 if (b)
1398 return -EBUSY; 1311 return -EBUSY;
1399 } 1312 }
@@ -1455,7 +1368,7 @@ static int acm_resume(struct usb_interface *intf)
1455 if (rv < 0) 1368 if (rv < 0)
1456 goto err_out; 1369 goto err_out;
1457 1370
1458 tasklet_schedule(&acm->urb_task); 1371 rv = acm_submit_read_urbs(acm, GFP_NOIO);
1459 } 1372 }
1460 1373
1461err_out: 1374err_out:
@@ -1716,8 +1629,7 @@ static int __init acm_init(void)
1716 return retval; 1629 return retval;
1717 } 1630 }
1718 1631
1719 printk(KERN_INFO KBUILD_MODNAME ": " DRIVER_VERSION ":" 1632 printk(KERN_INFO KBUILD_MODNAME ": " DRIVER_DESC "\n");
1720 DRIVER_DESC "\n");
1721 1633
1722 return 0; 1634 return 0;
1723} 1635}
diff --git a/drivers/usb/class/cdc-acm.h b/drivers/usb/class/cdc-acm.h
index b4ea54dbf323..7b5c0bd07f80 100644
--- a/drivers/usb/class/cdc-acm.h
+++ b/drivers/usb/class/cdc-acm.h
@@ -72,16 +72,10 @@ struct acm_wb {
72}; 72};
73 73
74struct acm_rb { 74struct acm_rb {
75 struct list_head list;
76 int size; 75 int size;
77 unsigned char *base; 76 unsigned char *base;
78 dma_addr_t dma; 77 dma_addr_t dma;
79}; 78 int index;
80
81struct acm_ru {
82 struct list_head list;
83 struct acm_rb *buffer;
84 struct urb *urb;
85 struct acm *instance; 79 struct acm *instance;
86}; 80};
87 81
@@ -97,35 +91,30 @@ struct acm {
97 unsigned int country_code_size; /* size of this buffer */ 91 unsigned int country_code_size; /* size of this buffer */
98 unsigned int country_rel_date; /* release date of version */ 92 unsigned int country_rel_date; /* release date of version */
99 struct acm_wb wb[ACM_NW]; 93 struct acm_wb wb[ACM_NW];
100 struct acm_ru ru[ACM_NR]; 94 unsigned long read_urbs_free;
101 struct acm_rb rb[ACM_NR]; 95 struct urb *read_urbs[ACM_NR];
96 struct acm_rb read_buffers[ACM_NR];
102 int rx_buflimit; 97 int rx_buflimit;
103 int rx_endpoint; 98 int rx_endpoint;
104 spinlock_t read_lock; 99 spinlock_t read_lock;
105 struct list_head spare_read_urbs;
106 struct list_head spare_read_bufs;
107 struct list_head filled_read_bufs;
108 int write_used; /* number of non-empty write buffers */ 100 int write_used; /* number of non-empty write buffers */
109 int processing;
110 int transmitting; 101 int transmitting;
111 spinlock_t write_lock; 102 spinlock_t write_lock;
112 struct mutex mutex; 103 struct mutex mutex;
113 struct usb_cdc_line_coding line; /* bits, stop, parity */ 104 struct usb_cdc_line_coding line; /* bits, stop, parity */
114 struct work_struct work; /* work queue entry for line discipline waking up */ 105 struct work_struct work; /* work queue entry for line discipline waking up */
115 wait_queue_head_t drain_wait; /* close processing */
116 struct tasklet_struct urb_task; /* rx processing */
117 spinlock_t throttle_lock; /* synchronize throtteling and read callback */
118 unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */ 106 unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */
119 unsigned int ctrlout; /* output control lines (DTR, RTS) */ 107 unsigned int ctrlout; /* output control lines (DTR, RTS) */
120 unsigned int writesize; /* max packet size for the output bulk endpoint */ 108 unsigned int writesize; /* max packet size for the output bulk endpoint */
121 unsigned int readsize,ctrlsize; /* buffer sizes for freeing */ 109 unsigned int readsize,ctrlsize; /* buffer sizes for freeing */
122 unsigned int minor; /* acm minor number */ 110 unsigned int minor; /* acm minor number */
123 unsigned char throttle; /* throttled by tty layer */
124 unsigned char clocal; /* termios CLOCAL */ 111 unsigned char clocal; /* termios CLOCAL */
125 unsigned int ctrl_caps; /* control capabilities from the class specific header */ 112 unsigned int ctrl_caps; /* control capabilities from the class specific header */
126 unsigned int susp_count; /* number of suspended interfaces */ 113 unsigned int susp_count; /* number of suspended interfaces */
127 unsigned int combined_interfaces:1; /* control and data collapsed */ 114 unsigned int combined_interfaces:1; /* control and data collapsed */
128 unsigned int is_int_ep:1; /* interrupt endpoints contrary to spec used */ 115 unsigned int is_int_ep:1; /* interrupt endpoints contrary to spec used */
116 unsigned int throttled:1; /* actually throttled */
117 unsigned int throttle_req:1; /* throttle requested */
129 u8 bInterval; 118 u8 bInterval;
130 struct acm_wb *delayed_wb; /* write queued for a device about to be woken */ 119 struct acm_wb *delayed_wb; /* write queued for a device about to be woken */
131}; 120};
diff --git a/drivers/usb/class/cdc-wdm.c b/drivers/usb/class/cdc-wdm.c
index a97c018dd419..2b9ff518b509 100644
--- a/drivers/usb/class/cdc-wdm.c
+++ b/drivers/usb/class/cdc-wdm.c
@@ -542,6 +542,8 @@ static int wdm_open(struct inode *inode, struct file *file)
542 542
543 mutex_lock(&desc->lock); 543 mutex_lock(&desc->lock);
544 if (!desc->count++) { 544 if (!desc->count++) {
545 desc->werr = 0;
546 desc->rerr = 0;
545 rv = usb_submit_urb(desc->validity, GFP_KERNEL); 547 rv = usb_submit_urb(desc->validity, GFP_KERNEL);
546 if (rv < 0) { 548 if (rv < 0) {
547 desc->count--; 549 desc->count--;
@@ -853,6 +855,18 @@ static int wdm_pre_reset(struct usb_interface *intf)
853 struct wdm_device *desc = usb_get_intfdata(intf); 855 struct wdm_device *desc = usb_get_intfdata(intf);
854 856
855 mutex_lock(&desc->lock); 857 mutex_lock(&desc->lock);
858 kill_urbs(desc);
859
860 /*
861 * we notify everybody using poll of
862 * an exceptional situation
863 * must be done before recovery lest a spontaneous
864 * message from the device is lost
865 */
866 spin_lock_irq(&desc->iuspin);
867 desc->rerr = -EINTR;
868 spin_unlock_irq(&desc->iuspin);
869 wake_up_all(&desc->wait);
856 return 0; 870 return 0;
857} 871}
858 872
diff --git a/drivers/usb/core/config.c b/drivers/usb/core/config.c
index 83126b03e7cf..c962608b4b9a 100644
--- a/drivers/usb/core/config.c
+++ b/drivers/usb/core/config.c
@@ -129,7 +129,7 @@ static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
129 max_tx = ep->desc.wMaxPacketSize * (desc->bMaxBurst + 1); 129 max_tx = ep->desc.wMaxPacketSize * (desc->bMaxBurst + 1);
130 else 130 else
131 max_tx = 999999; 131 max_tx = 999999;
132 if (desc->wBytesPerInterval > max_tx) { 132 if (le16_to_cpu(desc->wBytesPerInterval) > max_tx) {
133 dev_warn(ddev, "%s endpoint with wBytesPerInterval of %d in " 133 dev_warn(ddev, "%s endpoint with wBytesPerInterval of %d in "
134 "config %d interface %d altsetting %d ep %d: " 134 "config %d interface %d altsetting %d ep %d: "
135 "setting to %d\n", 135 "setting to %d\n",
diff --git a/drivers/usb/core/devices.c b/drivers/usb/core/devices.c
index 96fdfb815f89..0149c0976e9c 100644
--- a/drivers/usb/core/devices.c
+++ b/drivers/usb/core/devices.c
@@ -64,49 +64,49 @@
64/* Define ALLOW_SERIAL_NUMBER if you want to see the serial number of devices */ 64/* Define ALLOW_SERIAL_NUMBER if you want to see the serial number of devices */
65#define ALLOW_SERIAL_NUMBER 65#define ALLOW_SERIAL_NUMBER
66 66
67static const char *format_topo = 67static const char format_topo[] =
68/* T: Bus=dd Lev=dd Prnt=dd Port=dd Cnt=dd Dev#=ddd Spd=dddd MxCh=dd */ 68/* T: Bus=dd Lev=dd Prnt=dd Port=dd Cnt=dd Dev#=ddd Spd=dddd MxCh=dd */
69"\nT: Bus=%2.2d Lev=%2.2d Prnt=%2.2d Port=%2.2d Cnt=%2.2d Dev#=%3d Spd=%-4s MxCh=%2d\n"; 69"\nT: Bus=%2.2d Lev=%2.2d Prnt=%2.2d Port=%2.2d Cnt=%2.2d Dev#=%3d Spd=%-4s MxCh=%2d\n";
70 70
71static const char *format_string_manufacturer = 71static const char format_string_manufacturer[] =
72/* S: Manufacturer=xxxx */ 72/* S: Manufacturer=xxxx */
73 "S: Manufacturer=%.100s\n"; 73 "S: Manufacturer=%.100s\n";
74 74
75static const char *format_string_product = 75static const char format_string_product[] =
76/* S: Product=xxxx */ 76/* S: Product=xxxx */
77 "S: Product=%.100s\n"; 77 "S: Product=%.100s\n";
78 78
79#ifdef ALLOW_SERIAL_NUMBER 79#ifdef ALLOW_SERIAL_NUMBER
80static const char *format_string_serialnumber = 80static const char format_string_serialnumber[] =
81/* S: SerialNumber=xxxx */ 81/* S: SerialNumber=xxxx */
82 "S: SerialNumber=%.100s\n"; 82 "S: SerialNumber=%.100s\n";
83#endif 83#endif
84 84
85static const char *format_bandwidth = 85static const char format_bandwidth[] =
86/* B: Alloc=ddd/ddd us (xx%), #Int=ddd, #Iso=ddd */ 86/* B: Alloc=ddd/ddd us (xx%), #Int=ddd, #Iso=ddd */
87 "B: Alloc=%3d/%3d us (%2d%%), #Int=%3d, #Iso=%3d\n"; 87 "B: Alloc=%3d/%3d us (%2d%%), #Int=%3d, #Iso=%3d\n";
88 88
89static const char *format_device1 = 89static const char format_device1[] =
90/* D: Ver=xx.xx Cls=xx(sssss) Sub=xx Prot=xx MxPS=dd #Cfgs=dd */ 90/* D: Ver=xx.xx Cls=xx(sssss) Sub=xx Prot=xx MxPS=dd #Cfgs=dd */
91 "D: Ver=%2x.%02x Cls=%02x(%-5s) Sub=%02x Prot=%02x MxPS=%2d #Cfgs=%3d\n"; 91 "D: Ver=%2x.%02x Cls=%02x(%-5s) Sub=%02x Prot=%02x MxPS=%2d #Cfgs=%3d\n";
92 92
93static const char *format_device2 = 93static const char format_device2[] =
94/* P: Vendor=xxxx ProdID=xxxx Rev=xx.xx */ 94/* P: Vendor=xxxx ProdID=xxxx Rev=xx.xx */
95 "P: Vendor=%04x ProdID=%04x Rev=%2x.%02x\n"; 95 "P: Vendor=%04x ProdID=%04x Rev=%2x.%02x\n";
96 96
97static const char *format_config = 97static const char format_config[] =
98/* C: #Ifs=dd Cfg#=dd Atr=xx MPwr=dddmA */ 98/* C: #Ifs=dd Cfg#=dd Atr=xx MPwr=dddmA */
99 "C:%c #Ifs=%2d Cfg#=%2d Atr=%02x MxPwr=%3dmA\n"; 99 "C:%c #Ifs=%2d Cfg#=%2d Atr=%02x MxPwr=%3dmA\n";
100 100
101static const char *format_iad = 101static const char format_iad[] =
102/* A: FirstIf#=dd IfCount=dd Cls=xx(sssss) Sub=xx Prot=xx */ 102/* A: FirstIf#=dd IfCount=dd Cls=xx(sssss) Sub=xx Prot=xx */
103 "A: FirstIf#=%2d IfCount=%2d Cls=%02x(%-5s) Sub=%02x Prot=%02x\n"; 103 "A: FirstIf#=%2d IfCount=%2d Cls=%02x(%-5s) Sub=%02x Prot=%02x\n";
104 104
105static const char *format_iface = 105static const char format_iface[] =
106/* I: If#=dd Alt=dd #EPs=dd Cls=xx(sssss) Sub=xx Prot=xx Driver=xxxx*/ 106/* I: If#=dd Alt=dd #EPs=dd Cls=xx(sssss) Sub=xx Prot=xx Driver=xxxx*/
107 "I:%c If#=%2d Alt=%2d #EPs=%2d Cls=%02x(%-5s) Sub=%02x Prot=%02x Driver=%s\n"; 107 "I:%c If#=%2d Alt=%2d #EPs=%2d Cls=%02x(%-5s) Sub=%02x Prot=%02x Driver=%s\n";
108 108
109static const char *format_endpt = 109static const char format_endpt[] =
110/* E: Ad=xx(s) Atr=xx(ssss) MxPS=dddd Ivl=D?s */ 110/* E: Ad=xx(s) Atr=xx(ssss) MxPS=dddd Ivl=D?s */
111 "E: Ad=%02x(%c) Atr=%02x(%-4s) MxPS=%4d Ivl=%d%cs\n"; 111 "E: Ad=%02x(%c) Atr=%02x(%-4s) MxPS=%4d Ivl=%d%cs\n";
112 112
diff --git a/drivers/usb/core/file.c b/drivers/usb/core/file.c
index cf6a5423de09..99458c843d60 100644
--- a/drivers/usb/core/file.c
+++ b/drivers/usb/core/file.c
@@ -236,13 +236,6 @@ EXPORT_SYMBOL_GPL(usb_register_dev);
236void usb_deregister_dev(struct usb_interface *intf, 236void usb_deregister_dev(struct usb_interface *intf,
237 struct usb_class_driver *class_driver) 237 struct usb_class_driver *class_driver)
238{ 238{
239 int minor_base = class_driver->minor_base;
240 char name[20];
241
242#ifdef CONFIG_USB_DYNAMIC_MINORS
243 minor_base = 0;
244#endif
245
246 if (intf->minor == -1) 239 if (intf->minor == -1)
247 return; 240 return;
248 241
@@ -252,7 +245,6 @@ void usb_deregister_dev(struct usb_interface *intf,
252 usb_minors[intf->minor] = NULL; 245 usb_minors[intf->minor] = NULL;
253 up_write(&minor_rwsem); 246 up_write(&minor_rwsem);
254 247
255 snprintf(name, sizeof(name), class_driver->name, intf->minor - minor_base);
256 device_destroy(usb_class->class, MKDEV(USB_MAJOR, intf->minor)); 248 device_destroy(usb_class->class, MKDEV(USB_MAJOR, intf->minor));
257 intf->usb_dev = NULL; 249 intf->usb_dev = NULL;
258 intf->minor = -1; 250 intf->minor = -1;
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
index 77a7faec8d78..10936ba9c42b 100644
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
@@ -2407,6 +2407,7 @@ int usb_add_hcd(struct usb_hcd *hcd,
2407 rhdev->speed = USB_SPEED_SUPER; 2407 rhdev->speed = USB_SPEED_SUPER;
2408 break; 2408 break;
2409 default: 2409 default:
2410 retval = -EINVAL;
2410 goto err_set_rh_speed; 2411 goto err_set_rh_speed;
2411 } 2412 }
2412 2413
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 93720bdc9efd..79a58c3a2e2a 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -379,15 +379,6 @@ static int hub_port_status(struct usb_hub *hub, int port1,
379 *status = le16_to_cpu(hub->status->port.wPortStatus); 379 *status = le16_to_cpu(hub->status->port.wPortStatus);
380 *change = le16_to_cpu(hub->status->port.wPortChange); 380 *change = le16_to_cpu(hub->status->port.wPortChange);
381 381
382 if ((hub->hdev->parent != NULL) &&
383 hub_is_superspeed(hub->hdev)) {
384 /* Translate the USB 3 port status */
385 u16 tmp = *status & USB_SS_PORT_STAT_MASK;
386 if (*status & USB_SS_PORT_STAT_POWER)
387 tmp |= USB_PORT_STAT_POWER;
388 *status = tmp;
389 }
390
391 ret = 0; 382 ret = 0;
392 } 383 }
393 mutex_unlock(&hub->status_mutex); 384 mutex_unlock(&hub->status_mutex);
@@ -2160,11 +2151,76 @@ static int hub_port_reset(struct usb_hub *hub, int port1,
2160 return status; 2151 return status;
2161} 2152}
2162 2153
2154/* Warm reset a USB3 protocol port */
2155static int hub_port_warm_reset(struct usb_hub *hub, int port)
2156{
2157 int ret;
2158 u16 portstatus, portchange;
2159
2160 if (!hub_is_superspeed(hub->hdev)) {
2161 dev_err(hub->intfdev, "only USB3 hub support warm reset\n");
2162 return -EINVAL;
2163 }
2164
2165 /* Warm reset the port */
2166 ret = set_port_feature(hub->hdev,
2167 port, USB_PORT_FEAT_BH_PORT_RESET);
2168 if (ret) {
2169 dev_err(hub->intfdev, "cannot warm reset port %d\n", port);
2170 return ret;
2171 }
2172
2173 msleep(20);
2174 ret = hub_port_status(hub, port, &portstatus, &portchange);
2175
2176 if (portchange & USB_PORT_STAT_C_RESET)
2177 clear_port_feature(hub->hdev, port, USB_PORT_FEAT_C_RESET);
2178
2179 if (portchange & USB_PORT_STAT_C_BH_RESET)
2180 clear_port_feature(hub->hdev, port,
2181 USB_PORT_FEAT_C_BH_PORT_RESET);
2182
2183 if (portchange & USB_PORT_STAT_C_LINK_STATE)
2184 clear_port_feature(hub->hdev, port,
2185 USB_PORT_FEAT_C_PORT_LINK_STATE);
2186
2187 return ret;
2188}
2189
2190/* Check if a port is power on */
2191static int port_is_power_on(struct usb_hub *hub, unsigned portstatus)
2192{
2193 int ret = 0;
2194
2195 if (hub_is_superspeed(hub->hdev)) {
2196 if (portstatus & USB_SS_PORT_STAT_POWER)
2197 ret = 1;
2198 } else {
2199 if (portstatus & USB_PORT_STAT_POWER)
2200 ret = 1;
2201 }
2202
2203 return ret;
2204}
2205
2163#ifdef CONFIG_PM 2206#ifdef CONFIG_PM
2164 2207
2165#define MASK_BITS (USB_PORT_STAT_POWER | USB_PORT_STAT_CONNECTION | \ 2208/* Check if a port is suspended(USB2.0 port) or in U3 state(USB3.0 port) */
2166 USB_PORT_STAT_SUSPEND) 2209static int port_is_suspended(struct usb_hub *hub, unsigned portstatus)
2167#define WANT_BITS (USB_PORT_STAT_POWER | USB_PORT_STAT_CONNECTION) 2210{
2211 int ret = 0;
2212
2213 if (hub_is_superspeed(hub->hdev)) {
2214 if ((portstatus & USB_PORT_STAT_LINK_STATE)
2215 == USB_SS_PORT_LS_U3)
2216 ret = 1;
2217 } else {
2218 if (portstatus & USB_PORT_STAT_SUSPEND)
2219 ret = 1;
2220 }
2221
2222 return ret;
2223}
2168 2224
2169/* Determine whether the device on a port is ready for a normal resume, 2225/* Determine whether the device on a port is ready for a normal resume,
2170 * is ready for a reset-resume, or should be disconnected. 2226 * is ready for a reset-resume, or should be disconnected.
@@ -2174,7 +2230,9 @@ static int check_port_resume_type(struct usb_device *udev,
2174 int status, unsigned portchange, unsigned portstatus) 2230 int status, unsigned portchange, unsigned portstatus)
2175{ 2231{
2176 /* Is the device still present? */ 2232 /* Is the device still present? */
2177 if (status || (portstatus & MASK_BITS) != WANT_BITS) { 2233 if (status || port_is_suspended(hub, portstatus) ||
2234 !port_is_power_on(hub, portstatus) ||
2235 !(portstatus & USB_PORT_STAT_CONNECTION)) {
2178 if (status >= 0) 2236 if (status >= 0)
2179 status = -ENODEV; 2237 status = -ENODEV;
2180 } 2238 }
@@ -2285,14 +2343,10 @@ int usb_port_suspend(struct usb_device *udev, pm_message_t msg)
2285 } 2343 }
2286 2344
2287 /* see 7.1.7.6 */ 2345 /* see 7.1.7.6 */
2288 /* Clear PORT_POWER if it's a USB3.0 device connected to USB 3.0 2346 if (hub_is_superspeed(hub->hdev))
2289 * external hub. 2347 status = set_port_feature(hub->hdev,
2290 * FIXME: this is a temporary workaround to make the system able 2348 port1 | (USB_SS_PORT_LS_U3 << 3),
2291 * to suspend/resume. 2349 USB_PORT_FEAT_LINK_STATE);
2292 */
2293 if ((hub->hdev->parent != NULL) && hub_is_superspeed(hub->hdev))
2294 status = clear_port_feature(hub->hdev, port1,
2295 USB_PORT_FEAT_POWER);
2296 else 2350 else
2297 status = set_port_feature(hub->hdev, port1, 2351 status = set_port_feature(hub->hdev, port1,
2298 USB_PORT_FEAT_SUSPEND); 2352 USB_PORT_FEAT_SUSPEND);
@@ -2439,7 +2493,7 @@ int usb_port_resume(struct usb_device *udev, pm_message_t msg)
2439 2493
2440 /* Skip the initial Clear-Suspend step for a remote wakeup */ 2494 /* Skip the initial Clear-Suspend step for a remote wakeup */
2441 status = hub_port_status(hub, port1, &portstatus, &portchange); 2495 status = hub_port_status(hub, port1, &portstatus, &portchange);
2442 if (status == 0 && !(portstatus & USB_PORT_STAT_SUSPEND)) 2496 if (status == 0 && !port_is_suspended(hub, portstatus))
2443 goto SuspendCleared; 2497 goto SuspendCleared;
2444 2498
2445 // dev_dbg(hub->intfdev, "resume port %d\n", port1); 2499 // dev_dbg(hub->intfdev, "resume port %d\n", port1);
@@ -2447,8 +2501,13 @@ int usb_port_resume(struct usb_device *udev, pm_message_t msg)
2447 set_bit(port1, hub->busy_bits); 2501 set_bit(port1, hub->busy_bits);
2448 2502
2449 /* see 7.1.7.7; affects power usage, but not budgeting */ 2503 /* see 7.1.7.7; affects power usage, but not budgeting */
2450 status = clear_port_feature(hub->hdev, 2504 if (hub_is_superspeed(hub->hdev))
2451 port1, USB_PORT_FEAT_SUSPEND); 2505 status = set_port_feature(hub->hdev,
2506 port1 | (USB_SS_PORT_LS_U0 << 3),
2507 USB_PORT_FEAT_LINK_STATE);
2508 else
2509 status = clear_port_feature(hub->hdev,
2510 port1, USB_PORT_FEAT_SUSPEND);
2452 if (status) { 2511 if (status) {
2453 dev_dbg(hub->intfdev, "can't resume port %d, status %d\n", 2512 dev_dbg(hub->intfdev, "can't resume port %d, status %d\n",
2454 port1, status); 2513 port1, status);
@@ -2470,9 +2529,15 @@ int usb_port_resume(struct usb_device *udev, pm_message_t msg)
2470 2529
2471 SuspendCleared: 2530 SuspendCleared:
2472 if (status == 0) { 2531 if (status == 0) {
2473 if (portchange & USB_PORT_STAT_C_SUSPEND) 2532 if (hub_is_superspeed(hub->hdev)) {
2474 clear_port_feature(hub->hdev, port1, 2533 if (portchange & USB_PORT_STAT_C_LINK_STATE)
2475 USB_PORT_FEAT_C_SUSPEND); 2534 clear_port_feature(hub->hdev, port1,
2535 USB_PORT_FEAT_C_PORT_LINK_STATE);
2536 } else {
2537 if (portchange & USB_PORT_STAT_C_SUSPEND)
2538 clear_port_feature(hub->hdev, port1,
2539 USB_PORT_FEAT_C_SUSPEND);
2540 }
2476 } 2541 }
2477 2542
2478 clear_bit(port1, hub->busy_bits); 2543 clear_bit(port1, hub->busy_bits);
@@ -3147,7 +3212,7 @@ static void hub_port_connect_change(struct usb_hub *hub, int port1,
3147 3212
3148 /* maybe switch power back on (e.g. root hub was reset) */ 3213 /* maybe switch power back on (e.g. root hub was reset) */
3149 if ((wHubCharacteristics & HUB_CHAR_LPSM) < 2 3214 if ((wHubCharacteristics & HUB_CHAR_LPSM) < 2
3150 && !(portstatus & USB_PORT_STAT_POWER)) 3215 && !port_is_power_on(hub, portstatus))
3151 set_port_feature(hdev, port1, USB_PORT_FEAT_POWER); 3216 set_port_feature(hdev, port1, USB_PORT_FEAT_POWER);
3152 3217
3153 if (portstatus & USB_PORT_STAT_ENABLE) 3218 if (portstatus & USB_PORT_STAT_ENABLE)
@@ -3490,6 +3555,16 @@ static void hub_events(void)
3490 USB_PORT_FEAT_C_PORT_CONFIG_ERROR); 3555 USB_PORT_FEAT_C_PORT_CONFIG_ERROR);
3491 } 3556 }
3492 3557
3558 /* Warm reset a USB3 protocol port if it's in
3559 * SS.Inactive state.
3560 */
3561 if (hub_is_superspeed(hub->hdev) &&
3562 (portstatus & USB_PORT_STAT_LINK_STATE)
3563 == USB_SS_PORT_LS_SS_INACTIVE) {
3564 dev_dbg(hub_dev, "warm reset port %d\n", i);
3565 hub_port_warm_reset(hub, i);
3566 }
3567
3493 if (connect_change) 3568 if (connect_change)
3494 hub_port_connect_change(hub, i, 3569 hub_port_connect_change(hub, i,
3495 portstatus, portchange); 3570 portstatus, portchange);
diff --git a/drivers/usb/core/sysfs.c b/drivers/usb/core/sysfs.c
index 6781c369ce2d..cf05b97693ea 100644
--- a/drivers/usb/core/sysfs.c
+++ b/drivers/usb/core/sysfs.c
@@ -842,22 +842,19 @@ const struct attribute_group *usb_interface_groups[] = {
842 NULL 842 NULL
843}; 843};
844 844
845int usb_create_sysfs_intf_files(struct usb_interface *intf) 845void usb_create_sysfs_intf_files(struct usb_interface *intf)
846{ 846{
847 struct usb_device *udev = interface_to_usbdev(intf); 847 struct usb_device *udev = interface_to_usbdev(intf);
848 struct usb_host_interface *alt = intf->cur_altsetting; 848 struct usb_host_interface *alt = intf->cur_altsetting;
849 int retval;
850 849
851 if (intf->sysfs_files_created || intf->unregistering) 850 if (intf->sysfs_files_created || intf->unregistering)
852 return 0; 851 return;
853 852
854 if (alt->string == NULL && 853 if (!alt->string && !(udev->quirks & USB_QUIRK_CONFIG_INTF_STRINGS))
855 !(udev->quirks & USB_QUIRK_CONFIG_INTF_STRINGS))
856 alt->string = usb_cache_string(udev, alt->desc.iInterface); 854 alt->string = usb_cache_string(udev, alt->desc.iInterface);
857 if (alt->string) 855 if (alt->string && device_create_file(&intf->dev, &dev_attr_interface))
858 retval = device_create_file(&intf->dev, &dev_attr_interface); 856 ; /* We don't actually care if the function fails. */
859 intf->sysfs_files_created = 1; 857 intf->sysfs_files_created = 1;
860 return 0;
861} 858}
862 859
863void usb_remove_sysfs_intf_files(struct usb_interface *intf) 860void usb_remove_sysfs_intf_files(struct usb_interface *intf)
diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c
index d9d4b169404f..8706fc97e60f 100644
--- a/drivers/usb/core/usb.c
+++ b/drivers/usb/core/usb.c
@@ -953,8 +953,7 @@ static int usb_bus_notify(struct notifier_block *nb, unsigned long action,
953 if (dev->type == &usb_device_type) 953 if (dev->type == &usb_device_type)
954 (void) usb_create_sysfs_dev_files(to_usb_device(dev)); 954 (void) usb_create_sysfs_dev_files(to_usb_device(dev));
955 else if (dev->type == &usb_if_device_type) 955 else if (dev->type == &usb_if_device_type)
956 (void) usb_create_sysfs_intf_files( 956 usb_create_sysfs_intf_files(to_usb_interface(dev));
957 to_usb_interface(dev));
958 break; 957 break;
959 958
960 case BUS_NOTIFY_DEL_DEVICE: 959 case BUS_NOTIFY_DEL_DEVICE:
diff --git a/drivers/usb/core/usb.h b/drivers/usb/core/usb.h
index d450b742137e..d44d4b7bbf17 100644
--- a/drivers/usb/core/usb.h
+++ b/drivers/usb/core/usb.h
@@ -4,7 +4,7 @@
4 4
5extern int usb_create_sysfs_dev_files(struct usb_device *dev); 5extern int usb_create_sysfs_dev_files(struct usb_device *dev);
6extern void usb_remove_sysfs_dev_files(struct usb_device *dev); 6extern void usb_remove_sysfs_dev_files(struct usb_device *dev);
7extern int usb_create_sysfs_intf_files(struct usb_interface *intf); 7extern void usb_create_sysfs_intf_files(struct usb_interface *intf);
8extern void usb_remove_sysfs_intf_files(struct usb_interface *intf); 8extern void usb_remove_sysfs_intf_files(struct usb_interface *intf);
9extern int usb_create_ep_devs(struct device *parent, 9extern int usb_create_ep_devs(struct device *parent,
10 struct usb_host_endpoint *endpoint, 10 struct usb_host_endpoint *endpoint,
diff --git a/drivers/usb/early/ehci-dbgp.c b/drivers/usb/early/ehci-dbgp.c
index a6a350f5827b..1fc8f1249806 100644
--- a/drivers/usb/early/ehci-dbgp.c
+++ b/drivers/usb/early/ehci-dbgp.c
@@ -102,6 +102,9 @@ static struct kgdb_io kgdbdbgp_io_ops;
102#define dbgp_kgdb_mode (0) 102#define dbgp_kgdb_mode (0)
103#endif 103#endif
104 104
105/* Local version of HC_LENGTH macro as ehci struct is not available here */
106#define EARLY_HC_LENGTH(p) (0x00ff & (p)) /* bits 7 : 0 */
107
105/* 108/*
106 * USB Packet IDs (PIDs) 109 * USB Packet IDs (PIDs)
107 */ 110 */
@@ -892,7 +895,7 @@ int __init early_dbgp_init(char *s)
892 dbgp_printk("ehci_bar: %p\n", ehci_bar); 895 dbgp_printk("ehci_bar: %p\n", ehci_bar);
893 896
894 ehci_caps = ehci_bar; 897 ehci_caps = ehci_bar;
895 ehci_regs = ehci_bar + HC_LENGTH(readl(&ehci_caps->hc_capbase)); 898 ehci_regs = ehci_bar + EARLY_HC_LENGTH(readl(&ehci_caps->hc_capbase));
896 ehci_debug = ehci_bar + offset; 899 ehci_debug = ehci_bar + offset;
897 ehci_dev.bus = bus; 900 ehci_dev.bus = bus;
898 ehci_dev.slot = slot; 901 ehci_dev.slot = slot;
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index bc5123cf41c2..4c02b9f1597e 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -260,6 +260,24 @@ config USB_R8A66597
260 default USB_GADGET 260 default USB_GADGET
261 select USB_GADGET_SELECTED 261 select USB_GADGET_SELECTED
262 262
263config USB_GADGET_RENESAS_USBHS
264 boolean "Renesas USBHS"
265 depends on USB_RENESAS_USBHS
266 select USB_GADGET_DUALSPEED
267 help
268 Renesas USBHS is a discrete USB host and peripheral controller
269 chip that supports both full and high speed USB 2.0 data transfers.
270 platform is able to configure endpoint (pipe) style
271
272 Say "y" to enable the gadget specific portion of the USBHS driver.
273
274
275config USB_RENESAS_USBHS_UDC
276 tristate
277 depends on USB_GADGET_RENESAS_USBHS
278 default USB_GADGET
279 select USB_GADGET_SELECTED
280
263config USB_GADGET_PXA27X 281config USB_GADGET_PXA27X
264 boolean "PXA 27x" 282 boolean "PXA 27x"
265 depends on ARCH_PXA && (PXA27x || PXA3xx) 283 depends on ARCH_PXA && (PXA27x || PXA3xx)
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
index e09178bc1450..baaf87ed7685 100644
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ b/drivers/usb/gadget/ci13xxx_udc.c
@@ -310,7 +310,7 @@ static int hw_device_reset(struct ci13xxx *udc)
310 udc->udc_driver->notify_event(udc, 310 udc->udc_driver->notify_event(udc,
311 CI13XXX_CONTROLLER_RESET_EVENT); 311 CI13XXX_CONTROLLER_RESET_EVENT);
312 312
313 if (udc->udc_driver->flags && CI13XXX_DISABLE_STREAMING) 313 if (udc->udc_driver->flags & CI13XXX_DISABLE_STREAMING)
314 hw_cwrite(CAP_USBMODE, USBMODE_SDIS, USBMODE_SDIS); 314 hw_cwrite(CAP_USBMODE, USBMODE_SDIS, USBMODE_SDIS);
315 315
316 /* USBMODE should be configured step by step */ 316 /* USBMODE should be configured step by step */
@@ -1634,8 +1634,6 @@ static int _gadget_stop_activity(struct usb_gadget *gadget)
1634 gadget_for_each_ep(ep, gadget) { 1634 gadget_for_each_ep(ep, gadget) {
1635 usb_ep_disable(ep); 1635 usb_ep_disable(ep);
1636 } 1636 }
1637 usb_ep_disable(&udc->ep0out.ep);
1638 usb_ep_disable(&udc->ep0in.ep);
1639 1637
1640 if (udc->status != NULL) { 1638 if (udc->status != NULL) {
1641 usb_ep_free_request(&udc->ep0in.ep, udc->status); 1639 usb_ep_free_request(&udc->ep0in.ep, udc->status);
@@ -1678,18 +1676,10 @@ __acquires(udc->lock)
1678 if (retval) 1676 if (retval)
1679 goto done; 1677 goto done;
1680 1678
1681 retval = usb_ep_enable(&udc->ep0out.ep, &ctrl_endpt_out_desc); 1679 udc->status = usb_ep_alloc_request(&udc->ep0in.ep, GFP_ATOMIC);
1682 if (retval) 1680 if (udc->status == NULL)
1683 goto done; 1681 retval = -ENOMEM;
1684 1682
1685 retval = usb_ep_enable(&udc->ep0in.ep, &ctrl_endpt_in_desc);
1686 if (!retval) {
1687 udc->status = usb_ep_alloc_request(&udc->ep0in.ep, GFP_ATOMIC);
1688 if (udc->status == NULL) {
1689 usb_ep_disable(&udc->ep0out.ep);
1690 retval = -ENOMEM;
1691 }
1692 }
1693 spin_lock(udc->lock); 1683 spin_lock(udc->lock);
1694 1684
1695 done: 1685 done:
@@ -1843,7 +1833,8 @@ __releases(mEp->lock)
1843__acquires(mEp->lock) 1833__acquires(mEp->lock)
1844{ 1834{
1845 struct ci13xxx_req *mReq, *mReqTemp; 1835 struct ci13xxx_req *mReq, *mReqTemp;
1846 int retval; 1836 struct ci13xxx_ep *mEpTemp = mEp;
1837 int uninitialized_var(retval);
1847 1838
1848 trace("%p", mEp); 1839 trace("%p", mEp);
1849 1840
@@ -1859,12 +1850,15 @@ __acquires(mEp->lock)
1859 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval); 1850 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
1860 if (mReq->req.complete != NULL) { 1851 if (mReq->req.complete != NULL) {
1861 spin_unlock(mEp->lock); 1852 spin_unlock(mEp->lock);
1862 mReq->req.complete(&mEp->ep, &mReq->req); 1853 if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
1854 mReq->req.length)
1855 mEpTemp = &_udc->ep0in;
1856 mReq->req.complete(&mEpTemp->ep, &mReq->req);
1863 spin_lock(mEp->lock); 1857 spin_lock(mEp->lock);
1864 } 1858 }
1865 } 1859 }
1866 1860
1867 if (retval == EBUSY) 1861 if (retval == -EBUSY)
1868 retval = 0; 1862 retval = 0;
1869 if (retval < 0) 1863 if (retval < 0)
1870 dbg_event(_usb_addr(mEp), "DONE", retval); 1864 dbg_event(_usb_addr(mEp), "DONE", retval);
@@ -1894,7 +1888,7 @@ __acquires(udc->lock)
1894 1888
1895 for (i = 0; i < hw_ep_max; i++) { 1889 for (i = 0; i < hw_ep_max; i++) {
1896 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i]; 1890 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1897 int type, num, err = -EINVAL; 1891 int type, num, dir, err = -EINVAL;
1898 struct usb_ctrlrequest req; 1892 struct usb_ctrlrequest req;
1899 1893
1900 if (mEp->desc == NULL) 1894 if (mEp->desc == NULL)
@@ -1952,7 +1946,10 @@ __acquires(udc->lock)
1952 if (req.wLength != 0) 1946 if (req.wLength != 0)
1953 break; 1947 break;
1954 num = le16_to_cpu(req.wIndex); 1948 num = le16_to_cpu(req.wIndex);
1949 dir = num & USB_ENDPOINT_DIR_MASK;
1955 num &= USB_ENDPOINT_NUMBER_MASK; 1950 num &= USB_ENDPOINT_NUMBER_MASK;
1951 if (dir) /* TX */
1952 num += hw_ep_max/2;
1956 if (!udc->ci13xxx_ep[num].wedge) { 1953 if (!udc->ci13xxx_ep[num].wedge) {
1957 spin_unlock(udc->lock); 1954 spin_unlock(udc->lock);
1958 err = usb_ep_clear_halt( 1955 err = usb_ep_clear_halt(
@@ -2001,7 +1998,10 @@ __acquires(udc->lock)
2001 if (req.wLength != 0) 1998 if (req.wLength != 0)
2002 break; 1999 break;
2003 num = le16_to_cpu(req.wIndex); 2000 num = le16_to_cpu(req.wIndex);
2001 dir = num & USB_ENDPOINT_DIR_MASK;
2004 num &= USB_ENDPOINT_NUMBER_MASK; 2002 num &= USB_ENDPOINT_NUMBER_MASK;
2003 if (dir) /* TX */
2004 num += hw_ep_max/2;
2005 2005
2006 spin_unlock(udc->lock); 2006 spin_unlock(udc->lock);
2007 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep); 2007 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
@@ -2110,7 +2110,12 @@ static int ep_enable(struct usb_ep *ep,
2110 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT; 2110 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
2111 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */ 2111 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
2112 2112
2113 retval |= hw_ep_enable(mEp->num, mEp->dir, mEp->type); 2113 /*
2114 * Enable endpoints in the HW other than ep0 as ep0
2115 * is always enabled
2116 */
2117 if (mEp->num)
2118 retval |= hw_ep_enable(mEp->num, mEp->dir, mEp->type);
2114 2119
2115 spin_unlock_irqrestore(mEp->lock, flags); 2120 spin_unlock_irqrestore(mEp->lock, flags);
2116 return retval; 2121 return retval;
@@ -2242,11 +2247,15 @@ static int ep_queue(struct usb_ep *ep, struct usb_request *req,
2242 2247
2243 spin_lock_irqsave(mEp->lock, flags); 2248 spin_lock_irqsave(mEp->lock, flags);
2244 2249
2245 if (mEp->type == USB_ENDPOINT_XFER_CONTROL && 2250 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
2246 !list_empty(&mEp->qh.queue)) { 2251 if (req->length)
2247 _ep_nuke(mEp); 2252 mEp = (_udc->ep0_dir == RX) ?
2248 retval = -EOVERFLOW; 2253 &_udc->ep0out : &_udc->ep0in;
2249 warn("endpoint ctrl %X nuked", _usb_addr(mEp)); 2254 if (!list_empty(&mEp->qh.queue)) {
2255 _ep_nuke(mEp);
2256 retval = -EOVERFLOW;
2257 warn("endpoint ctrl %X nuked", _usb_addr(mEp));
2258 }
2250 } 2259 }
2251 2260
2252 /* first nuke then test link, e.g. previous status has not sent */ 2261 /* first nuke then test link, e.g. previous status has not sent */
@@ -2497,6 +2506,15 @@ out:
2497 return ret; 2506 return ret;
2498} 2507}
2499 2508
2509static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
2510{
2511 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2512
2513 if (udc->transceiver)
2514 return otg_set_power(udc->transceiver, mA);
2515 return -ENOTSUPP;
2516}
2517
2500/** 2518/**
2501 * Device operations part of the API to the USB controller hardware, 2519 * Device operations part of the API to the USB controller hardware,
2502 * which don't involve endpoints (or i/o) 2520 * which don't involve endpoints (or i/o)
@@ -2505,6 +2523,7 @@ out:
2505static const struct usb_gadget_ops usb_gadget_ops = { 2523static const struct usb_gadget_ops usb_gadget_ops = {
2506 .vbus_session = ci13xxx_vbus_session, 2524 .vbus_session = ci13xxx_vbus_session,
2507 .wakeup = ci13xxx_wakeup, 2525 .wakeup = ci13xxx_wakeup,
2526 .vbus_draw = ci13xxx_vbus_draw,
2508}; 2527};
2509 2528
2510/** 2529/**
@@ -2595,6 +2614,14 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2595 } 2614 }
2596 if (retval) 2615 if (retval)
2597 goto done; 2616 goto done;
2617 spin_unlock_irqrestore(udc->lock, flags);
2618 retval = usb_ep_enable(&udc->ep0out.ep, &ctrl_endpt_out_desc);
2619 if (retval)
2620 return retval;
2621 retval = usb_ep_enable(&udc->ep0in.ep, &ctrl_endpt_in_desc);
2622 if (retval)
2623 return retval;
2624 spin_lock_irqsave(udc->lock, flags);
2598 2625
2599 udc->gadget.ep0 = &udc->ep0in.ep; 2626 udc->gadget.ep0 = &udc->ep0in.ep;
2600 /* bind gadget */ 2627 /* bind gadget */
diff --git a/drivers/usb/gadget/dbgp.c b/drivers/usb/gadget/dbgp.c
index e5ac8a316fec..dbe92ee88477 100644
--- a/drivers/usb/gadget/dbgp.c
+++ b/drivers/usb/gadget/dbgp.c
@@ -261,8 +261,8 @@ static int __init dbgp_configure_endpoints(struct usb_gadget *gadget)
261 o_desc.wMaxPacketSize = 261 o_desc.wMaxPacketSize =
262 __constant_cpu_to_le16(USB_DEBUG_MAX_PACKET_SIZE); 262 __constant_cpu_to_le16(USB_DEBUG_MAX_PACKET_SIZE);
263 263
264 dbg_desc.bDebugInEndpoint = i_desc.bEndpointAddress & 0x7f; 264 dbg_desc.bDebugInEndpoint = i_desc.bEndpointAddress;
265 dbg_desc.bDebugOutEndpoint = o_desc.bEndpointAddress & 0x7f; 265 dbg_desc.bDebugOutEndpoint = o_desc.bEndpointAddress;
266 266
267#ifdef CONFIG_USB_G_DBGP_SERIAL 267#ifdef CONFIG_USB_G_DBGP_SERIAL
268 dbgp.serial->in = dbgp.i_ep; 268 dbgp.serial->in = dbgp.i_ep;
@@ -312,6 +312,7 @@ static int __init dbgp_bind(struct usb_gadget *gadget)
312 312
313 dbgp.req->length = DBGP_REQ_EP0_LEN; 313 dbgp.req->length = DBGP_REQ_EP0_LEN;
314 gadget->ep0->driver_data = gadget; 314 gadget->ep0->driver_data = gadget;
315 device_desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
315 316
316#ifdef CONFIG_USB_G_DBGP_SERIAL 317#ifdef CONFIG_USB_G_DBGP_SERIAL
317 dbgp.serial = kzalloc(sizeof(struct gserial), GFP_KERNEL); 318 dbgp.serial = kzalloc(sizeof(struct gserial), GFP_KERNEL);
@@ -350,9 +351,9 @@ static int dbgp_setup(struct usb_gadget *gadget,
350 u8 request = ctrl->bRequest; 351 u8 request = ctrl->bRequest;
351 u16 value = le16_to_cpu(ctrl->wValue); 352 u16 value = le16_to_cpu(ctrl->wValue);
352 u16 length = le16_to_cpu(ctrl->wLength); 353 u16 length = le16_to_cpu(ctrl->wLength);
353 int err = 0; 354 int err = -EOPNOTSUPP;
354 void *data; 355 void *data = NULL;
355 u16 len; 356 u16 len = 0;
356 357
357 gadget->ep0->driver_data = gadget; 358 gadget->ep0->driver_data = gadget;
358 359
@@ -371,10 +372,9 @@ static int dbgp_setup(struct usb_gadget *gadget,
371 default: 372 default:
372 goto fail; 373 goto fail;
373 } 374 }
375 err = 0;
374 } else if (request == USB_REQ_SET_FEATURE && 376 } else if (request == USB_REQ_SET_FEATURE &&
375 value == USB_DEVICE_DEBUG_MODE) { 377 value == USB_DEVICE_DEBUG_MODE) {
376 len = 0;
377 data = NULL;
378 dev_dbg(&dbgp.gadget->dev, "setup: feat debug\n"); 378 dev_dbg(&dbgp.gadget->dev, "setup: feat debug\n");
379#ifdef CONFIG_USB_G_DBGP_PRINTK 379#ifdef CONFIG_USB_G_DBGP_PRINTK
380 err = dbgp_enable_ep(); 380 err = dbgp_enable_ep();
diff --git a/drivers/usb/gadget/dummy_hcd.c b/drivers/usb/gadget/dummy_hcd.c
index 3214ca375d64..61ff927928ab 100644
--- a/drivers/usb/gadget/dummy_hcd.c
+++ b/drivers/usb/gadget/dummy_hcd.c
@@ -892,10 +892,11 @@ static int dummy_udc_probe (struct platform_device *pdev)
892 return rc; 892 return rc;
893 } 893 }
894 894
895 platform_set_drvdata (pdev, dum);
896 rc = device_create_file (&dum->gadget.dev, &dev_attr_function); 895 rc = device_create_file (&dum->gadget.dev, &dev_attr_function);
897 if (rc < 0) 896 if (rc < 0)
898 device_unregister (&dum->gadget.dev); 897 device_unregister (&dum->gadget.dev);
898 else
899 platform_set_drvdata(pdev, dum);
899 return rc; 900 return rc;
900} 901}
901 902
@@ -1995,11 +1996,29 @@ static int __init init (void)
1995 retval = platform_device_add(the_hcd_pdev); 1996 retval = platform_device_add(the_hcd_pdev);
1996 if (retval < 0) 1997 if (retval < 0)
1997 goto err_add_hcd; 1998 goto err_add_hcd;
1999 if (!the_controller) {
2000 /*
2001 * The hcd was added successfully but its probe function failed
2002 * for some reason.
2003 */
2004 retval = -EINVAL;
2005 goto err_add_udc;
2006 }
1998 retval = platform_device_add(the_udc_pdev); 2007 retval = platform_device_add(the_udc_pdev);
1999 if (retval < 0) 2008 if (retval < 0)
2000 goto err_add_udc; 2009 goto err_add_udc;
2010 if (!platform_get_drvdata(the_udc_pdev)) {
2011 /*
2012 * The udc was added successfully but its probe function failed
2013 * for some reason.
2014 */
2015 retval = -EINVAL;
2016 goto err_probe_udc;
2017 }
2001 return retval; 2018 return retval;
2002 2019
2020err_probe_udc:
2021 platform_device_del(the_udc_pdev);
2003err_add_udc: 2022err_add_udc:
2004 platform_device_del(the_hcd_pdev); 2023 platform_device_del(the_hcd_pdev);
2005err_add_hcd: 2024err_add_hcd:
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 6d8e533949eb..01ae27b60d4c 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -613,6 +613,11 @@ static int fsg_setup(struct usb_function *f,
613 if (!fsg_is_set(fsg->common)) 613 if (!fsg_is_set(fsg->common))
614 return -EOPNOTSUPP; 614 return -EOPNOTSUPP;
615 615
616 ++fsg->common->ep0_req_tag; /* Record arrival of a new request */
617 req->context = NULL;
618 req->length = 0;
619 dump_msg(fsg, "ep0-setup", (u8 *) ctrl, sizeof(*ctrl));
620
616 switch (ctrl->bRequest) { 621 switch (ctrl->bRequest) {
617 622
618 case USB_BULK_RESET_REQUEST: 623 case USB_BULK_RESET_REQUEST:
@@ -1584,37 +1589,6 @@ static int wedge_bulk_in_endpoint(struct fsg_dev *fsg)
1584 return rc; 1589 return rc;
1585} 1590}
1586 1591
1587static int pad_with_zeros(struct fsg_dev *fsg)
1588{
1589 struct fsg_buffhd *bh = fsg->common->next_buffhd_to_fill;
1590 u32 nkeep = bh->inreq->length;
1591 u32 nsend;
1592 int rc;
1593
1594 bh->state = BUF_STATE_EMPTY; /* For the first iteration */
1595 fsg->common->usb_amount_left = nkeep + fsg->common->residue;
1596 while (fsg->common->usb_amount_left > 0) {
1597
1598 /* Wait for the next buffer to be free */
1599 while (bh->state != BUF_STATE_EMPTY) {
1600 rc = sleep_thread(fsg->common);
1601 if (rc)
1602 return rc;
1603 }
1604
1605 nsend = min(fsg->common->usb_amount_left, FSG_BUFLEN);
1606 memset(bh->buf + nkeep, 0, nsend - nkeep);
1607 bh->inreq->length = nsend;
1608 bh->inreq->zero = 0;
1609 start_transfer(fsg, fsg->bulk_in, bh->inreq,
1610 &bh->inreq_busy, &bh->state);
1611 bh = fsg->common->next_buffhd_to_fill = bh->next;
1612 fsg->common->usb_amount_left -= nsend;
1613 nkeep = 0;
1614 }
1615 return 0;
1616}
1617
1618static int throw_away_data(struct fsg_common *common) 1592static int throw_away_data(struct fsg_common *common)
1619{ 1593{
1620 struct fsg_buffhd *bh; 1594 struct fsg_buffhd *bh;
@@ -1702,6 +1676,10 @@ static int finish_reply(struct fsg_common *common)
1702 if (common->data_size == 0) { 1676 if (common->data_size == 0) {
1703 /* Nothing to send */ 1677 /* Nothing to send */
1704 1678
1679 /* Don't know what to do if common->fsg is NULL */
1680 } else if (!fsg_is_set(common)) {
1681 rc = -EIO;
1682
1705 /* If there's no residue, simply send the last buffer */ 1683 /* If there's no residue, simply send the last buffer */
1706 } else if (common->residue == 0) { 1684 } else if (common->residue == 0) {
1707 bh->inreq->zero = 0; 1685 bh->inreq->zero = 0;
@@ -1710,24 +1688,19 @@ static int finish_reply(struct fsg_common *common)
1710 common->next_buffhd_to_fill = bh->next; 1688 common->next_buffhd_to_fill = bh->next;
1711 1689
1712 /* 1690 /*
1713 * For Bulk-only, if we're allowed to stall then send the 1691 * For Bulk-only, mark the end of the data with a short
1714 * short packet and halt the bulk-in endpoint. If we can't 1692 * packet. If we are allowed to stall, halt the bulk-in
1715 * stall, pad out the remaining data with 0's. 1693 * endpoint. (Note: This violates the Bulk-Only Transport
1694 * specification, which requires us to pad the data if we
1695 * don't halt the endpoint. Presumably nobody will mind.)
1716 */ 1696 */
1717 } else if (common->can_stall) { 1697 } else {
1718 bh->inreq->zero = 1; 1698 bh->inreq->zero = 1;
1719 if (!start_in_transfer(common, bh)) 1699 if (!start_in_transfer(common, bh))
1720 /* Don't know what to do if
1721 * common->fsg is NULL */
1722 rc = -EIO; 1700 rc = -EIO;
1723 common->next_buffhd_to_fill = bh->next; 1701 common->next_buffhd_to_fill = bh->next;
1724 if (common->fsg) 1702 if (common->can_stall)
1725 rc = halt_bulk_in_endpoint(common->fsg); 1703 rc = halt_bulk_in_endpoint(common->fsg);
1726 } else if (fsg_is_set(common)) {
1727 rc = pad_with_zeros(common->fsg);
1728 } else {
1729 /* Don't know what to do if common->fsg is NULL */
1730 rc = -EIO;
1731 } 1704 }
1732 break; 1705 break;
1733 1706
@@ -2800,6 +2773,7 @@ static struct fsg_common *fsg_common_init(struct fsg_common *common,
2800 for (i = 0, lcfg = cfg->luns; i < nluns; ++i, ++curlun, ++lcfg) { 2773 for (i = 0, lcfg = cfg->luns; i < nluns; ++i, ++curlun, ++lcfg) {
2801 curlun->cdrom = !!lcfg->cdrom; 2774 curlun->cdrom = !!lcfg->cdrom;
2802 curlun->ro = lcfg->cdrom || lcfg->ro; 2775 curlun->ro = lcfg->cdrom || lcfg->ro;
2776 curlun->initially_ro = curlun->ro;
2803 curlun->removable = lcfg->removable; 2777 curlun->removable = lcfg->removable;
2804 curlun->dev.release = fsg_lun_release; 2778 curlun->dev.release = fsg_lun_release;
2805 curlun->dev.parent = &gadget->dev; 2779 curlun->dev.parent = &gadget->dev;
diff --git a/drivers/usb/gadget/file_storage.c b/drivers/usb/gadget/file_storage.c
index a6eacb59571b..fcfc77c7ad70 100644
--- a/drivers/usb/gadget/file_storage.c
+++ b/drivers/usb/gadget/file_storage.c
@@ -1947,37 +1947,6 @@ static int wedge_bulk_in_endpoint(struct fsg_dev *fsg)
1947 return rc; 1947 return rc;
1948} 1948}
1949 1949
1950static int pad_with_zeros(struct fsg_dev *fsg)
1951{
1952 struct fsg_buffhd *bh = fsg->next_buffhd_to_fill;
1953 u32 nkeep = bh->inreq->length;
1954 u32 nsend;
1955 int rc;
1956
1957 bh->state = BUF_STATE_EMPTY; // For the first iteration
1958 fsg->usb_amount_left = nkeep + fsg->residue;
1959 while (fsg->usb_amount_left > 0) {
1960
1961 /* Wait for the next buffer to be free */
1962 while (bh->state != BUF_STATE_EMPTY) {
1963 rc = sleep_thread(fsg);
1964 if (rc)
1965 return rc;
1966 }
1967
1968 nsend = min(fsg->usb_amount_left, (u32) mod_data.buflen);
1969 memset(bh->buf + nkeep, 0, nsend - nkeep);
1970 bh->inreq->length = nsend;
1971 bh->inreq->zero = 0;
1972 start_transfer(fsg, fsg->bulk_in, bh->inreq,
1973 &bh->inreq_busy, &bh->state);
1974 bh = fsg->next_buffhd_to_fill = bh->next;
1975 fsg->usb_amount_left -= nsend;
1976 nkeep = 0;
1977 }
1978 return 0;
1979}
1980
1981static int throw_away_data(struct fsg_dev *fsg) 1950static int throw_away_data(struct fsg_dev *fsg)
1982{ 1951{
1983 struct fsg_buffhd *bh; 1952 struct fsg_buffhd *bh;
@@ -2082,18 +2051,20 @@ static int finish_reply(struct fsg_dev *fsg)
2082 } 2051 }
2083 } 2052 }
2084 2053
2085 /* For Bulk-only, if we're allowed to stall then send the 2054 /*
2086 * short packet and halt the bulk-in endpoint. If we can't 2055 * For Bulk-only, mark the end of the data with a short
2087 * stall, pad out the remaining data with 0's. */ 2056 * packet. If we are allowed to stall, halt the bulk-in
2057 * endpoint. (Note: This violates the Bulk-Only Transport
2058 * specification, which requires us to pad the data if we
2059 * don't halt the endpoint. Presumably nobody will mind.)
2060 */
2088 else { 2061 else {
2089 if (mod_data.can_stall) { 2062 bh->inreq->zero = 1;
2090 bh->inreq->zero = 1; 2063 start_transfer(fsg, fsg->bulk_in, bh->inreq,
2091 start_transfer(fsg, fsg->bulk_in, bh->inreq, 2064 &bh->inreq_busy, &bh->state);
2092 &bh->inreq_busy, &bh->state); 2065 fsg->next_buffhd_to_fill = bh->next;
2093 fsg->next_buffhd_to_fill = bh->next; 2066 if (mod_data.can_stall)
2094 rc = halt_bulk_in_endpoint(fsg); 2067 rc = halt_bulk_in_endpoint(fsg);
2095 } else
2096 rc = pad_with_zeros(fsg);
2097 } 2068 }
2098 break; 2069 break;
2099 2070
diff --git a/drivers/usb/gadget/fsl_qe_udc.h b/drivers/usb/gadget/fsl_qe_udc.h
index e35e24fd64bb..1da5fb03d218 100644
--- a/drivers/usb/gadget/fsl_qe_udc.h
+++ b/drivers/usb/gadget/fsl_qe_udc.h
@@ -207,7 +207,7 @@ struct qe_frame{
207 207
208/* Frame status field */ 208/* Frame status field */
209/* Receive side */ 209/* Receive side */
210#define FRAME_OK 0x00000000 /* Frame tranmitted or received OK */ 210#define FRAME_OK 0x00000000 /* Frame transmitted or received OK */
211#define FRAME_ERROR 0x80000000 /* Error occurred on frame */ 211#define FRAME_ERROR 0x80000000 /* Error occurred on frame */
212#define START_FRAME_LOST 0x40000000 /* START_FRAME_LOST */ 212#define START_FRAME_LOST 0x40000000 /* START_FRAME_LOST */
213#define END_FRAME_LOST 0x20000000 /* END_FRAME_LOST */ 213#define END_FRAME_LOST 0x20000000 /* END_FRAME_LOST */
diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c
index 07499c1cdcc4..2cd9a60c7f3a 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -1,12 +1,13 @@
1/* 1/*
2 * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved. 2 * Copyright (C) 2004-2007,2011 Freescale Semiconductor, Inc.
3 * All rights reserved.
3 * 4 *
4 * Author: Li Yang <leoli@freescale.com> 5 * Author: Li Yang <leoli@freescale.com>
5 * Jiang Bo <tanya.jiang@freescale.com> 6 * Jiang Bo <tanya.jiang@freescale.com>
6 * 7 *
7 * Description: 8 * Description:
8 * Freescale high-speed USB SOC DR module device controller driver. 9 * Freescale high-speed USB SOC DR module device controller driver.
9 * This can be found on MPC8349E/MPC8313E cpus. 10 * This can be found on MPC8349E/MPC8313E/MPC5121E cpus.
10 * The driver is previously named as mpc_udc. Based on bare board 11 * The driver is previously named as mpc_udc. Based on bare board
11 * code from Dave Liu and Shlomi Gridish. 12 * code from Dave Liu and Shlomi Gridish.
12 * 13 *
@@ -45,6 +46,7 @@
45#include <asm/system.h> 46#include <asm/system.h>
46#include <asm/unaligned.h> 47#include <asm/unaligned.h>
47#include <asm/dma.h> 48#include <asm/dma.h>
49#include <asm/cacheflush.h>
48 50
49#include "fsl_usb2_udc.h" 51#include "fsl_usb2_udc.h"
50 52
@@ -77,12 +79,64 @@ fsl_ep0_desc = {
77static void fsl_ep_fifo_flush(struct usb_ep *_ep); 79static void fsl_ep_fifo_flush(struct usb_ep *_ep);
78 80
79#ifdef CONFIG_PPC32 81#ifdef CONFIG_PPC32
80#define fsl_readl(addr) in_le32(addr) 82/*
81#define fsl_writel(val32, addr) out_le32(addr, val32) 83 * On some SoCs, the USB controller registers can be big or little endian,
82#else 84 * depending on the version of the chip. In order to be able to run the
85 * same kernel binary on 2 different versions of an SoC, the BE/LE decision
86 * must be made at run time. _fsl_readl and fsl_writel are pointers to the
87 * BE or LE readl() and writel() functions, and fsl_readl() and fsl_writel()
88 * call through those pointers. Platform code for SoCs that have BE USB
89 * registers should set pdata->big_endian_mmio flag.
90 *
91 * This also applies to controller-to-cpu accessors for the USB descriptors,
92 * since their endianness is also SoC dependant. Platform code for SoCs that
93 * have BE USB descriptors should set pdata->big_endian_desc flag.
94 */
95static u32 _fsl_readl_be(const unsigned __iomem *p)
96{
97 return in_be32(p);
98}
99
100static u32 _fsl_readl_le(const unsigned __iomem *p)
101{
102 return in_le32(p);
103}
104
105static void _fsl_writel_be(u32 v, unsigned __iomem *p)
106{
107 out_be32(p, v);
108}
109
110static void _fsl_writel_le(u32 v, unsigned __iomem *p)
111{
112 out_le32(p, v);
113}
114
115static u32 (*_fsl_readl)(const unsigned __iomem *p);
116static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
117
118#define fsl_readl(p) (*_fsl_readl)((p))
119#define fsl_writel(v, p) (*_fsl_writel)((v), (p))
120
121static inline u32 cpu_to_hc32(const u32 x)
122{
123 return udc_controller->pdata->big_endian_desc
124 ? (__force u32)cpu_to_be32(x)
125 : (__force u32)cpu_to_le32(x);
126}
127
128static inline u32 hc32_to_cpu(const u32 x)
129{
130 return udc_controller->pdata->big_endian_desc
131 ? be32_to_cpu((__force __be32)x)
132 : le32_to_cpu((__force __le32)x);
133}
134#else /* !CONFIG_PPC32 */
83#define fsl_readl(addr) readl(addr) 135#define fsl_readl(addr) readl(addr)
84#define fsl_writel(val32, addr) writel(val32, addr) 136#define fsl_writel(val32, addr) writel(val32, addr)
85#endif 137#define cpu_to_hc32(x) cpu_to_le32(x)
138#define hc32_to_cpu(x) le32_to_cpu(x)
139#endif /* CONFIG_PPC32 */
86 140
87/******************************************************************** 141/********************************************************************
88 * Internal Used Function 142 * Internal Used Function
@@ -177,7 +231,8 @@ static void nuke(struct fsl_ep *ep, int status)
177 231
178static int dr_controller_setup(struct fsl_udc *udc) 232static int dr_controller_setup(struct fsl_udc *udc)
179{ 233{
180 unsigned int tmp, portctrl; 234 unsigned int tmp, portctrl, ep_num;
235 unsigned int max_no_of_ep;
181#ifndef CONFIG_ARCH_MXC 236#ifndef CONFIG_ARCH_MXC
182 unsigned int ctrl; 237 unsigned int ctrl;
183#endif 238#endif
@@ -226,9 +281,12 @@ static int dr_controller_setup(struct fsl_udc *udc)
226 281
227 /* Set the controller as device mode */ 282 /* Set the controller as device mode */
228 tmp = fsl_readl(&dr_regs->usbmode); 283 tmp = fsl_readl(&dr_regs->usbmode);
284 tmp &= ~USB_MODE_CTRL_MODE_MASK; /* clear mode bits */
229 tmp |= USB_MODE_CTRL_MODE_DEVICE; 285 tmp |= USB_MODE_CTRL_MODE_DEVICE;
230 /* Disable Setup Lockout */ 286 /* Disable Setup Lockout */
231 tmp |= USB_MODE_SETUP_LOCK_OFF; 287 tmp |= USB_MODE_SETUP_LOCK_OFF;
288 if (udc->pdata->es)
289 tmp |= USB_MODE_ES;
232 fsl_writel(tmp, &dr_regs->usbmode); 290 fsl_writel(tmp, &dr_regs->usbmode);
233 291
234 /* Clear the setup status */ 292 /* Clear the setup status */
@@ -242,22 +300,34 @@ static int dr_controller_setup(struct fsl_udc *udc)
242 udc->ep_qh, (int)tmp, 300 udc->ep_qh, (int)tmp,
243 fsl_readl(&dr_regs->endpointlistaddr)); 301 fsl_readl(&dr_regs->endpointlistaddr));
244 302
303 max_no_of_ep = (0x0000001F & fsl_readl(&dr_regs->dccparams));
304 for (ep_num = 1; ep_num < max_no_of_ep; ep_num++) {
305 tmp = fsl_readl(&dr_regs->endptctrl[ep_num]);
306 tmp &= ~(EPCTRL_TX_TYPE | EPCTRL_RX_TYPE);
307 tmp |= (EPCTRL_EP_TYPE_BULK << EPCTRL_TX_EP_TYPE_SHIFT)
308 | (EPCTRL_EP_TYPE_BULK << EPCTRL_RX_EP_TYPE_SHIFT);
309 fsl_writel(tmp, &dr_regs->endptctrl[ep_num]);
310 }
245 /* Config control enable i/o output, cpu endian register */ 311 /* Config control enable i/o output, cpu endian register */
246#ifndef CONFIG_ARCH_MXC 312#ifndef CONFIG_ARCH_MXC
247 ctrl = __raw_readl(&usb_sys_regs->control); 313 if (udc->pdata->have_sysif_regs) {
248 ctrl |= USB_CTRL_IOENB; 314 ctrl = __raw_readl(&usb_sys_regs->control);
249 __raw_writel(ctrl, &usb_sys_regs->control); 315 ctrl |= USB_CTRL_IOENB;
316 __raw_writel(ctrl, &usb_sys_regs->control);
317 }
250#endif 318#endif
251 319
252#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 320#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
253 /* Turn on cache snooping hardware, since some PowerPC platforms 321 /* Turn on cache snooping hardware, since some PowerPC platforms
254 * wholly rely on hardware to deal with cache coherent. */ 322 * wholly rely on hardware to deal with cache coherent. */
255 323
256 /* Setup Snooping for all the 4GB space */ 324 if (udc->pdata->have_sysif_regs) {
257 tmp = SNOOP_SIZE_2GB; /* starts from 0x0, size 2G */ 325 /* Setup Snooping for all the 4GB space */
258 __raw_writel(tmp, &usb_sys_regs->snoop1); 326 tmp = SNOOP_SIZE_2GB; /* starts from 0x0, size 2G */
259 tmp |= 0x80000000; /* starts from 0x8000000, size 2G */ 327 __raw_writel(tmp, &usb_sys_regs->snoop1);
260 __raw_writel(tmp, &usb_sys_regs->snoop2); 328 tmp |= 0x80000000; /* starts from 0x8000000, size 2G */
329 __raw_writel(tmp, &usb_sys_regs->snoop2);
330 }
261#endif 331#endif
262 332
263 return 0; 333 return 0;
@@ -293,6 +363,19 @@ static void dr_controller_stop(struct fsl_udc *udc)
293{ 363{
294 unsigned int tmp; 364 unsigned int tmp;
295 365
366 pr_debug("%s\n", __func__);
367
368 /* if we're in OTG mode, and the Host is currently using the port,
369 * stop now and don't rip the controller out from under the
370 * ehci driver
371 */
372 if (udc->gadget.is_otg) {
373 if (!(fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID)) {
374 pr_debug("udc: Leaving early\n");
375 return;
376 }
377 }
378
296 /* disable all INTR */ 379 /* disable all INTR */
297 fsl_writel(0, &dr_regs->usbintr); 380 fsl_writel(0, &dr_regs->usbintr);
298 381
@@ -318,12 +401,14 @@ static void dr_ep_setup(unsigned char ep_num, unsigned char dir,
318 if (ep_num) 401 if (ep_num)
319 tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST; 402 tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
320 tmp_epctrl |= EPCTRL_TX_ENABLE; 403 tmp_epctrl |= EPCTRL_TX_ENABLE;
404 tmp_epctrl &= ~EPCTRL_TX_TYPE;
321 tmp_epctrl |= ((unsigned int)(ep_type) 405 tmp_epctrl |= ((unsigned int)(ep_type)
322 << EPCTRL_TX_EP_TYPE_SHIFT); 406 << EPCTRL_TX_EP_TYPE_SHIFT);
323 } else { 407 } else {
324 if (ep_num) 408 if (ep_num)
325 tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST; 409 tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
326 tmp_epctrl |= EPCTRL_RX_ENABLE; 410 tmp_epctrl |= EPCTRL_RX_ENABLE;
411 tmp_epctrl &= ~EPCTRL_RX_TYPE;
327 tmp_epctrl |= ((unsigned int)(ep_type) 412 tmp_epctrl |= ((unsigned int)(ep_type)
328 << EPCTRL_RX_EP_TYPE_SHIFT); 413 << EPCTRL_RX_EP_TYPE_SHIFT);
329 } 414 }
@@ -409,7 +494,7 @@ static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
409 if (zlt) 494 if (zlt)
410 tmp |= EP_QUEUE_HEAD_ZLT_SEL; 495 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
411 496
412 p_QH->max_pkt_length = cpu_to_le32(tmp); 497 p_QH->max_pkt_length = cpu_to_hc32(tmp);
413 p_QH->next_dtd_ptr = 1; 498 p_QH->next_dtd_ptr = 1;
414 p_QH->size_ioc_int_sts = 0; 499 p_QH->size_ioc_int_sts = 0;
415} 500}
@@ -546,10 +631,13 @@ static int fsl_ep_disable(struct usb_ep *_ep)
546 /* disable ep on controller */ 631 /* disable ep on controller */
547 ep_num = ep_index(ep); 632 ep_num = ep_index(ep);
548 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]); 633 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
549 if (ep_is_in(ep)) 634 if (ep_is_in(ep)) {
550 epctrl &= ~EPCTRL_TX_ENABLE; 635 epctrl &= ~(EPCTRL_TX_ENABLE | EPCTRL_TX_TYPE);
551 else 636 epctrl |= EPCTRL_EP_TYPE_BULK << EPCTRL_TX_EP_TYPE_SHIFT;
552 epctrl &= ~EPCTRL_RX_ENABLE; 637 } else {
638 epctrl &= ~(EPCTRL_RX_ENABLE | EPCTRL_TX_TYPE);
639 epctrl |= EPCTRL_EP_TYPE_BULK << EPCTRL_RX_EP_TYPE_SHIFT;
640 }
553 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]); 641 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
554 642
555 udc = (struct fsl_udc *)ep->udc; 643 udc = (struct fsl_udc *)ep->udc;
@@ -616,7 +704,7 @@ static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
616 struct fsl_req *lastreq; 704 struct fsl_req *lastreq;
617 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue); 705 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
618 lastreq->tail->next_td_ptr = 706 lastreq->tail->next_td_ptr =
619 cpu_to_le32(req->head->td_dma & DTD_ADDR_MASK); 707 cpu_to_hc32(req->head->td_dma & DTD_ADDR_MASK);
620 /* Read prime bit, if 1 goto done */ 708 /* Read prime bit, if 1 goto done */
621 if (fsl_readl(&dr_regs->endpointprime) & bitmask) 709 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
622 goto out; 710 goto out;
@@ -641,10 +729,10 @@ static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
641 729
642 /* Write dQH next pointer and terminate bit to 0 */ 730 /* Write dQH next pointer and terminate bit to 0 */
643 temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK; 731 temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
644 dQH->next_dtd_ptr = cpu_to_le32(temp); 732 dQH->next_dtd_ptr = cpu_to_hc32(temp);
645 733
646 /* Clear active and halt bit */ 734 /* Clear active and halt bit */
647 temp = cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE 735 temp = cpu_to_hc32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
648 | EP_QUEUE_HEAD_STATUS_HALT)); 736 | EP_QUEUE_HEAD_STATUS_HALT));
649 dQH->size_ioc_int_sts &= temp; 737 dQH->size_ioc_int_sts &= temp;
650 738
@@ -682,17 +770,17 @@ static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
682 770
683 dtd->td_dma = *dma; 771 dtd->td_dma = *dma;
684 /* Clear reserved field */ 772 /* Clear reserved field */
685 swap_temp = cpu_to_le32(dtd->size_ioc_sts); 773 swap_temp = hc32_to_cpu(dtd->size_ioc_sts);
686 swap_temp &= ~DTD_RESERVED_FIELDS; 774 swap_temp &= ~DTD_RESERVED_FIELDS;
687 dtd->size_ioc_sts = cpu_to_le32(swap_temp); 775 dtd->size_ioc_sts = cpu_to_hc32(swap_temp);
688 776
689 /* Init all of buffer page pointers */ 777 /* Init all of buffer page pointers */
690 swap_temp = (u32) (req->req.dma + req->req.actual); 778 swap_temp = (u32) (req->req.dma + req->req.actual);
691 dtd->buff_ptr0 = cpu_to_le32(swap_temp); 779 dtd->buff_ptr0 = cpu_to_hc32(swap_temp);
692 dtd->buff_ptr1 = cpu_to_le32(swap_temp + 0x1000); 780 dtd->buff_ptr1 = cpu_to_hc32(swap_temp + 0x1000);
693 dtd->buff_ptr2 = cpu_to_le32(swap_temp + 0x2000); 781 dtd->buff_ptr2 = cpu_to_hc32(swap_temp + 0x2000);
694 dtd->buff_ptr3 = cpu_to_le32(swap_temp + 0x3000); 782 dtd->buff_ptr3 = cpu_to_hc32(swap_temp + 0x3000);
695 dtd->buff_ptr4 = cpu_to_le32(swap_temp + 0x4000); 783 dtd->buff_ptr4 = cpu_to_hc32(swap_temp + 0x4000);
696 784
697 req->req.actual += *length; 785 req->req.actual += *length;
698 786
@@ -716,7 +804,7 @@ static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
716 if (*is_last && !req->req.no_interrupt) 804 if (*is_last && !req->req.no_interrupt)
717 swap_temp |= DTD_IOC; 805 swap_temp |= DTD_IOC;
718 806
719 dtd->size_ioc_sts = cpu_to_le32(swap_temp); 807 dtd->size_ioc_sts = cpu_to_hc32(swap_temp);
720 808
721 mb(); 809 mb();
722 810
@@ -743,7 +831,7 @@ static int fsl_req_to_dtd(struct fsl_req *req)
743 is_first = 0; 831 is_first = 0;
744 req->head = dtd; 832 req->head = dtd;
745 } else { 833 } else {
746 last_dtd->next_td_ptr = cpu_to_le32(dma); 834 last_dtd->next_td_ptr = cpu_to_hc32(dma);
747 last_dtd->next_td_virt = dtd; 835 last_dtd->next_td_virt = dtd;
748 } 836 }
749 last_dtd = dtd; 837 last_dtd = dtd;
@@ -751,7 +839,7 @@ static int fsl_req_to_dtd(struct fsl_req *req)
751 req->dtd_count++; 839 req->dtd_count++;
752 } while (!is_last); 840 } while (!is_last);
753 841
754 dtd->next_td_ptr = cpu_to_le32(DTD_NEXT_TERMINATE); 842 dtd->next_td_ptr = cpu_to_hc32(DTD_NEXT_TERMINATE);
755 843
756 req->tail = dtd; 844 req->tail = dtd;
757 845
@@ -962,6 +1050,36 @@ out:
962 return status; 1050 return status;
963} 1051}
964 1052
1053static int fsl_ep_fifo_status(struct usb_ep *_ep)
1054{
1055 struct fsl_ep *ep;
1056 struct fsl_udc *udc;
1057 int size = 0;
1058 u32 bitmask;
1059 struct ep_queue_head *d_qh;
1060
1061 ep = container_of(_ep, struct fsl_ep, ep);
1062 if (!_ep || (!ep->desc && ep_index(ep) != 0))
1063 return -ENODEV;
1064
1065 udc = (struct fsl_udc *)ep->udc;
1066
1067 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
1068 return -ESHUTDOWN;
1069
1070 d_qh = &ep->udc->ep_qh[ep_index(ep) * 2 + ep_is_in(ep)];
1071
1072 bitmask = (ep_is_in(ep)) ? (1 << (ep_index(ep) + 16)) :
1073 (1 << (ep_index(ep)));
1074
1075 if (fsl_readl(&dr_regs->endptstatus) & bitmask)
1076 size = (d_qh->size_ioc_int_sts & DTD_PACKET_SIZE)
1077 >> DTD_LENGTH_BIT_POS;
1078
1079 pr_debug("%s %u\n", __func__, size);
1080 return size;
1081}
1082
965static void fsl_ep_fifo_flush(struct usb_ep *_ep) 1083static void fsl_ep_fifo_flush(struct usb_ep *_ep)
966{ 1084{
967 struct fsl_ep *ep; 1085 struct fsl_ep *ep;
@@ -1014,6 +1132,7 @@ static struct usb_ep_ops fsl_ep_ops = {
1014 .dequeue = fsl_ep_dequeue, 1132 .dequeue = fsl_ep_dequeue,
1015 1133
1016 .set_halt = fsl_ep_set_halt, 1134 .set_halt = fsl_ep_set_halt,
1135 .fifo_status = fsl_ep_fifo_status,
1017 .fifo_flush = fsl_ep_fifo_flush, /* flush fifo */ 1136 .fifo_flush = fsl_ep_fifo_flush, /* flush fifo */
1018}; 1137};
1019 1138
@@ -1228,6 +1347,10 @@ static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1228 req = udc->status_req; 1347 req = udc->status_req;
1229 /* Fill in the reqest structure */ 1348 /* Fill in the reqest structure */
1230 *((u16 *) req->req.buf) = cpu_to_le16(tmp); 1349 *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1350
1351 /* flush cache for the req buffer */
1352 flush_dcache_range((u32)req->req.buf, (u32)req->req.buf + 8);
1353
1231 req->ep = ep; 1354 req->ep = ep;
1232 req->req.length = 2; 1355 req->req.length = 2;
1233 req->req.status = -EINPROGRESS; 1356 req->req.status = -EINPROGRESS;
@@ -1280,6 +1403,7 @@ static void setup_received_irq(struct fsl_udc *udc,
1280 /* Status phase from udc */ 1403 /* Status phase from udc */
1281 { 1404 {
1282 int rc = -EOPNOTSUPP; 1405 int rc = -EOPNOTSUPP;
1406 u16 ptc = 0;
1283 1407
1284 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK)) 1408 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1285 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) { 1409 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
@@ -1301,17 +1425,19 @@ static void setup_received_irq(struct fsl_udc *udc,
1301 | USB_TYPE_STANDARD)) { 1425 | USB_TYPE_STANDARD)) {
1302 /* Note: The driver has not include OTG support yet. 1426 /* Note: The driver has not include OTG support yet.
1303 * This will be set when OTG support is added */ 1427 * This will be set when OTG support is added */
1304 if (!gadget_is_otg(&udc->gadget)) 1428 if (wValue == USB_DEVICE_TEST_MODE)
1305 break; 1429 ptc = wIndex >> 8;
1306 else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE) 1430 else if (gadget_is_otg(&udc->gadget)) {
1307 udc->gadget.b_hnp_enable = 1; 1431 if (setup->bRequest ==
1308 else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT) 1432 USB_DEVICE_B_HNP_ENABLE)
1309 udc->gadget.a_hnp_support = 1; 1433 udc->gadget.b_hnp_enable = 1;
1310 else if (setup->bRequest == 1434 else if (setup->bRequest ==
1311 USB_DEVICE_A_ALT_HNP_SUPPORT) 1435 USB_DEVICE_A_HNP_SUPPORT)
1312 udc->gadget.a_alt_hnp_support = 1; 1436 udc->gadget.a_hnp_support = 1;
1313 else 1437 else if (setup->bRequest ==
1314 break; 1438 USB_DEVICE_A_ALT_HNP_SUPPORT)
1439 udc->gadget.a_alt_hnp_support = 1;
1440 }
1315 rc = 0; 1441 rc = 0;
1316 } else 1442 } else
1317 break; 1443 break;
@@ -1320,6 +1446,15 @@ static void setup_received_irq(struct fsl_udc *udc,
1320 if (ep0_prime_status(udc, EP_DIR_IN)) 1446 if (ep0_prime_status(udc, EP_DIR_IN))
1321 ep0stall(udc); 1447 ep0stall(udc);
1322 } 1448 }
1449 if (ptc) {
1450 u32 tmp;
1451
1452 mdelay(10);
1453 tmp = fsl_readl(&dr_regs->portsc1) | (ptc << 16);
1454 fsl_writel(tmp, &dr_regs->portsc1);
1455 printk(KERN_INFO "udc: switch to test mode %d.\n", ptc);
1456 }
1457
1323 return; 1458 return;
1324 } 1459 }
1325 1460
@@ -1394,6 +1529,7 @@ static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1394{ 1529{
1395 u32 temp; 1530 u32 temp;
1396 struct ep_queue_head *qh; 1531 struct ep_queue_head *qh;
1532 struct fsl_usb2_platform_data *pdata = udc->pdata;
1397 1533
1398 qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT]; 1534 qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1399 1535
@@ -1408,7 +1544,16 @@ static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1408 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd); 1544 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1409 1545
1410 /* Copy the setup packet to local buffer */ 1546 /* Copy the setup packet to local buffer */
1411 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8); 1547 if (pdata->le_setup_buf) {
1548 u32 *p = (u32 *)buffer_ptr;
1549 u32 *s = (u32 *)qh->setup_buffer;
1550
1551 /* Convert little endian setup buffer to CPU endian */
1552 *p++ = le32_to_cpu(*s++);
1553 *p = le32_to_cpu(*s);
1554 } else {
1555 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1556 }
1412 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW)); 1557 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1413 1558
1414 /* Clear Setup Tripwire */ 1559 /* Clear Setup Tripwire */
@@ -1432,19 +1577,19 @@ static int process_ep_req(struct fsl_udc *udc, int pipe,
1432 actual = curr_req->req.length; 1577 actual = curr_req->req.length;
1433 1578
1434 for (j = 0; j < curr_req->dtd_count; j++) { 1579 for (j = 0; j < curr_req->dtd_count; j++) {
1435 remaining_length = (le32_to_cpu(curr_td->size_ioc_sts) 1580 remaining_length = (hc32_to_cpu(curr_td->size_ioc_sts)
1436 & DTD_PACKET_SIZE) 1581 & DTD_PACKET_SIZE)
1437 >> DTD_LENGTH_BIT_POS; 1582 >> DTD_LENGTH_BIT_POS;
1438 actual -= remaining_length; 1583 actual -= remaining_length;
1439 1584
1440 if ((errors = le32_to_cpu(curr_td->size_ioc_sts) & 1585 errors = hc32_to_cpu(curr_td->size_ioc_sts);
1441 DTD_ERROR_MASK)) { 1586 if (errors & DTD_ERROR_MASK) {
1442 if (errors & DTD_STATUS_HALTED) { 1587 if (errors & DTD_STATUS_HALTED) {
1443 ERR("dTD error %08x QH=%d\n", errors, pipe); 1588 ERR("dTD error %08x QH=%d\n", errors, pipe);
1444 /* Clear the errors and Halt condition */ 1589 /* Clear the errors and Halt condition */
1445 tmp = le32_to_cpu(curr_qh->size_ioc_int_sts); 1590 tmp = hc32_to_cpu(curr_qh->size_ioc_int_sts);
1446 tmp &= ~errors; 1591 tmp &= ~errors;
1447 curr_qh->size_ioc_int_sts = cpu_to_le32(tmp); 1592 curr_qh->size_ioc_int_sts = cpu_to_hc32(tmp);
1448 status = -EPIPE; 1593 status = -EPIPE;
1449 /* FIXME: continue with next queued TD? */ 1594 /* FIXME: continue with next queued TD? */
1450 1595
@@ -1462,7 +1607,7 @@ static int process_ep_req(struct fsl_udc *udc, int pipe,
1462 ERR("Unknown error has occurred (0x%x)!\n", 1607 ERR("Unknown error has occurred (0x%x)!\n",
1463 errors); 1608 errors);
1464 1609
1465 } else if (le32_to_cpu(curr_td->size_ioc_sts) 1610 } else if (hc32_to_cpu(curr_td->size_ioc_sts)
1466 & DTD_STATUS_ACTIVE) { 1611 & DTD_STATUS_ACTIVE) {
1467 VDBG("Request not complete"); 1612 VDBG("Request not complete");
1468 status = REQ_UNCOMPLETE; 1613 status = REQ_UNCOMPLETE;
@@ -1551,6 +1696,9 @@ static void port_change_irq(struct fsl_udc *udc)
1551{ 1696{
1552 u32 speed; 1697 u32 speed;
1553 1698
1699 if (udc->bus_reset)
1700 udc->bus_reset = 0;
1701
1554 /* Bus resetting is finished */ 1702 /* Bus resetting is finished */
1555 if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) { 1703 if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) {
1556 /* Get the speed */ 1704 /* Get the speed */
@@ -1658,6 +1806,8 @@ static void reset_irq(struct fsl_udc *udc)
1658 1806
1659 if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) { 1807 if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1660 VDBG("Bus reset"); 1808 VDBG("Bus reset");
1809 /* Bus is reseting */
1810 udc->bus_reset = 1;
1661 /* Reset all the queues, include XD, dTD, EP queue 1811 /* Reset all the queues, include XD, dTD, EP queue
1662 * head and TR Queue */ 1812 * head and TR Queue */
1663 reset_queues(udc); 1813 reset_queues(udc);
@@ -1735,6 +1885,7 @@ static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1735 1885
1736 /* Reset Received */ 1886 /* Reset Received */
1737 if (irq_src & USB_STS_RESET) { 1887 if (irq_src & USB_STS_RESET) {
1888 VDBG("reset int");
1738 reset_irq(udc); 1889 reset_irq(udc);
1739 status = IRQ_HANDLED; 1890 status = IRQ_HANDLED;
1740 } 1891 }
@@ -1792,11 +1943,30 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
1792 goto out; 1943 goto out;
1793 } 1944 }
1794 1945
1795 /* Enable DR IRQ reg and Set usbcmd reg Run bit */ 1946 if (udc_controller->transceiver) {
1796 dr_controller_run(udc_controller); 1947 /* Suspend the controller until OTG enable it */
1797 udc_controller->usb_state = USB_STATE_ATTACHED; 1948 udc_controller->stopped = 1;
1798 udc_controller->ep0_state = WAIT_FOR_SETUP; 1949 printk(KERN_INFO "Suspend udc for OTG auto detect\n");
1799 udc_controller->ep0_dir = 0; 1950
1951 /* connect to bus through transceiver */
1952 if (udc_controller->transceiver) {
1953 retval = otg_set_peripheral(udc_controller->transceiver,
1954 &udc_controller->gadget);
1955 if (retval < 0) {
1956 ERR("can't bind to transceiver\n");
1957 driver->unbind(&udc_controller->gadget);
1958 udc_controller->gadget.dev.driver = 0;
1959 udc_controller->driver = 0;
1960 return retval;
1961 }
1962 }
1963 } else {
1964 /* Enable DR IRQ reg and set USBCMD reg Run bit */
1965 dr_controller_run(udc_controller);
1966 udc_controller->usb_state = USB_STATE_ATTACHED;
1967 udc_controller->ep0_state = WAIT_FOR_SETUP;
1968 udc_controller->ep0_dir = 0;
1969 }
1800 printk(KERN_INFO "%s: bind to driver %s\n", 1970 printk(KERN_INFO "%s: bind to driver %s\n",
1801 udc_controller->gadget.name, driver->driver.name); 1971 udc_controller->gadget.name, driver->driver.name);
1802 1972
@@ -2044,16 +2214,18 @@ static int fsl_proc_read(char *page, char **start, off_t off, int count,
2044 next += t; 2214 next += t;
2045 2215
2046#ifndef CONFIG_ARCH_MXC 2216#ifndef CONFIG_ARCH_MXC
2047 tmp_reg = usb_sys_regs->snoop1; 2217 if (udc->pdata->have_sysif_regs) {
2048 t = scnprintf(next, size, "Snoop1 Reg : = [0x%x]\n\n", tmp_reg); 2218 tmp_reg = usb_sys_regs->snoop1;
2049 size -= t; 2219 t = scnprintf(next, size, "Snoop1 Reg : = [0x%x]\n\n", tmp_reg);
2050 next += t; 2220 size -= t;
2221 next += t;
2051 2222
2052 tmp_reg = usb_sys_regs->control; 2223 tmp_reg = usb_sys_regs->control;
2053 t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n", 2224 t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n",
2054 tmp_reg); 2225 tmp_reg);
2055 size -= t; 2226 size -= t;
2056 next += t; 2227 next += t;
2228 }
2057#endif 2229#endif
2058 2230
2059 /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */ 2231 /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
@@ -2233,6 +2405,7 @@ static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2233 */ 2405 */
2234static int __init fsl_udc_probe(struct platform_device *pdev) 2406static int __init fsl_udc_probe(struct platform_device *pdev)
2235{ 2407{
2408 struct fsl_usb2_platform_data *pdata;
2236 struct resource *res; 2409 struct resource *res;
2237 int ret = -ENODEV; 2410 int ret = -ENODEV;
2238 unsigned int i; 2411 unsigned int i;
@@ -2249,20 +2422,35 @@ static int __init fsl_udc_probe(struct platform_device *pdev)
2249 return -ENOMEM; 2422 return -ENOMEM;
2250 } 2423 }
2251 2424
2425 pdata = pdev->dev.platform_data;
2426 udc_controller->pdata = pdata;
2252 spin_lock_init(&udc_controller->lock); 2427 spin_lock_init(&udc_controller->lock);
2253 udc_controller->stopped = 1; 2428 udc_controller->stopped = 1;
2254 2429
2430#ifdef CONFIG_USB_OTG
2431 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
2432 udc_controller->transceiver = otg_get_transceiver();
2433 if (!udc_controller->transceiver) {
2434 ERR("Can't find OTG driver!\n");
2435 ret = -ENODEV;
2436 goto err_kfree;
2437 }
2438 }
2439#endif
2440
2255 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2441 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2256 if (!res) { 2442 if (!res) {
2257 ret = -ENXIO; 2443 ret = -ENXIO;
2258 goto err_kfree; 2444 goto err_kfree;
2259 } 2445 }
2260 2446
2261 if (!request_mem_region(res->start, res->end - res->start + 1, 2447 if (pdata->operating_mode == FSL_USB2_DR_DEVICE) {
2262 driver_name)) { 2448 if (!request_mem_region(res->start, res->end - res->start + 1,
2263 ERR("request mem region for %s failed\n", pdev->name); 2449 driver_name)) {
2264 ret = -EBUSY; 2450 ERR("request mem region for %s failed\n", pdev->name);
2265 goto err_kfree; 2451 ret = -EBUSY;
2452 goto err_kfree;
2453 }
2266 } 2454 }
2267 2455
2268 dr_regs = ioremap(res->start, resource_size(res)); 2456 dr_regs = ioremap(res->start, resource_size(res));
@@ -2271,9 +2459,29 @@ static int __init fsl_udc_probe(struct platform_device *pdev)
2271 goto err_release_mem_region; 2459 goto err_release_mem_region;
2272 } 2460 }
2273 2461
2462 pdata->regs = (void *)dr_regs;
2463
2464 /*
2465 * do platform specific init: check the clock, grab/config pins, etc.
2466 */
2467 if (pdata->init && pdata->init(pdev)) {
2468 ret = -ENODEV;
2469 goto err_iounmap_noclk;
2470 }
2471
2472 /* Set accessors only after pdata->init() ! */
2473 if (pdata->big_endian_mmio) {
2474 _fsl_readl = _fsl_readl_be;
2475 _fsl_writel = _fsl_writel_be;
2476 } else {
2477 _fsl_readl = _fsl_readl_le;
2478 _fsl_writel = _fsl_writel_le;
2479 }
2480
2274#ifndef CONFIG_ARCH_MXC 2481#ifndef CONFIG_ARCH_MXC
2275 usb_sys_regs = (struct usb_sys_interface *) 2482 if (pdata->have_sysif_regs)
2276 ((u32)dr_regs + USB_DR_SYS_OFFSET); 2483 usb_sys_regs = (struct usb_sys_interface *)
2484 ((u32)dr_regs + USB_DR_SYS_OFFSET);
2277#endif 2485#endif
2278 2486
2279 /* Initialize USB clocks */ 2487 /* Initialize USB clocks */
@@ -2313,9 +2521,11 @@ static int __init fsl_udc_probe(struct platform_device *pdev)
2313 goto err_free_irq; 2521 goto err_free_irq;
2314 } 2522 }
2315 2523
2316 /* initialize usb hw reg except for regs for EP, 2524 if (!udc_controller->transceiver) {
2317 * leave usbintr reg untouched */ 2525 /* initialize usb hw reg except for regs for EP,
2318 dr_controller_setup(udc_controller); 2526 * leave usbintr reg untouched */
2527 dr_controller_setup(udc_controller);
2528 }
2319 2529
2320 fsl_udc_clk_finalize(pdev); 2530 fsl_udc_clk_finalize(pdev);
2321 2531
@@ -2335,6 +2545,9 @@ static int __init fsl_udc_probe(struct platform_device *pdev)
2335 if (ret < 0) 2545 if (ret < 0)
2336 goto err_free_irq; 2546 goto err_free_irq;
2337 2547
2548 if (udc_controller->transceiver)
2549 udc_controller->gadget.is_otg = 1;
2550
2338 /* setup QH and epctrl for ep0 */ 2551 /* setup QH and epctrl for ep0 */
2339 ep0_setup(udc_controller); 2552 ep0_setup(udc_controller);
2340 2553
@@ -2373,11 +2586,14 @@ err_unregister:
2373err_free_irq: 2586err_free_irq:
2374 free_irq(udc_controller->irq, udc_controller); 2587 free_irq(udc_controller->irq, udc_controller);
2375err_iounmap: 2588err_iounmap:
2589 if (pdata->exit)
2590 pdata->exit(pdev);
2376 fsl_udc_clk_release(); 2591 fsl_udc_clk_release();
2377err_iounmap_noclk: 2592err_iounmap_noclk:
2378 iounmap(dr_regs); 2593 iounmap(dr_regs);
2379err_release_mem_region: 2594err_release_mem_region:
2380 release_mem_region(res->start, res->end - res->start + 1); 2595 if (pdata->operating_mode == FSL_USB2_DR_DEVICE)
2596 release_mem_region(res->start, res->end - res->start + 1);
2381err_kfree: 2597err_kfree:
2382 kfree(udc_controller); 2598 kfree(udc_controller);
2383 udc_controller = NULL; 2599 udc_controller = NULL;
@@ -2390,6 +2606,7 @@ err_kfree:
2390static int __exit fsl_udc_remove(struct platform_device *pdev) 2606static int __exit fsl_udc_remove(struct platform_device *pdev)
2391{ 2607{
2392 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2608 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2609 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
2393 2610
2394 DECLARE_COMPLETION(done); 2611 DECLARE_COMPLETION(done);
2395 2612
@@ -2410,12 +2627,20 @@ static int __exit fsl_udc_remove(struct platform_device *pdev)
2410 dma_pool_destroy(udc_controller->td_pool); 2627 dma_pool_destroy(udc_controller->td_pool);
2411 free_irq(udc_controller->irq, udc_controller); 2628 free_irq(udc_controller->irq, udc_controller);
2412 iounmap(dr_regs); 2629 iounmap(dr_regs);
2413 release_mem_region(res->start, res->end - res->start + 1); 2630 if (pdata->operating_mode == FSL_USB2_DR_DEVICE)
2631 release_mem_region(res->start, res->end - res->start + 1);
2414 2632
2415 device_unregister(&udc_controller->gadget.dev); 2633 device_unregister(&udc_controller->gadget.dev);
2416 /* free udc --wait for the release() finished */ 2634 /* free udc --wait for the release() finished */
2417 wait_for_completion(&done); 2635 wait_for_completion(&done);
2418 2636
2637 /*
2638 * do platform specific un-initialization:
2639 * release iomux pins, etc.
2640 */
2641 if (pdata->exit)
2642 pdata->exit(pdev);
2643
2419 return 0; 2644 return 0;
2420} 2645}
2421 2646
@@ -2446,6 +2671,62 @@ static int fsl_udc_resume(struct platform_device *pdev)
2446 return 0; 2671 return 0;
2447} 2672}
2448 2673
2674static int fsl_udc_otg_suspend(struct device *dev, pm_message_t state)
2675{
2676 struct fsl_udc *udc = udc_controller;
2677 u32 mode, usbcmd;
2678
2679 mode = fsl_readl(&dr_regs->usbmode) & USB_MODE_CTRL_MODE_MASK;
2680
2681 pr_debug("%s(): mode 0x%x stopped %d\n", __func__, mode, udc->stopped);
2682
2683 /*
2684 * If the controller is already stopped, then this must be a
2685 * PM suspend. Remember this fact, so that we will leave the
2686 * controller stopped at PM resume time.
2687 */
2688 if (udc->stopped) {
2689 pr_debug("gadget already stopped, leaving early\n");
2690 udc->already_stopped = 1;
2691 return 0;
2692 }
2693
2694 if (mode != USB_MODE_CTRL_MODE_DEVICE) {
2695 pr_debug("gadget not in device mode, leaving early\n");
2696 return 0;
2697 }
2698
2699 /* stop the controller */
2700 usbcmd = fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP;
2701 fsl_writel(usbcmd, &dr_regs->usbcmd);
2702
2703 udc->stopped = 1;
2704
2705 pr_info("USB Gadget suspended\n");
2706
2707 return 0;
2708}
2709
2710static int fsl_udc_otg_resume(struct device *dev)
2711{
2712 pr_debug("%s(): stopped %d already_stopped %d\n", __func__,
2713 udc_controller->stopped, udc_controller->already_stopped);
2714
2715 /*
2716 * If the controller was stopped at suspend time, then
2717 * don't resume it now.
2718 */
2719 if (udc_controller->already_stopped) {
2720 udc_controller->already_stopped = 0;
2721 pr_debug("gadget was already stopped, leaving early\n");
2722 return 0;
2723 }
2724
2725 pr_info("USB Gadget resume\n");
2726
2727 return fsl_udc_resume(NULL);
2728}
2729
2449/*------------------------------------------------------------------------- 2730/*-------------------------------------------------------------------------
2450 Register entry point for the peripheral controller driver 2731 Register entry point for the peripheral controller driver
2451--------------------------------------------------------------------------*/ 2732--------------------------------------------------------------------------*/
@@ -2458,6 +2739,9 @@ static struct platform_driver udc_driver = {
2458 .driver = { 2739 .driver = {
2459 .name = (char *)driver_name, 2740 .name = (char *)driver_name,
2460 .owner = THIS_MODULE, 2741 .owner = THIS_MODULE,
2742 /* udc suspend/resume called from OTG driver */
2743 .suspend = fsl_udc_otg_suspend,
2744 .resume = fsl_udc_otg_resume,
2461 }, 2745 },
2462}; 2746};
2463 2747
diff --git a/drivers/usb/gadget/fsl_usb2_udc.h b/drivers/usb/gadget/fsl_usb2_udc.h
index e88cce5c2c0d..1d51be83fda8 100644
--- a/drivers/usb/gadget/fsl_usb2_udc.h
+++ b/drivers/usb/gadget/fsl_usb2_udc.h
@@ -275,7 +275,9 @@ struct usb_sys_interface {
275#define USB_MODE_CTRL_MODE_IDLE 0x00000000 275#define USB_MODE_CTRL_MODE_IDLE 0x00000000
276#define USB_MODE_CTRL_MODE_DEVICE 0x00000002 276#define USB_MODE_CTRL_MODE_DEVICE 0x00000002
277#define USB_MODE_CTRL_MODE_HOST 0x00000003 277#define USB_MODE_CTRL_MODE_HOST 0x00000003
278#define USB_MODE_CTRL_MODE_MASK 0x00000003
278#define USB_MODE_CTRL_MODE_RSV 0x00000001 279#define USB_MODE_CTRL_MODE_RSV 0x00000001
280#define USB_MODE_ES 0x00000004 /* Endian Select */
279#define USB_MODE_SETUP_LOCK_OFF 0x00000008 281#define USB_MODE_SETUP_LOCK_OFF 0x00000008
280#define USB_MODE_STREAM_DISABLE 0x00000010 282#define USB_MODE_STREAM_DISABLE 0x00000010
281/* Endpoint Flush Register */ 283/* Endpoint Flush Register */
@@ -461,6 +463,7 @@ struct fsl_ep {
461struct fsl_udc { 463struct fsl_udc {
462 struct usb_gadget gadget; 464 struct usb_gadget gadget;
463 struct usb_gadget_driver *driver; 465 struct usb_gadget_driver *driver;
466 struct fsl_usb2_platform_data *pdata;
464 struct completion *done; /* to make sure release() is done */ 467 struct completion *done; /* to make sure release() is done */
465 struct fsl_ep *eps; 468 struct fsl_ep *eps;
466 unsigned int max_ep; 469 unsigned int max_ep;
@@ -473,6 +476,8 @@ struct fsl_udc {
473 unsigned vbus_active:1; 476 unsigned vbus_active:1;
474 unsigned stopped:1; 477 unsigned stopped:1;
475 unsigned remote_wakeup:1; 478 unsigned remote_wakeup:1;
479 unsigned already_stopped:1;
480 unsigned big_endian_desc:1;
476 481
477 struct ep_queue_head *ep_qh; /* Endpoints Queue-Head */ 482 struct ep_queue_head *ep_qh; /* Endpoints Queue-Head */
478 struct fsl_req *status_req; /* ep0 status request */ 483 struct fsl_req *status_req; /* ep0 status request */
@@ -483,6 +488,7 @@ struct fsl_udc {
483 dma_addr_t ep_qh_dma; /* dma address of QH */ 488 dma_addr_t ep_qh_dma; /* dma address of QH */
484 489
485 u32 max_pipes; /* Device max pipes */ 490 u32 max_pipes; /* Device max pipes */
491 u32 bus_reset; /* Device is bus resetting */
486 u32 resume_state; /* USB state to resume */ 492 u32 resume_state; /* USB state to resume */
487 u32 usb_state; /* USB current state */ 493 u32 usb_state; /* USB current state */
488 u32 ep0_state; /* Endpoint zero state */ 494 u32 ep0_state; /* Endpoint zero state */
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index e896f6359dfe..ec3fd979c71d 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -148,6 +148,12 @@
148#define gadget_is_ci13xxx_msm(g) 0 148#define gadget_is_ci13xxx_msm(g) 0
149#endif 149#endif
150 150
151#ifdef CONFIG_USB_GADGET_RENESAS_USBHS
152#define gadget_is_renesas_usbhs(g) (!strcmp("renesas_usbhs_udc", (g)->name))
153#else
154#define gadget_is_renesas_usbhs(g) 0
155#endif
156
151/** 157/**
152 * usb_gadget_controller_number - support bcdDevice id convention 158 * usb_gadget_controller_number - support bcdDevice id convention
153 * @gadget: the controller being driven 159 * @gadget: the controller being driven
@@ -207,6 +213,9 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget)
207 return 0x27; 213 return 0x27;
208 else if (gadget_is_ci13xxx_msm(gadget)) 214 else if (gadget_is_ci13xxx_msm(gadget))
209 return 0x28; 215 return 0x28;
216 else if (gadget_is_renesas_usbhs(gadget))
217 return 0x29;
218
210 return -ENOENT; 219 return -ENOENT;
211} 220}
212 221
diff --git a/drivers/usb/gadget/printer.c b/drivers/usb/gadget/printer.c
index c3f2bd42bd5a..271ef94668e7 100644
--- a/drivers/usb/gadget/printer.c
+++ b/drivers/usb/gadget/printer.c
@@ -1189,6 +1189,8 @@ printer_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
1189 else if (gadget->a_alt_hnp_support) 1189 else if (gadget->a_alt_hnp_support)
1190 DBG(dev, "HNP needs a different root port\n"); 1190 DBG(dev, "HNP needs a different root port\n");
1191 value = printer_set_config(dev, wValue); 1191 value = printer_set_config(dev, wValue);
1192 if (!value)
1193 value = set_interface(dev, PRINTER_INTERFACE);
1192 break; 1194 break;
1193 case USB_REQ_GET_CONFIGURATION: 1195 case USB_REQ_GET_CONFIGURATION:
1194 if (ctrl->bRequestType != USB_DIR_IN) 1196 if (ctrl->bRequestType != USB_DIR_IN)
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 0912679de99a..baf96ce16b6a 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -1,5 +1,8 @@
1/* linux/drivers/usb/gadget/s3c-hsotg.c 1/* linux/drivers/usb/gadget/s3c-hsotg.c
2 * 2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
3 * Copyright 2008 Openmoko, Inc. 6 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 7 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
@@ -679,6 +682,14 @@ static void s3c_hsotg_start_req(struct s3c_hsotg *hsotg,
679 __func__, readl(hsotg->regs + epctrl_reg), index, 682 __func__, readl(hsotg->regs + epctrl_reg), index,
680 hs_ep->dir_in ? "in" : "out"); 683 hs_ep->dir_in ? "in" : "out");
681 684
685 /* If endpoint is stalled, we will restart request later */
686 ctrl = readl(hsotg->regs + epctrl_reg);
687
688 if (ctrl & S3C_DxEPCTL_Stall) {
689 dev_warn(hsotg->dev, "%s: ep%d is stalled\n", __func__, index);
690 return;
691 }
692
682 length = ureq->length - ureq->actual; 693 length = ureq->length - ureq->actual;
683 694
684 if (0) 695 if (0)
@@ -731,18 +742,6 @@ static void s3c_hsotg_start_req(struct s3c_hsotg *hsotg,
731 /* write size / packets */ 742 /* write size / packets */
732 writel(epsize, hsotg->regs + epsize_reg); 743 writel(epsize, hsotg->regs + epsize_reg);
733 744
734 ctrl = readl(hsotg->regs + epctrl_reg);
735
736 if (ctrl & S3C_DxEPCTL_Stall) {
737 dev_warn(hsotg->dev, "%s: ep%d is stalled\n", __func__, index);
738
739 /* not sure what we can do here, if it is EP0 then we should
740 * get this cleared once the endpoint has transmitted the
741 * STALL packet, otherwise it needs to be cleared by the
742 * host.
743 */
744 }
745
746 if (using_dma(hsotg)) { 745 if (using_dma(hsotg)) {
747 unsigned int dma_reg; 746 unsigned int dma_reg;
748 747
@@ -1048,6 +1047,20 @@ static int s3c_hsotg_process_req_status(struct s3c_hsotg *hsotg,
1048static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value); 1047static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value);
1049 1048
1050/** 1049/**
1050 * get_ep_head - return the first request on the endpoint
1051 * @hs_ep: The controller endpoint to get
1052 *
1053 * Get the first request on the endpoint.
1054 */
1055static struct s3c_hsotg_req *get_ep_head(struct s3c_hsotg_ep *hs_ep)
1056{
1057 if (list_empty(&hs_ep->queue))
1058 return NULL;
1059
1060 return list_first_entry(&hs_ep->queue, struct s3c_hsotg_req, queue);
1061}
1062
1063/**
1051 * s3c_hsotg_process_req_featire - process request {SET,CLEAR}_FEATURE 1064 * s3c_hsotg_process_req_featire - process request {SET,CLEAR}_FEATURE
1052 * @hsotg: The device state 1065 * @hsotg: The device state
1053 * @ctrl: USB control request 1066 * @ctrl: USB control request
@@ -1055,8 +1068,12 @@ static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value);
1055static int s3c_hsotg_process_req_feature(struct s3c_hsotg *hsotg, 1068static int s3c_hsotg_process_req_feature(struct s3c_hsotg *hsotg,
1056 struct usb_ctrlrequest *ctrl) 1069 struct usb_ctrlrequest *ctrl)
1057{ 1070{
1071 struct s3c_hsotg_ep *ep0 = &hsotg->eps[0];
1072 struct s3c_hsotg_req *hs_req;
1073 bool restart;
1058 bool set = (ctrl->bRequest == USB_REQ_SET_FEATURE); 1074 bool set = (ctrl->bRequest == USB_REQ_SET_FEATURE);
1059 struct s3c_hsotg_ep *ep; 1075 struct s3c_hsotg_ep *ep;
1076 int ret;
1060 1077
1061 dev_dbg(hsotg->dev, "%s: %s_FEATURE\n", 1078 dev_dbg(hsotg->dev, "%s: %s_FEATURE\n",
1062 __func__, set ? "SET" : "CLEAR"); 1079 __func__, set ? "SET" : "CLEAR");
@@ -1072,6 +1089,36 @@ static int s3c_hsotg_process_req_feature(struct s3c_hsotg *hsotg,
1072 switch (le16_to_cpu(ctrl->wValue)) { 1089 switch (le16_to_cpu(ctrl->wValue)) {
1073 case USB_ENDPOINT_HALT: 1090 case USB_ENDPOINT_HALT:
1074 s3c_hsotg_ep_sethalt(&ep->ep, set); 1091 s3c_hsotg_ep_sethalt(&ep->ep, set);
1092
1093 ret = s3c_hsotg_send_reply(hsotg, ep0, NULL, 0);
1094 if (ret) {
1095 dev_err(hsotg->dev,
1096 "%s: failed to send reply\n", __func__);
1097 return ret;
1098 }
1099
1100 if (!set) {
1101 /*
1102 * If we have request in progress,
1103 * then complete it
1104 */
1105 if (ep->req) {
1106 hs_req = ep->req;
1107 ep->req = NULL;
1108 list_del_init(&hs_req->queue);
1109 hs_req->req.complete(&ep->ep,
1110 &hs_req->req);
1111 }
1112
1113 /* If we have pending request, then start it */
1114 restart = !list_empty(&ep->queue);
1115 if (restart) {
1116 hs_req = get_ep_head(ep);
1117 s3c_hsotg_start_req(hsotg, ep,
1118 hs_req, false);
1119 }
1120 }
1121
1075 break; 1122 break;
1076 1123
1077 default: 1124 default:
@@ -1148,14 +1195,6 @@ static void s3c_hsotg_process_control(struct s3c_hsotg *hsotg,
1148 dev_dbg(hsotg->dev, "driver->setup() ret %d\n", ret); 1195 dev_dbg(hsotg->dev, "driver->setup() ret %d\n", ret);
1149 } 1196 }
1150 1197
1151 if (ret > 0) {
1152 if (!ep0->dir_in) {
1153 /* need to generate zlp in reply or take data */
1154 /* todo - deal with any data we might be sent? */
1155 ret = s3c_hsotg_send_reply(hsotg, ep0, NULL, 0);
1156 }
1157 }
1158
1159 /* the request is either unhandlable, or is not formatted correctly 1198 /* the request is either unhandlable, or is not formatted correctly
1160 * so respond with a STALL for the status stage to indicate failure. 1199 * so respond with a STALL for the status stage to indicate failure.
1161 */ 1200 */
@@ -1247,20 +1286,6 @@ static void s3c_hsotg_enqueue_setup(struct s3c_hsotg *hsotg)
1247} 1286}
1248 1287
1249/** 1288/**
1250 * get_ep_head - return the first request on the endpoint
1251 * @hs_ep: The controller endpoint to get
1252 *
1253 * Get the first request on the endpoint.
1254*/
1255static struct s3c_hsotg_req *get_ep_head(struct s3c_hsotg_ep *hs_ep)
1256{
1257 if (list_empty(&hs_ep->queue))
1258 return NULL;
1259
1260 return list_first_entry(&hs_ep->queue, struct s3c_hsotg_req, queue);
1261}
1262
1263/**
1264 * s3c_hsotg_complete_request - complete a request given to us 1289 * s3c_hsotg_complete_request - complete a request given to us
1265 * @hsotg: The device state. 1290 * @hsotg: The device state.
1266 * @hs_ep: The endpoint the request was on. 1291 * @hs_ep: The endpoint the request was on.
@@ -1683,6 +1708,37 @@ bad_mps:
1683 dev_err(hsotg->dev, "ep%d: bad mps of %d\n", ep, mps); 1708 dev_err(hsotg->dev, "ep%d: bad mps of %d\n", ep, mps);
1684} 1709}
1685 1710
1711/**
1712 * s3c_hsotg_txfifo_flush - flush Tx FIFO
1713 * @hsotg: The driver state
1714 * @idx: The index for the endpoint (0..15)
1715 */
1716static void s3c_hsotg_txfifo_flush(struct s3c_hsotg *hsotg, unsigned int idx)
1717{
1718 int timeout;
1719 int val;
1720
1721 writel(S3C_GRSTCTL_TxFNum(idx) | S3C_GRSTCTL_TxFFlsh,
1722 hsotg->regs + S3C_GRSTCTL);
1723
1724 /* wait until the fifo is flushed */
1725 timeout = 100;
1726
1727 while (1) {
1728 val = readl(hsotg->regs + S3C_GRSTCTL);
1729
1730 if ((val & (S3C_GRSTCTL_TxFFlsh)) == 0)
1731 break;
1732
1733 if (--timeout == 0) {
1734 dev_err(hsotg->dev,
1735 "%s: timeout flushing fifo (GRSTCTL=%08x)\n",
1736 __func__, val);
1737 }
1738
1739 udelay(1);
1740 }
1741}
1686 1742
1687/** 1743/**
1688 * s3c_hsotg_trytx - check to see if anything needs transmitting 1744 * s3c_hsotg_trytx - check to see if anything needs transmitting
@@ -1775,10 +1831,12 @@ static void s3c_hsotg_epint(struct s3c_hsotg *hsotg, unsigned int idx,
1775 u32 epctl_reg = dir_in ? S3C_DIEPCTL(idx) : S3C_DOEPCTL(idx); 1831 u32 epctl_reg = dir_in ? S3C_DIEPCTL(idx) : S3C_DOEPCTL(idx);
1776 u32 epsiz_reg = dir_in ? S3C_DIEPTSIZ(idx) : S3C_DOEPTSIZ(idx); 1832 u32 epsiz_reg = dir_in ? S3C_DIEPTSIZ(idx) : S3C_DOEPTSIZ(idx);
1777 u32 ints; 1833 u32 ints;
1778 u32 clear = 0;
1779 1834
1780 ints = readl(hsotg->regs + epint_reg); 1835 ints = readl(hsotg->regs + epint_reg);
1781 1836
1837 /* Clear endpoint interrupts */
1838 writel(ints, hsotg->regs + epint_reg);
1839
1782 dev_dbg(hsotg->dev, "%s: ep%d(%s) DxEPINT=0x%08x\n", 1840 dev_dbg(hsotg->dev, "%s: ep%d(%s) DxEPINT=0x%08x\n",
1783 __func__, idx, dir_in ? "in" : "out", ints); 1841 __func__, idx, dir_in ? "in" : "out", ints);
1784 1842
@@ -1801,19 +1859,28 @@ static void s3c_hsotg_epint(struct s3c_hsotg *hsotg, unsigned int idx,
1801 1859
1802 s3c_hsotg_handle_outdone(hsotg, idx, false); 1860 s3c_hsotg_handle_outdone(hsotg, idx, false);
1803 } 1861 }
1804
1805 clear |= S3C_DxEPINT_XferCompl;
1806 } 1862 }
1807 1863
1808 if (ints & S3C_DxEPINT_EPDisbld) { 1864 if (ints & S3C_DxEPINT_EPDisbld) {
1809 dev_dbg(hsotg->dev, "%s: EPDisbld\n", __func__); 1865 dev_dbg(hsotg->dev, "%s: EPDisbld\n", __func__);
1810 clear |= S3C_DxEPINT_EPDisbld; 1866
1867 if (dir_in) {
1868 int epctl = readl(hsotg->regs + epctl_reg);
1869
1870 s3c_hsotg_txfifo_flush(hsotg, idx);
1871
1872 if ((epctl & S3C_DxEPCTL_Stall) &&
1873 (epctl & S3C_DxEPCTL_EPType_Bulk)) {
1874 int dctl = readl(hsotg->regs + S3C_DCTL);
1875
1876 dctl |= S3C_DCTL_CGNPInNAK;
1877 writel(dctl, hsotg->regs + S3C_DCTL);
1878 }
1879 }
1811 } 1880 }
1812 1881
1813 if (ints & S3C_DxEPINT_AHBErr) { 1882 if (ints & S3C_DxEPINT_AHBErr)
1814 dev_dbg(hsotg->dev, "%s: AHBErr\n", __func__); 1883 dev_dbg(hsotg->dev, "%s: AHBErr\n", __func__);
1815 clear |= S3C_DxEPINT_AHBErr;
1816 }
1817 1884
1818 if (ints & S3C_DxEPINT_Setup) { /* Setup or Timeout */ 1885 if (ints & S3C_DxEPINT_Setup) { /* Setup or Timeout */
1819 dev_dbg(hsotg->dev, "%s: Setup/Timeout\n", __func__); 1886 dev_dbg(hsotg->dev, "%s: Setup/Timeout\n", __func__);
@@ -1829,14 +1896,10 @@ static void s3c_hsotg_epint(struct s3c_hsotg *hsotg, unsigned int idx,
1829 else 1896 else
1830 s3c_hsotg_handle_outdone(hsotg, 0, true); 1897 s3c_hsotg_handle_outdone(hsotg, 0, true);
1831 } 1898 }
1832
1833 clear |= S3C_DxEPINT_Setup;
1834 } 1899 }
1835 1900
1836 if (ints & S3C_DxEPINT_Back2BackSetup) { 1901 if (ints & S3C_DxEPINT_Back2BackSetup)
1837 dev_dbg(hsotg->dev, "%s: B2BSetup/INEPNakEff\n", __func__); 1902 dev_dbg(hsotg->dev, "%s: B2BSetup/INEPNakEff\n", __func__);
1838 clear |= S3C_DxEPINT_Back2BackSetup;
1839 }
1840 1903
1841 if (dir_in) { 1904 if (dir_in) {
1842 /* not sure if this is important, but we'll clear it anyway 1905 /* not sure if this is important, but we'll clear it anyway
@@ -1844,14 +1907,12 @@ static void s3c_hsotg_epint(struct s3c_hsotg *hsotg, unsigned int idx,
1844 if (ints & S3C_DIEPMSK_INTknTXFEmpMsk) { 1907 if (ints & S3C_DIEPMSK_INTknTXFEmpMsk) {
1845 dev_dbg(hsotg->dev, "%s: ep%d: INTknTXFEmpMsk\n", 1908 dev_dbg(hsotg->dev, "%s: ep%d: INTknTXFEmpMsk\n",
1846 __func__, idx); 1909 __func__, idx);
1847 clear |= S3C_DIEPMSK_INTknTXFEmpMsk;
1848 } 1910 }
1849 1911
1850 /* this probably means something bad is happening */ 1912 /* this probably means something bad is happening */
1851 if (ints & S3C_DIEPMSK_INTknEPMisMsk) { 1913 if (ints & S3C_DIEPMSK_INTknEPMisMsk) {
1852 dev_warn(hsotg->dev, "%s: ep%d: INTknEP\n", 1914 dev_warn(hsotg->dev, "%s: ep%d: INTknEP\n",
1853 __func__, idx); 1915 __func__, idx);
1854 clear |= S3C_DIEPMSK_INTknEPMisMsk;
1855 } 1916 }
1856 1917
1857 /* FIFO has space or is empty (see GAHBCFG) */ 1918 /* FIFO has space or is empty (see GAHBCFG) */
@@ -1860,11 +1921,8 @@ static void s3c_hsotg_epint(struct s3c_hsotg *hsotg, unsigned int idx,
1860 dev_dbg(hsotg->dev, "%s: ep%d: TxFIFOEmpty\n", 1921 dev_dbg(hsotg->dev, "%s: ep%d: TxFIFOEmpty\n",
1861 __func__, idx); 1922 __func__, idx);
1862 s3c_hsotg_trytx(hsotg, hs_ep); 1923 s3c_hsotg_trytx(hsotg, hs_ep);
1863 clear |= S3C_DIEPMSK_TxFIFOEmpty;
1864 } 1924 }
1865 } 1925 }
1866
1867 writel(clear, hsotg->regs + epint_reg);
1868} 1926}
1869 1927
1870/** 1928/**
@@ -2056,7 +2114,6 @@ irq_retry:
2056 dev_info(hsotg->dev, "OTGInt: %08x\n", otgint); 2114 dev_info(hsotg->dev, "OTGInt: %08x\n", otgint);
2057 2115
2058 writel(otgint, hsotg->regs + S3C_GOTGINT); 2116 writel(otgint, hsotg->regs + S3C_GOTGINT);
2059 writel(S3C_GINTSTS_OTGInt, hsotg->regs + S3C_GINTSTS);
2060 } 2117 }
2061 2118
2062 if (gintsts & S3C_GINTSTS_DisconnInt) { 2119 if (gintsts & S3C_GINTSTS_DisconnInt) {
@@ -2072,8 +2129,9 @@ irq_retry:
2072 } 2129 }
2073 2130
2074 if (gintsts & S3C_GINTSTS_EnumDone) { 2131 if (gintsts & S3C_GINTSTS_EnumDone) {
2075 s3c_hsotg_irq_enumdone(hsotg);
2076 writel(S3C_GINTSTS_EnumDone, hsotg->regs + S3C_GINTSTS); 2132 writel(S3C_GINTSTS_EnumDone, hsotg->regs + S3C_GINTSTS);
2133
2134 s3c_hsotg_irq_enumdone(hsotg);
2077 } 2135 }
2078 2136
2079 if (gintsts & S3C_GINTSTS_ConIDStsChng) { 2137 if (gintsts & S3C_GINTSTS_ConIDStsChng) {
@@ -2101,10 +2159,6 @@ irq_retry:
2101 if (daint_in & 1) 2159 if (daint_in & 1)
2102 s3c_hsotg_epint(hsotg, ep, 1); 2160 s3c_hsotg_epint(hsotg, ep, 1);
2103 } 2161 }
2104
2105 writel(daint, hsotg->regs + S3C_DAINT);
2106 writel(gintsts & (S3C_GINTSTS_OEPInt | S3C_GINTSTS_IEPInt),
2107 hsotg->regs + S3C_GINTSTS);
2108 } 2162 }
2109 2163
2110 if (gintsts & S3C_GINTSTS_USBRst) { 2164 if (gintsts & S3C_GINTSTS_USBRst) {
@@ -2112,6 +2166,8 @@ irq_retry:
2112 dev_dbg(hsotg->dev, "GNPTXSTS=%08x\n", 2166 dev_dbg(hsotg->dev, "GNPTXSTS=%08x\n",
2113 readl(hsotg->regs + S3C_GNPTXSTS)); 2167 readl(hsotg->regs + S3C_GNPTXSTS));
2114 2168
2169 writel(S3C_GINTSTS_USBRst, hsotg->regs + S3C_GINTSTS);
2170
2115 kill_all_requests(hsotg, &hsotg->eps[0], -ECONNRESET, true); 2171 kill_all_requests(hsotg, &hsotg->eps[0], -ECONNRESET, true);
2116 2172
2117 /* it seems after a reset we can end up with a situation 2173 /* it seems after a reset we can end up with a situation
@@ -2123,8 +2179,6 @@ irq_retry:
2123 s3c_hsotg_init_fifo(hsotg); 2179 s3c_hsotg_init_fifo(hsotg);
2124 2180
2125 s3c_hsotg_enqueue_setup(hsotg); 2181 s3c_hsotg_enqueue_setup(hsotg);
2126
2127 writel(S3C_GINTSTS_USBRst, hsotg->regs + S3C_GINTSTS);
2128 } 2182 }
2129 2183
2130 /* check both FIFOs */ 2184 /* check both FIFOs */
@@ -2138,8 +2192,6 @@ irq_retry:
2138 2192
2139 s3c_hsotg_disable_gsint(hsotg, S3C_GINTSTS_NPTxFEmp); 2193 s3c_hsotg_disable_gsint(hsotg, S3C_GINTSTS_NPTxFEmp);
2140 s3c_hsotg_irq_fifoempty(hsotg, false); 2194 s3c_hsotg_irq_fifoempty(hsotg, false);
2141
2142 writel(S3C_GINTSTS_NPTxFEmp, hsotg->regs + S3C_GINTSTS);
2143 } 2195 }
2144 2196
2145 if (gintsts & S3C_GINTSTS_PTxFEmp) { 2197 if (gintsts & S3C_GINTSTS_PTxFEmp) {
@@ -2149,8 +2201,6 @@ irq_retry:
2149 2201
2150 s3c_hsotg_disable_gsint(hsotg, S3C_GINTSTS_PTxFEmp); 2202 s3c_hsotg_disable_gsint(hsotg, S3C_GINTSTS_PTxFEmp);
2151 s3c_hsotg_irq_fifoempty(hsotg, true); 2203 s3c_hsotg_irq_fifoempty(hsotg, true);
2152
2153 writel(S3C_GINTSTS_PTxFEmp, hsotg->regs + S3C_GINTSTS);
2154 } 2204 }
2155 2205
2156 if (gintsts & S3C_GINTSTS_RxFLvl) { 2206 if (gintsts & S3C_GINTSTS_RxFLvl) {
@@ -2159,7 +2209,6 @@ irq_retry:
2159 * set. */ 2209 * set. */
2160 2210
2161 s3c_hsotg_handle_rx(hsotg); 2211 s3c_hsotg_handle_rx(hsotg);
2162 writel(S3C_GINTSTS_RxFLvl, hsotg->regs + S3C_GINTSTS);
2163 } 2212 }
2164 2213
2165 if (gintsts & S3C_GINTSTS_ModeMis) { 2214 if (gintsts & S3C_GINTSTS_ModeMis) {
@@ -2193,19 +2242,17 @@ irq_retry:
2193 if (gintsts & S3C_GINTSTS_GOUTNakEff) { 2242 if (gintsts & S3C_GINTSTS_GOUTNakEff) {
2194 dev_info(hsotg->dev, "GOUTNakEff triggered\n"); 2243 dev_info(hsotg->dev, "GOUTNakEff triggered\n");
2195 2244
2196 s3c_hsotg_dump(hsotg);
2197
2198 writel(S3C_DCTL_CGOUTNak, hsotg->regs + S3C_DCTL); 2245 writel(S3C_DCTL_CGOUTNak, hsotg->regs + S3C_DCTL);
2199 writel(S3C_GINTSTS_GOUTNakEff, hsotg->regs + S3C_GINTSTS); 2246
2247 s3c_hsotg_dump(hsotg);
2200 } 2248 }
2201 2249
2202 if (gintsts & S3C_GINTSTS_GINNakEff) { 2250 if (gintsts & S3C_GINTSTS_GINNakEff) {
2203 dev_info(hsotg->dev, "GINNakEff triggered\n"); 2251 dev_info(hsotg->dev, "GINNakEff triggered\n");
2204 2252
2205 s3c_hsotg_dump(hsotg);
2206
2207 writel(S3C_DCTL_CGNPInNAK, hsotg->regs + S3C_DCTL); 2253 writel(S3C_DCTL_CGNPInNAK, hsotg->regs + S3C_DCTL);
2208 writel(S3C_GINTSTS_GINNakEff, hsotg->regs + S3C_GINTSTS); 2254
2255 s3c_hsotg_dump(hsotg);
2209 } 2256 }
2210 2257
2211 /* if we've had fifo events, we should try and go around the 2258 /* if we've had fifo events, we should try and go around the
@@ -2403,11 +2450,6 @@ static int s3c_hsotg_ep_dequeue(struct usb_ep *ep, struct usb_request *req)
2403 2450
2404 dev_info(hs->dev, "ep_dequeue(%p,%p)\n", ep, req); 2451 dev_info(hs->dev, "ep_dequeue(%p,%p)\n", ep, req);
2405 2452
2406 if (hs_req == hs_ep->req) {
2407 dev_dbg(hs->dev, "%s: already in progress\n", __func__);
2408 return -EINPROGRESS;
2409 }
2410
2411 spin_lock_irqsave(&hs_ep->lock, flags); 2453 spin_lock_irqsave(&hs_ep->lock, flags);
2412 2454
2413 if (!on_list(hs_ep, hs_req)) { 2455 if (!on_list(hs_ep, hs_req)) {
@@ -2429,6 +2471,7 @@ static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value)
2429 unsigned long irqflags; 2471 unsigned long irqflags;
2430 u32 epreg; 2472 u32 epreg;
2431 u32 epctl; 2473 u32 epctl;
2474 u32 xfertype;
2432 2475
2433 dev_info(hs->dev, "%s(ep %p %s, %d)\n", __func__, ep, ep->name, value); 2476 dev_info(hs->dev, "%s(ep %p %s, %d)\n", __func__, ep, ep->name, value);
2434 2477
@@ -2439,10 +2482,17 @@ static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value)
2439 epreg = S3C_DIEPCTL(index); 2482 epreg = S3C_DIEPCTL(index);
2440 epctl = readl(hs->regs + epreg); 2483 epctl = readl(hs->regs + epreg);
2441 2484
2442 if (value) 2485 if (value) {
2443 epctl |= S3C_DxEPCTL_Stall; 2486 epctl |= S3C_DxEPCTL_Stall + S3C_DxEPCTL_SNAK;
2444 else 2487 if (epctl & S3C_DxEPCTL_EPEna)
2488 epctl |= S3C_DxEPCTL_EPDis;
2489 } else {
2445 epctl &= ~S3C_DxEPCTL_Stall; 2490 epctl &= ~S3C_DxEPCTL_Stall;
2491 xfertype = epctl & S3C_DxEPCTL_EPType_MASK;
2492 if (xfertype == S3C_DxEPCTL_EPType_Bulk ||
2493 xfertype == S3C_DxEPCTL_EPType_Intterupt)
2494 epctl |= S3C_DxEPCTL_SetD0PID;
2495 }
2446 2496
2447 writel(epctl, hs->regs + epreg); 2497 writel(epctl, hs->regs + epreg);
2448 2498
@@ -2451,8 +2501,13 @@ static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value)
2451 2501
2452 if (value) 2502 if (value)
2453 epctl |= S3C_DxEPCTL_Stall; 2503 epctl |= S3C_DxEPCTL_Stall;
2454 else 2504 else {
2455 epctl &= ~S3C_DxEPCTL_Stall; 2505 epctl &= ~S3C_DxEPCTL_Stall;
2506 xfertype = epctl & S3C_DxEPCTL_EPType_MASK;
2507 if (xfertype == S3C_DxEPCTL_EPType_Bulk ||
2508 xfertype == S3C_DxEPCTL_EPType_Intterupt)
2509 epctl |= S3C_DxEPCTL_SetD0PID;
2510 }
2456 2511
2457 writel(epctl, hs->regs + epreg); 2512 writel(epctl, hs->regs + epreg);
2458 2513
@@ -2491,9 +2546,9 @@ static int s3c_hsotg_corereset(struct s3c_hsotg *hsotg)
2491 timeout = 1000; 2546 timeout = 1000;
2492 do { 2547 do {
2493 grstctl = readl(hsotg->regs + S3C_GRSTCTL); 2548 grstctl = readl(hsotg->regs + S3C_GRSTCTL);
2494 } while (!(grstctl & S3C_GRSTCTL_CSftRst) && timeout-- > 0); 2549 } while ((grstctl & S3C_GRSTCTL_CSftRst) && timeout-- > 0);
2495 2550
2496 if (!(grstctl & S3C_GRSTCTL_CSftRst)) { 2551 if (grstctl & S3C_GRSTCTL_CSftRst) {
2497 dev_err(hsotg->dev, "Failed to get CSftRst asserted\n"); 2552 dev_err(hsotg->dev, "Failed to get CSftRst asserted\n");
2498 return -EINVAL; 2553 return -EINVAL;
2499 } 2554 }
@@ -2510,9 +2565,6 @@ static int s3c_hsotg_corereset(struct s3c_hsotg *hsotg)
2510 return -ETIMEDOUT; 2565 return -ETIMEDOUT;
2511 } 2566 }
2512 2567
2513 if (grstctl & S3C_GRSTCTL_CSftRst)
2514 continue;
2515
2516 if (!(grstctl & S3C_GRSTCTL_AHBIdle)) 2568 if (!(grstctl & S3C_GRSTCTL_AHBIdle))
2517 continue; 2569 continue;
2518 2570
@@ -2588,6 +2640,12 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2588 2640
2589 writel(1 << 18 | S3C_DCFG_DevSpd_HS, hsotg->regs + S3C_DCFG); 2641 writel(1 << 18 | S3C_DCFG_DevSpd_HS, hsotg->regs + S3C_DCFG);
2590 2642
2643 /* Clear any pending OTG interrupts */
2644 writel(0xffffffff, hsotg->regs + S3C_GOTGINT);
2645
2646 /* Clear any pending interrupts */
2647 writel(0xffffffff, hsotg->regs + S3C_GINTSTS);
2648
2591 writel(S3C_GINTSTS_DisconnInt | S3C_GINTSTS_SessReqInt | 2649 writel(S3C_GINTSTS_DisconnInt | S3C_GINTSTS_SessReqInt |
2592 S3C_GINTSTS_ConIDStsChng | S3C_GINTSTS_USBRst | 2650 S3C_GINTSTS_ConIDStsChng | S3C_GINTSTS_USBRst |
2593 S3C_GINTSTS_EnumDone | S3C_GINTSTS_OTGInt | 2651 S3C_GINTSTS_EnumDone | S3C_GINTSTS_OTGInt |
diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index b015561fd602..1fa4f705b0b4 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -708,13 +708,14 @@ static ssize_t fsg_show_file(struct device *dev, struct device_attribute *attr,
708static ssize_t fsg_store_ro(struct device *dev, struct device_attribute *attr, 708static ssize_t fsg_store_ro(struct device *dev, struct device_attribute *attr,
709 const char *buf, size_t count) 709 const char *buf, size_t count)
710{ 710{
711 ssize_t rc = count; 711 ssize_t rc;
712 struct fsg_lun *curlun = fsg_lun_from_dev(dev); 712 struct fsg_lun *curlun = fsg_lun_from_dev(dev);
713 struct rw_semaphore *filesem = dev_get_drvdata(dev); 713 struct rw_semaphore *filesem = dev_get_drvdata(dev);
714 unsigned long ro; 714 unsigned ro;
715 715
716 if (strict_strtoul(buf, 2, &ro)) 716 rc = kstrtouint(buf, 2, &ro);
717 return -EINVAL; 717 if (rc)
718 return rc;
718 719
719 /* 720 /*
720 * Allow the write-enable status to change only while the 721 * Allow the write-enable status to change only while the
@@ -728,6 +729,7 @@ static ssize_t fsg_store_ro(struct device *dev, struct device_attribute *attr,
728 curlun->ro = ro; 729 curlun->ro = ro;
729 curlun->initially_ro = ro; 730 curlun->initially_ro = ro;
730 LDBG(curlun, "read-only status set to %d\n", curlun->ro); 731 LDBG(curlun, "read-only status set to %d\n", curlun->ro);
732 rc = count;
731 } 733 }
732 up_read(filesem); 734 up_read(filesem);
733 return rc; 735 return rc;
@@ -738,10 +740,12 @@ static ssize_t fsg_store_nofua(struct device *dev,
738 const char *buf, size_t count) 740 const char *buf, size_t count)
739{ 741{
740 struct fsg_lun *curlun = fsg_lun_from_dev(dev); 742 struct fsg_lun *curlun = fsg_lun_from_dev(dev);
741 unsigned long nofua; 743 unsigned nofua;
744 int ret;
742 745
743 if (strict_strtoul(buf, 2, &nofua)) 746 ret = kstrtouint(buf, 2, &nofua);
744 return -EINVAL; 747 if (ret)
748 return ret;
745 749
746 /* Sync data when switching from async mode to sync */ 750 /* Sync data when switching from async mode to sync */
747 if (!nofua && curlun->nofua) 751 if (!nofua && curlun->nofua)
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index e0e0787b724b..8898505af429 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -106,13 +106,13 @@ config USB_EHCI_BIG_ENDIAN_MMIO
106 depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || \ 106 depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || \
107 ARCH_IXP4XX || XPS_USB_HCD_XILINX || \ 107 ARCH_IXP4XX || XPS_USB_HCD_XILINX || \
108 PPC_MPC512x || CPU_CAVIUM_OCTEON || \ 108 PPC_MPC512x || CPU_CAVIUM_OCTEON || \
109 PMC_MSP) 109 PMC_MSP || SPARC_LEON)
110 default y 110 default y
111 111
112config USB_EHCI_BIG_ENDIAN_DESC 112config USB_EHCI_BIG_ENDIAN_DESC
113 bool 113 bool
114 depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX || XPS_USB_HCD_XILINX || \ 114 depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX || XPS_USB_HCD_XILINX || \
115 PPC_MPC512x || PMC_MSP) 115 PPC_MPC512x || PMC_MSP || SPARC_LEON)
116 default y 116 default y
117 117
118config XPS_USB_HCD_XILINX 118config XPS_USB_HCD_XILINX
@@ -188,6 +188,12 @@ config USB_EHCI_SH
188 Enables support for the on-chip EHCI controller on the SuperH. 188 Enables support for the on-chip EHCI controller on the SuperH.
189 If you use the PCI EHCI controller, this option is not necessary. 189 If you use the PCI EHCI controller, this option is not necessary.
190 190
191config USB_EHCI_S5P
192 boolean "S5P EHCI support"
193 depends on USB_EHCI_HCD && PLAT_S5P
194 help
195 Enable support for the S5P SOC's on-chip EHCI controller.
196
191config USB_W90X900_EHCI 197config USB_W90X900_EHCI
192 bool "W90X900(W90P910) EHCI support" 198 bool "W90X900(W90P910) EHCI support"
193 depends on USB_EHCI_HCD && ARCH_W90X900 199 depends on USB_EHCI_HCD && ARCH_W90X900
@@ -202,6 +208,15 @@ config USB_CNS3XXX_EHCI
202 It is needed for high-speed (480Mbit/sec) USB 2.0 device 208 It is needed for high-speed (480Mbit/sec) USB 2.0 device
203 support. 209 support.
204 210
211config USB_EHCI_ATH79
212 bool "EHCI support for AR7XXX/AR9XXX SoCs"
213 depends on USB_EHCI_HCD && (SOC_AR71XX || SOC_AR724X || SOC_AR913X)
214 select USB_EHCI_ROOT_HUB_TT
215 default y
216 ---help---
217 Enables support for the built-in EHCI controller present
218 on the Atheros AR7XXX/AR9XXX SoCs.
219
205config USB_OXU210HP_HCD 220config USB_OXU210HP_HCD
206 tristate "OXU210HP HCD support" 221 tristate "OXU210HP HCD support"
207 depends on USB 222 depends on USB
@@ -287,6 +302,14 @@ config USB_OHCI_HCD_OMAP3
287 Enables support for the on-chip OHCI controller on 302 Enables support for the on-chip OHCI controller on
288 OMAP3 and later chips. 303 OMAP3 and later chips.
289 304
305config USB_OHCI_ATH79
306 bool "USB OHCI support for the Atheros AR71XX/AR7240 SoCs"
307 depends on USB_OHCI_HCD && (SOC_AR71XX || SOC_AR724X)
308 default y
309 help
310 Enables support for the built-in OHCI controller present on the
311 Atheros AR71XX/AR7240 SoCs.
312
290config USB_OHCI_HCD_PPC_SOC 313config USB_OHCI_HCD_PPC_SOC
291 bool "OHCI support for on-chip PPC USB controller" 314 bool "OHCI support for on-chip PPC USB controller"
292 depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx) 315 depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
@@ -373,7 +396,7 @@ config USB_OHCI_LITTLE_ENDIAN
373 396
374config USB_UHCI_HCD 397config USB_UHCI_HCD
375 tristate "UHCI HCD (most Intel and VIA) support" 398 tristate "UHCI HCD (most Intel and VIA) support"
376 depends on USB && PCI 399 depends on USB && (PCI || SPARC_LEON)
377 ---help--- 400 ---help---
378 The Universal Host Controller Interface is a standard by Intel for 401 The Universal Host Controller Interface is a standard by Intel for
379 accessing the USB hardware in the PC (which is also called the USB 402 accessing the USB hardware in the PC (which is also called the USB
@@ -382,11 +405,17 @@ config USB_UHCI_HCD
382 with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX, 405 with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX,
383 i810, i820) conform to this standard. Also all VIA PCI chipsets 406 i810, i820) conform to this standard. Also all VIA PCI chipsets
384 (like VIA VP2, VP3, MVP3, Apollo Pro, Apollo Pro II or Apollo Pro 407 (like VIA VP2, VP3, MVP3, Apollo Pro, Apollo Pro II or Apollo Pro
385 133). If unsure, say Y. 408 133) and LEON/GRLIB SoCs with the GRUSBHC controller.
409 If unsure, say Y.
386 410
387 To compile this driver as a module, choose M here: the 411 To compile this driver as a module, choose M here: the
388 module will be called uhci-hcd. 412 module will be called uhci-hcd.
389 413
414config USB_UHCI_SUPPORT_NON_PCI_HC
415 bool
416 depends on USB_UHCI_HCD
417 default y if SPARC_LEON
418
390config USB_FHCI_HCD 419config USB_FHCI_HCD
391 tristate "Freescale QE USB Host Controller support" 420 tristate "Freescale QE USB Host Controller support"
392 depends on USB && OF_GPIO && QE_GPIO && QUICC_ENGINE 421 depends on USB && OF_GPIO && QE_GPIO && QUICC_ENGINE
@@ -444,6 +473,16 @@ config USB_SL811_HCD
444 To compile this driver as a module, choose M here: the 473 To compile this driver as a module, choose M here: the
445 module will be called sl811-hcd. 474 module will be called sl811-hcd.
446 475
476config USB_SL811_HCD_ISO
477 bool "partial ISO support"
478 depends on USB_SL811_HCD
479 help
480 The driver doesn't support iso_frame_desc (yet), but for some simple
481 devices that just queue one ISO frame per URB, then ISO transfers
482 "should" work using the normal urb status fields.
483
484 If unsure, say N.
485
447config USB_SL811_CS 486config USB_SL811_CS
448 tristate "CF/PCMCIA support for SL811HS HCD" 487 tristate "CF/PCMCIA support for SL811HS HCD"
449 depends on USB_SL811_HCD && PCMCIA 488 depends on USB_SL811_HCD && PCMCIA
diff --git a/drivers/usb/host/ehci-ath79.c b/drivers/usb/host/ehci-ath79.c
new file mode 100644
index 000000000000..98cc8a13169c
--- /dev/null
+++ b/drivers/usb/host/ehci-ath79.c
@@ -0,0 +1,202 @@
1/*
2 * Bus Glue for Atheros AR7XXX/AR9XXX built-in EHCI controller.
3 *
4 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Atheros' 2.6.15 BSP
8 * Copyright (C) 2007 Atheros Communications, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 */
14
15#include <linux/platform_device.h>
16
17enum {
18 EHCI_ATH79_IP_V1 = 0,
19 EHCI_ATH79_IP_V2,
20};
21
22static const struct platform_device_id ehci_ath79_id_table[] = {
23 {
24 .name = "ar71xx-ehci",
25 .driver_data = EHCI_ATH79_IP_V1,
26 },
27 {
28 .name = "ar724x-ehci",
29 .driver_data = EHCI_ATH79_IP_V2,
30 },
31 {
32 .name = "ar913x-ehci",
33 .driver_data = EHCI_ATH79_IP_V2,
34 },
35 {
36 /* terminating entry */
37 },
38};
39
40MODULE_DEVICE_TABLE(platform, ehci_ath79_id_table);
41
42static int ehci_ath79_init(struct usb_hcd *hcd)
43{
44 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
45 struct platform_device *pdev = to_platform_device(hcd->self.controller);
46 const struct platform_device_id *id;
47 int hclength;
48 int ret;
49
50 id = platform_get_device_id(pdev);
51 if (!id) {
52 dev_err(hcd->self.controller, "missing device id\n");
53 return -EINVAL;
54 }
55
56 hclength = HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
57 switch (id->driver_data) {
58 case EHCI_ATH79_IP_V1:
59 ehci->has_synopsys_hc_bug = 1;
60
61 ehci->caps = hcd->regs;
62 ehci->regs = hcd->regs + hclength;
63 break;
64
65 case EHCI_ATH79_IP_V2:
66 hcd->has_tt = 1;
67
68 ehci->caps = hcd->regs + 0x100;
69 ehci->regs = hcd->regs + 0x100 + hclength;
70 break;
71
72 default:
73 BUG();
74 }
75
76 dbg_hcs_params(ehci, "reset");
77 dbg_hcc_params(ehci, "reset");
78 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
79 ehci->sbrn = 0x20;
80
81 ehci_reset(ehci);
82
83 ret = ehci_init(hcd);
84 if (ret)
85 return ret;
86
87 ehci_port_power(ehci, 0);
88
89 return 0;
90}
91
92static const struct hc_driver ehci_ath79_hc_driver = {
93 .description = hcd_name,
94 .product_desc = "Atheros built-in EHCI controller",
95 .hcd_priv_size = sizeof(struct ehci_hcd),
96 .irq = ehci_irq,
97 .flags = HCD_MEMORY | HCD_USB2,
98
99 .reset = ehci_ath79_init,
100 .start = ehci_run,
101 .stop = ehci_stop,
102 .shutdown = ehci_shutdown,
103
104 .urb_enqueue = ehci_urb_enqueue,
105 .urb_dequeue = ehci_urb_dequeue,
106 .endpoint_disable = ehci_endpoint_disable,
107 .endpoint_reset = ehci_endpoint_reset,
108
109 .get_frame_number = ehci_get_frame,
110
111 .hub_status_data = ehci_hub_status_data,
112 .hub_control = ehci_hub_control,
113
114 .relinquish_port = ehci_relinquish_port,
115 .port_handed_over = ehci_port_handed_over,
116
117 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
118};
119
120static int ehci_ath79_probe(struct platform_device *pdev)
121{
122 struct usb_hcd *hcd;
123 struct resource *res;
124 int irq;
125 int ret;
126
127 if (usb_disabled())
128 return -ENODEV;
129
130 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
131 if (!res) {
132 dev_dbg(&pdev->dev, "no IRQ specified\n");
133 return -ENODEV;
134 }
135 irq = res->start;
136
137 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
138 if (!res) {
139 dev_dbg(&pdev->dev, "no base address specified\n");
140 return -ENODEV;
141 }
142
143 hcd = usb_create_hcd(&ehci_ath79_hc_driver, &pdev->dev,
144 dev_name(&pdev->dev));
145 if (!hcd)
146 return -ENOMEM;
147
148 hcd->rsrc_start = res->start;
149 hcd->rsrc_len = res->end - res->start + 1;
150
151 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
152 dev_dbg(&pdev->dev, "controller already in use\n");
153 ret = -EBUSY;
154 goto err_put_hcd;
155 }
156
157 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
158 if (!hcd->regs) {
159 dev_dbg(&pdev->dev, "error mapping memory\n");
160 ret = -EFAULT;
161 goto err_release_region;
162 }
163
164 ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
165 if (ret)
166 goto err_iounmap;
167
168 return 0;
169
170err_iounmap:
171 iounmap(hcd->regs);
172
173err_release_region:
174 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
175err_put_hcd:
176 usb_put_hcd(hcd);
177 return ret;
178}
179
180static int ehci_ath79_remove(struct platform_device *pdev)
181{
182 struct usb_hcd *hcd = platform_get_drvdata(pdev);
183
184 usb_remove_hcd(hcd);
185 iounmap(hcd->regs);
186 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
187 usb_put_hcd(hcd);
188
189 return 0;
190}
191
192static struct platform_driver ehci_ath79_driver = {
193 .probe = ehci_ath79_probe,
194 .remove = ehci_ath79_remove,
195 .id_table = ehci_ath79_id_table,
196 .driver = {
197 .owner = THIS_MODULE,
198 .name = "ath79-ehci",
199 }
200};
201
202MODULE_ALIAS(PLATFORM_MODULE_PREFIX "ath79-ehci");
diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
index b2ed55cb811d..a5a3ef1f0096 100644
--- a/drivers/usb/host/ehci-atmel.c
+++ b/drivers/usb/host/ehci-atmel.c
@@ -56,7 +56,7 @@ static int ehci_atmel_setup(struct usb_hcd *hcd)
56 /* registers start at offset 0x0 */ 56 /* registers start at offset 0x0 */
57 ehci->caps = hcd->regs; 57 ehci->caps = hcd->regs;
58 ehci->regs = hcd->regs + 58 ehci->regs = hcd->regs +
59 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 59 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
60 dbg_hcs_params(ehci, "reset"); 60 dbg_hcs_params(ehci, "reset");
61 dbg_hcc_params(ehci, "reset"); 61 dbg_hcc_params(ehci, "reset");
62 62
diff --git a/drivers/usb/host/ehci-au1xxx.c b/drivers/usb/host/ehci-au1xxx.c
index a869e3c103d3..42ae57409908 100644
--- a/drivers/usb/host/ehci-au1xxx.c
+++ b/drivers/usb/host/ehci-au1xxx.c
@@ -175,7 +175,8 @@ static int ehci_hcd_au1xxx_drv_probe(struct platform_device *pdev)
175 175
176 ehci = hcd_to_ehci(hcd); 176 ehci = hcd_to_ehci(hcd);
177 ehci->caps = hcd->regs; 177 ehci->caps = hcd->regs;
178 ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase)); 178 ehci->regs = hcd->regs +
179 HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
179 /* cache this readonly data; minimize chip reads */ 180 /* cache this readonly data; minimize chip reads */
180 ehci->hcs_params = readl(&ehci->caps->hcs_params); 181 ehci->hcs_params = readl(&ehci->caps->hcs_params);
181 182
@@ -215,10 +216,7 @@ static int ehci_hcd_au1xxx_drv_suspend(struct device *dev)
215 struct usb_hcd *hcd = dev_get_drvdata(dev); 216 struct usb_hcd *hcd = dev_get_drvdata(dev);
216 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 217 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
217 unsigned long flags; 218 unsigned long flags;
218 int rc; 219 int rc = 0;
219
220 return 0;
221 rc = 0;
222 220
223 if (time_before(jiffies, ehci->next_statechange)) 221 if (time_before(jiffies, ehci->next_statechange))
224 msleep(10); 222 msleep(10);
@@ -233,13 +231,13 @@ static int ehci_hcd_au1xxx_drv_suspend(struct device *dev)
233 (void)ehci_readl(ehci, &ehci->regs->intr_enable); 231 (void)ehci_readl(ehci, &ehci->regs->intr_enable);
234 232
235 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 233 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
236
237 au1xxx_stop_ehc();
238 spin_unlock_irqrestore(&ehci->lock, flags); 234 spin_unlock_irqrestore(&ehci->lock, flags);
239 235
240 // could save FLADJ in case of Vaux power loss 236 // could save FLADJ in case of Vaux power loss
241 // ... we'd only use it to handle clock skew 237 // ... we'd only use it to handle clock skew
242 238
239 au1xxx_stop_ehc();
240
243 return rc; 241 return rc;
244} 242}
245 243
diff --git a/drivers/usb/host/ehci-cns3xxx.c b/drivers/usb/host/ehci-cns3xxx.c
index 708a05b5d258..d41745c6f0c4 100644
--- a/drivers/usb/host/ehci-cns3xxx.c
+++ b/drivers/usb/host/ehci-cns3xxx.c
@@ -34,7 +34,7 @@ static int cns3xxx_ehci_init(struct usb_hcd *hcd)
34 34
35 ehci->caps = hcd->regs; 35 ehci->caps = hcd->regs;
36 ehci->regs = hcd->regs 36 ehci->regs = hcd->regs
37 + HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 37 + HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
38 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 38 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
39 39
40 hcd->has_tt = 0; 40 hcd->has_tt = 0;
diff --git a/drivers/usb/host/ehci-dbg.c b/drivers/usb/host/ehci-dbg.c
index 693c29b30521..40a844c1dbb4 100644
--- a/drivers/usb/host/ehci-dbg.c
+++ b/drivers/usb/host/ehci-dbg.c
@@ -726,7 +726,7 @@ static ssize_t fill_registers_buffer(struct debug_buffer *buf)
726 } 726 }
727 727
728 /* Capability Registers */ 728 /* Capability Registers */
729 i = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase)); 729 i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
730 temp = scnprintf (next, size, 730 temp = scnprintf (next, size,
731 "bus %s, device %s\n" 731 "bus %s, device %s\n"
732 "%s\n" 732 "%s\n"
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 5c761df7fa83..f380bf97e5af 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -117,6 +117,9 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver,
117 117
118 pdata->regs = hcd->regs; 118 pdata->regs = hcd->regs;
119 119
120 if (pdata->power_budget)
121 hcd->power_budget = pdata->power_budget;
122
120 /* 123 /*
121 * do platform specific init: check the clock, grab/config pins, etc. 124 * do platform specific init: check the clock, grab/config pins, etc.
122 */ 125 */
@@ -134,6 +137,30 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver,
134 retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); 137 retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
135 if (retval != 0) 138 if (retval != 0)
136 goto err4; 139 goto err4;
140
141#ifdef CONFIG_USB_OTG
142 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
143 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
144
145 ehci->transceiver = otg_get_transceiver();
146 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, transceiver=0x%p\n",
147 hcd, ehci, ehci->transceiver);
148
149 if (ehci->transceiver) {
150 retval = otg_set_host(ehci->transceiver,
151 &ehci_to_hcd(ehci)->self);
152 if (retval) {
153 if (ehci->transceiver)
154 put_device(ehci->transceiver->dev);
155 goto err4;
156 }
157 } else {
158 dev_err(&pdev->dev, "can't find transceiver\n");
159 retval = -ENODEV;
160 goto err4;
161 }
162 }
163#endif
137 return retval; 164 return retval;
138 165
139 err4: 166 err4:
@@ -164,6 +191,12 @@ static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
164 struct platform_device *pdev) 191 struct platform_device *pdev)
165{ 192{
166 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; 193 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
194 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
195
196 if (ehci->transceiver) {
197 otg_set_host(ehci->transceiver, NULL);
198 put_device(ehci->transceiver->dev);
199 }
167 200
168 usb_remove_hcd(hcd); 201 usb_remove_hcd(hcd);
169 202
@@ -291,7 +324,7 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
291 /* EHCI registers start at offset 0x100 */ 324 /* EHCI registers start at offset 0x100 */
292 ehci->caps = hcd->regs + 0x100; 325 ehci->caps = hcd->regs + 0x100;
293 ehci->regs = hcd->regs + 0x100 + 326 ehci->regs = hcd->regs + 0x100 +
294 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 327 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
295 dbg_hcs_params(ehci, "reset"); 328 dbg_hcs_params(ehci, "reset");
296 dbg_hcc_params(ehci, "reset"); 329 dbg_hcc_params(ehci, "reset");
297 330
@@ -328,6 +361,149 @@ struct ehci_fsl {
328 361
329#ifdef CONFIG_PM 362#ifdef CONFIG_PM
330 363
364#ifdef CONFIG_PPC_MPC512x
365static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
366{
367 struct usb_hcd *hcd = dev_get_drvdata(dev);
368 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
369 struct fsl_usb2_platform_data *pdata = dev->platform_data;
370 u32 tmp;
371
372#ifdef DEBUG
373 u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
374 mode &= USBMODE_CM_MASK;
375 tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
376
377 dev_dbg(dev, "suspend=%d already_suspended=%d "
378 "mode=%d usbcmd %08x\n", pdata->suspended,
379 pdata->already_suspended, mode, tmp);
380#endif
381
382 /*
383 * If the controller is already suspended, then this must be a
384 * PM suspend. Remember this fact, so that we will leave the
385 * controller suspended at PM resume time.
386 */
387 if (pdata->suspended) {
388 dev_dbg(dev, "already suspended, leaving early\n");
389 pdata->already_suspended = 1;
390 return 0;
391 }
392
393 dev_dbg(dev, "suspending...\n");
394
395 hcd->state = HC_STATE_SUSPENDED;
396 dev->power.power_state = PMSG_SUSPEND;
397
398 /* ignore non-host interrupts */
399 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
400
401 /* stop the controller */
402 tmp = ehci_readl(ehci, &ehci->regs->command);
403 tmp &= ~CMD_RUN;
404 ehci_writel(ehci, tmp, &ehci->regs->command);
405
406 /* save EHCI registers */
407 pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
408 pdata->pm_command &= ~CMD_RUN;
409 pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
410 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
411 pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
412 pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
413 pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
414 pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
415 pdata->pm_configured_flag =
416 ehci_readl(ehci, &ehci->regs->configured_flag);
417 pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
418 pdata->pm_usbgenctrl = ehci_readl(ehci,
419 hcd->regs + FSL_SOC_USB_USBGENCTRL);
420
421 /* clear the W1C bits */
422 pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
423
424 pdata->suspended = 1;
425
426 /* clear PP to cut power to the port */
427 tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
428 tmp &= ~PORT_POWER;
429 ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
430
431 return 0;
432}
433
434static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
435{
436 struct usb_hcd *hcd = dev_get_drvdata(dev);
437 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
438 struct fsl_usb2_platform_data *pdata = dev->platform_data;
439 u32 tmp;
440
441 dev_dbg(dev, "suspend=%d already_suspended=%d\n",
442 pdata->suspended, pdata->already_suspended);
443
444 /*
445 * If the controller was already suspended at suspend time,
446 * then don't resume it now.
447 */
448 if (pdata->already_suspended) {
449 dev_dbg(dev, "already suspended, leaving early\n");
450 pdata->already_suspended = 0;
451 return 0;
452 }
453
454 if (!pdata->suspended) {
455 dev_dbg(dev, "not suspended, leaving early\n");
456 return 0;
457 }
458
459 pdata->suspended = 0;
460
461 dev_dbg(dev, "resuming...\n");
462
463 /* set host mode */
464 tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
465 ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
466
467 ehci_writel(ehci, pdata->pm_usbgenctrl,
468 hcd->regs + FSL_SOC_USB_USBGENCTRL);
469 ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
470 hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
471
472 /* restore EHCI registers */
473 ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
474 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
475 ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
476 ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
477 ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
478 ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
479 ehci_writel(ehci, pdata->pm_configured_flag,
480 &ehci->regs->configured_flag);
481 ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
482
483 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
484 hcd->state = HC_STATE_RUNNING;
485 dev->power.power_state = PMSG_ON;
486
487 tmp = ehci_readl(ehci, &ehci->regs->command);
488 tmp |= CMD_RUN;
489 ehci_writel(ehci, tmp, &ehci->regs->command);
490
491 usb_hcd_resume_root_hub(hcd);
492
493 return 0;
494}
495#else
496static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
497{
498 return 0;
499}
500
501static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
502{
503 return 0;
504}
505#endif /* CONFIG_PPC_MPC512x */
506
331static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd) 507static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
332{ 508{
333 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 509 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
@@ -341,6 +517,11 @@ static int ehci_fsl_drv_suspend(struct device *dev)
341 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); 517 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
342 void __iomem *non_ehci = hcd->regs; 518 void __iomem *non_ehci = hcd->regs;
343 519
520 if (of_device_is_compatible(dev->parent->of_node,
521 "fsl,mpc5121-usb2-dr")) {
522 return ehci_fsl_mpc512x_drv_suspend(dev);
523 }
524
344 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd), 525 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
345 device_may_wakeup(dev)); 526 device_may_wakeup(dev));
346 if (!fsl_deep_sleep()) 527 if (!fsl_deep_sleep())
@@ -357,6 +538,11 @@ static int ehci_fsl_drv_resume(struct device *dev)
357 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 538 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
358 void __iomem *non_ehci = hcd->regs; 539 void __iomem *non_ehci = hcd->regs;
359 540
541 if (of_device_is_compatible(dev->parent->of_node,
542 "fsl,mpc5121-usb2-dr")) {
543 return ehci_fsl_mpc512x_drv_resume(dev);
544 }
545
360 ehci_prepare_ports_for_controller_resume(ehci); 546 ehci_prepare_ports_for_controller_resume(ehci);
361 if (!fsl_deep_sleep()) 547 if (!fsl_deep_sleep())
362 return 0; 548 return 0;
@@ -391,6 +577,38 @@ static struct dev_pm_ops ehci_fsl_pm_ops = {
391#define EHCI_FSL_PM_OPS NULL 577#define EHCI_FSL_PM_OPS NULL
392#endif /* CONFIG_PM */ 578#endif /* CONFIG_PM */
393 579
580#ifdef CONFIG_USB_OTG
581static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
582{
583 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
584 u32 status;
585
586 if (!port)
587 return -EINVAL;
588
589 port--;
590
591 /* start port reset before HNP protocol time out */
592 status = readl(&ehci->regs->port_status[port]);
593 if (!(status & PORT_CONNECT))
594 return -ENODEV;
595
596 /* khubd will finish the reset later */
597 if (ehci_is_TDI(ehci)) {
598 writel(PORT_RESET |
599 (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
600 &ehci->regs->port_status[port]);
601 } else {
602 writel(PORT_RESET, &ehci->regs->port_status[port]);
603 }
604
605 return 0;
606}
607#else
608#define ehci_start_port_reset NULL
609#endif /* CONFIG_USB_OTG */
610
611
394static const struct hc_driver ehci_fsl_hc_driver = { 612static const struct hc_driver ehci_fsl_hc_driver = {
395 .description = hcd_name, 613 .description = hcd_name,
396 .product_desc = "Freescale On-Chip EHCI Host Controller", 614 .product_desc = "Freescale On-Chip EHCI Host Controller",
@@ -430,6 +648,7 @@ static const struct hc_driver ehci_fsl_hc_driver = {
430 .hub_control = ehci_hub_control, 648 .hub_control = ehci_hub_control,
431 .bus_suspend = ehci_bus_suspend, 649 .bus_suspend = ehci_bus_suspend,
432 .bus_resume = ehci_bus_resume, 650 .bus_resume = ehci_bus_resume,
651 .start_port_reset = ehci_start_port_reset,
433 .relinquish_port = ehci_relinquish_port, 652 .relinquish_port = ehci_relinquish_port,
434 .port_handed_over = ehci_port_handed_over, 653 .port_handed_over = ehci_port_handed_over,
435 654
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index 3fabed33d940..491806221165 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -27,6 +27,10 @@
27#define PORT_PTS_SERIAL (3<<30) 27#define PORT_PTS_SERIAL (3<<30)
28#define PORT_PTS_PTW (1<<28) 28#define PORT_PTS_PTW (1<<28)
29#define FSL_SOC_USB_PORTSC2 0x188 29#define FSL_SOC_USB_PORTSC2 0x188
30#define FSL_SOC_USB_USBMODE 0x1a8
31#define USBMODE_CM_MASK (3 << 0) /* controller mode mask */
32#define USBMODE_CM_HOST (3 << 0) /* controller mode: host */
33#define USBMODE_ES (1 << 2) /* (Big) Endian Select */
30 34
31#define FSL_SOC_USB_USBGENCTRL 0x200 35#define FSL_SOC_USB_USBGENCTRL 0x200
32#define USBGENCTRL_PPP (1 << 3) 36#define USBGENCTRL_PPP (1 << 3)
diff --git a/drivers/usb/host/ehci-grlib.c b/drivers/usb/host/ehci-grlib.c
new file mode 100644
index 000000000000..93b230dc51a2
--- /dev/null
+++ b/drivers/usb/host/ehci-grlib.c
@@ -0,0 +1,242 @@
1/*
2 * Driver for Aeroflex Gaisler GRLIB GRUSBHC EHCI host controller
3 *
4 * GRUSBHC is typically found on LEON/GRLIB SoCs
5 *
6 * (c) Jan Andersson <jan@gaisler.com>
7 *
8 * Based on ehci-ppc-of.c which is:
9 * (c) Valentine Barshak <vbarshak@ru.mvista.com>
10 * and in turn based on "ehci-ppc-soc.c" by Stefan Roese <sr@denx.de>
11 * and "ohci-ppc-of.c" by Sylvain Munaut <tnt@246tNt.com>
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful, but
19 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
20 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
21 * for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software Foundation,
25 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28
29#include <linux/signal.h>
30
31#include <linux/of_irq.h>
32#include <linux/of_address.h>
33#include <linux/of_platform.h>
34
35#define GRUSBHC_HCIVERSION 0x0100 /* Known value of cap. reg. HCIVERSION */
36
37/* called during probe() after chip reset completes */
38static int ehci_grlib_setup(struct usb_hcd *hcd)
39{
40 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
41 int retval;
42
43 retval = ehci_halt(ehci);
44 if (retval)
45 return retval;
46
47 retval = ehci_init(hcd);
48 if (retval)
49 return retval;
50
51 ehci->sbrn = 0x20;
52 ehci_port_power(ehci, 1);
53
54 return ehci_reset(ehci);
55}
56
57
58static const struct hc_driver ehci_grlib_hc_driver = {
59 .description = hcd_name,
60 .product_desc = "GRLIB GRUSBHC EHCI",
61 .hcd_priv_size = sizeof(struct ehci_hcd),
62
63 /*
64 * generic hardware linkage
65 */
66 .irq = ehci_irq,
67 .flags = HCD_MEMORY | HCD_USB2,
68
69 /*
70 * basic lifecycle operations
71 */
72 .reset = ehci_grlib_setup,
73 .start = ehci_run,
74 .stop = ehci_stop,
75 .shutdown = ehci_shutdown,
76
77 /*
78 * managing i/o requests and associated device resources
79 */
80 .urb_enqueue = ehci_urb_enqueue,
81 .urb_dequeue = ehci_urb_dequeue,
82 .endpoint_disable = ehci_endpoint_disable,
83 .endpoint_reset = ehci_endpoint_reset,
84
85 /*
86 * scheduling support
87 */
88 .get_frame_number = ehci_get_frame,
89
90 /*
91 * root hub support
92 */
93 .hub_status_data = ehci_hub_status_data,
94 .hub_control = ehci_hub_control,
95#ifdef CONFIG_PM
96 .bus_suspend = ehci_bus_suspend,
97 .bus_resume = ehci_bus_resume,
98#endif
99 .relinquish_port = ehci_relinquish_port,
100 .port_handed_over = ehci_port_handed_over,
101
102 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
103};
104
105
106static int __devinit ehci_hcd_grlib_probe(struct platform_device *op)
107{
108 struct device_node *dn = op->dev.of_node;
109 struct usb_hcd *hcd;
110 struct ehci_hcd *ehci = NULL;
111 struct resource res;
112 u32 hc_capbase;
113 int irq;
114 int rv;
115
116 if (usb_disabled())
117 return -ENODEV;
118
119 dev_dbg(&op->dev, "initializing GRUSBHC EHCI USB Controller\n");
120
121 rv = of_address_to_resource(dn, 0, &res);
122 if (rv)
123 return rv;
124
125 /* usb_create_hcd requires dma_mask != NULL */
126 op->dev.dma_mask = &op->dev.coherent_dma_mask;
127 hcd = usb_create_hcd(&ehci_grlib_hc_driver, &op->dev,
128 "GRUSBHC EHCI USB");
129 if (!hcd)
130 return -ENOMEM;
131
132 hcd->rsrc_start = res.start;
133 hcd->rsrc_len = res.end - res.start + 1;
134
135 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
136 printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__);
137 rv = -EBUSY;
138 goto err_rmr;
139 }
140
141 irq = irq_of_parse_and_map(dn, 0);
142 if (irq == NO_IRQ) {
143 printk(KERN_ERR "%s: irq_of_parse_and_map failed\n", __FILE__);
144 rv = -EBUSY;
145 goto err_irq;
146 }
147
148 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
149 if (!hcd->regs) {
150 printk(KERN_ERR "%s: ioremap failed\n", __FILE__);
151 rv = -ENOMEM;
152 goto err_ioremap;
153 }
154
155 ehci = hcd_to_ehci(hcd);
156
157 ehci->caps = hcd->regs;
158
159 /* determine endianness of this implementation */
160 hc_capbase = ehci_readl(ehci, &ehci->caps->hc_capbase);
161 if (HC_VERSION(ehci, hc_capbase) != GRUSBHC_HCIVERSION) {
162 ehci->big_endian_mmio = 1;
163 ehci->big_endian_desc = 1;
164 ehci->big_endian_capbase = 1;
165 }
166
167 ehci->regs = hcd->regs +
168 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
169
170 /* cache this readonly data; minimize chip reads */
171 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
172
173 rv = usb_add_hcd(hcd, irq, 0);
174 if (rv)
175 goto err_ehci;
176
177 return 0;
178
179err_ehci:
180 iounmap(hcd->regs);
181err_ioremap:
182 irq_dispose_mapping(irq);
183err_irq:
184 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
185err_rmr:
186 usb_put_hcd(hcd);
187
188 return rv;
189}
190
191
192static int ehci_hcd_grlib_remove(struct platform_device *op)
193{
194 struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
195
196 dev_set_drvdata(&op->dev, NULL);
197
198 dev_dbg(&op->dev, "stopping GRLIB GRUSBHC EHCI USB Controller\n");
199
200 usb_remove_hcd(hcd);
201
202 iounmap(hcd->regs);
203 irq_dispose_mapping(hcd->irq);
204 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
205
206 usb_put_hcd(hcd);
207
208 return 0;
209}
210
211
212static void ehci_hcd_grlib_shutdown(struct platform_device *op)
213{
214 struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
215
216 if (hcd->driver->shutdown)
217 hcd->driver->shutdown(hcd);
218}
219
220
221static const struct of_device_id ehci_hcd_grlib_of_match[] = {
222 {
223 .name = "GAISLER_EHCI",
224 },
225 {
226 .name = "01_026",
227 },
228 {},
229};
230MODULE_DEVICE_TABLE(of, ehci_hcd_grlib_of_match);
231
232
233static struct platform_driver ehci_grlib_driver = {
234 .probe = ehci_hcd_grlib_probe,
235 .remove = ehci_hcd_grlib_remove,
236 .shutdown = ehci_hcd_grlib_shutdown,
237 .driver = {
238 .name = "grlib-ehci",
239 .owner = THIS_MODULE,
240 .of_match_table = ehci_hcd_grlib_of_match,
241 },
242};
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 78561d112c04..c5719cd258c3 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -739,7 +739,7 @@ static int ehci_run (struct usb_hcd *hcd)
739 up_write(&ehci_cf_port_reset_rwsem); 739 up_write(&ehci_cf_port_reset_rwsem);
740 ehci->last_periodic_enable = ktime_get_real(); 740 ehci->last_periodic_enable = ktime_get_real();
741 741
742 temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase)); 742 temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
743 ehci_info (ehci, 743 ehci_info (ehci,
744 "USB %x.%x started, EHCI %x.%02x%s\n", 744 "USB %x.%x started, EHCI %x.%02x%s\n",
745 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), 745 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
@@ -1265,6 +1265,21 @@ MODULE_LICENSE ("GPL");
1265#define PLATFORM_DRIVER tegra_ehci_driver 1265#define PLATFORM_DRIVER tegra_ehci_driver
1266#endif 1266#endif
1267 1267
1268#ifdef CONFIG_USB_EHCI_S5P
1269#include "ehci-s5p.c"
1270#define PLATFORM_DRIVER s5p_ehci_driver
1271#endif
1272
1273#ifdef CONFIG_USB_EHCI_ATH79
1274#include "ehci-ath79.c"
1275#define PLATFORM_DRIVER ehci_ath79_driver
1276#endif
1277
1278#ifdef CONFIG_SPARC_LEON
1279#include "ehci-grlib.c"
1280#define PLATFORM_DRIVER ehci_grlib_driver
1281#endif
1282
1268#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \ 1283#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1269 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \ 1284 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1270 !defined(XILINX_OF_PLATFORM_DRIVER) 1285 !defined(XILINX_OF_PLATFORM_DRIVER)
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index d05ea03cfb4d..ea6184bf48d0 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -27,6 +27,7 @@
27 */ 27 */
28 28
29/*-------------------------------------------------------------------------*/ 29/*-------------------------------------------------------------------------*/
30#include <linux/usb/otg.h>
30 31
31#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) 32#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
32 33
@@ -127,7 +128,7 @@ static int ehci_port_change(struct ehci_hcd *ehci)
127 return 0; 128 return 0;
128} 129}
129 130
130static void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci, 131static __maybe_unused void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
131 bool suspending, bool do_wakeup) 132 bool suspending, bool do_wakeup)
132{ 133{
133 int port; 134 int port;
@@ -801,6 +802,13 @@ static int ehci_hub_control (
801 goto error; 802 goto error;
802 if (ehci->no_selective_suspend) 803 if (ehci->no_selective_suspend)
803 break; 804 break;
805#ifdef CONFIG_USB_OTG
806 if ((hcd->self.otg_port == (wIndex + 1))
807 && hcd->self.b_hnp_enable) {
808 otg_start_hnp(ehci->transceiver);
809 break;
810 }
811#endif
804 if (!(temp & PORT_SUSPEND)) 812 if (!(temp & PORT_SUSPEND))
805 break; 813 break;
806 if ((temp & PORT_PE) == 0) 814 if ((temp & PORT_PE) == 0)
diff --git a/drivers/usb/host/ehci-ixp4xx.c b/drivers/usb/host/ehci-ixp4xx.c
index 89b7c70c6ed6..50e600d26e28 100644
--- a/drivers/usb/host/ehci-ixp4xx.c
+++ b/drivers/usb/host/ehci-ixp4xx.c
@@ -23,7 +23,7 @@ static int ixp4xx_ehci_init(struct usb_hcd *hcd)
23 23
24 ehci->caps = hcd->regs + 0x100; 24 ehci->caps = hcd->regs + 0x100;
25 ehci->regs = hcd->regs + 0x100 25 ehci->regs = hcd->regs + 0x100
26 + HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 26 + HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
27 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 27 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
28 28
29 hcd->has_tt = 1; 29 hcd->has_tt = 1;
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index 9ce1b0bc186d..b5a0bf649c95 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -41,7 +41,7 @@ static int ehci_msm_reset(struct usb_hcd *hcd)
41 41
42 ehci->caps = USB_CAPLENGTH; 42 ehci->caps = USB_CAPLENGTH;
43 ehci->regs = USB_CAPLENGTH + 43 ehci->regs = USB_CAPLENGTH +
44 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 44 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
45 dbg_hcs_params(ehci, "reset"); 45 dbg_hcs_params(ehci, "reset");
46 dbg_hcc_params(ehci, "reset"); 46 dbg_hcc_params(ehci, "reset");
47 47
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index 25c8c10bb689..0c058be35a38 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -208,7 +208,7 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev)
208 /* EHCI registers start at offset 0x100 */ 208 /* EHCI registers start at offset 0x100 */
209 ehci->caps = hcd->regs + 0x100; 209 ehci->caps = hcd->regs + 0x100;
210 ehci->regs = hcd->regs + 0x100 + 210 ehci->regs = hcd->regs + 0x100 +
211 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 211 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
212 212
213 /* set up the PORTSCx register */ 213 /* set up the PORTSCx register */
214 ehci_writel(ehci, pdata->portsc, &ehci->regs->port_status[0]); 214 ehci_writel(ehci, pdata->portsc, &ehci->regs->port_status[0]);
diff --git a/drivers/usb/host/ehci-octeon.c b/drivers/usb/host/ehci-octeon.c
index a31a031178a8..ff55757ba7d8 100644
--- a/drivers/usb/host/ehci-octeon.c
+++ b/drivers/usb/host/ehci-octeon.c
@@ -151,7 +151,7 @@ static int ehci_octeon_drv_probe(struct platform_device *pdev)
151 151
152 ehci->caps = hcd->regs; 152 ehci->caps = hcd->regs;
153 ehci->regs = hcd->regs + 153 ehci->regs = hcd->regs +
154 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 154 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
155 /* cache this readonly data; minimize chip reads */ 155 /* cache this readonly data; minimize chip reads */
156 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 156 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
157 157
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 627f3a678759..55a57c23dd0f 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -208,7 +208,7 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
208 /* we know this is the memory we want, no need to ioremap again */ 208 /* we know this is the memory we want, no need to ioremap again */
209 omap_ehci->caps = hcd->regs; 209 omap_ehci->caps = hcd->regs;
210 omap_ehci->regs = hcd->regs 210 omap_ehci->regs = hcd->regs
211 + HC_LENGTH(readl(&omap_ehci->caps->hc_capbase)); 211 + HC_LENGTH(ehci, readl(&omap_ehci->caps->hc_capbase));
212 212
213 dbg_hcs_params(omap_ehci, "reset"); 213 dbg_hcs_params(omap_ehci, "reset");
214 dbg_hcc_params(omap_ehci, "reset"); 214 dbg_hcc_params(omap_ehci, "reset");
diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
index 281e094e1c18..395bdb0248d5 100644
--- a/drivers/usb/host/ehci-orion.c
+++ b/drivers/usb/host/ehci-orion.c
@@ -251,7 +251,7 @@ static int __devinit ehci_orion_drv_probe(struct platform_device *pdev)
251 ehci = hcd_to_ehci(hcd); 251 ehci = hcd_to_ehci(hcd);
252 ehci->caps = hcd->regs + 0x100; 252 ehci->caps = hcd->regs + 0x100;
253 ehci->regs = hcd->regs + 0x100 + 253 ehci->regs = hcd->regs + 0x100 +
254 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 254 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
255 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 255 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
256 hcd->has_tt = 1; 256 hcd->has_tt = 1;
257 ehci->sbrn = 0x20; 257 ehci->sbrn = 0x20;
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index d5eaea7caf89..660b80a75cac 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -70,7 +70,7 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
70 70
71 ehci->caps = hcd->regs; 71 ehci->caps = hcd->regs;
72 ehci->regs = hcd->regs + 72 ehci->regs = hcd->regs +
73 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 73 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
74 74
75 dbg_hcs_params(ehci, "reset"); 75 dbg_hcs_params(ehci, "reset");
76 dbg_hcc_params(ehci, "reset"); 76 dbg_hcc_params(ehci, "reset");
diff --git a/drivers/usb/host/ehci-pmcmsp.c b/drivers/usb/host/ehci-pmcmsp.c
index a2168642175b..cd69099cda19 100644
--- a/drivers/usb/host/ehci-pmcmsp.c
+++ b/drivers/usb/host/ehci-pmcmsp.c
@@ -83,7 +83,7 @@ static int ehci_msp_setup(struct usb_hcd *hcd)
83 83
84 ehci->caps = hcd->regs; 84 ehci->caps = hcd->regs;
85 ehci->regs = hcd->regs + 85 ehci->regs = hcd->regs +
86 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 86 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
87 dbg_hcs_params(ehci, "reset"); 87 dbg_hcs_params(ehci, "reset");
88 dbg_hcc_params(ehci, "reset"); 88 dbg_hcc_params(ehci, "reset");
89 89
diff --git a/drivers/usb/host/ehci-ppc-of.c b/drivers/usb/host/ehci-ppc-of.c
index 1f09f253697e..8552db6c29c9 100644
--- a/drivers/usb/host/ehci-ppc-of.c
+++ b/drivers/usb/host/ehci-ppc-of.c
@@ -179,7 +179,7 @@ static int __devinit ehci_hcd_ppc_of_probe(struct platform_device *op)
179 179
180 ehci->caps = hcd->regs; 180 ehci->caps = hcd->regs;
181 ehci->regs = hcd->regs + 181 ehci->regs = hcd->regs +
182 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 182 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
183 183
184 /* cache this readonly data; minimize chip reads */ 184 /* cache this readonly data; minimize chip reads */
185 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 185 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
diff --git a/drivers/usb/host/ehci-ps3.c b/drivers/usb/host/ehci-ps3.c
index 1dee33b9139e..64626a777d61 100644
--- a/drivers/usb/host/ehci-ps3.c
+++ b/drivers/usb/host/ehci-ps3.c
@@ -29,7 +29,7 @@ static int ps3_ehci_hc_reset(struct usb_hcd *hcd)
29 ehci->big_endian_mmio = 1; 29 ehci->big_endian_mmio = 1;
30 30
31 ehci->caps = hcd->regs; 31 ehci->caps = hcd->regs;
32 ehci->regs = hcd->regs + HC_LENGTH(ehci_readl(ehci, 32 ehci->regs = hcd->regs + HC_LENGTH(ehci, ehci_readl(ehci,
33 &ehci->caps->hc_capbase)); 33 &ehci->caps->hc_capbase));
34 34
35 dbg_hcs_params(ehci, "reset"); 35 dbg_hcs_params(ehci, "reset");
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index 42abd0f603bf..a46d6a1388c9 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -1183,6 +1183,10 @@ static void end_unlink_async (struct ehci_hcd *ehci)
1183 ehci->reclaim = NULL; 1183 ehci->reclaim = NULL;
1184 start_unlink_async (ehci, next); 1184 start_unlink_async (ehci, next);
1185 } 1185 }
1186
1187 if (ehci->has_synopsys_hc_bug)
1188 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1189 &ehci->regs->async_next);
1186} 1190}
1187 1191
1188/* makes sure the async qh will become idle */ 1192/* makes sure the async qh will become idle */
diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c
new file mode 100644
index 000000000000..321a03301ad2
--- /dev/null
+++ b/drivers/usb/host/ehci-s5p.c
@@ -0,0 +1,202 @@
1/*
2 * SAMSUNG S5P USB HOST EHCI Controller
3 *
4 * Copyright (C) 2011 Samsung Electronics Co.Ltd
5 * Author: Jingoo Han <jg1.han@samsung.com>
6 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/clk.h>
16#include <linux/platform_device.h>
17#include <mach/regs-pmu.h>
18#include <plat/cpu.h>
19#include <plat/ehci.h>
20#include <plat/usb-phy.h>
21
22struct s5p_ehci_hcd {
23 struct device *dev;
24 struct usb_hcd *hcd;
25 struct clk *clk;
26};
27
28static const struct hc_driver s5p_ehci_hc_driver = {
29 .description = hcd_name,
30 .product_desc = "S5P EHCI Host Controller",
31 .hcd_priv_size = sizeof(struct ehci_hcd),
32
33 .irq = ehci_irq,
34 .flags = HCD_MEMORY | HCD_USB2,
35
36 .reset = ehci_init,
37 .start = ehci_run,
38 .stop = ehci_stop,
39 .shutdown = ehci_shutdown,
40
41 .get_frame_number = ehci_get_frame,
42
43 .urb_enqueue = ehci_urb_enqueue,
44 .urb_dequeue = ehci_urb_dequeue,
45 .endpoint_disable = ehci_endpoint_disable,
46 .endpoint_reset = ehci_endpoint_reset,
47
48 .hub_status_data = ehci_hub_status_data,
49 .hub_control = ehci_hub_control,
50 .bus_suspend = ehci_bus_suspend,
51 .bus_resume = ehci_bus_resume,
52
53 .relinquish_port = ehci_relinquish_port,
54 .port_handed_over = ehci_port_handed_over,
55
56 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
57};
58
59static int s5p_ehci_probe(struct platform_device *pdev)
60{
61 struct s5p_ehci_platdata *pdata;
62 struct s5p_ehci_hcd *s5p_ehci;
63 struct usb_hcd *hcd;
64 struct ehci_hcd *ehci;
65 struct resource *res;
66 int irq;
67 int err;
68
69 pdata = pdev->dev.platform_data;
70 if (!pdata) {
71 dev_err(&pdev->dev, "No platform data defined\n");
72 return -EINVAL;
73 }
74
75 s5p_ehci = kzalloc(sizeof(struct s5p_ehci_hcd), GFP_KERNEL);
76 if (!s5p_ehci)
77 return -ENOMEM;
78
79 s5p_ehci->dev = &pdev->dev;
80
81 hcd = usb_create_hcd(&s5p_ehci_hc_driver, &pdev->dev,
82 dev_name(&pdev->dev));
83 if (!hcd) {
84 dev_err(&pdev->dev, "Unable to create HCD\n");
85 err = -ENOMEM;
86 goto fail_hcd;
87 }
88
89 s5p_ehci->clk = clk_get(&pdev->dev, "usbhost");
90
91 if (IS_ERR(s5p_ehci->clk)) {
92 dev_err(&pdev->dev, "Failed to get usbhost clock\n");
93 err = PTR_ERR(s5p_ehci->clk);
94 goto fail_clk;
95 }
96
97 err = clk_enable(s5p_ehci->clk);
98 if (err)
99 goto fail_clken;
100
101 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
102 if (!res) {
103 dev_err(&pdev->dev, "Failed to get I/O memory\n");
104 err = -ENXIO;
105 goto fail_io;
106 }
107
108 hcd->rsrc_start = res->start;
109 hcd->rsrc_len = resource_size(res);
110 hcd->regs = ioremap(res->start, resource_size(res));
111 if (!hcd->regs) {
112 dev_err(&pdev->dev, "Failed to remap I/O memory\n");
113 err = -ENOMEM;
114 goto fail_io;
115 }
116
117 irq = platform_get_irq(pdev, 0);
118 if (!irq) {
119 dev_err(&pdev->dev, "Failed to get IRQ\n");
120 err = -ENODEV;
121 goto fail;
122 }
123
124 if (pdata->phy_init)
125 pdata->phy_init(pdev, S5P_USB_PHY_HOST);
126
127 ehci = hcd_to_ehci(hcd);
128 ehci->caps = hcd->regs;
129 ehci->regs = hcd->regs +
130 HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
131
132 dbg_hcs_params(ehci, "reset");
133 dbg_hcc_params(ehci, "reset");
134
135 /* cache this readonly data; minimize chip reads */
136 ehci->hcs_params = readl(&ehci->caps->hcs_params);
137
138 err = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
139 if (err) {
140 dev_err(&pdev->dev, "Failed to add USB HCD\n");
141 goto fail;
142 }
143
144 platform_set_drvdata(pdev, s5p_ehci);
145
146 return 0;
147
148fail:
149 iounmap(hcd->regs);
150fail_io:
151 clk_disable(s5p_ehci->clk);
152fail_clken:
153 clk_put(s5p_ehci->clk);
154fail_clk:
155 usb_put_hcd(hcd);
156fail_hcd:
157 kfree(s5p_ehci);
158 return err;
159}
160
161static int s5p_ehci_remove(struct platform_device *pdev)
162{
163 struct s5p_ehci_platdata *pdata = pdev->dev.platform_data;
164 struct s5p_ehci_hcd *s5p_ehci = platform_get_drvdata(pdev);
165 struct usb_hcd *hcd = s5p_ehci->hcd;
166
167 usb_remove_hcd(hcd);
168
169 if (pdata && pdata->phy_exit)
170 pdata->phy_exit(pdev, S5P_USB_PHY_HOST);
171
172 iounmap(hcd->regs);
173
174 clk_disable(s5p_ehci->clk);
175 clk_put(s5p_ehci->clk);
176
177 usb_put_hcd(hcd);
178 kfree(s5p_ehci);
179
180 return 0;
181}
182
183static void s5p_ehci_shutdown(struct platform_device *pdev)
184{
185 struct s5p_ehci_hcd *s5p_ehci = platform_get_drvdata(pdev);
186 struct usb_hcd *hcd = s5p_ehci->hcd;
187
188 if (hcd->driver->shutdown)
189 hcd->driver->shutdown(hcd);
190}
191
192static struct platform_driver s5p_ehci_driver = {
193 .probe = s5p_ehci_probe,
194 .remove = s5p_ehci_remove,
195 .shutdown = s5p_ehci_shutdown,
196 .driver = {
197 .name = "s5p-ehci",
198 .owner = THIS_MODULE,
199 }
200};
201
202MODULE_ALIAS("platform:s5p-ehci");
diff --git a/drivers/usb/host/ehci-sh.c b/drivers/usb/host/ehci-sh.c
index 595f70f42b52..86a95bb80a61 100644
--- a/drivers/usb/host/ehci-sh.c
+++ b/drivers/usb/host/ehci-sh.c
@@ -23,7 +23,7 @@ static int ehci_sh_reset(struct usb_hcd *hcd)
23 int ret; 23 int ret;
24 24
25 ehci->caps = hcd->regs; 25 ehci->caps = hcd->regs;
26 ehci->regs = hcd->regs + HC_LENGTH(ehci_readl(ehci, 26 ehci->regs = hcd->regs + HC_LENGTH(ehci, ehci_readl(ehci,
27 &ehci->caps->hc_capbase)); 27 &ehci->caps->hc_capbase));
28 28
29 dbg_hcs_params(ehci, "reset"); 29 dbg_hcs_params(ehci, "reset");
diff --git a/drivers/usb/host/ehci-spear.c b/drivers/usb/host/ehci-spear.c
index 75c00873443d..dbf1e4ef3c17 100644
--- a/drivers/usb/host/ehci-spear.c
+++ b/drivers/usb/host/ehci-spear.c
@@ -38,7 +38,7 @@ static int ehci_spear_setup(struct usb_hcd *hcd)
38 38
39 /* registers start at offset 0x0 */ 39 /* registers start at offset 0x0 */
40 ehci->caps = hcd->regs; 40 ehci->caps = hcd->regs;
41 ehci->regs = hcd->regs + HC_LENGTH(ehci_readl(ehci, 41 ehci->regs = hcd->regs + HC_LENGTH(ehci, ehci_readl(ehci,
42 &ehci->caps->hc_capbase)); 42 &ehci->caps->hc_capbase));
43 /* cache this readonly data; minimize chip reads */ 43 /* cache this readonly data; minimize chip reads */
44 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 44 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index a516af28c29b..02b2bfd49a10 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -58,6 +58,71 @@ static void tegra_ehci_power_down(struct usb_hcd *hcd)
58 clk_disable(tegra->emc_clk); 58 clk_disable(tegra->emc_clk);
59} 59}
60 60
61static int tegra_ehci_internal_port_reset(
62 struct ehci_hcd *ehci,
63 u32 __iomem *portsc_reg
64)
65{
66 u32 temp;
67 unsigned long flags;
68 int retval = 0;
69 int i, tries;
70 u32 saved_usbintr;
71
72 spin_lock_irqsave(&ehci->lock, flags);
73 saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
74 /* disable USB interrupt */
75 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
76 spin_unlock_irqrestore(&ehci->lock, flags);
77
78 /*
79 * Here we have to do Port Reset at most twice for
80 * Port Enable bit to be set.
81 */
82 for (i = 0; i < 2; i++) {
83 temp = ehci_readl(ehci, portsc_reg);
84 temp |= PORT_RESET;
85 ehci_writel(ehci, temp, portsc_reg);
86 mdelay(10);
87 temp &= ~PORT_RESET;
88 ehci_writel(ehci, temp, portsc_reg);
89 mdelay(1);
90 tries = 100;
91 do {
92 mdelay(1);
93 /*
94 * Up to this point, Port Enable bit is
95 * expected to be set after 2 ms waiting.
96 * USB1 usually takes extra 45 ms, for safety,
97 * we take 100 ms as timeout.
98 */
99 temp = ehci_readl(ehci, portsc_reg);
100 } while (!(temp & PORT_PE) && tries--);
101 if (temp & PORT_PE)
102 break;
103 }
104 if (i == 2)
105 retval = -ETIMEDOUT;
106
107 /*
108 * Clear Connect Status Change bit if it's set.
109 * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared.
110 */
111 if (temp & PORT_CSC)
112 ehci_writel(ehci, PORT_CSC, portsc_reg);
113
114 /*
115 * Write to clear any interrupt status bits that might be set
116 * during port reset.
117 */
118 temp = ehci_readl(ehci, &ehci->regs->status);
119 ehci_writel(ehci, temp, &ehci->regs->status);
120
121 /* restore original interrupt enable bits */
122 ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
123 return retval;
124}
125
61static int tegra_ehci_hub_control( 126static int tegra_ehci_hub_control(
62 struct usb_hcd *hcd, 127 struct usb_hcd *hcd,
63 u16 typeReq, 128 u16 typeReq,
@@ -121,6 +186,13 @@ static int tegra_ehci_hub_control(
121 goto done; 186 goto done;
122 } 187 }
123 188
189 /* For USB1 port we need to issue Port Reset twice internally */
190 if (tegra->phy->instance == 0 &&
191 (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) {
192 spin_unlock_irqrestore(&ehci->lock, flags);
193 return tegra_ehci_internal_port_reset(ehci, status_reg);
194 }
195
124 /* 196 /*
125 * Tegra host controller will time the resume operation to clear the bit 197 * Tegra host controller will time the resume operation to clear the bit
126 * when the port control state switches to HS or FS Idle. This behavior 198 * when the port control state switches to HS or FS Idle. This behavior
@@ -328,7 +400,7 @@ static int tegra_ehci_setup(struct usb_hcd *hcd)
328 /* EHCI registers start at offset 0x100 */ 400 /* EHCI registers start at offset 0x100 */
329 ehci->caps = hcd->regs + 0x100; 401 ehci->caps = hcd->regs + 0x100;
330 ehci->regs = hcd->regs + 0x100 + 402 ehci->regs = hcd->regs + 0x100 +
331 HC_LENGTH(readl(&ehci->caps->hc_capbase)); 403 HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
332 404
333 dbg_hcs_params(ehci, "reset"); 405 dbg_hcs_params(ehci, "reset");
334 dbg_hcc_params(ehci, "reset"); 406 dbg_hcc_params(ehci, "reset");
diff --git a/drivers/usb/host/ehci-vt8500.c b/drivers/usb/host/ehci-vt8500.c
index 20168062035a..47d749631bc7 100644
--- a/drivers/usb/host/ehci-vt8500.c
+++ b/drivers/usb/host/ehci-vt8500.c
@@ -121,7 +121,8 @@ static int vt8500_ehci_drv_probe(struct platform_device *pdev)
121 121
122 ehci = hcd_to_ehci(hcd); 122 ehci = hcd_to_ehci(hcd);
123 ehci->caps = hcd->regs; 123 ehci->caps = hcd->regs;
124 ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase)); 124 ehci->regs = hcd->regs +
125 HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
125 126
126 dbg_hcs_params(ehci, "reset"); 127 dbg_hcs_params(ehci, "reset");
127 dbg_hcc_params(ehci, "reset"); 128 dbg_hcc_params(ehci, "reset");
diff --git a/drivers/usb/host/ehci-w90x900.c b/drivers/usb/host/ehci-w90x900.c
index 6bc35809a5c6..52a027aaa370 100644
--- a/drivers/usb/host/ehci-w90x900.c
+++ b/drivers/usb/host/ehci-w90x900.c
@@ -57,7 +57,7 @@ static int __devinit usb_w90x900_probe(const struct hc_driver *driver,
57 ehci = hcd_to_ehci(hcd); 57 ehci = hcd_to_ehci(hcd);
58 ehci->caps = hcd->regs; 58 ehci->caps = hcd->regs;
59 ehci->regs = hcd->regs + 59 ehci->regs = hcd->regs +
60 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 60 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
61 61
62 /* enable PHY 0,1,the regs only apply to w90p910 62 /* enable PHY 0,1,the regs only apply to w90p910
63 * 0xA4,0xA8 were offsets of PHY0 and PHY1 controller of 63 * 0xA4,0xA8 were offsets of PHY0 and PHY1 controller of
diff --git a/drivers/usb/host/ehci-xilinx-of.c b/drivers/usb/host/ehci-xilinx-of.c
index effc58d7af8b..a64d6d66d760 100644
--- a/drivers/usb/host/ehci-xilinx-of.c
+++ b/drivers/usb/host/ehci-xilinx-of.c
@@ -220,7 +220,7 @@ static int __devinit ehci_hcd_xilinx_of_probe(struct platform_device *op)
220 */ 220 */
221 ehci->caps = hcd->regs + 0x100; 221 ehci->caps = hcd->regs + 0x100;
222 ehci->regs = hcd->regs + 0x100 + 222 ehci->regs = hcd->regs + 0x100 +
223 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 223 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
224 224
225 /* cache this readonly data; minimize chip reads */ 225 /* cache this readonly data; minimize chip reads */
226 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 226 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 333ddc156919..829213423dea 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -128,12 +128,14 @@ struct ehci_hcd { /* one per controller */
128 unsigned has_fsl_port_bug:1; /* FreeScale */ 128 unsigned has_fsl_port_bug:1; /* FreeScale */
129 unsigned big_endian_mmio:1; 129 unsigned big_endian_mmio:1;
130 unsigned big_endian_desc:1; 130 unsigned big_endian_desc:1;
131 unsigned big_endian_capbase:1;
131 unsigned has_amcc_usb23:1; 132 unsigned has_amcc_usb23:1;
132 unsigned need_io_watchdog:1; 133 unsigned need_io_watchdog:1;
133 unsigned broken_periodic:1; 134 unsigned broken_periodic:1;
134 unsigned amd_pll_fix:1; 135 unsigned amd_pll_fix:1;
135 unsigned fs_i_thresh:1; /* Intel iso scheduling */ 136 unsigned fs_i_thresh:1; /* Intel iso scheduling */
136 unsigned use_dummy_qh:1; /* AMD Frame List table quirk*/ 137 unsigned use_dummy_qh:1; /* AMD Frame List table quirk*/
138 unsigned has_synopsys_hc_bug:1; /* Synopsys HC */
137 139
138 /* required for usb32 quirk */ 140 /* required for usb32 quirk */
139 #define OHCI_CTRL_HCFS (3 << 6) 141 #define OHCI_CTRL_HCFS (3 << 6)
@@ -160,6 +162,10 @@ struct ehci_hcd { /* one per controller */
160#ifdef DEBUG 162#ifdef DEBUG
161 struct dentry *debug_dir; 163 struct dentry *debug_dir;
162#endif 164#endif
165 /*
166 * OTG controllers and transceivers need software interaction
167 */
168 struct otg_transceiver *transceiver;
163}; 169};
164 170
165/* convert between an HCD pointer and the corresponding EHCI_HCD */ 171/* convert between an HCD pointer and the corresponding EHCI_HCD */
@@ -600,12 +606,18 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
600 * This attempts to support either format at compile time without a 606 * This attempts to support either format at compile time without a
601 * runtime penalty, or both formats with the additional overhead 607 * runtime penalty, or both formats with the additional overhead
602 * of checking a flag bit. 608 * of checking a flag bit.
609 *
610 * ehci_big_endian_capbase is a special quirk for controllers that
611 * implement the HC capability registers as separate registers and not
612 * as fields of a 32-bit register.
603 */ 613 */
604 614
605#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO 615#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
606#define ehci_big_endian_mmio(e) ((e)->big_endian_mmio) 616#define ehci_big_endian_mmio(e) ((e)->big_endian_mmio)
617#define ehci_big_endian_capbase(e) ((e)->big_endian_capbase)
607#else 618#else
608#define ehci_big_endian_mmio(e) 0 619#define ehci_big_endian_mmio(e) 0
620#define ehci_big_endian_capbase(e) 0
609#endif 621#endif
610 622
611/* 623/*
@@ -615,6 +627,9 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
615#if defined(CONFIG_ARM) && defined(CONFIG_ARCH_IXP4XX) 627#if defined(CONFIG_ARM) && defined(CONFIG_ARCH_IXP4XX)
616#define readl_be(addr) __raw_readl((__force unsigned *)addr) 628#define readl_be(addr) __raw_readl((__force unsigned *)addr)
617#define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr) 629#define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr)
630#elif defined(CONFIG_SPARC_LEON)
631#define readl_be(addr) __raw_readl(addr)
632#define writel_be(val, addr) __raw_writel(val, addr)
618#endif 633#endif
619 634
620static inline unsigned int ehci_readl(const struct ehci_hcd *ehci, 635static inline unsigned int ehci_readl(const struct ehci_hcd *ehci,
diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c
index 7b2e69aa2e98..dd98a966b58b 100644
--- a/drivers/usb/host/isp1760-hcd.c
+++ b/drivers/usb/host/isp1760-hcd.c
@@ -8,6 +8,8 @@
8 * 8 *
9 * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de> 9 * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
10 * 10 *
11 * (c) 2011 Arvid Brodin <arvid.brodin@enea.com>
12 *
11 */ 13 */
12#include <linux/module.h> 14#include <linux/module.h>
13#include <linux/kernel.h> 15#include <linux/kernel.h>
@@ -26,14 +28,16 @@
26 28
27static struct kmem_cache *qtd_cachep; 29static struct kmem_cache *qtd_cachep;
28static struct kmem_cache *qh_cachep; 30static struct kmem_cache *qh_cachep;
31static struct kmem_cache *urb_listitem_cachep;
29 32
30struct isp1760_hcd { 33struct isp1760_hcd {
31 u32 hcs_params; 34 u32 hcs_params;
32 spinlock_t lock; 35 spinlock_t lock;
33 struct inter_packet_info atl_ints[32]; 36 struct slotinfo atl_slots[32];
34 struct inter_packet_info int_ints[32]; 37 struct slotinfo int_slots[32];
35 struct memory_chunk memory_pool[BLOCKS]; 38 struct memory_chunk memory_pool[BLOCKS];
36 u32 atl_queued; 39 struct list_head controlqhs, bulkqhs, interruptqhs;
40 int active_ptds;
37 41
38 /* periodic schedule support */ 42 /* periodic schedule support */
39#define DEFAULT_I_TDPS 1024 43#define DEFAULT_I_TDPS 1024
@@ -85,18 +89,34 @@ struct isp1760_qtd {
85 struct list_head qtd_list; 89 struct list_head qtd_list;
86 struct urb *urb; 90 struct urb *urb;
87 size_t length; 91 size_t length;
88 92 size_t actual_length;
89 /* isp special*/ 93
94 /* QTD_ENQUEUED: waiting for transfer (inactive) */
95 /* QTD_PAYLOAD_ALLOC: chip mem has been allocated for payload */
96 /* QTD_XFER_STARTED: valid ptd has been written to isp176x - only
97 interrupt handler may touch this qtd! */
98 /* QTD_XFER_COMPLETE: payload has been transferred successfully */
99 /* QTD_RETIRE: transfer error/abort qtd */
100#define QTD_ENQUEUED 0
101#define QTD_PAYLOAD_ALLOC 1
102#define QTD_XFER_STARTED 2
103#define QTD_XFER_COMPLETE 3
104#define QTD_RETIRE 4
90 u32 status; 105 u32 status;
91#define URB_ENQUEUED (1 << 1)
92}; 106};
93 107
108/* Queue head, one for each active endpoint */
94struct isp1760_qh { 109struct isp1760_qh {
95 /* first part defined by EHCI spec */ 110 struct list_head qh_list;
96 struct list_head qtd_list; 111 struct list_head qtd_list;
97
98 u32 toggle; 112 u32 toggle;
99 u32 ping; 113 u32 ping;
114 int slot;
115};
116
117struct urb_listitem {
118 struct list_head urb_list;
119 struct urb *urb;
100}; 120};
101 121
102/* 122/*
@@ -272,7 +292,7 @@ static void init_memory(struct isp1760_hcd *priv)
272 payload_addr += priv->memory_pool[curr + i].size; 292 payload_addr += priv->memory_pool[curr + i].size;
273 } 293 }
274 294
275 BUG_ON(payload_addr - priv->memory_pool[0].start > PAYLOAD_AREA_SIZE); 295 WARN_ON(payload_addr - priv->memory_pool[0].start > PAYLOAD_AREA_SIZE);
276} 296}
277 297
278static void alloc_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd) 298static void alloc_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
@@ -280,7 +300,7 @@ static void alloc_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
280 struct isp1760_hcd *priv = hcd_to_priv(hcd); 300 struct isp1760_hcd *priv = hcd_to_priv(hcd);
281 int i; 301 int i;
282 302
283 BUG_ON(qtd->payload_addr); 303 WARN_ON(qtd->payload_addr);
284 304
285 if (!qtd->length) 305 if (!qtd->length)
286 return; 306 return;
@@ -293,19 +313,6 @@ static void alloc_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
293 return; 313 return;
294 } 314 }
295 } 315 }
296
297 dev_err(hcd->self.controller,
298 "%s: Cannot allocate %zu bytes of memory\n"
299 "Current memory map:\n",
300 __func__, qtd->length);
301 for (i = 0; i < BLOCKS; i++) {
302 dev_err(hcd->self.controller, "Pool %2d size %4d status: %d\n",
303 i, priv->memory_pool[i].size,
304 priv->memory_pool[i].free);
305 }
306 /* XXX maybe -ENOMEM could be possible */
307 BUG();
308 return;
309} 316}
310 317
311static void free_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd) 318static void free_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
@@ -318,7 +325,7 @@ static void free_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
318 325
319 for (i = 0; i < BLOCKS; i++) { 326 for (i = 0; i < BLOCKS; i++) {
320 if (priv->memory_pool[i].start == qtd->payload_addr) { 327 if (priv->memory_pool[i].start == qtd->payload_addr) {
321 BUG_ON(priv->memory_pool[i].free); 328 WARN_ON(priv->memory_pool[i].free);
322 priv->memory_pool[i].free = 1; 329 priv->memory_pool[i].free = 1;
323 qtd->payload_addr = 0; 330 qtd->payload_addr = 0;
324 return; 331 return;
@@ -327,19 +334,8 @@ static void free_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
327 334
328 dev_err(hcd->self.controller, "%s: Invalid pointer: %08x\n", 335 dev_err(hcd->self.controller, "%s: Invalid pointer: %08x\n",
329 __func__, qtd->payload_addr); 336 __func__, qtd->payload_addr);
330 BUG(); 337 WARN_ON(1);
331} 338 qtd->payload_addr = 0;
332
333static void isp1760_init_regs(struct usb_hcd *hcd)
334{
335 reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, 0);
336 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
337 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
338 reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
339
340 reg_write32(hcd->regs, HC_ATL_PTD_DONEMAP_REG, ~NO_TRANSFER_ACTIVE);
341 reg_write32(hcd->regs, HC_INT_PTD_DONEMAP_REG, ~NO_TRANSFER_ACTIVE);
342 reg_write32(hcd->regs, HC_ISO_PTD_DONEMAP_REG, ~NO_TRANSFER_ACTIVE);
343} 339}
344 340
345static int handshake(struct usb_hcd *hcd, u32 reg, 341static int handshake(struct usb_hcd *hcd, u32 reg,
@@ -377,31 +373,27 @@ static int ehci_reset(struct usb_hcd *hcd)
377 return retval; 373 return retval;
378} 374}
379 375
380static void qh_destroy(struct isp1760_qh *qh) 376static struct isp1760_qh *qh_alloc(gfp_t flags)
381{
382 BUG_ON(!list_empty(&qh->qtd_list));
383 kmem_cache_free(qh_cachep, qh);
384}
385
386static struct isp1760_qh *isp1760_qh_alloc(gfp_t flags)
387{ 377{
388 struct isp1760_qh *qh; 378 struct isp1760_qh *qh;
389 379
390 qh = kmem_cache_zalloc(qh_cachep, flags); 380 qh = kmem_cache_zalloc(qh_cachep, flags);
391 if (!qh) 381 if (!qh)
392 return qh; 382 return NULL;
393 383
384 INIT_LIST_HEAD(&qh->qh_list);
394 INIT_LIST_HEAD(&qh->qtd_list); 385 INIT_LIST_HEAD(&qh->qtd_list);
386 qh->slot = -1;
387
395 return qh; 388 return qh;
396} 389}
397 390
398/* magic numbers that can affect system performance */ 391static void qh_free(struct isp1760_qh *qh)
399#define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */ 392{
400#define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */ 393 WARN_ON(!list_empty(&qh->qtd_list));
401#define EHCI_TUNE_RL_TT 0 394 WARN_ON(qh->slot > -1);
402#define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */ 395 kmem_cache_free(qh_cachep, qh);
403#define EHCI_TUNE_MULT_TT 1 396}
404#define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
405 397
406/* one-time init, only for memory state */ 398/* one-time init, only for memory state */
407static int priv_init(struct usb_hcd *hcd) 399static int priv_init(struct usb_hcd *hcd)
@@ -411,6 +403,10 @@ static int priv_init(struct usb_hcd *hcd)
411 403
412 spin_lock_init(&priv->lock); 404 spin_lock_init(&priv->lock);
413 405
406 INIT_LIST_HEAD(&priv->interruptqhs);
407 INIT_LIST_HEAD(&priv->controlqhs);
408 INIT_LIST_HEAD(&priv->bulkqhs);
409
414 /* 410 /*
415 * hw default: 1K periodic list heads, one per frame. 411 * hw default: 1K periodic list heads, one per frame.
416 * periodic_size can shrink by USBCMD update if hcc_params allows. 412 * periodic_size can shrink by USBCMD update if hcc_params allows.
@@ -468,7 +464,10 @@ static int isp1760_hc_setup(struct usb_hcd *hcd)
468 } 464 }
469 465
470 /* pre reset */ 466 /* pre reset */
471 isp1760_init_regs(hcd); 467 reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, 0);
468 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
469 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
470 reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
472 471
473 /* reset */ 472 /* reset */
474 reg_write32(hcd->regs, HC_RESET_REG, SW_RESET_RESET_ALL); 473 reg_write32(hcd->regs, HC_RESET_REG, SW_RESET_RESET_ALL);
@@ -488,12 +487,15 @@ static int isp1760_hc_setup(struct usb_hcd *hcd)
488 16 : 32, (priv->devflags & ISP1760_FLAG_ANALOG_OC) ? 487 16 : 32, (priv->devflags & ISP1760_FLAG_ANALOG_OC) ?
489 "analog" : "digital"); 488 "analog" : "digital");
490 489
490 /* This is weird: at the first plug-in of a device there seems to be
491 one packet queued that never gets returned? */
492 priv->active_ptds = -1;
493
491 /* ATL reset */ 494 /* ATL reset */
492 reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode | ALL_ATX_RESET); 495 reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode | ALL_ATX_RESET);
493 mdelay(10); 496 mdelay(10);
494 reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode); 497 reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
495 498
496 reg_write32(hcd->regs, HC_INTERRUPT_REG, INTERRUPT_ENABLE_MASK);
497 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, INTERRUPT_ENABLE_MASK); 499 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, INTERRUPT_ENABLE_MASK);
498 500
499 /* 501 /*
@@ -516,14 +518,21 @@ static void isp1760_init_maps(struct usb_hcd *hcd)
516 reg_write32(hcd->regs, HC_ATL_PTD_LASTPTD_REG, 0x80000000); 518 reg_write32(hcd->regs, HC_ATL_PTD_LASTPTD_REG, 0x80000000);
517 reg_write32(hcd->regs, HC_INT_PTD_LASTPTD_REG, 0x80000000); 519 reg_write32(hcd->regs, HC_INT_PTD_LASTPTD_REG, 0x80000000);
518 reg_write32(hcd->regs, HC_ISO_PTD_LASTPTD_REG, 0x00000001); 520 reg_write32(hcd->regs, HC_ISO_PTD_LASTPTD_REG, 0x00000001);
521
522 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, 0);
523 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, 0);
524 reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, 0);
525
526 reg_write32(hcd->regs, HC_BUFFER_STATUS_REG,
527 ATL_BUF_FILL | INT_BUF_FILL);
519} 528}
520 529
521static void isp1760_enable_interrupts(struct usb_hcd *hcd) 530static void isp1760_enable_interrupts(struct usb_hcd *hcd)
522{ 531{
523 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_AND_REG, 0); 532 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_AND_REG, 0);
524 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, 0); 533 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, 0xffffffff);
525 reg_write32(hcd->regs, HC_INT_IRQ_MASK_AND_REG, 0); 534 reg_write32(hcd->regs, HC_INT_IRQ_MASK_AND_REG, 0);
526 reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, 0); 535 reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, 0xffffffff);
527 reg_write32(hcd->regs, HC_ISO_IRQ_MASK_AND_REG, 0); 536 reg_write32(hcd->regs, HC_ISO_IRQ_MASK_AND_REG, 0);
528 reg_write32(hcd->regs, HC_ISO_IRQ_MASK_OR_REG, 0xffffffff); 537 reg_write32(hcd->regs, HC_ISO_IRQ_MASK_OR_REG, 0xffffffff);
529 /* step 23 passed */ 538 /* step 23 passed */
@@ -548,8 +557,7 @@ static int isp1760_run(struct usb_hcd *hcd)
548 command |= CMD_RUN; 557 command |= CMD_RUN;
549 reg_write32(hcd->regs, HC_USBCMD, command); 558 reg_write32(hcd->regs, HC_USBCMD, command);
550 559
551 retval = handshake(hcd, HC_USBCMD, CMD_RUN, CMD_RUN, 560 retval = handshake(hcd, HC_USBCMD, CMD_RUN, CMD_RUN, 250 * 1000);
552 250 * 1000);
553 if (retval) 561 if (retval)
554 return retval; 562 return retval;
555 563
@@ -598,12 +606,19 @@ static int last_qtd_of_urb(struct isp1760_qtd *qtd, struct isp1760_qh *qh)
598 return (qtd->urb != urb); 606 return (qtd->urb != urb);
599} 607}
600 608
601static void transform_into_atl(struct isp1760_qh *qh, 609/* magic numbers that can affect system performance */
610#define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
611#define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
612#define EHCI_TUNE_RL_TT 0
613#define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
614#define EHCI_TUNE_MULT_TT 1
615#define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
616
617static void create_ptd_atl(struct isp1760_qh *qh,
602 struct isp1760_qtd *qtd, struct ptd *ptd) 618 struct isp1760_qtd *qtd, struct ptd *ptd)
603{ 619{
604 u32 maxpacket; 620 u32 maxpacket;
605 u32 multi; 621 u32 multi;
606 u32 pid_code;
607 u32 rl = RL_COUNTER; 622 u32 rl = RL_COUNTER;
608 u32 nak = NAK_COUNTER; 623 u32 nak = NAK_COUNTER;
609 624
@@ -616,67 +631,62 @@ static void transform_into_atl(struct isp1760_qh *qh,
616 maxpacket &= 0x7ff; 631 maxpacket &= 0x7ff;
617 632
618 /* DW0 */ 633 /* DW0 */
619 ptd->dw0 = PTD_VALID; 634 ptd->dw0 = DW0_VALID_BIT;
620 ptd->dw0 |= PTD_LENGTH(qtd->length); 635 ptd->dw0 |= TO_DW0_LENGTH(qtd->length);
621 ptd->dw0 |= PTD_MAXPACKET(maxpacket); 636 ptd->dw0 |= TO_DW0_MAXPACKET(maxpacket);
622 ptd->dw0 |= PTD_ENDPOINT(usb_pipeendpoint(qtd->urb->pipe)); 637 ptd->dw0 |= TO_DW0_ENDPOINT(usb_pipeendpoint(qtd->urb->pipe));
623 638
624 /* DW1 */ 639 /* DW1 */
625 ptd->dw1 = usb_pipeendpoint(qtd->urb->pipe) >> 1; 640 ptd->dw1 = usb_pipeendpoint(qtd->urb->pipe) >> 1;
626 ptd->dw1 |= PTD_DEVICE_ADDR(usb_pipedevice(qtd->urb->pipe)); 641 ptd->dw1 |= TO_DW1_DEVICE_ADDR(usb_pipedevice(qtd->urb->pipe));
627 642 ptd->dw1 |= TO_DW1_PID_TOKEN(qtd->packet_type);
628 pid_code = qtd->packet_type;
629 ptd->dw1 |= PTD_PID_TOKEN(pid_code);
630 643
631 if (usb_pipebulk(qtd->urb->pipe)) 644 if (usb_pipebulk(qtd->urb->pipe))
632 ptd->dw1 |= PTD_TRANS_BULK; 645 ptd->dw1 |= DW1_TRANS_BULK;
633 else if (usb_pipeint(qtd->urb->pipe)) 646 else if (usb_pipeint(qtd->urb->pipe))
634 ptd->dw1 |= PTD_TRANS_INT; 647 ptd->dw1 |= DW1_TRANS_INT;
635 648
636 if (qtd->urb->dev->speed != USB_SPEED_HIGH) { 649 if (qtd->urb->dev->speed != USB_SPEED_HIGH) {
637 /* split transaction */ 650 /* split transaction */
638 651
639 ptd->dw1 |= PTD_TRANS_SPLIT; 652 ptd->dw1 |= DW1_TRANS_SPLIT;
640 if (qtd->urb->dev->speed == USB_SPEED_LOW) 653 if (qtd->urb->dev->speed == USB_SPEED_LOW)
641 ptd->dw1 |= PTD_SE_USB_LOSPEED; 654 ptd->dw1 |= DW1_SE_USB_LOSPEED;
642 655
643 ptd->dw1 |= PTD_PORT_NUM(qtd->urb->dev->ttport); 656 ptd->dw1 |= TO_DW1_PORT_NUM(qtd->urb->dev->ttport);
644 ptd->dw1 |= PTD_HUB_NUM(qtd->urb->dev->tt->hub->devnum); 657 ptd->dw1 |= TO_DW1_HUB_NUM(qtd->urb->dev->tt->hub->devnum);
645 658
646 /* SE bit for Split INT transfers */ 659 /* SE bit for Split INT transfers */
647 if (usb_pipeint(qtd->urb->pipe) && 660 if (usb_pipeint(qtd->urb->pipe) &&
648 (qtd->urb->dev->speed == USB_SPEED_LOW)) 661 (qtd->urb->dev->speed == USB_SPEED_LOW))
649 ptd->dw1 |= 2 << 16; 662 ptd->dw1 |= 2 << 16;
650 663
651 ptd->dw3 = 0;
652 rl = 0; 664 rl = 0;
653 nak = 0; 665 nak = 0;
654 } else { 666 } else {
655 ptd->dw0 |= PTD_MULTI(multi); 667 ptd->dw0 |= TO_DW0_MULTI(multi);
656 if (usb_pipecontrol(qtd->urb->pipe) || 668 if (usb_pipecontrol(qtd->urb->pipe) ||
657 usb_pipebulk(qtd->urb->pipe)) 669 usb_pipebulk(qtd->urb->pipe))
658 ptd->dw3 = qh->ping; 670 ptd->dw3 |= TO_DW3_PING(qh->ping);
659 else
660 ptd->dw3 = 0;
661 } 671 }
662 /* DW2 */ 672 /* DW2 */
663 ptd->dw2 = 0; 673 ptd->dw2 = 0;
664 ptd->dw2 |= PTD_DATA_START_ADDR(base_to_chip(qtd->payload_addr)); 674 ptd->dw2 |= TO_DW2_DATA_START_ADDR(base_to_chip(qtd->payload_addr));
665 ptd->dw2 |= PTD_RL_CNT(rl); 675 ptd->dw2 |= TO_DW2_RL(rl);
666 ptd->dw3 |= PTD_NAC_CNT(nak);
667 676
668 /* DW3 */ 677 /* DW3 */
669 ptd->dw3 |= qh->toggle; 678 ptd->dw3 |= TO_DW3_NAKCOUNT(nak);
679 ptd->dw3 |= TO_DW3_DATA_TOGGLE(qh->toggle);
670 if (usb_pipecontrol(qtd->urb->pipe)) { 680 if (usb_pipecontrol(qtd->urb->pipe)) {
671 if (qtd->data_buffer == qtd->urb->setup_packet) 681 if (qtd->data_buffer == qtd->urb->setup_packet)
672 ptd->dw3 &= ~PTD_DATA_TOGGLE(1); 682 ptd->dw3 &= ~TO_DW3_DATA_TOGGLE(1);
673 else if (last_qtd_of_urb(qtd, qh)) 683 else if (last_qtd_of_urb(qtd, qh))
674 ptd->dw3 |= PTD_DATA_TOGGLE(1); 684 ptd->dw3 |= TO_DW3_DATA_TOGGLE(1);
675 } 685 }
676 686
677 ptd->dw3 |= PTD_ACTIVE; 687 ptd->dw3 |= DW3_ACTIVE_BIT;
678 /* Cerr */ 688 /* Cerr */
679 ptd->dw3 |= PTD_CERR(ERR_COUNTER); 689 ptd->dw3 |= TO_DW3_CERR(ERR_COUNTER);
680} 690}
681 691
682static void transform_add_int(struct isp1760_qh *qh, 692static void transform_add_int(struct isp1760_qh *qh,
@@ -731,197 +741,13 @@ static void transform_add_int(struct isp1760_qh *qh,
731 ptd->dw4 = usof; 741 ptd->dw4 = usof;
732} 742}
733 743
734static void transform_into_int(struct isp1760_qh *qh, 744static void create_ptd_int(struct isp1760_qh *qh,
735 struct isp1760_qtd *qtd, struct ptd *ptd) 745 struct isp1760_qtd *qtd, struct ptd *ptd)
736{ 746{
737 transform_into_atl(qh, qtd, ptd); 747 create_ptd_atl(qh, qtd, ptd);
738 transform_add_int(qh, qtd, ptd); 748 transform_add_int(qh, qtd, ptd);
739} 749}
740 750
741static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len,
742 u32 token)
743{
744 int count;
745
746 qtd->data_buffer = databuffer;
747 qtd->packet_type = GET_QTD_TOKEN_TYPE(token);
748
749 if (len > MAX_PAYLOAD_SIZE)
750 count = MAX_PAYLOAD_SIZE;
751 else
752 count = len;
753
754 qtd->length = count;
755 return count;
756}
757
758static int check_error(struct usb_hcd *hcd, struct ptd *ptd)
759{
760 int error = 0;
761
762 if (ptd->dw3 & DW3_HALT_BIT) {
763 error = -EPIPE;
764
765 if (ptd->dw3 & DW3_ERROR_BIT)
766 pr_err("error bit is set in DW3\n");
767 }
768
769 if (ptd->dw3 & DW3_QTD_ACTIVE) {
770 dev_err(hcd->self.controller, "Transfer active bit is set DW3\n"
771 "nak counter: %d, rl: %d\n",
772 (ptd->dw3 >> 19) & 0xf, (ptd->dw2 >> 25) & 0xf);
773 }
774
775 return error;
776}
777
778static void check_int_err_status(struct usb_hcd *hcd, u32 dw4)
779{
780 u32 i;
781
782 dw4 >>= 8;
783
784 for (i = 0; i < 8; i++) {
785 switch (dw4 & 0x7) {
786 case INT_UNDERRUN:
787 dev_err(hcd->self.controller, "Underrun (%d)\n", i);
788 break;
789
790 case INT_EXACT:
791 dev_err(hcd->self.controller,
792 "Transaction error (%d)\n", i);
793 break;
794
795 case INT_BABBLE:
796 dev_err(hcd->self.controller, "Babble error (%d)\n", i);
797 break;
798 }
799 dw4 >>= 3;
800 }
801}
802
803static void enqueue_one_qtd(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
804{
805 if (qtd->length && (qtd->length <= MAX_PAYLOAD_SIZE)) {
806 switch (qtd->packet_type) {
807 case IN_PID:
808 break;
809 case OUT_PID:
810 case SETUP_PID:
811 mem_writes8(hcd->regs, qtd->payload_addr,
812 qtd->data_buffer, qtd->length);
813 }
814 }
815}
816
817static void enqueue_one_atl_qtd(struct usb_hcd *hcd, struct isp1760_qh *qh,
818 u32 slot, struct isp1760_qtd *qtd)
819{
820 struct isp1760_hcd *priv = hcd_to_priv(hcd);
821 struct ptd ptd;
822
823 alloc_mem(hcd, qtd);
824 transform_into_atl(qh, qtd, &ptd);
825 ptd_write(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
826 enqueue_one_qtd(hcd, qtd);
827
828 priv->atl_ints[slot].qh = qh;
829 priv->atl_ints[slot].qtd = qtd;
830 qtd->status |= URB_ENQUEUED;
831 qtd->status |= slot << 16;
832}
833
834static void enqueue_one_int_qtd(struct usb_hcd *hcd, struct isp1760_qh *qh,
835 u32 slot, struct isp1760_qtd *qtd)
836{
837 struct isp1760_hcd *priv = hcd_to_priv(hcd);
838 struct ptd ptd;
839
840 alloc_mem(hcd, qtd);
841 transform_into_int(qh, qtd, &ptd);
842 ptd_write(hcd->regs, INT_PTD_OFFSET, slot, &ptd);
843 enqueue_one_qtd(hcd, qtd);
844
845 priv->int_ints[slot].qh = qh;
846 priv->int_ints[slot].qtd = qtd;
847 qtd->status |= URB_ENQUEUED;
848 qtd->status |= slot << 16;
849}
850
851static void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
852 struct isp1760_qtd *qtd)
853{
854 struct isp1760_hcd *priv = hcd_to_priv(hcd);
855 u32 skip_map, or_map;
856 u32 slot;
857 u32 buffstatus;
858
859 /*
860 * When this function is called from the interrupt handler to enqueue
861 * a follow-up packet, the SKIP register gets written and read back
862 * almost immediately. With ISP1761, this register requires a delay of
863 * 195ns between a write and subsequent read (see section 15.1.1.3).
864 */
865 mmiowb();
866 ndelay(195);
867 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
868
869 BUG_ON(!skip_map);
870 slot = __ffs(skip_map);
871
872 enqueue_one_atl_qtd(hcd, qh, slot, qtd);
873
874 or_map = reg_read32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG);
875 or_map |= (1 << slot);
876 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, or_map);
877
878 skip_map &= ~(1 << slot);
879 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
880
881 priv->atl_queued++;
882 if (priv->atl_queued == 2)
883 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE,
884 INTERRUPT_ENABLE_SOT_MASK);
885
886 buffstatus = reg_read32(hcd->regs, HC_BUFFER_STATUS_REG);
887 buffstatus |= ATL_BUFFER;
888 reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, buffstatus);
889}
890
891static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
892 struct isp1760_qtd *qtd)
893{
894 u32 skip_map, or_map;
895 u32 slot;
896 u32 buffstatus;
897
898 /*
899 * When this function is called from the interrupt handler to enqueue
900 * a follow-up packet, the SKIP register gets written and read back
901 * almost immediately. With ISP1761, this register requires a delay of
902 * 195ns between a write and subsequent read (see section 15.1.1.3).
903 */
904 mmiowb();
905 ndelay(195);
906 skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
907
908 BUG_ON(!skip_map);
909 slot = __ffs(skip_map);
910
911 enqueue_one_int_qtd(hcd, qh, slot, qtd);
912
913 or_map = reg_read32(hcd->regs, HC_INT_IRQ_MASK_OR_REG);
914 or_map |= (1 << slot);
915 reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, or_map);
916
917 skip_map &= ~(1 << slot);
918 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
919
920 buffstatus = reg_read32(hcd->regs, HC_BUFFER_STATUS_REG);
921 buffstatus |= INT_BUFFER;
922 reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, buffstatus);
923}
924
925static void isp1760_urb_done(struct usb_hcd *hcd, struct urb *urb) 751static void isp1760_urb_done(struct usb_hcd *hcd, struct urb *urb)
926__releases(priv->lock) 752__releases(priv->lock)
927__acquires(priv->lock) 753__acquires(priv->lock)
@@ -948,557 +774,620 @@ __acquires(priv->lock)
948 spin_lock(&priv->lock); 774 spin_lock(&priv->lock);
949} 775}
950 776
951static void isp1760_qtd_free(struct isp1760_qtd *qtd) 777static struct isp1760_qtd *qtd_alloc(gfp_t flags, struct urb *urb,
778 u8 packet_type)
952{ 779{
953 BUG_ON(qtd->payload_addr); 780 struct isp1760_qtd *qtd;
954 kmem_cache_free(qtd_cachep, qtd);
955}
956 781
957static struct isp1760_qtd *clean_this_qtd(struct isp1760_qtd *qtd, 782 qtd = kmem_cache_zalloc(qtd_cachep, flags);
958 struct isp1760_qh *qh) 783 if (!qtd)
959{ 784 return NULL;
960 struct isp1760_qtd *tmp_qtd;
961 785
962 if (list_is_last(&qtd->qtd_list, &qh->qtd_list)) 786 INIT_LIST_HEAD(&qtd->qtd_list);
963 tmp_qtd = NULL; 787 qtd->urb = urb;
964 else 788 qtd->packet_type = packet_type;
965 tmp_qtd = list_entry(qtd->qtd_list.next, struct isp1760_qtd, 789 qtd->status = QTD_ENQUEUED;
966 qtd_list); 790 qtd->actual_length = 0;
967 list_del(&qtd->qtd_list); 791
968 isp1760_qtd_free(qtd); 792 return qtd;
969 return tmp_qtd;
970} 793}
971 794
972/* 795static void qtd_free(struct isp1760_qtd *qtd)
973 * Remove this QTD from the QH list and free its memory. If this QTD
974 * isn't the last one than remove also his successor(s).
975 * Returns the QTD which is part of an new URB and should be enqueued.
976 */
977static struct isp1760_qtd *clean_up_qtdlist(struct isp1760_qtd *qtd,
978 struct isp1760_qh *qh)
979{ 796{
980 struct urb *urb; 797 WARN_ON(qtd->payload_addr);
981 798 kmem_cache_free(qtd_cachep, qtd);
982 urb = qtd->urb;
983 do {
984 qtd = clean_this_qtd(qtd, qh);
985 } while (qtd && (qtd->urb == urb));
986
987 return qtd;
988} 799}
989 800
990static void do_atl_int(struct usb_hcd *hcd) 801static void start_bus_transfer(struct usb_hcd *hcd, u32 ptd_offset, int slot,
802 struct slotinfo *slots, struct isp1760_qtd *qtd,
803 struct isp1760_qh *qh, struct ptd *ptd)
991{ 804{
992 struct isp1760_hcd *priv = hcd_to_priv(hcd); 805 struct isp1760_hcd *priv = hcd_to_priv(hcd);
993 u32 done_map, skip_map; 806 WARN_ON((slot < 0) || (slot > 31));
994 struct ptd ptd; 807 WARN_ON(qtd->length && !qtd->payload_addr);
995 struct urb *urb; 808 WARN_ON(slots[slot].qtd);
996 u32 slot; 809 WARN_ON(slots[slot].qh);
997 u32 length; 810 WARN_ON(qtd->status != QTD_PAYLOAD_ALLOC);
998 u32 or_map; 811
999 u32 status = -EINVAL; 812 slots[slot].qtd = qtd;
1000 int error; 813 slots[slot].qh = qh;
1001 struct isp1760_qtd *qtd; 814 qh->slot = slot;
1002 struct isp1760_qh *qh; 815 qtd->status = QTD_XFER_STARTED; /* Set this before writing ptd, since
1003 u32 rl; 816 interrupt routine may preempt and expects this value. */
1004 u32 nakcount; 817 ptd_write(hcd->regs, ptd_offset, slot, ptd);
1005 818 priv->active_ptds++;
1006 done_map = reg_read32(hcd->regs, HC_ATL_PTD_DONEMAP_REG); 819}
1007 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
1008 820
1009 or_map = reg_read32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG); 821static int is_short_bulk(struct isp1760_qtd *qtd)
1010 or_map &= ~done_map; 822{
1011 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, or_map); 823 return (usb_pipebulk(qtd->urb->pipe) &&
824 (qtd->actual_length < qtd->length));
825}
1012 826
1013 while (done_map) { 827static void collect_qtds(struct usb_hcd *hcd, struct isp1760_qh *qh,
1014 status = 0; 828 struct list_head *urb_list)
1015 priv->atl_queued--; 829{
830 int last_qtd;
831 struct isp1760_qtd *qtd, *qtd_next;
832 struct urb_listitem *urb_listitem;
1016 833
1017 slot = __ffs(done_map); 834 list_for_each_entry_safe(qtd, qtd_next, &qh->qtd_list, qtd_list) {
1018 done_map &= ~(1 << slot); 835 if (qtd->status < QTD_XFER_COMPLETE)
1019 skip_map |= (1 << slot); 836 break;
1020 837
1021 qtd = priv->atl_ints[slot].qtd; 838 if (list_is_last(&qtd->qtd_list, &qh->qtd_list))
1022 qh = priv->atl_ints[slot].qh; 839 last_qtd = 1;
840 else
841 last_qtd = qtd->urb != qtd_next->urb;
842
843 if ((!last_qtd) && (qtd->status == QTD_RETIRE))
844 qtd_next->status = QTD_RETIRE;
845
846 if (qtd->status == QTD_XFER_COMPLETE) {
847 if (qtd->actual_length) {
848 switch (qtd->packet_type) {
849 case IN_PID:
850 mem_reads8(hcd->regs, qtd->payload_addr,
851 qtd->data_buffer,
852 qtd->actual_length);
853 /* Fall through (?) */
854 case OUT_PID:
855 qtd->urb->actual_length +=
856 qtd->actual_length;
857 /* Fall through ... */
858 case SETUP_PID:
859 break;
860 }
861 }
1023 862
1024 if (!qh) { 863 if (is_short_bulk(qtd)) {
1025 dev_err(hcd->self.controller, "qh is 0\n"); 864 if (qtd->urb->transfer_flags & URB_SHORT_NOT_OK)
1026 continue; 865 qtd->urb->status = -EREMOTEIO;
866 if (!last_qtd)
867 qtd_next->status = QTD_RETIRE;
868 }
1027 } 869 }
1028 ptd_read(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
1029
1030 rl = (ptd.dw2 >> 25) & 0x0f;
1031 nakcount = (ptd.dw3 >> 19) & 0xf;
1032 870
1033 /* Transfer Error, *but* active and no HALT -> reload */ 871 if (qtd->payload_addr)
1034 if ((ptd.dw3 & DW3_ERROR_BIT) && (ptd.dw3 & DW3_QTD_ACTIVE) && 872 free_mem(hcd, qtd);
1035 !(ptd.dw3 & DW3_HALT_BIT)) {
1036
1037 /* according to ppriv code, we have to
1038 * reload this one if trasfered bytes != requested bytes
1039 * else act like everything went smooth..
1040 * XXX This just doesn't feel right and hasn't
1041 * triggered so far.
1042 */
1043 873
1044 length = PTD_XFERRED_LENGTH(ptd.dw3); 874 if (last_qtd) {
1045 dev_err(hcd->self.controller, 875 if ((qtd->status == QTD_RETIRE) &&
1046 "Should reload now... transferred %d " 876 (qtd->urb->status == -EINPROGRESS))
1047 "of %zu\n", length, qtd->length); 877 qtd->urb->status = -EPIPE;
1048 BUG(); 878 /* Defer calling of urb_done() since it releases lock */
879 urb_listitem = kmem_cache_zalloc(urb_listitem_cachep,
880 GFP_ATOMIC);
881 if (unlikely(!urb_listitem))
882 break;
883 urb_listitem->urb = qtd->urb;
884 list_add_tail(&urb_listitem->urb_list, urb_list);
1049 } 885 }
1050 886
1051 if (!nakcount && (ptd.dw3 & DW3_QTD_ACTIVE)) { 887 list_del(&qtd->qtd_list);
1052 u32 buffstatus; 888 qtd_free(qtd);
889 }
890}
1053 891
1054 /* 892#define ENQUEUE_DEPTH 2
1055 * NAKs are handled in HW by the chip. Usually if the 893static void enqueue_qtds(struct usb_hcd *hcd, struct isp1760_qh *qh)
1056 * device is not able to send data fast enough. 894{
1057 * This happens mostly on slower hardware. 895 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1058 */ 896 int ptd_offset;
897 struct slotinfo *slots;
898 int curr_slot, free_slot;
899 int n;
900 struct ptd ptd;
901 struct isp1760_qtd *qtd;
1059 902
1060 /* RL counter = ERR counter */ 903 if (unlikely(list_empty(&qh->qtd_list))) {
1061 ptd.dw3 &= ~(0xf << 19); 904 WARN_ON(1);
1062 ptd.dw3 |= rl << 19; 905 return;
1063 ptd.dw3 &= ~(3 << (55 - 32)); 906 }
1064 ptd.dw3 |= ERR_COUNTER << (55 - 32);
1065
1066 /*
1067 * It is not needed to write skip map back because it
1068 * is unchanged. Just make sure that this entry is
1069 * unskipped once it gets written to the HW.
1070 */
1071 skip_map &= ~(1 << slot);
1072 or_map = reg_read32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG);
1073 or_map |= 1 << slot;
1074 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, or_map);
1075 907
1076 ptd.dw0 |= PTD_VALID; 908 if (usb_pipeint(list_entry(qh->qtd_list.next, struct isp1760_qtd,
1077 ptd_write(hcd->regs, ATL_PTD_OFFSET, slot, &ptd); 909 qtd_list)->urb->pipe)) {
910 ptd_offset = INT_PTD_OFFSET;
911 slots = priv->int_slots;
912 } else {
913 ptd_offset = ATL_PTD_OFFSET;
914 slots = priv->atl_slots;
915 }
1078 916
1079 priv->atl_queued++; 917 free_slot = -1;
1080 if (priv->atl_queued == 2) 918 for (curr_slot = 0; curr_slot < 32; curr_slot++) {
1081 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, 919 if ((free_slot == -1) && (slots[curr_slot].qtd == NULL))
1082 INTERRUPT_ENABLE_SOT_MASK); 920 free_slot = curr_slot;
921 if (slots[curr_slot].qh == qh)
922 break;
923 }
1083 924
1084 buffstatus = reg_read32(hcd->regs, 925 n = 0;
1085 HC_BUFFER_STATUS_REG); 926 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
1086 buffstatus |= ATL_BUFFER; 927 if (qtd->status == QTD_ENQUEUED) {
1087 reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, 928 WARN_ON(qtd->payload_addr);
1088 buffstatus); 929 alloc_mem(hcd, qtd);
1089 continue; 930 if ((qtd->length) && (!qtd->payload_addr))
1090 } 931 break;
1091 932
1092 error = check_error(hcd, &ptd); 933 if ((qtd->length) &&
1093 if (error) { 934 ((qtd->packet_type == SETUP_PID) ||
1094 status = error; 935 (qtd->packet_type == OUT_PID))) {
1095 priv->atl_ints[slot].qh->toggle = 0; 936 mem_writes8(hcd->regs, qtd->payload_addr,
1096 priv->atl_ints[slot].qh->ping = 0; 937 qtd->data_buffer, qtd->length);
1097 qtd->urb->status = -EPIPE; 938 }
1098 939
1099#if 0 940 qtd->status = QTD_PAYLOAD_ALLOC;
1100 printk(KERN_ERR "Error in %s().\n", __func__);
1101 printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1102 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1103 "%08x dw7: %08x\n",
1104 ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1105 ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1106#endif
1107 } else {
1108 priv->atl_ints[slot].qh->toggle = ptd.dw3 & (1 << 25);
1109 priv->atl_ints[slot].qh->ping = ptd.dw3 & (1 << 26);
1110 } 941 }
1111 942
1112 length = PTD_XFERRED_LENGTH(ptd.dw3); 943 if (qtd->status == QTD_PAYLOAD_ALLOC) {
1113 if (length) { 944/*
1114 switch (DW1_GET_PID(ptd.dw1)) { 945 if ((curr_slot > 31) && (free_slot == -1))
1115 case IN_PID: 946 dev_dbg(hcd->self.controller, "%s: No slot "
1116 mem_reads8(hcd->regs, qtd->payload_addr, 947 "available for transfer\n", __func__);
1117 qtd->data_buffer, length); 948*/
949 /* Start xfer for this endpoint if not already done */
950 if ((curr_slot > 31) && (free_slot > -1)) {
951 if (usb_pipeint(qtd->urb->pipe))
952 create_ptd_int(qh, qtd, &ptd);
953 else
954 create_ptd_atl(qh, qtd, &ptd);
955
956 start_bus_transfer(hcd, ptd_offset, free_slot,
957 slots, qtd, qh, &ptd);
958 curr_slot = free_slot;
959 }
1118 960
1119 case OUT_PID: 961 n++;
962 if (n >= ENQUEUE_DEPTH)
963 break;
964 }
965 }
966}
1120 967
1121 qtd->urb->actual_length += length; 968void schedule_ptds(struct usb_hcd *hcd)
969{
970 struct isp1760_hcd *priv;
971 struct isp1760_qh *qh, *qh_next;
972 struct list_head *ep_queue;
973 struct usb_host_endpoint *ep;
974 LIST_HEAD(urb_list);
975 struct urb_listitem *urb_listitem, *urb_listitem_next;
976
977 if (!hcd) {
978 WARN_ON(1);
979 return;
980 }
1122 981
1123 case SETUP_PID: 982 priv = hcd_to_priv(hcd);
1124 break; 983
984 /*
985 * check finished/retired xfers, transfer payloads, call urb_done()
986 */
987 ep_queue = &priv->interruptqhs;
988 while (ep_queue) {
989 list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list) {
990 ep = list_entry(qh->qtd_list.next, struct isp1760_qtd,
991 qtd_list)->urb->ep;
992 collect_qtds(hcd, qh, &urb_list);
993 if (list_empty(&qh->qtd_list)) {
994 list_del(&qh->qh_list);
995 if (ep->hcpriv == NULL) {
996 /* Endpoint has been disabled, so we
997 can free the associated queue head. */
998 qh_free(qh);
999 }
1125 } 1000 }
1126 } 1001 }
1127 1002
1128 priv->atl_ints[slot].qtd = NULL; 1003 if (ep_queue == &priv->interruptqhs)
1129 priv->atl_ints[slot].qh = NULL; 1004 ep_queue = &priv->controlqhs;
1130 1005 else if (ep_queue == &priv->controlqhs)
1131 free_mem(hcd, qtd); 1006 ep_queue = &priv->bulkqhs;
1007 else
1008 ep_queue = NULL;
1009 }
1132 1010
1133 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map); 1011 list_for_each_entry_safe(urb_listitem, urb_listitem_next, &urb_list,
1012 urb_list) {
1013 isp1760_urb_done(hcd, urb_listitem->urb);
1014 kmem_cache_free(urb_listitem_cachep, urb_listitem);
1015 }
1134 1016
1135 if (qtd->urb->status == -EPIPE) { 1017 /*
1136 /* HALT was received */ 1018 * Schedule packets for transfer.
1019 *
1020 * According to USB2.0 specification:
1021 *
1022 * 1st prio: interrupt xfers, up to 80 % of bandwidth
1023 * 2nd prio: control xfers
1024 * 3rd prio: bulk xfers
1025 *
1026 * ... but let's use a simpler scheme here (mostly because ISP1761 doc
1027 * is very unclear on how to prioritize traffic):
1028 *
1029 * 1) Enqueue any queued control transfers, as long as payload chip mem
1030 * and PTD ATL slots are available.
1031 * 2) Enqueue any queued INT transfers, as long as payload chip mem
1032 * and PTD INT slots are available.
1033 * 3) Enqueue any queued bulk transfers, as long as payload chip mem
1034 * and PTD ATL slots are available.
1035 *
1036 * Use double buffering (ENQUEUE_DEPTH==2) as a compromise between
1037 * conservation of chip mem and performance.
1038 *
1039 * I'm sure this scheme could be improved upon!
1040 */
1041 ep_queue = &priv->controlqhs;
1042 while (ep_queue) {
1043 list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list)
1044 enqueue_qtds(hcd, qh);
1045
1046 if (ep_queue == &priv->controlqhs)
1047 ep_queue = &priv->interruptqhs;
1048 else if (ep_queue == &priv->interruptqhs)
1049 ep_queue = &priv->bulkqhs;
1050 else
1051 ep_queue = NULL;
1052 }
1053}
1137 1054
1138 urb = qtd->urb; 1055#define PTD_STATE_QTD_DONE 1
1139 qtd = clean_up_qtdlist(qtd, qh); 1056#define PTD_STATE_QTD_RELOAD 2
1140 isp1760_urb_done(hcd, urb); 1057#define PTD_STATE_URB_RETIRE 3
1141 1058
1142 } else if (usb_pipebulk(qtd->urb->pipe) && 1059static int check_int_transfer(struct usb_hcd *hcd, struct ptd *ptd,
1143 (length < qtd->length)) { 1060 struct urb *urb)
1144 /* short BULK received */ 1061{
1062 __dw dw4;
1063 int i;
1145 1064
1146 if (qtd->urb->transfer_flags & URB_SHORT_NOT_OK) { 1065 dw4 = ptd->dw4;
1147 qtd->urb->status = -EREMOTEIO; 1066 dw4 >>= 8;
1148 dev_dbg(hcd->self.controller,
1149 "short bulk, %d instead %zu "
1150 "with URB_SHORT_NOT_OK flag.\n",
1151 length, qtd->length);
1152 }
1153 1067
1154 if (qtd->urb->status == -EINPROGRESS) 1068 /* FIXME: ISP1761 datasheet does not say what to do with these. Do we
1155 qtd->urb->status = 0; 1069 need to handle these errors? Is it done in hardware? */
1156 1070
1157 urb = qtd->urb; 1071 if (ptd->dw3 & DW3_HALT_BIT) {
1158 qtd = clean_up_qtdlist(qtd, qh);
1159 isp1760_urb_done(hcd, urb);
1160 1072
1161 } else if (last_qtd_of_urb(qtd, qh)) { 1073 urb->status = -EPROTO; /* Default unknown error */
1162 /* that was the last qtd of that URB */
1163 1074
1164 if (qtd->urb->status == -EINPROGRESS) 1075 for (i = 0; i < 8; i++) {
1165 qtd->urb->status = 0; 1076 switch (dw4 & 0x7) {
1077 case INT_UNDERRUN:
1078 dev_dbg(hcd->self.controller, "%s: underrun "
1079 "during uFrame %d\n",
1080 __func__, i);
1081 urb->status = -ECOMM; /* Could not write data */
1082 break;
1083 case INT_EXACT:
1084 dev_dbg(hcd->self.controller, "%s: transaction "
1085 "error during uFrame %d\n",
1086 __func__, i);
1087 urb->status = -EPROTO; /* timeout, bad CRC, PID
1088 error etc. */
1089 break;
1090 case INT_BABBLE:
1091 dev_dbg(hcd->self.controller, "%s: babble "
1092 "error during uFrame %d\n",
1093 __func__, i);
1094 urb->status = -EOVERFLOW;
1095 break;
1096 }
1097 dw4 >>= 3;
1098 }
1166 1099
1167 urb = qtd->urb; 1100 return PTD_STATE_URB_RETIRE;
1168 qtd = clean_up_qtdlist(qtd, qh); 1101 }
1169 isp1760_urb_done(hcd, urb);
1170 1102
1171 } else { 1103 return PTD_STATE_QTD_DONE;
1172 /* next QTD of this URB */ 1104}
1173 1105
1174 qtd = clean_this_qtd(qtd, qh); 1106static int check_atl_transfer(struct usb_hcd *hcd, struct ptd *ptd,
1175 BUG_ON(!qtd); 1107 struct urb *urb)
1176 } 1108{
1109 WARN_ON(!ptd);
1110 if (ptd->dw3 & DW3_HALT_BIT) {
1111 if (ptd->dw3 & DW3_BABBLE_BIT)
1112 urb->status = -EOVERFLOW;
1113 else if (FROM_DW3_CERR(ptd->dw3))
1114 urb->status = -EPIPE; /* Stall */
1115 else if (ptd->dw3 & DW3_ERROR_BIT)
1116 urb->status = -EPROTO; /* XactErr */
1117 else
1118 urb->status = -EPROTO; /* Unknown */
1119/*
1120 dev_dbg(hcd->self.controller, "%s: ptd error:\n"
1121 " dw0: %08x dw1: %08x dw2: %08x dw3: %08x\n"
1122 " dw4: %08x dw5: %08x dw6: %08x dw7: %08x\n",
1123 __func__,
1124 ptd->dw0, ptd->dw1, ptd->dw2, ptd->dw3,
1125 ptd->dw4, ptd->dw5, ptd->dw6, ptd->dw7);
1126*/
1127 return PTD_STATE_URB_RETIRE;
1128 }
1177 1129
1178 if (qtd) 1130 if ((ptd->dw3 & DW3_ERROR_BIT) && (ptd->dw3 & DW3_ACTIVE_BIT)) {
1179 enqueue_an_ATL_packet(hcd, qh, qtd); 1131 /* Transfer Error, *but* active and no HALT -> reload */
1132 dev_dbg(hcd->self.controller, "PID error; reloading ptd\n");
1133 return PTD_STATE_QTD_RELOAD;
1134 }
1180 1135
1181 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG); 1136 if (!FROM_DW3_NAKCOUNT(ptd->dw3) && (ptd->dw3 & DW3_ACTIVE_BIT)) {
1137 /*
1138 * NAKs are handled in HW by the chip. Usually if the
1139 * device is not able to send data fast enough.
1140 * This happens mostly on slower hardware.
1141 */
1142 return PTD_STATE_QTD_RELOAD;
1182 } 1143 }
1183 if (priv->atl_queued <= 1) 1144
1184 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, 1145 return PTD_STATE_QTD_DONE;
1185 INTERRUPT_ENABLE_MASK);
1186} 1146}
1187 1147
1188static void do_intl_int(struct usb_hcd *hcd) 1148static irqreturn_t isp1760_irq(struct usb_hcd *hcd)
1189{ 1149{
1190 struct isp1760_hcd *priv = hcd_to_priv(hcd); 1150 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1191 u32 done_map, skip_map; 1151 u32 imask;
1152 irqreturn_t irqret = IRQ_NONE;
1192 struct ptd ptd; 1153 struct ptd ptd;
1193 struct urb *urb;
1194 u32 length;
1195 u32 or_map;
1196 int error;
1197 u32 slot;
1198 struct isp1760_qtd *qtd;
1199 struct isp1760_qh *qh; 1154 struct isp1760_qh *qh;
1155 int int_done_map, atl_done_map;
1156 int slot;
1157 int state;
1158 struct slotinfo *slots;
1159 u32 ptd_offset;
1160 struct isp1760_qtd *qtd;
1161 int modified;
1162 static int last_active_ptds;
1200 1163
1201 done_map = reg_read32(hcd->regs, HC_INT_PTD_DONEMAP_REG); 1164 spin_lock(&priv->lock);
1202 skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
1203
1204 or_map = reg_read32(hcd->regs, HC_INT_IRQ_MASK_OR_REG);
1205 or_map &= ~done_map;
1206 reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, or_map);
1207
1208 while (done_map) {
1209 slot = __ffs(done_map);
1210 done_map &= ~(1 << slot);
1211 skip_map |= (1 << slot);
1212
1213 qtd = priv->int_ints[slot].qtd;
1214 qh = priv->int_ints[slot].qh;
1215
1216 if (!qh) {
1217 dev_err(hcd->self.controller, "(INT) qh is 0\n");
1218 continue;
1219 }
1220 1165
1221 ptd_read(hcd->regs, INT_PTD_OFFSET, slot, &ptd); 1166 if (!(hcd->state & HC_STATE_RUNNING))
1222 check_int_err_status(hcd, ptd.dw4); 1167 goto leave;
1223
1224 error = check_error(hcd, &ptd);
1225 if (error) {
1226#if 0
1227 printk(KERN_ERR "Error in %s().\n", __func__);
1228 printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1229 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1230 "%08x dw7: %08x\n",
1231 ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1232 ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1233#endif
1234 qtd->urb->status = -EPIPE;
1235 priv->int_ints[slot].qh->toggle = 0;
1236 priv->int_ints[slot].qh->ping = 0;
1237 1168
1169 imask = reg_read32(hcd->regs, HC_INTERRUPT_REG);
1170 if (unlikely(!imask))
1171 goto leave;
1172 reg_write32(hcd->regs, HC_INTERRUPT_REG, imask); /* Clear */
1173
1174 int_done_map = reg_read32(hcd->regs, HC_INT_PTD_DONEMAP_REG);
1175 atl_done_map = reg_read32(hcd->regs, HC_ATL_PTD_DONEMAP_REG);
1176 modified = int_done_map | atl_done_map;
1177
1178 while (int_done_map || atl_done_map) {
1179 if (int_done_map) {
1180 /* INT ptd */
1181 slot = __ffs(int_done_map);
1182 int_done_map &= ~(1 << slot);
1183 slots = priv->int_slots;
1184 if (!slots[slot].qh)
1185 continue;
1186 ptd_offset = INT_PTD_OFFSET;
1187 ptd_read(hcd->regs, INT_PTD_OFFSET, slot, &ptd);
1188 state = check_int_transfer(hcd, &ptd,
1189 slots[slot].qtd->urb);
1238 } else { 1190 } else {
1239 priv->int_ints[slot].qh->toggle = ptd.dw3 & (1 << 25); 1191 /* ATL ptd */
1240 priv->int_ints[slot].qh->ping = ptd.dw3 & (1 << 26); 1192 slot = __ffs(atl_done_map);
1193 atl_done_map &= ~(1 << slot);
1194 slots = priv->atl_slots;
1195 if (!slots[slot].qh)
1196 continue;
1197 ptd_offset = ATL_PTD_OFFSET;
1198 ptd_read(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
1199 state = check_atl_transfer(hcd, &ptd,
1200 slots[slot].qtd->urb);
1241 } 1201 }
1242 1202
1243 if (qtd->urb->dev->speed != USB_SPEED_HIGH) 1203 qtd = slots[slot].qtd;
1244 length = PTD_XFERRED_LENGTH_LO(ptd.dw3); 1204 slots[slot].qtd = NULL;
1245 else 1205 qh = slots[slot].qh;
1246 length = PTD_XFERRED_LENGTH(ptd.dw3); 1206 slots[slot].qh = NULL;
1207 priv->active_ptds--;
1208 qh->slot = -1;
1209
1210 WARN_ON(qtd->status != QTD_XFER_STARTED);
1211
1212 switch (state) {
1213 case PTD_STATE_QTD_DONE:
1214 if ((usb_pipeint(qtd->urb->pipe)) &&
1215 (qtd->urb->dev->speed != USB_SPEED_HIGH))
1216 qtd->actual_length =
1217 FROM_DW3_SCS_NRBYTESTRANSFERRED(ptd.dw3);
1218 else
1219 qtd->actual_length =
1220 FROM_DW3_NRBYTESTRANSFERRED(ptd.dw3);
1221
1222 qtd->status = QTD_XFER_COMPLETE;
1223 if (list_is_last(&qtd->qtd_list, &qh->qtd_list) ||
1224 is_short_bulk(qtd))
1225 qtd = NULL;
1226 else
1227 qtd = list_entry(qtd->qtd_list.next,
1228 typeof(*qtd), qtd_list);
1229
1230 qh->toggle = FROM_DW3_DATA_TOGGLE(ptd.dw3);
1231 qh->ping = FROM_DW3_PING(ptd.dw3);
1232 break;
1247 1233
1248 if (length) { 1234 case PTD_STATE_QTD_RELOAD: /* QTD_RETRY, for atls only */
1249 switch (DW1_GET_PID(ptd.dw1)) { 1235 qtd->status = QTD_PAYLOAD_ALLOC;
1250 case IN_PID: 1236 ptd.dw0 |= DW0_VALID_BIT;
1251 mem_reads8(hcd->regs, qtd->payload_addr, 1237 /* RL counter = ERR counter */
1252 qtd->data_buffer, length); 1238 ptd.dw3 &= ~TO_DW3_NAKCOUNT(0xf);
1253 case OUT_PID: 1239 ptd.dw3 |= TO_DW3_NAKCOUNT(FROM_DW2_RL(ptd.dw2));
1240 ptd.dw3 &= ~TO_DW3_CERR(3);
1241 ptd.dw3 |= TO_DW3_CERR(ERR_COUNTER);
1242 qh->toggle = FROM_DW3_DATA_TOGGLE(ptd.dw3);
1243 qh->ping = FROM_DW3_PING(ptd.dw3);
1244 break;
1254 1245
1255 qtd->urb->actual_length += length; 1246 case PTD_STATE_URB_RETIRE:
1247 qtd->status = QTD_RETIRE;
1248 qtd = NULL;
1249 qh->toggle = 0;
1250 qh->ping = 0;
1251 break;
1256 1252
1257 case SETUP_PID: 1253 default:
1258 break; 1254 WARN_ON(1);
1259 } 1255 continue;
1260 } 1256 }
1261 1257
1262 priv->int_ints[slot].qtd = NULL; 1258 if (qtd && (qtd->status == QTD_PAYLOAD_ALLOC)) {
1263 priv->int_ints[slot].qh = NULL; 1259 if (slots == priv->int_slots) {
1264 1260 if (state == PTD_STATE_QTD_RELOAD)
1265 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map); 1261 dev_err(hcd->self.controller,
1266 free_mem(hcd, qtd); 1262 "%s: PTD_STATE_QTD_RELOAD on "
1267 1263 "interrupt packet\n", __func__);
1268 if (qtd->urb->status == -EPIPE) { 1264 if (state != PTD_STATE_QTD_RELOAD)
1269 /* HALT received */ 1265 create_ptd_int(qh, qtd, &ptd);
1270 1266 } else {
1271 urb = qtd->urb; 1267 if (state != PTD_STATE_QTD_RELOAD)
1272 qtd = clean_up_qtdlist(qtd, qh); 1268 create_ptd_atl(qh, qtd, &ptd);
1273 isp1760_urb_done(hcd, urb); 1269 }
1274
1275 } else if (last_qtd_of_urb(qtd, qh)) {
1276
1277 if (qtd->urb->status == -EINPROGRESS)
1278 qtd->urb->status = 0;
1279
1280 urb = qtd->urb;
1281 qtd = clean_up_qtdlist(qtd, qh);
1282 isp1760_urb_done(hcd, urb);
1283
1284 } else {
1285 /* next QTD of this URB */
1286 1270
1287 qtd = clean_this_qtd(qtd, qh); 1271 start_bus_transfer(hcd, ptd_offset, slot, slots, qtd,
1288 BUG_ON(!qtd); 1272 qh, &ptd);
1289 } 1273 }
1290
1291 if (qtd)
1292 enqueue_an_INT_packet(hcd, qh, qtd);
1293
1294 skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
1295 } 1274 }
1296}
1297
1298static struct isp1760_qh *qh_make(struct usb_hcd *hcd, struct urb *urb,
1299 gfp_t flags)
1300{
1301 struct isp1760_qh *qh;
1302 int is_input, type;
1303
1304 qh = isp1760_qh_alloc(flags);
1305 if (!qh)
1306 return qh;
1307
1308 /*
1309 * init endpoint/device data for this QH
1310 */
1311 is_input = usb_pipein(urb->pipe);
1312 type = usb_pipetype(urb->pipe);
1313 1275
1314 if (!usb_pipecontrol(urb->pipe)) 1276 if (modified)
1315 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1277 schedule_ptds(hcd);
1316 1);
1317 return qh;
1318}
1319 1278
1320/* 1279 /* ISP1760 Errata 2 explains that interrupts may be missed (or not
1321 * For control/bulk/interrupt, return QH with these TDs appended. 1280 happen?) if two USB devices are running simultaneously. Perhaps
1322 * Allocates and initializes the QH if necessary. 1281 this happens when a PTD is finished during interrupt handling;
1323 * Returns null if it can't allocate a QH it needs to. 1282 enable SOF interrupts if PTDs are still scheduled when exiting this
1324 * If the QH has TDs (urbs) already, that's great. 1283 interrupt handler, just to be safe. */
1325 */
1326static struct isp1760_qh *qh_append_tds(struct usb_hcd *hcd,
1327 struct urb *urb, struct list_head *qtd_list, int epnum,
1328 void **ptr)
1329{
1330 struct isp1760_qh *qh;
1331 1284
1332 qh = (struct isp1760_qh *)*ptr; 1285 if (priv->active_ptds != last_active_ptds) {
1333 if (!qh) { 1286 if (priv->active_ptds > 0)
1334 /* can't sleep here, we have priv->lock... */ 1287 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE,
1335 qh = qh_make(hcd, urb, GFP_ATOMIC); 1288 INTERRUPT_ENABLE_SOT_MASK);
1336 if (!qh) 1289 else
1337 return qh; 1290 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE,
1338 *ptr = qh; 1291 INTERRUPT_ENABLE_MASK);
1292 last_active_ptds = priv->active_ptds;
1339 } 1293 }
1340 1294
1341 list_splice(qtd_list, qh->qtd_list.prev); 1295 irqret = IRQ_HANDLED;
1296leave:
1297 spin_unlock(&priv->lock);
1342 1298
1343 return qh; 1299 return irqret;
1344} 1300}
1345 1301
1346static void qtd_list_free(struct urb *urb, struct list_head *qtd_list) 1302static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len)
1347{ 1303{
1348 struct list_head *entry, *temp; 1304 qtd->data_buffer = databuffer;
1349 1305
1350 list_for_each_safe(entry, temp, qtd_list) { 1306 if (len > MAX_PAYLOAD_SIZE)
1351 struct isp1760_qtd *qtd; 1307 len = MAX_PAYLOAD_SIZE;
1308 qtd->length = len;
1352 1309
1353 qtd = list_entry(entry, struct isp1760_qtd, qtd_list); 1310 return qtd->length;
1354 list_del(&qtd->qtd_list);
1355 isp1760_qtd_free(qtd);
1356 }
1357} 1311}
1358 1312
1359static int isp1760_prepare_enqueue(struct usb_hcd *hcd, struct urb *urb, 1313static void qtd_list_free(struct list_head *qtd_list)
1360 struct list_head *qtd_list, gfp_t mem_flags, packet_enqueue *p)
1361{ 1314{
1362 struct isp1760_hcd *priv = hcd_to_priv(hcd); 1315 struct isp1760_qtd *qtd, *qtd_next;
1363 struct isp1760_qtd *qtd;
1364 int epnum;
1365 unsigned long flags;
1366 struct isp1760_qh *qh = NULL;
1367 int rc;
1368 int qh_busy;
1369 1316
1370 qtd = list_entry(qtd_list->next, struct isp1760_qtd, qtd_list); 1317 list_for_each_entry_safe(qtd, qtd_next, qtd_list, qtd_list) {
1371 epnum = urb->ep->desc.bEndpointAddress; 1318 list_del(&qtd->qtd_list);
1372 1319 qtd_free(qtd);
1373 spin_lock_irqsave(&priv->lock, flags);
1374 if (!HCD_HW_ACCESSIBLE(hcd)) {
1375 rc = -ESHUTDOWN;
1376 goto done;
1377 }
1378 rc = usb_hcd_link_urb_to_ep(hcd, urb);
1379 if (rc)
1380 goto done;
1381
1382 qh = urb->ep->hcpriv;
1383 if (qh)
1384 qh_busy = !list_empty(&qh->qtd_list);
1385 else
1386 qh_busy = 0;
1387
1388 qh = qh_append_tds(hcd, urb, qtd_list, epnum, &urb->ep->hcpriv);
1389 if (!qh) {
1390 usb_hcd_unlink_urb_from_ep(hcd, urb);
1391 rc = -ENOMEM;
1392 goto done;
1393 } 1320 }
1394
1395 if (!qh_busy)
1396 p(hcd, qh, qtd);
1397
1398done:
1399 spin_unlock_irqrestore(&priv->lock, flags);
1400 if (!qh)
1401 qtd_list_free(urb, qtd_list);
1402 return rc;
1403}
1404
1405static struct isp1760_qtd *isp1760_qtd_alloc(gfp_t flags)
1406{
1407 struct isp1760_qtd *qtd;
1408
1409 qtd = kmem_cache_zalloc(qtd_cachep, flags);
1410 if (qtd)
1411 INIT_LIST_HEAD(&qtd->qtd_list);
1412
1413 return qtd;
1414} 1321}
1415 1322
1416/* 1323/*
1417 * create a list of filled qtds for this URB; won't link into qh. 1324 * Packetize urb->transfer_buffer into list of packets of size wMaxPacketSize.
1325 * Also calculate the PID type (SETUP/IN/OUT) for each packet.
1418 */ 1326 */
1419#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff) 1327#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1420static struct list_head *qh_urb_transaction(struct usb_hcd *hcd, 1328static void packetize_urb(struct usb_hcd *hcd,
1421 struct urb *urb, struct list_head *head, gfp_t flags) 1329 struct urb *urb, struct list_head *head, gfp_t flags)
1422{ 1330{
1423 struct isp1760_qtd *qtd; 1331 struct isp1760_qtd *qtd;
1424 void *buf; 1332 void *buf;
1425 int len, maxpacket; 1333 int len, maxpacketsize;
1426 int is_input; 1334 u8 packet_type;
1427 u32 token;
1428 1335
1429 /* 1336 /*
1430 * URBs map to sequences of QTDs: one logical transaction 1337 * URBs map to sequences of QTDs: one logical transaction
1431 */ 1338 */
1432 qtd = isp1760_qtd_alloc(flags);
1433 if (!qtd)
1434 return NULL;
1435 1339
1436 list_add_tail(&qtd->qtd_list, head); 1340 if (!urb->transfer_buffer && urb->transfer_buffer_length) {
1437 qtd->urb = urb; 1341 /* XXX This looks like usb storage / SCSI bug */
1438 urb->status = -EINPROGRESS; 1342 dev_err(hcd->self.controller,
1343 "buf is null, dma is %08lx len is %d\n",
1344 (long unsigned)urb->transfer_dma,
1345 urb->transfer_buffer_length);
1346 WARN_ON(1);
1347 }
1439 1348
1440 token = 0; 1349 if (usb_pipein(urb->pipe))
1441 /* for split transactions, SplitXState initialized to zero */ 1350 packet_type = IN_PID;
1351 else
1352 packet_type = OUT_PID;
1442 1353
1443 len = urb->transfer_buffer_length;
1444 is_input = usb_pipein(urb->pipe);
1445 if (usb_pipecontrol(urb->pipe)) { 1354 if (usb_pipecontrol(urb->pipe)) {
1446 /* SETUP pid */ 1355 qtd = qtd_alloc(flags, urb, SETUP_PID);
1447 qtd_fill(qtd, urb->setup_packet,
1448 sizeof(struct usb_ctrlrequest),
1449 token | SETUP_PID);
1450
1451 /* ... and always at least one more pid */
1452 qtd = isp1760_qtd_alloc(flags);
1453 if (!qtd) 1356 if (!qtd)
1454 goto cleanup; 1357 goto cleanup;
1455 qtd->urb = urb; 1358 qtd_fill(qtd, urb->setup_packet, sizeof(struct usb_ctrlrequest));
1456 list_add_tail(&qtd->qtd_list, head); 1359 list_add_tail(&qtd->qtd_list, head);
1457 1360
1458 /* for zero length DATA stages, STATUS is always IN */ 1361 /* for zero length DATA stages, STATUS is always IN */
1459 if (len == 0) 1362 if (urb->transfer_buffer_length == 0)
1460 token |= IN_PID; 1363 packet_type = IN_PID;
1461 } 1364 }
1462 1365
1463 /* 1366 maxpacketsize = max_packet(usb_maxpacket(urb->dev, urb->pipe,
1464 * data transfer stage: buffer setup 1367 usb_pipeout(urb->pipe)));
1465 */
1466 buf = urb->transfer_buffer;
1467
1468 if (is_input)
1469 token |= IN_PID;
1470 else
1471 token |= OUT_PID;
1472
1473 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1474 1368
1475 /* 1369 /*
1476 * buffer gets wrapped in one or more qtds; 1370 * buffer gets wrapped in one or more qtds;
1477 * last one may be "short" (including zero len) 1371 * last one may be "short" (including zero len)
1478 * and may serve as a control status ack 1372 * and may serve as a control status ack
1479 */ 1373 */
1374 buf = urb->transfer_buffer;
1375 len = urb->transfer_buffer_length;
1376
1480 for (;;) { 1377 for (;;) {
1481 int this_qtd_len; 1378 int this_qtd_len;
1482 1379
1483 if (!buf && len) { 1380 qtd = qtd_alloc(flags, urb, packet_type);
1484 /* XXX This looks like usb storage / SCSI bug */ 1381 if (!qtd)
1485 dev_err(hcd->self.controller, "buf is null, dma is %08lx len is %d\n", 1382 goto cleanup;
1486 (long unsigned)urb->transfer_dma, len); 1383 this_qtd_len = qtd_fill(qtd, buf, len);
1487 WARN_ON(1); 1384 list_add_tail(&qtd->qtd_list, head);
1488 }
1489 1385
1490 this_qtd_len = qtd_fill(qtd, buf, len, token);
1491 len -= this_qtd_len; 1386 len -= this_qtd_len;
1492 buf += this_qtd_len; 1387 buf += this_qtd_len;
1493 1388
1494 if (len <= 0) 1389 if (len <= 0)
1495 break; 1390 break;
1496
1497 qtd = isp1760_qtd_alloc(flags);
1498 if (!qtd)
1499 goto cleanup;
1500 qtd->urb = urb;
1501 list_add_tail(&qtd->qtd_list, head);
1502 } 1391 }
1503 1392
1504 /* 1393 /*
@@ -1510,184 +1399,163 @@ static struct list_head *qh_urb_transaction(struct usb_hcd *hcd,
1510 1399
1511 if (usb_pipecontrol(urb->pipe)) { 1400 if (usb_pipecontrol(urb->pipe)) {
1512 one_more = 1; 1401 one_more = 1;
1513 /* "in" <--> "out" */ 1402 if (packet_type == IN_PID)
1514 token ^= IN_PID; 1403 packet_type = OUT_PID;
1404 else
1405 packet_type = IN_PID;
1515 } else if (usb_pipebulk(urb->pipe) 1406 } else if (usb_pipebulk(urb->pipe)
1516 && (urb->transfer_flags & URB_ZERO_PACKET) 1407 && (urb->transfer_flags & URB_ZERO_PACKET)
1517 && !(urb->transfer_buffer_length % maxpacket)) { 1408 && !(urb->transfer_buffer_length %
1409 maxpacketsize)) {
1518 one_more = 1; 1410 one_more = 1;
1519 } 1411 }
1520 if (one_more) { 1412 if (one_more) {
1521 qtd = isp1760_qtd_alloc(flags); 1413 qtd = qtd_alloc(flags, urb, packet_type);
1522 if (!qtd) 1414 if (!qtd)
1523 goto cleanup; 1415 goto cleanup;
1524 qtd->urb = urb;
1525 list_add_tail(&qtd->qtd_list, head);
1526 1416
1527 /* never any data in such packets */ 1417 /* never any data in such packets */
1528 qtd_fill(qtd, NULL, 0, token); 1418 qtd_fill(qtd, NULL, 0);
1419 list_add_tail(&qtd->qtd_list, head);
1529 } 1420 }
1530 } 1421 }
1531 1422
1532 qtd->status = 0; 1423 return;
1533 return head;
1534 1424
1535cleanup: 1425cleanup:
1536 qtd_list_free(urb, head); 1426 qtd_list_free(head);
1537 return NULL;
1538} 1427}
1539 1428
1540static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, 1429static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
1541 gfp_t mem_flags) 1430 gfp_t mem_flags)
1542{ 1431{
1543 struct list_head qtd_list; 1432 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1544 packet_enqueue *pe; 1433 struct list_head *ep_queue;
1545 1434 struct isp1760_qh *qh, *qhit;
1546 INIT_LIST_HEAD(&qtd_list); 1435 unsigned long spinflags;
1436 LIST_HEAD(new_qtds);
1437 int retval;
1438 int qh_in_queue;
1547 1439
1548 switch (usb_pipetype(urb->pipe)) { 1440 switch (usb_pipetype(urb->pipe)) {
1549 case PIPE_CONTROL: 1441 case PIPE_CONTROL:
1442 ep_queue = &priv->controlqhs;
1443 break;
1550 case PIPE_BULK: 1444 case PIPE_BULK:
1551 if (!qh_urb_transaction(hcd, urb, &qtd_list, mem_flags)) 1445 ep_queue = &priv->bulkqhs;
1552 return -ENOMEM;
1553 pe = enqueue_an_ATL_packet;
1554 break; 1446 break;
1555
1556 case PIPE_INTERRUPT: 1447 case PIPE_INTERRUPT:
1557 if (!qh_urb_transaction(hcd, urb, &qtd_list, mem_flags)) 1448 if (urb->interval < 0)
1558 return -ENOMEM; 1449 return -EINVAL;
1559 pe = enqueue_an_INT_packet; 1450 /* FIXME: Check bandwidth */
1451 ep_queue = &priv->interruptqhs;
1560 break; 1452 break;
1561
1562 case PIPE_ISOCHRONOUS: 1453 case PIPE_ISOCHRONOUS:
1563 dev_err(hcd->self.controller, "PIPE_ISOCHRONOUS ain't supported\n"); 1454 dev_err(hcd->self.controller, "%s: isochronous USB packets "
1455 "not yet supported\n",
1456 __func__);
1457 return -EPIPE;
1564 default: 1458 default:
1459 dev_err(hcd->self.controller, "%s: unknown pipe type\n",
1460 __func__);
1565 return -EPIPE; 1461 return -EPIPE;
1566 } 1462 }
1567 1463
1568 return isp1760_prepare_enqueue(hcd, urb, &qtd_list, mem_flags, pe); 1464 if (usb_pipein(urb->pipe))
1569} 1465 urb->actual_length = 0;
1570 1466
1571static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) 1467 packetize_urb(hcd, urb, &new_qtds, mem_flags);
1572{ 1468 if (list_empty(&new_qtds))
1573 struct isp1760_hcd *priv = hcd_to_priv(hcd); 1469 return -ENOMEM;
1574 struct inter_packet_info *ints; 1470 urb->hcpriv = NULL; /* Used to signal unlink to interrupt handler */
1575 u32 i;
1576 u32 reg_base, or_reg, skip_reg;
1577 unsigned long flags;
1578 struct ptd ptd;
1579 packet_enqueue *pe;
1580
1581 switch (usb_pipetype(urb->pipe)) {
1582 case PIPE_ISOCHRONOUS:
1583 return -EPIPE;
1584 break;
1585 1471
1586 case PIPE_INTERRUPT: 1472 retval = 0;
1587 ints = priv->int_ints; 1473 spin_lock_irqsave(&priv->lock, spinflags);
1588 reg_base = INT_PTD_OFFSET;
1589 or_reg = HC_INT_IRQ_MASK_OR_REG;
1590 skip_reg = HC_INT_PTD_SKIPMAP_REG;
1591 pe = enqueue_an_INT_packet;
1592 break;
1593 1474
1594 default: 1475 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
1595 ints = priv->atl_ints; 1476 retval = -ESHUTDOWN;
1596 reg_base = ATL_PTD_OFFSET; 1477 goto out;
1597 or_reg = HC_ATL_IRQ_MASK_OR_REG;
1598 skip_reg = HC_ATL_PTD_SKIPMAP_REG;
1599 pe = enqueue_an_ATL_packet;
1600 break;
1601 } 1478 }
1479 retval = usb_hcd_link_urb_to_ep(hcd, urb);
1480 if (retval)
1481 goto out;
1602 1482
1603 memset(&ptd, 0, sizeof(ptd)); 1483 qh = urb->ep->hcpriv;
1604 spin_lock_irqsave(&priv->lock, flags); 1484 if (qh) {
1605 1485 qh_in_queue = 0;
1606 for (i = 0; i < 32; i++) { 1486 list_for_each_entry(qhit, ep_queue, qh_list) {
1607 if (!ints[i].qh) 1487 if (qhit == qh) {
1608 continue; 1488 qh_in_queue = 1;
1609 BUG_ON(!ints[i].qtd);
1610
1611 if (ints[i].qtd->urb == urb) {
1612 u32 skip_map;
1613 u32 or_map;
1614 struct isp1760_qtd *qtd;
1615 struct isp1760_qh *qh;
1616
1617 skip_map = reg_read32(hcd->regs, skip_reg);
1618 skip_map |= 1 << i;
1619 reg_write32(hcd->regs, skip_reg, skip_map);
1620
1621 or_map = reg_read32(hcd->regs, or_reg);
1622 or_map &= ~(1 << i);
1623 reg_write32(hcd->regs, or_reg, or_map);
1624
1625 ptd_write(hcd->regs, reg_base, i, &ptd);
1626
1627 qtd = ints[i].qtd;
1628 qh = ints[i].qh;
1629
1630 free_mem(hcd, qtd);
1631 qtd = clean_up_qtdlist(qtd, qh);
1632
1633 ints[i].qh = NULL;
1634 ints[i].qtd = NULL;
1635
1636 urb->status = status;
1637 isp1760_urb_done(hcd, urb);
1638 if (qtd)
1639 pe(hcd, qh, qtd);
1640 break;
1641
1642 } else {
1643 struct isp1760_qtd *qtd;
1644
1645 list_for_each_entry(qtd, &ints[i].qtd->qtd_list,
1646 qtd_list) {
1647 if (qtd->urb == urb) {
1648 clean_up_qtdlist(qtd, ints[i].qh);
1649 isp1760_urb_done(hcd, urb);
1650 qtd = NULL;
1651 break;
1652 }
1653 }
1654
1655 /* We found the urb before the last slot */
1656 if (!qtd)
1657 break; 1489 break;
1490 }
1491 }
1492 if (!qh_in_queue)
1493 list_add_tail(&qh->qh_list, ep_queue);
1494 } else {
1495 qh = qh_alloc(GFP_ATOMIC);
1496 if (!qh) {
1497 retval = -ENOMEM;
1498 goto out;
1658 } 1499 }
1500 list_add_tail(&qh->qh_list, ep_queue);
1501 urb->ep->hcpriv = qh;
1659 } 1502 }
1660 1503
1661 spin_unlock_irqrestore(&priv->lock, flags); 1504 list_splice_tail(&new_qtds, &qh->qtd_list);
1662 return 0; 1505 schedule_ptds(hcd);
1506
1507out:
1508 spin_unlock_irqrestore(&priv->lock, spinflags);
1509 return retval;
1663} 1510}
1664 1511
1665static irqreturn_t isp1760_irq(struct usb_hcd *hcd) 1512static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1513 int status)
1666{ 1514{
1667 struct isp1760_hcd *priv = hcd_to_priv(hcd); 1515 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1668 u32 imask; 1516 struct isp1760_qh *qh;
1669 irqreturn_t irqret = IRQ_NONE; 1517 struct isp1760_qtd *qtd;
1518 struct ptd ptd;
1519 unsigned long spinflags;
1520 int retval = 0;
1670 1521
1671 spin_lock(&priv->lock); 1522 spin_lock_irqsave(&priv->lock, spinflags);
1672 1523
1673 if (!(hcd->state & HC_STATE_RUNNING)) 1524 qh = urb->ep->hcpriv;
1674 goto leave; 1525 if (!qh) {
1526 retval = -EINVAL;
1527 goto out;
1528 }
1675 1529
1676 imask = reg_read32(hcd->regs, HC_INTERRUPT_REG); 1530 /* We need to forcefully reclaim the slot since some transfers never
1677 if (unlikely(!imask)) 1531 return, e.g. interrupt transfers and NAKed bulk transfers. */
1678 goto leave; 1532 if (qh->slot > -1) {
1533 memset(&ptd, 0, sizeof(ptd));
1534 if (usb_pipebulk(urb->pipe)) {
1535 priv->atl_slots[qh->slot].qh = NULL;
1536 priv->atl_slots[qh->slot].qtd = NULL;
1537 ptd_write(hcd->regs, ATL_PTD_OFFSET, qh->slot, &ptd);
1538 } else {
1539 priv->int_slots[qh->slot].qh = NULL;
1540 priv->int_slots[qh->slot].qtd = NULL;
1541 ptd_write(hcd->regs, INT_PTD_OFFSET, qh->slot, &ptd);
1542 }
1543 priv->active_ptds--;
1544 qh->slot = -1;
1545 }
1679 1546
1680 reg_write32(hcd->regs, HC_INTERRUPT_REG, imask); 1547 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
1681 if (imask & (HC_ATL_INT | HC_SOT_INT)) 1548 if (qtd->urb == urb)
1682 do_atl_int(hcd); 1549 qtd->status = QTD_RETIRE;
1550 }
1683 1551
1684 if (imask & HC_INTL_INT) 1552 urb->status = status;
1685 do_intl_int(hcd); 1553 schedule_ptds(hcd);
1686 1554
1687 irqret = IRQ_HANDLED; 1555out:
1688leave: 1556 spin_unlock_irqrestore(&priv->lock, spinflags);
1689 spin_unlock(&priv->lock); 1557
1690 return irqret; 1558 return retval;
1691} 1559}
1692 1560
1693static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf) 1561static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
@@ -1778,7 +1646,7 @@ static int check_reset_complete(struct usb_hcd *hcd, int index,
1778 /* if reset finished and it's still not enabled -- handoff */ 1646 /* if reset finished and it's still not enabled -- handoff */
1779 if (!(port_status & PORT_PE)) { 1647 if (!(port_status & PORT_PE)) {
1780 1648
1781 dev_err(hcd->self.controller, 1649 dev_info(hcd->self.controller,
1782 "port %d full speed --> companion\n", 1650 "port %d full speed --> companion\n",
1783 index + 1); 1651 index + 1);
1784 1652
@@ -1787,7 +1655,7 @@ static int check_reset_complete(struct usb_hcd *hcd, int index,
1787 reg_write32(hcd->regs, HC_PORTSC1, port_status); 1655 reg_write32(hcd->regs, HC_PORTSC1, port_status);
1788 1656
1789 } else 1657 } else
1790 dev_err(hcd->self.controller, "port %d high speed\n", 1658 dev_info(hcd->self.controller, "port %d high speed\n",
1791 index + 1); 1659 index + 1);
1792 1660
1793 return port_status; 1661 return port_status;
@@ -2065,43 +1933,32 @@ static void isp1760_endpoint_disable(struct usb_hcd *hcd,
2065 struct isp1760_hcd *priv = hcd_to_priv(hcd); 1933 struct isp1760_hcd *priv = hcd_to_priv(hcd);
2066 struct isp1760_qh *qh; 1934 struct isp1760_qh *qh;
2067 struct isp1760_qtd *qtd; 1935 struct isp1760_qtd *qtd;
2068 unsigned long flags; 1936 unsigned long spinflags;
1937 int do_iter;
2069 1938
2070 spin_lock_irqsave(&priv->lock, flags); 1939 spin_lock_irqsave(&priv->lock, spinflags);
2071 qh = ep->hcpriv; 1940 qh = ep->hcpriv;
2072 if (!qh) 1941 if (!qh)
2073 goto out; 1942 goto out;
2074 1943
2075 ep->hcpriv = NULL; 1944 do_iter = !list_empty(&qh->qtd_list);
2076 do { 1945 while (do_iter) {
2077 /* more than entry might get removed */ 1946 do_iter = 0;
2078 if (list_empty(&qh->qtd_list)) 1947 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
2079 break; 1948 if (qtd->urb->ep == ep) {
2080 1949 spin_unlock_irqrestore(&priv->lock, spinflags);
2081 qtd = list_first_entry(&qh->qtd_list, struct isp1760_qtd, 1950 isp1760_urb_dequeue(hcd, qtd->urb, -ECONNRESET);
2082 qtd_list); 1951 spin_lock_irqsave(&priv->lock, spinflags);
2083 1952 do_iter = 1;
2084 if (qtd->status & URB_ENQUEUED) { 1953 break; /* Restart iteration */
2085 spin_unlock_irqrestore(&priv->lock, flags); 1954 }
2086 isp1760_urb_dequeue(hcd, qtd->urb, -ECONNRESET);
2087 spin_lock_irqsave(&priv->lock, flags);
2088 } else {
2089 struct urb *urb;
2090
2091 urb = qtd->urb;
2092 clean_up_qtdlist(qtd, qh);
2093 urb->status = -ECONNRESET;
2094 isp1760_urb_done(hcd, urb);
2095 } 1955 }
2096 } while (1); 1956 }
1957 ep->hcpriv = NULL;
1958 /* Cannot free qh here since it will be parsed by schedule_ptds() */
2097 1959
2098 qh_destroy(qh);
2099 /* remove requests and leak them.
2100 * ATL are pretty fast done, INT could take a while...
2101 * The latter shoule be removed
2102 */
2103out: 1960out:
2104 spin_unlock_irqrestore(&priv->lock, flags); 1961 spin_unlock_irqrestore(&priv->lock, spinflags);
2105} 1962}
2106 1963
2107static int isp1760_get_frame(struct usb_hcd *hcd) 1964static int isp1760_get_frame(struct usb_hcd *hcd)
@@ -2165,6 +2022,13 @@ static const struct hc_driver isp1760_hc_driver = {
2165 2022
2166int __init init_kmem_once(void) 2023int __init init_kmem_once(void)
2167{ 2024{
2025 urb_listitem_cachep = kmem_cache_create("isp1760 urb_listitem",
2026 sizeof(struct urb_listitem), 0, SLAB_TEMPORARY |
2027 SLAB_MEM_SPREAD, NULL);
2028
2029 if (!urb_listitem_cachep)
2030 return -ENOMEM;
2031
2168 qtd_cachep = kmem_cache_create("isp1760_qtd", 2032 qtd_cachep = kmem_cache_create("isp1760_qtd",
2169 sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY | 2033 sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY |
2170 SLAB_MEM_SPREAD, NULL); 2034 SLAB_MEM_SPREAD, NULL);
@@ -2187,6 +2051,7 @@ void deinit_kmem_cache(void)
2187{ 2051{
2188 kmem_cache_destroy(qtd_cachep); 2052 kmem_cache_destroy(qtd_cachep);
2189 kmem_cache_destroy(qh_cachep); 2053 kmem_cache_destroy(qh_cachep);
2054 kmem_cache_destroy(urb_listitem_cachep);
2190} 2055}
2191 2056
2192struct usb_hcd *isp1760_register(phys_addr_t res_start, resource_size_t res_len, 2057struct usb_hcd *isp1760_register(phys_addr_t res_start, resource_size_t res_len,
diff --git a/drivers/usb/host/isp1760-hcd.h b/drivers/usb/host/isp1760-hcd.h
index 870507690607..014a7dfadf91 100644
--- a/drivers/usb/host/isp1760-hcd.h
+++ b/drivers/usb/host/isp1760-hcd.h
@@ -49,10 +49,9 @@ void deinit_kmem_cache(void);
49#define SW_RESET_RESET_ALL (1 << 0) 49#define SW_RESET_RESET_ALL (1 << 0)
50 50
51#define HC_BUFFER_STATUS_REG 0x334 51#define HC_BUFFER_STATUS_REG 0x334
52#define ATL_BUFFER 0x1 52#define ISO_BUF_FILL (1 << 2)
53#define INT_BUFFER 0x2 53#define INT_BUF_FILL (1 << 1)
54#define ISO_BUFFER 0x4 54#define ATL_BUF_FILL (1 << 0)
55#define BUFFER_MAP 0x7
56 55
57#define HC_MEMORY_REG 0x33c 56#define HC_MEMORY_REG 0x33c
58#define ISP_BANK(x) ((x) << 16) 57#define ISP_BANK(x) ((x) << 16)
@@ -68,14 +67,13 @@ void deinit_kmem_cache(void);
68#define HC_INTERRUPT_REG 0x310 67#define HC_INTERRUPT_REG 0x310
69 68
70#define HC_INTERRUPT_ENABLE 0x314 69#define HC_INTERRUPT_ENABLE 0x314
71#define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT | HC_EOT_INT)
72#define INTERRUPT_ENABLE_SOT_MASK (HC_INTL_INT | HC_SOT_INT | HC_EOT_INT)
73
74#define HC_ISO_INT (1 << 9) 70#define HC_ISO_INT (1 << 9)
75#define HC_ATL_INT (1 << 8) 71#define HC_ATL_INT (1 << 8)
76#define HC_INTL_INT (1 << 7) 72#define HC_INTL_INT (1 << 7)
77#define HC_EOT_INT (1 << 3) 73#define HC_EOT_INT (1 << 3)
78#define HC_SOT_INT (1 << 1) 74#define HC_SOT_INT (1 << 1)
75#define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT)
76#define INTERRUPT_ENABLE_SOT_MASK (HC_SOT_INT)
79 77
80#define HC_ISO_IRQ_MASK_OR_REG 0x318 78#define HC_ISO_IRQ_MASK_OR_REG 0x318
81#define HC_INT_IRQ_MASK_OR_REG 0x31C 79#define HC_INT_IRQ_MASK_OR_REG 0x31C
@@ -106,7 +104,7 @@ struct ptd {
106#define ATL_PTD_OFFSET 0x0c00 104#define ATL_PTD_OFFSET 0x0c00
107#define PAYLOAD_OFFSET 0x1000 105#define PAYLOAD_OFFSET 0x1000
108 106
109struct inter_packet_info { 107struct slotinfo {
110 struct isp1760_qh *qh; 108 struct isp1760_qh *qh;
111 struct isp1760_qtd *qtd; 109 struct isp1760_qtd *qtd;
112}; 110};
@@ -156,54 +154,52 @@ struct memory_chunk {
156 154
157/* ATL */ 155/* ATL */
158/* DW0 */ 156/* DW0 */
159#define PTD_VALID 1 157#define DW0_VALID_BIT 1
160#define PTD_LENGTH(x) (((u32) x) << 3) 158#define FROM_DW0_VALID(x) ((x) & 0x01)
161#define PTD_MAXPACKET(x) (((u32) x) << 18) 159#define TO_DW0_LENGTH(x) (((u32) x) << 3)
162#define PTD_MULTI(x) (((u32) x) << 29) 160#define TO_DW0_MAXPACKET(x) (((u32) x) << 18)
163#define PTD_ENDPOINT(x) (((u32) x) << 31) 161#define TO_DW0_MULTI(x) (((u32) x) << 29)
162#define TO_DW0_ENDPOINT(x) (((u32) x) << 31)
164/* DW1 */ 163/* DW1 */
165#define PTD_DEVICE_ADDR(x) (((u32) x) << 3) 164#define TO_DW1_DEVICE_ADDR(x) (((u32) x) << 3)
166#define PTD_PID_TOKEN(x) (((u32) x) << 10) 165#define TO_DW1_PID_TOKEN(x) (((u32) x) << 10)
167#define PTD_TRANS_BULK ((u32) 2 << 12) 166#define DW1_TRANS_BULK ((u32) 2 << 12)
168#define PTD_TRANS_INT ((u32) 3 << 12) 167#define DW1_TRANS_INT ((u32) 3 << 12)
169#define PTD_TRANS_SPLIT ((u32) 1 << 14) 168#define DW1_TRANS_SPLIT ((u32) 1 << 14)
170#define PTD_SE_USB_LOSPEED ((u32) 2 << 16) 169#define DW1_SE_USB_LOSPEED ((u32) 2 << 16)
171#define PTD_PORT_NUM(x) (((u32) x) << 18) 170#define TO_DW1_PORT_NUM(x) (((u32) x) << 18)
172#define PTD_HUB_NUM(x) (((u32) x) << 25) 171#define TO_DW1_HUB_NUM(x) (((u32) x) << 25)
173#define PTD_PING(x) (((u32) x) << 26)
174/* DW2 */ 172/* DW2 */
175#define PTD_RL_CNT(x) (((u32) x) << 25) 173#define TO_DW2_DATA_START_ADDR(x) (((u32) x) << 8)
176#define PTD_DATA_START_ADDR(x) (((u32) x) << 8) 174#define TO_DW2_RL(x) ((x) << 25)
177#define BASE_ADDR 0x1000 175#define FROM_DW2_RL(x) (((x) >> 25) & 0xf)
178/* DW3 */ 176/* DW3 */
179#define PTD_CERR(x) (((u32) x) << 23) 177#define FROM_DW3_NRBYTESTRANSFERRED(x) ((x) & 0x7fff)
180#define PTD_NAC_CNT(x) (((u32) x) << 19) 178#define FROM_DW3_SCS_NRBYTESTRANSFERRED(x) ((x) & 0x07ff)
181#define PTD_ACTIVE ((u32) 1 << 31) 179#define TO_DW3_NAKCOUNT(x) ((x) << 19)
182#define PTD_DATA_TOGGLE(x) (((u32) x) << 25) 180#define FROM_DW3_NAKCOUNT(x) (((x) >> 19) & 0xf)
183 181#define TO_DW3_CERR(x) ((x) << 23)
184#define DW3_HALT_BIT (1 << 30) 182#define FROM_DW3_CERR(x) (((x) >> 23) & 0x3)
183#define TO_DW3_DATA_TOGGLE(x) ((x) << 25)
184#define FROM_DW3_DATA_TOGGLE(x) (((x) >> 25) & 0x1)
185#define TO_DW3_PING(x) ((x) << 26)
186#define FROM_DW3_PING(x) (((x) >> 26) & 0x1)
185#define DW3_ERROR_BIT (1 << 28) 187#define DW3_ERROR_BIT (1 << 28)
186#define DW3_QTD_ACTIVE (1 << 31) 188#define DW3_BABBLE_BIT (1 << 29)
189#define DW3_HALT_BIT (1 << 30)
190#define DW3_ACTIVE_BIT (1 << 31)
187 191
188#define INT_UNDERRUN (1 << 2) 192#define INT_UNDERRUN (1 << 2)
189#define INT_BABBLE (1 << 1) 193#define INT_BABBLE (1 << 1)
190#define INT_EXACT (1 << 0) 194#define INT_EXACT (1 << 0)
191 195
192#define DW1_GET_PID(x) (((x) >> 10) & 0x3)
193#define PTD_XFERRED_LENGTH(x) ((x) & 0x7fff)
194#define PTD_XFERRED_LENGTH_LO(x) ((x) & 0x7ff)
195
196#define SETUP_PID (2) 196#define SETUP_PID (2)
197#define IN_PID (1) 197#define IN_PID (1)
198#define OUT_PID (0) 198#define OUT_PID (0)
199#define GET_QTD_TOKEN_TYPE(x) ((x) & 0x3)
200
201#define DATA_TOGGLE (1 << 31)
202#define GET_DATA_TOGGLE(x) ((x) >> 31)
203 199
204/* Errata 1 */ 200/* Errata 1 */
205#define RL_COUNTER (0) 201#define RL_COUNTER (0)
206#define NAK_COUNTER (0) 202#define NAK_COUNTER (0)
207#define ERR_COUNTER (2) 203#define ERR_COUNTER (2)
208 204
209#endif 205#endif /* _ISP1760_HCD_H_ */
diff --git a/drivers/usb/host/octeon2-common.c b/drivers/usb/host/octeon2-common.c
index 72d672cfcf39..d9df423f3d12 100644
--- a/drivers/usb/host/octeon2-common.c
+++ b/drivers/usb/host/octeon2-common.c
@@ -3,18 +3,19 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2010 Cavium Networks 6 * Copyright (C) 2010, 2011 Cavium Networks
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/mutex.h>
10#include <linux/delay.h> 11#include <linux/delay.h>
11 12
12#include <asm/atomic.h>
13
14#include <asm/octeon/octeon.h> 13#include <asm/octeon/octeon.h>
15#include <asm/octeon/cvmx-uctlx-defs.h> 14#include <asm/octeon/cvmx-uctlx-defs.h>
16 15
17static atomic_t octeon2_usb_clock_start_cnt = ATOMIC_INIT(0); 16static DEFINE_MUTEX(octeon2_usb_clocks_mutex);
17
18static int octeon2_usb_clock_start_cnt;
18 19
19void octeon2_usb_clocks_start(void) 20void octeon2_usb_clocks_start(void)
20{ 21{
@@ -26,8 +27,12 @@ void octeon2_usb_clocks_start(void)
26 int i; 27 int i;
27 unsigned long io_clk_64_to_ns; 28 unsigned long io_clk_64_to_ns;
28 29
29 if (atomic_inc_return(&octeon2_usb_clock_start_cnt) != 1) 30
30 return; 31 mutex_lock(&octeon2_usb_clocks_mutex);
32
33 octeon2_usb_clock_start_cnt++;
34 if (octeon2_usb_clock_start_cnt != 1)
35 goto exit;
31 36
32 io_clk_64_to_ns = 64000000000ull / octeon_get_io_clock_rate(); 37 io_clk_64_to_ns = 64000000000ull / octeon_get_io_clock_rate();
33 38
@@ -43,6 +48,13 @@ void octeon2_usb_clocks_start(void)
43 48
44 /* Step 3: Configure the reference clock, PHY, and HCLK */ 49 /* Step 3: Configure the reference clock, PHY, and HCLK */
45 clk_rst_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_CLK_RST_CTL(0)); 50 clk_rst_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_CLK_RST_CTL(0));
51
52 /*
53 * If the UCTL looks like it has already been started, skip
54 * the initialization, otherwise bus errors are obtained.
55 */
56 if (clk_rst_ctl.s.hrst)
57 goto end_clock;
46 /* 3a */ 58 /* 3a */
47 clk_rst_ctl.s.p_por = 1; 59 clk_rst_ctl.s.p_por = 1;
48 clk_rst_ctl.s.hrst = 0; 60 clk_rst_ctl.s.hrst = 0;
@@ -158,28 +170,31 @@ void octeon2_usb_clocks_start(void)
158 clk_rst_ctl.s.hrst = 1; 170 clk_rst_ctl.s.hrst = 1;
159 cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64); 171 cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64);
160 172
173end_clock:
161 /* Now we can set some other registers. */ 174 /* Now we can set some other registers. */
162 175
163 for (i = 0; i <= 1; i++) { 176 for (i = 0; i <= 1; i++) {
164 port_ctl_status.u64 = 177 port_ctl_status.u64 =
165 cvmx_read_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0)); 178 cvmx_read_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0));
166 /* Set txvreftune to 15 to obtain complient 'eye' diagram. */ 179 /* Set txvreftune to 15 to obtain compliant 'eye' diagram. */
167 port_ctl_status.s.txvreftune = 15; 180 port_ctl_status.s.txvreftune = 15;
181 port_ctl_status.s.txrisetune = 1;
182 port_ctl_status.s.txpreemphasistune = 1;
168 cvmx_write_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0), 183 cvmx_write_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0),
169 port_ctl_status.u64); 184 port_ctl_status.u64);
170 } 185 }
186
187 /* Set uSOF cycle period to 60,000 bits. */
188 cvmx_write_csr(CVMX_UCTLX_EHCI_FLA(0), 0x20ull);
189exit:
190 mutex_unlock(&octeon2_usb_clocks_mutex);
171} 191}
172EXPORT_SYMBOL(octeon2_usb_clocks_start); 192EXPORT_SYMBOL(octeon2_usb_clocks_start);
173 193
174void octeon2_usb_clocks_stop(void) 194void octeon2_usb_clocks_stop(void)
175{ 195{
176 union cvmx_uctlx_if_ena if_ena; 196 mutex_lock(&octeon2_usb_clocks_mutex);
177 197 octeon2_usb_clock_start_cnt--;
178 if (atomic_dec_return(&octeon2_usb_clock_start_cnt) != 0) 198 mutex_unlock(&octeon2_usb_clocks_mutex);
179 return;
180
181 if_ena.u64 = 0;
182 if_ena.s.en = 0;
183 cvmx_write_csr(CVMX_UCTLX_IF_ENA(0), if_ena.u64);
184} 199}
185EXPORT_SYMBOL(octeon2_usb_clocks_stop); 200EXPORT_SYMBOL(octeon2_usb_clocks_stop);
diff --git a/drivers/usb/host/ohci-ath79.c b/drivers/usb/host/ohci-ath79.c
new file mode 100644
index 000000000000..ffea3e7cb0a8
--- /dev/null
+++ b/drivers/usb/host/ohci-ath79.c
@@ -0,0 +1,151 @@
1/*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * Bus Glue for Atheros AR71XX/AR724X built-in OHCI controller.
5 *
6 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
7 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
8 *
9 * Parts of this file are based on Atheros' 2.6.15 BSP
10 * Copyright (C) 2007 Atheros Communications, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published
14 * by the Free Software Foundation.
15 */
16
17#include <linux/platform_device.h>
18
19static int __devinit ohci_ath79_start(struct usb_hcd *hcd)
20{
21 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
22 int ret;
23
24 ret = ohci_init(ohci);
25 if (ret < 0)
26 return ret;
27
28 ret = ohci_run(ohci);
29 if (ret < 0)
30 goto err;
31
32 return 0;
33
34err:
35 ohci_stop(hcd);
36 return ret;
37}
38
39static const struct hc_driver ohci_ath79_hc_driver = {
40 .description = hcd_name,
41 .product_desc = "Atheros built-in OHCI controller",
42 .hcd_priv_size = sizeof(struct ohci_hcd),
43
44 .irq = ohci_irq,
45 .flags = HCD_USB11 | HCD_MEMORY,
46
47 .start = ohci_ath79_start,
48 .stop = ohci_stop,
49 .shutdown = ohci_shutdown,
50
51 .urb_enqueue = ohci_urb_enqueue,
52 .urb_dequeue = ohci_urb_dequeue,
53 .endpoint_disable = ohci_endpoint_disable,
54
55 /*
56 * scheduling support
57 */
58 .get_frame_number = ohci_get_frame,
59
60 /*
61 * root hub support
62 */
63 .hub_status_data = ohci_hub_status_data,
64 .hub_control = ohci_hub_control,
65 .start_port_reset = ohci_start_port_reset,
66};
67
68static int ohci_ath79_probe(struct platform_device *pdev)
69{
70 struct usb_hcd *hcd;
71 struct resource *res;
72 int irq;
73 int ret;
74
75 if (usb_disabled())
76 return -ENODEV;
77
78 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
79 if (!res) {
80 dev_dbg(&pdev->dev, "no IRQ specified\n");
81 return -ENODEV;
82 }
83 irq = res->start;
84
85 hcd = usb_create_hcd(&ohci_ath79_hc_driver, &pdev->dev,
86 dev_name(&pdev->dev));
87 if (!hcd)
88 return -ENOMEM;
89
90 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
91 if (!res) {
92 dev_dbg(&pdev->dev, "no base address specified\n");
93 ret = -ENODEV;
94 goto err_put_hcd;
95 }
96 hcd->rsrc_start = res->start;
97 hcd->rsrc_len = res->end - res->start + 1;
98
99 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
100 dev_dbg(&pdev->dev, "controller already in use\n");
101 ret = -EBUSY;
102 goto err_put_hcd;
103 }
104
105 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
106 if (!hcd->regs) {
107 dev_dbg(&pdev->dev, "error mapping memory\n");
108 ret = -EFAULT;
109 goto err_release_region;
110 }
111
112 ohci_hcd_init(hcd_to_ohci(hcd));
113
114 ret = usb_add_hcd(hcd, irq, IRQF_DISABLED);
115 if (ret)
116 goto err_stop_hcd;
117
118 return 0;
119
120err_stop_hcd:
121 iounmap(hcd->regs);
122err_release_region:
123 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
124err_put_hcd:
125 usb_put_hcd(hcd);
126 return ret;
127}
128
129static int ohci_ath79_remove(struct platform_device *pdev)
130{
131 struct usb_hcd *hcd = platform_get_drvdata(pdev);
132
133 usb_remove_hcd(hcd);
134 iounmap(hcd->regs);
135 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
136 usb_put_hcd(hcd);
137
138 return 0;
139}
140
141static struct platform_driver ohci_hcd_ath79_driver = {
142 .probe = ohci_ath79_probe,
143 .remove = ohci_ath79_remove,
144 .shutdown = usb_hcd_platform_shutdown,
145 .driver = {
146 .name = "ath79-ohci",
147 .owner = THIS_MODULE,
148 },
149};
150
151MODULE_ALIAS(PLATFORM_MODULE_PREFIX "ath79-ohci");
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index d55723514860..8c8dc6559ac7 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1105,6 +1105,11 @@ MODULE_LICENSE ("GPL");
1105#define PLATFORM_DRIVER ohci_hcd_cns3xxx_driver 1105#define PLATFORM_DRIVER ohci_hcd_cns3xxx_driver
1106#endif 1106#endif
1107 1107
1108#ifdef CONFIG_USB_OHCI_ATH79
1109#include "ohci-ath79.c"
1110#define PLATFORM_DRIVER ohci_hcd_ath79_driver
1111#endif
1112
1108#if !defined(PCI_DRIVER) && \ 1113#if !defined(PCI_DRIVER) && \
1109 !defined(PLATFORM_DRIVER) && \ 1114 !defined(PLATFORM_DRIVER) && \
1110 !defined(OMAP1_PLATFORM_DRIVER) && \ 1115 !defined(OMAP1_PLATFORM_DRIVER) && \
diff --git a/drivers/usb/host/ohci-s3c2410.c b/drivers/usb/host/ohci-s3c2410.c
index a68af2dd55ca..7c9a4d55526b 100644
--- a/drivers/usb/host/ohci-s3c2410.c
+++ b/drivers/usb/host/ohci-s3c2410.c
@@ -56,9 +56,8 @@ static void s3c2410_start_hc(struct platform_device *dev, struct usb_hcd *hcd)
56 info->hcd = hcd; 56 info->hcd = hcd;
57 info->report_oc = s3c2410_hcd_oc; 57 info->report_oc = s3c2410_hcd_oc;
58 58
59 if (info->enable_oc != NULL) { 59 if (info->enable_oc != NULL)
60 (info->enable_oc)(info, 1); 60 (info->enable_oc)(info, 1);
61 }
62 } 61 }
63} 62}
64 63
@@ -72,9 +71,8 @@ static void s3c2410_stop_hc(struct platform_device *dev)
72 info->report_oc = NULL; 71 info->report_oc = NULL;
73 info->hcd = NULL; 72 info->hcd = NULL;
74 73
75 if (info->enable_oc != NULL) { 74 if (info->enable_oc != NULL)
76 (info->enable_oc)(info, 0); 75 (info->enable_oc)(info, 0);
77 }
78 } 76 }
79 77
80 clk_disable(clk); 78 clk_disable(clk);
@@ -88,14 +86,14 @@ static void s3c2410_stop_hc(struct platform_device *dev)
88*/ 86*/
89 87
90static int 88static int
91ohci_s3c2410_hub_status_data (struct usb_hcd *hcd, char *buf) 89ohci_s3c2410_hub_status_data(struct usb_hcd *hcd, char *buf)
92{ 90{
93 struct s3c2410_hcd_info *info = to_s3c2410_info(hcd); 91 struct s3c2410_hcd_info *info = to_s3c2410_info(hcd);
94 struct s3c2410_hcd_port *port; 92 struct s3c2410_hcd_port *port;
95 int orig; 93 int orig;
96 int portno; 94 int portno;
97 95
98 orig = ohci_hub_status_data (hcd, buf); 96 orig = ohci_hub_status_data(hcd, buf);
99 97
100 if (info == NULL) 98 if (info == NULL)
101 return orig; 99 return orig;
@@ -145,7 +143,7 @@ static void s3c2410_usb_set_power(struct s3c2410_hcd_info *info,
145 * request. 143 * request.
146*/ 144*/
147 145
148static int ohci_s3c2410_hub_control ( 146static int ohci_s3c2410_hub_control(
149 struct usb_hcd *hcd, 147 struct usb_hcd *hcd,
150 u16 typeReq, 148 u16 typeReq,
151 u16 wValue, 149 u16 wValue,
@@ -199,9 +197,8 @@ static int ohci_s3c2410_hub_control (
199 dev_dbg(hcd->self.controller, 197 dev_dbg(hcd->self.controller,
200 "ClearPortFeature: OVER_CURRENT\n"); 198 "ClearPortFeature: OVER_CURRENT\n");
201 199
202 if (valid_port(wIndex)) { 200 if (valid_port(wIndex))
203 info->port[wIndex-1].oc_status = 0; 201 info->port[wIndex-1].oc_status = 0;
204 }
205 202
206 goto out; 203 goto out;
207 204
@@ -242,8 +239,11 @@ static int ohci_s3c2410_hub_control (
242 desc->wHubCharacteristics |= cpu_to_le16(0x0001); 239 desc->wHubCharacteristics |= cpu_to_le16(0x0001);
243 240
244 if (info->enable_oc) { 241 if (info->enable_oc) {
245 desc->wHubCharacteristics &= ~cpu_to_le16(HUB_CHAR_OCPM); 242 desc->wHubCharacteristics &= ~cpu_to_le16(
246 desc->wHubCharacteristics |= cpu_to_le16(0x0008|0x0001); 243 HUB_CHAR_OCPM);
244 desc->wHubCharacteristics |= cpu_to_le16(
245 0x0008 |
246 0x0001);
247 } 247 }
248 248
249 dev_dbg(hcd->self.controller, "wHubCharacteristics after 0x%04x\n", 249 dev_dbg(hcd->self.controller, "wHubCharacteristics after 0x%04x\n",
@@ -257,13 +257,11 @@ static int ohci_s3c2410_hub_control (
257 dev_dbg(hcd->self.controller, "GetPortStatus(%d)\n", wIndex); 257 dev_dbg(hcd->self.controller, "GetPortStatus(%d)\n", wIndex);
258 258
259 if (valid_port(wIndex)) { 259 if (valid_port(wIndex)) {
260 if (info->port[wIndex-1].oc_changed) { 260 if (info->port[wIndex-1].oc_changed)
261 *data |= cpu_to_le32(RH_PS_OCIC); 261 *data |= cpu_to_le32(RH_PS_OCIC);
262 }
263 262
264 if (info->port[wIndex-1].oc_status) { 263 if (info->port[wIndex-1].oc_status)
265 *data |= cpu_to_le32(RH_PS_POCI); 264 *data |= cpu_to_le32(RH_PS_POCI);
266 }
267 } 265 }
268 } 266 }
269 267
@@ -321,7 +319,7 @@ static void s3c2410_hcd_oc(struct s3c2410_hcd_info *info, int port_oc)
321*/ 319*/
322 320
323static void 321static void
324usb_hcd_s3c2410_remove (struct usb_hcd *hcd, struct platform_device *dev) 322usb_hcd_s3c2410_remove(struct usb_hcd *hcd, struct platform_device *dev)
325{ 323{
326 usb_remove_hcd(hcd); 324 usb_remove_hcd(hcd);
327 s3c2410_stop_hc(dev); 325 s3c2410_stop_hc(dev);
@@ -339,7 +337,7 @@ usb_hcd_s3c2410_remove (struct usb_hcd *hcd, struct platform_device *dev)
339 * through the hotplug entry's driver_data. 337 * through the hotplug entry's driver_data.
340 * 338 *
341 */ 339 */
342static int usb_hcd_s3c2410_probe (const struct hc_driver *driver, 340static int usb_hcd_s3c2410_probe(const struct hc_driver *driver,
343 struct platform_device *dev) 341 struct platform_device *dev)
344{ 342{
345 struct usb_hcd *hcd = NULL; 343 struct usb_hcd *hcd = NULL;
@@ -353,7 +351,7 @@ static int usb_hcd_s3c2410_probe (const struct hc_driver *driver,
353 return -ENOMEM; 351 return -ENOMEM;
354 352
355 hcd->rsrc_start = dev->resource[0].start; 353 hcd->rsrc_start = dev->resource[0].start;
356 hcd->rsrc_len = dev->resource[0].end - dev->resource[0].start + 1; 354 hcd->rsrc_len = resource_size(&dev->resource[0]);
357 355
358 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { 356 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
359 dev_err(&dev->dev, "request_mem_region failed\n"); 357 dev_err(&dev->dev, "request_mem_region failed\n");
@@ -364,14 +362,14 @@ static int usb_hcd_s3c2410_probe (const struct hc_driver *driver,
364 clk = clk_get(&dev->dev, "usb-host"); 362 clk = clk_get(&dev->dev, "usb-host");
365 if (IS_ERR(clk)) { 363 if (IS_ERR(clk)) {
366 dev_err(&dev->dev, "cannot get usb-host clock\n"); 364 dev_err(&dev->dev, "cannot get usb-host clock\n");
367 retval = -ENOENT; 365 retval = PTR_ERR(clk);
368 goto err_mem; 366 goto err_mem;
369 } 367 }
370 368
371 usb_clk = clk_get(&dev->dev, "usb-bus-host"); 369 usb_clk = clk_get(&dev->dev, "usb-bus-host");
372 if (IS_ERR(usb_clk)) { 370 if (IS_ERR(usb_clk)) {
373 dev_err(&dev->dev, "cannot get usb-bus-host clock\n"); 371 dev_err(&dev->dev, "cannot get usb-bus-host clock\n");
374 retval = -ENOENT; 372 retval = PTR_ERR(usb_clk);
375 goto err_clk; 373 goto err_clk;
376 } 374 }
377 375
@@ -411,17 +409,19 @@ static int usb_hcd_s3c2410_probe (const struct hc_driver *driver,
411/*-------------------------------------------------------------------------*/ 409/*-------------------------------------------------------------------------*/
412 410
413static int 411static int
414ohci_s3c2410_start (struct usb_hcd *hcd) 412ohci_s3c2410_start(struct usb_hcd *hcd)
415{ 413{
416 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 414 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
417 int ret; 415 int ret;
418 416
419 if ((ret = ohci_init(ohci)) < 0) 417 ret = ohci_init(ohci);
418 if (ret < 0)
420 return ret; 419 return ret;
421 420
422 if ((ret = ohci_run (ohci)) < 0) { 421 ret = ohci_run(ohci);
423 err ("can't start %s", hcd->self.bus_name); 422 if (ret < 0) {
424 ohci_stop (hcd); 423 err("can't start %s", hcd->self.bus_name);
424 ohci_stop(hcd);
425 return ret; 425 return ret;
426 } 426 }
427 427
@@ -473,12 +473,12 @@ static const struct hc_driver ohci_s3c2410_hc_driver = {
473 473
474/* device driver */ 474/* device driver */
475 475
476static int ohci_hcd_s3c2410_drv_probe(struct platform_device *pdev) 476static int __devinit ohci_hcd_s3c2410_drv_probe(struct platform_device *pdev)
477{ 477{
478 return usb_hcd_s3c2410_probe(&ohci_s3c2410_hc_driver, pdev); 478 return usb_hcd_s3c2410_probe(&ohci_s3c2410_hc_driver, pdev);
479} 479}
480 480
481static int ohci_hcd_s3c2410_drv_remove(struct platform_device *pdev) 481static int __devexit ohci_hcd_s3c2410_drv_remove(struct platform_device *pdev)
482{ 482{
483 struct usb_hcd *hcd = platform_get_drvdata(pdev); 483 struct usb_hcd *hcd = platform_get_drvdata(pdev);
484 484
@@ -488,7 +488,7 @@ static int ohci_hcd_s3c2410_drv_remove(struct platform_device *pdev)
488 488
489static struct platform_driver ohci_hcd_s3c2410_driver = { 489static struct platform_driver ohci_hcd_s3c2410_driver = {
490 .probe = ohci_hcd_s3c2410_drv_probe, 490 .probe = ohci_hcd_s3c2410_drv_probe,
491 .remove = ohci_hcd_s3c2410_drv_remove, 491 .remove = __devexit_p(ohci_hcd_s3c2410_drv_remove),
492 .shutdown = usb_hcd_platform_shutdown, 492 .shutdown = usb_hcd_platform_shutdown,
493 /*.suspend = ohci_hcd_s3c2410_drv_suspend, */ 493 /*.suspend = ohci_hcd_s3c2410_drv_suspend, */
494 /*.resume = ohci_hcd_s3c2410_drv_resume, */ 494 /*.resume = ohci_hcd_s3c2410_drv_resume, */
diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c
index 18b7099a8125..5adcba016fcf 100644
--- a/drivers/usb/host/sl811-hcd.c
+++ b/drivers/usb/host/sl811-hcd.c
@@ -71,12 +71,6 @@ MODULE_ALIAS("platform:sl811-hcd");
71/* for now, use only one transfer register bank */ 71/* for now, use only one transfer register bank */
72#undef USE_B 72#undef USE_B
73 73
74/* this doesn't understand urb->iso_frame_desc[], but if you had a driver
75 * that just queued one ISO frame per URB then iso transfers "should" work
76 * using the normal urb status fields.
77 */
78#define DISABLE_ISO
79
80// #define QUIRK2 74// #define QUIRK2
81#define QUIRK3 75#define QUIRK3
82 76
@@ -807,7 +801,7 @@ static int sl811h_urb_enqueue(
807 int retval; 801 int retval;
808 struct usb_host_endpoint *hep = urb->ep; 802 struct usb_host_endpoint *hep = urb->ep;
809 803
810#ifdef DISABLE_ISO 804#ifndef CONFIG_USB_SL811_HCD_ISO
811 if (type == PIPE_ISOCHRONOUS) 805 if (type == PIPE_ISOCHRONOUS)
812 return -ENOSPC; 806 return -ENOSPC;
813#endif 807#endif
diff --git a/drivers/usb/host/u132-hcd.c b/drivers/usb/host/u132-hcd.c
index b4785934e091..533d12cca371 100644
--- a/drivers/usb/host/u132-hcd.c
+++ b/drivers/usb/host/u132-hcd.c
@@ -3230,8 +3230,7 @@ static int __init u132_hcd_init(void)
3230 mutex_init(&u132_module_lock); 3230 mutex_init(&u132_module_lock);
3231 if (usb_disabled()) 3231 if (usb_disabled())
3232 return -ENODEV; 3232 return -ENODEV;
3233 printk(KERN_INFO "driver %s built at %s on %s\n", hcd_name, __TIME__, 3233 printk(KERN_INFO "driver %s\n", hcd_name);
3234 __DATE__);
3235 workqueue = create_singlethread_workqueue("u132"); 3234 workqueue = create_singlethread_workqueue("u132");
3236 retval = platform_driver_register(&u132_platform_driver); 3235 retval = platform_driver_register(&u132_platform_driver);
3237 return retval; 3236 return retval;
diff --git a/drivers/usb/host/uhci-debug.c b/drivers/usb/host/uhci-debug.c
index ee60cd3ea642..f882a84b1bbb 100644
--- a/drivers/usb/host/uhci-debug.c
+++ b/drivers/usb/host/uhci-debug.c
@@ -285,7 +285,6 @@ static int uhci_show_root_hub_state(struct uhci_hcd *uhci, char *buf, int len)
285static int uhci_show_status(struct uhci_hcd *uhci, char *buf, int len) 285static int uhci_show_status(struct uhci_hcd *uhci, char *buf, int len)
286{ 286{
287 char *out = buf; 287 char *out = buf;
288 unsigned long io_addr = uhci->io_addr;
289 unsigned short usbcmd, usbstat, usbint, usbfrnum; 288 unsigned short usbcmd, usbstat, usbint, usbfrnum;
290 unsigned int flbaseadd; 289 unsigned int flbaseadd;
291 unsigned char sof; 290 unsigned char sof;
@@ -295,14 +294,14 @@ static int uhci_show_status(struct uhci_hcd *uhci, char *buf, int len)
295 if (len < 80 * 9) 294 if (len < 80 * 9)
296 return 0; 295 return 0;
297 296
298 usbcmd = inw(io_addr + 0); 297 usbcmd = uhci_readw(uhci, 0);
299 usbstat = inw(io_addr + 2); 298 usbstat = uhci_readw(uhci, 2);
300 usbint = inw(io_addr + 4); 299 usbint = uhci_readw(uhci, 4);
301 usbfrnum = inw(io_addr + 6); 300 usbfrnum = uhci_readw(uhci, 6);
302 flbaseadd = inl(io_addr + 8); 301 flbaseadd = uhci_readl(uhci, 8);
303 sof = inb(io_addr + 12); 302 sof = uhci_readb(uhci, 12);
304 portsc1 = inw(io_addr + 16); 303 portsc1 = uhci_readw(uhci, 16);
305 portsc2 = inw(io_addr + 18); 304 portsc2 = uhci_readw(uhci, 18);
306 305
307 out += sprintf(out, " usbcmd = %04x %s%s%s%s%s%s%s%s\n", 306 out += sprintf(out, " usbcmd = %04x %s%s%s%s%s%s%s%s\n",
308 usbcmd, 307 usbcmd,
diff --git a/drivers/usb/host/uhci-grlib.c b/drivers/usb/host/uhci-grlib.c
new file mode 100644
index 000000000000..b1addd60a1ef
--- /dev/null
+++ b/drivers/usb/host/uhci-grlib.c
@@ -0,0 +1,194 @@
1/*
2 * UHCI HCD (Host Controller Driver) for GRLIB GRUSBHC
3 *
4 * Copyright (c) 2011 Jan Andersson <jan@gaisler.com>
5 *
6 * This file is based on UHCI PCI HCD:
7 * (C) Copyright 1999 Linus Torvalds
8 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
9 * (C) Copyright 1999 Randy Dunlap
10 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
11 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
12 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
13 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
14 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
15 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
16 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
17 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18 */
19
20#include <linux/of_irq.h>
21#include <linux/of_address.h>
22#include <linux/of_platform.h>
23
24static int uhci_grlib_init(struct usb_hcd *hcd)
25{
26 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
27
28 uhci->rh_numports = uhci_count_ports(hcd);
29
30 /* Set up pointers to to generic functions */
31 uhci->reset_hc = uhci_generic_reset_hc;
32 uhci->check_and_reset_hc = uhci_generic_check_and_reset_hc;
33 /* No special actions need to be taken for the functions below */
34 uhci->configure_hc = NULL;
35 uhci->resume_detect_interrupts_are_broken = NULL;
36 uhci->global_suspend_mode_is_broken = NULL;
37
38 /* Reset if the controller isn't already safely quiescent. */
39 check_and_reset_hc(uhci);
40 return 0;
41}
42
43static const struct hc_driver uhci_grlib_hc_driver = {
44 .description = hcd_name,
45 .product_desc = "GRLIB GRUSBHC UHCI Host Controller",
46 .hcd_priv_size = sizeof(struct uhci_hcd),
47
48 /* Generic hardware linkage */
49 .irq = uhci_irq,
50 .flags = HCD_MEMORY | HCD_USB11,
51
52 /* Basic lifecycle operations */
53 .reset = uhci_grlib_init,
54 .start = uhci_start,
55#ifdef CONFIG_PM
56 .pci_suspend = NULL,
57 .pci_resume = NULL,
58 .bus_suspend = uhci_rh_suspend,
59 .bus_resume = uhci_rh_resume,
60#endif
61 .stop = uhci_stop,
62
63 .urb_enqueue = uhci_urb_enqueue,
64 .urb_dequeue = uhci_urb_dequeue,
65
66 .endpoint_disable = uhci_hcd_endpoint_disable,
67 .get_frame_number = uhci_hcd_get_frame_number,
68
69 .hub_status_data = uhci_hub_status_data,
70 .hub_control = uhci_hub_control,
71};
72
73
74static int __devinit uhci_hcd_grlib_probe(struct platform_device *op)
75{
76 struct device_node *dn = op->dev.of_node;
77 struct usb_hcd *hcd;
78 struct uhci_hcd *uhci = NULL;
79 struct resource res;
80 int irq;
81 int rv;
82
83 if (usb_disabled())
84 return -ENODEV;
85
86 dev_dbg(&op->dev, "initializing GRUSBHC UHCI USB Controller\n");
87
88 rv = of_address_to_resource(dn, 0, &res);
89 if (rv)
90 return rv;
91
92 /* usb_create_hcd requires dma_mask != NULL */
93 op->dev.dma_mask = &op->dev.coherent_dma_mask;
94 hcd = usb_create_hcd(&uhci_grlib_hc_driver, &op->dev,
95 "GRUSBHC UHCI USB");
96 if (!hcd)
97 return -ENOMEM;
98
99 hcd->rsrc_start = res.start;
100 hcd->rsrc_len = res.end - res.start + 1;
101
102 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
103 printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__);
104 rv = -EBUSY;
105 goto err_rmr;
106 }
107
108 irq = irq_of_parse_and_map(dn, 0);
109 if (irq == NO_IRQ) {
110 printk(KERN_ERR "%s: irq_of_parse_and_map failed\n", __FILE__);
111 rv = -EBUSY;
112 goto err_irq;
113 }
114
115 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
116 if (!hcd->regs) {
117 printk(KERN_ERR "%s: ioremap failed\n", __FILE__);
118 rv = -ENOMEM;
119 goto err_ioremap;
120 }
121
122 uhci = hcd_to_uhci(hcd);
123
124 uhci->regs = hcd->regs;
125
126 rv = usb_add_hcd(hcd, irq, 0);
127 if (rv)
128 goto err_uhci;
129
130 return 0;
131
132err_uhci:
133 iounmap(hcd->regs);
134err_ioremap:
135 irq_dispose_mapping(irq);
136err_irq:
137 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
138err_rmr:
139 usb_put_hcd(hcd);
140
141 return rv;
142}
143
144static int uhci_hcd_grlib_remove(struct platform_device *op)
145{
146 struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
147
148 dev_set_drvdata(&op->dev, NULL);
149
150 dev_dbg(&op->dev, "stopping GRLIB GRUSBHC UHCI USB Controller\n");
151
152 usb_remove_hcd(hcd);
153
154 iounmap(hcd->regs);
155 irq_dispose_mapping(hcd->irq);
156 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
157
158 usb_put_hcd(hcd);
159
160 return 0;
161}
162
163/* Make sure the controller is quiescent and that we're not using it
164 * any more. This is mainly for the benefit of programs which, like kexec,
165 * expect the hardware to be idle: not doing DMA or generating IRQs.
166 *
167 * This routine may be called in a damaged or failing kernel. Hence we
168 * do not acquire the spinlock before shutting down the controller.
169 */
170static void uhci_hcd_grlib_shutdown(struct platform_device *op)
171{
172 struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
173
174 uhci_hc_died(hcd_to_uhci(hcd));
175}
176
177static const struct of_device_id uhci_hcd_grlib_of_match[] = {
178 { .name = "GAISLER_UHCI", },
179 { .name = "01_027", },
180 {},
181};
182MODULE_DEVICE_TABLE(of, uhci_hcd_grlib_of_match);
183
184
185static struct platform_driver uhci_grlib_driver = {
186 .probe = uhci_hcd_grlib_probe,
187 .remove = uhci_hcd_grlib_remove,
188 .shutdown = uhci_hcd_grlib_shutdown,
189 .driver = {
190 .name = "grlib-uhci",
191 .owner = THIS_MODULE,
192 .of_match_table = uhci_hcd_grlib_of_match,
193 },
194};
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c
index 4f65b14e5e08..79dd822e58d1 100644
--- a/drivers/usb/host/uhci-hcd.c
+++ b/drivers/usb/host/uhci-hcd.c
@@ -48,7 +48,6 @@
48#include <asm/system.h> 48#include <asm/system.h>
49 49
50#include "uhci-hcd.h" 50#include "uhci-hcd.h"
51#include "pci-quirks.h"
52 51
53/* 52/*
54 * Version Information 53 * Version Information
@@ -134,15 +133,12 @@ static void finish_reset(struct uhci_hcd *uhci)
134 * We have to clear them by hand. 133 * We have to clear them by hand.
135 */ 134 */
136 for (port = 0; port < uhci->rh_numports; ++port) 135 for (port = 0; port < uhci->rh_numports; ++port)
137 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2)); 136 uhci_writew(uhci, 0, USBPORTSC1 + (port * 2));
138 137
139 uhci->port_c_suspend = uhci->resuming_ports = 0; 138 uhci->port_c_suspend = uhci->resuming_ports = 0;
140 uhci->rh_state = UHCI_RH_RESET; 139 uhci->rh_state = UHCI_RH_RESET;
141 uhci->is_stopped = UHCI_IS_STOPPED; 140 uhci->is_stopped = UHCI_IS_STOPPED;
142 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
143 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags); 141 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
144
145 uhci->dead = 0; /* Full reset resurrects the controller */
146} 142}
147 143
148/* 144/*
@@ -152,7 +148,7 @@ static void finish_reset(struct uhci_hcd *uhci)
152static void uhci_hc_died(struct uhci_hcd *uhci) 148static void uhci_hc_died(struct uhci_hcd *uhci)
153{ 149{
154 uhci_get_current_frame_number(uhci); 150 uhci_get_current_frame_number(uhci);
155 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr); 151 uhci->reset_hc(uhci);
156 finish_reset(uhci); 152 finish_reset(uhci);
157 uhci->dead = 1; 153 uhci->dead = 1;
158 154
@@ -167,97 +163,118 @@ static void uhci_hc_died(struct uhci_hcd *uhci)
167 */ 163 */
168static void check_and_reset_hc(struct uhci_hcd *uhci) 164static void check_and_reset_hc(struct uhci_hcd *uhci)
169{ 165{
170 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr)) 166 if (uhci->check_and_reset_hc(uhci))
171 finish_reset(uhci); 167 finish_reset(uhci);
172} 168}
173 169
170#if defined(CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC)
171/*
172 * The two functions below are generic reset functions that are used on systems
173 * that do not have keyboard and mouse legacy support. We assume that we are
174 * running on such a system if CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC is defined.
175 */
176
177/*
178 * Make sure the controller is completely inactive, unable to
179 * generate interrupts or do DMA.
180 */
181static void uhci_generic_reset_hc(struct uhci_hcd *uhci)
182{
183 /* Reset the HC - this will force us to get a
184 * new notification of any already connected
185 * ports due to the virtual disconnect that it
186 * implies.
187 */
188 uhci_writew(uhci, USBCMD_HCRESET, USBCMD);
189 mb();
190 udelay(5);
191 if (uhci_readw(uhci, USBCMD) & USBCMD_HCRESET)
192 dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
193
194 /* Just to be safe, disable interrupt requests and
195 * make sure the controller is stopped.
196 */
197 uhci_writew(uhci, 0, USBINTR);
198 uhci_writew(uhci, 0, USBCMD);
199}
200
201/*
202 * Initialize a controller that was newly discovered or has just been
203 * resumed. In either case we can't be sure of its previous state.
204 *
205 * Returns: 1 if the controller was reset, 0 otherwise.
206 */
207static int uhci_generic_check_and_reset_hc(struct uhci_hcd *uhci)
208{
209 unsigned int cmd, intr;
210
211 /*
212 * When restarting a suspended controller, we expect all the
213 * settings to be the same as we left them:
214 *
215 * Controller is stopped and configured with EGSM set;
216 * No interrupts enabled except possibly Resume Detect.
217 *
218 * If any of these conditions are violated we do a complete reset.
219 */
220
221 cmd = uhci_readw(uhci, USBCMD);
222 if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) {
223 dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",
224 __func__, cmd);
225 goto reset_needed;
226 }
227
228 intr = uhci_readw(uhci, USBINTR);
229 if (intr & (~USBINTR_RESUME)) {
230 dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",
231 __func__, intr);
232 goto reset_needed;
233 }
234 return 0;
235
236reset_needed:
237 dev_dbg(uhci_dev(uhci), "Performing full reset\n");
238 uhci_generic_reset_hc(uhci);
239 return 1;
240}
241#endif /* CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC */
242
174/* 243/*
175 * Store the basic register settings needed by the controller. 244 * Store the basic register settings needed by the controller.
176 */ 245 */
177static void configure_hc(struct uhci_hcd *uhci) 246static void configure_hc(struct uhci_hcd *uhci)
178{ 247{
179 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
180
181 /* Set the frame length to the default: 1 ms exactly */ 248 /* Set the frame length to the default: 1 ms exactly */
182 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); 249 uhci_writeb(uhci, USBSOF_DEFAULT, USBSOF);
183 250
184 /* Store the frame list base address */ 251 /* Store the frame list base address */
185 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD); 252 uhci_writel(uhci, uhci->frame_dma_handle, USBFLBASEADD);
186 253
187 /* Set the current frame number */ 254 /* Set the current frame number */
188 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER, 255 uhci_writew(uhci, uhci->frame_number & UHCI_MAX_SOF_NUMBER,
189 uhci->io_addr + USBFRNUM); 256 USBFRNUM);
190
191 /* Mark controller as not halted before we enable interrupts */
192 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
193 mb();
194
195 /* Enable PIRQ */
196 pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
197 257
198 /* Disable platform-specific non-PME# wakeup */ 258 /* perform any arch/bus specific configuration */
199 if (pdev->vendor == PCI_VENDOR_ID_INTEL) 259 if (uhci->configure_hc)
200 pci_write_config_byte(pdev, USBRES_INTEL, 0); 260 uhci->configure_hc(uhci);
201} 261}
202 262
203
204static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) 263static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
205{ 264{
206 int port;
207
208 /* If we have to ignore overcurrent events then almost by definition 265 /* If we have to ignore overcurrent events then almost by definition
209 * we can't depend on resume-detect interrupts. */ 266 * we can't depend on resume-detect interrupts. */
210 if (ignore_oc) 267 if (ignore_oc)
211 return 1; 268 return 1;
212 269
213 switch (to_pci_dev(uhci_dev(uhci))->vendor) { 270 return uhci->resume_detect_interrupts_are_broken ?
214 default: 271 uhci->resume_detect_interrupts_are_broken(uhci) : 0;
215 break;
216
217 case PCI_VENDOR_ID_GENESYS:
218 /* Genesys Logic's GL880S controllers don't generate
219 * resume-detect interrupts.
220 */
221 return 1;
222
223 case PCI_VENDOR_ID_INTEL:
224 /* Some of Intel's USB controllers have a bug that causes
225 * resume-detect interrupts if any port has an over-current
226 * condition. To make matters worse, some motherboards
227 * hardwire unused USB ports' over-current inputs active!
228 * To prevent problems, we will not enable resume-detect
229 * interrupts if any ports are OC.
230 */
231 for (port = 0; port < uhci->rh_numports; ++port) {
232 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
233 USBPORTSC_OC)
234 return 1;
235 }
236 break;
237 }
238 return 0;
239} 272}
240 273
241static int global_suspend_mode_is_broken(struct uhci_hcd *uhci) 274static int global_suspend_mode_is_broken(struct uhci_hcd *uhci)
242{ 275{
243 int port; 276 return uhci->global_suspend_mode_is_broken ?
244 const char *sys_info; 277 uhci->global_suspend_mode_is_broken(uhci) : 0;
245 static char bad_Asus_board[] = "A7V8X";
246
247 /* One of Asus's motherboards has a bug which causes it to
248 * wake up immediately from suspend-to-RAM if any of the ports
249 * are connected. In such cases we will not set EGSM.
250 */
251 sys_info = dmi_get_system_info(DMI_BOARD_NAME);
252 if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
253 for (port = 0; port < uhci->rh_numports; ++port) {
254 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
255 USBPORTSC_CCS)
256 return 1;
257 }
258 }
259
260 return 0;
261} 278}
262 279
263static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state) 280static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
@@ -320,8 +337,8 @@ __acquires(uhci->lock)
320 !int_enable) 337 !int_enable)
321 uhci->RD_enable = int_enable = 0; 338 uhci->RD_enable = int_enable = 0;
322 339
323 outw(int_enable, uhci->io_addr + USBINTR); 340 uhci_writew(uhci, int_enable, USBINTR);
324 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD); 341 uhci_writew(uhci, egsm_enable | USBCMD_CF, USBCMD);
325 mb(); 342 mb();
326 udelay(5); 343 udelay(5);
327 344
@@ -330,7 +347,7 @@ __acquires(uhci->lock)
330 * controller should stop after a few microseconds. Otherwise 347 * controller should stop after a few microseconds. Otherwise
331 * we will give the controller one frame to stop. 348 * we will give the controller one frame to stop.
332 */ 349 */
333 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) { 350 if (!auto_stop && !(uhci_readw(uhci, USBSTS) & USBSTS_HCH)) {
334 uhci->rh_state = UHCI_RH_SUSPENDING; 351 uhci->rh_state = UHCI_RH_SUSPENDING;
335 spin_unlock_irq(&uhci->lock); 352 spin_unlock_irq(&uhci->lock);
336 msleep(1); 353 msleep(1);
@@ -338,7 +355,7 @@ __acquires(uhci->lock)
338 if (uhci->dead) 355 if (uhci->dead)
339 return; 356 return;
340 } 357 }
341 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) 358 if (!(uhci_readw(uhci, USBSTS) & USBSTS_HCH))
342 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n"); 359 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
343 360
344 uhci_get_current_frame_number(uhci); 361 uhci_get_current_frame_number(uhci);
@@ -360,15 +377,14 @@ __acquires(uhci->lock)
360 377
361static void start_rh(struct uhci_hcd *uhci) 378static void start_rh(struct uhci_hcd *uhci)
362{ 379{
363 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
364 uhci->is_stopped = 0; 380 uhci->is_stopped = 0;
365 381
366 /* Mark it configured and running with a 64-byte max packet. 382 /* Mark it configured and running with a 64-byte max packet.
367 * All interrupts are enabled, even though RESUME won't do anything. 383 * All interrupts are enabled, even though RESUME won't do anything.
368 */ 384 */
369 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD); 385 uhci_writew(uhci, USBCMD_RS | USBCMD_CF | USBCMD_MAXP, USBCMD);
370 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, 386 uhci_writew(uhci, USBINTR_TIMEOUT | USBINTR_RESUME |
371 uhci->io_addr + USBINTR); 387 USBINTR_IOC | USBINTR_SP, USBINTR);
372 mb(); 388 mb();
373 uhci->rh_state = UHCI_RH_RUNNING; 389 uhci->rh_state = UHCI_RH_RUNNING;
374 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags); 390 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
@@ -391,9 +407,9 @@ __acquires(uhci->lock)
391 unsigned egsm; 407 unsigned egsm;
392 408
393 /* Keep EGSM on if it was set before */ 409 /* Keep EGSM on if it was set before */
394 egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM; 410 egsm = uhci_readw(uhci, USBCMD) & USBCMD_EGSM;
395 uhci->rh_state = UHCI_RH_RESUMING; 411 uhci->rh_state = UHCI_RH_RESUMING;
396 outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD); 412 uhci_writew(uhci, USBCMD_FGR | USBCMD_CF | egsm, USBCMD);
397 spin_unlock_irq(&uhci->lock); 413 spin_unlock_irq(&uhci->lock);
398 msleep(20); 414 msleep(20);
399 spin_lock_irq(&uhci->lock); 415 spin_lock_irq(&uhci->lock);
@@ -401,10 +417,10 @@ __acquires(uhci->lock)
401 return; 417 return;
402 418
403 /* End Global Resume and wait for EOP to be sent */ 419 /* End Global Resume and wait for EOP to be sent */
404 outw(USBCMD_CF, uhci->io_addr + USBCMD); 420 uhci_writew(uhci, USBCMD_CF, USBCMD);
405 mb(); 421 mb();
406 udelay(4); 422 udelay(4);
407 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR) 423 if (uhci_readw(uhci, USBCMD) & USBCMD_FGR)
408 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); 424 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
409 } 425 }
410 426
@@ -424,10 +440,10 @@ static irqreturn_t uhci_irq(struct usb_hcd *hcd)
424 * interrupt cause. Contrary to the UHCI specification, the 440 * interrupt cause. Contrary to the UHCI specification, the
425 * "HC Halted" status bit is persistent: it is RO, not R/WC. 441 * "HC Halted" status bit is persistent: it is RO, not R/WC.
426 */ 442 */
427 status = inw(uhci->io_addr + USBSTS); 443 status = uhci_readw(uhci, USBSTS);
428 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ 444 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
429 return IRQ_NONE; 445 return IRQ_NONE;
430 outw(status, uhci->io_addr + USBSTS); /* Clear it */ 446 uhci_writew(uhci, status, USBSTS); /* Clear it */
431 447
432 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { 448 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
433 if (status & USBSTS_HSE) 449 if (status & USBSTS_HSE)
@@ -449,6 +465,7 @@ static irqreturn_t uhci_irq(struct usb_hcd *hcd)
449 lprintk(errbuf); 465 lprintk(errbuf);
450 } 466 }
451 uhci_hc_died(uhci); 467 uhci_hc_died(uhci);
468 usb_hc_died(hcd);
452 469
453 /* Force a callback in case there are 470 /* Force a callback in case there are
454 * pending unlinks */ 471 * pending unlinks */
@@ -482,7 +499,7 @@ static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
482 if (!uhci->is_stopped) { 499 if (!uhci->is_stopped) {
483 unsigned delta; 500 unsigned delta;
484 501
485 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) & 502 delta = (uhci_readw(uhci, USBFRNUM) - uhci->frame_number) &
486 (UHCI_NUMFRAMES - 1); 503 (UHCI_NUMFRAMES - 1);
487 uhci->frame_number += delta; 504 uhci->frame_number += delta;
488 } 505 }
@@ -519,61 +536,6 @@ static void release_uhci(struct uhci_hcd *uhci)
519 uhci->frame, uhci->frame_dma_handle); 536 uhci->frame, uhci->frame_dma_handle);
520} 537}
521 538
522static int uhci_init(struct usb_hcd *hcd)
523{
524 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
525 unsigned io_size = (unsigned) hcd->rsrc_len;
526 int port;
527
528 uhci->io_addr = (unsigned long) hcd->rsrc_start;
529
530 /* The UHCI spec says devices must have 2 ports, and goes on to say
531 * they may have more but gives no way to determine how many there
532 * are. However according to the UHCI spec, Bit 7 of the port
533 * status and control register is always set to 1. So we try to
534 * use this to our advantage. Another common failure mode when
535 * a nonexistent register is addressed is to return all ones, so
536 * we test for that also.
537 */
538 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
539 unsigned int portstatus;
540
541 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
542 if (!(portstatus & 0x0080) || portstatus == 0xffff)
543 break;
544 }
545 if (debug)
546 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
547
548 /* Anything greater than 7 is weird so we'll ignore it. */
549 if (port > UHCI_RH_MAXCHILD) {
550 dev_info(uhci_dev(uhci), "port count misdetected? "
551 "forcing to 2 ports\n");
552 port = 2;
553 }
554 uhci->rh_numports = port;
555
556 /* Kick BIOS off this hardware and reset if the controller
557 * isn't already safely quiescent.
558 */
559 check_and_reset_hc(uhci);
560 return 0;
561}
562
563/* Make sure the controller is quiescent and that we're not using it
564 * any more. This is mainly for the benefit of programs which, like kexec,
565 * expect the hardware to be idle: not doing DMA or generating IRQs.
566 *
567 * This routine may be called in a damaged or failing kernel. Hence we
568 * do not acquire the spinlock before shutting down the controller.
569 */
570static void uhci_shutdown(struct pci_dev *pdev)
571{
572 struct usb_hcd *hcd = pci_get_drvdata(pdev);
573
574 uhci_hc_died(hcd_to_uhci(hcd));
575}
576
577/* 539/*
578 * Allocate a frame list, and then setup the skeleton 540 * Allocate a frame list, and then setup the skeleton
579 * 541 *
@@ -790,86 +752,6 @@ static int uhci_rh_resume(struct usb_hcd *hcd)
790 return rc; 752 return rc;
791} 753}
792 754
793static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
794{
795 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
796 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
797 int rc = 0;
798
799 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
800
801 spin_lock_irq(&uhci->lock);
802 if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
803 goto done_okay; /* Already suspended or dead */
804
805 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
806 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
807 rc = -EBUSY;
808 goto done;
809 };
810
811 /* All PCI host controllers are required to disable IRQ generation
812 * at the source, so we must turn off PIRQ.
813 */
814 pci_write_config_word(pdev, USBLEGSUP, 0);
815 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
816
817 /* Enable platform-specific non-PME# wakeup */
818 if (do_wakeup) {
819 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
820 pci_write_config_byte(pdev, USBRES_INTEL,
821 USBPORT1EN | USBPORT2EN);
822 }
823
824done_okay:
825 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
826done:
827 spin_unlock_irq(&uhci->lock);
828 return rc;
829}
830
831static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
832{
833 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
834
835 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
836
837 /* Since we aren't in D3 any more, it's safe to set this flag
838 * even if the controller was dead.
839 */
840 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
841
842 spin_lock_irq(&uhci->lock);
843
844 /* Make sure resume from hibernation re-enumerates everything */
845 if (hibernated)
846 uhci_hc_died(uhci);
847
848 /* The firmware or a boot kernel may have changed the controller
849 * settings during a system wakeup. Check it and reconfigure
850 * to avoid problems.
851 */
852 check_and_reset_hc(uhci);
853
854 /* If the controller was dead before, it's back alive now */
855 configure_hc(uhci);
856
857 /* Tell the core if the controller had to be reset */
858 if (uhci->rh_state == UHCI_RH_RESET)
859 usb_root_hub_lost_power(hcd->self.root_hub);
860
861 spin_unlock_irq(&uhci->lock);
862
863 /* If interrupts don't work and remote wakeup is enabled then
864 * the suspended root hub needs to be polled.
865 */
866 if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
867 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
868
869 /* Does the root hub have a port wakeup pending? */
870 usb_hcd_poll_rh_status(hcd);
871 return 0;
872}
873#endif 755#endif
874 756
875/* Wait until a particular device/endpoint's QH is idle, and free it */ 757/* Wait until a particular device/endpoint's QH is idle, and free it */
@@ -907,67 +789,62 @@ static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
907 /* Minimize latency by avoiding the spinlock */ 789 /* Minimize latency by avoiding the spinlock */
908 frame_number = uhci->frame_number; 790 frame_number = uhci->frame_number;
909 barrier(); 791 barrier();
910 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) & 792 delta = (uhci_readw(uhci, USBFRNUM) - frame_number) &
911 (UHCI_NUMFRAMES - 1); 793 (UHCI_NUMFRAMES - 1);
912 return frame_number + delta; 794 return frame_number + delta;
913} 795}
914 796
915static const char hcd_name[] = "uhci_hcd"; 797/* Determines number of ports on controller */
916 798static int uhci_count_ports(struct usb_hcd *hcd)
917static const struct hc_driver uhci_driver = { 799{
918 .description = hcd_name, 800 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
919 .product_desc = "UHCI Host Controller", 801 unsigned io_size = (unsigned) hcd->rsrc_len;
920 .hcd_priv_size = sizeof(struct uhci_hcd), 802 int port;
921
922 /* Generic hardware linkage */
923 .irq = uhci_irq,
924 .flags = HCD_USB11,
925
926 /* Basic lifecycle operations */
927 .reset = uhci_init,
928 .start = uhci_start,
929#ifdef CONFIG_PM
930 .pci_suspend = uhci_pci_suspend,
931 .pci_resume = uhci_pci_resume,
932 .bus_suspend = uhci_rh_suspend,
933 .bus_resume = uhci_rh_resume,
934#endif
935 .stop = uhci_stop,
936 803
937 .urb_enqueue = uhci_urb_enqueue, 804 /* The UHCI spec says devices must have 2 ports, and goes on to say
938 .urb_dequeue = uhci_urb_dequeue, 805 * they may have more but gives no way to determine how many there
806 * are. However according to the UHCI spec, Bit 7 of the port
807 * status and control register is always set to 1. So we try to
808 * use this to our advantage. Another common failure mode when
809 * a nonexistent register is addressed is to return all ones, so
810 * we test for that also.
811 */
812 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
813 unsigned int portstatus;
939 814
940 .endpoint_disable = uhci_hcd_endpoint_disable, 815 portstatus = uhci_readw(uhci, USBPORTSC1 + (port * 2));
941 .get_frame_number = uhci_hcd_get_frame_number, 816 if (!(portstatus & 0x0080) || portstatus == 0xffff)
817 break;
818 }
819 if (debug)
820 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
942 821
943 .hub_status_data = uhci_hub_status_data, 822 /* Anything greater than 7 is weird so we'll ignore it. */
944 .hub_control = uhci_hub_control, 823 if (port > UHCI_RH_MAXCHILD) {
945}; 824 dev_info(uhci_dev(uhci), "port count misdetected? "
825 "forcing to 2 ports\n");
826 port = 2;
827 }
946 828
947static const struct pci_device_id uhci_pci_ids[] = { { 829 return port;
948 /* handle any USB UHCI controller */ 830}
949 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
950 .driver_data = (unsigned long) &uhci_driver,
951 }, { /* end: all zeroes */ }
952};
953 831
954MODULE_DEVICE_TABLE(pci, uhci_pci_ids); 832static const char hcd_name[] = "uhci_hcd";
955 833
956static struct pci_driver uhci_pci_driver = { 834#ifdef CONFIG_PCI
957 .name = (char *)hcd_name, 835#include "uhci-pci.c"
958 .id_table = uhci_pci_ids, 836#define PCI_DRIVER uhci_pci_driver
837#endif
959 838
960 .probe = usb_hcd_pci_probe, 839#ifdef CONFIG_SPARC_LEON
961 .remove = usb_hcd_pci_remove, 840#include "uhci-grlib.c"
962 .shutdown = uhci_shutdown, 841#define PLATFORM_DRIVER uhci_grlib_driver
842#endif
963 843
964#ifdef CONFIG_PM_SLEEP 844#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER)
965 .driver = { 845#error "missing bus glue for uhci-hcd"
966 .pm = &usb_hcd_pci_pm_ops
967 },
968#endif 846#endif
969}; 847
970
971static int __init uhci_hcd_init(void) 848static int __init uhci_hcd_init(void)
972{ 849{
973 int retval = -ENOMEM; 850 int retval = -ENOMEM;
@@ -993,13 +870,27 @@ static int __init uhci_hcd_init(void)
993 if (!uhci_up_cachep) 870 if (!uhci_up_cachep)
994 goto up_failed; 871 goto up_failed;
995 872
996 retval = pci_register_driver(&uhci_pci_driver); 873#ifdef PLATFORM_DRIVER
997 if (retval) 874 retval = platform_driver_register(&PLATFORM_DRIVER);
998 goto init_failed; 875 if (retval < 0)
876 goto clean0;
877#endif
878
879#ifdef PCI_DRIVER
880 retval = pci_register_driver(&PCI_DRIVER);
881 if (retval < 0)
882 goto clean1;
883#endif
999 884
1000 return 0; 885 return 0;
1001 886
1002init_failed: 887#ifdef PCI_DRIVER
888clean1:
889#endif
890#ifdef PLATFORM_DRIVER
891 platform_driver_unregister(&PLATFORM_DRIVER);
892clean0:
893#endif
1003 kmem_cache_destroy(uhci_up_cachep); 894 kmem_cache_destroy(uhci_up_cachep);
1004 895
1005up_failed: 896up_failed:
@@ -1016,7 +907,12 @@ errbuf_failed:
1016 907
1017static void __exit uhci_hcd_cleanup(void) 908static void __exit uhci_hcd_cleanup(void)
1018{ 909{
1019 pci_unregister_driver(&uhci_pci_driver); 910#ifdef PLATFORM_DRIVER
911 platform_driver_unregister(&PLATFORM_DRIVER);
912#endif
913#ifdef PCI_DRIVER
914 pci_unregister_driver(&PCI_DRIVER);
915#endif
1020 kmem_cache_destroy(uhci_up_cachep); 916 kmem_cache_destroy(uhci_up_cachep);
1021 debugfs_remove(uhci_debugfs_root); 917 debugfs_remove(uhci_debugfs_root);
1022 kfree(errbuf); 918 kfree(errbuf);
diff --git a/drivers/usb/host/uhci-hcd.h b/drivers/usb/host/uhci-hcd.h
index 49bf2790f9c2..a4e64d08f020 100644
--- a/drivers/usb/host/uhci-hcd.h
+++ b/drivers/usb/host/uhci-hcd.h
@@ -380,6 +380,9 @@ struct uhci_hcd {
380 /* Grabbed from PCI */ 380 /* Grabbed from PCI */
381 unsigned long io_addr; 381 unsigned long io_addr;
382 382
383 /* Used when registers are memory mapped */
384 void __iomem *regs;
385
383 struct dma_pool *qh_pool; 386 struct dma_pool *qh_pool;
384 struct dma_pool *td_pool; 387 struct dma_pool *td_pool;
385 388
@@ -415,6 +418,10 @@ struct uhci_hcd {
415 418
416 struct timer_list fsbr_timer; /* For turning off FBSR */ 419 struct timer_list fsbr_timer; /* For turning off FBSR */
417 420
421 /* Silicon quirks */
422 unsigned int oc_low:1; /* OverCurrent bit active low */
423 unsigned int wait_for_hp:1; /* Wait for HP port reset */
424
418 /* Support for port suspend/resume/reset */ 425 /* Support for port suspend/resume/reset */
419 unsigned long port_c_suspend; /* Bit-arrays of ports */ 426 unsigned long port_c_suspend; /* Bit-arrays of ports */
420 unsigned long resuming_ports; 427 unsigned long resuming_ports;
@@ -429,6 +436,16 @@ struct uhci_hcd {
429 436
430 int total_load; /* Sum of array values */ 437 int total_load; /* Sum of array values */
431 short load[MAX_PHASE]; /* Periodic allocations */ 438 short load[MAX_PHASE]; /* Periodic allocations */
439
440 /* Reset host controller */
441 void (*reset_hc) (struct uhci_hcd *uhci);
442 int (*check_and_reset_hc) (struct uhci_hcd *uhci);
443 /* configure_hc should perform arch specific settings, if needed */
444 void (*configure_hc) (struct uhci_hcd *uhci);
445 /* Check for broken resume detect interrupts */
446 int (*resume_detect_interrupts_are_broken) (struct uhci_hcd *uhci);
447 /* Check for broken global suspend */
448 int (*global_suspend_mode_is_broken) (struct uhci_hcd *uhci);
432}; 449};
433 450
434/* Convert between a usb_hcd pointer and the corresponding uhci_hcd */ 451/* Convert between a usb_hcd pointer and the corresponding uhci_hcd */
@@ -467,4 +484,96 @@ struct urb_priv {
467#define PCI_VENDOR_ID_GENESYS 0x17a0 484#define PCI_VENDOR_ID_GENESYS 0x17a0
468#define PCI_DEVICE_ID_GL880S_UHCI 0x8083 485#define PCI_DEVICE_ID_GL880S_UHCI 0x8083
469 486
487/*
488 * Functions used to access controller registers. The UCHI spec says that host
489 * controller I/O registers are mapped into PCI I/O space. For non-PCI hosts
490 * we use memory mapped registers.
491 */
492
493#if !defined(CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC)
494/* Support PCI only */
495static inline u32 uhci_readl(struct uhci_hcd *uhci, int reg)
496{
497 return inl(uhci->io_addr + reg);
498}
499
500static inline void uhci_writel(struct uhci_hcd *uhci, u32 val, int reg)
501{
502 outl(val, uhci->io_addr + reg);
503}
504
505static inline u16 uhci_readw(struct uhci_hcd *uhci, int reg)
506{
507 return inw(uhci->io_addr + reg);
508}
509
510static inline void uhci_writew(struct uhci_hcd *uhci, u16 val, int reg)
511{
512 outw(val, uhci->io_addr + reg);
513}
514
515static inline u8 uhci_readb(struct uhci_hcd *uhci, int reg)
516{
517 return inb(uhci->io_addr + reg);
518}
519
520static inline void uhci_writeb(struct uhci_hcd *uhci, u8 val, int reg)
521{
522 outb(val, uhci->io_addr + reg);
523}
524
525#else
526/* Support PCI and non-PCI host controllers */
527
528#define uhci_has_pci_registers(u) ((u)->io_addr != 0)
529
530static inline u32 uhci_readl(struct uhci_hcd *uhci, int reg)
531{
532 if (uhci_has_pci_registers(uhci))
533 return inl(uhci->io_addr + reg);
534 else
535 return readl(uhci->regs + reg);
536}
537
538static inline void uhci_writel(struct uhci_hcd *uhci, u32 val, int reg)
539{
540 if (uhci_has_pci_registers(uhci))
541 outl(val, uhci->io_addr + reg);
542 else
543 writel(val, uhci->regs + reg);
544}
545
546static inline u16 uhci_readw(struct uhci_hcd *uhci, int reg)
547{
548 if (uhci_has_pci_registers(uhci))
549 return inw(uhci->io_addr + reg);
550 else
551 return readw(uhci->regs + reg);
552}
553
554static inline void uhci_writew(struct uhci_hcd *uhci, u16 val, int reg)
555{
556 if (uhci_has_pci_registers(uhci))
557 outw(val, uhci->io_addr + reg);
558 else
559 writew(val, uhci->regs + reg);
560}
561
562static inline u8 uhci_readb(struct uhci_hcd *uhci, int reg)
563{
564 if (uhci_has_pci_registers(uhci))
565 return inb(uhci->io_addr + reg);
566 else
567 return readb(uhci->regs + reg);
568}
569
570static inline void uhci_writeb(struct uhci_hcd *uhci, u8 val, int reg)
571{
572 if (uhci_has_pci_registers(uhci))
573 outb(val, uhci->io_addr + reg);
574 else
575 writeb(val, uhci->regs + reg);
576}
577#endif /* !defined(CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC) */
578
470#endif 579#endif
diff --git a/drivers/usb/host/uhci-hub.c b/drivers/usb/host/uhci-hub.c
index 6d59c0f77f25..045cde4cbc3d 100644
--- a/drivers/usb/host/uhci-hub.c
+++ b/drivers/usb/host/uhci-hub.c
@@ -44,7 +44,7 @@ static int any_ports_active(struct uhci_hcd *uhci)
44 int port; 44 int port;
45 45
46 for (port = 0; port < uhci->rh_numports; ++port) { 46 for (port = 0; port < uhci->rh_numports; ++port) {
47 if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & 47 if ((uhci_readw(uhci, USBPORTSC1 + port * 2) &
48 (USBPORTSC_CCS | RWC_BITS)) || 48 (USBPORTSC_CCS | RWC_BITS)) ||
49 test_bit(port, &uhci->port_c_suspend)) 49 test_bit(port, &uhci->port_c_suspend))
50 return 1; 50 return 1;
@@ -68,7 +68,7 @@ static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
68 68
69 *buf = 0; 69 *buf = 0;
70 for (port = 0; port < uhci->rh_numports; ++port) { 70 for (port = 0; port < uhci->rh_numports; ++port) {
71 if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & mask) || 71 if ((uhci_readw(uhci, USBPORTSC1 + port * 2) & mask) ||
72 test_bit(port, &uhci->port_c_suspend)) 72 test_bit(port, &uhci->port_c_suspend))
73 *buf |= (1 << (port + 1)); 73 *buf |= (1 << (port + 1));
74 } 74 }
@@ -78,17 +78,17 @@ static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
78#define OK(x) len = (x); break 78#define OK(x) len = (x); break
79 79
80#define CLR_RH_PORTSTAT(x) \ 80#define CLR_RH_PORTSTAT(x) \
81 status = inw(port_addr); \ 81 status = uhci_readw(uhci, port_addr); \
82 status &= ~(RWC_BITS|WZ_BITS); \ 82 status &= ~(RWC_BITS|WZ_BITS); \
83 status &= ~(x); \ 83 status &= ~(x); \
84 status |= RWC_BITS & (x); \ 84 status |= RWC_BITS & (x); \
85 outw(status, port_addr) 85 uhci_writew(uhci, status, port_addr)
86 86
87#define SET_RH_PORTSTAT(x) \ 87#define SET_RH_PORTSTAT(x) \
88 status = inw(port_addr); \ 88 status = uhci_readw(uhci, port_addr); \
89 status |= (x); \ 89 status |= (x); \
90 status &= ~(RWC_BITS|WZ_BITS); \ 90 status &= ~(RWC_BITS|WZ_BITS); \
91 outw(status, port_addr) 91 uhci_writew(uhci, status, port_addr)
92 92
93/* UHCI controllers don't automatically stop resume signalling after 20 msec, 93/* UHCI controllers don't automatically stop resume signalling after 20 msec,
94 * so we have to poll and check timeouts in order to take care of it. 94 * so we have to poll and check timeouts in order to take care of it.
@@ -99,7 +99,7 @@ static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
99 int status; 99 int status;
100 int i; 100 int i;
101 101
102 if (inw(port_addr) & SUSPEND_BITS) { 102 if (uhci_readw(uhci, port_addr) & SUSPEND_BITS) {
103 CLR_RH_PORTSTAT(SUSPEND_BITS); 103 CLR_RH_PORTSTAT(SUSPEND_BITS);
104 if (test_bit(port, &uhci->resuming_ports)) 104 if (test_bit(port, &uhci->resuming_ports))
105 set_bit(port, &uhci->port_c_suspend); 105 set_bit(port, &uhci->port_c_suspend);
@@ -110,7 +110,7 @@ static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
110 * Experiments show that some controllers take longer, so 110 * Experiments show that some controllers take longer, so
111 * we'll poll for completion. */ 111 * we'll poll for completion. */
112 for (i = 0; i < 10; ++i) { 112 for (i = 0; i < 10; ++i) {
113 if (!(inw(port_addr) & SUSPEND_BITS)) 113 if (!(uhci_readw(uhci, port_addr) & SUSPEND_BITS))
114 break; 114 break;
115 udelay(1); 115 udelay(1);
116 } 116 }
@@ -121,12 +121,12 @@ static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
121/* Wait for the UHCI controller in HP's iLO2 server management chip. 121/* Wait for the UHCI controller in HP's iLO2 server management chip.
122 * It can take up to 250 us to finish a reset and set the CSC bit. 122 * It can take up to 250 us to finish a reset and set the CSC bit.
123 */ 123 */
124static void wait_for_HP(unsigned long port_addr) 124static void wait_for_HP(struct uhci_hcd *uhci, unsigned long port_addr)
125{ 125{
126 int i; 126 int i;
127 127
128 for (i = 10; i < 250; i += 10) { 128 for (i = 10; i < 250; i += 10) {
129 if (inw(port_addr) & USBPORTSC_CSC) 129 if (uhci_readw(uhci, port_addr) & USBPORTSC_CSC)
130 return; 130 return;
131 udelay(10); 131 udelay(10);
132 } 132 }
@@ -140,8 +140,8 @@ static void uhci_check_ports(struct uhci_hcd *uhci)
140 int status; 140 int status;
141 141
142 for (port = 0; port < uhci->rh_numports; ++port) { 142 for (port = 0; port < uhci->rh_numports; ++port) {
143 port_addr = uhci->io_addr + USBPORTSC1 + 2 * port; 143 port_addr = USBPORTSC1 + 2 * port;
144 status = inw(port_addr); 144 status = uhci_readw(uhci, port_addr);
145 if (unlikely(status & USBPORTSC_PR)) { 145 if (unlikely(status & USBPORTSC_PR)) {
146 if (time_after_eq(jiffies, uhci->ports_timeout)) { 146 if (time_after_eq(jiffies, uhci->ports_timeout)) {
147 CLR_RH_PORTSTAT(USBPORTSC_PR); 147 CLR_RH_PORTSTAT(USBPORTSC_PR);
@@ -149,9 +149,8 @@ static void uhci_check_ports(struct uhci_hcd *uhci)
149 149
150 /* HP's server management chip requires 150 /* HP's server management chip requires
151 * a longer delay. */ 151 * a longer delay. */
152 if (to_pci_dev(uhci_dev(uhci))->vendor == 152 if (uhci->wait_for_hp)
153 PCI_VENDOR_ID_HP) 153 wait_for_HP(uhci, port_addr);
154 wait_for_HP(port_addr);
155 154
156 /* If the port was enabled before, turning 155 /* If the port was enabled before, turning
157 * reset on caused a port enable change. 156 * reset on caused a port enable change.
@@ -242,7 +241,7 @@ static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
242 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 241 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
243 int status, lstatus, retval = 0, len = 0; 242 int status, lstatus, retval = 0, len = 0;
244 unsigned int port = wIndex - 1; 243 unsigned int port = wIndex - 1;
245 unsigned long port_addr = uhci->io_addr + USBPORTSC1 + 2 * port; 244 unsigned long port_addr = USBPORTSC1 + 2 * port;
246 u16 wPortChange, wPortStatus; 245 u16 wPortChange, wPortStatus;
247 unsigned long flags; 246 unsigned long flags;
248 247
@@ -260,14 +259,13 @@ static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
260 goto err; 259 goto err;
261 260
262 uhci_check_ports(uhci); 261 uhci_check_ports(uhci);
263 status = inw(port_addr); 262 status = uhci_readw(uhci, port_addr);
264 263
265 /* Intel controllers report the OverCurrent bit active on. 264 /* Intel controllers report the OverCurrent bit active on.
266 * VIA controllers report it active off, so we'll adjust the 265 * VIA controllers report it active off, so we'll adjust the
267 * bit value. (It's not standardized in the UHCI spec.) 266 * bit value. (It's not standardized in the UHCI spec.)
268 */ 267 */
269 if (to_pci_dev(hcd->self.controller)->vendor == 268 if (uhci->oc_low)
270 PCI_VENDOR_ID_VIA)
271 status ^= USBPORTSC_OC; 269 status ^= USBPORTSC_OC;
272 270
273 /* UHCI doesn't support C_RESET (always false) */ 271 /* UHCI doesn't support C_RESET (always false) */
@@ -358,7 +356,7 @@ static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
358 CLR_RH_PORTSTAT(USBPORTSC_PEC); 356 CLR_RH_PORTSTAT(USBPORTSC_PEC);
359 OK(0); 357 OK(0);
360 case USB_PORT_FEAT_SUSPEND: 358 case USB_PORT_FEAT_SUSPEND:
361 if (!(inw(port_addr) & USBPORTSC_SUSP)) { 359 if (!(uhci_readw(uhci, port_addr) & USBPORTSC_SUSP)) {
362 360
363 /* Make certain the port isn't suspended */ 361 /* Make certain the port isn't suspended */
364 uhci_finish_suspend(uhci, port, port_addr); 362 uhci_finish_suspend(uhci, port, port_addr);
@@ -370,7 +368,8 @@ static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
370 * if the port is disabled. When this happens 368 * if the port is disabled. When this happens
371 * just skip the Resume signalling. 369 * just skip the Resume signalling.
372 */ 370 */
373 if (!(inw(port_addr) & USBPORTSC_RD)) 371 if (!(uhci_readw(uhci, port_addr) &
372 USBPORTSC_RD))
374 uhci_finish_suspend(uhci, port, 373 uhci_finish_suspend(uhci, port,
375 port_addr); 374 port_addr);
376 else 375 else
diff --git a/drivers/usb/host/uhci-pci.c b/drivers/usb/host/uhci-pci.c
new file mode 100644
index 000000000000..c300bd2f7d1c
--- /dev/null
+++ b/drivers/usb/host/uhci-pci.c
@@ -0,0 +1,301 @@
1/*
2 * UHCI HCD (Host Controller Driver) PCI Bus Glue.
3 *
4 * Extracted from uhci-hcd.c:
5 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 *
7 * (C) Copyright 1999 Linus Torvalds
8 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
9 * (C) Copyright 1999 Randy Dunlap
10 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
11 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
12 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
13 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
14 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
15 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
16 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
17 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18 */
19
20#include "pci-quirks.h"
21
22/*
23 * Make sure the controller is completely inactive, unable to
24 * generate interrupts or do DMA.
25 */
26static void uhci_pci_reset_hc(struct uhci_hcd *uhci)
27{
28 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
29}
30
31/*
32 * Initialize a controller that was newly discovered or has just been
33 * resumed. In either case we can't be sure of its previous state.
34 *
35 * Returns: 1 if the controller was reset, 0 otherwise.
36 */
37static int uhci_pci_check_and_reset_hc(struct uhci_hcd *uhci)
38{
39 return uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)),
40 uhci->io_addr);
41}
42
43/*
44 * Store the basic register settings needed by the controller.
45 * This function is called at the end of configure_hc in uhci-hcd.c.
46 */
47static void uhci_pci_configure_hc(struct uhci_hcd *uhci)
48{
49 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
50
51 /* Enable PIRQ */
52 pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
53
54 /* Disable platform-specific non-PME# wakeup */
55 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
56 pci_write_config_byte(pdev, USBRES_INTEL, 0);
57}
58
59static int uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
60{
61 int port;
62
63 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
64 default:
65 break;
66
67 case PCI_VENDOR_ID_GENESYS:
68 /* Genesys Logic's GL880S controllers don't generate
69 * resume-detect interrupts.
70 */
71 return 1;
72
73 case PCI_VENDOR_ID_INTEL:
74 /* Some of Intel's USB controllers have a bug that causes
75 * resume-detect interrupts if any port has an over-current
76 * condition. To make matters worse, some motherboards
77 * hardwire unused USB ports' over-current inputs active!
78 * To prevent problems, we will not enable resume-detect
79 * interrupts if any ports are OC.
80 */
81 for (port = 0; port < uhci->rh_numports; ++port) {
82 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
83 USBPORTSC_OC)
84 return 1;
85 }
86 break;
87 }
88 return 0;
89}
90
91static int uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd *uhci)
92{
93 int port;
94 const char *sys_info;
95 static const char bad_Asus_board[] = "A7V8X";
96
97 /* One of Asus's motherboards has a bug which causes it to
98 * wake up immediately from suspend-to-RAM if any of the ports
99 * are connected. In such cases we will not set EGSM.
100 */
101 sys_info = dmi_get_system_info(DMI_BOARD_NAME);
102 if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
103 for (port = 0; port < uhci->rh_numports; ++port) {
104 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
105 USBPORTSC_CCS)
106 return 1;
107 }
108 }
109
110 return 0;
111}
112
113static int uhci_pci_init(struct usb_hcd *hcd)
114{
115 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
116
117 uhci->io_addr = (unsigned long) hcd->rsrc_start;
118
119 uhci->rh_numports = uhci_count_ports(hcd);
120
121 /* Intel controllers report the OverCurrent bit active on.
122 * VIA controllers report it active off, so we'll adjust the
123 * bit value. (It's not standardized in the UHCI spec.)
124 */
125 if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA)
126 uhci->oc_low = 1;
127
128 /* HP's server management chip requires a longer port reset delay. */
129 if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP)
130 uhci->wait_for_hp = 1;
131
132 /* Set up pointers to PCI-specific functions */
133 uhci->reset_hc = uhci_pci_reset_hc;
134 uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc;
135 uhci->configure_hc = uhci_pci_configure_hc;
136 uhci->resume_detect_interrupts_are_broken =
137 uhci_pci_resume_detect_interrupts_are_broken;
138 uhci->global_suspend_mode_is_broken =
139 uhci_pci_global_suspend_mode_is_broken;
140
141
142 /* Kick BIOS off this hardware and reset if the controller
143 * isn't already safely quiescent.
144 */
145 check_and_reset_hc(uhci);
146 return 0;
147}
148
149/* Make sure the controller is quiescent and that we're not using it
150 * any more. This is mainly for the benefit of programs which, like kexec,
151 * expect the hardware to be idle: not doing DMA or generating IRQs.
152 *
153 * This routine may be called in a damaged or failing kernel. Hence we
154 * do not acquire the spinlock before shutting down the controller.
155 */
156static void uhci_shutdown(struct pci_dev *pdev)
157{
158 struct usb_hcd *hcd = pci_get_drvdata(pdev);
159
160 uhci_hc_died(hcd_to_uhci(hcd));
161}
162
163#ifdef CONFIG_PM
164
165static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
166{
167 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
168 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
169 int rc = 0;
170
171 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
172
173 spin_lock_irq(&uhci->lock);
174 if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
175 goto done_okay; /* Already suspended or dead */
176
177 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
178 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
179 rc = -EBUSY;
180 goto done;
181 };
182
183 /* All PCI host controllers are required to disable IRQ generation
184 * at the source, so we must turn off PIRQ.
185 */
186 pci_write_config_word(pdev, USBLEGSUP, 0);
187 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
188
189 /* Enable platform-specific non-PME# wakeup */
190 if (do_wakeup) {
191 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
192 pci_write_config_byte(pdev, USBRES_INTEL,
193 USBPORT1EN | USBPORT2EN);
194 }
195
196done_okay:
197 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
198done:
199 spin_unlock_irq(&uhci->lock);
200 return rc;
201}
202
203static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
204{
205 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
206
207 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
208
209 /* Since we aren't in D3 any more, it's safe to set this flag
210 * even if the controller was dead.
211 */
212 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
213
214 spin_lock_irq(&uhci->lock);
215
216 /* Make sure resume from hibernation re-enumerates everything */
217 if (hibernated) {
218 uhci->reset_hc(uhci);
219 finish_reset(uhci);
220 }
221
222 /* The firmware may have changed the controller settings during
223 * a system wakeup. Check it and reconfigure to avoid problems.
224 */
225 else {
226 check_and_reset_hc(uhci);
227 }
228 configure_hc(uhci);
229
230 /* Tell the core if the controller had to be reset */
231 if (uhci->rh_state == UHCI_RH_RESET)
232 usb_root_hub_lost_power(hcd->self.root_hub);
233
234 spin_unlock_irq(&uhci->lock);
235
236 /* If interrupts don't work and remote wakeup is enabled then
237 * the suspended root hub needs to be polled.
238 */
239 if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
240 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
241
242 /* Does the root hub have a port wakeup pending? */
243 usb_hcd_poll_rh_status(hcd);
244 return 0;
245}
246
247#endif
248
249static const struct hc_driver uhci_driver = {
250 .description = hcd_name,
251 .product_desc = "UHCI Host Controller",
252 .hcd_priv_size = sizeof(struct uhci_hcd),
253
254 /* Generic hardware linkage */
255 .irq = uhci_irq,
256 .flags = HCD_USB11,
257
258 /* Basic lifecycle operations */
259 .reset = uhci_pci_init,
260 .start = uhci_start,
261#ifdef CONFIG_PM
262 .pci_suspend = uhci_pci_suspend,
263 .pci_resume = uhci_pci_resume,
264 .bus_suspend = uhci_rh_suspend,
265 .bus_resume = uhci_rh_resume,
266#endif
267 .stop = uhci_stop,
268
269 .urb_enqueue = uhci_urb_enqueue,
270 .urb_dequeue = uhci_urb_dequeue,
271
272 .endpoint_disable = uhci_hcd_endpoint_disable,
273 .get_frame_number = uhci_hcd_get_frame_number,
274
275 .hub_status_data = uhci_hub_status_data,
276 .hub_control = uhci_hub_control,
277};
278
279static DEFINE_PCI_DEVICE_TABLE(uhci_pci_ids) = { {
280 /* handle any USB UHCI controller */
281 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
282 .driver_data = (unsigned long) &uhci_driver,
283 }, { /* end: all zeroes */ }
284};
285
286MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
287
288static struct pci_driver uhci_pci_driver = {
289 .name = (char *)hcd_name,
290 .id_table = uhci_pci_ids,
291
292 .probe = usb_hcd_pci_probe,
293 .remove = usb_hcd_pci_remove,
294 .shutdown = uhci_shutdown,
295
296#ifdef CONFIG_PM_SLEEP
297 .driver = {
298 .pm = &usb_hcd_pci_pm_ops
299 },
300#endif
301};
diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c
index 0231814a97a5..2e0486178dbe 100644
--- a/drivers/usb/host/xhci-dbg.c
+++ b/drivers/usb/host/xhci-dbg.c
@@ -147,7 +147,7 @@ static void xhci_print_op_regs(struct xhci_hcd *xhci)
147 147
148static void xhci_print_ports(struct xhci_hcd *xhci) 148static void xhci_print_ports(struct xhci_hcd *xhci)
149{ 149{
150 u32 __iomem *addr; 150 __le32 __iomem *addr;
151 int i, j; 151 int i, j;
152 int ports; 152 int ports;
153 char *names[NUM_PORT_REGS] = { 153 char *names[NUM_PORT_REGS] = {
@@ -253,27 +253,27 @@ void xhci_print_trb_offsets(struct xhci_hcd *xhci, union xhci_trb *trb)
253void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb) 253void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
254{ 254{
255 u64 address; 255 u64 address;
256 u32 type = xhci_readl(xhci, &trb->link.control) & TRB_TYPE_BITMASK; 256 u32 type = le32_to_cpu(trb->link.control) & TRB_TYPE_BITMASK;
257 257
258 switch (type) { 258 switch (type) {
259 case TRB_TYPE(TRB_LINK): 259 case TRB_TYPE(TRB_LINK):
260 xhci_dbg(xhci, "Link TRB:\n"); 260 xhci_dbg(xhci, "Link TRB:\n");
261 xhci_print_trb_offsets(xhci, trb); 261 xhci_print_trb_offsets(xhci, trb);
262 262
263 address = trb->link.segment_ptr; 263 address = le64_to_cpu(trb->link.segment_ptr);
264 xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address); 264 xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address);
265 265
266 xhci_dbg(xhci, "Interrupter target = 0x%x\n", 266 xhci_dbg(xhci, "Interrupter target = 0x%x\n",
267 GET_INTR_TARGET(trb->link.intr_target)); 267 GET_INTR_TARGET(le32_to_cpu(trb->link.intr_target)));
268 xhci_dbg(xhci, "Cycle bit = %u\n", 268 xhci_dbg(xhci, "Cycle bit = %u\n",
269 (unsigned int) (trb->link.control & TRB_CYCLE)); 269 (unsigned int) (le32_to_cpu(trb->link.control) & TRB_CYCLE));
270 xhci_dbg(xhci, "Toggle cycle bit = %u\n", 270 xhci_dbg(xhci, "Toggle cycle bit = %u\n",
271 (unsigned int) (trb->link.control & LINK_TOGGLE)); 271 (unsigned int) (le32_to_cpu(trb->link.control) & LINK_TOGGLE));
272 xhci_dbg(xhci, "No Snoop bit = %u\n", 272 xhci_dbg(xhci, "No Snoop bit = %u\n",
273 (unsigned int) (trb->link.control & TRB_NO_SNOOP)); 273 (unsigned int) (le32_to_cpu(trb->link.control) & TRB_NO_SNOOP));
274 break; 274 break;
275 case TRB_TYPE(TRB_TRANSFER): 275 case TRB_TYPE(TRB_TRANSFER):
276 address = trb->trans_event.buffer; 276 address = le64_to_cpu(trb->trans_event.buffer);
277 /* 277 /*
278 * FIXME: look at flags to figure out if it's an address or if 278 * FIXME: look at flags to figure out if it's an address or if
279 * the data is directly in the buffer field. 279 * the data is directly in the buffer field.
@@ -281,11 +281,12 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
281 xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address); 281 xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address);
282 break; 282 break;
283 case TRB_TYPE(TRB_COMPLETION): 283 case TRB_TYPE(TRB_COMPLETION):
284 address = trb->event_cmd.cmd_trb; 284 address = le64_to_cpu(trb->event_cmd.cmd_trb);
285 xhci_dbg(xhci, "Command TRB pointer = %llu\n", address); 285 xhci_dbg(xhci, "Command TRB pointer = %llu\n", address);
286 xhci_dbg(xhci, "Completion status = %u\n", 286 xhci_dbg(xhci, "Completion status = %u\n",
287 (unsigned int) GET_COMP_CODE(trb->event_cmd.status)); 287 (unsigned int) GET_COMP_CODE(le32_to_cpu(trb->event_cmd.status)));
288 xhci_dbg(xhci, "Flags = 0x%x\n", (unsigned int) trb->event_cmd.flags); 288 xhci_dbg(xhci, "Flags = 0x%x\n",
289 (unsigned int) le32_to_cpu(trb->event_cmd.flags));
289 break; 290 break;
290 default: 291 default:
291 xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n", 292 xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n",
@@ -311,16 +312,16 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
311void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg) 312void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg)
312{ 313{
313 int i; 314 int i;
314 u32 addr = (u32) seg->dma; 315 u64 addr = seg->dma;
315 union xhci_trb *trb = seg->trbs; 316 union xhci_trb *trb = seg->trbs;
316 317
317 for (i = 0; i < TRBS_PER_SEGMENT; ++i) { 318 for (i = 0; i < TRBS_PER_SEGMENT; ++i) {
318 trb = &seg->trbs[i]; 319 trb = &seg->trbs[i];
319 xhci_dbg(xhci, "@%08x %08x %08x %08x %08x\n", addr, 320 xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", addr,
320 lower_32_bits(trb->link.segment_ptr), 321 (u32)lower_32_bits(le64_to_cpu(trb->link.segment_ptr)),
321 upper_32_bits(trb->link.segment_ptr), 322 (u32)upper_32_bits(le64_to_cpu(trb->link.segment_ptr)),
322 (unsigned int) trb->link.intr_target, 323 (unsigned int) le32_to_cpu(trb->link.intr_target),
323 (unsigned int) trb->link.control); 324 (unsigned int) le32_to_cpu(trb->link.control));
324 addr += sizeof(*trb); 325 addr += sizeof(*trb);
325 } 326 }
326} 327}
@@ -391,18 +392,18 @@ void xhci_dbg_ep_rings(struct xhci_hcd *xhci,
391 392
392void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst) 393void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
393{ 394{
394 u32 addr = (u32) erst->erst_dma_addr; 395 u64 addr = erst->erst_dma_addr;
395 int i; 396 int i;
396 struct xhci_erst_entry *entry; 397 struct xhci_erst_entry *entry;
397 398
398 for (i = 0; i < erst->num_entries; ++i) { 399 for (i = 0; i < erst->num_entries; ++i) {
399 entry = &erst->entries[i]; 400 entry = &erst->entries[i];
400 xhci_dbg(xhci, "@%08x %08x %08x %08x %08x\n", 401 xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n",
401 (unsigned int) addr, 402 addr,
402 lower_32_bits(entry->seg_addr), 403 lower_32_bits(le64_to_cpu(entry->seg_addr)),
403 upper_32_bits(entry->seg_addr), 404 upper_32_bits(le64_to_cpu(entry->seg_addr)),
404 (unsigned int) entry->seg_size, 405 (unsigned int) le32_to_cpu(entry->seg_size),
405 (unsigned int) entry->rsvd); 406 (unsigned int) le32_to_cpu(entry->rsvd));
406 addr += sizeof(*entry); 407 addr += sizeof(*entry);
407 } 408 }
408} 409}
@@ -436,7 +437,7 @@ char *xhci_get_slot_state(struct xhci_hcd *xhci,
436{ 437{
437 struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx); 438 struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx);
438 439
439 switch (GET_SLOT_STATE(slot_ctx->dev_state)) { 440 switch (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state))) {
440 case 0: 441 case 0:
441 return "enabled/disabled"; 442 return "enabled/disabled";
442 case 1: 443 case 1:
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index 73f75d26436c..a56963736018 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -50,7 +50,7 @@ static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
50 temp |= 0x0008; 50 temp |= 0x0008;
51 /* Bits 6:5 - no TTs in root ports */ 51 /* Bits 6:5 - no TTs in root ports */
52 /* Bit 7 - no port indicators */ 52 /* Bit 7 - no port indicators */
53 desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp); 53 desc->wHubCharacteristics = cpu_to_le16(temp);
54} 54}
55 55
56/* Fill in the USB 2.0 roothub descriptor */ 56/* Fill in the USB 2.0 roothub descriptor */
@@ -314,7 +314,7 @@ void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
314} 314}
315 315
316static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci, 316static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
317 u16 wIndex, u32 __iomem *addr, u32 port_status) 317 u16 wIndex, __le32 __iomem *addr, u32 port_status)
318{ 318{
319 /* Don't allow the USB core to disable SuperSpeed ports. */ 319 /* Don't allow the USB core to disable SuperSpeed ports. */
320 if (hcd->speed == HCD_USB3) { 320 if (hcd->speed == HCD_USB3) {
@@ -331,7 +331,7 @@ static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
331} 331}
332 332
333static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue, 333static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
334 u16 wIndex, u32 __iomem *addr, u32 port_status) 334 u16 wIndex, __le32 __iomem *addr, u32 port_status)
335{ 335{
336 char *port_change_bit; 336 char *port_change_bit;
337 u32 status; 337 u32 status;
@@ -341,6 +341,10 @@ static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
341 status = PORT_RC; 341 status = PORT_RC;
342 port_change_bit = "reset"; 342 port_change_bit = "reset";
343 break; 343 break;
344 case USB_PORT_FEAT_C_BH_PORT_RESET:
345 status = PORT_WRC;
346 port_change_bit = "warm(BH) reset";
347 break;
344 case USB_PORT_FEAT_C_CONNECTION: 348 case USB_PORT_FEAT_C_CONNECTION:
345 status = PORT_CSC; 349 status = PORT_CSC;
346 port_change_bit = "connect"; 350 port_change_bit = "connect";
@@ -357,6 +361,10 @@ static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
357 status = PORT_PLC; 361 status = PORT_PLC;
358 port_change_bit = "suspend/resume"; 362 port_change_bit = "suspend/resume";
359 break; 363 break;
364 case USB_PORT_FEAT_C_PORT_LINK_STATE:
365 status = PORT_PLC;
366 port_change_bit = "link state";
367 break;
360 default: 368 default:
361 /* Should never happen */ 369 /* Should never happen */
362 return; 370 return;
@@ -376,9 +384,10 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
376 unsigned long flags; 384 unsigned long flags;
377 u32 temp, temp1, status; 385 u32 temp, temp1, status;
378 int retval = 0; 386 int retval = 0;
379 u32 __iomem **port_array; 387 __le32 __iomem **port_array;
380 int slot_id; 388 int slot_id;
381 struct xhci_bus_state *bus_state; 389 struct xhci_bus_state *bus_state;
390 u16 link_state = 0;
382 391
383 if (hcd->speed == HCD_USB3) { 392 if (hcd->speed == HCD_USB3) {
384 ports = xhci->num_usb3_ports; 393 ports = xhci->num_usb3_ports;
@@ -422,9 +431,6 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
422 } 431 }
423 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp); 432 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
424 433
425 /* FIXME - should we return a port status value like the USB
426 * 3.0 external hubs do?
427 */
428 /* wPortChange bits */ 434 /* wPortChange bits */
429 if (temp & PORT_CSC) 435 if (temp & PORT_CSC)
430 status |= USB_PORT_STAT_C_CONNECTION << 16; 436 status |= USB_PORT_STAT_C_CONNECTION << 16;
@@ -432,13 +438,21 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
432 status |= USB_PORT_STAT_C_ENABLE << 16; 438 status |= USB_PORT_STAT_C_ENABLE << 16;
433 if ((temp & PORT_OCC)) 439 if ((temp & PORT_OCC))
434 status |= USB_PORT_STAT_C_OVERCURRENT << 16; 440 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
435 /* 441 if ((temp & PORT_RC))
436 * FIXME ignoring reset and USB 2.1/3.0 specific 442 status |= USB_PORT_STAT_C_RESET << 16;
437 * changes 443 /* USB3.0 only */
438 */ 444 if (hcd->speed == HCD_USB3) {
439 if ((temp & PORT_PLS_MASK) == XDEV_U3 445 if ((temp & PORT_PLC))
440 && (temp & PORT_POWER)) 446 status |= USB_PORT_STAT_C_LINK_STATE << 16;
441 status |= 1 << USB_PORT_FEAT_SUSPEND; 447 if ((temp & PORT_WRC))
448 status |= USB_PORT_STAT_C_BH_RESET << 16;
449 }
450
451 if (hcd->speed != HCD_USB3) {
452 if ((temp & PORT_PLS_MASK) == XDEV_U3
453 && (temp & PORT_POWER))
454 status |= USB_PORT_STAT_SUSPEND;
455 }
442 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) { 456 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
443 if ((temp & PORT_RESET) || !(temp & PORT_PE)) 457 if ((temp & PORT_RESET) || !(temp & PORT_PE))
444 goto error; 458 goto error;
@@ -469,7 +483,8 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
469 && (temp & PORT_POWER) 483 && (temp & PORT_POWER)
470 && (bus_state->suspended_ports & (1 << wIndex))) { 484 && (bus_state->suspended_ports & (1 << wIndex))) {
471 bus_state->suspended_ports &= ~(1 << wIndex); 485 bus_state->suspended_ports &= ~(1 << wIndex);
472 bus_state->port_c_suspend |= 1 << wIndex; 486 if (hcd->speed != HCD_USB3)
487 bus_state->port_c_suspend |= 1 << wIndex;
473 } 488 }
474 if (temp & PORT_CONNECT) { 489 if (temp & PORT_CONNECT) {
475 status |= USB_PORT_STAT_CONNECTION; 490 status |= USB_PORT_STAT_CONNECTION;
@@ -481,14 +496,28 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
481 status |= USB_PORT_STAT_OVERCURRENT; 496 status |= USB_PORT_STAT_OVERCURRENT;
482 if (temp & PORT_RESET) 497 if (temp & PORT_RESET)
483 status |= USB_PORT_STAT_RESET; 498 status |= USB_PORT_STAT_RESET;
484 if (temp & PORT_POWER) 499 if (temp & PORT_POWER) {
485 status |= USB_PORT_STAT_POWER; 500 if (hcd->speed == HCD_USB3)
501 status |= USB_SS_PORT_STAT_POWER;
502 else
503 status |= USB_PORT_STAT_POWER;
504 }
505 /* Port Link State */
506 if (hcd->speed == HCD_USB3) {
507 /* resume state is a xHCI internal state.
508 * Do not report it to usb core.
509 */
510 if ((temp & PORT_PLS_MASK) != XDEV_RESUME)
511 status |= (temp & PORT_PLS_MASK);
512 }
486 if (bus_state->port_c_suspend & (1 << wIndex)) 513 if (bus_state->port_c_suspend & (1 << wIndex))
487 status |= 1 << USB_PORT_FEAT_C_SUSPEND; 514 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
488 xhci_dbg(xhci, "Get port status returned 0x%x\n", status); 515 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
489 put_unaligned(cpu_to_le32(status), (__le32 *) buf); 516 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
490 break; 517 break;
491 case SetPortFeature: 518 case SetPortFeature:
519 if (wValue == USB_PORT_FEAT_LINK_STATE)
520 link_state = (wIndex & 0xff00) >> 3;
492 wIndex &= 0xff; 521 wIndex &= 0xff;
493 if (!wIndex || wIndex > ports) 522 if (!wIndex || wIndex > ports)
494 goto error; 523 goto error;
@@ -537,6 +566,44 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
537 temp = xhci_readl(xhci, port_array[wIndex]); 566 temp = xhci_readl(xhci, port_array[wIndex]);
538 bus_state->suspended_ports |= 1 << wIndex; 567 bus_state->suspended_ports |= 1 << wIndex;
539 break; 568 break;
569 case USB_PORT_FEAT_LINK_STATE:
570 temp = xhci_readl(xhci, port_array[wIndex]);
571 /* Software should not attempt to set
572 * port link state above '5' (Rx.Detect) and the port
573 * must be enabled.
574 */
575 if ((temp & PORT_PE) == 0 ||
576 (link_state > USB_SS_PORT_LS_RX_DETECT)) {
577 xhci_warn(xhci, "Cannot set link state.\n");
578 goto error;
579 }
580
581 if (link_state == USB_SS_PORT_LS_U3) {
582 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
583 wIndex + 1);
584 if (slot_id) {
585 /* unlock to execute stop endpoint
586 * commands */
587 spin_unlock_irqrestore(&xhci->lock,
588 flags);
589 xhci_stop_device(xhci, slot_id, 1);
590 spin_lock_irqsave(&xhci->lock, flags);
591 }
592 }
593
594 temp = xhci_port_state_to_neutral(temp);
595 temp &= ~PORT_PLS_MASK;
596 temp |= PORT_LINK_STROBE | link_state;
597 xhci_writel(xhci, temp, port_array[wIndex]);
598
599 spin_unlock_irqrestore(&xhci->lock, flags);
600 msleep(20); /* wait device to enter */
601 spin_lock_irqsave(&xhci->lock, flags);
602
603 temp = xhci_readl(xhci, port_array[wIndex]);
604 if (link_state == USB_SS_PORT_LS_U3)
605 bus_state->suspended_ports |= 1 << wIndex;
606 break;
540 case USB_PORT_FEAT_POWER: 607 case USB_PORT_FEAT_POWER:
541 /* 608 /*
542 * Turn on ports, even if there isn't per-port switching. 609 * Turn on ports, even if there isn't per-port switching.
@@ -557,6 +624,12 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
557 temp = xhci_readl(xhci, port_array[wIndex]); 624 temp = xhci_readl(xhci, port_array[wIndex]);
558 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp); 625 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
559 break; 626 break;
627 case USB_PORT_FEAT_BH_PORT_RESET:
628 temp |= PORT_WR;
629 xhci_writel(xhci, temp, port_array[wIndex]);
630
631 temp = xhci_readl(xhci, port_array[wIndex]);
632 break;
560 default: 633 default:
561 goto error; 634 goto error;
562 } 635 }
@@ -584,35 +657,27 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
584 if (temp & XDEV_U3) { 657 if (temp & XDEV_U3) {
585 if ((temp & PORT_PE) == 0) 658 if ((temp & PORT_PE) == 0)
586 goto error; 659 goto error;
587 if (DEV_SUPERSPEED(temp)) {
588 temp = xhci_port_state_to_neutral(temp);
589 temp &= ~PORT_PLS_MASK;
590 temp |= PORT_LINK_STROBE | XDEV_U0;
591 xhci_writel(xhci, temp,
592 port_array[wIndex]);
593 xhci_readl(xhci, port_array[wIndex]);
594 } else {
595 temp = xhci_port_state_to_neutral(temp);
596 temp &= ~PORT_PLS_MASK;
597 temp |= PORT_LINK_STROBE | XDEV_RESUME;
598 xhci_writel(xhci, temp,
599 port_array[wIndex]);
600 660
601 spin_unlock_irqrestore(&xhci->lock, 661 temp = xhci_port_state_to_neutral(temp);
602 flags); 662 temp &= ~PORT_PLS_MASK;
603 msleep(20); 663 temp |= PORT_LINK_STROBE | XDEV_RESUME;
604 spin_lock_irqsave(&xhci->lock, flags); 664 xhci_writel(xhci, temp,
665 port_array[wIndex]);
605 666
606 temp = xhci_readl(xhci, 667 spin_unlock_irqrestore(&xhci->lock,
607 port_array[wIndex]); 668 flags);
608 temp = xhci_port_state_to_neutral(temp); 669 msleep(20);
609 temp &= ~PORT_PLS_MASK; 670 spin_lock_irqsave(&xhci->lock, flags);
610 temp |= PORT_LINK_STROBE | XDEV_U0; 671
611 xhci_writel(xhci, temp, 672 temp = xhci_readl(xhci,
612 port_array[wIndex]); 673 port_array[wIndex]);
613 } 674 temp = xhci_port_state_to_neutral(temp);
614 bus_state->port_c_suspend |= 1 << wIndex; 675 temp &= ~PORT_PLS_MASK;
676 temp |= PORT_LINK_STROBE | XDEV_U0;
677 xhci_writel(xhci, temp,
678 port_array[wIndex]);
615 } 679 }
680 bus_state->port_c_suspend |= 1 << wIndex;
616 681
617 slot_id = xhci_find_slot_id_by_port(hcd, xhci, 682 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
618 wIndex + 1); 683 wIndex + 1);
@@ -625,9 +690,11 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
625 case USB_PORT_FEAT_C_SUSPEND: 690 case USB_PORT_FEAT_C_SUSPEND:
626 bus_state->port_c_suspend &= ~(1 << wIndex); 691 bus_state->port_c_suspend &= ~(1 << wIndex);
627 case USB_PORT_FEAT_C_RESET: 692 case USB_PORT_FEAT_C_RESET:
693 case USB_PORT_FEAT_C_BH_PORT_RESET:
628 case USB_PORT_FEAT_C_CONNECTION: 694 case USB_PORT_FEAT_C_CONNECTION:
629 case USB_PORT_FEAT_C_OVER_CURRENT: 695 case USB_PORT_FEAT_C_OVER_CURRENT:
630 case USB_PORT_FEAT_C_ENABLE: 696 case USB_PORT_FEAT_C_ENABLE:
697 case USB_PORT_FEAT_C_PORT_LINK_STATE:
631 xhci_clear_port_change_bit(xhci, wValue, wIndex, 698 xhci_clear_port_change_bit(xhci, wValue, wIndex,
632 port_array[wIndex], temp); 699 port_array[wIndex], temp);
633 break; 700 break;
@@ -664,7 +731,7 @@ int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
664 int i, retval; 731 int i, retval;
665 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 732 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
666 int ports; 733 int ports;
667 u32 __iomem **port_array; 734 __le32 __iomem **port_array;
668 struct xhci_bus_state *bus_state; 735 struct xhci_bus_state *bus_state;
669 736
670 if (hcd->speed == HCD_USB3) { 737 if (hcd->speed == HCD_USB3) {
@@ -681,7 +748,7 @@ int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
681 memset(buf, 0, retval); 748 memset(buf, 0, retval);
682 status = 0; 749 status = 0;
683 750
684 mask = PORT_CSC | PORT_PEC | PORT_OCC; 751 mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC;
685 752
686 spin_lock_irqsave(&xhci->lock, flags); 753 spin_lock_irqsave(&xhci->lock, flags);
687 /* For each port, did anything change? If so, set that bit in buf. */ 754 /* For each port, did anything change? If so, set that bit in buf. */
@@ -709,7 +776,7 @@ int xhci_bus_suspend(struct usb_hcd *hcd)
709{ 776{
710 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 777 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
711 int max_ports, port_index; 778 int max_ports, port_index;
712 u32 __iomem **port_array; 779 __le32 __iomem **port_array;
713 struct xhci_bus_state *bus_state; 780 struct xhci_bus_state *bus_state;
714 unsigned long flags; 781 unsigned long flags;
715 782
@@ -779,7 +846,7 @@ int xhci_bus_suspend(struct usb_hcd *hcd)
779 846
780 if (hcd->speed != HCD_USB3) { 847 if (hcd->speed != HCD_USB3) {
781 /* enable remote wake up for USB 2.0 */ 848 /* enable remote wake up for USB 2.0 */
782 u32 __iomem *addr; 849 __le32 __iomem *addr;
783 u32 tmp; 850 u32 tmp;
784 851
785 /* Add one to the port status register address to get 852 /* Add one to the port status register address to get
@@ -801,7 +868,7 @@ int xhci_bus_resume(struct usb_hcd *hcd)
801{ 868{
802 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 869 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
803 int max_ports, port_index; 870 int max_ports, port_index;
804 u32 __iomem **port_array; 871 __le32 __iomem **port_array;
805 struct xhci_bus_state *bus_state; 872 struct xhci_bus_state *bus_state;
806 u32 temp; 873 u32 temp;
807 unsigned long flags; 874 unsigned long flags;
@@ -890,7 +957,7 @@ int xhci_bus_resume(struct usb_hcd *hcd)
890 957
891 if (hcd->speed != HCD_USB3) { 958 if (hcd->speed != HCD_USB3) {
892 /* disable remote wake up for USB 2.0 */ 959 /* disable remote wake up for USB 2.0 */
893 u32 __iomem *addr; 960 __le32 __iomem *addr;
894 u32 tmp; 961 u32 tmp;
895 962
896 /* Add one to the port status register address to get 963 /* Add one to the port status register address to get
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 627f3438028c..a4fc4d929385 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -89,16 +89,17 @@ static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,
89 return; 89 return;
90 prev->next = next; 90 prev->next = next;
91 if (link_trbs) { 91 if (link_trbs) {
92 prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = next->dma; 92 prev->trbs[TRBS_PER_SEGMENT-1].link.
93 segment_ptr = cpu_to_le64(next->dma);
93 94
94 /* Set the last TRB in the segment to have a TRB type ID of Link TRB */ 95 /* Set the last TRB in the segment to have a TRB type ID of Link TRB */
95 val = prev->trbs[TRBS_PER_SEGMENT-1].link.control; 96 val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control);
96 val &= ~TRB_TYPE_BITMASK; 97 val &= ~TRB_TYPE_BITMASK;
97 val |= TRB_TYPE(TRB_LINK); 98 val |= TRB_TYPE(TRB_LINK);
98 /* Always set the chain bit with 0.95 hardware */ 99 /* Always set the chain bit with 0.95 hardware */
99 if (xhci_link_trb_quirk(xhci)) 100 if (xhci_link_trb_quirk(xhci))
100 val |= TRB_CHAIN; 101 val |= TRB_CHAIN;
101 prev->trbs[TRBS_PER_SEGMENT-1].link.control = val; 102 prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val);
102 } 103 }
103 xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n", 104 xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n",
104 (unsigned long long)prev->dma, 105 (unsigned long long)prev->dma,
@@ -186,7 +187,8 @@ static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
186 187
187 if (link_trbs) { 188 if (link_trbs) {
188 /* See section 4.9.2.1 and 6.4.4.1 */ 189 /* See section 4.9.2.1 and 6.4.4.1 */
189 prev->trbs[TRBS_PER_SEGMENT-1].link.control |= (LINK_TOGGLE); 190 prev->trbs[TRBS_PER_SEGMENT-1].link.
191 control |= cpu_to_le32(LINK_TOGGLE);
190 xhci_dbg(xhci, "Wrote link toggle flag to" 192 xhci_dbg(xhci, "Wrote link toggle flag to"
191 " segment %p (virtual), 0x%llx (DMA)\n", 193 " segment %p (virtual), 0x%llx (DMA)\n",
192 prev, (unsigned long long)prev->dma); 194 prev, (unsigned long long)prev->dma);
@@ -548,7 +550,8 @@ struct xhci_stream_info *xhci_alloc_stream_info(struct xhci_hcd *xhci,
548 addr = cur_ring->first_seg->dma | 550 addr = cur_ring->first_seg->dma |
549 SCT_FOR_CTX(SCT_PRI_TR) | 551 SCT_FOR_CTX(SCT_PRI_TR) |
550 cur_ring->cycle_state; 552 cur_ring->cycle_state;
551 stream_info->stream_ctx_array[cur_stream].stream_ring = addr; 553 stream_info->stream_ctx_array[cur_stream].
554 stream_ring = cpu_to_le64(addr);
552 xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n", 555 xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n",
553 cur_stream, (unsigned long long) addr); 556 cur_stream, (unsigned long long) addr);
554 557
@@ -614,10 +617,10 @@ void xhci_setup_streams_ep_input_ctx(struct xhci_hcd *xhci,
614 max_primary_streams = fls(stream_info->num_stream_ctxs) - 2; 617 max_primary_streams = fls(stream_info->num_stream_ctxs) - 2;
615 xhci_dbg(xhci, "Setting number of stream ctx array entries to %u\n", 618 xhci_dbg(xhci, "Setting number of stream ctx array entries to %u\n",
616 1 << (max_primary_streams + 1)); 619 1 << (max_primary_streams + 1));
617 ep_ctx->ep_info &= ~EP_MAXPSTREAMS_MASK; 620 ep_ctx->ep_info &= cpu_to_le32(~EP_MAXPSTREAMS_MASK);
618 ep_ctx->ep_info |= EP_MAXPSTREAMS(max_primary_streams); 621 ep_ctx->ep_info |= cpu_to_le32(EP_MAXPSTREAMS(max_primary_streams)
619 ep_ctx->ep_info |= EP_HAS_LSA; 622 | EP_HAS_LSA);
620 ep_ctx->deq = stream_info->ctx_array_dma; 623 ep_ctx->deq = cpu_to_le64(stream_info->ctx_array_dma);
621} 624}
622 625
623/* 626/*
@@ -630,10 +633,9 @@ void xhci_setup_no_streams_ep_input_ctx(struct xhci_hcd *xhci,
630 struct xhci_virt_ep *ep) 633 struct xhci_virt_ep *ep)
631{ 634{
632 dma_addr_t addr; 635 dma_addr_t addr;
633 ep_ctx->ep_info &= ~EP_MAXPSTREAMS_MASK; 636 ep_ctx->ep_info &= cpu_to_le32(~(EP_MAXPSTREAMS_MASK | EP_HAS_LSA));
634 ep_ctx->ep_info &= ~EP_HAS_LSA;
635 addr = xhci_trb_virt_to_dma(ep->ring->deq_seg, ep->ring->dequeue); 637 addr = xhci_trb_virt_to_dma(ep->ring->deq_seg, ep->ring->dequeue);
636 ep_ctx->deq = addr | ep->ring->cycle_state; 638 ep_ctx->deq = cpu_to_le64(addr | ep->ring->cycle_state);
637} 639}
638 640
639/* Frees all stream contexts associated with the endpoint, 641/* Frees all stream contexts associated with the endpoint,
@@ -781,11 +783,11 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
781 dev->udev = udev; 783 dev->udev = udev;
782 784
783 /* Point to output device context in dcbaa. */ 785 /* Point to output device context in dcbaa. */
784 xhci->dcbaa->dev_context_ptrs[slot_id] = dev->out_ctx->dma; 786 xhci->dcbaa->dev_context_ptrs[slot_id] = cpu_to_le64(dev->out_ctx->dma);
785 xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n", 787 xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n",
786 slot_id, 788 slot_id,
787 &xhci->dcbaa->dev_context_ptrs[slot_id], 789 &xhci->dcbaa->dev_context_ptrs[slot_id],
788 (unsigned long long) xhci->dcbaa->dev_context_ptrs[slot_id]); 790 (unsigned long long) le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id]));
789 791
790 return 1; 792 return 1;
791fail: 793fail:
@@ -810,8 +812,9 @@ void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci,
810 * configured device has reset, so all control transfers should have 812 * configured device has reset, so all control transfers should have
811 * been completed or cancelled before the reset. 813 * been completed or cancelled before the reset.
812 */ 814 */
813 ep0_ctx->deq = xhci_trb_virt_to_dma(ep_ring->enq_seg, ep_ring->enqueue); 815 ep0_ctx->deq = cpu_to_le64(xhci_trb_virt_to_dma(ep_ring->enq_seg,
814 ep0_ctx->deq |= ep_ring->cycle_state; 816 ep_ring->enqueue)
817 | ep_ring->cycle_state);
815} 818}
816 819
817/* 820/*
@@ -885,24 +888,22 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
885 slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx); 888 slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx);
886 889
887 /* 2) New slot context and endpoint 0 context are valid*/ 890 /* 2) New slot context and endpoint 0 context are valid*/
888 ctrl_ctx->add_flags = SLOT_FLAG | EP0_FLAG; 891 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
889 892
890 /* 3) Only the control endpoint is valid - one endpoint context */ 893 /* 3) Only the control endpoint is valid - one endpoint context */
891 slot_ctx->dev_info |= LAST_CTX(1); 894 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | (u32) udev->route);
892
893 slot_ctx->dev_info |= (u32) udev->route;
894 switch (udev->speed) { 895 switch (udev->speed) {
895 case USB_SPEED_SUPER: 896 case USB_SPEED_SUPER:
896 slot_ctx->dev_info |= (u32) SLOT_SPEED_SS; 897 slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_SS);
897 break; 898 break;
898 case USB_SPEED_HIGH: 899 case USB_SPEED_HIGH:
899 slot_ctx->dev_info |= (u32) SLOT_SPEED_HS; 900 slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_HS);
900 break; 901 break;
901 case USB_SPEED_FULL: 902 case USB_SPEED_FULL:
902 slot_ctx->dev_info |= (u32) SLOT_SPEED_FS; 903 slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_FS);
903 break; 904 break;
904 case USB_SPEED_LOW: 905 case USB_SPEED_LOW:
905 slot_ctx->dev_info |= (u32) SLOT_SPEED_LS; 906 slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_LS);
906 break; 907 break;
907 case USB_SPEED_WIRELESS: 908 case USB_SPEED_WIRELESS:
908 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); 909 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
@@ -916,7 +917,7 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
916 port_num = xhci_find_real_port_number(xhci, udev); 917 port_num = xhci_find_real_port_number(xhci, udev);
917 if (!port_num) 918 if (!port_num)
918 return -EINVAL; 919 return -EINVAL;
919 slot_ctx->dev_info2 |= (u32) ROOT_HUB_PORT(port_num); 920 slot_ctx->dev_info2 |= cpu_to_le32((u32) ROOT_HUB_PORT(port_num));
920 /* Set the port number in the virtual_device to the faked port number */ 921 /* Set the port number in the virtual_device to the faked port number */
921 for (top_dev = udev; top_dev->parent && top_dev->parent->parent; 922 for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
922 top_dev = top_dev->parent) 923 top_dev = top_dev->parent)
@@ -927,31 +928,31 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
927 928
928 /* Is this a LS/FS device under an external HS hub? */ 929 /* Is this a LS/FS device under an external HS hub? */
929 if (udev->tt && udev->tt->hub->parent) { 930 if (udev->tt && udev->tt->hub->parent) {
930 slot_ctx->tt_info = udev->tt->hub->slot_id; 931 slot_ctx->tt_info = cpu_to_le32(udev->tt->hub->slot_id |
931 slot_ctx->tt_info |= udev->ttport << 8; 932 (udev->ttport << 8));
932 if (udev->tt->multi) 933 if (udev->tt->multi)
933 slot_ctx->dev_info |= DEV_MTT; 934 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
934 } 935 }
935 xhci_dbg(xhci, "udev->tt = %p\n", udev->tt); 936 xhci_dbg(xhci, "udev->tt = %p\n", udev->tt);
936 xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport); 937 xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport);
937 938
938 /* Step 4 - ring already allocated */ 939 /* Step 4 - ring already allocated */
939 /* Step 5 */ 940 /* Step 5 */
940 ep0_ctx->ep_info2 = EP_TYPE(CTRL_EP); 941 ep0_ctx->ep_info2 = cpu_to_le32(EP_TYPE(CTRL_EP));
941 /* 942 /*
942 * XXX: Not sure about wireless USB devices. 943 * XXX: Not sure about wireless USB devices.
943 */ 944 */
944 switch (udev->speed) { 945 switch (udev->speed) {
945 case USB_SPEED_SUPER: 946 case USB_SPEED_SUPER:
946 ep0_ctx->ep_info2 |= MAX_PACKET(512); 947 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(512));
947 break; 948 break;
948 case USB_SPEED_HIGH: 949 case USB_SPEED_HIGH:
949 /* USB core guesses at a 64-byte max packet first for FS devices */ 950 /* USB core guesses at a 64-byte max packet first for FS devices */
950 case USB_SPEED_FULL: 951 case USB_SPEED_FULL:
951 ep0_ctx->ep_info2 |= MAX_PACKET(64); 952 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(64));
952 break; 953 break;
953 case USB_SPEED_LOW: 954 case USB_SPEED_LOW:
954 ep0_ctx->ep_info2 |= MAX_PACKET(8); 955 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(8));
955 break; 956 break;
956 case USB_SPEED_WIRELESS: 957 case USB_SPEED_WIRELESS:
957 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); 958 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
@@ -962,12 +963,10 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
962 BUG(); 963 BUG();
963 } 964 }
964 /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */ 965 /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
965 ep0_ctx->ep_info2 |= MAX_BURST(0); 966 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3));
966 ep0_ctx->ep_info2 |= ERROR_COUNT(3);
967 967
968 ep0_ctx->deq = 968 ep0_ctx->deq = cpu_to_le64(dev->eps[0].ring->first_seg->dma |
969 dev->eps[0].ring->first_seg->dma; 969 dev->eps[0].ring->cycle_state);
970 ep0_ctx->deq |= dev->eps[0].ring->cycle_state;
971 970
972 /* Steps 7 and 8 were done in xhci_alloc_virt_device() */ 971 /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
973 972
@@ -1131,10 +1130,10 @@ static u32 xhci_get_max_esit_payload(struct xhci_hcd *xhci,
1131 return 0; 1130 return 0;
1132 1131
1133 if (udev->speed == USB_SPEED_SUPER) 1132 if (udev->speed == USB_SPEED_SUPER)
1134 return ep->ss_ep_comp.wBytesPerInterval; 1133 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
1135 1134
1136 max_packet = GET_MAX_PACKET(ep->desc.wMaxPacketSize); 1135 max_packet = GET_MAX_PACKET(le16_to_cpu(ep->desc.wMaxPacketSize));
1137 max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11; 1136 max_burst = (le16_to_cpu(ep->desc.wMaxPacketSize) & 0x1800) >> 11;
1138 /* A 0 in max burst means 1 transfer per ESIT */ 1137 /* A 0 in max burst means 1 transfer per ESIT */
1139 return max_packet * (max_burst + 1); 1138 return max_packet * (max_burst + 1);
1140} 1139}
@@ -1183,10 +1182,10 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1183 } 1182 }
1184 virt_dev->eps[ep_index].skip = false; 1183 virt_dev->eps[ep_index].skip = false;
1185 ep_ring = virt_dev->eps[ep_index].new_ring; 1184 ep_ring = virt_dev->eps[ep_index].new_ring;
1186 ep_ctx->deq = ep_ring->first_seg->dma | ep_ring->cycle_state; 1185 ep_ctx->deq = cpu_to_le64(ep_ring->first_seg->dma | ep_ring->cycle_state);
1187 1186
1188 ep_ctx->ep_info = xhci_get_endpoint_interval(udev, ep); 1187 ep_ctx->ep_info = cpu_to_le32(xhci_get_endpoint_interval(udev, ep)
1189 ep_ctx->ep_info |= EP_MULT(xhci_get_endpoint_mult(udev, ep)); 1188 | EP_MULT(xhci_get_endpoint_mult(udev, ep)));
1190 1189
1191 /* FIXME dig Mult and streams info out of ep companion desc */ 1190 /* FIXME dig Mult and streams info out of ep companion desc */
1192 1191
@@ -1194,22 +1193,22 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1194 * error count = 0 means infinite retries. 1193 * error count = 0 means infinite retries.
1195 */ 1194 */
1196 if (!usb_endpoint_xfer_isoc(&ep->desc)) 1195 if (!usb_endpoint_xfer_isoc(&ep->desc))
1197 ep_ctx->ep_info2 = ERROR_COUNT(3); 1196 ep_ctx->ep_info2 = cpu_to_le32(ERROR_COUNT(3));
1198 else 1197 else
1199 ep_ctx->ep_info2 = ERROR_COUNT(1); 1198 ep_ctx->ep_info2 = cpu_to_le32(ERROR_COUNT(1));
1200 1199
1201 ep_ctx->ep_info2 |= xhci_get_endpoint_type(udev, ep); 1200 ep_ctx->ep_info2 |= cpu_to_le32(xhci_get_endpoint_type(udev, ep));
1202 1201
1203 /* Set the max packet size and max burst */ 1202 /* Set the max packet size and max burst */
1204 switch (udev->speed) { 1203 switch (udev->speed) {
1205 case USB_SPEED_SUPER: 1204 case USB_SPEED_SUPER:
1206 max_packet = ep->desc.wMaxPacketSize; 1205 max_packet = le16_to_cpu(ep->desc.wMaxPacketSize);
1207 ep_ctx->ep_info2 |= MAX_PACKET(max_packet); 1206 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet));
1208 /* dig out max burst from ep companion desc */ 1207 /* dig out max burst from ep companion desc */
1209 max_packet = ep->ss_ep_comp.bMaxBurst; 1208 max_packet = ep->ss_ep_comp.bMaxBurst;
1210 if (!max_packet) 1209 if (!max_packet)
1211 xhci_warn(xhci, "WARN no SS endpoint bMaxBurst\n"); 1210 xhci_warn(xhci, "WARN no SS endpoint bMaxBurst\n");
1212 ep_ctx->ep_info2 |= MAX_BURST(max_packet); 1211 ep_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(max_packet));
1213 break; 1212 break;
1214 case USB_SPEED_HIGH: 1213 case USB_SPEED_HIGH:
1215 /* bits 11:12 specify the number of additional transaction 1214 /* bits 11:12 specify the number of additional transaction
@@ -1217,20 +1216,21 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1217 */ 1216 */
1218 if (usb_endpoint_xfer_isoc(&ep->desc) || 1217 if (usb_endpoint_xfer_isoc(&ep->desc) ||
1219 usb_endpoint_xfer_int(&ep->desc)) { 1218 usb_endpoint_xfer_int(&ep->desc)) {
1220 max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11; 1219 max_burst = (le16_to_cpu(ep->desc.wMaxPacketSize)
1221 ep_ctx->ep_info2 |= MAX_BURST(max_burst); 1220 & 0x1800) >> 11;
1221 ep_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(max_burst));
1222 } 1222 }
1223 /* Fall through */ 1223 /* Fall through */
1224 case USB_SPEED_FULL: 1224 case USB_SPEED_FULL:
1225 case USB_SPEED_LOW: 1225 case USB_SPEED_LOW:
1226 max_packet = GET_MAX_PACKET(ep->desc.wMaxPacketSize); 1226 max_packet = GET_MAX_PACKET(le16_to_cpu(ep->desc.wMaxPacketSize));
1227 ep_ctx->ep_info2 |= MAX_PACKET(max_packet); 1227 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet));
1228 break; 1228 break;
1229 default: 1229 default:
1230 BUG(); 1230 BUG();
1231 } 1231 }
1232 max_esit_payload = xhci_get_max_esit_payload(xhci, udev, ep); 1232 max_esit_payload = xhci_get_max_esit_payload(xhci, udev, ep);
1233 ep_ctx->tx_info = MAX_ESIT_PAYLOAD_FOR_EP(max_esit_payload); 1233 ep_ctx->tx_info = cpu_to_le32(MAX_ESIT_PAYLOAD_FOR_EP(max_esit_payload));
1234 1234
1235 /* 1235 /*
1236 * XXX no idea how to calculate the average TRB buffer length for bulk 1236 * XXX no idea how to calculate the average TRB buffer length for bulk
@@ -1247,7 +1247,7 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1247 * use Event Data TRBs, and we don't chain in a link TRB on short 1247 * use Event Data TRBs, and we don't chain in a link TRB on short
1248 * transfers, we're basically dividing by 1. 1248 * transfers, we're basically dividing by 1.
1249 */ 1249 */
1250 ep_ctx->tx_info |= AVG_TRB_LENGTH_FOR_EP(max_esit_payload); 1250 ep_ctx->tx_info |= cpu_to_le32(AVG_TRB_LENGTH_FOR_EP(max_esit_payload));
1251 1251
1252 /* FIXME Debug endpoint context */ 1252 /* FIXME Debug endpoint context */
1253 return 0; 1253 return 0;
@@ -1347,7 +1347,7 @@ static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags)
1347 if (!xhci->scratchpad->sp_dma_buffers) 1347 if (!xhci->scratchpad->sp_dma_buffers)
1348 goto fail_sp4; 1348 goto fail_sp4;
1349 1349
1350 xhci->dcbaa->dev_context_ptrs[0] = xhci->scratchpad->sp_dma; 1350 xhci->dcbaa->dev_context_ptrs[0] = cpu_to_le64(xhci->scratchpad->sp_dma);
1351 for (i = 0; i < num_sp; i++) { 1351 for (i = 0; i < num_sp; i++) {
1352 dma_addr_t dma; 1352 dma_addr_t dma;
1353 void *buf = pci_alloc_consistent(to_pci_dev(dev), 1353 void *buf = pci_alloc_consistent(to_pci_dev(dev),
@@ -1724,7 +1724,7 @@ static void xhci_set_hc_event_deq(struct xhci_hcd *xhci)
1724} 1724}
1725 1725
1726static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports, 1726static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
1727 u32 __iomem *addr, u8 major_revision) 1727 __le32 __iomem *addr, u8 major_revision)
1728{ 1728{
1729 u32 temp, port_offset, port_count; 1729 u32 temp, port_offset, port_count;
1730 int i; 1730 int i;
@@ -1789,7 +1789,7 @@ static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
1789 */ 1789 */
1790static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags) 1790static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
1791{ 1791{
1792 u32 __iomem *addr; 1792 __le32 __iomem *addr;
1793 u32 offset; 1793 u32 offset;
1794 unsigned int num_ports; 1794 unsigned int num_ports;
1795 int i, port_index; 1795 int i, port_index;
@@ -2042,8 +2042,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2042 /* set ring base address and size for each segment table entry */ 2042 /* set ring base address and size for each segment table entry */
2043 for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) { 2043 for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) {
2044 struct xhci_erst_entry *entry = &xhci->erst.entries[val]; 2044 struct xhci_erst_entry *entry = &xhci->erst.entries[val];
2045 entry->seg_addr = seg->dma; 2045 entry->seg_addr = cpu_to_le64(seg->dma);
2046 entry->seg_size = TRBS_PER_SEGMENT; 2046 entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT);
2047 entry->rsvd = 0; 2047 entry->rsvd = 0;
2048 seg = seg->next; 2048 seg = seg->next;
2049 } 2049 }
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index a10494c2f3c7..cbc4d491e626 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -21,6 +21,7 @@
21 */ 21 */
22 22
23#include <linux/pci.h> 23#include <linux/pci.h>
24#include <linux/slab.h>
24 25
25#include "xhci.h" 26#include "xhci.h"
26 27
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 7437386a9a50..396f8d2a2e8d 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -100,7 +100,7 @@ static bool last_trb_on_last_seg(struct xhci_hcd *xhci, struct xhci_ring *ring,
100 return (trb == &seg->trbs[TRBS_PER_SEGMENT]) && 100 return (trb == &seg->trbs[TRBS_PER_SEGMENT]) &&
101 (seg->next == xhci->event_ring->first_seg); 101 (seg->next == xhci->event_ring->first_seg);
102 else 102 else
103 return trb->link.control & LINK_TOGGLE; 103 return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
104} 104}
105 105
106/* Is this TRB a link TRB or was the last TRB the last TRB in this event ring 106/* Is this TRB a link TRB or was the last TRB the last TRB in this event ring
@@ -113,13 +113,15 @@ static int last_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
113 if (ring == xhci->event_ring) 113 if (ring == xhci->event_ring)
114 return trb == &seg->trbs[TRBS_PER_SEGMENT]; 114 return trb == &seg->trbs[TRBS_PER_SEGMENT];
115 else 115 else
116 return (trb->link.control & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK); 116 return (le32_to_cpu(trb->link.control) & TRB_TYPE_BITMASK)
117 == TRB_TYPE(TRB_LINK);
117} 118}
118 119
119static int enqueue_is_link_trb(struct xhci_ring *ring) 120static int enqueue_is_link_trb(struct xhci_ring *ring)
120{ 121{
121 struct xhci_link_trb *link = &ring->enqueue->link; 122 struct xhci_link_trb *link = &ring->enqueue->link;
122 return ((link->control & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK)); 123 return ((le32_to_cpu(link->control) & TRB_TYPE_BITMASK) ==
124 TRB_TYPE(TRB_LINK));
123} 125}
124 126
125/* Updates trb to point to the next TRB in the ring, and updates seg if the next 127/* Updates trb to point to the next TRB in the ring, and updates seg if the next
@@ -197,7 +199,7 @@ static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
197 union xhci_trb *next; 199 union xhci_trb *next;
198 unsigned long long addr; 200 unsigned long long addr;
199 201
200 chain = ring->enqueue->generic.field[3] & TRB_CHAIN; 202 chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
201 next = ++(ring->enqueue); 203 next = ++(ring->enqueue);
202 204
203 ring->enq_updates++; 205 ring->enq_updates++;
@@ -223,12 +225,14 @@ static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
223 * (which may mean the chain bit is cleared). 225 * (which may mean the chain bit is cleared).
224 */ 226 */
225 if (!xhci_link_trb_quirk(xhci)) { 227 if (!xhci_link_trb_quirk(xhci)) {
226 next->link.control &= ~TRB_CHAIN; 228 next->link.control &=
227 next->link.control |= chain; 229 cpu_to_le32(~TRB_CHAIN);
230 next->link.control |=
231 cpu_to_le32(chain);
228 } 232 }
229 /* Give this link TRB to the hardware */ 233 /* Give this link TRB to the hardware */
230 wmb(); 234 wmb();
231 next->link.control ^= TRB_CYCLE; 235 next->link.control ^= cpu_to_le32(TRB_CYCLE);
232 } 236 }
233 /* Toggle the cycle bit after the last ring segment. */ 237 /* Toggle the cycle bit after the last ring segment. */
234 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) { 238 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
@@ -319,7 +323,7 @@ void xhci_ring_ep_doorbell(struct xhci_hcd *xhci,
319 unsigned int ep_index, 323 unsigned int ep_index,
320 unsigned int stream_id) 324 unsigned int stream_id)
321{ 325{
322 __u32 __iomem *db_addr = &xhci->dba->doorbell[slot_id]; 326 __le32 __iomem *db_addr = &xhci->dba->doorbell[slot_id];
323 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index]; 327 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
324 unsigned int ep_state = ep->ep_state; 328 unsigned int ep_state = ep->ep_state;
325 329
@@ -380,7 +384,7 @@ static struct xhci_segment *find_trb_seg(
380 while (cur_seg->trbs > trb || 384 while (cur_seg->trbs > trb ||
381 &cur_seg->trbs[TRBS_PER_SEGMENT - 1] < trb) { 385 &cur_seg->trbs[TRBS_PER_SEGMENT - 1] < trb) {
382 generic_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1].generic; 386 generic_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1].generic;
383 if (generic_trb->field[3] & LINK_TOGGLE) 387 if (le32_to_cpu(generic_trb->field[3]) & LINK_TOGGLE)
384 *cycle_state ^= 0x1; 388 *cycle_state ^= 0x1;
385 cur_seg = cur_seg->next; 389 cur_seg = cur_seg->next;
386 if (cur_seg == start_seg) 390 if (cur_seg == start_seg)
@@ -447,6 +451,10 @@ static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
447 * any link TRBs with the toggle cycle bit set. 451 * any link TRBs with the toggle cycle bit set.
448 * - Finally we move the dequeue state one TRB further, toggling the cycle bit 452 * - Finally we move the dequeue state one TRB further, toggling the cycle bit
449 * if we've moved it past a link TRB with the toggle cycle bit set. 453 * if we've moved it past a link TRB with the toggle cycle bit set.
454 *
455 * Some of the uses of xhci_generic_trb are grotty, but if they're done
456 * with correct __le32 accesses they should work fine. Only users of this are
457 * in here.
450 */ 458 */
451void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, 459void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
452 unsigned int slot_id, unsigned int ep_index, 460 unsigned int slot_id, unsigned int ep_index,
@@ -480,7 +488,7 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
480 /* Dig out the cycle state saved by the xHC during the stop ep cmd */ 488 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
481 xhci_dbg(xhci, "Finding endpoint context\n"); 489 xhci_dbg(xhci, "Finding endpoint context\n");
482 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index); 490 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
483 state->new_cycle_state = 0x1 & ep_ctx->deq; 491 state->new_cycle_state = 0x1 & le64_to_cpu(ep_ctx->deq);
484 492
485 state->new_deq_ptr = cur_td->last_trb; 493 state->new_deq_ptr = cur_td->last_trb;
486 xhci_dbg(xhci, "Finding segment containing last TRB in TD.\n"); 494 xhci_dbg(xhci, "Finding segment containing last TRB in TD.\n");
@@ -493,8 +501,8 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
493 } 501 }
494 502
495 trb = &state->new_deq_ptr->generic; 503 trb = &state->new_deq_ptr->generic;
496 if ((trb->field[3] & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK) && 504 if ((le32_to_cpu(trb->field[3]) & TRB_TYPE_BITMASK) ==
497 (trb->field[3] & LINK_TOGGLE)) 505 TRB_TYPE(TRB_LINK) && (le32_to_cpu(trb->field[3]) & LINK_TOGGLE))
498 state->new_cycle_state ^= 0x1; 506 state->new_cycle_state ^= 0x1;
499 next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr); 507 next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr);
500 508
@@ -529,12 +537,12 @@ static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
529 for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb; 537 for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb;
530 true; 538 true;
531 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { 539 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
532 if ((cur_trb->generic.field[3] & TRB_TYPE_BITMASK) == 540 if ((le32_to_cpu(cur_trb->generic.field[3]) & TRB_TYPE_BITMASK)
533 TRB_TYPE(TRB_LINK)) { 541 == TRB_TYPE(TRB_LINK)) {
534 /* Unchain any chained Link TRBs, but 542 /* Unchain any chained Link TRBs, but
535 * leave the pointers intact. 543 * leave the pointers intact.
536 */ 544 */
537 cur_trb->generic.field[3] &= ~TRB_CHAIN; 545 cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN);
538 xhci_dbg(xhci, "Cancel (unchain) link TRB\n"); 546 xhci_dbg(xhci, "Cancel (unchain) link TRB\n");
539 xhci_dbg(xhci, "Address = %p (0x%llx dma); " 547 xhci_dbg(xhci, "Address = %p (0x%llx dma); "
540 "in seg %p (0x%llx dma)\n", 548 "in seg %p (0x%llx dma)\n",
@@ -547,8 +555,9 @@ static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
547 cur_trb->generic.field[1] = 0; 555 cur_trb->generic.field[1] = 0;
548 cur_trb->generic.field[2] = 0; 556 cur_trb->generic.field[2] = 0;
549 /* Preserve only the cycle bit of this TRB */ 557 /* Preserve only the cycle bit of this TRB */
550 cur_trb->generic.field[3] &= TRB_CYCLE; 558 cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
551 cur_trb->generic.field[3] |= TRB_TYPE(TRB_TR_NOOP); 559 cur_trb->generic.field[3] |= cpu_to_le32(
560 TRB_TYPE(TRB_TR_NOOP));
552 xhci_dbg(xhci, "Cancel TRB %p (0x%llx dma) " 561 xhci_dbg(xhci, "Cancel TRB %p (0x%llx dma) "
553 "in seg %p (0x%llx dma)\n", 562 "in seg %p (0x%llx dma)\n",
554 cur_trb, 563 cur_trb,
@@ -662,9 +671,9 @@ static void handle_stopped_endpoint(struct xhci_hcd *xhci,
662 struct xhci_dequeue_state deq_state; 671 struct xhci_dequeue_state deq_state;
663 672
664 if (unlikely(TRB_TO_SUSPEND_PORT( 673 if (unlikely(TRB_TO_SUSPEND_PORT(
665 xhci->cmd_ring->dequeue->generic.field[3]))) { 674 le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3])))) {
666 slot_id = TRB_TO_SLOT_ID( 675 slot_id = TRB_TO_SLOT_ID(
667 xhci->cmd_ring->dequeue->generic.field[3]); 676 le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3]));
668 virt_dev = xhci->devs[slot_id]; 677 virt_dev = xhci->devs[slot_id];
669 if (virt_dev) 678 if (virt_dev)
670 handle_cmd_in_cmd_wait_list(xhci, virt_dev, 679 handle_cmd_in_cmd_wait_list(xhci, virt_dev,
@@ -677,8 +686,8 @@ static void handle_stopped_endpoint(struct xhci_hcd *xhci,
677 } 686 }
678 687
679 memset(&deq_state, 0, sizeof(deq_state)); 688 memset(&deq_state, 0, sizeof(deq_state));
680 slot_id = TRB_TO_SLOT_ID(trb->generic.field[3]); 689 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
681 ep_index = TRB_TO_EP_INDEX(trb->generic.field[3]); 690 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
682 ep = &xhci->devs[slot_id]->eps[ep_index]; 691 ep = &xhci->devs[slot_id]->eps[ep_index];
683 692
684 if (list_empty(&ep->cancelled_td_list)) { 693 if (list_empty(&ep->cancelled_td_list)) {
@@ -910,9 +919,9 @@ static void handle_set_deq_completion(struct xhci_hcd *xhci,
910 struct xhci_ep_ctx *ep_ctx; 919 struct xhci_ep_ctx *ep_ctx;
911 struct xhci_slot_ctx *slot_ctx; 920 struct xhci_slot_ctx *slot_ctx;
912 921
913 slot_id = TRB_TO_SLOT_ID(trb->generic.field[3]); 922 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
914 ep_index = TRB_TO_EP_INDEX(trb->generic.field[3]); 923 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
915 stream_id = TRB_TO_STREAM_ID(trb->generic.field[2]); 924 stream_id = TRB_TO_STREAM_ID(le32_to_cpu(trb->generic.field[2]));
916 dev = xhci->devs[slot_id]; 925 dev = xhci->devs[slot_id];
917 926
918 ep_ring = xhci_stream_id_to_ring(dev, ep_index, stream_id); 927 ep_ring = xhci_stream_id_to_ring(dev, ep_index, stream_id);
@@ -928,11 +937,11 @@ static void handle_set_deq_completion(struct xhci_hcd *xhci,
928 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index); 937 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
929 slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx); 938 slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
930 939
931 if (GET_COMP_CODE(event->status) != COMP_SUCCESS) { 940 if (GET_COMP_CODE(le32_to_cpu(event->status)) != COMP_SUCCESS) {
932 unsigned int ep_state; 941 unsigned int ep_state;
933 unsigned int slot_state; 942 unsigned int slot_state;
934 943
935 switch (GET_COMP_CODE(event->status)) { 944 switch (GET_COMP_CODE(le32_to_cpu(event->status))) {
936 case COMP_TRB_ERR: 945 case COMP_TRB_ERR:
937 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because " 946 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because "
938 "of stream ID configuration\n"); 947 "of stream ID configuration\n");
@@ -940,9 +949,9 @@ static void handle_set_deq_completion(struct xhci_hcd *xhci,
940 case COMP_CTX_STATE: 949 case COMP_CTX_STATE:
941 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due " 950 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due "
942 "to incorrect slot or ep state.\n"); 951 "to incorrect slot or ep state.\n");
943 ep_state = ep_ctx->ep_info; 952 ep_state = le32_to_cpu(ep_ctx->ep_info);
944 ep_state &= EP_STATE_MASK; 953 ep_state &= EP_STATE_MASK;
945 slot_state = slot_ctx->dev_state; 954 slot_state = le32_to_cpu(slot_ctx->dev_state);
946 slot_state = GET_SLOT_STATE(slot_state); 955 slot_state = GET_SLOT_STATE(slot_state);
947 xhci_dbg(xhci, "Slot state = %u, EP state = %u\n", 956 xhci_dbg(xhci, "Slot state = %u, EP state = %u\n",
948 slot_state, ep_state); 957 slot_state, ep_state);
@@ -954,7 +963,7 @@ static void handle_set_deq_completion(struct xhci_hcd *xhci,
954 default: 963 default:
955 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd with unknown " 964 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd with unknown "
956 "completion code of %u.\n", 965 "completion code of %u.\n",
957 GET_COMP_CODE(event->status)); 966 GET_COMP_CODE(le32_to_cpu(event->status)));
958 break; 967 break;
959 } 968 }
960 /* OK what do we do now? The endpoint state is hosed, and we 969 /* OK what do we do now? The endpoint state is hosed, and we
@@ -965,10 +974,10 @@ static void handle_set_deq_completion(struct xhci_hcd *xhci,
965 */ 974 */
966 } else { 975 } else {
967 xhci_dbg(xhci, "Successful Set TR Deq Ptr cmd, deq = @%08llx\n", 976 xhci_dbg(xhci, "Successful Set TR Deq Ptr cmd, deq = @%08llx\n",
968 ep_ctx->deq); 977 le64_to_cpu(ep_ctx->deq));
969 if (xhci_trb_virt_to_dma(dev->eps[ep_index].queued_deq_seg, 978 if (xhci_trb_virt_to_dma(dev->eps[ep_index].queued_deq_seg,
970 dev->eps[ep_index].queued_deq_ptr) == 979 dev->eps[ep_index].queued_deq_ptr) ==
971 (ep_ctx->deq & ~(EP_CTX_CYCLE_MASK))) { 980 (le64_to_cpu(ep_ctx->deq) & ~(EP_CTX_CYCLE_MASK))) {
972 /* Update the ring's dequeue segment and dequeue pointer 981 /* Update the ring's dequeue segment and dequeue pointer
973 * to reflect the new position. 982 * to reflect the new position.
974 */ 983 */
@@ -997,13 +1006,13 @@ static void handle_reset_ep_completion(struct xhci_hcd *xhci,
997 int slot_id; 1006 int slot_id;
998 unsigned int ep_index; 1007 unsigned int ep_index;
999 1008
1000 slot_id = TRB_TO_SLOT_ID(trb->generic.field[3]); 1009 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
1001 ep_index = TRB_TO_EP_INDEX(trb->generic.field[3]); 1010 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1002 /* This command will only fail if the endpoint wasn't halted, 1011 /* This command will only fail if the endpoint wasn't halted,
1003 * but we don't care. 1012 * but we don't care.
1004 */ 1013 */
1005 xhci_dbg(xhci, "Ignoring reset ep completion code of %u\n", 1014 xhci_dbg(xhci, "Ignoring reset ep completion code of %u\n",
1006 (unsigned int) GET_COMP_CODE(event->status)); 1015 (unsigned int) GET_COMP_CODE(le32_to_cpu(event->status)));
1007 1016
1008 /* HW with the reset endpoint quirk needs to have a configure endpoint 1017 /* HW with the reset endpoint quirk needs to have a configure endpoint
1009 * command complete before the endpoint can be used. Queue that here 1018 * command complete before the endpoint can be used. Queue that here
@@ -1040,8 +1049,7 @@ static int handle_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
1040 if (xhci->cmd_ring->dequeue != command->command_trb) 1049 if (xhci->cmd_ring->dequeue != command->command_trb)
1041 return 0; 1050 return 0;
1042 1051
1043 command->status = 1052 command->status = GET_COMP_CODE(le32_to_cpu(event->status));
1044 GET_COMP_CODE(event->status);
1045 list_del(&command->cmd_list); 1053 list_del(&command->cmd_list);
1046 if (command->completion) 1054 if (command->completion)
1047 complete(command->completion); 1055 complete(command->completion);
@@ -1053,7 +1061,7 @@ static int handle_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
1053static void handle_cmd_completion(struct xhci_hcd *xhci, 1061static void handle_cmd_completion(struct xhci_hcd *xhci,
1054 struct xhci_event_cmd *event) 1062 struct xhci_event_cmd *event)
1055{ 1063{
1056 int slot_id = TRB_TO_SLOT_ID(event->flags); 1064 int slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1057 u64 cmd_dma; 1065 u64 cmd_dma;
1058 dma_addr_t cmd_dequeue_dma; 1066 dma_addr_t cmd_dequeue_dma;
1059 struct xhci_input_control_ctx *ctrl_ctx; 1067 struct xhci_input_control_ctx *ctrl_ctx;
@@ -1062,7 +1070,7 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1062 struct xhci_ring *ep_ring; 1070 struct xhci_ring *ep_ring;
1063 unsigned int ep_state; 1071 unsigned int ep_state;
1064 1072
1065 cmd_dma = event->cmd_trb; 1073 cmd_dma = le64_to_cpu(event->cmd_trb);
1066 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, 1074 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1067 xhci->cmd_ring->dequeue); 1075 xhci->cmd_ring->dequeue);
1068 /* Is the command ring deq ptr out of sync with the deq seg ptr? */ 1076 /* Is the command ring deq ptr out of sync with the deq seg ptr? */
@@ -1075,9 +1083,10 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1075 xhci->error_bitmask |= 1 << 5; 1083 xhci->error_bitmask |= 1 << 5;
1076 return; 1084 return;
1077 } 1085 }
1078 switch (xhci->cmd_ring->dequeue->generic.field[3] & TRB_TYPE_BITMASK) { 1086 switch (le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3])
1087 & TRB_TYPE_BITMASK) {
1079 case TRB_TYPE(TRB_ENABLE_SLOT): 1088 case TRB_TYPE(TRB_ENABLE_SLOT):
1080 if (GET_COMP_CODE(event->status) == COMP_SUCCESS) 1089 if (GET_COMP_CODE(le32_to_cpu(event->status)) == COMP_SUCCESS)
1081 xhci->slot_id = slot_id; 1090 xhci->slot_id = slot_id;
1082 else 1091 else
1083 xhci->slot_id = 0; 1092 xhci->slot_id = 0;
@@ -1102,7 +1111,7 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1102 ctrl_ctx = xhci_get_input_control_ctx(xhci, 1111 ctrl_ctx = xhci_get_input_control_ctx(xhci,
1103 virt_dev->in_ctx); 1112 virt_dev->in_ctx);
1104 /* Input ctx add_flags are the endpoint index plus one */ 1113 /* Input ctx add_flags are the endpoint index plus one */
1105 ep_index = xhci_last_valid_endpoint(ctrl_ctx->add_flags) - 1; 1114 ep_index = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags)) - 1;
1106 /* A usb_set_interface() call directly after clearing a halted 1115 /* A usb_set_interface() call directly after clearing a halted
1107 * condition may race on this quirky hardware. Not worth 1116 * condition may race on this quirky hardware. Not worth
1108 * worrying about, since this is prototype hardware. Not sure 1117 * worrying about, since this is prototype hardware. Not sure
@@ -1111,8 +1120,8 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1111 */ 1120 */
1112 if (xhci->quirks & XHCI_RESET_EP_QUIRK && 1121 if (xhci->quirks & XHCI_RESET_EP_QUIRK &&
1113 ep_index != (unsigned int) -1 && 1122 ep_index != (unsigned int) -1 &&
1114 ctrl_ctx->add_flags - SLOT_FLAG == 1123 le32_to_cpu(ctrl_ctx->add_flags) - SLOT_FLAG ==
1115 ctrl_ctx->drop_flags) { 1124 le32_to_cpu(ctrl_ctx->drop_flags)) {
1116 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring; 1125 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
1117 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; 1126 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1118 if (!(ep_state & EP_HALTED)) 1127 if (!(ep_state & EP_HALTED))
@@ -1129,18 +1138,18 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1129bandwidth_change: 1138bandwidth_change:
1130 xhci_dbg(xhci, "Completed config ep cmd\n"); 1139 xhci_dbg(xhci, "Completed config ep cmd\n");
1131 xhci->devs[slot_id]->cmd_status = 1140 xhci->devs[slot_id]->cmd_status =
1132 GET_COMP_CODE(event->status); 1141 GET_COMP_CODE(le32_to_cpu(event->status));
1133 complete(&xhci->devs[slot_id]->cmd_completion); 1142 complete(&xhci->devs[slot_id]->cmd_completion);
1134 break; 1143 break;
1135 case TRB_TYPE(TRB_EVAL_CONTEXT): 1144 case TRB_TYPE(TRB_EVAL_CONTEXT):
1136 virt_dev = xhci->devs[slot_id]; 1145 virt_dev = xhci->devs[slot_id];
1137 if (handle_cmd_in_cmd_wait_list(xhci, virt_dev, event)) 1146 if (handle_cmd_in_cmd_wait_list(xhci, virt_dev, event))
1138 break; 1147 break;
1139 xhci->devs[slot_id]->cmd_status = GET_COMP_CODE(event->status); 1148 xhci->devs[slot_id]->cmd_status = GET_COMP_CODE(le32_to_cpu(event->status));
1140 complete(&xhci->devs[slot_id]->cmd_completion); 1149 complete(&xhci->devs[slot_id]->cmd_completion);
1141 break; 1150 break;
1142 case TRB_TYPE(TRB_ADDR_DEV): 1151 case TRB_TYPE(TRB_ADDR_DEV):
1143 xhci->devs[slot_id]->cmd_status = GET_COMP_CODE(event->status); 1152 xhci->devs[slot_id]->cmd_status = GET_COMP_CODE(le32_to_cpu(event->status));
1144 complete(&xhci->addr_dev); 1153 complete(&xhci->addr_dev);
1145 break; 1154 break;
1146 case TRB_TYPE(TRB_STOP_RING): 1155 case TRB_TYPE(TRB_STOP_RING):
@@ -1157,7 +1166,7 @@ bandwidth_change:
1157 case TRB_TYPE(TRB_RESET_DEV): 1166 case TRB_TYPE(TRB_RESET_DEV):
1158 xhci_dbg(xhci, "Completed reset device command.\n"); 1167 xhci_dbg(xhci, "Completed reset device command.\n");
1159 slot_id = TRB_TO_SLOT_ID( 1168 slot_id = TRB_TO_SLOT_ID(
1160 xhci->cmd_ring->dequeue->generic.field[3]); 1169 le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3]));
1161 virt_dev = xhci->devs[slot_id]; 1170 virt_dev = xhci->devs[slot_id];
1162 if (virt_dev) 1171 if (virt_dev)
1163 handle_cmd_in_cmd_wait_list(xhci, virt_dev, event); 1172 handle_cmd_in_cmd_wait_list(xhci, virt_dev, event);
@@ -1171,8 +1180,8 @@ bandwidth_change:
1171 break; 1180 break;
1172 } 1181 }
1173 xhci_dbg(xhci, "NEC firmware version %2x.%02x\n", 1182 xhci_dbg(xhci, "NEC firmware version %2x.%02x\n",
1174 NEC_FW_MAJOR(event->status), 1183 NEC_FW_MAJOR(le32_to_cpu(event->status)),
1175 NEC_FW_MINOR(event->status)); 1184 NEC_FW_MINOR(le32_to_cpu(event->status)));
1176 break; 1185 break;
1177 default: 1186 default:
1178 /* Skip over unknown commands on the event ring */ 1187 /* Skip over unknown commands on the event ring */
@@ -1187,7 +1196,7 @@ static void handle_vendor_event(struct xhci_hcd *xhci,
1187{ 1196{
1188 u32 trb_type; 1197 u32 trb_type;
1189 1198
1190 trb_type = TRB_FIELD_TO_TYPE(event->generic.field[3]); 1199 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->generic.field[3]));
1191 xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type); 1200 xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
1192 if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST)) 1201 if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
1193 handle_cmd_completion(xhci, &event->event_cmd); 1202 handle_cmd_completion(xhci, &event->event_cmd);
@@ -1241,15 +1250,15 @@ static void handle_port_status(struct xhci_hcd *xhci,
1241 unsigned int faked_port_index; 1250 unsigned int faked_port_index;
1242 u8 major_revision; 1251 u8 major_revision;
1243 struct xhci_bus_state *bus_state; 1252 struct xhci_bus_state *bus_state;
1244 u32 __iomem **port_array; 1253 __le32 __iomem **port_array;
1245 bool bogus_port_status = false; 1254 bool bogus_port_status = false;
1246 1255
1247 /* Port status change events always have a successful completion code */ 1256 /* Port status change events always have a successful completion code */
1248 if (GET_COMP_CODE(event->generic.field[2]) != COMP_SUCCESS) { 1257 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS) {
1249 xhci_warn(xhci, "WARN: xHC returned failed port status event\n"); 1258 xhci_warn(xhci, "WARN: xHC returned failed port status event\n");
1250 xhci->error_bitmask |= 1 << 8; 1259 xhci->error_bitmask |= 1 << 8;
1251 } 1260 }
1252 port_id = GET_PORT_ID(event->generic.field[0]); 1261 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
1253 xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id); 1262 xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
1254 1263
1255 max_ports = HCS_MAX_PORTS(xhci->hcs_params1); 1264 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
@@ -1456,7 +1465,7 @@ static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
1456 * endpoint anyway. Check if a babble halted the 1465 * endpoint anyway. Check if a babble halted the
1457 * endpoint. 1466 * endpoint.
1458 */ 1467 */
1459 if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_HALTED) 1468 if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) == EP_STATE_HALTED)
1460 return 1; 1469 return 1;
1461 1470
1462 return 0; 1471 return 0;
@@ -1494,12 +1503,12 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1494 struct urb_priv *urb_priv; 1503 struct urb_priv *urb_priv;
1495 u32 trb_comp_code; 1504 u32 trb_comp_code;
1496 1505
1497 slot_id = TRB_TO_SLOT_ID(event->flags); 1506 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1498 xdev = xhci->devs[slot_id]; 1507 xdev = xhci->devs[slot_id];
1499 ep_index = TRB_TO_EP_ID(event->flags) - 1; 1508 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1500 ep_ring = xhci_dma_to_transfer_ring(ep, event->buffer); 1509 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1501 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index); 1510 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1502 trb_comp_code = GET_COMP_CODE(event->transfer_len); 1511 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1503 1512
1504 if (skip) 1513 if (skip)
1505 goto td_cleanup; 1514 goto td_cleanup;
@@ -1602,12 +1611,12 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1602 struct xhci_ep_ctx *ep_ctx; 1611 struct xhci_ep_ctx *ep_ctx;
1603 u32 trb_comp_code; 1612 u32 trb_comp_code;
1604 1613
1605 slot_id = TRB_TO_SLOT_ID(event->flags); 1614 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1606 xdev = xhci->devs[slot_id]; 1615 xdev = xhci->devs[slot_id];
1607 ep_index = TRB_TO_EP_ID(event->flags) - 1; 1616 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1608 ep_ring = xhci_dma_to_transfer_ring(ep, event->buffer); 1617 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1609 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index); 1618 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1610 trb_comp_code = GET_COMP_CODE(event->transfer_len); 1619 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1611 1620
1612 xhci_debug_trb(xhci, xhci->event_ring->dequeue); 1621 xhci_debug_trb(xhci, xhci->event_ring->dequeue);
1613 switch (trb_comp_code) { 1622 switch (trb_comp_code) {
@@ -1646,7 +1655,7 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1646 event_trb != td->last_trb) 1655 event_trb != td->last_trb)
1647 td->urb->actual_length = 1656 td->urb->actual_length =
1648 td->urb->transfer_buffer_length 1657 td->urb->transfer_buffer_length
1649 - TRB_LEN(event->transfer_len); 1658 - TRB_LEN(le32_to_cpu(event->transfer_len));
1650 else 1659 else
1651 td->urb->actual_length = 0; 1660 td->urb->actual_length = 0;
1652 1661
@@ -1680,7 +1689,7 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1680 /* We didn't stop on a link TRB in the middle */ 1689 /* We didn't stop on a link TRB in the middle */
1681 td->urb->actual_length = 1690 td->urb->actual_length =
1682 td->urb->transfer_buffer_length - 1691 td->urb->transfer_buffer_length -
1683 TRB_LEN(event->transfer_len); 1692 TRB_LEN(le32_to_cpu(event->transfer_len));
1684 xhci_dbg(xhci, "Waiting for status " 1693 xhci_dbg(xhci, "Waiting for status "
1685 "stage event\n"); 1694 "stage event\n");
1686 return 0; 1695 return 0;
@@ -1708,8 +1717,8 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
1708 u32 trb_comp_code; 1717 u32 trb_comp_code;
1709 bool skip_td = false; 1718 bool skip_td = false;
1710 1719
1711 ep_ring = xhci_dma_to_transfer_ring(ep, event->buffer); 1720 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1712 trb_comp_code = GET_COMP_CODE(event->transfer_len); 1721 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1713 urb_priv = td->urb->hcpriv; 1722 urb_priv = td->urb->hcpriv;
1714 idx = urb_priv->td_cnt; 1723 idx = urb_priv->td_cnt;
1715 frame = &td->urb->iso_frame_desc[idx]; 1724 frame = &td->urb->iso_frame_desc[idx];
@@ -1752,15 +1761,14 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
1752 for (cur_trb = ep_ring->dequeue, 1761 for (cur_trb = ep_ring->dequeue,
1753 cur_seg = ep_ring->deq_seg; cur_trb != event_trb; 1762 cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
1754 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { 1763 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
1755 if ((cur_trb->generic.field[3] & 1764 if ((le32_to_cpu(cur_trb->generic.field[3]) &
1756 TRB_TYPE_BITMASK) != TRB_TYPE(TRB_TR_NOOP) && 1765 TRB_TYPE_BITMASK) != TRB_TYPE(TRB_TR_NOOP) &&
1757 (cur_trb->generic.field[3] & 1766 (le32_to_cpu(cur_trb->generic.field[3]) &
1758 TRB_TYPE_BITMASK) != TRB_TYPE(TRB_LINK)) 1767 TRB_TYPE_BITMASK) != TRB_TYPE(TRB_LINK))
1759 len += 1768 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
1760 TRB_LEN(cur_trb->generic.field[2]);
1761 } 1769 }
1762 len += TRB_LEN(cur_trb->generic.field[2]) - 1770 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
1763 TRB_LEN(event->transfer_len); 1771 TRB_LEN(le32_to_cpu(event->transfer_len));
1764 1772
1765 if (trb_comp_code != COMP_STOP_INVAL) { 1773 if (trb_comp_code != COMP_STOP_INVAL) {
1766 frame->actual_length = len; 1774 frame->actual_length = len;
@@ -1815,8 +1823,8 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
1815 struct xhci_segment *cur_seg; 1823 struct xhci_segment *cur_seg;
1816 u32 trb_comp_code; 1824 u32 trb_comp_code;
1817 1825
1818 ep_ring = xhci_dma_to_transfer_ring(ep, event->buffer); 1826 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1819 trb_comp_code = GET_COMP_CODE(event->transfer_len); 1827 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1820 1828
1821 switch (trb_comp_code) { 1829 switch (trb_comp_code) {
1822 case COMP_SUCCESS: 1830 case COMP_SUCCESS:
@@ -1852,18 +1860,18 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
1852 "%d bytes untransferred\n", 1860 "%d bytes untransferred\n",
1853 td->urb->ep->desc.bEndpointAddress, 1861 td->urb->ep->desc.bEndpointAddress,
1854 td->urb->transfer_buffer_length, 1862 td->urb->transfer_buffer_length,
1855 TRB_LEN(event->transfer_len)); 1863 TRB_LEN(le32_to_cpu(event->transfer_len)));
1856 /* Fast path - was this the last TRB in the TD for this URB? */ 1864 /* Fast path - was this the last TRB in the TD for this URB? */
1857 if (event_trb == td->last_trb) { 1865 if (event_trb == td->last_trb) {
1858 if (TRB_LEN(event->transfer_len) != 0) { 1866 if (TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
1859 td->urb->actual_length = 1867 td->urb->actual_length =
1860 td->urb->transfer_buffer_length - 1868 td->urb->transfer_buffer_length -
1861 TRB_LEN(event->transfer_len); 1869 TRB_LEN(le32_to_cpu(event->transfer_len));
1862 if (td->urb->transfer_buffer_length < 1870 if (td->urb->transfer_buffer_length <
1863 td->urb->actual_length) { 1871 td->urb->actual_length) {
1864 xhci_warn(xhci, "HC gave bad length " 1872 xhci_warn(xhci, "HC gave bad length "
1865 "of %d bytes left\n", 1873 "of %d bytes left\n",
1866 TRB_LEN(event->transfer_len)); 1874 TRB_LEN(le32_to_cpu(event->transfer_len)));
1867 td->urb->actual_length = 0; 1875 td->urb->actual_length = 0;
1868 if (td->urb->transfer_flags & URB_SHORT_NOT_OK) 1876 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
1869 *status = -EREMOTEIO; 1877 *status = -EREMOTEIO;
@@ -1894,20 +1902,20 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
1894 for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg; 1902 for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
1895 cur_trb != event_trb; 1903 cur_trb != event_trb;
1896 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { 1904 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
1897 if ((cur_trb->generic.field[3] & 1905 if ((le32_to_cpu(cur_trb->generic.field[3]) &
1898 TRB_TYPE_BITMASK) != TRB_TYPE(TRB_TR_NOOP) && 1906 TRB_TYPE_BITMASK) != TRB_TYPE(TRB_TR_NOOP) &&
1899 (cur_trb->generic.field[3] & 1907 (le32_to_cpu(cur_trb->generic.field[3]) &
1900 TRB_TYPE_BITMASK) != TRB_TYPE(TRB_LINK)) 1908 TRB_TYPE_BITMASK) != TRB_TYPE(TRB_LINK))
1901 td->urb->actual_length += 1909 td->urb->actual_length +=
1902 TRB_LEN(cur_trb->generic.field[2]); 1910 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
1903 } 1911 }
1904 /* If the ring didn't stop on a Link or No-op TRB, add 1912 /* If the ring didn't stop on a Link or No-op TRB, add
1905 * in the actual bytes transferred from the Normal TRB 1913 * in the actual bytes transferred from the Normal TRB
1906 */ 1914 */
1907 if (trb_comp_code != COMP_STOP_INVAL) 1915 if (trb_comp_code != COMP_STOP_INVAL)
1908 td->urb->actual_length += 1916 td->urb->actual_length +=
1909 TRB_LEN(cur_trb->generic.field[2]) - 1917 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
1910 TRB_LEN(event->transfer_len); 1918 TRB_LEN(le32_to_cpu(event->transfer_len));
1911 } 1919 }
1912 1920
1913 return finish_td(xhci, td, event_trb, event, ep, status, false); 1921 return finish_td(xhci, td, event_trb, event, ep, status, false);
@@ -1937,7 +1945,7 @@ static int handle_tx_event(struct xhci_hcd *xhci,
1937 u32 trb_comp_code; 1945 u32 trb_comp_code;
1938 int ret = 0; 1946 int ret = 0;
1939 1947
1940 slot_id = TRB_TO_SLOT_ID(event->flags); 1948 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1941 xdev = xhci->devs[slot_id]; 1949 xdev = xhci->devs[slot_id];
1942 if (!xdev) { 1950 if (!xdev) {
1943 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n"); 1951 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n");
@@ -1945,20 +1953,21 @@ static int handle_tx_event(struct xhci_hcd *xhci,
1945 } 1953 }
1946 1954
1947 /* Endpoint ID is 1 based, our index is zero based */ 1955 /* Endpoint ID is 1 based, our index is zero based */
1948 ep_index = TRB_TO_EP_ID(event->flags) - 1; 1956 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1949 xhci_dbg(xhci, "%s - ep index = %d\n", __func__, ep_index); 1957 xhci_dbg(xhci, "%s - ep index = %d\n", __func__, ep_index);
1950 ep = &xdev->eps[ep_index]; 1958 ep = &xdev->eps[ep_index];
1951 ep_ring = xhci_dma_to_transfer_ring(ep, event->buffer); 1959 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1952 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index); 1960 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1953 if (!ep_ring || 1961 if (!ep_ring ||
1954 (ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED) { 1962 (le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
1963 EP_STATE_DISABLED) {
1955 xhci_err(xhci, "ERROR Transfer event for disabled endpoint " 1964 xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
1956 "or incorrect stream ring\n"); 1965 "or incorrect stream ring\n");
1957 return -ENODEV; 1966 return -ENODEV;
1958 } 1967 }
1959 1968
1960 event_dma = event->buffer; 1969 event_dma = le64_to_cpu(event->buffer);
1961 trb_comp_code = GET_COMP_CODE(event->transfer_len); 1970 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1962 /* Look for common error cases */ 1971 /* Look for common error cases */
1963 switch (trb_comp_code) { 1972 switch (trb_comp_code) {
1964 /* Skip codes that require special handling depending on 1973 /* Skip codes that require special handling depending on
@@ -2011,14 +2020,16 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2011 if (!list_empty(&ep_ring->td_list)) 2020 if (!list_empty(&ep_ring->td_list))
2012 xhci_dbg(xhci, "Underrun Event for slot %d ep %d " 2021 xhci_dbg(xhci, "Underrun Event for slot %d ep %d "
2013 "still with TDs queued?\n", 2022 "still with TDs queued?\n",
2014 TRB_TO_SLOT_ID(event->flags), ep_index); 2023 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2024 ep_index);
2015 goto cleanup; 2025 goto cleanup;
2016 case COMP_OVERRUN: 2026 case COMP_OVERRUN:
2017 xhci_dbg(xhci, "overrun event on endpoint\n"); 2027 xhci_dbg(xhci, "overrun event on endpoint\n");
2018 if (!list_empty(&ep_ring->td_list)) 2028 if (!list_empty(&ep_ring->td_list))
2019 xhci_dbg(xhci, "Overrun Event for slot %d ep %d " 2029 xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
2020 "still with TDs queued?\n", 2030 "still with TDs queued?\n",
2021 TRB_TO_SLOT_ID(event->flags), ep_index); 2031 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2032 ep_index);
2022 goto cleanup; 2033 goto cleanup;
2023 case COMP_MISSED_INT: 2034 case COMP_MISSED_INT:
2024 /* 2035 /*
@@ -2047,9 +2058,11 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2047 if (list_empty(&ep_ring->td_list)) { 2058 if (list_empty(&ep_ring->td_list)) {
2048 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d " 2059 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d "
2049 "with no TDs queued?\n", 2060 "with no TDs queued?\n",
2050 TRB_TO_SLOT_ID(event->flags), ep_index); 2061 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2062 ep_index);
2051 xhci_dbg(xhci, "Event TRB with TRB type ID %u\n", 2063 xhci_dbg(xhci, "Event TRB with TRB type ID %u\n",
2052 (unsigned int) (event->flags & TRB_TYPE_BITMASK)>>10); 2064 (unsigned int) (le32_to_cpu(event->flags)
2065 & TRB_TYPE_BITMASK)>>10);
2053 xhci_print_trb_offsets(xhci, (union xhci_trb *) event); 2066 xhci_print_trb_offsets(xhci, (union xhci_trb *) event);
2054 if (ep->skip) { 2067 if (ep->skip) {
2055 ep->skip = false; 2068 ep->skip = false;
@@ -2092,7 +2105,8 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2092 * corresponding TD has been cancelled. Just ignore 2105 * corresponding TD has been cancelled. Just ignore
2093 * the TD. 2106 * the TD.
2094 */ 2107 */
2095 if ((event_trb->generic.field[3] & TRB_TYPE_BITMASK) 2108 if ((le32_to_cpu(event_trb->generic.field[3])
2109 & TRB_TYPE_BITMASK)
2096 == TRB_TYPE(TRB_TR_NOOP)) { 2110 == TRB_TYPE(TRB_TR_NOOP)) {
2097 xhci_dbg(xhci, 2111 xhci_dbg(xhci,
2098 "event_trb is a no-op TRB. Skip it\n"); 2112 "event_trb is a no-op TRB. Skip it\n");
@@ -2157,8 +2171,10 @@ cleanup:
2157/* 2171/*
2158 * This function handles all OS-owned events on the event ring. It may drop 2172 * This function handles all OS-owned events on the event ring. It may drop
2159 * xhci->lock between event processing (e.g. to pass up port status changes). 2173 * xhci->lock between event processing (e.g. to pass up port status changes).
2174 * Returns >0 for "possibly more events to process" (caller should call again),
2175 * otherwise 0 if done. In future, <0 returns should indicate error code.
2160 */ 2176 */
2161static void xhci_handle_event(struct xhci_hcd *xhci) 2177static int xhci_handle_event(struct xhci_hcd *xhci)
2162{ 2178{
2163 union xhci_trb *event; 2179 union xhci_trb *event;
2164 int update_ptrs = 1; 2180 int update_ptrs = 1;
@@ -2167,20 +2183,25 @@ static void xhci_handle_event(struct xhci_hcd *xhci)
2167 xhci_dbg(xhci, "In %s\n", __func__); 2183 xhci_dbg(xhci, "In %s\n", __func__);
2168 if (!xhci->event_ring || !xhci->event_ring->dequeue) { 2184 if (!xhci->event_ring || !xhci->event_ring->dequeue) {
2169 xhci->error_bitmask |= 1 << 1; 2185 xhci->error_bitmask |= 1 << 1;
2170 return; 2186 return 0;
2171 } 2187 }
2172 2188
2173 event = xhci->event_ring->dequeue; 2189 event = xhci->event_ring->dequeue;
2174 /* Does the HC or OS own the TRB? */ 2190 /* Does the HC or OS own the TRB? */
2175 if ((event->event_cmd.flags & TRB_CYCLE) != 2191 if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
2176 xhci->event_ring->cycle_state) { 2192 xhci->event_ring->cycle_state) {
2177 xhci->error_bitmask |= 1 << 2; 2193 xhci->error_bitmask |= 1 << 2;
2178 return; 2194 return 0;
2179 } 2195 }
2180 xhci_dbg(xhci, "%s - OS owns TRB\n", __func__); 2196 xhci_dbg(xhci, "%s - OS owns TRB\n", __func__);
2181 2197
2198 /*
2199 * Barrier between reading the TRB_CYCLE (valid) flag above and any
2200 * speculative reads of the event's flags/data below.
2201 */
2202 rmb();
2182 /* FIXME: Handle more event types. */ 2203 /* FIXME: Handle more event types. */
2183 switch ((event->event_cmd.flags & TRB_TYPE_BITMASK)) { 2204 switch ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK)) {
2184 case TRB_TYPE(TRB_COMPLETION): 2205 case TRB_TYPE(TRB_COMPLETION):
2185 xhci_dbg(xhci, "%s - calling handle_cmd_completion\n", __func__); 2206 xhci_dbg(xhci, "%s - calling handle_cmd_completion\n", __func__);
2186 handle_cmd_completion(xhci, &event->event_cmd); 2207 handle_cmd_completion(xhci, &event->event_cmd);
@@ -2202,7 +2223,8 @@ static void xhci_handle_event(struct xhci_hcd *xhci)
2202 update_ptrs = 0; 2223 update_ptrs = 0;
2203 break; 2224 break;
2204 default: 2225 default:
2205 if ((event->event_cmd.flags & TRB_TYPE_BITMASK) >= TRB_TYPE(48)) 2226 if ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) >=
2227 TRB_TYPE(48))
2206 handle_vendor_event(xhci, event); 2228 handle_vendor_event(xhci, event);
2207 else 2229 else
2208 xhci->error_bitmask |= 1 << 3; 2230 xhci->error_bitmask |= 1 << 3;
@@ -2213,15 +2235,17 @@ static void xhci_handle_event(struct xhci_hcd *xhci)
2213 if (xhci->xhc_state & XHCI_STATE_DYING) { 2235 if (xhci->xhc_state & XHCI_STATE_DYING) {
2214 xhci_dbg(xhci, "xHCI host dying, returning from " 2236 xhci_dbg(xhci, "xHCI host dying, returning from "
2215 "event handler.\n"); 2237 "event handler.\n");
2216 return; 2238 return 0;
2217 } 2239 }
2218 2240
2219 if (update_ptrs) 2241 if (update_ptrs)
2220 /* Update SW event ring dequeue pointer */ 2242 /* Update SW event ring dequeue pointer */
2221 inc_deq(xhci, xhci->event_ring, true); 2243 inc_deq(xhci, xhci->event_ring, true);
2222 2244
2223 /* Are there more items on the event ring? */ 2245 /* Are there more items on the event ring? Caller will call us again to
2224 xhci_handle_event(xhci); 2246 * check.
2247 */
2248 return 1;
2225} 2249}
2226 2250
2227/* 2251/*
@@ -2252,12 +2276,12 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd)
2252 xhci_dbg(xhci, "op reg status = %08x\n", status); 2276 xhci_dbg(xhci, "op reg status = %08x\n", status);
2253 xhci_dbg(xhci, "Event ring dequeue ptr:\n"); 2277 xhci_dbg(xhci, "Event ring dequeue ptr:\n");
2254 xhci_dbg(xhci, "@%llx %08x %08x %08x %08x\n", 2278 xhci_dbg(xhci, "@%llx %08x %08x %08x %08x\n",
2255 (unsigned long long) 2279 (unsigned long long)
2256 xhci_trb_virt_to_dma(xhci->event_ring->deq_seg, trb), 2280 xhci_trb_virt_to_dma(xhci->event_ring->deq_seg, trb),
2257 lower_32_bits(trb->link.segment_ptr), 2281 lower_32_bits(le64_to_cpu(trb->link.segment_ptr)),
2258 upper_32_bits(trb->link.segment_ptr), 2282 upper_32_bits(le64_to_cpu(trb->link.segment_ptr)),
2259 (unsigned int) trb->link.intr_target, 2283 (unsigned int) le32_to_cpu(trb->link.intr_target),
2260 (unsigned int) trb->link.control); 2284 (unsigned int) le32_to_cpu(trb->link.control));
2261 2285
2262 if (status & STS_FATAL) { 2286 if (status & STS_FATAL) {
2263 xhci_warn(xhci, "WARNING: Host System Error\n"); 2287 xhci_warn(xhci, "WARNING: Host System Error\n");
@@ -2303,7 +2327,7 @@ hw_died:
2303 /* FIXME this should be a delayed service routine 2327 /* FIXME this should be a delayed service routine
2304 * that clears the EHB. 2328 * that clears the EHB.
2305 */ 2329 */
2306 xhci_handle_event(xhci); 2330 while (xhci_handle_event(xhci) > 0) {}
2307 2331
2308 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); 2332 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2309 /* If necessary, update the HW's version of the event ring deq ptr. */ 2333 /* If necessary, update the HW's version of the event ring deq ptr. */
@@ -2358,10 +2382,10 @@ static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
2358 struct xhci_generic_trb *trb; 2382 struct xhci_generic_trb *trb;
2359 2383
2360 trb = &ring->enqueue->generic; 2384 trb = &ring->enqueue->generic;
2361 trb->field[0] = field1; 2385 trb->field[0] = cpu_to_le32(field1);
2362 trb->field[1] = field2; 2386 trb->field[1] = cpu_to_le32(field2);
2363 trb->field[2] = field3; 2387 trb->field[2] = cpu_to_le32(field3);
2364 trb->field[3] = field4; 2388 trb->field[3] = cpu_to_le32(field4);
2365 inc_enq(xhci, ring, consumer, more_trbs_coming); 2389 inc_enq(xhci, ring, consumer, more_trbs_coming);
2366} 2390}
2367 2391
@@ -2414,17 +2438,16 @@ static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
2414 next = ring->enqueue; 2438 next = ring->enqueue;
2415 2439
2416 while (last_trb(xhci, ring, ring->enq_seg, next)) { 2440 while (last_trb(xhci, ring, ring->enq_seg, next)) {
2417
2418 /* If we're not dealing with 0.95 hardware, 2441 /* If we're not dealing with 0.95 hardware,
2419 * clear the chain bit. 2442 * clear the chain bit.
2420 */ 2443 */
2421 if (!xhci_link_trb_quirk(xhci)) 2444 if (!xhci_link_trb_quirk(xhci))
2422 next->link.control &= ~TRB_CHAIN; 2445 next->link.control &= cpu_to_le32(~TRB_CHAIN);
2423 else 2446 else
2424 next->link.control |= TRB_CHAIN; 2447 next->link.control |= cpu_to_le32(TRB_CHAIN);
2425 2448
2426 wmb(); 2449 wmb();
2427 next->link.control ^= (u32) TRB_CYCLE; 2450 next->link.control ^= cpu_to_le32((u32) TRB_CYCLE);
2428 2451
2429 /* Toggle the cycle bit after the last ring segment. */ 2452 /* Toggle the cycle bit after the last ring segment. */
2430 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) { 2453 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
@@ -2467,8 +2490,8 @@ static int prepare_transfer(struct xhci_hcd *xhci,
2467 } 2490 }
2468 2491
2469 ret = prepare_ring(xhci, ep_ring, 2492 ret = prepare_ring(xhci, ep_ring,
2470 ep_ctx->ep_info & EP_STATE_MASK, 2493 le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
2471 num_trbs, mem_flags); 2494 num_trbs, mem_flags);
2472 if (ret) 2495 if (ret)
2473 return ret; 2496 return ret;
2474 2497
@@ -2570,9 +2593,9 @@ static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id,
2570 */ 2593 */
2571 wmb(); 2594 wmb();
2572 if (start_cycle) 2595 if (start_cycle)
2573 start_trb->field[3] |= start_cycle; 2596 start_trb->field[3] |= cpu_to_le32(start_cycle);
2574 else 2597 else
2575 start_trb->field[3] &= ~0x1; 2598 start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
2576 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id); 2599 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id);
2577} 2600}
2578 2601
@@ -2590,7 +2613,7 @@ int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2590 int xhci_interval; 2613 int xhci_interval;
2591 int ep_interval; 2614 int ep_interval;
2592 2615
2593 xhci_interval = EP_INTERVAL_TO_UFRAMES(ep_ctx->ep_info); 2616 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
2594 ep_interval = urb->interval; 2617 ep_interval = urb->interval;
2595 /* Convert to microframes */ 2618 /* Convert to microframes */
2596 if (urb->dev->speed == USB_SPEED_LOW || 2619 if (urb->dev->speed == USB_SPEED_LOW ||
@@ -2632,6 +2655,35 @@ static u32 xhci_td_remainder(unsigned int remainder)
2632 return (remainder >> 10) << 17; 2655 return (remainder >> 10) << 17;
2633} 2656}
2634 2657
2658/*
2659 * For xHCI 1.0 host controllers, TD size is the number of packets remaining in
2660 * the TD (*not* including this TRB).
2661 *
2662 * Total TD packet count = total_packet_count =
2663 * roundup(TD size in bytes / wMaxPacketSize)
2664 *
2665 * Packets transferred up to and including this TRB = packets_transferred =
2666 * rounddown(total bytes transferred including this TRB / wMaxPacketSize)
2667 *
2668 * TD size = total_packet_count - packets_transferred
2669 *
2670 * It must fit in bits 21:17, so it can't be bigger than 31.
2671 */
2672
2673static u32 xhci_v1_0_td_remainder(int running_total, int trb_buff_len,
2674 unsigned int total_packet_count, struct urb *urb)
2675{
2676 int packets_transferred;
2677
2678 /* All the TRB queueing functions don't count the current TRB in
2679 * running_total.
2680 */
2681 packets_transferred = (running_total + trb_buff_len) /
2682 le16_to_cpu(urb->ep->desc.wMaxPacketSize);
2683
2684 return xhci_td_remainder(total_packet_count - packets_transferred);
2685}
2686
2635static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, 2687static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2636 struct urb *urb, int slot_id, unsigned int ep_index) 2688 struct urb *urb, int slot_id, unsigned int ep_index)
2637{ 2689{
@@ -2642,6 +2694,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2642 struct scatterlist *sg; 2694 struct scatterlist *sg;
2643 int num_sgs; 2695 int num_sgs;
2644 int trb_buff_len, this_sg_len, running_total; 2696 int trb_buff_len, this_sg_len, running_total;
2697 unsigned int total_packet_count;
2645 bool first_trb; 2698 bool first_trb;
2646 u64 addr; 2699 u64 addr;
2647 bool more_trbs_coming; 2700 bool more_trbs_coming;
@@ -2655,6 +2708,8 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2655 2708
2656 num_trbs = count_sg_trbs_needed(xhci, urb); 2709 num_trbs = count_sg_trbs_needed(xhci, urb);
2657 num_sgs = urb->num_sgs; 2710 num_sgs = urb->num_sgs;
2711 total_packet_count = roundup(urb->transfer_buffer_length,
2712 le16_to_cpu(urb->ep->desc.wMaxPacketSize));
2658 2713
2659 trb_buff_len = prepare_transfer(xhci, xhci->devs[slot_id], 2714 trb_buff_len = prepare_transfer(xhci, xhci->devs[slot_id],
2660 ep_index, urb->stream_id, 2715 ep_index, urb->stream_id,
@@ -2718,6 +2773,11 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2718 td->last_trb = ep_ring->enqueue; 2773 td->last_trb = ep_ring->enqueue;
2719 field |= TRB_IOC; 2774 field |= TRB_IOC;
2720 } 2775 }
2776
2777 /* Only set interrupt on short packet for IN endpoints */
2778 if (usb_urb_dir_in(urb))
2779 field |= TRB_ISP;
2780
2721 xhci_dbg(xhci, " sg entry: dma = %#x, len = %#x (%d), " 2781 xhci_dbg(xhci, " sg entry: dma = %#x, len = %#x (%d), "
2722 "64KB boundary at %#x, end dma = %#x\n", 2782 "64KB boundary at %#x, end dma = %#x\n",
2723 (unsigned int) addr, trb_buff_len, trb_buff_len, 2783 (unsigned int) addr, trb_buff_len, trb_buff_len,
@@ -2730,11 +2790,20 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2730 (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1), 2790 (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1),
2731 (unsigned int) addr + trb_buff_len); 2791 (unsigned int) addr + trb_buff_len);
2732 } 2792 }
2733 remainder = xhci_td_remainder(urb->transfer_buffer_length - 2793
2734 running_total) ; 2794 /* Set the TRB length, TD size, and interrupter fields. */
2795 if (xhci->hci_version < 0x100) {
2796 remainder = xhci_td_remainder(
2797 urb->transfer_buffer_length -
2798 running_total);
2799 } else {
2800 remainder = xhci_v1_0_td_remainder(running_total,
2801 trb_buff_len, total_packet_count, urb);
2802 }
2735 length_field = TRB_LEN(trb_buff_len) | 2803 length_field = TRB_LEN(trb_buff_len) |
2736 remainder | 2804 remainder |
2737 TRB_INTR_TARGET(0); 2805 TRB_INTR_TARGET(0);
2806
2738 if (num_trbs > 1) 2807 if (num_trbs > 1)
2739 more_trbs_coming = true; 2808 more_trbs_coming = true;
2740 else 2809 else
@@ -2743,12 +2812,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2743 lower_32_bits(addr), 2812 lower_32_bits(addr),
2744 upper_32_bits(addr), 2813 upper_32_bits(addr),
2745 length_field, 2814 length_field,
2746 /* We always want to know if the TRB was short, 2815 field | TRB_TYPE(TRB_NORMAL));
2747 * or we won't get an event when it completes.
2748 * (Unless we use event data TRBs, which are a
2749 * waste of space and HC resources.)
2750 */
2751 field | TRB_ISP | TRB_TYPE(TRB_NORMAL));
2752 --num_trbs; 2816 --num_trbs;
2753 running_total += trb_buff_len; 2817 running_total += trb_buff_len;
2754 2818
@@ -2796,6 +2860,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2796 u32 field, length_field; 2860 u32 field, length_field;
2797 2861
2798 int running_total, trb_buff_len, ret; 2862 int running_total, trb_buff_len, ret;
2863 unsigned int total_packet_count;
2799 u64 addr; 2864 u64 addr;
2800 2865
2801 if (urb->num_sgs) 2866 if (urb->num_sgs)
@@ -2850,6 +2915,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2850 start_cycle = ep_ring->cycle_state; 2915 start_cycle = ep_ring->cycle_state;
2851 2916
2852 running_total = 0; 2917 running_total = 0;
2918 total_packet_count = roundup(urb->transfer_buffer_length,
2919 le16_to_cpu(urb->ep->desc.wMaxPacketSize));
2853 /* How much data is in the first TRB? */ 2920 /* How much data is in the first TRB? */
2854 addr = (u64) urb->transfer_dma; 2921 addr = (u64) urb->transfer_dma;
2855 trb_buff_len = TRB_MAX_BUFF_SIZE - 2922 trb_buff_len = TRB_MAX_BUFF_SIZE -
@@ -2882,11 +2949,24 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2882 td->last_trb = ep_ring->enqueue; 2949 td->last_trb = ep_ring->enqueue;
2883 field |= TRB_IOC; 2950 field |= TRB_IOC;
2884 } 2951 }
2885 remainder = xhci_td_remainder(urb->transfer_buffer_length - 2952
2886 running_total); 2953 /* Only set interrupt on short packet for IN endpoints */
2954 if (usb_urb_dir_in(urb))
2955 field |= TRB_ISP;
2956
2957 /* Set the TRB length, TD size, and interrupter fields. */
2958 if (xhci->hci_version < 0x100) {
2959 remainder = xhci_td_remainder(
2960 urb->transfer_buffer_length -
2961 running_total);
2962 } else {
2963 remainder = xhci_v1_0_td_remainder(running_total,
2964 trb_buff_len, total_packet_count, urb);
2965 }
2887 length_field = TRB_LEN(trb_buff_len) | 2966 length_field = TRB_LEN(trb_buff_len) |
2888 remainder | 2967 remainder |
2889 TRB_INTR_TARGET(0); 2968 TRB_INTR_TARGET(0);
2969
2890 if (num_trbs > 1) 2970 if (num_trbs > 1)
2891 more_trbs_coming = true; 2971 more_trbs_coming = true;
2892 else 2972 else
@@ -2895,12 +2975,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2895 lower_32_bits(addr), 2975 lower_32_bits(addr),
2896 upper_32_bits(addr), 2976 upper_32_bits(addr),
2897 length_field, 2977 length_field,
2898 /* We always want to know if the TRB was short, 2978 field | TRB_TYPE(TRB_NORMAL));
2899 * or we won't get an event when it completes.
2900 * (Unless we use event data TRBs, which are a
2901 * waste of space and HC resources.)
2902 */
2903 field | TRB_ISP | TRB_TYPE(TRB_NORMAL));
2904 --num_trbs; 2979 --num_trbs;
2905 running_total += trb_buff_len; 2980 running_total += trb_buff_len;
2906 2981
@@ -2979,15 +3054,19 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2979 if (start_cycle == 0) 3054 if (start_cycle == 0)
2980 field |= 0x1; 3055 field |= 0x1;
2981 queue_trb(xhci, ep_ring, false, true, 3056 queue_trb(xhci, ep_ring, false, true,
2982 /* FIXME endianness is probably going to bite my ass here. */ 3057 setup->bRequestType | setup->bRequest << 8 | le16_to_cpu(setup->wValue) << 16,
2983 setup->bRequestType | setup->bRequest << 8 | setup->wValue << 16, 3058 le16_to_cpu(setup->wIndex) | le16_to_cpu(setup->wLength) << 16,
2984 setup->wIndex | setup->wLength << 16, 3059 TRB_LEN(8) | TRB_INTR_TARGET(0),
2985 TRB_LEN(8) | TRB_INTR_TARGET(0), 3060 /* Immediate data in pointer */
2986 /* Immediate data in pointer */ 3061 field);
2987 field);
2988 3062
2989 /* If there's data, queue data TRBs */ 3063 /* If there's data, queue data TRBs */
2990 field = 0; 3064 /* Only set interrupt on short packet for IN endpoints */
3065 if (usb_urb_dir_in(urb))
3066 field = TRB_ISP | TRB_TYPE(TRB_DATA);
3067 else
3068 field = TRB_TYPE(TRB_DATA);
3069
2991 length_field = TRB_LEN(urb->transfer_buffer_length) | 3070 length_field = TRB_LEN(urb->transfer_buffer_length) |
2992 xhci_td_remainder(urb->transfer_buffer_length) | 3071 xhci_td_remainder(urb->transfer_buffer_length) |
2993 TRB_INTR_TARGET(0); 3072 TRB_INTR_TARGET(0);
@@ -2998,8 +3077,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2998 lower_32_bits(urb->transfer_dma), 3077 lower_32_bits(urb->transfer_dma),
2999 upper_32_bits(urb->transfer_dma), 3078 upper_32_bits(urb->transfer_dma),
3000 length_field, 3079 length_field,
3001 /* Event on short tx */ 3080 field | ep_ring->cycle_state);
3002 field | TRB_ISP | TRB_TYPE(TRB_DATA) | ep_ring->cycle_state);
3003 } 3081 }
3004 3082
3005 /* Save the DMA address of the last TRB in the TD */ 3083 /* Save the DMA address of the last TRB in the TD */
@@ -3045,6 +3123,63 @@ static int count_isoc_trbs_needed(struct xhci_hcd *xhci,
3045 return num_trbs; 3123 return num_trbs;
3046} 3124}
3047 3125
3126/*
3127 * The transfer burst count field of the isochronous TRB defines the number of
3128 * bursts that are required to move all packets in this TD. Only SuperSpeed
3129 * devices can burst up to bMaxBurst number of packets per service interval.
3130 * This field is zero based, meaning a value of zero in the field means one
3131 * burst. Basically, for everything but SuperSpeed devices, this field will be
3132 * zero. Only xHCI 1.0 host controllers support this field.
3133 */
3134static unsigned int xhci_get_burst_count(struct xhci_hcd *xhci,
3135 struct usb_device *udev,
3136 struct urb *urb, unsigned int total_packet_count)
3137{
3138 unsigned int max_burst;
3139
3140 if (xhci->hci_version < 0x100 || udev->speed != USB_SPEED_SUPER)
3141 return 0;
3142
3143 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3144 return roundup(total_packet_count, max_burst + 1) - 1;
3145}
3146
3147/*
3148 * Returns the number of packets in the last "burst" of packets. This field is
3149 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so
3150 * the last burst packet count is equal to the total number of packets in the
3151 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst
3152 * must contain (bMaxBurst + 1) number of packets, but the last burst can
3153 * contain 1 to (bMaxBurst + 1) packets.
3154 */
3155static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci,
3156 struct usb_device *udev,
3157 struct urb *urb, unsigned int total_packet_count)
3158{
3159 unsigned int max_burst;
3160 unsigned int residue;
3161
3162 if (xhci->hci_version < 0x100)
3163 return 0;
3164
3165 switch (udev->speed) {
3166 case USB_SPEED_SUPER:
3167 /* bMaxBurst is zero based: 0 means 1 packet per burst */
3168 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3169 residue = total_packet_count % (max_burst + 1);
3170 /* If residue is zero, the last burst contains (max_burst + 1)
3171 * number of packets, but the TLBPC field is zero-based.
3172 */
3173 if (residue == 0)
3174 return max_burst;
3175 return residue - 1;
3176 default:
3177 if (total_packet_count == 0)
3178 return 0;
3179 return total_packet_count - 1;
3180 }
3181}
3182
3048/* This is for isoc transfer */ 3183/* This is for isoc transfer */
3049static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, 3184static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3050 struct urb *urb, int slot_id, unsigned int ep_index) 3185 struct urb *urb, int slot_id, unsigned int ep_index)
@@ -3085,12 +3220,22 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3085 3220
3086 /* Queue the first TRB, even if it's zero-length */ 3221 /* Queue the first TRB, even if it's zero-length */
3087 for (i = 0; i < num_tds; i++) { 3222 for (i = 0; i < num_tds; i++) {
3088 first_trb = true; 3223 unsigned int total_packet_count;
3224 unsigned int burst_count;
3225 unsigned int residue;
3089 3226
3227 first_trb = true;
3090 running_total = 0; 3228 running_total = 0;
3091 addr = start_addr + urb->iso_frame_desc[i].offset; 3229 addr = start_addr + urb->iso_frame_desc[i].offset;
3092 td_len = urb->iso_frame_desc[i].length; 3230 td_len = urb->iso_frame_desc[i].length;
3093 td_remain_len = td_len; 3231 td_remain_len = td_len;
3232 /* FIXME: Ignoring zero-length packets, can those happen? */
3233 total_packet_count = roundup(td_len,
3234 le16_to_cpu(urb->ep->desc.wMaxPacketSize));
3235 burst_count = xhci_get_burst_count(xhci, urb->dev, urb,
3236 total_packet_count);
3237 residue = xhci_get_last_burst_packet_count(xhci,
3238 urb->dev, urb, total_packet_count);
3094 3239
3095 trbs_per_td = count_isoc_trbs_needed(xhci, urb, i); 3240 trbs_per_td = count_isoc_trbs_needed(xhci, urb, i);
3096 3241
@@ -3104,7 +3249,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3104 3249
3105 for (j = 0; j < trbs_per_td; j++) { 3250 for (j = 0; j < trbs_per_td; j++) {
3106 u32 remainder = 0; 3251 u32 remainder = 0;
3107 field = 0; 3252 field = TRB_TBC(burst_count) | TRB_TLBPC(residue);
3108 3253
3109 if (first_trb) { 3254 if (first_trb) {
3110 /* Queue the isoc TRB */ 3255 /* Queue the isoc TRB */
@@ -3123,6 +3268,10 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3123 field |= ep_ring->cycle_state; 3268 field |= ep_ring->cycle_state;
3124 } 3269 }
3125 3270
3271 /* Only set interrupt on short packet for IN EPs */
3272 if (usb_urb_dir_in(urb))
3273 field |= TRB_ISP;
3274
3126 /* Chain all the TRBs together; clear the chain bit in 3275 /* Chain all the TRBs together; clear the chain bit in
3127 * the last TRB to indicate it's the last TRB in the 3276 * the last TRB to indicate it's the last TRB in the
3128 * chain. 3277 * chain.
@@ -3142,20 +3291,24 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3142 if (trb_buff_len > td_remain_len) 3291 if (trb_buff_len > td_remain_len)
3143 trb_buff_len = td_remain_len; 3292 trb_buff_len = td_remain_len;
3144 3293
3145 remainder = xhci_td_remainder(td_len - running_total); 3294 /* Set the TRB length, TD size, & interrupter fields. */
3295 if (xhci->hci_version < 0x100) {
3296 remainder = xhci_td_remainder(
3297 td_len - running_total);
3298 } else {
3299 remainder = xhci_v1_0_td_remainder(
3300 running_total, trb_buff_len,
3301 total_packet_count, urb);
3302 }
3146 length_field = TRB_LEN(trb_buff_len) | 3303 length_field = TRB_LEN(trb_buff_len) |
3147 remainder | 3304 remainder |
3148 TRB_INTR_TARGET(0); 3305 TRB_INTR_TARGET(0);
3306
3149 queue_trb(xhci, ep_ring, false, more_trbs_coming, 3307 queue_trb(xhci, ep_ring, false, more_trbs_coming,
3150 lower_32_bits(addr), 3308 lower_32_bits(addr),
3151 upper_32_bits(addr), 3309 upper_32_bits(addr),
3152 length_field, 3310 length_field,
3153 /* We always want to know if the TRB was short, 3311 field);
3154 * or we won't get an event when it completes.
3155 * (Unless we use event data TRBs, which are a
3156 * waste of space and HC resources.)
3157 */
3158 field | TRB_ISP);
3159 running_total += trb_buff_len; 3312 running_total += trb_buff_len;
3160 3313
3161 addr += trb_buff_len; 3314 addr += trb_buff_len;
@@ -3211,8 +3364,8 @@ int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
3211 /* Check the ring to guarantee there is enough room for the whole urb. 3364 /* Check the ring to guarantee there is enough room for the whole urb.
3212 * Do not insert any td of the urb to the ring if the check failed. 3365 * Do not insert any td of the urb to the ring if the check failed.
3213 */ 3366 */
3214 ret = prepare_ring(xhci, ep_ring, ep_ctx->ep_info & EP_STATE_MASK, 3367 ret = prepare_ring(xhci, ep_ring, le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
3215 num_trbs, mem_flags); 3368 num_trbs, mem_flags);
3216 if (ret) 3369 if (ret)
3217 return ret; 3370 return ret;
3218 3371
@@ -3224,7 +3377,7 @@ int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
3224 urb->dev->speed == USB_SPEED_FULL) 3377 urb->dev->speed == USB_SPEED_FULL)
3225 urb->start_frame >>= 3; 3378 urb->start_frame >>= 3;
3226 3379
3227 xhci_interval = EP_INTERVAL_TO_UFRAMES(ep_ctx->ep_info); 3380 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
3228 ep_interval = urb->interval; 3381 ep_interval = urb->interval;
3229 /* Convert to microframes */ 3382 /* Convert to microframes */
3230 if (urb->dev->speed == USB_SPEED_LOW || 3383 if (urb->dev->speed == USB_SPEED_LOW ||
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 81b976e45880..6864759c8d1a 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -973,8 +973,8 @@ static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
973 973
974 out_ctx = xhci->devs[slot_id]->out_ctx; 974 out_ctx = xhci->devs[slot_id]->out_ctx;
975 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); 975 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
976 hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2); 976 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
977 max_packet_size = urb->dev->ep0.desc.wMaxPacketSize; 977 max_packet_size = le16_to_cpu(urb->dev->ep0.desc.wMaxPacketSize);
978 if (hw_max_packet_size != max_packet_size) { 978 if (hw_max_packet_size != max_packet_size) {
979 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n"); 979 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
980 xhci_dbg(xhci, "Max packet size in usb_device = %d\n", 980 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
@@ -988,15 +988,15 @@ static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
988 xhci->devs[slot_id]->out_ctx, ep_index); 988 xhci->devs[slot_id]->out_ctx, ep_index);
989 in_ctx = xhci->devs[slot_id]->in_ctx; 989 in_ctx = xhci->devs[slot_id]->in_ctx;
990 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index); 990 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
991 ep_ctx->ep_info2 &= ~MAX_PACKET_MASK; 991 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
992 ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size); 992 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
993 993
994 /* Set up the input context flags for the command */ 994 /* Set up the input context flags for the command */
995 /* FIXME: This won't work if a non-default control endpoint 995 /* FIXME: This won't work if a non-default control endpoint
996 * changes max packet sizes. 996 * changes max packet sizes.
997 */ 997 */
998 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); 998 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
999 ctrl_ctx->add_flags = EP0_FLAG; 999 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1000 ctrl_ctx->drop_flags = 0; 1000 ctrl_ctx->drop_flags = 0;
1001 1001
1002 xhci_dbg(xhci, "Slot %d input context\n", slot_id); 1002 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
@@ -1010,7 +1010,7 @@ static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1010 /* Clean up the input context for later use by bandwidth 1010 /* Clean up the input context for later use by bandwidth
1011 * functions. 1011 * functions.
1012 */ 1012 */
1013 ctrl_ctx->add_flags = SLOT_FLAG; 1013 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1014 } 1014 }
1015 return ret; 1015 return ret;
1016} 1016}
@@ -1331,27 +1331,30 @@ int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1331 /* If the HC already knows the endpoint is disabled, 1331 /* If the HC already knows the endpoint is disabled,
1332 * or the HCD has noted it is disabled, ignore this request 1332 * or the HCD has noted it is disabled, ignore this request
1333 */ 1333 */
1334 if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED || 1334 if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
1335 ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) { 1335 EP_STATE_DISABLED ||
1336 le32_to_cpu(ctrl_ctx->drop_flags) &
1337 xhci_get_endpoint_flag(&ep->desc)) {
1336 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n", 1338 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1337 __func__, ep); 1339 __func__, ep);
1338 return 0; 1340 return 0;
1339 } 1341 }
1340 1342
1341 ctrl_ctx->drop_flags |= drop_flag; 1343 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1342 new_drop_flags = ctrl_ctx->drop_flags; 1344 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1343 1345
1344 ctrl_ctx->add_flags &= ~drop_flag; 1346 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1345 new_add_flags = ctrl_ctx->add_flags; 1347 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1346 1348
1347 last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags); 1349 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1348 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx); 1350 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1349 /* Update the last valid endpoint context, if we deleted the last one */ 1351 /* Update the last valid endpoint context, if we deleted the last one */
1350 if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) { 1352 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1351 slot_ctx->dev_info &= ~LAST_CTX_MASK; 1353 LAST_CTX(last_ctx)) {
1352 slot_ctx->dev_info |= LAST_CTX(last_ctx); 1354 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1355 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1353 } 1356 }
1354 new_slot_info = slot_ctx->dev_info; 1357 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1355 1358
1356 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); 1359 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1357 1360
@@ -1419,7 +1422,8 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1419 /* If the HCD has already noted the endpoint is enabled, 1422 /* If the HCD has already noted the endpoint is enabled,
1420 * ignore this request. 1423 * ignore this request.
1421 */ 1424 */
1422 if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) { 1425 if (le32_to_cpu(ctrl_ctx->add_flags) &
1426 xhci_get_endpoint_flag(&ep->desc)) {
1423 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n", 1427 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1424 __func__, ep); 1428 __func__, ep);
1425 return 0; 1429 return 0;
@@ -1437,8 +1441,8 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1437 return -ENOMEM; 1441 return -ENOMEM;
1438 } 1442 }
1439 1443
1440 ctrl_ctx->add_flags |= added_ctxs; 1444 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1441 new_add_flags = ctrl_ctx->add_flags; 1445 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1442 1446
1443 /* If xhci_endpoint_disable() was called for this endpoint, but the 1447 /* If xhci_endpoint_disable() was called for this endpoint, but the
1444 * xHC hasn't been notified yet through the check_bandwidth() call, 1448 * xHC hasn't been notified yet through the check_bandwidth() call,
@@ -1446,15 +1450,16 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1446 * descriptors. We must drop and re-add this endpoint, so we leave the 1450 * descriptors. We must drop and re-add this endpoint, so we leave the
1447 * drop flags alone. 1451 * drop flags alone.
1448 */ 1452 */
1449 new_drop_flags = ctrl_ctx->drop_flags; 1453 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1450 1454
1451 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx); 1455 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1452 /* Update the last valid endpoint context, if we just added one past */ 1456 /* Update the last valid endpoint context, if we just added one past */
1453 if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) { 1457 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1454 slot_ctx->dev_info &= ~LAST_CTX_MASK; 1458 LAST_CTX(last_ctx)) {
1455 slot_ctx->dev_info |= LAST_CTX(last_ctx); 1459 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1460 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1456 } 1461 }
1457 new_slot_info = slot_ctx->dev_info; 1462 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1458 1463
1459 /* Store the usb_device pointer for later use */ 1464 /* Store the usb_device pointer for later use */
1460 ep->hcpriv = udev; 1465 ep->hcpriv = udev;
@@ -1484,9 +1489,9 @@ static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *vir
1484 ctrl_ctx->drop_flags = 0; 1489 ctrl_ctx->drop_flags = 0;
1485 ctrl_ctx->add_flags = 0; 1490 ctrl_ctx->add_flags = 0;
1486 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); 1491 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1487 slot_ctx->dev_info &= ~LAST_CTX_MASK; 1492 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1488 /* Endpoint 0 is always valid */ 1493 /* Endpoint 0 is always valid */
1489 slot_ctx->dev_info |= LAST_CTX(1); 1494 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1490 for (i = 1; i < 31; ++i) { 1495 for (i = 1; i < 31; ++i) {
1491 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i); 1496 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1492 ep_ctx->ep_info = 0; 1497 ep_ctx->ep_info = 0;
@@ -1497,7 +1502,7 @@ static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *vir
1497} 1502}
1498 1503
1499static int xhci_configure_endpoint_result(struct xhci_hcd *xhci, 1504static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1500 struct usb_device *udev, int *cmd_status) 1505 struct usb_device *udev, u32 *cmd_status)
1501{ 1506{
1502 int ret; 1507 int ret;
1503 1508
@@ -1535,7 +1540,7 @@ static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1535} 1540}
1536 1541
1537static int xhci_evaluate_context_result(struct xhci_hcd *xhci, 1542static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1538 struct usb_device *udev, int *cmd_status) 1543 struct usb_device *udev, u32 *cmd_status)
1539{ 1544{
1540 int ret; 1545 int ret;
1541 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id]; 1546 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
@@ -1581,7 +1586,7 @@ static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1581 unsigned long flags; 1586 unsigned long flags;
1582 struct xhci_container_ctx *in_ctx; 1587 struct xhci_container_ctx *in_ctx;
1583 struct completion *cmd_completion; 1588 struct completion *cmd_completion;
1584 int *cmd_status; 1589 u32 *cmd_status;
1585 struct xhci_virt_device *virt_dev; 1590 struct xhci_virt_device *virt_dev;
1586 1591
1587 spin_lock_irqsave(&xhci->lock, flags); 1592 spin_lock_irqsave(&xhci->lock, flags);
@@ -1595,8 +1600,8 @@ static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1595 /* Enqueue pointer can be left pointing to the link TRB, 1600 /* Enqueue pointer can be left pointing to the link TRB,
1596 * we must handle that 1601 * we must handle that
1597 */ 1602 */
1598 if ((command->command_trb->link.control & TRB_TYPE_BITMASK) 1603 if ((le32_to_cpu(command->command_trb->link.control)
1599 == TRB_TYPE(TRB_LINK)) 1604 & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
1600 command->command_trb = 1605 command->command_trb =
1601 xhci->cmd_ring->enq_seg->next->trbs; 1606 xhci->cmd_ring->enq_seg->next->trbs;
1602 1607
@@ -1672,14 +1677,13 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1672 1677
1673 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ 1678 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1674 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx); 1679 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1675 ctrl_ctx->add_flags |= SLOT_FLAG; 1680 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1676 ctrl_ctx->add_flags &= ~EP0_FLAG; 1681 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
1677 ctrl_ctx->drop_flags &= ~SLOT_FLAG; 1682 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
1678 ctrl_ctx->drop_flags &= ~EP0_FLAG;
1679 xhci_dbg(xhci, "New Input Control Context:\n"); 1683 xhci_dbg(xhci, "New Input Control Context:\n");
1680 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); 1684 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1681 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 1685 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1682 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info)); 1686 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1683 1687
1684 ret = xhci_configure_endpoint(xhci, udev, NULL, 1688 ret = xhci_configure_endpoint(xhci, udev, NULL,
1685 false, false); 1689 false, false);
@@ -1690,7 +1694,7 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1690 1694
1691 xhci_dbg(xhci, "Output context after successful config ep cmd:\n"); 1695 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1692 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1696 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1693 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info)); 1697 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1694 1698
1695 xhci_zero_in_ctx(xhci, virt_dev); 1699 xhci_zero_in_ctx(xhci, virt_dev);
1696 /* Install new rings and free or cache any old rings */ 1700 /* Install new rings and free or cache any old rings */
@@ -1740,10 +1744,10 @@ static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1740{ 1744{
1741 struct xhci_input_control_ctx *ctrl_ctx; 1745 struct xhci_input_control_ctx *ctrl_ctx;
1742 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); 1746 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1743 ctrl_ctx->add_flags = add_flags; 1747 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
1744 ctrl_ctx->drop_flags = drop_flags; 1748 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
1745 xhci_slot_copy(xhci, in_ctx, out_ctx); 1749 xhci_slot_copy(xhci, in_ctx, out_ctx);
1746 ctrl_ctx->add_flags |= SLOT_FLAG; 1750 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1747 1751
1748 xhci_dbg(xhci, "Input Context:\n"); 1752 xhci_dbg(xhci, "Input Context:\n");
1749 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags)); 1753 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
@@ -1772,7 +1776,7 @@ static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1772 deq_state->new_deq_ptr); 1776 deq_state->new_deq_ptr);
1773 return; 1777 return;
1774 } 1778 }
1775 ep_ctx->deq = addr | deq_state->new_cycle_state; 1779 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
1776 1780
1777 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index); 1781 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
1778 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx, 1782 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
@@ -2327,8 +2331,8 @@ int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2327 /* Enqueue pointer can be left pointing to the link TRB, 2331 /* Enqueue pointer can be left pointing to the link TRB,
2328 * we must handle that 2332 * we must handle that
2329 */ 2333 */
2330 if ((reset_device_cmd->command_trb->link.control & TRB_TYPE_BITMASK) 2334 if ((le32_to_cpu(reset_device_cmd->command_trb->link.control)
2331 == TRB_TYPE(TRB_LINK)) 2335 & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
2332 reset_device_cmd->command_trb = 2336 reset_device_cmd->command_trb =
2333 xhci->cmd_ring->enq_seg->next->trbs; 2337 xhci->cmd_ring->enq_seg->next->trbs;
2334 2338
@@ -2542,6 +2546,17 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2542 2546
2543 virt_dev = xhci->devs[udev->slot_id]; 2547 virt_dev = xhci->devs[udev->slot_id];
2544 2548
2549 if (WARN_ON(!virt_dev)) {
2550 /*
2551 * In plug/unplug torture test with an NEC controller,
2552 * a zero-dereference was observed once due to virt_dev = 0.
2553 * Print useful debug rather than crash if it is observed again!
2554 */
2555 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
2556 udev->slot_id);
2557 return -EINVAL;
2558 }
2559
2545 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); 2560 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2546 /* 2561 /*
2547 * If this is the first Set Address since device plug-in or 2562 * If this is the first Set Address since device plug-in or
@@ -2609,10 +2624,10 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2609 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); 2624 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2610 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64); 2625 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2611 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n", 2626 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2612 udev->slot_id, 2627 udev->slot_id,
2613 &xhci->dcbaa->dev_context_ptrs[udev->slot_id], 2628 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2614 (unsigned long long) 2629 (unsigned long long)
2615 xhci->dcbaa->dev_context_ptrs[udev->slot_id]); 2630 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
2616 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n", 2631 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2617 (unsigned long long)virt_dev->out_ctx->dma); 2632 (unsigned long long)virt_dev->out_ctx->dma);
2618 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); 2633 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
@@ -2626,7 +2641,8 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2626 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); 2641 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2627 /* Use kernel assigned address for devices; store xHC assigned 2642 /* Use kernel assigned address for devices; store xHC assigned
2628 * address locally. */ 2643 * address locally. */
2629 virt_dev->address = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1; 2644 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
2645 + 1;
2630 /* Zero the input context control for later use */ 2646 /* Zero the input context control for later use */
2631 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx); 2647 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2632 ctrl_ctx->add_flags = 0; 2648 ctrl_ctx->add_flags = 0;
@@ -2670,16 +2686,16 @@ int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2670 spin_lock_irqsave(&xhci->lock, flags); 2686 spin_lock_irqsave(&xhci->lock, flags);
2671 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx); 2687 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
2672 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx); 2688 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
2673 ctrl_ctx->add_flags |= SLOT_FLAG; 2689 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2674 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx); 2690 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
2675 slot_ctx->dev_info |= DEV_HUB; 2691 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
2676 if (tt->multi) 2692 if (tt->multi)
2677 slot_ctx->dev_info |= DEV_MTT; 2693 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
2678 if (xhci->hci_version > 0x95) { 2694 if (xhci->hci_version > 0x95) {
2679 xhci_dbg(xhci, "xHCI version %x needs hub " 2695 xhci_dbg(xhci, "xHCI version %x needs hub "
2680 "TT think time and number of ports\n", 2696 "TT think time and number of ports\n",
2681 (unsigned int) xhci->hci_version); 2697 (unsigned int) xhci->hci_version);
2682 slot_ctx->dev_info2 |= XHCI_MAX_PORTS(hdev->maxchild); 2698 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
2683 /* Set TT think time - convert from ns to FS bit times. 2699 /* Set TT think time - convert from ns to FS bit times.
2684 * 0 = 8 FS bit times, 1 = 16 FS bit times, 2700 * 0 = 8 FS bit times, 1 = 16 FS bit times,
2685 * 2 = 24 FS bit times, 3 = 32 FS bit times. 2701 * 2 = 24 FS bit times, 3 = 32 FS bit times.
@@ -2687,7 +2703,7 @@ int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2687 think_time = tt->think_time; 2703 think_time = tt->think_time;
2688 if (think_time != 0) 2704 if (think_time != 0)
2689 think_time = (think_time / 666) - 1; 2705 think_time = (think_time / 666) - 1;
2690 slot_ctx->tt_info |= TT_THINK_TIME(think_time); 2706 slot_ctx->tt_info |= cpu_to_le32(TT_THINK_TIME(think_time));
2691 } else { 2707 } else {
2692 xhci_dbg(xhci, "xHCI version %x doesn't need hub " 2708 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
2693 "TT think time or number of ports\n", 2709 "TT think time or number of ports\n",
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index ba1be6b7cc6d..db661543a805 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -57,13 +57,13 @@
57 * @run_regs_off: RTSOFF - Runtime register space offset 57 * @run_regs_off: RTSOFF - Runtime register space offset
58 */ 58 */
59struct xhci_cap_regs { 59struct xhci_cap_regs {
60 u32 hc_capbase; 60 __le32 hc_capbase;
61 u32 hcs_params1; 61 __le32 hcs_params1;
62 u32 hcs_params2; 62 __le32 hcs_params2;
63 u32 hcs_params3; 63 __le32 hcs_params3;
64 u32 hcc_params; 64 __le32 hcc_params;
65 u32 db_off; 65 __le32 db_off;
66 u32 run_regs_off; 66 __le32 run_regs_off;
67 /* Reserved up to (CAPLENGTH - 0x1C) */ 67 /* Reserved up to (CAPLENGTH - 0x1C) */
68}; 68};
69 69
@@ -155,26 +155,26 @@ struct xhci_cap_regs {
155 * devices. 155 * devices.
156 */ 156 */
157struct xhci_op_regs { 157struct xhci_op_regs {
158 u32 command; 158 __le32 command;
159 u32 status; 159 __le32 status;
160 u32 page_size; 160 __le32 page_size;
161 u32 reserved1; 161 __le32 reserved1;
162 u32 reserved2; 162 __le32 reserved2;
163 u32 dev_notification; 163 __le32 dev_notification;
164 u64 cmd_ring; 164 __le64 cmd_ring;
165 /* rsvd: offset 0x20-2F */ 165 /* rsvd: offset 0x20-2F */
166 u32 reserved3[4]; 166 __le32 reserved3[4];
167 u64 dcbaa_ptr; 167 __le64 dcbaa_ptr;
168 u32 config_reg; 168 __le32 config_reg;
169 /* rsvd: offset 0x3C-3FF */ 169 /* rsvd: offset 0x3C-3FF */
170 u32 reserved4[241]; 170 __le32 reserved4[241];
171 /* port 1 registers, which serve as a base address for other ports */ 171 /* port 1 registers, which serve as a base address for other ports */
172 u32 port_status_base; 172 __le32 port_status_base;
173 u32 port_power_base; 173 __le32 port_power_base;
174 u32 port_link_base; 174 __le32 port_link_base;
175 u32 reserved5; 175 __le32 reserved5;
176 /* registers for ports 2-255 */ 176 /* registers for ports 2-255 */
177 u32 reserved6[NUM_PORT_REGS*254]; 177 __le32 reserved6[NUM_PORT_REGS*254];
178}; 178};
179 179
180/* USBCMD - USB command - command bitmasks */ 180/* USBCMD - USB command - command bitmasks */
@@ -382,12 +382,12 @@ struct xhci_op_regs {
382 * updates the dequeue pointer. 382 * updates the dequeue pointer.
383 */ 383 */
384struct xhci_intr_reg { 384struct xhci_intr_reg {
385 u32 irq_pending; 385 __le32 irq_pending;
386 u32 irq_control; 386 __le32 irq_control;
387 u32 erst_size; 387 __le32 erst_size;
388 u32 rsvd; 388 __le32 rsvd;
389 u64 erst_base; 389 __le64 erst_base;
390 u64 erst_dequeue; 390 __le64 erst_dequeue;
391}; 391};
392 392
393/* irq_pending bitmasks */ 393/* irq_pending bitmasks */
@@ -432,8 +432,8 @@ struct xhci_intr_reg {
432 * or larger accesses" 432 * or larger accesses"
433 */ 433 */
434struct xhci_run_regs { 434struct xhci_run_regs {
435 u32 microframe_index; 435 __le32 microframe_index;
436 u32 rsvd[7]; 436 __le32 rsvd[7];
437 struct xhci_intr_reg ir_set[128]; 437 struct xhci_intr_reg ir_set[128];
438}; 438};
439 439
@@ -447,7 +447,7 @@ struct xhci_run_regs {
447 * Section 5.6 447 * Section 5.6
448 */ 448 */
449struct xhci_doorbell_array { 449struct xhci_doorbell_array {
450 u32 doorbell[256]; 450 __le32 doorbell[256];
451}; 451};
452 452
453#define DB_VALUE(ep, stream) ((((ep) + 1) & 0xff) | ((stream) << 16)) 453#define DB_VALUE(ep, stream) ((((ep) + 1) & 0xff) | ((stream) << 16))
@@ -504,12 +504,12 @@ struct xhci_container_ctx {
504 * reserved at the end of the slot context for HC internal use. 504 * reserved at the end of the slot context for HC internal use.
505 */ 505 */
506struct xhci_slot_ctx { 506struct xhci_slot_ctx {
507 u32 dev_info; 507 __le32 dev_info;
508 u32 dev_info2; 508 __le32 dev_info2;
509 u32 tt_info; 509 __le32 tt_info;
510 u32 dev_state; 510 __le32 dev_state;
511 /* offset 0x10 to 0x1f reserved for HC internal use */ 511 /* offset 0x10 to 0x1f reserved for HC internal use */
512 u32 reserved[4]; 512 __le32 reserved[4];
513}; 513};
514 514
515/* dev_info bitmasks */ 515/* dev_info bitmasks */
@@ -580,12 +580,12 @@ struct xhci_slot_ctx {
580 * reserved at the end of the endpoint context for HC internal use. 580 * reserved at the end of the endpoint context for HC internal use.
581 */ 581 */
582struct xhci_ep_ctx { 582struct xhci_ep_ctx {
583 u32 ep_info; 583 __le32 ep_info;
584 u32 ep_info2; 584 __le32 ep_info2;
585 u64 deq; 585 __le64 deq;
586 u32 tx_info; 586 __le32 tx_info;
587 /* offset 0x14 - 0x1f reserved for HC internal use */ 587 /* offset 0x14 - 0x1f reserved for HC internal use */
588 u32 reserved[3]; 588 __le32 reserved[3];
589}; 589};
590 590
591/* ep_info bitmasks */ 591/* ep_info bitmasks */
@@ -660,9 +660,9 @@ struct xhci_ep_ctx {
660 * @add_context: set the bit of the endpoint context you want to enable 660 * @add_context: set the bit of the endpoint context you want to enable
661 */ 661 */
662struct xhci_input_control_ctx { 662struct xhci_input_control_ctx {
663 u32 drop_flags; 663 __le32 drop_flags;
664 u32 add_flags; 664 __le32 add_flags;
665 u32 rsvd2[6]; 665 __le32 rsvd2[6];
666}; 666};
667 667
668/* Represents everything that is needed to issue a command on the command ring. 668/* Represents everything that is needed to issue a command on the command ring.
@@ -688,9 +688,9 @@ struct xhci_command {
688 688
689struct xhci_stream_ctx { 689struct xhci_stream_ctx {
690 /* 64-bit stream ring address, cycle state, and stream type */ 690 /* 64-bit stream ring address, cycle state, and stream type */
691 u64 stream_ring; 691 __le64 stream_ring;
692 /* offset 0x14 - 0x1f reserved for HC internal use */ 692 /* offset 0x14 - 0x1f reserved for HC internal use */
693 u32 reserved[2]; 693 __le32 reserved[2];
694}; 694};
695 695
696/* Stream Context Types (section 6.4.1) - bits 3:1 of stream ctx deq ptr */ 696/* Stream Context Types (section 6.4.1) - bits 3:1 of stream ctx deq ptr */
@@ -803,7 +803,7 @@ struct xhci_virt_device {
803 */ 803 */
804struct xhci_device_context_array { 804struct xhci_device_context_array {
805 /* 64-bit device addresses; we only write 32-bit addresses */ 805 /* 64-bit device addresses; we only write 32-bit addresses */
806 u64 dev_context_ptrs[MAX_HC_SLOTS]; 806 __le64 dev_context_ptrs[MAX_HC_SLOTS];
807 /* private xHCD pointers */ 807 /* private xHCD pointers */
808 dma_addr_t dma; 808 dma_addr_t dma;
809}; 809};
@@ -816,10 +816,10 @@ struct xhci_device_context_array {
816 816
817struct xhci_transfer_event { 817struct xhci_transfer_event {
818 /* 64-bit buffer address, or immediate data */ 818 /* 64-bit buffer address, or immediate data */
819 u64 buffer; 819 __le64 buffer;
820 u32 transfer_len; 820 __le32 transfer_len;
821 /* This field is interpreted differently based on the type of TRB */ 821 /* This field is interpreted differently based on the type of TRB */
822 u32 flags; 822 __le32 flags;
823}; 823};
824 824
825/** Transfer Event bit fields **/ 825/** Transfer Event bit fields **/
@@ -898,9 +898,9 @@ struct xhci_transfer_event {
898 898
899struct xhci_link_trb { 899struct xhci_link_trb {
900 /* 64-bit segment pointer*/ 900 /* 64-bit segment pointer*/
901 u64 segment_ptr; 901 __le64 segment_ptr;
902 u32 intr_target; 902 __le32 intr_target;
903 u32 control; 903 __le32 control;
904}; 904};
905 905
906/* control bitfields */ 906/* control bitfields */
@@ -909,9 +909,9 @@ struct xhci_link_trb {
909/* Command completion event TRB */ 909/* Command completion event TRB */
910struct xhci_event_cmd { 910struct xhci_event_cmd {
911 /* Pointer to command TRB, or the value passed by the event data trb */ 911 /* Pointer to command TRB, or the value passed by the event data trb */
912 u64 cmd_trb; 912 __le64 cmd_trb;
913 u32 status; 913 __le32 status;
914 u32 flags; 914 __le32 flags;
915}; 915};
916 916
917/* flags bitmasks */ 917/* flags bitmasks */
@@ -943,6 +943,8 @@ struct xhci_event_cmd {
943/* Interrupter Target - which MSI-X vector to target the completion event at */ 943/* Interrupter Target - which MSI-X vector to target the completion event at */
944#define TRB_INTR_TARGET(p) (((p) & 0x3ff) << 22) 944#define TRB_INTR_TARGET(p) (((p) & 0x3ff) << 22)
945#define GET_INTR_TARGET(p) (((p) >> 22) & 0x3ff) 945#define GET_INTR_TARGET(p) (((p) >> 22) & 0x3ff)
946#define TRB_TBC(p) (((p) & 0x3) << 7)
947#define TRB_TLBPC(p) (((p) & 0xf) << 16)
946 948
947/* Cycle bit - indicates TRB ownership by HC or HCD */ 949/* Cycle bit - indicates TRB ownership by HC or HCD */
948#define TRB_CYCLE (1<<0) 950#define TRB_CYCLE (1<<0)
@@ -970,7 +972,7 @@ struct xhci_event_cmd {
970#define TRB_SIA (1<<31) 972#define TRB_SIA (1<<31)
971 973
972struct xhci_generic_trb { 974struct xhci_generic_trb {
973 u32 field[4]; 975 __le32 field[4];
974}; 976};
975 977
976union xhci_trb { 978union xhci_trb {
@@ -1118,10 +1120,10 @@ struct xhci_ring {
1118 1120
1119struct xhci_erst_entry { 1121struct xhci_erst_entry {
1120 /* 64-bit event ring segment address */ 1122 /* 64-bit event ring segment address */
1121 u64 seg_addr; 1123 __le64 seg_addr;
1122 u32 seg_size; 1124 __le32 seg_size;
1123 /* Set to zero */ 1125 /* Set to zero */
1124 u32 rsvd; 1126 __le32 rsvd;
1125}; 1127};
1126 1128
1127struct xhci_erst { 1129struct xhci_erst {
@@ -1286,10 +1288,10 @@ struct xhci_hcd {
1286 /* Is each xHCI roothub port a USB 3.0, USB 2.0, or USB 1.1 port? */ 1288 /* Is each xHCI roothub port a USB 3.0, USB 2.0, or USB 1.1 port? */
1287 u8 *port_array; 1289 u8 *port_array;
1288 /* Array of pointers to USB 3.0 PORTSC registers */ 1290 /* Array of pointers to USB 3.0 PORTSC registers */
1289 u32 __iomem **usb3_ports; 1291 __le32 __iomem **usb3_ports;
1290 unsigned int num_usb3_ports; 1292 unsigned int num_usb3_ports;
1291 /* Array of pointers to USB 2.0 PORTSC registers */ 1293 /* Array of pointers to USB 2.0 PORTSC registers */
1292 u32 __iomem **usb2_ports; 1294 __le32 __iomem **usb2_ports;
1293 unsigned int num_usb2_ports; 1295 unsigned int num_usb2_ports;
1294}; 1296};
1295 1297
@@ -1322,12 +1324,12 @@ static inline struct usb_hcd *xhci_to_hcd(struct xhci_hcd *xhci)
1322/* TODO: copied from ehci.h - can be refactored? */ 1324/* TODO: copied from ehci.h - can be refactored? */
1323/* xHCI spec says all registers are little endian */ 1325/* xHCI spec says all registers are little endian */
1324static inline unsigned int xhci_readl(const struct xhci_hcd *xhci, 1326static inline unsigned int xhci_readl(const struct xhci_hcd *xhci,
1325 __u32 __iomem *regs) 1327 __le32 __iomem *regs)
1326{ 1328{
1327 return readl(regs); 1329 return readl(regs);
1328} 1330}
1329static inline void xhci_writel(struct xhci_hcd *xhci, 1331static inline void xhci_writel(struct xhci_hcd *xhci,
1330 const unsigned int val, __u32 __iomem *regs) 1332 const unsigned int val, __le32 __iomem *regs)
1331{ 1333{
1332 xhci_dbg(xhci, 1334 xhci_dbg(xhci,
1333 "`MEM_WRITE_DWORD(3'b000, 32'h%p, 32'h%0x, 4'hf);\n", 1335 "`MEM_WRITE_DWORD(3'b000, 32'h%p, 32'h%0x, 4'hf);\n",
@@ -1345,7 +1347,7 @@ static inline void xhci_writel(struct xhci_hcd *xhci,
1345 * the high dword, and write order is irrelevant. 1347 * the high dword, and write order is irrelevant.
1346 */ 1348 */
1347static inline u64 xhci_read_64(const struct xhci_hcd *xhci, 1349static inline u64 xhci_read_64(const struct xhci_hcd *xhci,
1348 __u64 __iomem *regs) 1350 __le64 __iomem *regs)
1349{ 1351{
1350 __u32 __iomem *ptr = (__u32 __iomem *) regs; 1352 __u32 __iomem *ptr = (__u32 __iomem *) regs;
1351 u64 val_lo = readl(ptr); 1353 u64 val_lo = readl(ptr);
@@ -1353,7 +1355,7 @@ static inline u64 xhci_read_64(const struct xhci_hcd *xhci,
1353 return val_lo + (val_hi << 32); 1355 return val_lo + (val_hi << 32);
1354} 1356}
1355static inline void xhci_write_64(struct xhci_hcd *xhci, 1357static inline void xhci_write_64(struct xhci_hcd *xhci,
1356 const u64 val, __u64 __iomem *regs) 1358 const u64 val, __le64 __iomem *regs)
1357{ 1359{
1358 __u32 __iomem *ptr = (__u32 __iomem *) regs; 1360 __u32 __iomem *ptr = (__u32 __iomem *) regs;
1359 u32 val_lo = lower_32_bits(val); 1361 u32 val_lo = lower_32_bits(val);
diff --git a/drivers/usb/misc/ftdi-elan.c b/drivers/usb/misc/ftdi-elan.c
index 7839c98fa742..b16bd3ce3915 100644
--- a/drivers/usb/misc/ftdi-elan.c
+++ b/drivers/usb/misc/ftdi-elan.c
@@ -2889,8 +2889,7 @@ static struct usb_driver ftdi_elan_driver = {
2889static int __init ftdi_elan_init(void) 2889static int __init ftdi_elan_init(void)
2890{ 2890{
2891 int result; 2891 int result;
2892 printk(KERN_INFO "driver %s built at %s on %s\n", ftdi_elan_driver.name, 2892 printk(KERN_INFO "driver %s\n", ftdi_elan_driver.name);
2893 __TIME__, __DATE__);
2894 mutex_init(&ftdi_module_lock); 2893 mutex_init(&ftdi_module_lock);
2895 INIT_LIST_HEAD(&ftdi_static_list); 2894 INIT_LIST_HEAD(&ftdi_static_list);
2896 status_queue = create_singlethread_workqueue("ftdi-status-control"); 2895 status_queue = create_singlethread_workqueue("ftdi-status-control");
diff --git a/drivers/usb/misc/ldusb.c b/drivers/usb/misc/ldusb.c
index eefb8275bb7e..cb4096201e29 100644
--- a/drivers/usb/misc/ldusb.c
+++ b/drivers/usb/misc/ldusb.c
@@ -20,11 +20,6 @@
20 * Derived from Lego USB Tower driver 20 * Derived from Lego USB Tower driver
21 * Copyright (C) 2003 David Glance <advidgsf@sourceforge.net> 21 * Copyright (C) 2003 David Glance <advidgsf@sourceforge.net>
22 * 2001-2004 Juergen Stuber <starblue@users.sourceforge.net> 22 * 2001-2004 Juergen Stuber <starblue@users.sourceforge.net>
23 *
24 * V0.1 (mh) Initial version
25 * V0.11 (mh) Added raw support for HID 1.0 devices (no interrupt out endpoint)
26 * V0.12 (mh) Added kmalloc check for string buffer
27 * V0.13 (mh) Added support for LD X-Ray and Machine Test System
28 */ 23 */
29 24
30#include <linux/kernel.h> 25#include <linux/kernel.h>
@@ -41,20 +36,39 @@
41 36
42/* Define these values to match your devices */ 37/* Define these values to match your devices */
43#define USB_VENDOR_ID_LD 0x0f11 /* USB Vendor ID of LD Didactic GmbH */ 38#define USB_VENDOR_ID_LD 0x0f11 /* USB Vendor ID of LD Didactic GmbH */
44#define USB_DEVICE_ID_LD_CASSY 0x1000 /* USB Product ID of CASSY-S */ 39#define USB_DEVICE_ID_LD_CASSY 0x1000 /* USB Product ID of CASSY-S modules with 8 bytes endpoint size */
40#define USB_DEVICE_ID_LD_CASSY2 0x1001 /* USB Product ID of CASSY-S modules with 64 bytes endpoint size */
45#define USB_DEVICE_ID_LD_POCKETCASSY 0x1010 /* USB Product ID of Pocket-CASSY */ 41#define USB_DEVICE_ID_LD_POCKETCASSY 0x1010 /* USB Product ID of Pocket-CASSY */
42#define USB_DEVICE_ID_LD_POCKETCASSY2 0x1011 /* USB Product ID of Pocket-CASSY 2 (reserved) */
46#define USB_DEVICE_ID_LD_MOBILECASSY 0x1020 /* USB Product ID of Mobile-CASSY */ 43#define USB_DEVICE_ID_LD_MOBILECASSY 0x1020 /* USB Product ID of Mobile-CASSY */
44#define USB_DEVICE_ID_LD_MOBILECASSY2 0x1021 /* USB Product ID of Mobile-CASSY 2 (reserved) */
45#define USB_DEVICE_ID_LD_MICROCASSYVOLTAGE 0x1031 /* USB Product ID of Micro-CASSY Voltage */
46#define USB_DEVICE_ID_LD_MICROCASSYCURRENT 0x1032 /* USB Product ID of Micro-CASSY Current */
47#define USB_DEVICE_ID_LD_MICROCASSYTIME 0x1033 /* USB Product ID of Micro-CASSY Time (reserved) */
48#define USB_DEVICE_ID_LD_MICROCASSYTEMPERATURE 0x1035 /* USB Product ID of Micro-CASSY Temperature */
49#define USB_DEVICE_ID_LD_MICROCASSYPH 0x1038 /* USB Product ID of Micro-CASSY pH */
47#define USB_DEVICE_ID_LD_JWM 0x1080 /* USB Product ID of Joule and Wattmeter */ 50#define USB_DEVICE_ID_LD_JWM 0x1080 /* USB Product ID of Joule and Wattmeter */
48#define USB_DEVICE_ID_LD_DMMP 0x1081 /* USB Product ID of Digital Multimeter P (reserved) */ 51#define USB_DEVICE_ID_LD_DMMP 0x1081 /* USB Product ID of Digital Multimeter P (reserved) */
49#define USB_DEVICE_ID_LD_UMIP 0x1090 /* USB Product ID of UMI P */ 52#define USB_DEVICE_ID_LD_UMIP 0x1090 /* USB Product ID of UMI P */
50#define USB_DEVICE_ID_LD_XRAY1 0x1100 /* USB Product ID of X-Ray Apparatus */ 53#define USB_DEVICE_ID_LD_UMIC 0x10A0 /* USB Product ID of UMI C */
51#define USB_DEVICE_ID_LD_XRAY2 0x1101 /* USB Product ID of X-Ray Apparatus */ 54#define USB_DEVICE_ID_LD_UMIB 0x10B0 /* USB Product ID of UMI B */
55#define USB_DEVICE_ID_LD_XRAY 0x1100 /* USB Product ID of X-Ray Apparatus 55481 */
56#define USB_DEVICE_ID_LD_XRAY2 0x1101 /* USB Product ID of X-Ray Apparatus 554800 */
57#define USB_DEVICE_ID_LD_XRAYCT 0x1110 /* USB Product ID of X-Ray Apparatus CT 554821*/
52#define USB_DEVICE_ID_LD_VIDEOCOM 0x1200 /* USB Product ID of VideoCom */ 58#define USB_DEVICE_ID_LD_VIDEOCOM 0x1200 /* USB Product ID of VideoCom */
59#define USB_DEVICE_ID_LD_MOTOR 0x1210 /* USB Product ID of Motor (reserved) */
53#define USB_DEVICE_ID_LD_COM3LAB 0x2000 /* USB Product ID of COM3LAB */ 60#define USB_DEVICE_ID_LD_COM3LAB 0x2000 /* USB Product ID of COM3LAB */
54#define USB_DEVICE_ID_LD_TELEPORT 0x2010 /* USB Product ID of Terminal Adapter */ 61#define USB_DEVICE_ID_LD_TELEPORT 0x2010 /* USB Product ID of Terminal Adapter */
55#define USB_DEVICE_ID_LD_NETWORKANALYSER 0x2020 /* USB Product ID of Network Analyser */ 62#define USB_DEVICE_ID_LD_NETWORKANALYSER 0x2020 /* USB Product ID of Network Analyser */
56#define USB_DEVICE_ID_LD_POWERCONTROL 0x2030 /* USB Product ID of Converter Control Unit */ 63#define USB_DEVICE_ID_LD_POWERCONTROL 0x2030 /* USB Product ID of Converter Control Unit */
57#define USB_DEVICE_ID_LD_MACHINETEST 0x2040 /* USB Product ID of Machine Test System */ 64#define USB_DEVICE_ID_LD_MACHINETEST 0x2040 /* USB Product ID of Machine Test System */
65#define USB_DEVICE_ID_LD_MOSTANALYSER 0x2050 /* USB Product ID of MOST Protocol Analyser */
66#define USB_DEVICE_ID_LD_MOSTANALYSER2 0x2051 /* USB Product ID of MOST Protocol Analyser 2 */
67#define USB_DEVICE_ID_LD_ABSESP 0x2060 /* USB Product ID of ABS ESP */
68#define USB_DEVICE_ID_LD_AUTODATABUS 0x2070 /* USB Product ID of Automotive Data Buses */
69#define USB_DEVICE_ID_LD_MCT 0x2080 /* USB Product ID of Microcontroller technique */
70#define USB_DEVICE_ID_LD_HYBRID 0x2090 /* USB Product ID of Automotive Hybrid */
71#define USB_DEVICE_ID_LD_HEATCONTROL 0x20A0 /* USB Product ID of Heat control */
58 72
59#define USB_VENDOR_ID_VERNIER 0x08f7 73#define USB_VENDOR_ID_VERNIER 0x08f7
60#define USB_DEVICE_ID_VERNIER_GOTEMP 0x0002 74#define USB_DEVICE_ID_VERNIER_GOTEMP 0x0002
@@ -71,19 +85,37 @@
71/* table of devices that work with this driver */ 85/* table of devices that work with this driver */
72static const struct usb_device_id ld_usb_table[] = { 86static const struct usb_device_id ld_usb_table[] = {
73 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_CASSY) }, 87 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_CASSY) },
88 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_CASSY2) },
74 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_POCKETCASSY) }, 89 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_POCKETCASSY) },
90 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_POCKETCASSY2) },
75 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOBILECASSY) }, 91 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOBILECASSY) },
92 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOBILECASSY2) },
93 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MICROCASSYVOLTAGE) },
94 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MICROCASSYCURRENT) },
95 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MICROCASSYTIME) },
96 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MICROCASSYTEMPERATURE) },
97 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MICROCASSYPH) },
76 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_JWM) }, 98 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_JWM) },
77 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_DMMP) }, 99 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_DMMP) },
78 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_UMIP) }, 100 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_UMIP) },
79 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_XRAY1) }, 101 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_UMIC) },
102 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_UMIB) },
103 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_XRAY) },
80 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_XRAY2) }, 104 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_XRAY2) },
81 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_VIDEOCOM) }, 105 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_VIDEOCOM) },
106 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOTOR) },
82 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_COM3LAB) }, 107 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_COM3LAB) },
83 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_TELEPORT) }, 108 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_TELEPORT) },
84 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_NETWORKANALYSER) }, 109 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_NETWORKANALYSER) },
85 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_POWERCONTROL) }, 110 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_POWERCONTROL) },
86 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MACHINETEST) }, 111 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MACHINETEST) },
112 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOSTANALYSER) },
113 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MOSTANALYSER2) },
114 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_ABSESP) },
115 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_AUTODATABUS) },
116 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_MCT) },
117 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_HYBRID) },
118 { USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_HEATCONTROL) },
87 { USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_GOTEMP) }, 119 { USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_GOTEMP) },
88 { USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_SKIP) }, 120 { USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_SKIP) },
89 { USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_CYCLOPS) }, 121 { USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_CYCLOPS) },
@@ -91,7 +123,7 @@ static const struct usb_device_id ld_usb_table[] = {
91 { } /* Terminating entry */ 123 { } /* Terminating entry */
92}; 124};
93MODULE_DEVICE_TABLE(usb, ld_usb_table); 125MODULE_DEVICE_TABLE(usb, ld_usb_table);
94MODULE_VERSION("V0.13"); 126MODULE_VERSION("V0.14");
95MODULE_AUTHOR("Michael Hund <mhund@ld-didactic.de>"); 127MODULE_AUTHOR("Michael Hund <mhund@ld-didactic.de>");
96MODULE_DESCRIPTION("LD USB Driver"); 128MODULE_DESCRIPTION("LD USB Driver");
97MODULE_LICENSE("GPL"); 129MODULE_LICENSE("GPL");
diff --git a/drivers/usb/misc/usbtest.c b/drivers/usb/misc/usbtest.c
index 388cc128072a..7e0bb2af8e63 100644
--- a/drivers/usb/misc/usbtest.c
+++ b/drivers/usb/misc/usbtest.c
@@ -1030,6 +1030,8 @@ test_ctrl_queue(struct usbtest_dev *dev, struct usbtest_param *param)
1030 req.wValue = cpu_to_le16((USB_DT_DEVICE << 8) | 0); 1030 req.wValue = cpu_to_le16((USB_DT_DEVICE << 8) | 0);
1031 /* device descriptor size == 18 bytes */ 1031 /* device descriptor size == 18 bytes */
1032 len = udev->descriptor.bMaxPacketSize0; 1032 len = udev->descriptor.bMaxPacketSize0;
1033 if (udev->speed == USB_SPEED_SUPER)
1034 len = 512;
1033 switch (len) { 1035 switch (len) {
1034 case 8: 1036 case 8:
1035 len = 24; 1037 len = 24;
@@ -1195,6 +1197,104 @@ static int unlink_simple(struct usbtest_dev *dev, int pipe, int len)
1195 1197
1196/*-------------------------------------------------------------------------*/ 1198/*-------------------------------------------------------------------------*/
1197 1199
1200struct queued_ctx {
1201 struct completion complete;
1202 atomic_t pending;
1203 unsigned num;
1204 int status;
1205 struct urb **urbs;
1206};
1207
1208static void unlink_queued_callback(struct urb *urb)
1209{
1210 int status = urb->status;
1211 struct queued_ctx *ctx = urb->context;
1212
1213 if (ctx->status)
1214 goto done;
1215 if (urb == ctx->urbs[ctx->num - 4] || urb == ctx->urbs[ctx->num - 2]) {
1216 if (status == -ECONNRESET)
1217 goto done;
1218 /* What error should we report if the URB completed normally? */
1219 }
1220 if (status != 0)
1221 ctx->status = status;
1222
1223 done:
1224 if (atomic_dec_and_test(&ctx->pending))
1225 complete(&ctx->complete);
1226}
1227
1228static int unlink_queued(struct usbtest_dev *dev, int pipe, unsigned num,
1229 unsigned size)
1230{
1231 struct queued_ctx ctx;
1232 struct usb_device *udev = testdev_to_usbdev(dev);
1233 void *buf;
1234 dma_addr_t buf_dma;
1235 int i;
1236 int retval = -ENOMEM;
1237
1238 init_completion(&ctx.complete);
1239 atomic_set(&ctx.pending, 1); /* One more than the actual value */
1240 ctx.num = num;
1241 ctx.status = 0;
1242
1243 buf = usb_alloc_coherent(udev, size, GFP_KERNEL, &buf_dma);
1244 if (!buf)
1245 return retval;
1246 memset(buf, 0, size);
1247
1248 /* Allocate and init the urbs we'll queue */
1249 ctx.urbs = kcalloc(num, sizeof(struct urb *), GFP_KERNEL);
1250 if (!ctx.urbs)
1251 goto free_buf;
1252 for (i = 0; i < num; i++) {
1253 ctx.urbs[i] = usb_alloc_urb(0, GFP_KERNEL);
1254 if (!ctx.urbs[i])
1255 goto free_urbs;
1256 usb_fill_bulk_urb(ctx.urbs[i], udev, pipe, buf, size,
1257 unlink_queued_callback, &ctx);
1258 ctx.urbs[i]->transfer_dma = buf_dma;
1259 ctx.urbs[i]->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
1260 }
1261
1262 /* Submit all the URBs and then unlink URBs num - 4 and num - 2. */
1263 for (i = 0; i < num; i++) {
1264 atomic_inc(&ctx.pending);
1265 retval = usb_submit_urb(ctx.urbs[i], GFP_KERNEL);
1266 if (retval != 0) {
1267 dev_err(&dev->intf->dev, "submit urbs[%d] fail %d\n",
1268 i, retval);
1269 atomic_dec(&ctx.pending);
1270 ctx.status = retval;
1271 break;
1272 }
1273 }
1274 if (i == num) {
1275 usb_unlink_urb(ctx.urbs[num - 4]);
1276 usb_unlink_urb(ctx.urbs[num - 2]);
1277 } else {
1278 while (--i >= 0)
1279 usb_unlink_urb(ctx.urbs[i]);
1280 }
1281
1282 if (atomic_dec_and_test(&ctx.pending)) /* The extra count */
1283 complete(&ctx.complete);
1284 wait_for_completion(&ctx.complete);
1285 retval = ctx.status;
1286
1287 free_urbs:
1288 for (i = 0; i < num; i++)
1289 usb_free_urb(ctx.urbs[i]);
1290 kfree(ctx.urbs);
1291 free_buf:
1292 usb_free_coherent(udev, size, buf, buf_dma);
1293 return retval;
1294}
1295
1296/*-------------------------------------------------------------------------*/
1297
1198static int verify_not_halted(struct usbtest_dev *tdev, int ep, struct urb *urb) 1298static int verify_not_halted(struct usbtest_dev *tdev, int ep, struct urb *urb)
1199{ 1299{
1200 int retval; 1300 int retval;
@@ -1970,8 +2070,6 @@ usbtest_ioctl(struct usb_interface *intf, unsigned int code, void *buf)
1970 dev->in_iso_pipe, dev->iso_in, 0); 2070 dev->in_iso_pipe, dev->iso_in, 0);
1971 break; 2071 break;
1972 2072
1973 /* FIXME unlink from queue (ring with N urbs) */
1974
1975 /* FIXME scatterlist cancel (needs helper thread) */ 2073 /* FIXME scatterlist cancel (needs helper thread) */
1976 2074
1977 /* Tests for bulk I/O using DMA mapping by core and odd address */ 2075 /* Tests for bulk I/O using DMA mapping by core and odd address */
@@ -2064,6 +2162,26 @@ usbtest_ioctl(struct usb_interface *intf, unsigned int code, void *buf)
2064 dev->in_iso_pipe, dev->iso_in, 1); 2162 dev->in_iso_pipe, dev->iso_in, 1);
2065 break; 2163 break;
2066 2164
2165 /* unlink URBs from a bulk-OUT queue */
2166 case 24:
2167 if (dev->out_pipe == 0 || !param->length || param->sglen < 4)
2168 break;
2169 retval = 0;
2170 dev_info(&intf->dev, "TEST 17: unlink from %d queues of "
2171 "%d %d-byte writes\n",
2172 param->iterations, param->sglen, param->length);
2173 for (i = param->iterations; retval == 0 && i > 0; --i) {
2174 retval = unlink_queued(dev, dev->out_pipe,
2175 param->sglen, param->length);
2176 if (retval) {
2177 dev_err(&intf->dev,
2178 "unlink queued writes failed %d, "
2179 "iterations left %d\n", retval, i);
2180 break;
2181 }
2182 }
2183 break;
2184
2067 } 2185 }
2068 do_gettimeofday(&param->duration); 2186 do_gettimeofday(&param->duration);
2069 param->duration.tv_sec -= start.tv_sec; 2187 param->duration.tv_sec -= start.tv_sec;
@@ -2192,6 +2310,9 @@ usbtest_probe(struct usb_interface *intf, const struct usb_device_id *id)
2192 case USB_SPEED_HIGH: 2310 case USB_SPEED_HIGH:
2193 tmp = "high"; 2311 tmp = "high";
2194 break; 2312 break;
2313 case USB_SPEED_SUPER:
2314 tmp = "super";
2315 break;
2195 default: 2316 default:
2196 tmp = "unknown"; 2317 tmp = "unknown";
2197 break; 2318 break;
diff --git a/drivers/usb/musb/am35x.c b/drivers/usb/musb/am35x.c
index d5a3da37c90c..9e6209f87d3b 100644
--- a/drivers/usb/musb/am35x.c
+++ b/drivers/usb/musb/am35x.c
@@ -151,7 +151,8 @@ static void otg_timer(unsigned long _musb)
151 * status change events (from the transceiver) otherwise. 151 * status change events (from the transceiver) otherwise.
152 */ 152 */
153 devctl = musb_readb(mregs, MUSB_DEVCTL); 153 devctl = musb_readb(mregs, MUSB_DEVCTL);
154 DBG(7, "Poll devctl %02x (%s)\n", devctl, otg_state_string(musb)); 154 DBG(7, "Poll devctl %02x (%s)\n", devctl,
155 otg_state_string(musb->xceiv->state));
155 156
156 spin_lock_irqsave(&musb->lock, flags); 157 spin_lock_irqsave(&musb->lock, flags);
157 switch (musb->xceiv->state) { 158 switch (musb->xceiv->state) {
@@ -202,7 +203,8 @@ static void am35x_musb_try_idle(struct musb *musb, unsigned long timeout)
202 /* Never idle if active, or when VBUS timeout is not set as host */ 203 /* Never idle if active, or when VBUS timeout is not set as host */
203 if (musb->is_active || (musb->a_wait_bcon == 0 && 204 if (musb->is_active || (musb->a_wait_bcon == 0 &&
204 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 205 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
205 DBG(4, "%s active, deleting timer\n", otg_state_string(musb)); 206 DBG(4, "%s active, deleting timer\n",
207 otg_state_string(musb->xceiv->state));
206 del_timer(&otg_workaround); 208 del_timer(&otg_workaround);
207 last_timer = jiffies; 209 last_timer = jiffies;
208 return; 210 return;
@@ -215,7 +217,8 @@ static void am35x_musb_try_idle(struct musb *musb, unsigned long timeout)
215 last_timer = timeout; 217 last_timer = timeout;
216 218
217 DBG(4, "%s inactive, starting idle timer for %u ms\n", 219 DBG(4, "%s inactive, starting idle timer for %u ms\n",
218 otg_state_string(musb), jiffies_to_msecs(timeout - jiffies)); 220 otg_state_string(musb->xceiv->state),
221 jiffies_to_msecs(timeout - jiffies));
219 mod_timer(&otg_workaround, timeout); 222 mod_timer(&otg_workaround, timeout);
220} 223}
221 224
@@ -304,7 +307,7 @@ static irqreturn_t am35x_musb_interrupt(int irq, void *hci)
304 /* NOTE: this must complete power-on within 100 ms. */ 307 /* NOTE: this must complete power-on within 100 ms. */
305 DBG(2, "VBUS %s (%s)%s, devctl %02x\n", 308 DBG(2, "VBUS %s (%s)%s, devctl %02x\n",
306 drvvbus ? "on" : "off", 309 drvvbus ? "on" : "off",
307 otg_state_string(musb), 310 otg_state_string(musb->xceiv->state),
308 err ? " ERROR" : "", 311 err ? " ERROR" : "",
309 devctl); 312 devctl);
310 ret = IRQ_HANDLED; 313 ret = IRQ_HANDLED;
diff --git a/drivers/usb/musb/blackfin.c b/drivers/usb/musb/blackfin.c
index 8e2a1ff8a35a..e141d89656e1 100644
--- a/drivers/usb/musb/blackfin.c
+++ b/drivers/usb/musb/blackfin.c
@@ -279,12 +279,13 @@ static void musb_conn_timer_handler(unsigned long _musb)
279 } 279 }
280 break; 280 break;
281 default: 281 default:
282 DBG(1, "%s state not handled\n", otg_state_string(musb)); 282 DBG(1, "%s state not handled\n",
283 otg_state_string(musb->xceiv->state));
283 break; 284 break;
284 } 285 }
285 spin_unlock_irqrestore(&musb->lock, flags); 286 spin_unlock_irqrestore(&musb->lock, flags);
286 287
287 DBG(4, "state is %s\n", otg_state_string(musb)); 288 DBG(4, "state is %s\n", otg_state_string(musb->xceiv->state));
288} 289}
289 290
290static void bfin_musb_enable(struct musb *musb) 291static void bfin_musb_enable(struct musb *musb)
@@ -308,7 +309,7 @@ static void bfin_musb_set_vbus(struct musb *musb, int is_on)
308 309
309 DBG(1, "VBUS %s, devctl %02x " 310 DBG(1, "VBUS %s, devctl %02x "
310 /* otg %3x conf %08x prcm %08x */ "\n", 311 /* otg %3x conf %08x prcm %08x */ "\n",
311 otg_state_string(musb), 312 otg_state_string(musb->xceiv->state),
312 musb_readb(musb->mregs, MUSB_DEVCTL)); 313 musb_readb(musb->mregs, MUSB_DEVCTL));
313} 314}
314 315
diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c
index 69a0da3c8f09..0d8984993a38 100644
--- a/drivers/usb/musb/da8xx.c
+++ b/drivers/usb/musb/da8xx.c
@@ -199,7 +199,8 @@ static void otg_timer(unsigned long _musb)
199 * status change events (from the transceiver) otherwise. 199 * status change events (from the transceiver) otherwise.
200 */ 200 */
201 devctl = musb_readb(mregs, MUSB_DEVCTL); 201 devctl = musb_readb(mregs, MUSB_DEVCTL);
202 DBG(7, "Poll devctl %02x (%s)\n", devctl, otg_state_string(musb)); 202 DBG(7, "Poll devctl %02x (%s)\n", devctl,
203 otg_state_string(musb->xceiv->state));
203 204
204 spin_lock_irqsave(&musb->lock, flags); 205 spin_lock_irqsave(&musb->lock, flags);
205 switch (musb->xceiv->state) { 206 switch (musb->xceiv->state) {
@@ -273,7 +274,8 @@ static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
273 /* Never idle if active, or when VBUS timeout is not set as host */ 274 /* Never idle if active, or when VBUS timeout is not set as host */
274 if (musb->is_active || (musb->a_wait_bcon == 0 && 275 if (musb->is_active || (musb->a_wait_bcon == 0 &&
275 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 276 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
276 DBG(4, "%s active, deleting timer\n", otg_state_string(musb)); 277 DBG(4, "%s active, deleting timer\n",
278 otg_state_string(musb->xceiv->state));
277 del_timer(&otg_workaround); 279 del_timer(&otg_workaround);
278 last_timer = jiffies; 280 last_timer = jiffies;
279 return; 281 return;
@@ -286,7 +288,8 @@ static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
286 last_timer = timeout; 288 last_timer = timeout;
287 289
288 DBG(4, "%s inactive, starting idle timer for %u ms\n", 290 DBG(4, "%s inactive, starting idle timer for %u ms\n",
289 otg_state_string(musb), jiffies_to_msecs(timeout - jiffies)); 291 otg_state_string(musb->xceiv->state),
292 jiffies_to_msecs(timeout - jiffies));
290 mod_timer(&otg_workaround, timeout); 293 mod_timer(&otg_workaround, timeout);
291} 294}
292 295
@@ -365,7 +368,7 @@ static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
365 368
366 DBG(2, "VBUS %s (%s)%s, devctl %02x\n", 369 DBG(2, "VBUS %s (%s)%s, devctl %02x\n",
367 drvvbus ? "on" : "off", 370 drvvbus ? "on" : "off",
368 otg_state_string(musb), 371 otg_state_string(musb->xceiv->state),
369 err ? " ERROR" : "", 372 err ? " ERROR" : "",
370 devctl); 373 devctl);
371 ret = IRQ_HANDLED; 374 ret = IRQ_HANDLED;
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index e6de097fb7e8..3661b81a9571 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -220,7 +220,8 @@ static void otg_timer(unsigned long _musb)
220 * status change events (from the transceiver) otherwise. 220 * status change events (from the transceiver) otherwise.
221 */ 221 */
222 devctl = musb_readb(mregs, MUSB_DEVCTL); 222 devctl = musb_readb(mregs, MUSB_DEVCTL);
223 DBG(7, "poll devctl %02x (%s)\n", devctl, otg_state_string(musb)); 223 DBG(7, "poll devctl %02x (%s)\n", devctl,
224 otg_state_string(musb->xceiv->state));
224 225
225 spin_lock_irqsave(&musb->lock, flags); 226 spin_lock_irqsave(&musb->lock, flags);
226 switch (musb->xceiv->state) { 227 switch (musb->xceiv->state) {
@@ -356,7 +357,7 @@ static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
356 davinci_musb_source_power(musb, drvvbus, 0); 357 davinci_musb_source_power(musb, drvvbus, 0);
357 DBG(2, "VBUS %s (%s)%s, devctl %02x\n", 358 DBG(2, "VBUS %s (%s)%s, devctl %02x\n",
358 drvvbus ? "on" : "off", 359 drvvbus ? "on" : "off",
359 otg_state_string(musb), 360 otg_state_string(musb->xceiv->state),
360 err ? " ERROR" : "", 361 err ? " ERROR" : "",
361 devctl); 362 devctl);
362 retval = IRQ_HANDLED; 363 retval = IRQ_HANDLED;
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index f10ff00ca09e..9a280872c2b4 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -333,26 +333,6 @@ void musb_load_testpacket(struct musb *musb)
333 333
334/*-------------------------------------------------------------------------*/ 334/*-------------------------------------------------------------------------*/
335 335
336const char *otg_state_string(struct musb *musb)
337{
338 switch (musb->xceiv->state) {
339 case OTG_STATE_A_IDLE: return "a_idle";
340 case OTG_STATE_A_WAIT_VRISE: return "a_wait_vrise";
341 case OTG_STATE_A_WAIT_BCON: return "a_wait_bcon";
342 case OTG_STATE_A_HOST: return "a_host";
343 case OTG_STATE_A_SUSPEND: return "a_suspend";
344 case OTG_STATE_A_PERIPHERAL: return "a_peripheral";
345 case OTG_STATE_A_WAIT_VFALL: return "a_wait_vfall";
346 case OTG_STATE_A_VBUS_ERR: return "a_vbus_err";
347 case OTG_STATE_B_IDLE: return "b_idle";
348 case OTG_STATE_B_SRP_INIT: return "b_srp_init";
349 case OTG_STATE_B_PERIPHERAL: return "b_peripheral";
350 case OTG_STATE_B_WAIT_ACON: return "b_wait_acon";
351 case OTG_STATE_B_HOST: return "b_host";
352 default: return "UNDEFINED";
353 }
354}
355
356#ifdef CONFIG_USB_MUSB_OTG 336#ifdef CONFIG_USB_MUSB_OTG
357 337
358/* 338/*
@@ -373,12 +353,14 @@ void musb_otg_timer_func(unsigned long data)
373 break; 353 break;
374 case OTG_STATE_A_SUSPEND: 354 case OTG_STATE_A_SUSPEND:
375 case OTG_STATE_A_WAIT_BCON: 355 case OTG_STATE_A_WAIT_BCON:
376 DBG(1, "HNP: %s timeout\n", otg_state_string(musb)); 356 DBG(1, "HNP: %s timeout\n",
357 otg_state_string(musb->xceiv->state));
377 musb_platform_set_vbus(musb, 0); 358 musb_platform_set_vbus(musb, 0);
378 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 359 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
379 break; 360 break;
380 default: 361 default:
381 DBG(1, "HNP: Unhandled mode %s\n", otg_state_string(musb)); 362 DBG(1, "HNP: Unhandled mode %s\n",
363 otg_state_string(musb->xceiv->state));
382 } 364 }
383 musb->ignore_disconnect = 0; 365 musb->ignore_disconnect = 0;
384 spin_unlock_irqrestore(&musb->lock, flags); 366 spin_unlock_irqrestore(&musb->lock, flags);
@@ -393,12 +375,13 @@ void musb_hnp_stop(struct musb *musb)
393 void __iomem *mbase = musb->mregs; 375 void __iomem *mbase = musb->mregs;
394 u8 reg; 376 u8 reg;
395 377
396 DBG(1, "HNP: stop from %s\n", otg_state_string(musb)); 378 DBG(1, "HNP: stop from %s\n", otg_state_string(musb->xceiv->state));
397 379
398 switch (musb->xceiv->state) { 380 switch (musb->xceiv->state) {
399 case OTG_STATE_A_PERIPHERAL: 381 case OTG_STATE_A_PERIPHERAL:
400 musb_g_disconnect(musb); 382 musb_g_disconnect(musb);
401 DBG(1, "HNP: back to %s\n", otg_state_string(musb)); 383 DBG(1, "HNP: back to %s\n",
384 otg_state_string(musb->xceiv->state));
402 break; 385 break;
403 case OTG_STATE_B_HOST: 386 case OTG_STATE_B_HOST:
404 DBG(1, "HNP: Disabling HR\n"); 387 DBG(1, "HNP: Disabling HR\n");
@@ -412,7 +395,7 @@ void musb_hnp_stop(struct musb *musb)
412 break; 395 break;
413 default: 396 default:
414 DBG(1, "HNP: Stopping in unknown state %s\n", 397 DBG(1, "HNP: Stopping in unknown state %s\n",
415 otg_state_string(musb)); 398 otg_state_string(musb->xceiv->state));
416 } 399 }
417 400
418 /* 401 /*
@@ -451,7 +434,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
451 */ 434 */
452 if (int_usb & MUSB_INTR_RESUME) { 435 if (int_usb & MUSB_INTR_RESUME) {
453 handled = IRQ_HANDLED; 436 handled = IRQ_HANDLED;
454 DBG(3, "RESUME (%s)\n", otg_state_string(musb)); 437 DBG(3, "RESUME (%s)\n", otg_state_string(musb->xceiv->state));
455 438
456 if (devctl & MUSB_DEVCTL_HM) { 439 if (devctl & MUSB_DEVCTL_HM) {
457#ifdef CONFIG_USB_MUSB_HDRC_HCD 440#ifdef CONFIG_USB_MUSB_HDRC_HCD
@@ -492,7 +475,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
492 default: 475 default:
493 WARNING("bogus %s RESUME (%s)\n", 476 WARNING("bogus %s RESUME (%s)\n",
494 "host", 477 "host",
495 otg_state_string(musb)); 478 otg_state_string(musb->xceiv->state));
496 } 479 }
497#endif 480#endif
498 } else { 481 } else {
@@ -526,7 +509,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
526 default: 509 default:
527 WARNING("bogus %s RESUME (%s)\n", 510 WARNING("bogus %s RESUME (%s)\n",
528 "peripheral", 511 "peripheral",
529 otg_state_string(musb)); 512 otg_state_string(musb->xceiv->state));
530 } 513 }
531 } 514 }
532 } 515 }
@@ -542,7 +525,8 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
542 return IRQ_HANDLED; 525 return IRQ_HANDLED;
543 } 526 }
544 527
545 DBG(1, "SESSION_REQUEST (%s)\n", otg_state_string(musb)); 528 DBG(1, "SESSION_REQUEST (%s)\n",
529 otg_state_string(musb->xceiv->state));
546 530
547 /* IRQ arrives from ID pin sense or (later, if VBUS power 531 /* IRQ arrives from ID pin sense or (later, if VBUS power
548 * is removed) SRP. responses are time critical: 532 * is removed) SRP. responses are time critical:
@@ -607,7 +591,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
607 } 591 }
608 592
609 DBG(1, "VBUS_ERROR in %s (%02x, %s), retry #%d, port1 %08x\n", 593 DBG(1, "VBUS_ERROR in %s (%02x, %s), retry #%d, port1 %08x\n",
610 otg_state_string(musb), 594 otg_state_string(musb->xceiv->state),
611 devctl, 595 devctl,
612 ({ char *s; 596 ({ char *s;
613 switch (devctl & MUSB_DEVCTL_VBUS) { 597 switch (devctl & MUSB_DEVCTL_VBUS) {
@@ -633,7 +617,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
633#endif 617#endif
634 if (int_usb & MUSB_INTR_SUSPEND) { 618 if (int_usb & MUSB_INTR_SUSPEND) {
635 DBG(1, "SUSPEND (%s) devctl %02x power %02x\n", 619 DBG(1, "SUSPEND (%s) devctl %02x power %02x\n",
636 otg_state_string(musb), devctl, power); 620 otg_state_string(musb->xceiv->state), devctl, power);
637 handled = IRQ_HANDLED; 621 handled = IRQ_HANDLED;
638 622
639 switch (musb->xceiv->state) { 623 switch (musb->xceiv->state) {
@@ -758,13 +742,13 @@ b_host:
758 usb_hcd_resume_root_hub(hcd); 742 usb_hcd_resume_root_hub(hcd);
759 743
760 DBG(1, "CONNECT (%s) devctl %02x\n", 744 DBG(1, "CONNECT (%s) devctl %02x\n",
761 otg_state_string(musb), devctl); 745 otg_state_string(musb->xceiv->state), devctl);
762 } 746 }
763#endif /* CONFIG_USB_MUSB_HDRC_HCD */ 747#endif /* CONFIG_USB_MUSB_HDRC_HCD */
764 748
765 if ((int_usb & MUSB_INTR_DISCONNECT) && !musb->ignore_disconnect) { 749 if ((int_usb & MUSB_INTR_DISCONNECT) && !musb->ignore_disconnect) {
766 DBG(1, "DISCONNECT (%s) as %s, devctl %02x\n", 750 DBG(1, "DISCONNECT (%s) as %s, devctl %02x\n",
767 otg_state_string(musb), 751 otg_state_string(musb->xceiv->state),
768 MUSB_MODE(musb), devctl); 752 MUSB_MODE(musb), devctl);
769 handled = IRQ_HANDLED; 753 handled = IRQ_HANDLED;
770 754
@@ -807,7 +791,7 @@ b_host:
807#endif /* GADGET */ 791#endif /* GADGET */
808 default: 792 default:
809 WARNING("unhandled DISCONNECT transition (%s)\n", 793 WARNING("unhandled DISCONNECT transition (%s)\n",
810 otg_state_string(musb)); 794 otg_state_string(musb->xceiv->state));
811 break; 795 break;
812 } 796 }
813 } 797 }
@@ -832,7 +816,8 @@ b_host:
832 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 816 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
833 } 817 }
834 } else if (is_peripheral_capable()) { 818 } else if (is_peripheral_capable()) {
835 DBG(1, "BUS RESET as %s\n", otg_state_string(musb)); 819 DBG(1, "BUS RESET as %s\n",
820 otg_state_string(musb->xceiv->state));
836 switch (musb->xceiv->state) { 821 switch (musb->xceiv->state) {
837#ifdef CONFIG_USB_OTG 822#ifdef CONFIG_USB_OTG
838 case OTG_STATE_A_SUSPEND: 823 case OTG_STATE_A_SUSPEND:
@@ -846,8 +831,8 @@ b_host:
846 case OTG_STATE_A_WAIT_BCON: /* OPT TD.4.7-900ms */ 831 case OTG_STATE_A_WAIT_BCON: /* OPT TD.4.7-900ms */
847 /* never use invalid T(a_wait_bcon) */ 832 /* never use invalid T(a_wait_bcon) */
848 DBG(1, "HNP: in %s, %d msec timeout\n", 833 DBG(1, "HNP: in %s, %d msec timeout\n",
849 otg_state_string(musb), 834 otg_state_string(musb->xceiv->state),
850 TA_WAIT_BCON(musb)); 835 TA_WAIT_BCON(musb));
851 mod_timer(&musb->otg_timer, jiffies 836 mod_timer(&musb->otg_timer, jiffies
852 + msecs_to_jiffies(TA_WAIT_BCON(musb))); 837 + msecs_to_jiffies(TA_WAIT_BCON(musb)));
853 break; 838 break;
@@ -858,7 +843,7 @@ b_host:
858 break; 843 break;
859 case OTG_STATE_B_WAIT_ACON: 844 case OTG_STATE_B_WAIT_ACON:
860 DBG(1, "HNP: RESET (%s), to b_peripheral\n", 845 DBG(1, "HNP: RESET (%s), to b_peripheral\n",
861 otg_state_string(musb)); 846 otg_state_string(musb->xceiv->state));
862 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; 847 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
863 musb_g_reset(musb); 848 musb_g_reset(musb);
864 break; 849 break;
@@ -871,7 +856,7 @@ b_host:
871 break; 856 break;
872 default: 857 default:
873 DBG(1, "Unhandled BUS RESET as %s\n", 858 DBG(1, "Unhandled BUS RESET as %s\n",
874 otg_state_string(musb)); 859 otg_state_string(musb->xceiv->state));
875 } 860 }
876 } 861 }
877 } 862 }
@@ -1713,7 +1698,7 @@ musb_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
1713 int ret = -EINVAL; 1698 int ret = -EINVAL;
1714 1699
1715 spin_lock_irqsave(&musb->lock, flags); 1700 spin_lock_irqsave(&musb->lock, flags);
1716 ret = sprintf(buf, "%s\n", otg_state_string(musb)); 1701 ret = sprintf(buf, "%s\n", otg_state_string(musb->xceiv->state));
1717 spin_unlock_irqrestore(&musb->lock, flags); 1702 spin_unlock_irqrestore(&musb->lock, flags);
1718 1703
1719 return ret; 1704 return ret;
diff --git a/drivers/usb/musb/musb_debug.h b/drivers/usb/musb/musb_debug.h
index 94f6973cf8f7..f958a49a0124 100644
--- a/drivers/usb/musb/musb_debug.h
+++ b/drivers/usb/musb/musb_debug.h
@@ -54,8 +54,6 @@ static inline int _dbg_level(unsigned l)
54 return musb_debug >= l; 54 return musb_debug >= l;
55} 55}
56 56
57extern const char *otg_state_string(struct musb *);
58
59#ifdef CONFIG_DEBUG_FS 57#ifdef CONFIG_DEBUG_FS
60extern int musb_init_debugfs(struct musb *musb); 58extern int musb_init_debugfs(struct musb *musb);
61extern void musb_exit_debugfs(struct musb *musb); 59extern void musb_exit_debugfs(struct musb *musb);
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index f47c20197c61..cfbee4dcfc13 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -1556,7 +1556,8 @@ static int musb_gadget_wakeup(struct usb_gadget *gadget)
1556 status = 0; 1556 status = 0;
1557 goto done; 1557 goto done;
1558 default: 1558 default:
1559 DBG(2, "Unhandled wake: %s\n", otg_state_string(musb)); 1559 DBG(2, "Unhandled wake: %s\n",
1560 otg_state_string(musb->xceiv->state));
1560 goto done; 1561 goto done;
1561 } 1562 }
1562 1563
@@ -2037,7 +2038,7 @@ void musb_g_resume(struct musb *musb)
2037 break; 2038 break;
2038 default: 2039 default:
2039 WARNING("unhandled RESUME transition (%s)\n", 2040 WARNING("unhandled RESUME transition (%s)\n",
2040 otg_state_string(musb)); 2041 otg_state_string(musb->xceiv->state));
2041 } 2042 }
2042} 2043}
2043 2044
@@ -2067,7 +2068,7 @@ void musb_g_suspend(struct musb *musb)
2067 * A_PERIPHERAL may need care too 2068 * A_PERIPHERAL may need care too
2068 */ 2069 */
2069 WARNING("unhandled SUSPEND transition (%s)\n", 2070 WARNING("unhandled SUSPEND transition (%s)\n",
2070 otg_state_string(musb)); 2071 otg_state_string(musb->xceiv->state));
2071 } 2072 }
2072} 2073}
2073 2074
@@ -2102,7 +2103,7 @@ void musb_g_disconnect(struct musb *musb)
2102 default: 2103 default:
2103#ifdef CONFIG_USB_MUSB_OTG 2104#ifdef CONFIG_USB_MUSB_OTG
2104 DBG(2, "Unhandled disconnect %s, setting a_idle\n", 2105 DBG(2, "Unhandled disconnect %s, setting a_idle\n",
2105 otg_state_string(musb)); 2106 otg_state_string(musb->xceiv->state));
2106 musb->xceiv->state = OTG_STATE_A_IDLE; 2107 musb->xceiv->state = OTG_STATE_A_IDLE;
2107 MUSB_HST_MODE(musb); 2108 MUSB_HST_MODE(musb);
2108 break; 2109 break;
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 5eef4a8847db..07b106c7de82 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -2304,7 +2304,7 @@ static int musb_bus_suspend(struct usb_hcd *hcd)
2304 2304
2305 if (musb->is_active) { 2305 if (musb->is_active) {
2306 WARNING("trying to suspend as %s while active\n", 2306 WARNING("trying to suspend as %s while active\n",
2307 otg_state_string(musb)); 2307 otg_state_string(musb->xceiv->state));
2308 return -EBUSY; 2308 return -EBUSY;
2309 } else 2309 } else
2310 return 0; 2310 return 0;
diff --git a/drivers/usb/musb/musb_virthub.c b/drivers/usb/musb/musb_virthub.c
index 489104a5ae14..bb1247d5fd04 100644
--- a/drivers/usb/musb/musb_virthub.c
+++ b/drivers/usb/musb/musb_virthub.c
@@ -98,7 +98,7 @@ static void musb_port_suspend(struct musb *musb, bool do_suspend)
98#endif 98#endif
99 default: 99 default:
100 DBG(1, "bogus rh suspend? %s\n", 100 DBG(1, "bogus rh suspend? %s\n",
101 otg_state_string(musb)); 101 otg_state_string(musb->xceiv->state));
102 } 102 }
103 } else if (power & MUSB_POWER_SUSPENDM) { 103 } else if (power & MUSB_POWER_SUSPENDM) {
104 power &= ~MUSB_POWER_SUSPENDM; 104 power &= ~MUSB_POWER_SUSPENDM;
@@ -208,7 +208,8 @@ void musb_root_disconnect(struct musb *musb)
208 musb->xceiv->state = OTG_STATE_B_IDLE; 208 musb->xceiv->state = OTG_STATE_B_IDLE;
209 break; 209 break;
210 default: 210 default:
211 DBG(1, "host disconnect (%s)\n", otg_state_string(musb)); 211 DBG(1, "host disconnect (%s)\n",
212 otg_state_string(musb->xceiv->state));
212 } 213 }
213} 214}
214 215
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index e9e60b6e0583..b996fec84c29 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -114,7 +114,8 @@ static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
114 /* Never idle if active, or when VBUS timeout is not set as host */ 114 /* Never idle if active, or when VBUS timeout is not set as host */
115 if (musb->is_active || ((musb->a_wait_bcon == 0) 115 if (musb->is_active || ((musb->a_wait_bcon == 0)
116 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) { 116 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
117 DBG(4, "%s active, deleting timer\n", otg_state_string(musb)); 117 DBG(4, "%s active, deleting timer\n",
118 otg_state_string(musb->xceiv->state));
118 del_timer(&musb_idle_timer); 119 del_timer(&musb_idle_timer);
119 last_timer = jiffies; 120 last_timer = jiffies;
120 return; 121 return;
@@ -131,7 +132,7 @@ static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
131 last_timer = timeout; 132 last_timer = timeout;
132 133
133 DBG(4, "%s inactive, for idle timer for %lu ms\n", 134 DBG(4, "%s inactive, for idle timer for %lu ms\n",
134 otg_state_string(musb), 135 otg_state_string(musb->xceiv->state),
135 (unsigned long)jiffies_to_msecs(timeout - jiffies)); 136 (unsigned long)jiffies_to_msecs(timeout - jiffies));
136 mod_timer(&musb_idle_timer, timeout); 137 mod_timer(&musb_idle_timer, timeout);
137} 138}
@@ -195,7 +196,7 @@ static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
195 196
196 DBG(1, "VBUS %s, devctl %02x " 197 DBG(1, "VBUS %s, devctl %02x "
197 /* otg %3x conf %08x prcm %08x */ "\n", 198 /* otg %3x conf %08x prcm %08x */ "\n",
198 otg_state_string(musb), 199 otg_state_string(musb->xceiv->state),
199 musb_readb(musb->mregs, MUSB_DEVCTL)); 200 musb_readb(musb->mregs, MUSB_DEVCTL));
200} 201}
201 202
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
index c47aac4a1f98..221feaaded72 100644
--- a/drivers/usb/musb/tusb6010.c
+++ b/drivers/usb/musb/tusb6010.c
@@ -422,7 +422,7 @@ static void musb_do_idle(unsigned long _musb)
422 && (musb->idle_timeout == 0 422 && (musb->idle_timeout == 0
423 || time_after(jiffies, musb->idle_timeout))) { 423 || time_after(jiffies, musb->idle_timeout))) {
424 DBG(4, "Nothing connected %s, turning off VBUS\n", 424 DBG(4, "Nothing connected %s, turning off VBUS\n",
425 otg_state_string(musb)); 425 otg_state_string(musb->xceiv->state));
426 } 426 }
427 /* FALLTHROUGH */ 427 /* FALLTHROUGH */
428 case OTG_STATE_A_IDLE: 428 case OTG_STATE_A_IDLE:
@@ -481,7 +481,8 @@ static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout)
481 /* Never idle if active, or when VBUS timeout is not set as host */ 481 /* Never idle if active, or when VBUS timeout is not set as host */
482 if (musb->is_active || ((musb->a_wait_bcon == 0) 482 if (musb->is_active || ((musb->a_wait_bcon == 0)
483 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) { 483 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
484 DBG(4, "%s active, deleting timer\n", otg_state_string(musb)); 484 DBG(4, "%s active, deleting timer\n",
485 otg_state_string(musb->xceiv->state));
485 del_timer(&musb_idle_timer); 486 del_timer(&musb_idle_timer);
486 last_timer = jiffies; 487 last_timer = jiffies;
487 return; 488 return;
@@ -498,7 +499,7 @@ static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout)
498 last_timer = timeout; 499 last_timer = timeout;
499 500
500 DBG(4, "%s inactive, for idle timer for %lu ms\n", 501 DBG(4, "%s inactive, for idle timer for %lu ms\n",
501 otg_state_string(musb), 502 otg_state_string(musb->xceiv->state),
502 (unsigned long)jiffies_to_msecs(timeout - jiffies)); 503 (unsigned long)jiffies_to_msecs(timeout - jiffies));
503 mod_timer(&musb_idle_timer, timeout); 504 mod_timer(&musb_idle_timer, timeout);
504} 505}
@@ -573,7 +574,7 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
573 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 574 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
574 575
575 DBG(1, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n", 576 DBG(1, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n",
576 otg_state_string(musb), 577 otg_state_string(musb->xceiv->state),
577 musb_readb(musb->mregs, MUSB_DEVCTL), 578 musb_readb(musb->mregs, MUSB_DEVCTL),
578 musb_readl(tbase, TUSB_DEV_OTG_STAT), 579 musb_readl(tbase, TUSB_DEV_OTG_STAT),
579 conf, prcm); 580 conf, prcm);
@@ -702,13 +703,13 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
702 musb->is_active = 0; 703 musb->is_active = 0;
703 } 704 }
704 DBG(2, "vbus change, %s, otg %03x\n", 705 DBG(2, "vbus change, %s, otg %03x\n",
705 otg_state_string(musb), otg_stat); 706 otg_state_string(musb->xceiv->state), otg_stat);
706 idle_timeout = jiffies + (1 * HZ); 707 idle_timeout = jiffies + (1 * HZ);
707 schedule_work(&musb->irq_work); 708 schedule_work(&musb->irq_work);
708 709
709 } else /* A-dev state machine */ { 710 } else /* A-dev state machine */ {
710 DBG(2, "vbus change, %s, otg %03x\n", 711 DBG(2, "vbus change, %s, otg %03x\n",
711 otg_state_string(musb), otg_stat); 712 otg_state_string(musb->xceiv->state), otg_stat);
712 713
713 switch (musb->xceiv->state) { 714 switch (musb->xceiv->state) {
714 case OTG_STATE_A_IDLE: 715 case OTG_STATE_A_IDLE:
@@ -756,7 +757,8 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
756 if (int_src & TUSB_INT_SRC_OTG_TIMEOUT) { 757 if (int_src & TUSB_INT_SRC_OTG_TIMEOUT) {
757 u8 devctl; 758 u8 devctl;
758 759
759 DBG(4, "%s timer, %03x\n", otg_state_string(musb), otg_stat); 760 DBG(4, "%s timer, %03x\n",
761 otg_state_string(musb->xceiv->state), otg_stat);
760 762
761 switch (musb->xceiv->state) { 763 switch (musb->xceiv->state) {
762 case OTG_STATE_A_WAIT_VRISE: 764 case OTG_STATE_A_WAIT_VRISE:
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index daf3e5f1a0e7..c66481ad98d7 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -122,4 +122,12 @@ config AB8500_USB
122 This transceiver supports high and full speed devices plus, 122 This transceiver supports high and full speed devices plus,
123 in host mode, low speed. 123 in host mode, low speed.
124 124
125config FSL_USB2_OTG
126 bool "Freescale USB OTG Transceiver Driver"
127 depends on USB_EHCI_FSL && USB_GADGET_FSL_USB2
128 select USB_OTG
129 select USB_OTG_UTILS
130 help
131 Enable this to support Freescale USB OTG transceiver.
132
125endif # USB || OTG 133endif # USB || OTG
diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
index e22d917de017..566655c53331 100644
--- a/drivers/usb/otg/Makefile
+++ b/drivers/usb/otg/Makefile
@@ -19,3 +19,5 @@ obj-$(CONFIG_USB_ULPI) += ulpi.o
19obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o 19obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o
20obj-$(CONFIG_USB_MSM_OTG) += msm_otg.o 20obj-$(CONFIG_USB_MSM_OTG) += msm_otg.o
21obj-$(CONFIG_AB8500_USB) += ab8500-usb.o 21obj-$(CONFIG_AB8500_USB) += ab8500-usb.o
22fsl_usb2_otg-objs := fsl_otg.o otg_fsm.o
23obj-$(CONFIG_FSL_USB2_OTG) += fsl_usb2_otg.o
diff --git a/drivers/usb/otg/fsl_otg.c b/drivers/usb/otg/fsl_otg.c
new file mode 100644
index 000000000000..0f420b25e9a9
--- /dev/null
+++ b/drivers/usb/otg/fsl_otg.c
@@ -0,0 +1,1169 @@
1/*
2 * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
3 *
4 * Author: Li Yang <LeoLi@freescale.com>
5 * Jerry Huang <Chang-Ming.Huang@freescale.com>
6 *
7 * Initialization based on code from Shlomi Gridish.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <linux/proc_fs.h>
29#include <linux/errno.h>
30#include <linux/init.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/timer.h>
34#include <linux/usb.h>
35#include <linux/device.h>
36#include <linux/usb/ch9.h>
37#include <linux/usb/gadget.h>
38#include <linux/workqueue.h>
39#include <linux/time.h>
40#include <linux/fsl_devices.h>
41#include <linux/platform_device.h>
42#include <linux/uaccess.h>
43
44#include <asm/unaligned.h>
45
46#include "fsl_otg.h"
47
48#define DRIVER_VERSION "Rev. 1.55"
49#define DRIVER_AUTHOR "Jerry Huang/Li Yang"
50#define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
51#define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
52
53static const char driver_name[] = "fsl-usb2-otg";
54
55const pm_message_t otg_suspend_state = {
56 .event = 1,
57};
58
59#define HA_DATA_PULSE
60
61static struct usb_dr_mmap *usb_dr_regs;
62static struct fsl_otg *fsl_otg_dev;
63static int srp_wait_done;
64
65/* FSM timers */
66struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
67 *b_ase0_brst_tmr, *b_se0_srp_tmr;
68
69/* Driver specific timers */
70struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
71 *b_srp_wait_tmr, *a_wait_enum_tmr;
72
73static struct list_head active_timers;
74
75static struct fsl_otg_config fsl_otg_initdata = {
76 .otg_port = 1,
77};
78
79#ifdef CONFIG_PPC32
80static u32 _fsl_readl_be(const unsigned __iomem *p)
81{
82 return in_be32(p);
83}
84
85static u32 _fsl_readl_le(const unsigned __iomem *p)
86{
87 return in_le32(p);
88}
89
90static void _fsl_writel_be(u32 v, unsigned __iomem *p)
91{
92 out_be32(p, v);
93}
94
95static void _fsl_writel_le(u32 v, unsigned __iomem *p)
96{
97 out_le32(p, v);
98}
99
100static u32 (*_fsl_readl)(const unsigned __iomem *p);
101static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
102
103#define fsl_readl(p) (*_fsl_readl)((p))
104#define fsl_writel(v, p) (*_fsl_writel)((v), (p))
105
106#else
107#define fsl_readl(addr) readl(addr)
108#define fsl_writel(val, addr) writel(val, addr)
109#endif /* CONFIG_PPC32 */
110
111/* Routines to access transceiver ULPI registers */
112u8 view_ulpi(u8 addr)
113{
114 u32 temp;
115
116 temp = 0x40000000 | (addr << 16);
117 fsl_writel(temp, &usb_dr_regs->ulpiview);
118 udelay(1000);
119 while (temp & 0x40)
120 temp = fsl_readl(&usb_dr_regs->ulpiview);
121 return (le32_to_cpu(temp) & 0x0000ff00) >> 8;
122}
123
124int write_ulpi(u8 addr, u8 data)
125{
126 u32 temp;
127
128 temp = 0x60000000 | (addr << 16) | data;
129 fsl_writel(temp, &usb_dr_regs->ulpiview);
130 return 0;
131}
132
133/* -------------------------------------------------------------*/
134/* Operations that will be called from OTG Finite State Machine */
135
136/* Charge vbus for vbus pulsing in SRP */
137void fsl_otg_chrg_vbus(int on)
138{
139 u32 tmp;
140
141 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
142
143 if (on)
144 /* stop discharging, start charging */
145 tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
146 OTGSC_CTRL_VBUS_CHARGE;
147 else
148 /* stop charging */
149 tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
150
151 fsl_writel(tmp, &usb_dr_regs->otgsc);
152}
153
154/* Discharge vbus through a resistor to ground */
155void fsl_otg_dischrg_vbus(int on)
156{
157 u32 tmp;
158
159 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
160
161 if (on)
162 /* stop charging, start discharging */
163 tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
164 OTGSC_CTRL_VBUS_DISCHARGE;
165 else
166 /* stop discharging */
167 tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
168
169 fsl_writel(tmp, &usb_dr_regs->otgsc);
170}
171
172/* A-device driver vbus, controlled through PP bit in PORTSC */
173void fsl_otg_drv_vbus(int on)
174{
175 u32 tmp;
176
177 if (on) {
178 tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
179 fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
180 } else {
181 tmp = fsl_readl(&usb_dr_regs->portsc) &
182 ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
183 fsl_writel(tmp, &usb_dr_regs->portsc);
184 }
185}
186
187/*
188 * Pull-up D+, signalling connect by periperal. Also used in
189 * data-line pulsing in SRP
190 */
191void fsl_otg_loc_conn(int on)
192{
193 u32 tmp;
194
195 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
196
197 if (on)
198 tmp |= OTGSC_CTRL_DATA_PULSING;
199 else
200 tmp &= ~OTGSC_CTRL_DATA_PULSING;
201
202 fsl_writel(tmp, &usb_dr_regs->otgsc);
203}
204
205/*
206 * Generate SOF by host. This is controlled through suspend/resume the
207 * port. In host mode, controller will automatically send SOF.
208 * Suspend will block the data on the port.
209 */
210void fsl_otg_loc_sof(int on)
211{
212 u32 tmp;
213
214 tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
215 if (on)
216 tmp |= PORTSC_PORT_FORCE_RESUME;
217 else
218 tmp |= PORTSC_PORT_SUSPEND;
219
220 fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
221
222}
223
224/* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
225void fsl_otg_start_pulse(void)
226{
227 u32 tmp;
228
229 srp_wait_done = 0;
230#ifdef HA_DATA_PULSE
231 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
232 tmp |= OTGSC_HA_DATA_PULSE;
233 fsl_writel(tmp, &usb_dr_regs->otgsc);
234#else
235 fsl_otg_loc_conn(1);
236#endif
237
238 fsl_otg_add_timer(b_data_pulse_tmr);
239}
240
241void b_data_pulse_end(unsigned long foo)
242{
243#ifdef HA_DATA_PULSE
244#else
245 fsl_otg_loc_conn(0);
246#endif
247
248 /* Do VBUS pulse after data pulse */
249 fsl_otg_pulse_vbus();
250}
251
252void fsl_otg_pulse_vbus(void)
253{
254 srp_wait_done = 0;
255 fsl_otg_chrg_vbus(1);
256 /* start the timer to end vbus charge */
257 fsl_otg_add_timer(b_vbus_pulse_tmr);
258}
259
260void b_vbus_pulse_end(unsigned long foo)
261{
262 fsl_otg_chrg_vbus(0);
263
264 /*
265 * As USB3300 using the same a_sess_vld and b_sess_vld voltage
266 * we need to discharge the bus for a while to distinguish
267 * residual voltage of vbus pulsing and A device pull up
268 */
269 fsl_otg_dischrg_vbus(1);
270 fsl_otg_add_timer(b_srp_wait_tmr);
271}
272
273void b_srp_end(unsigned long foo)
274{
275 fsl_otg_dischrg_vbus(0);
276 srp_wait_done = 1;
277
278 if ((fsl_otg_dev->otg.state == OTG_STATE_B_SRP_INIT) &&
279 fsl_otg_dev->fsm.b_sess_vld)
280 fsl_otg_dev->fsm.b_srp_done = 1;
281}
282
283/*
284 * Workaround for a_host suspending too fast. When a_bus_req=0,
285 * a_host will start by SRP. It needs to set b_hnp_enable before
286 * actually suspending to start HNP
287 */
288void a_wait_enum(unsigned long foo)
289{
290 VDBG("a_wait_enum timeout\n");
291 if (!fsl_otg_dev->otg.host->b_hnp_enable)
292 fsl_otg_add_timer(a_wait_enum_tmr);
293 else
294 otg_statemachine(&fsl_otg_dev->fsm);
295}
296
297/* The timeout callback function to set time out bit */
298void set_tmout(unsigned long indicator)
299{
300 *(int *)indicator = 1;
301}
302
303/* Initialize timers */
304int fsl_otg_init_timers(struct otg_fsm *fsm)
305{
306 /* FSM used timers */
307 a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
308 (unsigned long)&fsm->a_wait_vrise_tmout);
309 if (!a_wait_vrise_tmr)
310 return -ENOMEM;
311
312 a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
313 (unsigned long)&fsm->a_wait_bcon_tmout);
314 if (!a_wait_bcon_tmr)
315 return -ENOMEM;
316
317 a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
318 (unsigned long)&fsm->a_aidl_bdis_tmout);
319 if (!a_aidl_bdis_tmr)
320 return -ENOMEM;
321
322 b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
323 (unsigned long)&fsm->b_ase0_brst_tmout);
324 if (!b_ase0_brst_tmr)
325 return -ENOMEM;
326
327 b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
328 (unsigned long)&fsm->b_se0_srp);
329 if (!b_se0_srp_tmr)
330 return -ENOMEM;
331
332 b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
333 (unsigned long)&fsm->b_srp_done);
334 if (!b_srp_fail_tmr)
335 return -ENOMEM;
336
337 a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
338 (unsigned long)&fsm);
339 if (!a_wait_enum_tmr)
340 return -ENOMEM;
341
342 /* device driver used timers */
343 b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
344 if (!b_srp_wait_tmr)
345 return -ENOMEM;
346
347 b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
348 TB_DATA_PLS, 0);
349 if (!b_data_pulse_tmr)
350 return -ENOMEM;
351
352 b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
353 TB_VBUS_PLS, 0);
354 if (!b_vbus_pulse_tmr)
355 return -ENOMEM;
356
357 return 0;
358}
359
360/* Uninitialize timers */
361void fsl_otg_uninit_timers(void)
362{
363 /* FSM used timers */
364 if (a_wait_vrise_tmr != NULL)
365 kfree(a_wait_vrise_tmr);
366 if (a_wait_bcon_tmr != NULL)
367 kfree(a_wait_bcon_tmr);
368 if (a_aidl_bdis_tmr != NULL)
369 kfree(a_aidl_bdis_tmr);
370 if (b_ase0_brst_tmr != NULL)
371 kfree(b_ase0_brst_tmr);
372 if (b_se0_srp_tmr != NULL)
373 kfree(b_se0_srp_tmr);
374 if (b_srp_fail_tmr != NULL)
375 kfree(b_srp_fail_tmr);
376 if (a_wait_enum_tmr != NULL)
377 kfree(a_wait_enum_tmr);
378
379 /* device driver used timers */
380 if (b_srp_wait_tmr != NULL)
381 kfree(b_srp_wait_tmr);
382 if (b_data_pulse_tmr != NULL)
383 kfree(b_data_pulse_tmr);
384 if (b_vbus_pulse_tmr != NULL)
385 kfree(b_vbus_pulse_tmr);
386}
387
388/* Add timer to timer list */
389void fsl_otg_add_timer(void *gtimer)
390{
391 struct fsl_otg_timer *timer = gtimer;
392 struct fsl_otg_timer *tmp_timer;
393
394 /*
395 * Check if the timer is already in the active list,
396 * if so update timer count
397 */
398 list_for_each_entry(tmp_timer, &active_timers, list)
399 if (tmp_timer == timer) {
400 timer->count = timer->expires;
401 return;
402 }
403 timer->count = timer->expires;
404 list_add_tail(&timer->list, &active_timers);
405}
406
407/* Remove timer from the timer list; clear timeout status */
408void fsl_otg_del_timer(void *gtimer)
409{
410 struct fsl_otg_timer *timer = gtimer;
411 struct fsl_otg_timer *tmp_timer, *del_tmp;
412
413 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
414 if (tmp_timer == timer)
415 list_del(&timer->list);
416}
417
418/*
419 * Reduce timer count by 1, and find timeout conditions.
420 * Called by fsl_otg 1ms timer interrupt
421 */
422int fsl_otg_tick_timer(void)
423{
424 struct fsl_otg_timer *tmp_timer, *del_tmp;
425 int expired = 0;
426
427 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
428 tmp_timer->count--;
429 /* check if timer expires */
430 if (!tmp_timer->count) {
431 list_del(&tmp_timer->list);
432 tmp_timer->function(tmp_timer->data);
433 expired = 1;
434 }
435 }
436
437 return expired;
438}
439
440/* Reset controller, not reset the bus */
441void otg_reset_controller(void)
442{
443 u32 command;
444
445 command = fsl_readl(&usb_dr_regs->usbcmd);
446 command |= (1 << 1);
447 fsl_writel(command, &usb_dr_regs->usbcmd);
448 while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
449 ;
450}
451
452/* Call suspend/resume routines in host driver */
453int fsl_otg_start_host(struct otg_fsm *fsm, int on)
454{
455 struct otg_transceiver *xceiv = fsm->transceiver;
456 struct device *dev;
457 struct fsl_otg *otg_dev = container_of(xceiv, struct fsl_otg, otg);
458 u32 retval = 0;
459
460 if (!xceiv->host)
461 return -ENODEV;
462 dev = xceiv->host->controller;
463
464 /*
465 * Update a_vbus_vld state as a_vbus_vld int is disabled
466 * in device mode
467 */
468 fsm->a_vbus_vld =
469 !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
470 if (on) {
471 /* start fsl usb host controller */
472 if (otg_dev->host_working)
473 goto end;
474 else {
475 otg_reset_controller();
476 VDBG("host on......\n");
477 if (dev->driver->pm && dev->driver->pm->resume) {
478 retval = dev->driver->pm->resume(dev);
479 if (fsm->id) {
480 /* default-b */
481 fsl_otg_drv_vbus(1);
482 /*
483 * Workaround: b_host can't driver
484 * vbus, but PP in PORTSC needs to
485 * be 1 for host to work.
486 * So we set drv_vbus bit in
487 * transceiver to 0 thru ULPI.
488 */
489 write_ulpi(0x0c, 0x20);
490 }
491 }
492
493 otg_dev->host_working = 1;
494 }
495 } else {
496 /* stop fsl usb host controller */
497 if (!otg_dev->host_working)
498 goto end;
499 else {
500 VDBG("host off......\n");
501 if (dev && dev->driver) {
502 if (dev->driver->pm && dev->driver->pm->suspend)
503 retval = dev->driver->pm->suspend(dev);
504 if (fsm->id)
505 /* default-b */
506 fsl_otg_drv_vbus(0);
507 }
508 otg_dev->host_working = 0;
509 }
510 }
511end:
512 return retval;
513}
514
515/*
516 * Call suspend and resume function in udc driver
517 * to stop and start udc driver.
518 */
519int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
520{
521 struct otg_transceiver *xceiv = fsm->transceiver;
522 struct device *dev;
523
524 if (!xceiv->gadget || !xceiv->gadget->dev.parent)
525 return -ENODEV;
526
527 VDBG("gadget %s\n", on ? "on" : "off");
528 dev = xceiv->gadget->dev.parent;
529
530 if (on) {
531 if (dev->driver->resume)
532 dev->driver->resume(dev);
533 } else {
534 if (dev->driver->suspend)
535 dev->driver->suspend(dev, otg_suspend_state);
536 }
537
538 return 0;
539}
540
541/*
542 * Called by initialization code of host driver. Register host controller
543 * to the OTG. Suspend host for OTG role detection.
544 */
545static int fsl_otg_set_host(struct otg_transceiver *otg_p, struct usb_bus *host)
546{
547 struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
548
549 if (!otg_p || otg_dev != fsl_otg_dev)
550 return -ENODEV;
551
552 otg_p->host = host;
553
554 otg_dev->fsm.a_bus_drop = 0;
555 otg_dev->fsm.a_bus_req = 1;
556
557 if (host) {
558 VDBG("host off......\n");
559
560 otg_p->host->otg_port = fsl_otg_initdata.otg_port;
561 otg_p->host->is_b_host = otg_dev->fsm.id;
562 /*
563 * must leave time for khubd to finish its thing
564 * before yanking the host driver out from under it,
565 * so suspend the host after a short delay.
566 */
567 otg_dev->host_working = 1;
568 schedule_delayed_work(&otg_dev->otg_event, 100);
569 return 0;
570 } else {
571 /* host driver going away */
572 if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
573 OTGSC_STS_USB_ID)) {
574 /* Mini-A cable connected */
575 struct otg_fsm *fsm = &otg_dev->fsm;
576
577 otg_p->state = OTG_STATE_UNDEFINED;
578 fsm->protocol = PROTO_UNDEF;
579 }
580 }
581
582 otg_dev->host_working = 0;
583
584 otg_statemachine(&otg_dev->fsm);
585
586 return 0;
587}
588
589/* Called by initialization code of udc. Register udc to OTG. */
590static int fsl_otg_set_peripheral(struct otg_transceiver *otg_p,
591 struct usb_gadget *gadget)
592{
593 struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
594
595 VDBG("otg_dev 0x%x\n", (int)otg_dev);
596 VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
597
598 if (!otg_p || otg_dev != fsl_otg_dev)
599 return -ENODEV;
600
601 if (!gadget) {
602 if (!otg_dev->otg.default_a)
603 otg_p->gadget->ops->vbus_draw(otg_p->gadget, 0);
604 usb_gadget_vbus_disconnect(otg_dev->otg.gadget);
605 otg_dev->otg.gadget = 0;
606 otg_dev->fsm.b_bus_req = 0;
607 otg_statemachine(&otg_dev->fsm);
608 return 0;
609 }
610
611 otg_p->gadget = gadget;
612 otg_p->gadget->is_a_peripheral = !otg_dev->fsm.id;
613
614 otg_dev->fsm.b_bus_req = 1;
615
616 /* start the gadget right away if the ID pin says Mini-B */
617 DBG("ID pin=%d\n", otg_dev->fsm.id);
618 if (otg_dev->fsm.id == 1) {
619 fsl_otg_start_host(&otg_dev->fsm, 0);
620 otg_drv_vbus(&otg_dev->fsm, 0);
621 fsl_otg_start_gadget(&otg_dev->fsm, 1);
622 }
623
624 return 0;
625}
626
627/* Set OTG port power, only for B-device */
628static int fsl_otg_set_power(struct otg_transceiver *otg_p, unsigned mA)
629{
630 if (!fsl_otg_dev)
631 return -ENODEV;
632 if (otg_p->state == OTG_STATE_B_PERIPHERAL)
633 pr_info("FSL OTG: Draw %d mA\n", mA);
634
635 return 0;
636}
637
638/*
639 * Delayed pin detect interrupt processing.
640 *
641 * When the Mini-A cable is disconnected from the board,
642 * the pin-detect interrupt happens before the disconnnect
643 * interrupts for the connected device(s). In order to
644 * process the disconnect interrupt(s) prior to switching
645 * roles, the pin-detect interrupts are delayed, and handled
646 * by this routine.
647 */
648static void fsl_otg_event(struct work_struct *work)
649{
650 struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
651 struct otg_fsm *fsm = &og->fsm;
652
653 if (fsm->id) { /* switch to gadget */
654 fsl_otg_start_host(fsm, 0);
655 otg_drv_vbus(fsm, 0);
656 fsl_otg_start_gadget(fsm, 1);
657 }
658}
659
660/* B-device start SRP */
661static int fsl_otg_start_srp(struct otg_transceiver *otg_p)
662{
663 struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
664
665 if (!otg_p || otg_dev != fsl_otg_dev
666 || otg_p->state != OTG_STATE_B_IDLE)
667 return -ENODEV;
668
669 otg_dev->fsm.b_bus_req = 1;
670 otg_statemachine(&otg_dev->fsm);
671
672 return 0;
673}
674
675/* A_host suspend will call this function to start hnp */
676static int fsl_otg_start_hnp(struct otg_transceiver *otg_p)
677{
678 struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
679
680 if (!otg_p || otg_dev != fsl_otg_dev)
681 return -ENODEV;
682
683 DBG("start_hnp...n");
684
685 /* clear a_bus_req to enter a_suspend state */
686 otg_dev->fsm.a_bus_req = 0;
687 otg_statemachine(&otg_dev->fsm);
688
689 return 0;
690}
691
692/*
693 * Interrupt handler. OTG/host/peripheral share the same int line.
694 * OTG driver clears OTGSC interrupts and leaves USB interrupts
695 * intact. It needs to have knowledge of some USB interrupts
696 * such as port change.
697 */
698irqreturn_t fsl_otg_isr(int irq, void *dev_id)
699{
700 struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
701 struct otg_transceiver *otg = &((struct fsl_otg *)dev_id)->otg;
702 u32 otg_int_src, otg_sc;
703
704 otg_sc = fsl_readl(&usb_dr_regs->otgsc);
705 otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
706
707 /* Only clear otg interrupts */
708 fsl_writel(otg_sc, &usb_dr_regs->otgsc);
709
710 /*FIXME: ID change not generate when init to 0 */
711 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
712 otg->default_a = (fsm->id == 0);
713
714 /* process OTG interrupts */
715 if (otg_int_src) {
716 if (otg_int_src & OTGSC_INTSTS_USB_ID) {
717 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
718 otg->default_a = (fsm->id == 0);
719 /* clear conn information */
720 if (fsm->id)
721 fsm->b_conn = 0;
722 else
723 fsm->a_conn = 0;
724
725 if (otg->host)
726 otg->host->is_b_host = fsm->id;
727 if (otg->gadget)
728 otg->gadget->is_a_peripheral = !fsm->id;
729 VDBG("ID int (ID is %d)\n", fsm->id);
730
731 if (fsm->id) { /* switch to gadget */
732 schedule_delayed_work(
733 &((struct fsl_otg *)dev_id)->otg_event,
734 100);
735 } else { /* switch to host */
736 cancel_delayed_work(&
737 ((struct fsl_otg *)dev_id)->
738 otg_event);
739 fsl_otg_start_gadget(fsm, 0);
740 otg_drv_vbus(fsm, 1);
741 fsl_otg_start_host(fsm, 1);
742 }
743 return IRQ_HANDLED;
744 }
745 }
746 return IRQ_NONE;
747}
748
749static struct otg_fsm_ops fsl_otg_ops = {
750 .chrg_vbus = fsl_otg_chrg_vbus,
751 .drv_vbus = fsl_otg_drv_vbus,
752 .loc_conn = fsl_otg_loc_conn,
753 .loc_sof = fsl_otg_loc_sof,
754 .start_pulse = fsl_otg_start_pulse,
755
756 .add_timer = fsl_otg_add_timer,
757 .del_timer = fsl_otg_del_timer,
758
759 .start_host = fsl_otg_start_host,
760 .start_gadget = fsl_otg_start_gadget,
761};
762
763/* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
764static int fsl_otg_conf(struct platform_device *pdev)
765{
766 struct fsl_otg *fsl_otg_tc;
767 int status;
768
769 if (fsl_otg_dev)
770 return 0;
771
772 /* allocate space to fsl otg device */
773 fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
774 if (!fsl_otg_tc)
775 return -ENOMEM;
776
777 INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
778
779 INIT_LIST_HEAD(&active_timers);
780 status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
781 if (status) {
782 pr_info("Couldn't init OTG timers\n");
783 goto err;
784 }
785 spin_lock_init(&fsl_otg_tc->fsm.lock);
786
787 /* Set OTG state machine operations */
788 fsl_otg_tc->fsm.ops = &fsl_otg_ops;
789
790 /* initialize the otg structure */
791 fsl_otg_tc->otg.label = DRIVER_DESC;
792 fsl_otg_tc->otg.set_host = fsl_otg_set_host;
793 fsl_otg_tc->otg.set_peripheral = fsl_otg_set_peripheral;
794 fsl_otg_tc->otg.set_power = fsl_otg_set_power;
795 fsl_otg_tc->otg.start_hnp = fsl_otg_start_hnp;
796 fsl_otg_tc->otg.start_srp = fsl_otg_start_srp;
797
798 fsl_otg_dev = fsl_otg_tc;
799
800 /* Store the otg transceiver */
801 status = otg_set_transceiver(&fsl_otg_tc->otg);
802 if (status) {
803 pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
804 goto err;
805 }
806
807 return 0;
808err:
809 fsl_otg_uninit_timers();
810 kfree(fsl_otg_tc);
811 return status;
812}
813
814/* OTG Initialization */
815int usb_otg_start(struct platform_device *pdev)
816{
817 struct fsl_otg *p_otg;
818 struct otg_transceiver *otg_trans = otg_get_transceiver();
819 struct otg_fsm *fsm;
820 int status;
821 struct resource *res;
822 u32 temp;
823 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
824
825 p_otg = container_of(otg_trans, struct fsl_otg, otg);
826 fsm = &p_otg->fsm;
827
828 /* Initialize the state machine structure with default values */
829 SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
830 fsm->transceiver = &p_otg->otg;
831
832 /* We don't require predefined MEM/IRQ resource index */
833 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
834 if (!res)
835 return -ENXIO;
836
837 /* We don't request_mem_region here to enable resource sharing
838 * with host/device */
839
840 usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
841 p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
842 pdata->regs = (void *)usb_dr_regs;
843
844 if (pdata->init && pdata->init(pdev) != 0)
845 return -EINVAL;
846
847 if (pdata->big_endian_mmio) {
848 _fsl_readl = _fsl_readl_be;
849 _fsl_writel = _fsl_writel_be;
850 } else {
851 _fsl_readl = _fsl_readl_le;
852 _fsl_writel = _fsl_writel_le;
853 }
854
855 /* request irq */
856 p_otg->irq = platform_get_irq(pdev, 0);
857 status = request_irq(p_otg->irq, fsl_otg_isr,
858 IRQF_SHARED, driver_name, p_otg);
859 if (status) {
860 dev_dbg(p_otg->otg.dev, "can't get IRQ %d, error %d\n",
861 p_otg->irq, status);
862 iounmap(p_otg->dr_mem_map);
863 kfree(p_otg);
864 return status;
865 }
866
867 /* stop the controller */
868 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
869 temp &= ~USB_CMD_RUN_STOP;
870 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
871
872 /* reset the controller */
873 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
874 temp |= USB_CMD_CTRL_RESET;
875 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
876
877 /* wait reset completed */
878 while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
879 ;
880
881 /* configure the VBUSHS as IDLE(both host and device) */
882 temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
883 fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
884
885 /* configure PHY interface */
886 temp = fsl_readl(&p_otg->dr_mem_map->portsc);
887 temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
888 switch (pdata->phy_mode) {
889 case FSL_USB2_PHY_ULPI:
890 temp |= PORTSC_PTS_ULPI;
891 break;
892 case FSL_USB2_PHY_UTMI_WIDE:
893 temp |= PORTSC_PTW_16BIT;
894 /* fall through */
895 case FSL_USB2_PHY_UTMI:
896 temp |= PORTSC_PTS_UTMI;
897 /* fall through */
898 default:
899 break;
900 }
901 fsl_writel(temp, &p_otg->dr_mem_map->portsc);
902
903 if (pdata->have_sysif_regs) {
904 /* configure control enable IO output, big endian register */
905 temp = __raw_readl(&p_otg->dr_mem_map->control);
906 temp |= USB_CTRL_IOENB;
907 __raw_writel(temp, &p_otg->dr_mem_map->control);
908 }
909
910 /* disable all interrupt and clear all OTGSC status */
911 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
912 temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
913 temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
914 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
915
916 /*
917 * The identification (id) input is FALSE when a Mini-A plug is inserted
918 * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
919 * Also: record initial state of ID pin
920 */
921 if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
922 p_otg->otg.state = OTG_STATE_UNDEFINED;
923 p_otg->fsm.id = 1;
924 } else {
925 p_otg->otg.state = OTG_STATE_A_IDLE;
926 p_otg->fsm.id = 0;
927 }
928
929 DBG("initial ID pin=%d\n", p_otg->fsm.id);
930
931 /* enable OTG ID pin interrupt */
932 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
933 temp |= OTGSC_INTR_USB_ID_EN;
934 temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
935 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
936
937 return 0;
938}
939
940/*
941 * state file in sysfs
942 */
943static int show_fsl_usb2_otg_state(struct device *dev,
944 struct device_attribute *attr, char *buf)
945{
946 struct otg_fsm *fsm = &fsl_otg_dev->fsm;
947 char *next = buf;
948 unsigned size = PAGE_SIZE;
949 unsigned long flags;
950 int t;
951
952 spin_lock_irqsave(&fsm->lock, flags);
953
954 /* basic driver infomation */
955 t = scnprintf(next, size,
956 DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n",
957 DRIVER_VERSION);
958 size -= t;
959 next += t;
960
961 /* Registers */
962 t = scnprintf(next, size,
963 "OTGSC: 0x%08x\n"
964 "PORTSC: 0x%08x\n"
965 "USBMODE: 0x%08x\n"
966 "USBCMD: 0x%08x\n"
967 "USBSTS: 0x%08x\n"
968 "USBINTR: 0x%08x\n",
969 fsl_readl(&usb_dr_regs->otgsc),
970 fsl_readl(&usb_dr_regs->portsc),
971 fsl_readl(&usb_dr_regs->usbmode),
972 fsl_readl(&usb_dr_regs->usbcmd),
973 fsl_readl(&usb_dr_regs->usbsts),
974 fsl_readl(&usb_dr_regs->usbintr));
975 size -= t;
976 next += t;
977
978 /* State */
979 t = scnprintf(next, size,
980 "OTG state: %s\n\n",
981 otg_state_string(fsl_otg_dev->otg.state));
982 size -= t;
983 next += t;
984
985 /* State Machine Variables */
986 t = scnprintf(next, size,
987 "a_bus_req: %d\n"
988 "b_bus_req: %d\n"
989 "a_bus_resume: %d\n"
990 "a_bus_suspend: %d\n"
991 "a_conn: %d\n"
992 "a_sess_vld: %d\n"
993 "a_srp_det: %d\n"
994 "a_vbus_vld: %d\n"
995 "b_bus_resume: %d\n"
996 "b_bus_suspend: %d\n"
997 "b_conn: %d\n"
998 "b_se0_srp: %d\n"
999 "b_sess_end: %d\n"
1000 "b_sess_vld: %d\n"
1001 "id: %d\n",
1002 fsm->a_bus_req,
1003 fsm->b_bus_req,
1004 fsm->a_bus_resume,
1005 fsm->a_bus_suspend,
1006 fsm->a_conn,
1007 fsm->a_sess_vld,
1008 fsm->a_srp_det,
1009 fsm->a_vbus_vld,
1010 fsm->b_bus_resume,
1011 fsm->b_bus_suspend,
1012 fsm->b_conn,
1013 fsm->b_se0_srp,
1014 fsm->b_sess_end,
1015 fsm->b_sess_vld,
1016 fsm->id);
1017 size -= t;
1018 next += t;
1019
1020 spin_unlock_irqrestore(&fsm->lock, flags);
1021
1022 return PAGE_SIZE - size;
1023}
1024
1025static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);
1026
1027
1028/* Char driver interface to control some OTG input */
1029
1030/*
1031 * Handle some ioctl command, such as get otg
1032 * status and set host suspend
1033 */
1034static long fsl_otg_ioctl(struct file *file, unsigned int cmd,
1035 unsigned long arg)
1036{
1037 u32 retval = 0;
1038
1039 switch (cmd) {
1040 case GET_OTG_STATUS:
1041 retval = fsl_otg_dev->host_working;
1042 break;
1043
1044 case SET_A_SUSPEND_REQ:
1045 fsl_otg_dev->fsm.a_suspend_req = arg;
1046 break;
1047
1048 case SET_A_BUS_DROP:
1049 fsl_otg_dev->fsm.a_bus_drop = arg;
1050 break;
1051
1052 case SET_A_BUS_REQ:
1053 fsl_otg_dev->fsm.a_bus_req = arg;
1054 break;
1055
1056 case SET_B_BUS_REQ:
1057 fsl_otg_dev->fsm.b_bus_req = arg;
1058 break;
1059
1060 default:
1061 break;
1062 }
1063
1064 otg_statemachine(&fsl_otg_dev->fsm);
1065
1066 return retval;
1067}
1068
1069static int fsl_otg_open(struct inode *inode, struct file *file)
1070{
1071 return 0;
1072}
1073
1074static int fsl_otg_release(struct inode *inode, struct file *file)
1075{
1076 return 0;
1077}
1078
1079static const struct file_operations otg_fops = {
1080 .owner = THIS_MODULE,
1081 .llseek = NULL,
1082 .read = NULL,
1083 .write = NULL,
1084 .unlocked_ioctl = fsl_otg_ioctl,
1085 .open = fsl_otg_open,
1086 .release = fsl_otg_release,
1087};
1088
1089static int __devinit fsl_otg_probe(struct platform_device *pdev)
1090{
1091 int ret;
1092
1093 if (!pdev->dev.platform_data)
1094 return -ENODEV;
1095
1096 /* configure the OTG */
1097 ret = fsl_otg_conf(pdev);
1098 if (ret) {
1099 dev_err(&pdev->dev, "Couldn't configure OTG module\n");
1100 return ret;
1101 }
1102
1103 /* start OTG */
1104 ret = usb_otg_start(pdev);
1105 if (ret) {
1106 dev_err(&pdev->dev, "Can't init FSL OTG device\n");
1107 return ret;
1108 }
1109
1110 ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops);
1111 if (ret) {
1112 dev_err(&pdev->dev, "unable to register FSL OTG device\n");
1113 return ret;
1114 }
1115
1116 ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1117 if (ret)
1118 dev_warn(&pdev->dev, "Can't register sysfs attribute\n");
1119
1120 return ret;
1121}
1122
1123static int __devexit fsl_otg_remove(struct platform_device *pdev)
1124{
1125 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
1126
1127 otg_set_transceiver(NULL);
1128 free_irq(fsl_otg_dev->irq, fsl_otg_dev);
1129
1130 iounmap((void *)usb_dr_regs);
1131
1132 fsl_otg_uninit_timers();
1133 kfree(fsl_otg_dev);
1134
1135 device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1136
1137 unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME);
1138
1139 if (pdata->exit)
1140 pdata->exit(pdev);
1141
1142 return 0;
1143}
1144
1145struct platform_driver fsl_otg_driver = {
1146 .probe = fsl_otg_probe,
1147 .remove = __devexit_p(fsl_otg_remove),
1148 .driver = {
1149 .name = driver_name,
1150 .owner = THIS_MODULE,
1151 },
1152};
1153
1154static int __init fsl_usb_otg_init(void)
1155{
1156 pr_info(DRIVER_INFO "\n");
1157 return platform_driver_register(&fsl_otg_driver);
1158}
1159module_init(fsl_usb_otg_init);
1160
1161static void __exit fsl_usb_otg_exit(void)
1162{
1163 platform_driver_unregister(&fsl_otg_driver);
1164}
1165module_exit(fsl_usb_otg_exit);
1166
1167MODULE_DESCRIPTION(DRIVER_INFO);
1168MODULE_AUTHOR(DRIVER_AUTHOR);
1169MODULE_LICENSE("GPL");
diff --git a/drivers/usb/otg/fsl_otg.h b/drivers/usb/otg/fsl_otg.h
new file mode 100644
index 000000000000..3f8ef731aac9
--- /dev/null
+++ b/drivers/usb/otg/fsl_otg.h
@@ -0,0 +1,406 @@
1/* Copyright (C) 2007,2008 Freescale Semiconductor, Inc.
2 *
3 * This program is free software; you can redistribute it and/or modify it
4 * under the terms of the GNU General Public License as published by the
5 * Free Software Foundation; either version 2 of the License, or (at your
6 * option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 675 Mass Ave, Cambridge, MA 02139, USA.
16 */
17
18#include "otg_fsm.h"
19#include <linux/usb/otg.h>
20#include <linux/ioctl.h>
21
22/* USB Command Register Bit Masks */
23#define USB_CMD_RUN_STOP (0x1<<0)
24#define USB_CMD_CTRL_RESET (0x1<<1)
25#define USB_CMD_PERIODIC_SCHEDULE_EN (0x1<<4)
26#define USB_CMD_ASYNC_SCHEDULE_EN (0x1<<5)
27#define USB_CMD_INT_AA_DOORBELL (0x1<<6)
28#define USB_CMD_ASP (0x3<<8)
29#define USB_CMD_ASYNC_SCH_PARK_EN (0x1<<11)
30#define USB_CMD_SUTW (0x1<<13)
31#define USB_CMD_ATDTW (0x1<<14)
32#define USB_CMD_ITC (0xFF<<16)
33
34/* bit 15,3,2 are frame list size */
35#define USB_CMD_FRAME_SIZE_1024 (0x0<<15 | 0x0<<2)
36#define USB_CMD_FRAME_SIZE_512 (0x0<<15 | 0x1<<2)
37#define USB_CMD_FRAME_SIZE_256 (0x0<<15 | 0x2<<2)
38#define USB_CMD_FRAME_SIZE_128 (0x0<<15 | 0x3<<2)
39#define USB_CMD_FRAME_SIZE_64 (0x1<<15 | 0x0<<2)
40#define USB_CMD_FRAME_SIZE_32 (0x1<<15 | 0x1<<2)
41#define USB_CMD_FRAME_SIZE_16 (0x1<<15 | 0x2<<2)
42#define USB_CMD_FRAME_SIZE_8 (0x1<<15 | 0x3<<2)
43
44/* bit 9-8 are async schedule park mode count */
45#define USB_CMD_ASP_00 (0x0<<8)
46#define USB_CMD_ASP_01 (0x1<<8)
47#define USB_CMD_ASP_10 (0x2<<8)
48#define USB_CMD_ASP_11 (0x3<<8)
49#define USB_CMD_ASP_BIT_POS (8)
50
51/* bit 23-16 are interrupt threshold control */
52#define USB_CMD_ITC_NO_THRESHOLD (0x00<<16)
53#define USB_CMD_ITC_1_MICRO_FRM (0x01<<16)
54#define USB_CMD_ITC_2_MICRO_FRM (0x02<<16)
55#define USB_CMD_ITC_4_MICRO_FRM (0x04<<16)
56#define USB_CMD_ITC_8_MICRO_FRM (0x08<<16)
57#define USB_CMD_ITC_16_MICRO_FRM (0x10<<16)
58#define USB_CMD_ITC_32_MICRO_FRM (0x20<<16)
59#define USB_CMD_ITC_64_MICRO_FRM (0x40<<16)
60#define USB_CMD_ITC_BIT_POS (16)
61
62/* USB Status Register Bit Masks */
63#define USB_STS_INT (0x1<<0)
64#define USB_STS_ERR (0x1<<1)
65#define USB_STS_PORT_CHANGE (0x1<<2)
66#define USB_STS_FRM_LST_ROLL (0x1<<3)
67#define USB_STS_SYS_ERR (0x1<<4)
68#define USB_STS_IAA (0x1<<5)
69#define USB_STS_RESET_RECEIVED (0x1<<6)
70#define USB_STS_SOF (0x1<<7)
71#define USB_STS_DCSUSPEND (0x1<<8)
72#define USB_STS_HC_HALTED (0x1<<12)
73#define USB_STS_RCL (0x1<<13)
74#define USB_STS_PERIODIC_SCHEDULE (0x1<<14)
75#define USB_STS_ASYNC_SCHEDULE (0x1<<15)
76
77/* USB Interrupt Enable Register Bit Masks */
78#define USB_INTR_INT_EN (0x1<<0)
79#define USB_INTR_ERR_INT_EN (0x1<<1)
80#define USB_INTR_PC_DETECT_EN (0x1<<2)
81#define USB_INTR_FRM_LST_ROLL_EN (0x1<<3)
82#define USB_INTR_SYS_ERR_EN (0x1<<4)
83#define USB_INTR_ASYN_ADV_EN (0x1<<5)
84#define USB_INTR_RESET_EN (0x1<<6)
85#define USB_INTR_SOF_EN (0x1<<7)
86#define USB_INTR_DEVICE_SUSPEND (0x1<<8)
87
88/* Device Address bit masks */
89#define USB_DEVICE_ADDRESS_MASK (0x7F<<25)
90#define USB_DEVICE_ADDRESS_BIT_POS (25)
91/* PORTSC Register Bit Masks,Only one PORT in OTG mode*/
92#define PORTSC_CURRENT_CONNECT_STATUS (0x1<<0)
93#define PORTSC_CONNECT_STATUS_CHANGE (0x1<<1)
94#define PORTSC_PORT_ENABLE (0x1<<2)
95#define PORTSC_PORT_EN_DIS_CHANGE (0x1<<3)
96#define PORTSC_OVER_CURRENT_ACT (0x1<<4)
97#define PORTSC_OVER_CUURENT_CHG (0x1<<5)
98#define PORTSC_PORT_FORCE_RESUME (0x1<<6)
99#define PORTSC_PORT_SUSPEND (0x1<<7)
100#define PORTSC_PORT_RESET (0x1<<8)
101#define PORTSC_LINE_STATUS_BITS (0x3<<10)
102#define PORTSC_PORT_POWER (0x1<<12)
103#define PORTSC_PORT_INDICTOR_CTRL (0x3<<14)
104#define PORTSC_PORT_TEST_CTRL (0xF<<16)
105#define PORTSC_WAKE_ON_CONNECT_EN (0x1<<20)
106#define PORTSC_WAKE_ON_CONNECT_DIS (0x1<<21)
107#define PORTSC_WAKE_ON_OVER_CURRENT (0x1<<22)
108#define PORTSC_PHY_LOW_POWER_SPD (0x1<<23)
109#define PORTSC_PORT_FORCE_FULL_SPEED (0x1<<24)
110#define PORTSC_PORT_SPEED_MASK (0x3<<26)
111#define PORTSC_TRANSCEIVER_WIDTH (0x1<<28)
112#define PORTSC_PHY_TYPE_SEL (0x3<<30)
113/* bit 11-10 are line status */
114#define PORTSC_LINE_STATUS_SE0 (0x0<<10)
115#define PORTSC_LINE_STATUS_JSTATE (0x1<<10)
116#define PORTSC_LINE_STATUS_KSTATE (0x2<<10)
117#define PORTSC_LINE_STATUS_UNDEF (0x3<<10)
118#define PORTSC_LINE_STATUS_BIT_POS (10)
119
120/* bit 15-14 are port indicator control */
121#define PORTSC_PIC_OFF (0x0<<14)
122#define PORTSC_PIC_AMBER (0x1<<14)
123#define PORTSC_PIC_GREEN (0x2<<14)
124#define PORTSC_PIC_UNDEF (0x3<<14)
125#define PORTSC_PIC_BIT_POS (14)
126
127/* bit 19-16 are port test control */
128#define PORTSC_PTC_DISABLE (0x0<<16)
129#define PORTSC_PTC_JSTATE (0x1<<16)
130#define PORTSC_PTC_KSTATE (0x2<<16)
131#define PORTSC_PTC_SEQNAK (0x3<<16)
132#define PORTSC_PTC_PACKET (0x4<<16)
133#define PORTSC_PTC_FORCE_EN (0x5<<16)
134#define PORTSC_PTC_BIT_POS (16)
135
136/* bit 27-26 are port speed */
137#define PORTSC_PORT_SPEED_FULL (0x0<<26)
138#define PORTSC_PORT_SPEED_LOW (0x1<<26)
139#define PORTSC_PORT_SPEED_HIGH (0x2<<26)
140#define PORTSC_PORT_SPEED_UNDEF (0x3<<26)
141#define PORTSC_SPEED_BIT_POS (26)
142
143/* bit 28 is parallel transceiver width for UTMI interface */
144#define PORTSC_PTW (0x1<<28)
145#define PORTSC_PTW_8BIT (0x0<<28)
146#define PORTSC_PTW_16BIT (0x1<<28)
147
148/* bit 31-30 are port transceiver select */
149#define PORTSC_PTS_UTMI (0x0<<30)
150#define PORTSC_PTS_ULPI (0x2<<30)
151#define PORTSC_PTS_FSLS_SERIAL (0x3<<30)
152#define PORTSC_PTS_BIT_POS (30)
153
154#define PORTSC_W1C_BITS \
155 (PORTSC_CONNECT_STATUS_CHANGE | \
156 PORTSC_PORT_EN_DIS_CHANGE | \
157 PORTSC_OVER_CUURENT_CHG)
158
159/* OTG Status Control Register Bit Masks */
160#define OTGSC_CTRL_VBUS_DISCHARGE (0x1<<0)
161#define OTGSC_CTRL_VBUS_CHARGE (0x1<<1)
162#define OTGSC_CTRL_OTG_TERMINATION (0x1<<3)
163#define OTGSC_CTRL_DATA_PULSING (0x1<<4)
164#define OTGSC_CTRL_ID_PULL_EN (0x1<<5)
165#define OTGSC_HA_DATA_PULSE (0x1<<6)
166#define OTGSC_HA_BA (0x1<<7)
167#define OTGSC_STS_USB_ID (0x1<<8)
168#define OTGSC_STS_A_VBUS_VALID (0x1<<9)
169#define OTGSC_STS_A_SESSION_VALID (0x1<<10)
170#define OTGSC_STS_B_SESSION_VALID (0x1<<11)
171#define OTGSC_STS_B_SESSION_END (0x1<<12)
172#define OTGSC_STS_1MS_TOGGLE (0x1<<13)
173#define OTGSC_STS_DATA_PULSING (0x1<<14)
174#define OTGSC_INTSTS_USB_ID (0x1<<16)
175#define OTGSC_INTSTS_A_VBUS_VALID (0x1<<17)
176#define OTGSC_INTSTS_A_SESSION_VALID (0x1<<18)
177#define OTGSC_INTSTS_B_SESSION_VALID (0x1<<19)
178#define OTGSC_INTSTS_B_SESSION_END (0x1<<20)
179#define OTGSC_INTSTS_1MS (0x1<<21)
180#define OTGSC_INTSTS_DATA_PULSING (0x1<<22)
181#define OTGSC_INTR_USB_ID_EN (0x1<<24)
182#define OTGSC_INTR_A_VBUS_VALID_EN (0x1<<25)
183#define OTGSC_INTR_A_SESSION_VALID_EN (0x1<<26)
184#define OTGSC_INTR_B_SESSION_VALID_EN (0x1<<27)
185#define OTGSC_INTR_B_SESSION_END_EN (0x1<<28)
186#define OTGSC_INTR_1MS_TIMER_EN (0x1<<29)
187#define OTGSC_INTR_DATA_PULSING_EN (0x1<<30)
188#define OTGSC_INTSTS_MASK (0x00ff0000)
189
190/* USB MODE Register Bit Masks */
191#define USB_MODE_CTRL_MODE_IDLE (0x0<<0)
192#define USB_MODE_CTRL_MODE_DEVICE (0x2<<0)
193#define USB_MODE_CTRL_MODE_HOST (0x3<<0)
194#define USB_MODE_CTRL_MODE_RSV (0x1<<0)
195#define USB_MODE_SETUP_LOCK_OFF (0x1<<3)
196#define USB_MODE_STREAM_DISABLE (0x1<<4)
197#define USB_MODE_ES (0x1<<2) /* Endian Select */
198
199/* control Register Bit Masks */
200#define USB_CTRL_IOENB (0x1<<2)
201#define USB_CTRL_ULPI_INT0EN (0x1<<0)
202
203/* BCSR5 */
204#define BCSR5_INT_USB (0x02)
205
206/* USB module clk cfg */
207#define SCCR_OFFS (0xA08)
208#define SCCR_USB_CLK_DISABLE (0x00000000) /* USB clk disable */
209#define SCCR_USB_MPHCM_11 (0x00c00000)
210#define SCCR_USB_MPHCM_01 (0x00400000)
211#define SCCR_USB_MPHCM_10 (0x00800000)
212#define SCCR_USB_DRCM_11 (0x00300000)
213#define SCCR_USB_DRCM_01 (0x00100000)
214#define SCCR_USB_DRCM_10 (0x00200000)
215
216#define SICRL_OFFS (0x114)
217#define SICRL_USB0 (0x40000000)
218#define SICRL_USB1 (0x20000000)
219
220#define SICRH_OFFS (0x118)
221#define SICRH_USB_UTMI (0x00020000)
222
223/* OTG interrupt enable bit masks */
224#define OTGSC_INTERRUPT_ENABLE_BITS_MASK \
225 (OTGSC_INTR_USB_ID_EN | \
226 OTGSC_INTR_1MS_TIMER_EN | \
227 OTGSC_INTR_A_VBUS_VALID_EN | \
228 OTGSC_INTR_A_SESSION_VALID_EN | \
229 OTGSC_INTR_B_SESSION_VALID_EN | \
230 OTGSC_INTR_B_SESSION_END_EN | \
231 OTGSC_INTR_DATA_PULSING_EN)
232
233/* OTG interrupt status bit masks */
234#define OTGSC_INTERRUPT_STATUS_BITS_MASK \
235 (OTGSC_INTSTS_USB_ID | \
236 OTGSC_INTR_1MS_TIMER_EN | \
237 OTGSC_INTSTS_A_VBUS_VALID | \
238 OTGSC_INTSTS_A_SESSION_VALID | \
239 OTGSC_INTSTS_B_SESSION_VALID | \
240 OTGSC_INTSTS_B_SESSION_END | \
241 OTGSC_INTSTS_DATA_PULSING)
242
243/*
244 * A-DEVICE timing constants
245 */
246
247/* Wait for VBUS Rise */
248#define TA_WAIT_VRISE (100) /* a_wait_vrise 100 ms, section: 6.6.5.1 */
249
250/* Wait for B-Connect */
251#define TA_WAIT_BCON (10000) /* a_wait_bcon > 1 sec, section: 6.6.5.2
252 * This is only used to get out of
253 * OTG_STATE_A_WAIT_BCON state if there was
254 * no connection for these many milliseconds
255 */
256
257/* A-Idle to B-Disconnect */
258/* It is necessary for this timer to be more than 750 ms because of a bug in OPT
259 * test 5.4 in which B OPT disconnects after 750 ms instead of 75ms as stated
260 * in the test description
261 */
262#define TA_AIDL_BDIS (5000) /* a_suspend minimum 200 ms, section: 6.6.5.3 */
263
264/* B-Idle to A-Disconnect */
265#define TA_BIDL_ADIS (12) /* 3 to 200 ms */
266
267/* B-device timing constants */
268
269
270/* Data-Line Pulse Time*/
271#define TB_DATA_PLS (10) /* b_srp_init,continue 5~10ms, section:5.3.3 */
272#define TB_DATA_PLS_MIN (5) /* minimum 5 ms */
273#define TB_DATA_PLS_MAX (10) /* maximum 10 ms */
274
275/* SRP Initiate Time */
276#define TB_SRP_INIT (100) /* b_srp_init,maximum 100 ms, section:5.3.8 */
277
278/* SRP Fail Time */
279#define TB_SRP_FAIL (7000) /* b_srp_init,Fail time 5~30s, section:6.8.2.2*/
280
281/* SRP result wait time */
282#define TB_SRP_WAIT (60)
283
284/* VBus time */
285#define TB_VBUS_PLS (30) /* time to keep vbus pulsing asserted */
286
287/* Discharge time */
288/* This time should be less than 10ms. It varies from system to system. */
289#define TB_VBUS_DSCHRG (8)
290
291/* A-SE0 to B-Reset */
292#define TB_ASE0_BRST (20) /* b_wait_acon, mini 3.125 ms,section:6.8.2.4 */
293
294/* A bus suspend timer before we can switch to b_wait_aconn */
295#define TB_A_SUSPEND (7)
296#define TB_BUS_RESUME (12)
297
298/* SE0 Time Before SRP */
299#define TB_SE0_SRP (2) /* b_idle,minimum 2 ms, section:5.3.2 */
300
301#define SET_OTG_STATE(otg_ptr, newstate) ((otg_ptr)->state = newstate)
302
303struct usb_dr_mmap {
304 /* Capability register */
305 u8 res1[256];
306 u16 caplength; /* Capability Register Length */
307 u16 hciversion; /* Host Controller Interface Version */
308 u32 hcsparams; /* Host Controller Structual Parameters */
309 u32 hccparams; /* Host Controller Capability Parameters */
310 u8 res2[20];
311 u32 dciversion; /* Device Controller Interface Version */
312 u32 dccparams; /* Device Controller Capability Parameters */
313 u8 res3[24];
314 /* Operation register */
315 u32 usbcmd; /* USB Command Register */
316 u32 usbsts; /* USB Status Register */
317 u32 usbintr; /* USB Interrupt Enable Register */
318 u32 frindex; /* Frame Index Register */
319 u8 res4[4];
320 u32 deviceaddr; /* Device Address */
321 u32 endpointlistaddr; /* Endpoint List Address Register */
322 u8 res5[4];
323 u32 burstsize; /* Master Interface Data Burst Size Register */
324 u32 txttfilltuning; /* Transmit FIFO Tuning Controls Register */
325 u8 res6[8];
326 u32 ulpiview; /* ULPI register access */
327 u8 res7[12];
328 u32 configflag; /* Configure Flag Register */
329 u32 portsc; /* Port 1 Status and Control Register */
330 u8 res8[28];
331 u32 otgsc; /* On-The-Go Status and Control */
332 u32 usbmode; /* USB Mode Register */
333 u32 endptsetupstat; /* Endpoint Setup Status Register */
334 u32 endpointprime; /* Endpoint Initialization Register */
335 u32 endptflush; /* Endpoint Flush Register */
336 u32 endptstatus; /* Endpoint Status Register */
337 u32 endptcomplete; /* Endpoint Complete Register */
338 u32 endptctrl[6]; /* Endpoint Control Registers */
339 u8 res9[552];
340 u32 snoop1;
341 u32 snoop2;
342 u32 age_cnt_thresh; /* Age Count Threshold Register */
343 u32 pri_ctrl; /* Priority Control Register */
344 u32 si_ctrl; /* System Interface Control Register */
345 u8 res10[236];
346 u32 control; /* General Purpose Control Register */
347};
348
349struct fsl_otg_timer {
350 unsigned long expires; /* Number of count increase to timeout */
351 unsigned long count; /* Tick counter */
352 void (*function)(unsigned long); /* Timeout function */
353 unsigned long data; /* Data passed to function */
354 struct list_head list;
355};
356
357inline struct fsl_otg_timer *otg_timer_initializer
358(void (*function)(unsigned long), unsigned long expires, unsigned long data)
359{
360 struct fsl_otg_timer *timer;
361
362 timer = kmalloc(sizeof(struct fsl_otg_timer), GFP_KERNEL);
363 if (!timer)
364 return NULL;
365 timer->function = function;
366 timer->expires = expires;
367 timer->data = data;
368 return timer;
369}
370
371struct fsl_otg {
372 struct otg_transceiver otg;
373 struct otg_fsm fsm;
374 struct usb_dr_mmap *dr_mem_map;
375 struct delayed_work otg_event;
376
377 /* used for usb host */
378 struct work_struct work_wq;
379 u8 host_working;
380
381 int irq;
382};
383
384struct fsl_otg_config {
385 u8 otg_port;
386};
387
388/* For SRP and HNP handle */
389#define FSL_OTG_MAJOR 240
390#define FSL_OTG_NAME "fsl-usb2-otg"
391/* Command to OTG driver ioctl */
392#define OTG_IOCTL_MAGIC FSL_OTG_MAJOR
393/* if otg work as host, it should return 1, otherwise return 0 */
394#define GET_OTG_STATUS _IOR(OTG_IOCTL_MAGIC, 1, int)
395#define SET_A_SUSPEND_REQ _IOW(OTG_IOCTL_MAGIC, 2, int)
396#define SET_A_BUS_DROP _IOW(OTG_IOCTL_MAGIC, 3, int)
397#define SET_A_BUS_REQ _IOW(OTG_IOCTL_MAGIC, 4, int)
398#define SET_B_BUS_REQ _IOW(OTG_IOCTL_MAGIC, 5, int)
399#define GET_A_SUSPEND_REQ _IOR(OTG_IOCTL_MAGIC, 6, int)
400#define GET_A_BUS_DROP _IOR(OTG_IOCTL_MAGIC, 7, int)
401#define GET_A_BUS_REQ _IOR(OTG_IOCTL_MAGIC, 8, int)
402#define GET_B_BUS_REQ _IOR(OTG_IOCTL_MAGIC, 9, int)
403
404void fsl_otg_add_timer(void *timer);
405void fsl_otg_del_timer(void *timer);
406void fsl_otg_pulse_vbus(void);
diff --git a/drivers/usb/otg/gpio_vbus.c b/drivers/usb/otg/gpio_vbus.c
index 221c44444ec6..52733d9959b4 100644
--- a/drivers/usb/otg/gpio_vbus.c
+++ b/drivers/usb/otg/gpio_vbus.c
@@ -279,6 +279,13 @@ static int __init gpio_vbus_probe(struct platform_device *pdev)
279 } 279 }
280 INIT_WORK(&gpio_vbus->work, gpio_vbus_work); 280 INIT_WORK(&gpio_vbus->work, gpio_vbus_work);
281 281
282 gpio_vbus->vbus_draw = regulator_get(&pdev->dev, "vbus_draw");
283 if (IS_ERR(gpio_vbus->vbus_draw)) {
284 dev_dbg(&pdev->dev, "can't get vbus_draw regulator, err: %ld\n",
285 PTR_ERR(gpio_vbus->vbus_draw));
286 gpio_vbus->vbus_draw = NULL;
287 }
288
282 /* only active when a gadget is registered */ 289 /* only active when a gadget is registered */
283 err = otg_set_transceiver(&gpio_vbus->otg); 290 err = otg_set_transceiver(&gpio_vbus->otg);
284 if (err) { 291 if (err) {
@@ -287,13 +294,6 @@ static int __init gpio_vbus_probe(struct platform_device *pdev)
287 goto err_otg; 294 goto err_otg;
288 } 295 }
289 296
290 gpio_vbus->vbus_draw = regulator_get(&pdev->dev, "vbus_draw");
291 if (IS_ERR(gpio_vbus->vbus_draw)) {
292 dev_dbg(&pdev->dev, "can't get vbus_draw regulator, err: %ld\n",
293 PTR_ERR(gpio_vbus->vbus_draw));
294 gpio_vbus->vbus_draw = NULL;
295 }
296
297 return 0; 297 return 0;
298err_otg: 298err_otg:
299 free_irq(irq, &pdev->dev); 299 free_irq(irq, &pdev->dev);
diff --git a/drivers/usb/otg/isp1301_omap.c b/drivers/usb/otg/isp1301_omap.c
index e25700f44b6f..8c282258e1bd 100644
--- a/drivers/usb/otg/isp1301_omap.c
+++ b/drivers/usb/otg/isp1301_omap.c
@@ -234,29 +234,9 @@ isp1301_clear_bits(struct isp1301 *isp, u8 reg, u8 bits)
234 234
235/*-------------------------------------------------------------------------*/ 235/*-------------------------------------------------------------------------*/
236 236
237static const char *state_string(enum usb_otg_state state)
238{
239 switch (state) {
240 case OTG_STATE_A_IDLE: return "a_idle";
241 case OTG_STATE_A_WAIT_VRISE: return "a_wait_vrise";
242 case OTG_STATE_A_WAIT_BCON: return "a_wait_bcon";
243 case OTG_STATE_A_HOST: return "a_host";
244 case OTG_STATE_A_SUSPEND: return "a_suspend";
245 case OTG_STATE_A_PERIPHERAL: return "a_peripheral";
246 case OTG_STATE_A_WAIT_VFALL: return "a_wait_vfall";
247 case OTG_STATE_A_VBUS_ERR: return "a_vbus_err";
248 case OTG_STATE_B_IDLE: return "b_idle";
249 case OTG_STATE_B_SRP_INIT: return "b_srp_init";
250 case OTG_STATE_B_PERIPHERAL: return "b_peripheral";
251 case OTG_STATE_B_WAIT_ACON: return "b_wait_acon";
252 case OTG_STATE_B_HOST: return "b_host";
253 default: return "UNDEFINED";
254 }
255}
256
257static inline const char *state_name(struct isp1301 *isp) 237static inline const char *state_name(struct isp1301 *isp)
258{ 238{
259 return state_string(isp->otg.state); 239 return otg_state_string(isp->otg.state);
260} 240}
261 241
262/*-------------------------------------------------------------------------*/ 242/*-------------------------------------------------------------------------*/
@@ -501,7 +481,7 @@ static void check_state(struct isp1301 *isp, const char *tag)
501 if (isp->otg.state == state && !extra) 481 if (isp->otg.state == state && !extra)
502 return; 482 return;
503 pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag, 483 pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag,
504 state_string(state), fsm, state_name(isp), 484 otg_state_string(state), fsm, state_name(isp),
505 omap_readl(OTG_CTRL)); 485 omap_readl(OTG_CTRL));
506} 486}
507 487
@@ -1095,7 +1075,7 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat)
1095 1075
1096 if (state != isp->otg.state) 1076 if (state != isp->otg.state)
1097 pr_debug(" isp, %s -> %s\n", 1077 pr_debug(" isp, %s -> %s\n",
1098 state_string(state), state_name(isp)); 1078 otg_state_string(state), state_name(isp));
1099 1079
1100#ifdef CONFIG_USB_OTG 1080#ifdef CONFIG_USB_OTG
1101 /* update the OTG controller state to match the isp1301; may 1081 /* update the OTG controller state to match the isp1301; may
diff --git a/drivers/usb/otg/langwell_otg.c b/drivers/usb/otg/langwell_otg.c
index e973ff19c55a..f08f784086f7 100644
--- a/drivers/usb/otg/langwell_otg.c
+++ b/drivers/usb/otg/langwell_otg.c
@@ -82,40 +82,6 @@ static struct pci_driver otg_pci_driver = {
82 .resume = langwell_otg_resume, 82 .resume = langwell_otg_resume,
83}; 83};
84 84
85static const char *state_string(enum usb_otg_state state)
86{
87 switch (state) {
88 case OTG_STATE_A_IDLE:
89 return "a_idle";
90 case OTG_STATE_A_WAIT_VRISE:
91 return "a_wait_vrise";
92 case OTG_STATE_A_WAIT_BCON:
93 return "a_wait_bcon";
94 case OTG_STATE_A_HOST:
95 return "a_host";
96 case OTG_STATE_A_SUSPEND:
97 return "a_suspend";
98 case OTG_STATE_A_PERIPHERAL:
99 return "a_peripheral";
100 case OTG_STATE_A_WAIT_VFALL:
101 return "a_wait_vfall";
102 case OTG_STATE_A_VBUS_ERR:
103 return "a_vbus_err";
104 case OTG_STATE_B_IDLE:
105 return "b_idle";
106 case OTG_STATE_B_SRP_INIT:
107 return "b_srp_init";
108 case OTG_STATE_B_PERIPHERAL:
109 return "b_peripheral";
110 case OTG_STATE_B_WAIT_ACON:
111 return "b_wait_acon";
112 case OTG_STATE_B_HOST:
113 return "b_host";
114 default:
115 return "UNDEFINED";
116 }
117}
118
119/* HSM timers */ 85/* HSM timers */
120static inline struct langwell_otg_timer *otg_timer_initializer 86static inline struct langwell_otg_timer *otg_timer_initializer
121(void (*function)(unsigned long), unsigned long expires, unsigned long data) 87(void (*function)(unsigned long), unsigned long expires, unsigned long data)
@@ -968,7 +934,7 @@ static void langwell_otg_work(struct work_struct *work)
968 pdev = to_pci_dev(lnw->dev); 934 pdev = to_pci_dev(lnw->dev);
969 935
970 dev_dbg(lnw->dev, "%s: old state = %s\n", __func__, 936 dev_dbg(lnw->dev, "%s: old state = %s\n", __func__,
971 state_string(iotg->otg.state)); 937 otg_state_string(iotg->otg.state));
972 938
973 switch (iotg->otg.state) { 939 switch (iotg->otg.state) {
974 case OTG_STATE_UNDEFINED: 940 case OTG_STATE_UNDEFINED:
@@ -1703,7 +1669,7 @@ static void langwell_otg_work(struct work_struct *work)
1703 } 1669 }
1704 1670
1705 dev_dbg(lnw->dev, "%s: new state = %s\n", __func__, 1671 dev_dbg(lnw->dev, "%s: new state = %s\n", __func__,
1706 state_string(iotg->otg.state)); 1672 otg_state_string(iotg->otg.state));
1707} 1673}
1708 1674
1709static ssize_t 1675static ssize_t
@@ -1789,7 +1755,7 @@ show_hsm(struct device *_dev, struct device_attribute *attr, char *buf)
1789 "b_bus_req = \t%d\n" 1755 "b_bus_req = \t%d\n"
1790 "b_bus_suspend_tmout = \t%d\n" 1756 "b_bus_suspend_tmout = \t%d\n"
1791 "b_bus_suspend_vld = \t%d\n", 1757 "b_bus_suspend_vld = \t%d\n",
1792 state_string(iotg->otg.state), 1758 otg_state_string(iotg->otg.state),
1793 iotg->hsm.a_bus_resume, 1759 iotg->hsm.a_bus_resume,
1794 iotg->hsm.a_bus_suspend, 1760 iotg->hsm.a_bus_suspend,
1795 iotg->hsm.a_conn, 1761 iotg->hsm.a_conn,
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 296598628b85..1cdda6c05238 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -1,4 +1,4 @@
1/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. 1/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
2 * 2 *
3 * This program is free software; you can redistribute it and/or modify 3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and 4 * it under the terms of the GNU General Public License version 2 and
@@ -38,6 +38,7 @@
38#include <linux/usb/hcd.h> 38#include <linux/usb/hcd.h>
39#include <linux/usb/msm_hsusb.h> 39#include <linux/usb/msm_hsusb.h>
40#include <linux/usb/msm_hsusb_hw.h> 40#include <linux/usb/msm_hsusb_hw.h>
41#include <linux/regulator/consumer.h>
41 42
42#include <mach/clk.h> 43#include <mach/clk.h>
43 44
@@ -45,6 +46,197 @@
45#define DRIVER_NAME "msm_otg" 46#define DRIVER_NAME "msm_otg"
46 47
47#define ULPI_IO_TIMEOUT_USEC (10 * 1000) 48#define ULPI_IO_TIMEOUT_USEC (10 * 1000)
49
50#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
51#define USB_PHY_3P3_VOL_MAX 3300000 /* uV */
52#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
53#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
54
55#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
56#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
57#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
58#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
59
60#define USB_PHY_VDD_DIG_VOL_MIN 1000000 /* uV */
61#define USB_PHY_VDD_DIG_VOL_MAX 1320000 /* uV */
62
63static struct regulator *hsusb_3p3;
64static struct regulator *hsusb_1p8;
65static struct regulator *hsusb_vddcx;
66
67static int msm_hsusb_init_vddcx(struct msm_otg *motg, int init)
68{
69 int ret = 0;
70
71 if (init) {
72 hsusb_vddcx = regulator_get(motg->otg.dev, "HSUSB_VDDCX");
73 if (IS_ERR(hsusb_vddcx)) {
74 dev_err(motg->otg.dev, "unable to get hsusb vddcx\n");
75 return PTR_ERR(hsusb_vddcx);
76 }
77
78 ret = regulator_set_voltage(hsusb_vddcx,
79 USB_PHY_VDD_DIG_VOL_MIN,
80 USB_PHY_VDD_DIG_VOL_MAX);
81 if (ret) {
82 dev_err(motg->otg.dev, "unable to set the voltage "
83 "for hsusb vddcx\n");
84 regulator_put(hsusb_vddcx);
85 return ret;
86 }
87
88 ret = regulator_enable(hsusb_vddcx);
89 if (ret) {
90 dev_err(motg->otg.dev, "unable to enable hsusb vddcx\n");
91 regulator_put(hsusb_vddcx);
92 }
93 } else {
94 ret = regulator_set_voltage(hsusb_vddcx, 0,
95 USB_PHY_VDD_DIG_VOL_MIN);
96 if (ret) {
97 dev_err(motg->otg.dev, "unable to set the voltage "
98 "for hsusb vddcx\n");
99 return ret;
100 }
101 ret = regulator_disable(hsusb_vddcx);
102 if (ret)
103 dev_err(motg->otg.dev, "unable to disable hsusb vddcx\n");
104
105 regulator_put(hsusb_vddcx);
106 }
107
108 return ret;
109}
110
111static int msm_hsusb_ldo_init(struct msm_otg *motg, int init)
112{
113 int rc = 0;
114
115 if (init) {
116 hsusb_3p3 = regulator_get(motg->otg.dev, "HSUSB_3p3");
117 if (IS_ERR(hsusb_3p3)) {
118 dev_err(motg->otg.dev, "unable to get hsusb 3p3\n");
119 return PTR_ERR(hsusb_3p3);
120 }
121
122 rc = regulator_set_voltage(hsusb_3p3, USB_PHY_3P3_VOL_MIN,
123 USB_PHY_3P3_VOL_MAX);
124 if (rc) {
125 dev_err(motg->otg.dev, "unable to set voltage level "
126 "for hsusb 3p3\n");
127 goto put_3p3;
128 }
129 rc = regulator_enable(hsusb_3p3);
130 if (rc) {
131 dev_err(motg->otg.dev, "unable to enable the hsusb 3p3\n");
132 goto put_3p3;
133 }
134 hsusb_1p8 = regulator_get(motg->otg.dev, "HSUSB_1p8");
135 if (IS_ERR(hsusb_1p8)) {
136 dev_err(motg->otg.dev, "unable to get hsusb 1p8\n");
137 rc = PTR_ERR(hsusb_1p8);
138 goto disable_3p3;
139 }
140 rc = regulator_set_voltage(hsusb_1p8, USB_PHY_1P8_VOL_MIN,
141 USB_PHY_1P8_VOL_MAX);
142 if (rc) {
143 dev_err(motg->otg.dev, "unable to set voltage level "
144 "for hsusb 1p8\n");
145 goto put_1p8;
146 }
147 rc = regulator_enable(hsusb_1p8);
148 if (rc) {
149 dev_err(motg->otg.dev, "unable to enable the hsusb 1p8\n");
150 goto put_1p8;
151 }
152
153 return 0;
154 }
155
156 regulator_disable(hsusb_1p8);
157put_1p8:
158 regulator_put(hsusb_1p8);
159disable_3p3:
160 regulator_disable(hsusb_3p3);
161put_3p3:
162 regulator_put(hsusb_3p3);
163 return rc;
164}
165
166#ifdef CONFIG_PM_SLEEP
167#define USB_PHY_SUSP_DIG_VOL 500000
168static int msm_hsusb_config_vddcx(int high)
169{
170 int max_vol = USB_PHY_VDD_DIG_VOL_MAX;
171 int min_vol;
172 int ret;
173
174 if (high)
175 min_vol = USB_PHY_VDD_DIG_VOL_MIN;
176 else
177 min_vol = USB_PHY_SUSP_DIG_VOL;
178
179 ret = regulator_set_voltage(hsusb_vddcx, min_vol, max_vol);
180 if (ret) {
181 pr_err("%s: unable to set the voltage for regulator "
182 "HSUSB_VDDCX\n", __func__);
183 return ret;
184 }
185
186 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
187
188 return ret;
189}
190#endif
191
192static int msm_hsusb_ldo_set_mode(int on)
193{
194 int ret = 0;
195
196 if (!hsusb_1p8 || IS_ERR(hsusb_1p8)) {
197 pr_err("%s: HSUSB_1p8 is not initialized\n", __func__);
198 return -ENODEV;
199 }
200
201 if (!hsusb_3p3 || IS_ERR(hsusb_3p3)) {
202 pr_err("%s: HSUSB_3p3 is not initialized\n", __func__);
203 return -ENODEV;
204 }
205
206 if (on) {
207 ret = regulator_set_optimum_mode(hsusb_1p8,
208 USB_PHY_1P8_HPM_LOAD);
209 if (ret < 0) {
210 pr_err("%s: Unable to set HPM of the regulator "
211 "HSUSB_1p8\n", __func__);
212 return ret;
213 }
214 ret = regulator_set_optimum_mode(hsusb_3p3,
215 USB_PHY_3P3_HPM_LOAD);
216 if (ret < 0) {
217 pr_err("%s: Unable to set HPM of the regulator "
218 "HSUSB_3p3\n", __func__);
219 regulator_set_optimum_mode(hsusb_1p8,
220 USB_PHY_1P8_LPM_LOAD);
221 return ret;
222 }
223 } else {
224 ret = regulator_set_optimum_mode(hsusb_1p8,
225 USB_PHY_1P8_LPM_LOAD);
226 if (ret < 0)
227 pr_err("%s: Unable to set LPM of the regulator "
228 "HSUSB_1p8\n", __func__);
229 ret = regulator_set_optimum_mode(hsusb_3p3,
230 USB_PHY_3P3_LPM_LOAD);
231 if (ret < 0)
232 pr_err("%s: Unable to set LPM of the regulator "
233 "HSUSB_3p3\n", __func__);
234 }
235
236 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
237 return ret < 0 ? ret : 0;
238}
239
48static int ulpi_read(struct otg_transceiver *otg, u32 reg) 240static int ulpi_read(struct otg_transceiver *otg, u32 reg)
49{ 241{
50 struct msm_otg *motg = container_of(otg, struct msm_otg, otg); 242 struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
@@ -268,27 +460,28 @@ static int msm_otg_suspend(struct msm_otg *motg)
268 460
269 disable_irq(motg->irq); 461 disable_irq(motg->irq);
270 /* 462 /*
463 * Chipidea 45-nm PHY suspend sequence:
464 *
271 * Interrupt Latch Register auto-clear feature is not present 465 * Interrupt Latch Register auto-clear feature is not present
272 * in all PHY versions. Latch register is clear on read type. 466 * in all PHY versions. Latch register is clear on read type.
273 * Clear latch register to avoid spurious wakeup from 467 * Clear latch register to avoid spurious wakeup from
274 * low power mode (LPM). 468 * low power mode (LPM).
275 */ 469 *
276 ulpi_read(otg, 0x14);
277
278 /*
279 * PHY comparators are disabled when PHY enters into low power 470 * PHY comparators are disabled when PHY enters into low power
280 * mode (LPM). Keep PHY comparators ON in LPM only when we expect 471 * mode (LPM). Keep PHY comparators ON in LPM only when we expect
281 * VBUS/Id notifications from USB PHY. Otherwise turn off USB 472 * VBUS/Id notifications from USB PHY. Otherwise turn off USB
282 * PHY comparators. This save significant amount of power. 473 * PHY comparators. This save significant amount of power.
283 */ 474 *
284 if (pdata->otg_control == OTG_PHY_CONTROL)
285 ulpi_write(otg, 0x01, 0x30);
286
287 /*
288 * PLL is not turned off when PHY enters into low power mode (LPM). 475 * PLL is not turned off when PHY enters into low power mode (LPM).
289 * Disable PLL for maximum power savings. 476 * Disable PLL for maximum power savings.
290 */ 477 */
291 ulpi_write(otg, 0x08, 0x09); 478
479 if (motg->pdata->phy_type == CI_45NM_INTEGRATED_PHY) {
480 ulpi_read(otg, 0x14);
481 if (pdata->otg_control == OTG_PHY_CONTROL)
482 ulpi_write(otg, 0x01, 0x30);
483 ulpi_write(otg, 0x08, 0x09);
484 }
292 485
293 /* 486 /*
294 * PHY may take some time or even fail to enter into low power 487 * PHY may take some time or even fail to enter into low power
@@ -319,11 +512,24 @@ static int msm_otg_suspend(struct msm_otg *motg)
319 */ 512 */
320 writel(readl(USB_USBCMD) | ASYNC_INTR_CTRL | ULPI_STP_CTRL, USB_USBCMD); 513 writel(readl(USB_USBCMD) | ASYNC_INTR_CTRL | ULPI_STP_CTRL, USB_USBCMD);
321 514
515 if (motg->pdata->phy_type == SNPS_28NM_INTEGRATED_PHY &&
516 motg->pdata->otg_control == OTG_PMIC_CONTROL)
517 writel(readl(USB_PHY_CTRL) | PHY_RETEN, USB_PHY_CTRL);
518
322 clk_disable(motg->pclk); 519 clk_disable(motg->pclk);
323 clk_disable(motg->clk); 520 clk_disable(motg->clk);
324 if (motg->core_clk) 521 if (motg->core_clk)
325 clk_disable(motg->core_clk); 522 clk_disable(motg->core_clk);
326 523
524 if (!IS_ERR(motg->pclk_src))
525 clk_disable(motg->pclk_src);
526
527 if (motg->pdata->phy_type == SNPS_28NM_INTEGRATED_PHY &&
528 motg->pdata->otg_control == OTG_PMIC_CONTROL) {
529 msm_hsusb_ldo_set_mode(0);
530 msm_hsusb_config_vddcx(0);
531 }
532
327 if (device_may_wakeup(otg->dev)) 533 if (device_may_wakeup(otg->dev))
328 enable_irq_wake(motg->irq); 534 enable_irq_wake(motg->irq);
329 if (bus) 535 if (bus)
@@ -347,11 +553,21 @@ static int msm_otg_resume(struct msm_otg *motg)
347 if (!atomic_read(&motg->in_lpm)) 553 if (!atomic_read(&motg->in_lpm))
348 return 0; 554 return 0;
349 555
556 if (!IS_ERR(motg->pclk_src))
557 clk_enable(motg->pclk_src);
558
350 clk_enable(motg->pclk); 559 clk_enable(motg->pclk);
351 clk_enable(motg->clk); 560 clk_enable(motg->clk);
352 if (motg->core_clk) 561 if (motg->core_clk)
353 clk_enable(motg->core_clk); 562 clk_enable(motg->core_clk);
354 563
564 if (motg->pdata->phy_type == SNPS_28NM_INTEGRATED_PHY &&
565 motg->pdata->otg_control == OTG_PMIC_CONTROL) {
566 msm_hsusb_ldo_set_mode(1);
567 msm_hsusb_config_vddcx(1);
568 writel(readl(USB_PHY_CTRL) & ~PHY_RETEN, USB_PHY_CTRL);
569 }
570
355 temp = readl(USB_USBCMD); 571 temp = readl(USB_USBCMD);
356 temp &= ~ASYNC_INTR_CTRL; 572 temp &= ~ASYNC_INTR_CTRL;
357 temp &= ~ULPI_STP_CTRL; 573 temp &= ~ULPI_STP_CTRL;
@@ -389,20 +605,47 @@ skip_phy_resume:
389 if (bus) 605 if (bus)
390 set_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags); 606 set_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
391 607
608 atomic_set(&motg->in_lpm, 0);
609
392 if (motg->async_int) { 610 if (motg->async_int) {
393 motg->async_int = 0; 611 motg->async_int = 0;
394 pm_runtime_put(otg->dev); 612 pm_runtime_put(otg->dev);
395 enable_irq(motg->irq); 613 enable_irq(motg->irq);
396 } 614 }
397 615
398 atomic_set(&motg->in_lpm, 0);
399
400 dev_info(otg->dev, "USB exited from low power mode\n"); 616 dev_info(otg->dev, "USB exited from low power mode\n");
401 617
402 return 0; 618 return 0;
403} 619}
404#endif 620#endif
405 621
622static void msm_otg_notify_charger(struct msm_otg *motg, unsigned mA)
623{
624 if (motg->cur_power == mA)
625 return;
626
627 /* TODO: Notify PMIC about available current */
628 dev_info(motg->otg.dev, "Avail curr from USB = %u\n", mA);
629 motg->cur_power = mA;
630}
631
632static int msm_otg_set_power(struct otg_transceiver *otg, unsigned mA)
633{
634 struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
635
636 /*
637 * Gadget driver uses set_power method to notify about the
638 * available current based on suspend/configured states.
639 *
640 * IDEV_CHG can be drawn irrespective of suspend/un-configured
641 * states when CDP/ACA is connected.
642 */
643 if (motg->chg_type == USB_SDP_CHARGER)
644 msm_otg_notify_charger(motg, mA);
645
646 return 0;
647}
648
406static void msm_otg_start_host(struct otg_transceiver *otg, int on) 649static void msm_otg_start_host(struct otg_transceiver *otg, int on)
407{ 650{
408 struct msm_otg *motg = container_of(otg, struct msm_otg, otg); 651 struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
@@ -557,6 +800,306 @@ static int msm_otg_set_peripheral(struct otg_transceiver *otg,
557 return 0; 800 return 0;
558} 801}
559 802
803static bool msm_chg_check_secondary_det(struct msm_otg *motg)
804{
805 struct otg_transceiver *otg = &motg->otg;
806 u32 chg_det;
807 bool ret = false;
808
809 switch (motg->pdata->phy_type) {
810 case CI_45NM_INTEGRATED_PHY:
811 chg_det = ulpi_read(otg, 0x34);
812 ret = chg_det & (1 << 4);
813 break;
814 case SNPS_28NM_INTEGRATED_PHY:
815 chg_det = ulpi_read(otg, 0x87);
816 ret = chg_det & 1;
817 break;
818 default:
819 break;
820 }
821 return ret;
822}
823
824static void msm_chg_enable_secondary_det(struct msm_otg *motg)
825{
826 struct otg_transceiver *otg = &motg->otg;
827 u32 chg_det;
828
829 switch (motg->pdata->phy_type) {
830 case CI_45NM_INTEGRATED_PHY:
831 chg_det = ulpi_read(otg, 0x34);
832 /* Turn off charger block */
833 chg_det |= ~(1 << 1);
834 ulpi_write(otg, chg_det, 0x34);
835 udelay(20);
836 /* control chg block via ULPI */
837 chg_det &= ~(1 << 3);
838 ulpi_write(otg, chg_det, 0x34);
839 /* put it in host mode for enabling D- source */
840 chg_det &= ~(1 << 2);
841 ulpi_write(otg, chg_det, 0x34);
842 /* Turn on chg detect block */
843 chg_det &= ~(1 << 1);
844 ulpi_write(otg, chg_det, 0x34);
845 udelay(20);
846 /* enable chg detection */
847 chg_det &= ~(1 << 0);
848 ulpi_write(otg, chg_det, 0x34);
849 break;
850 case SNPS_28NM_INTEGRATED_PHY:
851 /*
852 * Configure DM as current source, DP as current sink
853 * and enable battery charging comparators.
854 */
855 ulpi_write(otg, 0x8, 0x85);
856 ulpi_write(otg, 0x2, 0x85);
857 ulpi_write(otg, 0x1, 0x85);
858 break;
859 default:
860 break;
861 }
862}
863
864static bool msm_chg_check_primary_det(struct msm_otg *motg)
865{
866 struct otg_transceiver *otg = &motg->otg;
867 u32 chg_det;
868 bool ret = false;
869
870 switch (motg->pdata->phy_type) {
871 case CI_45NM_INTEGRATED_PHY:
872 chg_det = ulpi_read(otg, 0x34);
873 ret = chg_det & (1 << 4);
874 break;
875 case SNPS_28NM_INTEGRATED_PHY:
876 chg_det = ulpi_read(otg, 0x87);
877 ret = chg_det & 1;
878 break;
879 default:
880 break;
881 }
882 return ret;
883}
884
885static void msm_chg_enable_primary_det(struct msm_otg *motg)
886{
887 struct otg_transceiver *otg = &motg->otg;
888 u32 chg_det;
889
890 switch (motg->pdata->phy_type) {
891 case CI_45NM_INTEGRATED_PHY:
892 chg_det = ulpi_read(otg, 0x34);
893 /* enable chg detection */
894 chg_det &= ~(1 << 0);
895 ulpi_write(otg, chg_det, 0x34);
896 break;
897 case SNPS_28NM_INTEGRATED_PHY:
898 /*
899 * Configure DP as current source, DM as current sink
900 * and enable battery charging comparators.
901 */
902 ulpi_write(otg, 0x2, 0x85);
903 ulpi_write(otg, 0x1, 0x85);
904 break;
905 default:
906 break;
907 }
908}
909
910static bool msm_chg_check_dcd(struct msm_otg *motg)
911{
912 struct otg_transceiver *otg = &motg->otg;
913 u32 line_state;
914 bool ret = false;
915
916 switch (motg->pdata->phy_type) {
917 case CI_45NM_INTEGRATED_PHY:
918 line_state = ulpi_read(otg, 0x15);
919 ret = !(line_state & 1);
920 break;
921 case SNPS_28NM_INTEGRATED_PHY:
922 line_state = ulpi_read(otg, 0x87);
923 ret = line_state & 2;
924 break;
925 default:
926 break;
927 }
928 return ret;
929}
930
931static void msm_chg_disable_dcd(struct msm_otg *motg)
932{
933 struct otg_transceiver *otg = &motg->otg;
934 u32 chg_det;
935
936 switch (motg->pdata->phy_type) {
937 case CI_45NM_INTEGRATED_PHY:
938 chg_det = ulpi_read(otg, 0x34);
939 chg_det &= ~(1 << 5);
940 ulpi_write(otg, chg_det, 0x34);
941 break;
942 case SNPS_28NM_INTEGRATED_PHY:
943 ulpi_write(otg, 0x10, 0x86);
944 break;
945 default:
946 break;
947 }
948}
949
950static void msm_chg_enable_dcd(struct msm_otg *motg)
951{
952 struct otg_transceiver *otg = &motg->otg;
953 u32 chg_det;
954
955 switch (motg->pdata->phy_type) {
956 case CI_45NM_INTEGRATED_PHY:
957 chg_det = ulpi_read(otg, 0x34);
958 /* Turn on D+ current source */
959 chg_det |= (1 << 5);
960 ulpi_write(otg, chg_det, 0x34);
961 break;
962 case SNPS_28NM_INTEGRATED_PHY:
963 /* Data contact detection enable */
964 ulpi_write(otg, 0x10, 0x85);
965 break;
966 default:
967 break;
968 }
969}
970
971static void msm_chg_block_on(struct msm_otg *motg)
972{
973 struct otg_transceiver *otg = &motg->otg;
974 u32 func_ctrl, chg_det;
975
976 /* put the controller in non-driving mode */
977 func_ctrl = ulpi_read(otg, ULPI_FUNC_CTRL);
978 func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
979 func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
980 ulpi_write(otg, func_ctrl, ULPI_FUNC_CTRL);
981
982 switch (motg->pdata->phy_type) {
983 case CI_45NM_INTEGRATED_PHY:
984 chg_det = ulpi_read(otg, 0x34);
985 /* control chg block via ULPI */
986 chg_det &= ~(1 << 3);
987 ulpi_write(otg, chg_det, 0x34);
988 /* Turn on chg detect block */
989 chg_det &= ~(1 << 1);
990 ulpi_write(otg, chg_det, 0x34);
991 udelay(20);
992 break;
993 case SNPS_28NM_INTEGRATED_PHY:
994 /* Clear charger detecting control bits */
995 ulpi_write(otg, 0x3F, 0x86);
996 /* Clear alt interrupt latch and enable bits */
997 ulpi_write(otg, 0x1F, 0x92);
998 ulpi_write(otg, 0x1F, 0x95);
999 udelay(100);
1000 break;
1001 default:
1002 break;
1003 }
1004}
1005
1006static void msm_chg_block_off(struct msm_otg *motg)
1007{
1008 struct otg_transceiver *otg = &motg->otg;
1009 u32 func_ctrl, chg_det;
1010
1011 switch (motg->pdata->phy_type) {
1012 case CI_45NM_INTEGRATED_PHY:
1013 chg_det = ulpi_read(otg, 0x34);
1014 /* Turn off charger block */
1015 chg_det |= ~(1 << 1);
1016 ulpi_write(otg, chg_det, 0x34);
1017 break;
1018 case SNPS_28NM_INTEGRATED_PHY:
1019 /* Clear charger detecting control bits */
1020 ulpi_write(otg, 0x3F, 0x86);
1021 /* Clear alt interrupt latch and enable bits */
1022 ulpi_write(otg, 0x1F, 0x92);
1023 ulpi_write(otg, 0x1F, 0x95);
1024 break;
1025 default:
1026 break;
1027 }
1028
1029 /* put the controller in normal mode */
1030 func_ctrl = ulpi_read(otg, ULPI_FUNC_CTRL);
1031 func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
1032 func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NORMAL;
1033 ulpi_write(otg, func_ctrl, ULPI_FUNC_CTRL);
1034}
1035
1036#define MSM_CHG_DCD_POLL_TIME (100 * HZ/1000) /* 100 msec */
1037#define MSM_CHG_DCD_MAX_RETRIES 6 /* Tdcd_tmout = 6 * 100 msec */
1038#define MSM_CHG_PRIMARY_DET_TIME (40 * HZ/1000) /* TVDPSRC_ON */
1039#define MSM_CHG_SECONDARY_DET_TIME (40 * HZ/1000) /* TVDMSRC_ON */
1040static void msm_chg_detect_work(struct work_struct *w)
1041{
1042 struct msm_otg *motg = container_of(w, struct msm_otg, chg_work.work);
1043 struct otg_transceiver *otg = &motg->otg;
1044 bool is_dcd, tmout, vout;
1045 unsigned long delay;
1046
1047 dev_dbg(otg->dev, "chg detection work\n");
1048 switch (motg->chg_state) {
1049 case USB_CHG_STATE_UNDEFINED:
1050 pm_runtime_get_sync(otg->dev);
1051 msm_chg_block_on(motg);
1052 msm_chg_enable_dcd(motg);
1053 motg->chg_state = USB_CHG_STATE_WAIT_FOR_DCD;
1054 motg->dcd_retries = 0;
1055 delay = MSM_CHG_DCD_POLL_TIME;
1056 break;
1057 case USB_CHG_STATE_WAIT_FOR_DCD:
1058 is_dcd = msm_chg_check_dcd(motg);
1059 tmout = ++motg->dcd_retries == MSM_CHG_DCD_MAX_RETRIES;
1060 if (is_dcd || tmout) {
1061 msm_chg_disable_dcd(motg);
1062 msm_chg_enable_primary_det(motg);
1063 delay = MSM_CHG_PRIMARY_DET_TIME;
1064 motg->chg_state = USB_CHG_STATE_DCD_DONE;
1065 } else {
1066 delay = MSM_CHG_DCD_POLL_TIME;
1067 }
1068 break;
1069 case USB_CHG_STATE_DCD_DONE:
1070 vout = msm_chg_check_primary_det(motg);
1071 if (vout) {
1072 msm_chg_enable_secondary_det(motg);
1073 delay = MSM_CHG_SECONDARY_DET_TIME;
1074 motg->chg_state = USB_CHG_STATE_PRIMARY_DONE;
1075 } else {
1076 motg->chg_type = USB_SDP_CHARGER;
1077 motg->chg_state = USB_CHG_STATE_DETECTED;
1078 delay = 0;
1079 }
1080 break;
1081 case USB_CHG_STATE_PRIMARY_DONE:
1082 vout = msm_chg_check_secondary_det(motg);
1083 if (vout)
1084 motg->chg_type = USB_DCP_CHARGER;
1085 else
1086 motg->chg_type = USB_CDP_CHARGER;
1087 motg->chg_state = USB_CHG_STATE_SECONDARY_DONE;
1088 /* fall through */
1089 case USB_CHG_STATE_SECONDARY_DONE:
1090 motg->chg_state = USB_CHG_STATE_DETECTED;
1091 case USB_CHG_STATE_DETECTED:
1092 msm_chg_block_off(motg);
1093 dev_dbg(otg->dev, "charger = %d\n", motg->chg_type);
1094 schedule_work(&motg->sm_work);
1095 return;
1096 default:
1097 return;
1098 }
1099
1100 schedule_delayed_work(&motg->chg_work, delay);
1101}
1102
560/* 1103/*
561 * We support OTG, Peripheral only and Host only configurations. In case 1104 * We support OTG, Peripheral only and Host only configurations. In case
562 * of OTG, mode switch (host-->peripheral/peripheral-->host) can happen 1105 * of OTG, mode switch (host-->peripheral/peripheral-->host) can happen
@@ -627,9 +1170,48 @@ static void msm_otg_sm_work(struct work_struct *w)
627 writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC); 1170 writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC);
628 msm_otg_start_host(otg, 1); 1171 msm_otg_start_host(otg, 1);
629 otg->state = OTG_STATE_A_HOST; 1172 otg->state = OTG_STATE_A_HOST;
630 } else if (test_bit(B_SESS_VLD, &motg->inputs) && otg->gadget) { 1173 } else if (test_bit(B_SESS_VLD, &motg->inputs)) {
631 msm_otg_start_peripheral(otg, 1); 1174 switch (motg->chg_state) {
632 otg->state = OTG_STATE_B_PERIPHERAL; 1175 case USB_CHG_STATE_UNDEFINED:
1176 msm_chg_detect_work(&motg->chg_work.work);
1177 break;
1178 case USB_CHG_STATE_DETECTED:
1179 switch (motg->chg_type) {
1180 case USB_DCP_CHARGER:
1181 msm_otg_notify_charger(motg,
1182 IDEV_CHG_MAX);
1183 break;
1184 case USB_CDP_CHARGER:
1185 msm_otg_notify_charger(motg,
1186 IDEV_CHG_MAX);
1187 msm_otg_start_peripheral(otg, 1);
1188 otg->state = OTG_STATE_B_PERIPHERAL;
1189 break;
1190 case USB_SDP_CHARGER:
1191 msm_otg_notify_charger(motg, IUNIT);
1192 msm_otg_start_peripheral(otg, 1);
1193 otg->state = OTG_STATE_B_PERIPHERAL;
1194 break;
1195 default:
1196 break;
1197 }
1198 break;
1199 default:
1200 break;
1201 }
1202 } else {
1203 /*
1204 * If charger detection work is pending, decrement
1205 * the pm usage counter to balance with the one that
1206 * is incremented in charger detection work.
1207 */
1208 if (cancel_delayed_work_sync(&motg->chg_work)) {
1209 pm_runtime_put_sync(otg->dev);
1210 msm_otg_reset(otg);
1211 }
1212 msm_otg_notify_charger(motg, 0);
1213 motg->chg_state = USB_CHG_STATE_UNDEFINED;
1214 motg->chg_type = USB_INVALID_CHARGER;
633 } 1215 }
634 pm_runtime_put_sync(otg->dev); 1216 pm_runtime_put_sync(otg->dev);
635 break; 1217 break;
@@ -637,7 +1219,10 @@ static void msm_otg_sm_work(struct work_struct *w)
637 dev_dbg(otg->dev, "OTG_STATE_B_PERIPHERAL state\n"); 1219 dev_dbg(otg->dev, "OTG_STATE_B_PERIPHERAL state\n");
638 if (!test_bit(B_SESS_VLD, &motg->inputs) || 1220 if (!test_bit(B_SESS_VLD, &motg->inputs) ||
639 !test_bit(ID, &motg->inputs)) { 1221 !test_bit(ID, &motg->inputs)) {
1222 msm_otg_notify_charger(motg, 0);
640 msm_otg_start_peripheral(otg, 0); 1223 msm_otg_start_peripheral(otg, 0);
1224 motg->chg_state = USB_CHG_STATE_UNDEFINED;
1225 motg->chg_type = USB_INVALID_CHARGER;
641 otg->state = OTG_STATE_B_IDLE; 1226 otg->state = OTG_STATE_B_IDLE;
642 msm_otg_reset(otg); 1227 msm_otg_reset(otg);
643 schedule_work(w); 1228 schedule_work(w);
@@ -862,12 +1447,31 @@ static int __init msm_otg_probe(struct platform_device *pdev)
862 ret = PTR_ERR(motg->clk); 1447 ret = PTR_ERR(motg->clk);
863 goto put_phy_reset_clk; 1448 goto put_phy_reset_clk;
864 } 1449 }
1450 clk_set_rate(motg->clk, 60000000);
1451
1452 /*
1453 * If USB Core is running its protocol engine based on CORE CLK,
1454 * CORE CLK must be running at >55Mhz for correct HSUSB
1455 * operation and USB core cannot tolerate frequency changes on
1456 * CORE CLK. For such USB cores, vote for maximum clk frequency
1457 * on pclk source
1458 */
1459 if (motg->pdata->pclk_src_name) {
1460 motg->pclk_src = clk_get(&pdev->dev,
1461 motg->pdata->pclk_src_name);
1462 if (IS_ERR(motg->pclk_src))
1463 goto put_clk;
1464 clk_set_rate(motg->pclk_src, INT_MAX);
1465 clk_enable(motg->pclk_src);
1466 } else
1467 motg->pclk_src = ERR_PTR(-ENOENT);
1468
865 1469
866 motg->pclk = clk_get(&pdev->dev, "usb_hs_pclk"); 1470 motg->pclk = clk_get(&pdev->dev, "usb_hs_pclk");
867 if (IS_ERR(motg->pclk)) { 1471 if (IS_ERR(motg->pclk)) {
868 dev_err(&pdev->dev, "failed to get usb_hs_pclk\n"); 1472 dev_err(&pdev->dev, "failed to get usb_hs_pclk\n");
869 ret = PTR_ERR(motg->pclk); 1473 ret = PTR_ERR(motg->pclk);
870 goto put_clk; 1474 goto put_pclk_src;
871 } 1475 }
872 1476
873 /* 1477 /*
@@ -903,6 +1507,24 @@ static int __init msm_otg_probe(struct platform_device *pdev)
903 1507
904 clk_enable(motg->clk); 1508 clk_enable(motg->clk);
905 clk_enable(motg->pclk); 1509 clk_enable(motg->pclk);
1510
1511 ret = msm_hsusb_init_vddcx(motg, 1);
1512 if (ret) {
1513 dev_err(&pdev->dev, "hsusb vddcx configuration failed\n");
1514 goto free_regs;
1515 }
1516
1517 ret = msm_hsusb_ldo_init(motg, 1);
1518 if (ret) {
1519 dev_err(&pdev->dev, "hsusb vreg configuration failed\n");
1520 goto vddcx_exit;
1521 }
1522 ret = msm_hsusb_ldo_set_mode(1);
1523 if (ret) {
1524 dev_err(&pdev->dev, "hsusb vreg enable failed\n");
1525 goto ldo_exit;
1526 }
1527
906 if (motg->core_clk) 1528 if (motg->core_clk)
907 clk_enable(motg->core_clk); 1529 clk_enable(motg->core_clk);
908 1530
@@ -910,6 +1532,7 @@ static int __init msm_otg_probe(struct platform_device *pdev)
910 writel(0, USB_OTGSC); 1532 writel(0, USB_OTGSC);
911 1533
912 INIT_WORK(&motg->sm_work, msm_otg_sm_work); 1534 INIT_WORK(&motg->sm_work, msm_otg_sm_work);
1535 INIT_DELAYED_WORK(&motg->chg_work, msm_chg_detect_work);
913 ret = request_irq(motg->irq, msm_otg_irq, IRQF_SHARED, 1536 ret = request_irq(motg->irq, msm_otg_irq, IRQF_SHARED,
914 "msm_otg", motg); 1537 "msm_otg", motg);
915 if (ret) { 1538 if (ret) {
@@ -920,6 +1543,7 @@ static int __init msm_otg_probe(struct platform_device *pdev)
920 otg->init = msm_otg_reset; 1543 otg->init = msm_otg_reset;
921 otg->set_host = msm_otg_set_host; 1544 otg->set_host = msm_otg_set_host;
922 otg->set_peripheral = msm_otg_set_peripheral; 1545 otg->set_peripheral = msm_otg_set_peripheral;
1546 otg->set_power = msm_otg_set_power;
923 1547
924 otg->io_ops = &msm_otg_io_ops; 1548 otg->io_ops = &msm_otg_io_ops;
925 1549
@@ -949,12 +1573,21 @@ free_irq:
949disable_clks: 1573disable_clks:
950 clk_disable(motg->pclk); 1574 clk_disable(motg->pclk);
951 clk_disable(motg->clk); 1575 clk_disable(motg->clk);
1576ldo_exit:
1577 msm_hsusb_ldo_init(motg, 0);
1578vddcx_exit:
1579 msm_hsusb_init_vddcx(motg, 0);
952free_regs: 1580free_regs:
953 iounmap(motg->regs); 1581 iounmap(motg->regs);
954put_core_clk: 1582put_core_clk:
955 if (motg->core_clk) 1583 if (motg->core_clk)
956 clk_put(motg->core_clk); 1584 clk_put(motg->core_clk);
957 clk_put(motg->pclk); 1585 clk_put(motg->pclk);
1586put_pclk_src:
1587 if (!IS_ERR(motg->pclk_src)) {
1588 clk_disable(motg->pclk_src);
1589 clk_put(motg->pclk_src);
1590 }
958put_clk: 1591put_clk:
959 clk_put(motg->clk); 1592 clk_put(motg->clk);
960put_phy_reset_clk: 1593put_phy_reset_clk:
@@ -974,6 +1607,7 @@ static int __devexit msm_otg_remove(struct platform_device *pdev)
974 return -EBUSY; 1607 return -EBUSY;
975 1608
976 msm_otg_debugfs_cleanup(); 1609 msm_otg_debugfs_cleanup();
1610 cancel_delayed_work_sync(&motg->chg_work);
977 cancel_work_sync(&motg->sm_work); 1611 cancel_work_sync(&motg->sm_work);
978 1612
979 pm_runtime_resume(&pdev->dev); 1613 pm_runtime_resume(&pdev->dev);
@@ -1004,6 +1638,11 @@ static int __devexit msm_otg_remove(struct platform_device *pdev)
1004 clk_disable(motg->clk); 1638 clk_disable(motg->clk);
1005 if (motg->core_clk) 1639 if (motg->core_clk)
1006 clk_disable(motg->core_clk); 1640 clk_disable(motg->core_clk);
1641 if (!IS_ERR(motg->pclk_src)) {
1642 clk_disable(motg->pclk_src);
1643 clk_put(motg->pclk_src);
1644 }
1645 msm_hsusb_ldo_init(motg, 0);
1007 1646
1008 iounmap(motg->regs); 1647 iounmap(motg->regs);
1009 pm_runtime_set_suspended(&pdev->dev); 1648 pm_runtime_set_suspended(&pdev->dev);
diff --git a/drivers/usb/otg/otg.c b/drivers/usb/otg/otg.c
index 0a43a7db750f..fb7adeff9ffa 100644
--- a/drivers/usb/otg/otg.c
+++ b/drivers/usb/otg/otg.c
@@ -64,3 +64,38 @@ int otg_set_transceiver(struct otg_transceiver *x)
64 return 0; 64 return 0;
65} 65}
66EXPORT_SYMBOL(otg_set_transceiver); 66EXPORT_SYMBOL(otg_set_transceiver);
67
68const char *otg_state_string(enum usb_otg_state state)
69{
70 switch (state) {
71 case OTG_STATE_A_IDLE:
72 return "a_idle";
73 case OTG_STATE_A_WAIT_VRISE:
74 return "a_wait_vrise";
75 case OTG_STATE_A_WAIT_BCON:
76 return "a_wait_bcon";
77 case OTG_STATE_A_HOST:
78 return "a_host";
79 case OTG_STATE_A_SUSPEND:
80 return "a_suspend";
81 case OTG_STATE_A_PERIPHERAL:
82 return "a_peripheral";
83 case OTG_STATE_A_WAIT_VFALL:
84 return "a_wait_vfall";
85 case OTG_STATE_A_VBUS_ERR:
86 return "a_vbus_err";
87 case OTG_STATE_B_IDLE:
88 return "b_idle";
89 case OTG_STATE_B_SRP_INIT:
90 return "b_srp_init";
91 case OTG_STATE_B_PERIPHERAL:
92 return "b_peripheral";
93 case OTG_STATE_B_WAIT_ACON:
94 return "b_wait_acon";
95 case OTG_STATE_B_HOST:
96 return "b_host";
97 default:
98 return "UNDEFINED";
99 }
100}
101EXPORT_SYMBOL(otg_state_string);
diff --git a/drivers/usb/otg/otg_fsm.c b/drivers/usb/otg/otg_fsm.c
new file mode 100644
index 000000000000..b0cc422f2ff9
--- /dev/null
+++ b/drivers/usb/otg/otg_fsm.c
@@ -0,0 +1,349 @@
1/*
2 * OTG Finite State Machine from OTG spec
3 *
4 * Copyright (C) 2007,2008 Freescale Semiconductor, Inc.
5 *
6 * Author: Li Yang <LeoLi@freescale.com>
7 * Jerry Huang <Chang-Ming.Huang@freescale.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/kernel.h>
25#include <linux/types.h>
26#include <linux/spinlock.h>
27#include <linux/delay.h>
28#include <linux/usb.h>
29#include <linux/usb/gadget.h>
30#include <linux/usb/otg.h>
31#include <linux/types.h>
32
33#include "otg_fsm.h"
34
35/* Change USB protocol when there is a protocol change */
36static int otg_set_protocol(struct otg_fsm *fsm, int protocol)
37{
38 int ret = 0;
39
40 if (fsm->protocol != protocol) {
41 VDBG("Changing role fsm->protocol= %d; new protocol= %d\n",
42 fsm->protocol, protocol);
43 /* stop old protocol */
44 if (fsm->protocol == PROTO_HOST)
45 ret = fsm->ops->start_host(fsm, 0);
46 else if (fsm->protocol == PROTO_GADGET)
47 ret = fsm->ops->start_gadget(fsm, 0);
48 if (ret)
49 return ret;
50
51 /* start new protocol */
52 if (protocol == PROTO_HOST)
53 ret = fsm->ops->start_host(fsm, 1);
54 else if (protocol == PROTO_GADGET)
55 ret = fsm->ops->start_gadget(fsm, 1);
56 if (ret)
57 return ret;
58
59 fsm->protocol = protocol;
60 return 0;
61 }
62
63 return 0;
64}
65
66static int state_changed;
67
68/* Called when leaving a state. Do state clean up jobs here */
69void otg_leave_state(struct otg_fsm *fsm, enum usb_otg_state old_state)
70{
71 switch (old_state) {
72 case OTG_STATE_B_IDLE:
73 otg_del_timer(fsm, b_se0_srp_tmr);
74 fsm->b_se0_srp = 0;
75 break;
76 case OTG_STATE_B_SRP_INIT:
77 fsm->b_srp_done = 0;
78 break;
79 case OTG_STATE_B_PERIPHERAL:
80 break;
81 case OTG_STATE_B_WAIT_ACON:
82 otg_del_timer(fsm, b_ase0_brst_tmr);
83 fsm->b_ase0_brst_tmout = 0;
84 break;
85 case OTG_STATE_B_HOST:
86 break;
87 case OTG_STATE_A_IDLE:
88 break;
89 case OTG_STATE_A_WAIT_VRISE:
90 otg_del_timer(fsm, a_wait_vrise_tmr);
91 fsm->a_wait_vrise_tmout = 0;
92 break;
93 case OTG_STATE_A_WAIT_BCON:
94 otg_del_timer(fsm, a_wait_bcon_tmr);
95 fsm->a_wait_bcon_tmout = 0;
96 break;
97 case OTG_STATE_A_HOST:
98 otg_del_timer(fsm, a_wait_enum_tmr);
99 break;
100 case OTG_STATE_A_SUSPEND:
101 otg_del_timer(fsm, a_aidl_bdis_tmr);
102 fsm->a_aidl_bdis_tmout = 0;
103 fsm->a_suspend_req = 0;
104 break;
105 case OTG_STATE_A_PERIPHERAL:
106 break;
107 case OTG_STATE_A_WAIT_VFALL:
108 otg_del_timer(fsm, a_wait_vrise_tmr);
109 break;
110 case OTG_STATE_A_VBUS_ERR:
111 break;
112 default:
113 break;
114 }
115}
116
117/* Called when entering a state */
118int otg_set_state(struct otg_fsm *fsm, enum usb_otg_state new_state)
119{
120 state_changed = 1;
121 if (fsm->transceiver->state == new_state)
122 return 0;
123 VDBG("Set state: %s\n", otg_state_string(new_state));
124 otg_leave_state(fsm, fsm->transceiver->state);
125 switch (new_state) {
126 case OTG_STATE_B_IDLE:
127 otg_drv_vbus(fsm, 0);
128 otg_chrg_vbus(fsm, 0);
129 otg_loc_conn(fsm, 0);
130 otg_loc_sof(fsm, 0);
131 otg_set_protocol(fsm, PROTO_UNDEF);
132 otg_add_timer(fsm, b_se0_srp_tmr);
133 break;
134 case OTG_STATE_B_SRP_INIT:
135 otg_start_pulse(fsm);
136 otg_loc_sof(fsm, 0);
137 otg_set_protocol(fsm, PROTO_UNDEF);
138 otg_add_timer(fsm, b_srp_fail_tmr);
139 break;
140 case OTG_STATE_B_PERIPHERAL:
141 otg_chrg_vbus(fsm, 0);
142 otg_loc_conn(fsm, 1);
143 otg_loc_sof(fsm, 0);
144 otg_set_protocol(fsm, PROTO_GADGET);
145 break;
146 case OTG_STATE_B_WAIT_ACON:
147 otg_chrg_vbus(fsm, 0);
148 otg_loc_conn(fsm, 0);
149 otg_loc_sof(fsm, 0);
150 otg_set_protocol(fsm, PROTO_HOST);
151 otg_add_timer(fsm, b_ase0_brst_tmr);
152 fsm->a_bus_suspend = 0;
153 break;
154 case OTG_STATE_B_HOST:
155 otg_chrg_vbus(fsm, 0);
156 otg_loc_conn(fsm, 0);
157 otg_loc_sof(fsm, 1);
158 otg_set_protocol(fsm, PROTO_HOST);
159 usb_bus_start_enum(fsm->transceiver->host,
160 fsm->transceiver->host->otg_port);
161 break;
162 case OTG_STATE_A_IDLE:
163 otg_drv_vbus(fsm, 0);
164 otg_chrg_vbus(fsm, 0);
165 otg_loc_conn(fsm, 0);
166 otg_loc_sof(fsm, 0);
167 otg_set_protocol(fsm, PROTO_HOST);
168 break;
169 case OTG_STATE_A_WAIT_VRISE:
170 otg_drv_vbus(fsm, 1);
171 otg_loc_conn(fsm, 0);
172 otg_loc_sof(fsm, 0);
173 otg_set_protocol(fsm, PROTO_HOST);
174 otg_add_timer(fsm, a_wait_vrise_tmr);
175 break;
176 case OTG_STATE_A_WAIT_BCON:
177 otg_drv_vbus(fsm, 1);
178 otg_loc_conn(fsm, 0);
179 otg_loc_sof(fsm, 0);
180 otg_set_protocol(fsm, PROTO_HOST);
181 otg_add_timer(fsm, a_wait_bcon_tmr);
182 break;
183 case OTG_STATE_A_HOST:
184 otg_drv_vbus(fsm, 1);
185 otg_loc_conn(fsm, 0);
186 otg_loc_sof(fsm, 1);
187 otg_set_protocol(fsm, PROTO_HOST);
188 /*
189 * When HNP is triggered while a_bus_req = 0, a_host will
190 * suspend too fast to complete a_set_b_hnp_en
191 */
192 if (!fsm->a_bus_req || fsm->a_suspend_req)
193 otg_add_timer(fsm, a_wait_enum_tmr);
194 break;
195 case OTG_STATE_A_SUSPEND:
196 otg_drv_vbus(fsm, 1);
197 otg_loc_conn(fsm, 0);
198 otg_loc_sof(fsm, 0);
199 otg_set_protocol(fsm, PROTO_HOST);
200 otg_add_timer(fsm, a_aidl_bdis_tmr);
201
202 break;
203 case OTG_STATE_A_PERIPHERAL:
204 otg_loc_conn(fsm, 1);
205 otg_loc_sof(fsm, 0);
206 otg_set_protocol(fsm, PROTO_GADGET);
207 otg_drv_vbus(fsm, 1);
208 break;
209 case OTG_STATE_A_WAIT_VFALL:
210 otg_drv_vbus(fsm, 0);
211 otg_loc_conn(fsm, 0);
212 otg_loc_sof(fsm, 0);
213 otg_set_protocol(fsm, PROTO_HOST);
214 break;
215 case OTG_STATE_A_VBUS_ERR:
216 otg_drv_vbus(fsm, 0);
217 otg_loc_conn(fsm, 0);
218 otg_loc_sof(fsm, 0);
219 otg_set_protocol(fsm, PROTO_UNDEF);
220 break;
221 default:
222 break;
223 }
224
225 fsm->transceiver->state = new_state;
226 return 0;
227}
228
229/* State change judgement */
230int otg_statemachine(struct otg_fsm *fsm)
231{
232 enum usb_otg_state state;
233 unsigned long flags;
234
235 spin_lock_irqsave(&fsm->lock, flags);
236
237 state = fsm->transceiver->state;
238 state_changed = 0;
239 /* State machine state change judgement */
240
241 switch (state) {
242 case OTG_STATE_UNDEFINED:
243 VDBG("fsm->id = %d\n", fsm->id);
244 if (fsm->id)
245 otg_set_state(fsm, OTG_STATE_B_IDLE);
246 else
247 otg_set_state(fsm, OTG_STATE_A_IDLE);
248 break;
249 case OTG_STATE_B_IDLE:
250 if (!fsm->id)
251 otg_set_state(fsm, OTG_STATE_A_IDLE);
252 else if (fsm->b_sess_vld && fsm->transceiver->gadget)
253 otg_set_state(fsm, OTG_STATE_B_PERIPHERAL);
254 else if (fsm->b_bus_req && fsm->b_sess_end && fsm->b_se0_srp)
255 otg_set_state(fsm, OTG_STATE_B_SRP_INIT);
256 break;
257 case OTG_STATE_B_SRP_INIT:
258 if (!fsm->id || fsm->b_srp_done)
259 otg_set_state(fsm, OTG_STATE_B_IDLE);
260 break;
261 case OTG_STATE_B_PERIPHERAL:
262 if (!fsm->id || !fsm->b_sess_vld)
263 otg_set_state(fsm, OTG_STATE_B_IDLE);
264 else if (fsm->b_bus_req && fsm->transceiver->
265 gadget->b_hnp_enable && fsm->a_bus_suspend)
266 otg_set_state(fsm, OTG_STATE_B_WAIT_ACON);
267 break;
268 case OTG_STATE_B_WAIT_ACON:
269 if (fsm->a_conn)
270 otg_set_state(fsm, OTG_STATE_B_HOST);
271 else if (!fsm->id || !fsm->b_sess_vld)
272 otg_set_state(fsm, OTG_STATE_B_IDLE);
273 else if (fsm->a_bus_resume || fsm->b_ase0_brst_tmout) {
274 fsm->b_ase0_brst_tmout = 0;
275 otg_set_state(fsm, OTG_STATE_B_PERIPHERAL);
276 }
277 break;
278 case OTG_STATE_B_HOST:
279 if (!fsm->id || !fsm->b_sess_vld)
280 otg_set_state(fsm, OTG_STATE_B_IDLE);
281 else if (!fsm->b_bus_req || !fsm->a_conn)
282 otg_set_state(fsm, OTG_STATE_B_PERIPHERAL);
283 break;
284 case OTG_STATE_A_IDLE:
285 if (fsm->id)
286 otg_set_state(fsm, OTG_STATE_B_IDLE);
287 else if (!fsm->a_bus_drop && (fsm->a_bus_req || fsm->a_srp_det))
288 otg_set_state(fsm, OTG_STATE_A_WAIT_VRISE);
289 break;
290 case OTG_STATE_A_WAIT_VRISE:
291 if (fsm->id || fsm->a_bus_drop || fsm->a_vbus_vld ||
292 fsm->a_wait_vrise_tmout) {
293 otg_set_state(fsm, OTG_STATE_A_WAIT_BCON);
294 }
295 break;
296 case OTG_STATE_A_WAIT_BCON:
297 if (!fsm->a_vbus_vld)
298 otg_set_state(fsm, OTG_STATE_A_VBUS_ERR);
299 else if (fsm->b_conn)
300 otg_set_state(fsm, OTG_STATE_A_HOST);
301 else if (fsm->id | fsm->a_bus_drop | fsm->a_wait_bcon_tmout)
302 otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL);
303 break;
304 case OTG_STATE_A_HOST:
305 if ((!fsm->a_bus_req || fsm->a_suspend_req) &&
306 fsm->transceiver->host->b_hnp_enable)
307 otg_set_state(fsm, OTG_STATE_A_SUSPEND);
308 else if (fsm->id || !fsm->b_conn || fsm->a_bus_drop)
309 otg_set_state(fsm, OTG_STATE_A_WAIT_BCON);
310 else if (!fsm->a_vbus_vld)
311 otg_set_state(fsm, OTG_STATE_A_VBUS_ERR);
312 break;
313 case OTG_STATE_A_SUSPEND:
314 if (!fsm->b_conn && fsm->transceiver->host->b_hnp_enable)
315 otg_set_state(fsm, OTG_STATE_A_PERIPHERAL);
316 else if (!fsm->b_conn && !fsm->transceiver->host->b_hnp_enable)
317 otg_set_state(fsm, OTG_STATE_A_WAIT_BCON);
318 else if (fsm->a_bus_req || fsm->b_bus_resume)
319 otg_set_state(fsm, OTG_STATE_A_HOST);
320 else if (fsm->id || fsm->a_bus_drop || fsm->a_aidl_bdis_tmout)
321 otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL);
322 else if (!fsm->a_vbus_vld)
323 otg_set_state(fsm, OTG_STATE_A_VBUS_ERR);
324 break;
325 case OTG_STATE_A_PERIPHERAL:
326 if (fsm->id || fsm->a_bus_drop)
327 otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL);
328 else if (fsm->b_bus_suspend)
329 otg_set_state(fsm, OTG_STATE_A_WAIT_BCON);
330 else if (!fsm->a_vbus_vld)
331 otg_set_state(fsm, OTG_STATE_A_VBUS_ERR);
332 break;
333 case OTG_STATE_A_WAIT_VFALL:
334 if (fsm->id || fsm->a_bus_req || (!fsm->a_sess_vld &&
335 !fsm->b_conn))
336 otg_set_state(fsm, OTG_STATE_A_IDLE);
337 break;
338 case OTG_STATE_A_VBUS_ERR:
339 if (fsm->id || fsm->a_bus_drop || fsm->a_clr_err)
340 otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL);
341 break;
342 default:
343 break;
344 }
345 spin_unlock_irqrestore(&fsm->lock, flags);
346
347 VDBG("quit statemachine, changed = %d\n", state_changed);
348 return state_changed;
349}
diff --git a/drivers/usb/otg/otg_fsm.h b/drivers/usb/otg/otg_fsm.h
new file mode 100644
index 000000000000..0cecf1d593a0
--- /dev/null
+++ b/drivers/usb/otg/otg_fsm.h
@@ -0,0 +1,154 @@
1/* Copyright (C) 2007,2008 Freescale Semiconductor, Inc.
2 *
3 * This program is free software; you can redistribute it and/or modify it
4 * under the terms of the GNU General Public License as published by the
5 * Free Software Foundation; either version 2 of the License, or (at your
6 * option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 675 Mass Ave, Cambridge, MA 02139, USA.
16 */
17
18#undef DEBUG
19#undef VERBOSE
20
21#ifdef DEBUG
22#define DBG(fmt, args...) printk(KERN_DEBUG "[%s] " fmt , \
23 __func__, ## args)
24#else
25#define DBG(fmt, args...) do {} while (0)
26#endif
27
28#ifdef VERBOSE
29#define VDBG DBG
30#else
31#define VDBG(stuff...) do {} while (0)
32#endif
33
34#ifdef VERBOSE
35#define MPC_LOC printk("Current Location [%s]:[%d]\n", __FILE__, __LINE__)
36#else
37#define MPC_LOC do {} while (0)
38#endif
39
40#define PROTO_UNDEF (0)
41#define PROTO_HOST (1)
42#define PROTO_GADGET (2)
43
44/* OTG state machine according to the OTG spec */
45struct otg_fsm {
46 /* Input */
47 int a_bus_resume;
48 int a_bus_suspend;
49 int a_conn;
50 int a_sess_vld;
51 int a_srp_det;
52 int a_vbus_vld;
53 int b_bus_resume;
54 int b_bus_suspend;
55 int b_conn;
56 int b_se0_srp;
57 int b_sess_end;
58 int b_sess_vld;
59 int id;
60
61 /* Internal variables */
62 int a_set_b_hnp_en;
63 int b_srp_done;
64 int b_hnp_enable;
65
66 /* Timeout indicator for timers */
67 int a_wait_vrise_tmout;
68 int a_wait_bcon_tmout;
69 int a_aidl_bdis_tmout;
70 int b_ase0_brst_tmout;
71
72 /* Informative variables */
73 int a_bus_drop;
74 int a_bus_req;
75 int a_clr_err;
76 int a_suspend_req;
77 int b_bus_req;
78
79 /* Output */
80 int drv_vbus;
81 int loc_conn;
82 int loc_sof;
83
84 struct otg_fsm_ops *ops;
85 struct otg_transceiver *transceiver;
86
87 /* Current usb protocol used: 0:undefine; 1:host; 2:client */
88 int protocol;
89 spinlock_t lock;
90};
91
92struct otg_fsm_ops {
93 void (*chrg_vbus)(int on);
94 void (*drv_vbus)(int on);
95 void (*loc_conn)(int on);
96 void (*loc_sof)(int on);
97 void (*start_pulse)(void);
98 void (*add_timer)(void *timer);
99 void (*del_timer)(void *timer);
100 int (*start_host)(struct otg_fsm *fsm, int on);
101 int (*start_gadget)(struct otg_fsm *fsm, int on);
102};
103
104
105static inline void otg_chrg_vbus(struct otg_fsm *fsm, int on)
106{
107 fsm->ops->chrg_vbus(on);
108}
109
110static inline void otg_drv_vbus(struct otg_fsm *fsm, int on)
111{
112 if (fsm->drv_vbus != on) {
113 fsm->drv_vbus = on;
114 fsm->ops->drv_vbus(on);
115 }
116}
117
118static inline void otg_loc_conn(struct otg_fsm *fsm, int on)
119{
120 if (fsm->loc_conn != on) {
121 fsm->loc_conn = on;
122 fsm->ops->loc_conn(on);
123 }
124}
125
126static inline void otg_loc_sof(struct otg_fsm *fsm, int on)
127{
128 if (fsm->loc_sof != on) {
129 fsm->loc_sof = on;
130 fsm->ops->loc_sof(on);
131 }
132}
133
134static inline void otg_start_pulse(struct otg_fsm *fsm)
135{
136 fsm->ops->start_pulse();
137}
138
139static inline void otg_add_timer(struct otg_fsm *fsm, void *timer)
140{
141 fsm->ops->add_timer(timer);
142}
143
144static inline void otg_del_timer(struct otg_fsm *fsm, void *timer)
145{
146 fsm->ops->del_timer(timer);
147}
148
149int otg_statemachine(struct otg_fsm *fsm);
150
151/* Defined by device specific driver, for different timer implementation */
152extern struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr,
153 *a_aidl_bdis_tmr, *b_ase0_brst_tmr, *b_se0_srp_tmr, *b_srp_fail_tmr,
154 *a_wait_enum_tmr;
diff --git a/drivers/usb/otg/twl4030-usb.c b/drivers/usb/otg/twl4030-usb.c
index e01b073cc489..efeb4d1517ff 100644
--- a/drivers/usb/otg/twl4030-usb.c
+++ b/drivers/usb/otg/twl4030-usb.c
@@ -160,6 +160,7 @@ struct twl4030_usb {
160 160
161 int irq; 161 int irq;
162 u8 linkstat; 162 u8 linkstat;
163 bool vbus_supplied;
163 u8 asleep; 164 u8 asleep;
164 bool irq_enabled; 165 bool irq_enabled;
165}; 166};
@@ -250,6 +251,8 @@ static enum usb_xceiv_events twl4030_usb_linkstat(struct twl4030_usb *twl)
250 int status; 251 int status;
251 int linkstat = USB_EVENT_NONE; 252 int linkstat = USB_EVENT_NONE;
252 253
254 twl->vbus_supplied = false;
255
253 /* 256 /*
254 * For ID/VBUS sensing, see manual section 15.4.8 ... 257 * For ID/VBUS sensing, see manual section 15.4.8 ...
255 * except when using only battery backup power, two 258 * except when using only battery backup power, two
@@ -265,6 +268,9 @@ static enum usb_xceiv_events twl4030_usb_linkstat(struct twl4030_usb *twl)
265 if (status < 0) 268 if (status < 0)
266 dev_err(twl->dev, "USB link status err %d\n", status); 269 dev_err(twl->dev, "USB link status err %d\n", status);
267 else if (status & (BIT(7) | BIT(2))) { 270 else if (status & (BIT(7) | BIT(2))) {
271 if (status & (BIT(7)))
272 twl->vbus_supplied = true;
273
268 if (status & BIT(2)) 274 if (status & BIT(2))
269 linkstat = USB_EVENT_ID; 275 linkstat = USB_EVENT_ID;
270 else 276 else
@@ -484,7 +490,7 @@ static ssize_t twl4030_usb_vbus_show(struct device *dev,
484 490
485 spin_lock_irqsave(&twl->lock, flags); 491 spin_lock_irqsave(&twl->lock, flags);
486 ret = sprintf(buf, "%s\n", 492 ret = sprintf(buf, "%s\n",
487 (twl->linkstat == USB_EVENT_VBUS) ? "on" : "off"); 493 twl->vbus_supplied ? "on" : "off");
488 spin_unlock_irqrestore(&twl->lock, flags); 494 spin_unlock_irqrestore(&twl->lock, flags);
489 495
490 return ret; 496 return ret;
@@ -608,6 +614,7 @@ static int __devinit twl4030_usb_probe(struct platform_device *pdev)
608 twl->otg.set_peripheral = twl4030_set_peripheral; 614 twl->otg.set_peripheral = twl4030_set_peripheral;
609 twl->otg.set_suspend = twl4030_set_suspend; 615 twl->otg.set_suspend = twl4030_set_suspend;
610 twl->usb_mode = pdata->usb_mode; 616 twl->usb_mode = pdata->usb_mode;
617 twl->vbus_supplied = false;
611 twl->asleep = 1; 618 twl->asleep = 1;
612 619
613 /* init spinlock for workqueue */ 620 /* init spinlock for workqueue */
diff --git a/drivers/usb/otg/twl6030-usb.c b/drivers/usb/otg/twl6030-usb.c
index 8a91b4b832a1..6e920de64ef6 100644
--- a/drivers/usb/otg/twl6030-usb.c
+++ b/drivers/usb/otg/twl6030-usb.c
@@ -101,7 +101,7 @@ struct twl6030_usb {
101 bool irq_enabled; 101 bool irq_enabled;
102}; 102};
103 103
104#define xceiv_to_twl(x) container_of((x), struct twl6030_usb, otg); 104#define xceiv_to_twl(x) container_of((x), struct twl6030_usb, otg)
105 105
106/*-------------------------------------------------------------------------*/ 106/*-------------------------------------------------------------------------*/
107 107
diff --git a/drivers/usb/renesas_usbhs/Kconfig b/drivers/usb/renesas_usbhs/Kconfig
new file mode 100644
index 000000000000..b2e64918884c
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/Kconfig
@@ -0,0 +1,16 @@
1#
2# Renesas USB Controller Drivers
3#
4
5config USB_RENESAS_USBHS
6 tristate 'Renesas USBHS controller'
7 depends on SUPERH || ARCH_SHMOBILE
8 default n
9 help
10 Renesas USBHS is a discrete USB host and peripheral controller chip
11 that supports both full and high speed USB 2.0 data transfers.
12 It has nine or more configurable endpoints, and endpoint zero.
13
14 Say "y" to link the driver statically, or "m" to build a
15 dynamically linked module called "renesas_usbhs" and force all
16 gadget drivers to also be dynamically linked.
diff --git a/drivers/usb/renesas_usbhs/Makefile b/drivers/usb/renesas_usbhs/Makefile
new file mode 100644
index 000000000000..b8798ad16278
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/Makefile
@@ -0,0 +1,9 @@
1#
2# for Renesas USB
3#
4
5obj-$(CONFIG_USB_RENESAS_USBHS) += renesas_usbhs.o
6
7renesas_usbhs-y := common.o mod.o pipe.o
8
9renesas_usbhs-$(CONFIG_USB_RENESAS_USBHS_UDC) += mod_gadget.o
diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
new file mode 100644
index 000000000000..34e68e0205c5
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/common.c
@@ -0,0 +1,437 @@
1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/pm_runtime.h>
20#include <linux/slab.h>
21#include <linux/sysfs.h>
22#include "./common.h"
23
24#define USBHSF_RUNTIME_PWCTRL (1 << 0)
25
26/* status */
27#define usbhsc_flags_init(p) do {(p)->flags = 0; } while (0)
28#define usbhsc_flags_set(p, b) ((p)->flags |= (b))
29#define usbhsc_flags_clr(p, b) ((p)->flags &= ~(b))
30#define usbhsc_flags_has(p, b) ((p)->flags & (b))
31
32/*
33 * platform call back
34 *
35 * renesas usb support platform callback function.
36 * Below macro call it.
37 * if platform doesn't have callback, it return 0 (no error)
38 */
39#define usbhs_platform_call(priv, func, args...)\
40 (!(priv) ? -ENODEV : \
41 !((priv)->pfunc->func) ? 0 : \
42 (priv)->pfunc->func(args))
43
44/*
45 * common functions
46 */
47u16 usbhs_read(struct usbhs_priv *priv, u32 reg)
48{
49 return ioread16(priv->base + reg);
50}
51
52void usbhs_write(struct usbhs_priv *priv, u32 reg, u16 data)
53{
54 iowrite16(data, priv->base + reg);
55}
56
57void usbhs_bset(struct usbhs_priv *priv, u32 reg, u16 mask, u16 data)
58{
59 u16 val = usbhs_read(priv, reg);
60
61 val &= ~mask;
62 val |= data & mask;
63
64 usbhs_write(priv, reg, val);
65}
66
67struct usbhs_priv *usbhs_pdev_to_priv(struct platform_device *pdev)
68{
69 return dev_get_drvdata(&pdev->dev);
70}
71
72/*
73 * syscfg functions
74 */
75void usbhs_sys_clock_ctrl(struct usbhs_priv *priv, int enable)
76{
77 usbhs_bset(priv, SYSCFG, SCKE, enable ? SCKE : 0);
78}
79
80void usbhs_sys_hispeed_ctrl(struct usbhs_priv *priv, int enable)
81{
82 usbhs_bset(priv, SYSCFG, HSE, enable ? HSE : 0);
83}
84
85void usbhs_sys_usb_ctrl(struct usbhs_priv *priv, int enable)
86{
87 usbhs_bset(priv, SYSCFG, USBE, enable ? USBE : 0);
88}
89
90void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable)
91{
92 u16 mask = DCFM | DRPD | DPRPU;
93 u16 val = DCFM | DRPD;
94
95 /*
96 * if enable
97 *
98 * - select Host mode
99 * - D+ Line/D- Line Pull-down
100 */
101 usbhs_bset(priv, SYSCFG, mask, enable ? val : 0);
102}
103
104void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable)
105{
106 u16 mask = DCFM | DRPD | DPRPU;
107 u16 val = DPRPU;
108
109 /*
110 * if enable
111 *
112 * - select Function mode
113 * - D+ Line Pull-up
114 */
115 usbhs_bset(priv, SYSCFG, mask, enable ? val : 0);
116}
117
118/*
119 * frame functions
120 */
121int usbhs_frame_get_num(struct usbhs_priv *priv)
122{
123 return usbhs_read(priv, FRMNUM) & FRNM_MASK;
124}
125
126/*
127 * local functions
128 */
129static void usbhsc_bus_ctrl(struct usbhs_priv *priv, int enable)
130{
131 int wait = usbhs_get_dparam(priv, buswait_bwait);
132 u16 data = 0;
133
134 if (enable) {
135 /* set bus wait if platform have */
136 if (wait)
137 usbhs_bset(priv, BUSWAIT, 0x000F, wait);
138 }
139 usbhs_write(priv, DVSTCTR, data);
140}
141
142/*
143 * platform default param
144 */
145static u32 usbhsc_default_pipe_type[] = {
146 USB_ENDPOINT_XFER_CONTROL,
147 USB_ENDPOINT_XFER_ISOC,
148 USB_ENDPOINT_XFER_ISOC,
149 USB_ENDPOINT_XFER_BULK,
150 USB_ENDPOINT_XFER_BULK,
151 USB_ENDPOINT_XFER_BULK,
152 USB_ENDPOINT_XFER_INT,
153 USB_ENDPOINT_XFER_INT,
154 USB_ENDPOINT_XFER_INT,
155 USB_ENDPOINT_XFER_INT,
156};
157
158/*
159 * power control
160 */
161static void usbhsc_power_ctrl(struct usbhs_priv *priv, int enable)
162{
163 struct device *dev = usbhs_priv_to_dev(priv);
164
165 if (enable) {
166 /* enable PM */
167 pm_runtime_get_sync(dev);
168
169 /* USB on */
170 usbhs_sys_clock_ctrl(priv, enable);
171 usbhsc_bus_ctrl(priv, enable);
172 } else {
173 /* USB off */
174 usbhsc_bus_ctrl(priv, enable);
175 usbhs_sys_clock_ctrl(priv, enable);
176
177 /* disable PM */
178 pm_runtime_put_sync(dev);
179 }
180}
181
182/*
183 * notify hotplug
184 */
185static void usbhsc_notify_hotplug(struct work_struct *work)
186{
187 struct usbhs_priv *priv = container_of(work,
188 struct usbhs_priv,
189 notify_hotplug_work.work);
190 struct platform_device *pdev = usbhs_priv_to_pdev(priv);
191 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
192 int id;
193 int enable;
194 int ret;
195
196 /*
197 * get vbus status from platform
198 */
199 enable = usbhs_platform_call(priv, get_vbus, pdev);
200
201 /*
202 * get id from platform
203 */
204 id = usbhs_platform_call(priv, get_id, pdev);
205
206 if (enable && !mod) {
207 ret = usbhs_mod_change(priv, id);
208 if (ret < 0)
209 return;
210
211 dev_dbg(&pdev->dev, "%s enable\n", __func__);
212
213 /* power on */
214 if (usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL))
215 usbhsc_power_ctrl(priv, enable);
216
217 /* module start */
218 usbhs_mod_call(priv, start, priv);
219
220 } else if (!enable && mod) {
221 dev_dbg(&pdev->dev, "%s disable\n", __func__);
222
223 /* module stop */
224 usbhs_mod_call(priv, stop, priv);
225
226 /* power off */
227 if (usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL))
228 usbhsc_power_ctrl(priv, enable);
229
230 usbhs_mod_change(priv, -1);
231
232 /* reset phy for next connection */
233 usbhs_platform_call(priv, phy_reset, pdev);
234 }
235}
236
237int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev)
238{
239 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
240 int delay = usbhs_get_dparam(priv, detection_delay);
241
242 /*
243 * This functions will be called in interrupt.
244 * To make sure safety context,
245 * use workqueue for usbhs_notify_hotplug
246 */
247 schedule_delayed_work(&priv->notify_hotplug_work, delay);
248 return 0;
249}
250
251/*
252 * platform functions
253 */
254static int __devinit usbhs_probe(struct platform_device *pdev)
255{
256 struct renesas_usbhs_platform_info *info = pdev->dev.platform_data;
257 struct renesas_usbhs_driver_callback *dfunc;
258 struct usbhs_priv *priv;
259 struct resource *res;
260 unsigned int irq;
261 int ret;
262
263 /* check platform information */
264 if (!info ||
265 !info->platform_callback.get_id) {
266 dev_err(&pdev->dev, "no platform information\n");
267 return -EINVAL;
268 }
269
270 /* platform data */
271 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
272 irq = platform_get_irq(pdev, 0);
273 if (!res || (int)irq <= 0) {
274 dev_err(&pdev->dev, "Not enough Renesas USB platform resources.\n");
275 return -ENODEV;
276 }
277
278 /* usb private data */
279 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
280 if (!priv) {
281 dev_err(&pdev->dev, "Could not allocate priv\n");
282 return -ENOMEM;
283 }
284
285 priv->base = ioremap_nocache(res->start, resource_size(res));
286 if (!priv->base) {
287 dev_err(&pdev->dev, "ioremap error.\n");
288 ret = -ENOMEM;
289 goto probe_end_kfree;
290 }
291
292 /*
293 * care platform info
294 */
295 priv->pfunc = &info->platform_callback;
296 priv->dparam = &info->driver_param;
297
298 /* set driver callback functions for platform */
299 dfunc = &info->driver_callback;
300 dfunc->notify_hotplug = usbhsc_drvcllbck_notify_hotplug;
301
302 /* set default param if platform doesn't have */
303 if (!priv->dparam->pipe_type) {
304 priv->dparam->pipe_type = usbhsc_default_pipe_type;
305 priv->dparam->pipe_size = ARRAY_SIZE(usbhsc_default_pipe_type);
306 }
307
308 /* FIXME */
309 /* runtime power control ? */
310 if (priv->pfunc->get_vbus)
311 usbhsc_flags_set(priv, USBHSF_RUNTIME_PWCTRL);
312
313 /*
314 * priv settings
315 */
316 priv->irq = irq;
317 priv->pdev = pdev;
318 INIT_DELAYED_WORK(&priv->notify_hotplug_work, usbhsc_notify_hotplug);
319 spin_lock_init(usbhs_priv_to_lock(priv));
320
321 /* call pipe and module init */
322 ret = usbhs_pipe_probe(priv);
323 if (ret < 0)
324 goto probe_end_mod_exit;
325
326 ret = usbhs_mod_probe(priv);
327 if (ret < 0)
328 goto probe_end_iounmap;
329
330 /* dev_set_drvdata should be called after usbhs_mod_init */
331 dev_set_drvdata(&pdev->dev, priv);
332
333 /*
334 * deviece reset here because
335 * USB device might be used in boot loader.
336 */
337 usbhs_sys_clock_ctrl(priv, 0);
338
339 /*
340 * platform call
341 *
342 * USB phy setup might depend on CPU/Board.
343 * If platform has its callback functions,
344 * call it here.
345 */
346 ret = usbhs_platform_call(priv, hardware_init, pdev);
347 if (ret < 0) {
348 dev_err(&pdev->dev, "platform prove failed.\n");
349 goto probe_end_pipe_exit;
350 }
351
352 /* reset phy for connection */
353 usbhs_platform_call(priv, phy_reset, pdev);
354
355 /* power control */
356 pm_runtime_enable(&pdev->dev);
357 if (!usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL)) {
358 usbhsc_power_ctrl(priv, 1);
359 usbhs_mod_autonomy_mode(priv);
360 }
361
362 /*
363 * manual call notify_hotplug for cold plug
364 */
365 ret = usbhsc_drvcllbck_notify_hotplug(pdev);
366 if (ret < 0)
367 goto probe_end_call_remove;
368
369 dev_info(&pdev->dev, "probed\n");
370
371 return ret;
372
373probe_end_call_remove:
374 usbhs_platform_call(priv, hardware_exit, pdev);
375probe_end_pipe_exit:
376 usbhs_pipe_remove(priv);
377probe_end_mod_exit:
378 usbhs_mod_remove(priv);
379probe_end_iounmap:
380 iounmap(priv->base);
381probe_end_kfree:
382 kfree(priv);
383
384 dev_info(&pdev->dev, "probe failed\n");
385
386 return ret;
387}
388
389static int __devexit usbhs_remove(struct platform_device *pdev)
390{
391 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
392 struct renesas_usbhs_platform_info *info = pdev->dev.platform_data;
393 struct renesas_usbhs_driver_callback *dfunc = &info->driver_callback;
394
395 dev_dbg(&pdev->dev, "usb remove\n");
396
397 dfunc->notify_hotplug = NULL;
398
399 /* power off */
400 if (!usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL))
401 usbhsc_power_ctrl(priv, 0);
402
403 pm_runtime_disable(&pdev->dev);
404
405 usbhs_platform_call(priv, hardware_exit, pdev);
406 usbhs_pipe_remove(priv);
407 usbhs_mod_remove(priv);
408 iounmap(priv->base);
409 kfree(priv);
410
411 return 0;
412}
413
414static struct platform_driver renesas_usbhs_driver = {
415 .driver = {
416 .name = "renesas_usbhs",
417 },
418 .probe = usbhs_probe,
419 .remove = __devexit_p(usbhs_remove),
420};
421
422static int __init usbhs_init(void)
423{
424 return platform_driver_register(&renesas_usbhs_driver);
425}
426
427static void __exit usbhs_exit(void)
428{
429 platform_driver_unregister(&renesas_usbhs_driver);
430}
431
432module_init(usbhs_init);
433module_exit(usbhs_exit);
434
435MODULE_LICENSE("GPL");
436MODULE_DESCRIPTION("Renesas USB driver");
437MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
diff --git a/drivers/usb/renesas_usbhs/common.h b/drivers/usb/renesas_usbhs/common.h
new file mode 100644
index 000000000000..0aadcb402764
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/common.h
@@ -0,0 +1,230 @@
1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#ifndef RENESAS_USB_DRIVER_H
18#define RENESAS_USB_DRIVER_H
19
20#include <linux/platform_device.h>
21#include <linux/usb/renesas_usbhs.h>
22
23struct usbhs_priv;
24
25#include "./mod.h"
26#include "./pipe.h"
27
28/*
29 *
30 * register define
31 *
32 */
33#define SYSCFG 0x0000
34#define BUSWAIT 0x0002
35#define DVSTCTR 0x0008
36#define CFIFO 0x0014
37#define CFIFOSEL 0x0020
38#define CFIFOCTR 0x0022
39#define INTENB0 0x0030
40#define INTENB1 0x0032
41#define BRDYENB 0x0036
42#define NRDYENB 0x0038
43#define BEMPENB 0x003A
44#define INTSTS0 0x0040
45#define INTSTS1 0x0042
46#define BRDYSTS 0x0046
47#define NRDYSTS 0x0048
48#define BEMPSTS 0x004A
49#define FRMNUM 0x004C
50#define USBREQ 0x0054 /* USB request type register */
51#define USBVAL 0x0056 /* USB request value register */
52#define USBINDX 0x0058 /* USB request index register */
53#define USBLENG 0x005A /* USB request length register */
54#define DCPCFG 0x005C
55#define DCPMAXP 0x005E
56#define DCPCTR 0x0060
57#define PIPESEL 0x0064
58#define PIPECFG 0x0068
59#define PIPEBUF 0x006A
60#define PIPEMAXP 0x006C
61#define PIPEPERI 0x006E
62#define PIPEnCTR 0x0070
63
64/* SYSCFG */
65#define SCKE (1 << 10) /* USB Module Clock Enable */
66#define HSE (1 << 7) /* High-Speed Operation Enable */
67#define DCFM (1 << 6) /* Controller Function Select */
68#define DRPD (1 << 5) /* D+ Line/D- Line Resistance Control */
69#define DPRPU (1 << 4) /* D+ Line Resistance Control */
70#define USBE (1 << 0) /* USB Module Operation Enable */
71
72/* DVSTCTR */
73#define EXTLP (1 << 10) /* Controls the EXTLP pin output state */
74#define PWEN (1 << 9) /* Controls the PWEN pin output state */
75#define RHST (0x7) /* Reset Handshake */
76#define RHST_LOW_SPEED 1 /* Low-speed connection */
77#define RHST_FULL_SPEED 2 /* Full-speed connection */
78#define RHST_HIGH_SPEED 3 /* High-speed connection */
79
80/* CFIFOSEL */
81#define MBW_32 (0x2 << 10) /* CFIFO Port Access Bit Width */
82
83/* CFIFOCTR */
84#define BVAL (1 << 15) /* Buffer Memory Enable Flag */
85#define BCLR (1 << 14) /* CPU buffer clear */
86#define FRDY (1 << 13) /* FIFO Port Ready */
87#define DTLN_MASK (0x0FFF) /* Receive Data Length */
88
89/* INTENB0 */
90#define VBSE (1 << 15) /* Enable IRQ VBUS_0 and VBUSIN_0 */
91#define RSME (1 << 14) /* Enable IRQ Resume */
92#define SOFE (1 << 13) /* Enable IRQ Frame Number Update */
93#define DVSE (1 << 12) /* Enable IRQ Device State Transition */
94#define CTRE (1 << 11) /* Enable IRQ Control Stage Transition */
95#define BEMPE (1 << 10) /* Enable IRQ Buffer Empty */
96#define NRDYE (1 << 9) /* Enable IRQ Buffer Not Ready Response */
97#define BRDYE (1 << 8) /* Enable IRQ Buffer Ready */
98
99/* INTENB1 */
100#define BCHGE (1 << 14) /* USB Bus Change Interrupt Enable */
101#define DTCHE (1 << 12) /* Disconnection Detect Interrupt Enable */
102#define ATTCHE (1 << 11) /* Connection Detect Interrupt Enable */
103#define EOFERRE (1 << 6) /* EOF Error Detect Interrupt Enable */
104#define SIGNE (1 << 5) /* Setup Transaction Error Interrupt Enable */
105#define SACKE (1 << 4) /* Setup Transaction ACK Interrupt Enable */
106
107/* INTSTS0 */
108#define VBINT (1 << 15) /* VBUS0_0 and VBUS1_0 Interrupt Status */
109#define DVST (1 << 12) /* Device State Transition Interrupt Status */
110#define CTRT (1 << 11) /* Control Stage Interrupt Status */
111#define BEMP (1 << 10) /* Buffer Empty Interrupt Status */
112#define BRDY (1 << 8) /* Buffer Ready Interrupt Status */
113#define VBSTS (1 << 7) /* VBUS_0 and VBUSIN_0 Input Status */
114#define VALID (1 << 3) /* USB Request Receive */
115
116#define DVSQ_MASK (0x3 << 4) /* Device State */
117#define POWER_STATE (0 << 4)
118#define DEFAULT_STATE (1 << 4)
119#define ADDRESS_STATE (2 << 4)
120#define CONFIGURATION_STATE (3 << 4)
121
122#define CTSQ_MASK (0x7) /* Control Transfer Stage */
123#define IDLE_SETUP_STAGE 0 /* Idle stage or setup stage */
124#define READ_DATA_STAGE 1 /* Control read data stage */
125#define READ_STATUS_STAGE 2 /* Control read status stage */
126#define WRITE_DATA_STAGE 3 /* Control write data stage */
127#define WRITE_STATUS_STAGE 4 /* Control write status stage */
128#define NODATA_STATUS_STAGE 5 /* Control write NoData status stage */
129#define SEQUENCE_ERROR 6 /* Control transfer sequence error */
130
131/* PIPECFG */
132/* DCPCFG */
133#define TYPE_NONE (0 << 14) /* Transfer Type */
134#define TYPE_BULK (1 << 14)
135#define TYPE_INT (2 << 14)
136#define TYPE_ISO (3 << 14)
137#define DBLB (1 << 9) /* Double Buffer Mode */
138#define SHTNAK (1 << 7) /* Pipe Disable in Transfer End */
139#define DIR_OUT (1 << 4) /* Transfer Direction */
140
141/* PIPEMAXP */
142/* DCPMAXP */
143#define DEVSEL_MASK (0xF << 12) /* Device Select */
144#define DCP_MAXP_MASK (0x7F)
145#define PIPE_MAXP_MASK (0x7FF)
146
147/* PIPEBUF */
148#define BUFSIZE_SHIFT 10
149#define BUFSIZE_MASK (0x1F << BUFSIZE_SHIFT)
150#define BUFNMB_MASK (0xFF)
151
152/* PIPEnCTR */
153/* DCPCTR */
154#define BSTS (1 << 15) /* Buffer Status */
155#define CSSTS (1 << 12) /* CSSTS Status */
156#define SQCLR (1 << 8) /* Toggle Bit Clear */
157#define ACLRM (1 << 9) /* Buffer Auto-Clear Mode */
158#define PBUSY (1 << 5) /* Pipe Busy */
159#define PID_MASK (0x3) /* Response PID */
160#define PID_NAK 0
161#define PID_BUF 1
162#define PID_STALL10 2
163#define PID_STALL11 3
164
165#define CCPL (1 << 2) /* Control Transfer End Enable */
166
167/* FRMNUM */
168#define FRNM_MASK (0x7FF)
169
170/*
171 * struct
172 */
173struct usbhs_priv {
174
175 void __iomem *base;
176 unsigned int irq;
177
178 struct renesas_usbhs_platform_callback *pfunc;
179 struct renesas_usbhs_driver_param *dparam;
180
181 struct delayed_work notify_hotplug_work;
182 struct platform_device *pdev;
183
184 spinlock_t lock;
185
186 u32 flags;
187
188 /*
189 * module control
190 */
191 struct usbhs_mod_info mod_info;
192
193 /*
194 * pipe control
195 */
196 struct usbhs_pipe_info pipe_info;
197};
198
199/*
200 * common
201 */
202u16 usbhs_read(struct usbhs_priv *priv, u32 reg);
203void usbhs_write(struct usbhs_priv *priv, u32 reg, u16 data);
204void usbhs_bset(struct usbhs_priv *priv, u32 reg, u16 mask, u16 data);
205
206int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev);
207/*
208 * sysconfig
209 */
210void usbhs_sys_clock_ctrl(struct usbhs_priv *priv, int enable);
211void usbhs_sys_hispeed_ctrl(struct usbhs_priv *priv, int enable);
212void usbhs_sys_usb_ctrl(struct usbhs_priv *priv, int enable);
213void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable);
214void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable);
215
216/*
217 * frame
218 */
219int usbhs_frame_get_num(struct usbhs_priv *priv);
220
221/*
222 * data
223 */
224struct usbhs_priv *usbhs_pdev_to_priv(struct platform_device *pdev);
225#define usbhs_get_dparam(priv, param) (priv->dparam->param)
226#define usbhs_priv_to_pdev(priv) (priv->pdev)
227#define usbhs_priv_to_dev(priv) (&priv->pdev->dev)
228#define usbhs_priv_to_lock(priv) (&priv->lock)
229
230#endif /* RENESAS_USB_DRIVER_H */
diff --git a/drivers/usb/renesas_usbhs/mod.c b/drivers/usb/renesas_usbhs/mod.c
new file mode 100644
index 000000000000..a577f8f4064c
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/mod.c
@@ -0,0 +1,328 @@
1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#include <linux/interrupt.h>
18
19#include "./common.h"
20#include "./mod.h"
21
22#define usbhs_priv_to_modinfo(priv) (&priv->mod_info)
23#define usbhs_mod_info_call(priv, func, param...) \
24({ \
25 struct usbhs_mod_info *info; \
26 info = usbhs_priv_to_modinfo(priv); \
27 !info->func ? 0 : \
28 info->func(param); \
29})
30
31/*
32 * autonomy
33 *
34 * these functions are used if platform doesn't have external phy.
35 * -> there is no "notify_hotplug" callback from platform
36 * -> call "notify_hotplug" by itself
37 * -> use own interrupt to connect/disconnect
38 * -> it mean module clock is always ON
39 * ~~~~~~~~~~~~~~~~~~~~~~~~~
40 */
41static int usbhsm_autonomy_get_vbus(struct platform_device *pdev)
42{
43 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
44
45 return VBSTS & usbhs_read(priv, INTSTS0);
46}
47
48static int usbhsm_autonomy_irq_vbus(struct usbhs_priv *priv,
49 struct usbhs_irq_state *irq_state)
50{
51 struct platform_device *pdev = usbhs_priv_to_pdev(priv);
52
53 return usbhsc_drvcllbck_notify_hotplug(pdev);
54}
55
56void usbhs_mod_autonomy_mode(struct usbhs_priv *priv)
57{
58 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
59
60 info->irq_vbus = usbhsm_autonomy_irq_vbus;
61 priv->pfunc->get_vbus = usbhsm_autonomy_get_vbus;
62
63 usbhs_irq_callback_update(priv, NULL);
64}
65
66/*
67 * host / gadget functions
68 *
69 * renesas_usbhs host/gadget can register itself by below functions.
70 * these functions are called when probe
71 *
72 */
73void usbhs_mod_register(struct usbhs_priv *priv, struct usbhs_mod *mod, int id)
74{
75 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
76
77 info->mod[id] = mod;
78 mod->priv = priv;
79}
80
81struct usbhs_mod *usbhs_mod_get(struct usbhs_priv *priv, int id)
82{
83 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
84 struct usbhs_mod *ret = NULL;
85
86 switch (id) {
87 case USBHS_HOST:
88 case USBHS_GADGET:
89 ret = info->mod[id];
90 break;
91 }
92
93 return ret;
94}
95
96int usbhs_mod_is_host(struct usbhs_priv *priv, struct usbhs_mod *mod)
97{
98 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
99
100 if (!mod)
101 return -EINVAL;
102
103 return info->mod[USBHS_HOST] == mod;
104}
105
106struct usbhs_mod *usbhs_mod_get_current(struct usbhs_priv *priv)
107{
108 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
109
110 return info->curt;
111}
112
113int usbhs_mod_change(struct usbhs_priv *priv, int id)
114{
115 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
116 struct usbhs_mod *mod = NULL;
117 int ret = 0;
118
119 /* id < 0 mean no current */
120 switch (id) {
121 case USBHS_HOST:
122 case USBHS_GADGET:
123 mod = info->mod[id];
124 break;
125 default:
126 ret = -EINVAL;
127 }
128 info->curt = mod;
129
130 return ret;
131}
132
133static irqreturn_t usbhs_interrupt(int irq, void *data);
134int usbhs_mod_probe(struct usbhs_priv *priv)
135{
136 struct device *dev = usbhs_priv_to_dev(priv);
137 int ret;
138
139 /*
140 * install host/gadget driver
141 */
142 ret = usbhs_mod_gadget_probe(priv);
143 if (ret < 0)
144 return ret;
145
146 /* irq settings */
147 ret = request_irq(priv->irq, usbhs_interrupt,
148 IRQF_DISABLED, dev_name(dev), priv);
149 if (ret) {
150 dev_err(dev, "irq request err\n");
151 goto mod_init_gadget_err;
152 }
153
154 return ret;
155
156mod_init_gadget_err:
157 usbhs_mod_gadget_remove(priv);
158
159 return ret;
160}
161
162void usbhs_mod_remove(struct usbhs_priv *priv)
163{
164 usbhs_mod_gadget_remove(priv);
165 free_irq(priv->irq, priv);
166}
167
168/*
169 * status functions
170 */
171int usbhs_status_get_usb_speed(struct usbhs_irq_state *irq_state)
172{
173 switch (irq_state->dvstctr & RHST) {
174 case RHST_LOW_SPEED:
175 return USB_SPEED_LOW;
176 case RHST_FULL_SPEED:
177 return USB_SPEED_FULL;
178 case RHST_HIGH_SPEED:
179 return USB_SPEED_HIGH;
180 }
181
182 return USB_SPEED_UNKNOWN;
183}
184
185int usbhs_status_get_device_state(struct usbhs_irq_state *irq_state)
186{
187 int state = irq_state->intsts0 & DVSQ_MASK;
188
189 switch (state) {
190 case POWER_STATE:
191 case DEFAULT_STATE:
192 case ADDRESS_STATE:
193 case CONFIGURATION_STATE:
194 return state;
195 }
196
197 return -EIO;
198}
199
200int usbhs_status_get_ctrl_stage(struct usbhs_irq_state *irq_state)
201{
202 /*
203 * return value
204 *
205 * IDLE_SETUP_STAGE
206 * READ_DATA_STAGE
207 * READ_STATUS_STAGE
208 * WRITE_DATA_STAGE
209 * WRITE_STATUS_STAGE
210 * NODATA_STATUS_STAGE
211 * SEQUENCE_ERROR
212 */
213 return (int)irq_state->intsts0 & CTSQ_MASK;
214}
215
216static void usbhs_status_get_each_irq(struct usbhs_priv *priv,
217 struct usbhs_irq_state *state)
218{
219 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
220
221 state->intsts0 = usbhs_read(priv, INTSTS0);
222 state->intsts1 = usbhs_read(priv, INTSTS1);
223
224 state->dvstctr = usbhs_read(priv, DVSTCTR);
225
226 /* mask */
227 if (mod) {
228 state->brdysts = usbhs_read(priv, BRDYSTS);
229 state->nrdysts = usbhs_read(priv, NRDYSTS);
230 state->bempsts = usbhs_read(priv, BEMPSTS);
231
232 state->bempsts &= mod->irq_bempsts;
233 state->brdysts &= mod->irq_brdysts;
234 }
235}
236
237/*
238 * interrupt
239 */
240#define INTSTS0_MAGIC 0xF800 /* acknowledge magical interrupt sources */
241#define INTSTS1_MAGIC 0xA870 /* acknowledge magical interrupt sources */
242static irqreturn_t usbhs_interrupt(int irq, void *data)
243{
244 struct usbhs_priv *priv = data;
245 struct usbhs_irq_state irq_state;
246
247 usbhs_status_get_each_irq(priv, &irq_state);
248
249 /*
250 * clear interrupt
251 *
252 * The hardware is _very_ picky to clear interrupt bit.
253 * Especially INTSTS0_MAGIC, INTSTS1_MAGIC value.
254 *
255 * see
256 * "Operation"
257 * - "Control Transfer (DCP)"
258 * - Function :: VALID bit should 0
259 */
260 usbhs_write(priv, INTSTS0, ~irq_state.intsts0 & INTSTS0_MAGIC);
261 usbhs_write(priv, INTSTS1, ~irq_state.intsts1 & INTSTS1_MAGIC);
262
263 usbhs_write(priv, BRDYSTS, 0);
264 usbhs_write(priv, NRDYSTS, 0);
265 usbhs_write(priv, BEMPSTS, 0);
266
267 /*
268 * call irq callback functions
269 * see also
270 * usbhs_irq_setting_update
271 */
272 if (irq_state.intsts0 & VBINT)
273 usbhs_mod_info_call(priv, irq_vbus, priv, &irq_state);
274
275 if (irq_state.intsts0 & DVST)
276 usbhs_mod_call(priv, irq_dev_state, priv, &irq_state);
277
278 if (irq_state.intsts0 & CTRT)
279 usbhs_mod_call(priv, irq_ctrl_stage, priv, &irq_state);
280
281 if (irq_state.intsts0 & BEMP)
282 usbhs_mod_call(priv, irq_empty, priv, &irq_state);
283
284 if (irq_state.intsts0 & BRDY)
285 usbhs_mod_call(priv, irq_ready, priv, &irq_state);
286
287 return IRQ_HANDLED;
288}
289
290void usbhs_irq_callback_update(struct usbhs_priv *priv, struct usbhs_mod *mod)
291{
292 u16 intenb0 = 0;
293 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
294
295 usbhs_write(priv, INTENB0, 0);
296
297 usbhs_write(priv, BEMPENB, 0);
298 usbhs_write(priv, BRDYENB, 0);
299
300 /*
301 * see also
302 * usbhs_interrupt
303 */
304
305 /*
306 * it don't enable DVSE (intenb0) here
307 * but "mod->irq_dev_state" will be called.
308 */
309 if (info->irq_vbus)
310 intenb0 |= VBSE;
311
312 if (mod) {
313 if (mod->irq_ctrl_stage)
314 intenb0 |= CTRE;
315
316 if (mod->irq_empty && mod->irq_bempsts) {
317 usbhs_write(priv, BEMPENB, mod->irq_bempsts);
318 intenb0 |= BEMPE;
319 }
320
321 if (mod->irq_ready && mod->irq_brdysts) {
322 usbhs_write(priv, BRDYENB, mod->irq_brdysts);
323 intenb0 |= BRDYE;
324 }
325 }
326
327 usbhs_write(priv, INTENB0, intenb0);
328}
diff --git a/drivers/usb/renesas_usbhs/mod.h b/drivers/usb/renesas_usbhs/mod.h
new file mode 100644
index 000000000000..5c845a28a21c
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/mod.h
@@ -0,0 +1,137 @@
1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#ifndef RENESAS_USB_MOD_H
18#define RENESAS_USB_MOD_H
19
20#include <linux/spinlock.h>
21#include <linux/usb/renesas_usbhs.h>
22#include "./common.h"
23
24/*
25 * struct
26 */
27struct usbhs_irq_state {
28 u16 intsts0;
29 u16 intsts1;
30 u16 brdysts;
31 u16 nrdysts;
32 u16 bempsts;
33 u16 dvstctr;
34};
35
36struct usbhs_mod {
37 char *name;
38
39 /*
40 * entry point from common.c
41 */
42 int (*start)(struct usbhs_priv *priv);
43 int (*stop)(struct usbhs_priv *priv);
44
45 /* INTSTS0 :: DVST (DVSQ) */
46 int (*irq_dev_state)(struct usbhs_priv *priv,
47 struct usbhs_irq_state *irq_state);
48
49 /* INTSTS0 :: CTRT (CTSQ) */
50 int (*irq_ctrl_stage)(struct usbhs_priv *priv,
51 struct usbhs_irq_state *irq_state);
52
53 /* INTSTS0 :: BEMP */
54 /* BEMPSTS */
55 int (*irq_empty)(struct usbhs_priv *priv,
56 struct usbhs_irq_state *irq_state);
57 u16 irq_bempsts;
58
59 /* INTSTS0 :: BRDY */
60 /* BRDYSTS */
61 int (*irq_ready)(struct usbhs_priv *priv,
62 struct usbhs_irq_state *irq_state);
63 u16 irq_brdysts;
64
65 struct usbhs_priv *priv;
66};
67
68struct usbhs_mod_info {
69 struct usbhs_mod *mod[USBHS_MAX];
70 struct usbhs_mod *curt; /* current mod */
71
72 /*
73 * INTSTS0 :: VBINT
74 *
75 * This function will be used as autonomy mode
76 * when platform cannot call notify_hotplug.
77 *
78 * This callback cannot be member of "struct usbhs_mod"
79 * because it will be used even though
80 * host/gadget has not been selected.
81 */
82 int (*irq_vbus)(struct usbhs_priv *priv,
83 struct usbhs_irq_state *irq_state);
84};
85
86/*
87 * for host/gadget module
88 */
89struct usbhs_mod *usbhs_mod_get(struct usbhs_priv *priv, int id);
90struct usbhs_mod *usbhs_mod_get_current(struct usbhs_priv *priv);
91void usbhs_mod_register(struct usbhs_priv *priv, struct usbhs_mod *usb, int id);
92int usbhs_mod_is_host(struct usbhs_priv *priv, struct usbhs_mod *mod);
93int usbhs_mod_change(struct usbhs_priv *priv, int id);
94int usbhs_mod_probe(struct usbhs_priv *priv);
95void usbhs_mod_remove(struct usbhs_priv *priv);
96
97void usbhs_mod_autonomy_mode(struct usbhs_priv *priv);
98
99/*
100 * status functions
101 */
102int usbhs_status_get_usb_speed(struct usbhs_irq_state *irq_state);
103int usbhs_status_get_device_state(struct usbhs_irq_state *irq_state);
104int usbhs_status_get_ctrl_stage(struct usbhs_irq_state *irq_state);
105
106/*
107 * callback functions
108 */
109void usbhs_irq_callback_update(struct usbhs_priv *priv, struct usbhs_mod *mod);
110
111
112#define usbhs_mod_call(priv, func, param...) \
113 ({ \
114 struct usbhs_mod *mod; \
115 mod = usbhs_mod_get_current(priv); \
116 !mod ? -ENODEV : \
117 !mod->func ? 0 : \
118 mod->func(param); \
119 })
120
121/*
122 * gadget control
123 */
124#ifdef CONFIG_USB_RENESAS_USBHS_UDC
125extern int __devinit usbhs_mod_gadget_probe(struct usbhs_priv *priv);
126extern void __devexit usbhs_mod_gadget_remove(struct usbhs_priv *priv);
127#else
128static inline int usbhs_mod_gadget_probe(struct usbhs_priv *priv)
129{
130 return 0;
131}
132static inline void usbhs_mod_gadget_remove(struct usbhs_priv *priv)
133{
134}
135#endif
136
137#endif /* RENESAS_USB_MOD_H */
diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c
new file mode 100644
index 000000000000..206cfabc9286
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/mod_gadget.c
@@ -0,0 +1,1384 @@
1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
20#include <linux/usb/ch9.h>
21#include <linux/usb/gadget.h>
22#include "common.h"
23
24/*
25 * struct
26 */
27struct usbhsg_request {
28 struct usb_request req;
29 struct list_head node;
30};
31
32#define EP_NAME_SIZE 8
33struct usbhsg_gpriv;
34struct usbhsg_pipe_handle;
35struct usbhsg_uep {
36 struct usb_ep ep;
37 struct usbhs_pipe *pipe;
38 struct list_head list;
39
40 char ep_name[EP_NAME_SIZE];
41
42 struct usbhsg_gpriv *gpriv;
43 struct usbhsg_pipe_handle *handler;
44};
45
46struct usbhsg_gpriv {
47 struct usb_gadget gadget;
48 struct usbhs_mod mod;
49
50 struct usbhsg_uep *uep;
51 int uep_size;
52
53 struct usb_gadget_driver *driver;
54
55 u32 status;
56#define USBHSG_STATUS_STARTED (1 << 0)
57#define USBHSG_STATUS_REGISTERD (1 << 1)
58#define USBHSG_STATUS_WEDGE (1 << 2)
59};
60
61struct usbhsg_pipe_handle {
62 int (*prepare)(struct usbhsg_uep *uep, struct usbhsg_request *ureq);
63 int (*try_run)(struct usbhsg_uep *uep, struct usbhsg_request *ureq);
64 void (*irq_mask)(struct usbhsg_uep *uep, int enable);
65};
66
67struct usbhsg_recip_handle {
68 char *name;
69 int (*device)(struct usbhs_priv *priv, struct usbhsg_uep *uep,
70 struct usb_ctrlrequest *ctrl);
71 int (*interface)(struct usbhs_priv *priv, struct usbhsg_uep *uep,
72 struct usb_ctrlrequest *ctrl);
73 int (*endpoint)(struct usbhs_priv *priv, struct usbhsg_uep *uep,
74 struct usb_ctrlrequest *ctrl);
75};
76
77/*
78 * macro
79 */
80#define usbhsg_priv_to_gpriv(priv) \
81 container_of( \
82 usbhs_mod_get(priv, USBHS_GADGET), \
83 struct usbhsg_gpriv, mod)
84
85#define __usbhsg_for_each_uep(start, pos, g, i) \
86 for (i = start, pos = (g)->uep; \
87 i < (g)->uep_size; \
88 i++, pos = (g)->uep + i)
89
90#define usbhsg_for_each_uep(pos, gpriv, i) \
91 __usbhsg_for_each_uep(1, pos, gpriv, i)
92
93#define usbhsg_for_each_uep_with_dcp(pos, gpriv, i) \
94 __usbhsg_for_each_uep(0, pos, gpriv, i)
95
96#define usbhsg_gadget_to_gpriv(g)\
97 container_of(g, struct usbhsg_gpriv, gadget)
98
99#define usbhsg_req_to_ureq(r)\
100 container_of(r, struct usbhsg_request, req)
101
102#define usbhsg_ep_to_uep(e) container_of(e, struct usbhsg_uep, ep)
103#define usbhsg_gpriv_to_lock(gp) usbhs_priv_to_lock((gp)->mod.priv)
104#define usbhsg_gpriv_to_dev(gp) usbhs_priv_to_dev((gp)->mod.priv)
105#define usbhsg_gpriv_to_priv(gp) ((gp)->mod.priv)
106#define usbhsg_gpriv_to_dcp(gp) ((gp)->uep)
107#define usbhsg_gpriv_to_nth_uep(gp, i) ((gp)->uep + i)
108#define usbhsg_uep_to_gpriv(u) ((u)->gpriv)
109#define usbhsg_uep_to_pipe(u) ((u)->pipe)
110#define usbhsg_pipe_to_uep(p) ((p)->mod_private)
111#define usbhsg_is_dcp(u) ((u) == usbhsg_gpriv_to_dcp((u)->gpriv))
112
113#define usbhsg_is_not_connected(gp) ((gp)->gadget.speed == USB_SPEED_UNKNOWN)
114
115/* status */
116#define usbhsg_status_init(gp) do {(gp)->status = 0; } while (0)
117#define usbhsg_status_set(gp, b) (gp->status |= b)
118#define usbhsg_status_clr(gp, b) (gp->status &= ~b)
119#define usbhsg_status_has(gp, b) (gp->status & b)
120
121/*
122 * usbhsg_trylock
123 *
124 * This driver don't use spin_try_lock
125 * to avoid warning of CONFIG_DEBUG_SPINLOCK
126 */
127static spinlock_t *usbhsg_trylock(struct usbhsg_gpriv *gpriv,
128 unsigned long *flags)
129{
130 spinlock_t *lock = usbhsg_gpriv_to_lock(gpriv);
131
132 /* check spin lock status
133 * to avoid deadlock/nest */
134 if (spin_is_locked(lock))
135 return NULL;
136
137 spin_lock_irqsave(lock, *flags);
138
139 return lock;
140}
141
142static void usbhsg_unlock(spinlock_t *lock, unsigned long *flags)
143{
144 if (!lock)
145 return;
146
147 spin_unlock_irqrestore(lock, *flags);
148}
149
150/*
151 * list push/pop
152 */
153static void usbhsg_queue_push(struct usbhsg_uep *uep,
154 struct usbhsg_request *ureq)
155{
156 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
157 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
158 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
159
160 /*
161 ********* assume under spin lock *********
162 */
163 list_del_init(&ureq->node);
164 list_add_tail(&ureq->node, &uep->list);
165 ureq->req.actual = 0;
166 ureq->req.status = -EINPROGRESS;
167
168 dev_dbg(dev, "pipe %d : queue push (%d)\n",
169 usbhs_pipe_number(pipe),
170 ureq->req.length);
171}
172
173static struct usbhsg_request *usbhsg_queue_get(struct usbhsg_uep *uep)
174{
175 /*
176 ********* assume under spin lock *********
177 */
178 if (list_empty(&uep->list))
179 return NULL;
180
181 return list_entry(uep->list.next, struct usbhsg_request, node);
182}
183
184#define usbhsg_queue_prepare(uep) __usbhsg_queue_handler(uep, 1);
185#define usbhsg_queue_handle(uep) __usbhsg_queue_handler(uep, 0);
186static int __usbhsg_queue_handler(struct usbhsg_uep *uep, int prepare)
187{
188 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
189 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
190 struct usbhsg_request *ureq;
191 spinlock_t *lock;
192 unsigned long flags;
193 int ret = 0;
194
195 if (!uep->handler) {
196 dev_err(dev, "no handler function\n");
197 return -EIO;
198 }
199
200 /*
201 * CAUTION [*queue handler*]
202 *
203 * This function will be called for start/restart queue operation.
204 * OTOH the most much worry for USB driver is spinlock nest.
205 * Specially it are
206 * - usb_ep_ops :: queue
207 * - usb_request :: complete
208 *
209 * But the caller of this function need not care about spinlock.
210 * This function is using usbhsg_trylock for it.
211 * if "is_locked" is 1, this mean this function lock it.
212 * but if it is 0, this mean it is already under spin lock.
213 * see also
214 * CAUTION [*endpoint queue*]
215 * CAUTION [*request complete*]
216 */
217
218 /****************** spin try lock *******************/
219 lock = usbhsg_trylock(gpriv, &flags);
220
221 ureq = usbhsg_queue_get(uep);
222 if (ureq) {
223 if (prepare)
224 ret = uep->handler->prepare(uep, ureq);
225 else
226 ret = uep->handler->try_run(uep, ureq);
227 }
228 usbhsg_unlock(lock, &flags);
229 /******************** spin unlock ******************/
230
231 return ret;
232}
233
234static void usbhsg_queue_pop(struct usbhsg_uep *uep,
235 struct usbhsg_request *ureq,
236 int status)
237{
238 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
239 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
240 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
241
242 /*
243 ********* assume under spin lock *********
244 */
245
246 /*
247 * CAUTION [*request complete*]
248 *
249 * There is a possibility not to be called in correct order
250 * if "complete" is called without spinlock.
251 *
252 * So, this function assume it is under spinlock,
253 * and call usb_request :: complete.
254 *
255 * But this "complete" will push next usb_request.
256 * It mean "usb_ep_ops :: queue" which is using spinlock is called
257 * under spinlock.
258 *
259 * To avoid dead-lock, this driver is using usbhsg_trylock.
260 * CAUTION [*endpoint queue*]
261 * CAUTION [*queue handler*]
262 */
263
264 dev_dbg(dev, "pipe %d : queue pop\n", usbhs_pipe_number(pipe));
265
266 list_del_init(&ureq->node);
267
268 ureq->req.status = status;
269 ureq->req.complete(&uep->ep, &ureq->req);
270
271 /* more request ? */
272 if (0 == status)
273 usbhsg_queue_prepare(uep);
274}
275
276/*
277 * irq enable/disable function
278 */
279#define usbhsg_irq_callback_ctrl(uep, status, enable) \
280 ({ \
281 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); \
282 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); \
283 struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv); \
284 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
285 if (!mod) \
286 return; \
287 if (enable) \
288 mod->irq_##status |= (1 << usbhs_pipe_number(pipe)); \
289 else \
290 mod->irq_##status &= ~(1 << usbhs_pipe_number(pipe)); \
291 usbhs_irq_callback_update(priv, mod); \
292 })
293
294static void usbhsg_irq_empty_ctrl(struct usbhsg_uep *uep, int enable)
295{
296 usbhsg_irq_callback_ctrl(uep, bempsts, enable);
297}
298
299static void usbhsg_irq_ready_ctrl(struct usbhsg_uep *uep, int enable)
300{
301 usbhsg_irq_callback_ctrl(uep, brdysts, enable);
302}
303
304/*
305 * handler function
306 */
307static int usbhsg_try_run_ctrl_stage_end(struct usbhsg_uep *uep,
308 struct usbhsg_request *ureq)
309{
310 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
311
312 /*
313 ********* assume under spin lock *********
314 */
315
316 usbhs_dcp_control_transfer_done(pipe);
317 usbhsg_queue_pop(uep, ureq, 0);
318
319 return 0;
320}
321
322static int usbhsg_try_run_send_packet(struct usbhsg_uep *uep,
323 struct usbhsg_request *ureq)
324{
325 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
326 struct usb_request *req = &ureq->req;
327 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
328 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
329 void *buf;
330 int remainder, send;
331 int is_done = 0;
332 int enable;
333 int maxp;
334
335 /*
336 ********* assume under spin lock *********
337 */
338
339 maxp = usbhs_pipe_get_maxpacket(pipe);
340 buf = req->buf + req->actual;
341 remainder = req->length - req->actual;
342
343 send = usbhs_fifo_write(pipe, buf, remainder);
344
345 /*
346 * send < 0 : pipe busy
347 * send = 0 : send zero packet
348 * send > 0 : send data
349 *
350 * send <= max_packet
351 */
352 if (send > 0)
353 req->actual += send;
354
355 /* send all packet ? */
356 if (send < remainder)
357 is_done = 0; /* there are remainder data */
358 else if (send < maxp)
359 is_done = 1; /* short packet */
360 else
361 is_done = !req->zero; /* send zero packet ? */
362
363 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
364 usbhs_pipe_number(pipe),
365 remainder, send, is_done, req->zero);
366
367 /*
368 * enable interrupt and send again in irq handler
369 * if it still have remainder data which should be sent.
370 */
371 enable = !is_done;
372 uep->handler->irq_mask(uep, enable);
373
374 /*
375 * usbhs_fifo_enable execute
376 * - after callback_update,
377 * - before queue_pop / stage_end
378 */
379 usbhs_fifo_enable(pipe);
380
381 /*
382 * all data were sent ?
383 */
384 if (is_done) {
385 /* it care below call in
386 "function mode" */
387 if (usbhsg_is_dcp(uep))
388 usbhs_dcp_control_transfer_done(pipe);
389
390 usbhsg_queue_pop(uep, ureq, 0);
391 }
392
393 return 0;
394}
395
396static int usbhsg_prepare_send_packet(struct usbhsg_uep *uep,
397 struct usbhsg_request *ureq)
398{
399 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
400
401 /*
402 ********* assume under spin lock *********
403 */
404
405 usbhs_fifo_prepare_write(pipe);
406 usbhsg_try_run_send_packet(uep, ureq);
407
408 return 0;
409}
410
411static int usbhsg_try_run_receive_packet(struct usbhsg_uep *uep,
412 struct usbhsg_request *ureq)
413{
414 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
415 struct usb_request *req = &ureq->req;
416 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
417 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
418 void *buf;
419 int maxp;
420 int remainder, recv;
421 int is_done = 0;
422
423 /*
424 ********* assume under spin lock *********
425 */
426
427 maxp = usbhs_pipe_get_maxpacket(pipe);
428 buf = req->buf + req->actual;
429 remainder = req->length - req->actual;
430
431 recv = usbhs_fifo_read(pipe, buf, remainder);
432 /*
433 * recv < 0 : pipe busy
434 * recv >= 0 : receive data
435 *
436 * recv <= max_packet
437 */
438 if (recv < 0)
439 return -EBUSY;
440
441 /* update parameters */
442 req->actual += recv;
443
444 if ((recv == remainder) || /* receive all data */
445 (recv < maxp)) /* short packet */
446 is_done = 1;
447
448 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
449 usbhs_pipe_number(pipe),
450 remainder, recv, is_done, req->zero);
451
452 /* read all data ? */
453 if (is_done) {
454 int disable = 0;
455
456 uep->handler->irq_mask(uep, disable);
457 usbhs_fifo_disable(pipe);
458 usbhsg_queue_pop(uep, ureq, 0);
459 }
460
461 return 0;
462}
463
464static int usbhsg_prepare_receive_packet(struct usbhsg_uep *uep,
465 struct usbhsg_request *ureq)
466{
467 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
468 int enable = 1;
469 int ret;
470
471 /*
472 ********* assume under spin lock *********
473 */
474
475 ret = usbhs_fifo_prepare_read(pipe);
476 if (ret < 0)
477 return ret;
478
479 /*
480 * data will be read in interrupt handler
481 */
482 uep->handler->irq_mask(uep, enable);
483
484 return ret;
485}
486
487static struct usbhsg_pipe_handle usbhsg_handler_send_by_empty = {
488 .prepare = usbhsg_prepare_send_packet,
489 .try_run = usbhsg_try_run_send_packet,
490 .irq_mask = usbhsg_irq_empty_ctrl,
491};
492
493static struct usbhsg_pipe_handle usbhsg_handler_send_by_ready = {
494 .prepare = usbhsg_prepare_send_packet,
495 .try_run = usbhsg_try_run_send_packet,
496 .irq_mask = usbhsg_irq_ready_ctrl,
497};
498
499static struct usbhsg_pipe_handle usbhsg_handler_recv_by_ready = {
500 .prepare = usbhsg_prepare_receive_packet,
501 .try_run = usbhsg_try_run_receive_packet,
502 .irq_mask = usbhsg_irq_ready_ctrl,
503};
504
505static struct usbhsg_pipe_handle usbhsg_handler_ctrl_stage_end = {
506 .prepare = usbhsg_try_run_ctrl_stage_end,
507 .try_run = usbhsg_try_run_ctrl_stage_end,
508};
509
510/*
511 * DCP pipe can NOT use "ready interrupt" for "send"
512 * it should use "empty" interrupt.
513 * see
514 * "Operation" - "Interrupt Function" - "BRDY Interrupt"
515 *
516 * on the other hand, normal pipe can use "ready interrupt" for "send"
517 * even though it is single/double buffer
518 */
519#define usbhsg_handler_send_ctrl usbhsg_handler_send_by_empty
520#define usbhsg_handler_recv_ctrl usbhsg_handler_recv_by_ready
521
522#define usbhsg_handler_send_packet usbhsg_handler_send_by_ready
523#define usbhsg_handler_recv_packet usbhsg_handler_recv_by_ready
524
525/*
526 * USB_TYPE_STANDARD / clear feature functions
527 */
528static int usbhsg_recip_handler_std_control_done(struct usbhs_priv *priv,
529 struct usbhsg_uep *uep,
530 struct usb_ctrlrequest *ctrl)
531{
532 struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv);
533 struct usbhsg_uep *dcp = usbhsg_gpriv_to_dcp(gpriv);
534 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(dcp);
535
536 usbhs_dcp_control_transfer_done(pipe);
537
538 return 0;
539}
540
541static int usbhsg_recip_handler_std_clear_endpoint(struct usbhs_priv *priv,
542 struct usbhsg_uep *uep,
543 struct usb_ctrlrequest *ctrl)
544{
545 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
546 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
547
548 if (!usbhsg_status_has(gpriv, USBHSG_STATUS_WEDGE)) {
549 usbhs_fifo_disable(pipe);
550 usbhs_pipe_clear_sequence(pipe);
551 usbhs_fifo_enable(pipe);
552 }
553
554 usbhsg_recip_handler_std_control_done(priv, uep, ctrl);
555
556 usbhsg_queue_prepare(uep);
557
558 return 0;
559}
560
561struct usbhsg_recip_handle req_clear_feature = {
562 .name = "clear feature",
563 .device = usbhsg_recip_handler_std_control_done,
564 .interface = usbhsg_recip_handler_std_control_done,
565 .endpoint = usbhsg_recip_handler_std_clear_endpoint,
566};
567
568/*
569 * USB_TYPE handler
570 */
571static int usbhsg_recip_run_handle(struct usbhs_priv *priv,
572 struct usbhsg_recip_handle *handler,
573 struct usb_ctrlrequest *ctrl)
574{
575 struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv);
576 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
577 struct usbhsg_uep *uep;
578 int recip = ctrl->bRequestType & USB_RECIP_MASK;
579 int nth = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK;
580 int ret;
581 int (*func)(struct usbhs_priv *priv, struct usbhsg_uep *uep,
582 struct usb_ctrlrequest *ctrl);
583 char *msg;
584
585 uep = usbhsg_gpriv_to_nth_uep(gpriv, nth);
586 if (!usbhsg_uep_to_pipe(uep)) {
587 dev_err(dev, "wrong recip request\n");
588 return -EINVAL;
589 }
590
591 switch (recip) {
592 case USB_RECIP_DEVICE:
593 msg = "DEVICE";
594 func = handler->device;
595 break;
596 case USB_RECIP_INTERFACE:
597 msg = "INTERFACE";
598 func = handler->interface;
599 break;
600 case USB_RECIP_ENDPOINT:
601 msg = "ENDPOINT";
602 func = handler->endpoint;
603 break;
604 default:
605 dev_warn(dev, "unsupported RECIP(%d)\n", recip);
606 func = NULL;
607 ret = -EINVAL;
608 }
609
610 if (func) {
611 dev_dbg(dev, "%s (pipe %d :%s)\n", handler->name, nth, msg);
612 ret = func(priv, uep, ctrl);
613 }
614
615 return ret;
616}
617
618/*
619 * irq functions
620 *
621 * it will be called from usbhs_interrupt
622 */
623static int usbhsg_irq_dev_state(struct usbhs_priv *priv,
624 struct usbhs_irq_state *irq_state)
625{
626 struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv);
627 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
628
629 gpriv->gadget.speed = usbhs_status_get_usb_speed(irq_state);
630
631 dev_dbg(dev, "state = %x : speed : %d\n",
632 usbhs_status_get_device_state(irq_state),
633 gpriv->gadget.speed);
634
635 return 0;
636}
637
638static int usbhsg_irq_ctrl_stage(struct usbhs_priv *priv,
639 struct usbhs_irq_state *irq_state)
640{
641 struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv);
642 struct usbhsg_uep *dcp = usbhsg_gpriv_to_dcp(gpriv);
643 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(dcp);
644 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
645 struct usb_ctrlrequest ctrl;
646 struct usbhsg_recip_handle *recip_handler = NULL;
647 int stage = usbhs_status_get_ctrl_stage(irq_state);
648 int ret = 0;
649
650 dev_dbg(dev, "stage = %d\n", stage);
651
652 /*
653 * see Manual
654 *
655 * "Operation"
656 * - "Interrupt Function"
657 * - "Control Transfer Stage Transition Interrupt"
658 * - Fig. "Control Transfer Stage Transitions"
659 */
660
661 switch (stage) {
662 case READ_DATA_STAGE:
663 dcp->handler = &usbhsg_handler_send_ctrl;
664 break;
665 case WRITE_DATA_STAGE:
666 dcp->handler = &usbhsg_handler_recv_ctrl;
667 break;
668 case NODATA_STATUS_STAGE:
669 dcp->handler = &usbhsg_handler_ctrl_stage_end;
670 break;
671 default:
672 return ret;
673 }
674
675 /*
676 * get usb request
677 */
678 usbhs_usbreq_get_val(priv, &ctrl);
679
680 switch (ctrl.bRequestType & USB_TYPE_MASK) {
681 case USB_TYPE_STANDARD:
682 switch (ctrl.bRequest) {
683 case USB_REQ_CLEAR_FEATURE:
684 recip_handler = &req_clear_feature;
685 break;
686 }
687 }
688
689 /*
690 * setup stage / run recip
691 */
692 if (recip_handler)
693 ret = usbhsg_recip_run_handle(priv, recip_handler, &ctrl);
694 else
695 ret = gpriv->driver->setup(&gpriv->gadget, &ctrl);
696
697 if (ret < 0)
698 usbhs_fifo_stall(pipe);
699
700 return ret;
701}
702
703static int usbhsg_irq_empty(struct usbhs_priv *priv,
704 struct usbhs_irq_state *irq_state)
705{
706 struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv);
707 struct usbhsg_uep *uep;
708 struct usbhs_pipe *pipe;
709 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
710 int i, ret;
711
712 if (!irq_state->bempsts) {
713 dev_err(dev, "debug %s !!\n", __func__);
714 return -EIO;
715 }
716
717 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
718
719 /*
720 * search interrupted "pipe"
721 * not "uep".
722 */
723 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
724 if (!(irq_state->bempsts & (1 << i)))
725 continue;
726
727 uep = usbhsg_pipe_to_uep(pipe);
728 ret = usbhsg_queue_handle(uep);
729 if (ret < 0)
730 dev_err(dev, "send error %d : %d\n", i, ret);
731 }
732
733 return 0;
734}
735
736static int usbhsg_irq_ready(struct usbhs_priv *priv,
737 struct usbhs_irq_state *irq_state)
738{
739 struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv);
740 struct usbhsg_uep *uep;
741 struct usbhs_pipe *pipe;
742 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
743 int i, ret;
744
745 if (!irq_state->brdysts) {
746 dev_err(dev, "debug %s !!\n", __func__);
747 return -EIO;
748 }
749
750 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
751
752 /*
753 * search interrupted "pipe"
754 * not "uep".
755 */
756 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
757 if (!(irq_state->brdysts & (1 << i)))
758 continue;
759
760 uep = usbhsg_pipe_to_uep(pipe);
761 ret = usbhsg_queue_handle(uep);
762 if (ret < 0)
763 dev_err(dev, "receive error %d : %d\n", i, ret);
764 }
765
766 return 0;
767}
768
769/*
770 *
771 * usb_dcp_ops
772 *
773 */
774static int usbhsg_dcp_enable(struct usbhsg_uep *uep)
775{
776 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
777 struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv);
778 struct usbhs_pipe *pipe;
779
780 /*
781 ********* assume under spin lock *********
782 */
783
784 pipe = usbhs_dcp_malloc(priv);
785 if (!pipe)
786 return -EIO;
787
788 uep->pipe = pipe;
789 uep->pipe->mod_private = uep;
790 INIT_LIST_HEAD(&uep->list);
791
792 return 0;
793}
794
795#define usbhsg_dcp_disable usbhsg_pipe_disable
796static int usbhsg_pipe_disable(struct usbhsg_uep *uep)
797{
798 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
799 struct usbhsg_request *ureq;
800 int disable = 0;
801
802 /*
803 ********* assume under spin lock *********
804 */
805
806 usbhs_fifo_disable(pipe);
807
808 /*
809 * disable pipe irq
810 */
811 usbhsg_irq_empty_ctrl(uep, disable);
812 usbhsg_irq_ready_ctrl(uep, disable);
813
814 while (1) {
815 ureq = usbhsg_queue_get(uep);
816 if (!ureq)
817 break;
818
819 usbhsg_queue_pop(uep, ureq, -ECONNRESET);
820 }
821
822 return 0;
823}
824
825static void usbhsg_uep_init(struct usbhsg_gpriv *gpriv)
826{
827 int i;
828 struct usbhsg_uep *uep;
829
830 usbhsg_for_each_uep_with_dcp(uep, gpriv, i)
831 uep->pipe = NULL;
832}
833
834/*
835 *
836 * usb_ep_ops
837 *
838 */
839static int usbhsg_ep_enable(struct usb_ep *ep,
840 const struct usb_endpoint_descriptor *desc)
841{
842 struct usbhsg_uep *uep = usbhsg_ep_to_uep(ep);
843 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
844 struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv);
845 struct usbhs_pipe *pipe;
846 spinlock_t *lock;
847 unsigned long flags;
848 int ret = -EIO;
849
850 /*
851 * if it already have pipe,
852 * nothing to do
853 */
854 if (uep->pipe)
855 return 0;
856
857 /******************** spin lock ********************/
858 lock = usbhsg_trylock(gpriv, &flags);
859
860 pipe = usbhs_pipe_malloc(priv, desc);
861 if (pipe) {
862 uep->pipe = pipe;
863 pipe->mod_private = uep;
864 INIT_LIST_HEAD(&uep->list);
865
866 if (usb_endpoint_dir_in(desc))
867 uep->handler = &usbhsg_handler_send_packet;
868 else
869 uep->handler = &usbhsg_handler_recv_packet;
870
871 ret = 0;
872 }
873
874 usbhsg_unlock(lock, &flags);
875 /******************** spin unlock ******************/
876
877 return ret;
878}
879
880static int usbhsg_ep_disable(struct usb_ep *ep)
881{
882 struct usbhsg_uep *uep = usbhsg_ep_to_uep(ep);
883 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
884 spinlock_t *lock;
885 unsigned long flags;
886 int ret;
887
888 /******************** spin lock ********************/
889 lock = usbhsg_trylock(gpriv, &flags);
890
891 ret = usbhsg_pipe_disable(uep);
892
893 usbhsg_unlock(lock, &flags);
894 /******************** spin unlock ******************/
895
896 return ret;
897}
898
899static struct usb_request *usbhsg_ep_alloc_request(struct usb_ep *ep,
900 gfp_t gfp_flags)
901{
902 struct usbhsg_request *ureq;
903
904 ureq = kzalloc(sizeof *ureq, gfp_flags);
905 if (!ureq)
906 return NULL;
907
908 INIT_LIST_HEAD(&ureq->node);
909 return &ureq->req;
910}
911
912static void usbhsg_ep_free_request(struct usb_ep *ep,
913 struct usb_request *req)
914{
915 struct usbhsg_request *ureq = usbhsg_req_to_ureq(req);
916
917 WARN_ON(!list_empty(&ureq->node));
918 kfree(ureq);
919}
920
921static int usbhsg_ep_queue(struct usb_ep *ep, struct usb_request *req,
922 gfp_t gfp_flags)
923{
924 struct usbhsg_uep *uep = usbhsg_ep_to_uep(ep);
925 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
926 struct usbhsg_request *ureq = usbhsg_req_to_ureq(req);
927 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
928 spinlock_t *lock;
929 unsigned long flags;
930 int ret = 0;
931
932 /*
933 * CAUTION [*endpoint queue*]
934 *
935 * This function will be called from usb_request :: complete
936 * or usb driver timing.
937 * If this function is called from usb_request :: complete,
938 * it is already under spinlock on this driver.
939 * but it is called frm usb driver, this function should call spinlock.
940 *
941 * This function is using usbshg_trylock to solve this issue.
942 * if "is_locked" is 1, this mean this function lock it.
943 * but if it is 0, this mean it is already under spin lock.
944 * see also
945 * CAUTION [*queue handler*]
946 * CAUTION [*request complete*]
947 */
948
949 /******************** spin lock ********************/
950 lock = usbhsg_trylock(gpriv, &flags);
951
952 /* param check */
953 if (usbhsg_is_not_connected(gpriv) ||
954 unlikely(!gpriv->driver) ||
955 unlikely(!pipe))
956 ret = -ESHUTDOWN;
957 else
958 usbhsg_queue_push(uep, ureq);
959
960 usbhsg_unlock(lock, &flags);
961 /******************** spin unlock ******************/
962
963 usbhsg_queue_prepare(uep);
964
965 return ret;
966}
967
968static int usbhsg_ep_dequeue(struct usb_ep *ep, struct usb_request *req)
969{
970 struct usbhsg_uep *uep = usbhsg_ep_to_uep(ep);
971 struct usbhsg_request *ureq = usbhsg_req_to_ureq(req);
972 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
973 spinlock_t *lock;
974 unsigned long flags;
975
976 /*
977 * see
978 * CAUTION [*queue handler*]
979 * CAUTION [*endpoint queue*]
980 * CAUTION [*request complete*]
981 */
982
983 /******************** spin lock ********************/
984 lock = usbhsg_trylock(gpriv, &flags);
985
986 usbhsg_queue_pop(uep, ureq, -ECONNRESET);
987
988 usbhsg_unlock(lock, &flags);
989 /******************** spin unlock ******************/
990
991 return 0;
992}
993
994static int __usbhsg_ep_set_halt_wedge(struct usb_ep *ep, int halt, int wedge)
995{
996 struct usbhsg_uep *uep = usbhsg_ep_to_uep(ep);
997 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
998 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
999 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
1000 spinlock_t *lock;
1001 unsigned long flags;
1002 int ret = -EAGAIN;
1003
1004 /*
1005 * see
1006 * CAUTION [*queue handler*]
1007 * CAUTION [*endpoint queue*]
1008 * CAUTION [*request complete*]
1009 */
1010
1011 /******************** spin lock ********************/
1012 lock = usbhsg_trylock(gpriv, &flags);
1013 if (!usbhsg_queue_get(uep)) {
1014
1015 dev_dbg(dev, "set halt %d (pipe %d)\n",
1016 halt, usbhs_pipe_number(pipe));
1017
1018 if (halt)
1019 usbhs_fifo_stall(pipe);
1020 else
1021 usbhs_fifo_disable(pipe);
1022
1023 if (halt && wedge)
1024 usbhsg_status_set(gpriv, USBHSG_STATUS_WEDGE);
1025 else
1026 usbhsg_status_clr(gpriv, USBHSG_STATUS_WEDGE);
1027
1028 ret = 0;
1029 }
1030
1031 usbhsg_unlock(lock, &flags);
1032 /******************** spin unlock ******************/
1033
1034 return ret;
1035}
1036
1037static int usbhsg_ep_set_halt(struct usb_ep *ep, int value)
1038{
1039 return __usbhsg_ep_set_halt_wedge(ep, value, 0);
1040}
1041
1042static int usbhsg_ep_set_wedge(struct usb_ep *ep)
1043{
1044 return __usbhsg_ep_set_halt_wedge(ep, 1, 1);
1045}
1046
1047static struct usb_ep_ops usbhsg_ep_ops = {
1048 .enable = usbhsg_ep_enable,
1049 .disable = usbhsg_ep_disable,
1050
1051 .alloc_request = usbhsg_ep_alloc_request,
1052 .free_request = usbhsg_ep_free_request,
1053
1054 .queue = usbhsg_ep_queue,
1055 .dequeue = usbhsg_ep_dequeue,
1056
1057 .set_halt = usbhsg_ep_set_halt,
1058 .set_wedge = usbhsg_ep_set_wedge,
1059};
1060
1061/*
1062 * usb module start/end
1063 */
1064static int usbhsg_try_start(struct usbhs_priv *priv, u32 status)
1065{
1066 struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv);
1067 struct usbhsg_uep *dcp = usbhsg_gpriv_to_dcp(gpriv);
1068 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1069 struct device *dev = usbhs_priv_to_dev(priv);
1070 spinlock_t *lock;
1071 unsigned long flags;
1072
1073 /******************** spin lock ********************/
1074 lock = usbhsg_trylock(gpriv, &flags);
1075
1076 /*
1077 * enable interrupt and systems if ready
1078 */
1079 usbhsg_status_set(gpriv, status);
1080 if (!(usbhsg_status_has(gpriv, USBHSG_STATUS_STARTED) &&
1081 usbhsg_status_has(gpriv, USBHSG_STATUS_REGISTERD)))
1082 goto usbhsg_try_start_unlock;
1083
1084 dev_dbg(dev, "start gadget\n");
1085
1086 /*
1087 * pipe initialize and enable DCP
1088 */
1089 usbhs_pipe_init(priv);
1090 usbhsg_uep_init(gpriv);
1091 usbhsg_dcp_enable(dcp);
1092
1093 /*
1094 * system config enble
1095 * - HI speed
1096 * - function
1097 * - usb module
1098 */
1099 usbhs_sys_hispeed_ctrl(priv, 1);
1100 usbhs_sys_function_ctrl(priv, 1);
1101 usbhs_sys_usb_ctrl(priv, 1);
1102
1103 /*
1104 * enable irq callback
1105 */
1106 mod->irq_dev_state = usbhsg_irq_dev_state;
1107 mod->irq_ctrl_stage = usbhsg_irq_ctrl_stage;
1108 mod->irq_empty = usbhsg_irq_empty;
1109 mod->irq_ready = usbhsg_irq_ready;
1110 mod->irq_bempsts = 0;
1111 mod->irq_brdysts = 0;
1112 usbhs_irq_callback_update(priv, mod);
1113
1114usbhsg_try_start_unlock:
1115 usbhsg_unlock(lock, &flags);
1116 /******************** spin unlock ********************/
1117
1118 return 0;
1119}
1120
1121static int usbhsg_try_stop(struct usbhs_priv *priv, u32 status)
1122{
1123 struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv);
1124 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1125 struct usbhsg_uep *dcp = usbhsg_gpriv_to_dcp(gpriv);
1126 struct device *dev = usbhs_priv_to_dev(priv);
1127 spinlock_t *lock;
1128 unsigned long flags;
1129
1130 /******************** spin lock ********************/
1131 lock = usbhsg_trylock(gpriv, &flags);
1132
1133 /*
1134 * disable interrupt and systems if 1st try
1135 */
1136 usbhsg_status_clr(gpriv, status);
1137 if (!usbhsg_status_has(gpriv, USBHSG_STATUS_STARTED) &&
1138 !usbhsg_status_has(gpriv, USBHSG_STATUS_REGISTERD))
1139 goto usbhsg_try_stop_unlock;
1140
1141 /* disable all irq */
1142 mod->irq_dev_state = NULL;
1143 mod->irq_ctrl_stage = NULL;
1144 mod->irq_empty = NULL;
1145 mod->irq_ready = NULL;
1146 mod->irq_bempsts = 0;
1147 mod->irq_brdysts = 0;
1148 usbhs_irq_callback_update(priv, mod);
1149
1150 usbhsg_dcp_disable(dcp);
1151
1152 gpriv->gadget.speed = USB_SPEED_UNKNOWN;
1153
1154 /* disable sys */
1155 usbhs_sys_hispeed_ctrl(priv, 0);
1156 usbhs_sys_function_ctrl(priv, 0);
1157 usbhs_sys_usb_ctrl(priv, 0);
1158
1159 usbhsg_unlock(lock, &flags);
1160 /******************** spin unlock ********************/
1161
1162 if (gpriv->driver &&
1163 gpriv->driver->disconnect)
1164 gpriv->driver->disconnect(&gpriv->gadget);
1165
1166 dev_dbg(dev, "stop gadget\n");
1167
1168 return 0;
1169
1170usbhsg_try_stop_unlock:
1171 usbhsg_unlock(lock, &flags);
1172
1173 return 0;
1174}
1175
1176/*
1177 *
1178 * linux usb function
1179 *
1180 */
1181struct usbhsg_gpriv *the_controller;
1182int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
1183 int (*bind)(struct usb_gadget *))
1184{
1185 struct usbhsg_gpriv *gpriv = the_controller;
1186 struct usbhs_priv *priv;
1187 struct device *dev;
1188 int ret;
1189
1190 if (!bind ||
1191 !driver ||
1192 !driver->setup ||
1193 driver->speed != USB_SPEED_HIGH)
1194 return -EINVAL;
1195 if (!gpriv)
1196 return -ENODEV;
1197 if (gpriv->driver)
1198 return -EBUSY;
1199
1200 dev = usbhsg_gpriv_to_dev(gpriv);
1201 priv = usbhsg_gpriv_to_priv(gpriv);
1202
1203 /* first hook up the driver ... */
1204 gpriv->driver = driver;
1205 gpriv->gadget.dev.driver = &driver->driver;
1206
1207 ret = device_add(&gpriv->gadget.dev);
1208 if (ret) {
1209 dev_err(dev, "device_add error %d\n", ret);
1210 goto add_fail;
1211 }
1212
1213 ret = bind(&gpriv->gadget);
1214 if (ret) {
1215 dev_err(dev, "bind to driver %s error %d\n",
1216 driver->driver.name, ret);
1217 goto bind_fail;
1218 }
1219
1220 dev_dbg(dev, "bind %s\n", driver->driver.name);
1221
1222 return usbhsg_try_start(priv, USBHSG_STATUS_REGISTERD);
1223
1224bind_fail:
1225 device_del(&gpriv->gadget.dev);
1226add_fail:
1227 gpriv->driver = NULL;
1228 gpriv->gadget.dev.driver = NULL;
1229
1230 return ret;
1231}
1232EXPORT_SYMBOL(usb_gadget_probe_driver);
1233
1234int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1235{
1236 struct usbhsg_gpriv *gpriv = the_controller;
1237 struct usbhs_priv *priv;
1238 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
1239
1240 if (!gpriv)
1241 return -ENODEV;
1242
1243 if (!driver ||
1244 !driver->unbind ||
1245 driver != gpriv->driver)
1246 return -EINVAL;
1247
1248 dev = usbhsg_gpriv_to_dev(gpriv);
1249 priv = usbhsg_gpriv_to_priv(gpriv);
1250
1251 usbhsg_try_stop(priv, USBHSG_STATUS_REGISTERD);
1252 device_del(&gpriv->gadget.dev);
1253 gpriv->driver = NULL;
1254
1255 if (driver->disconnect)
1256 driver->disconnect(&gpriv->gadget);
1257
1258 driver->unbind(&gpriv->gadget);
1259 dev_dbg(dev, "unbind %s\n", driver->driver.name);
1260
1261 return 0;
1262}
1263EXPORT_SYMBOL(usb_gadget_unregister_driver);
1264
1265/*
1266 * usb gadget ops
1267 */
1268static int usbhsg_get_frame(struct usb_gadget *gadget)
1269{
1270 struct usbhsg_gpriv *gpriv = usbhsg_gadget_to_gpriv(gadget);
1271 struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv);
1272
1273 return usbhs_frame_get_num(priv);
1274}
1275
1276static struct usb_gadget_ops usbhsg_gadget_ops = {
1277 .get_frame = usbhsg_get_frame,
1278};
1279
1280static int usbhsg_start(struct usbhs_priv *priv)
1281{
1282 return usbhsg_try_start(priv, USBHSG_STATUS_STARTED);
1283}
1284
1285static int usbhsg_stop(struct usbhs_priv *priv)
1286{
1287 return usbhsg_try_stop(priv, USBHSG_STATUS_STARTED);
1288}
1289
1290int __devinit usbhs_mod_gadget_probe(struct usbhs_priv *priv)
1291{
1292 struct usbhsg_gpriv *gpriv;
1293 struct usbhsg_uep *uep;
1294 struct device *dev = usbhs_priv_to_dev(priv);
1295 int pipe_size = usbhs_get_dparam(priv, pipe_size);
1296 int i;
1297
1298 gpriv = kzalloc(sizeof(struct usbhsg_gpriv), GFP_KERNEL);
1299 if (!gpriv) {
1300 dev_err(dev, "Could not allocate gadget priv\n");
1301 return -ENOMEM;
1302 }
1303
1304 uep = kzalloc(sizeof(struct usbhsg_uep) * pipe_size, GFP_KERNEL);
1305 if (!uep) {
1306 dev_err(dev, "Could not allocate ep\n");
1307 goto usbhs_mod_gadget_probe_err_gpriv;
1308 }
1309
1310 /*
1311 * CAUTION
1312 *
1313 * There is no guarantee that it is possible to access usb module here.
1314 * Don't accesses to it.
1315 * The accesse will be enable after "usbhsg_start"
1316 */
1317
1318 /*
1319 * register itself
1320 */
1321 usbhs_mod_register(priv, &gpriv->mod, USBHS_GADGET);
1322
1323 /* init gpriv */
1324 gpriv->mod.name = "gadget";
1325 gpriv->mod.start = usbhsg_start;
1326 gpriv->mod.stop = usbhsg_stop;
1327 gpriv->uep = uep;
1328 gpriv->uep_size = pipe_size;
1329 usbhsg_status_init(gpriv);
1330
1331 /*
1332 * init gadget
1333 */
1334 device_initialize(&gpriv->gadget.dev);
1335 dev_set_name(&gpriv->gadget.dev, "gadget");
1336 gpriv->gadget.dev.parent = dev;
1337 gpriv->gadget.name = "renesas_usbhs_udc";
1338 gpriv->gadget.ops = &usbhsg_gadget_ops;
1339 gpriv->gadget.is_dualspeed = 1;
1340
1341 INIT_LIST_HEAD(&gpriv->gadget.ep_list);
1342
1343 /*
1344 * init usb_ep
1345 */
1346 usbhsg_for_each_uep_with_dcp(uep, gpriv, i) {
1347 uep->gpriv = gpriv;
1348 snprintf(uep->ep_name, EP_NAME_SIZE, "ep%d", i);
1349
1350 uep->ep.name = uep->ep_name;
1351 uep->ep.ops = &usbhsg_ep_ops;
1352 INIT_LIST_HEAD(&uep->ep.ep_list);
1353 INIT_LIST_HEAD(&uep->list);
1354
1355 /* init DCP */
1356 if (usbhsg_is_dcp(uep)) {
1357 gpriv->gadget.ep0 = &uep->ep;
1358 uep->ep.maxpacket = 64;
1359 }
1360 /* init normal pipe */
1361 else {
1362 uep->ep.maxpacket = 512;
1363 list_add_tail(&uep->ep.ep_list, &gpriv->gadget.ep_list);
1364 }
1365 }
1366
1367 the_controller = gpriv;
1368
1369 dev_info(dev, "gadget probed\n");
1370
1371 return 0;
1372
1373usbhs_mod_gadget_probe_err_gpriv:
1374 kfree(gpriv);
1375
1376 return -ENOMEM;
1377}
1378
1379void __devexit usbhs_mod_gadget_remove(struct usbhs_priv *priv)
1380{
1381 struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv);
1382
1383 kfree(gpriv);
1384}
diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c
new file mode 100644
index 000000000000..5897ddad05f2
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/pipe.c
@@ -0,0 +1,877 @@
1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#include <linux/delay.h>
18#include <linux/io.h>
19#include <linux/slab.h>
20#include "./common.h"
21#include "./pipe.h"
22
23/*
24 * macros
25 */
26#define usbhsp_priv_to_pipeinfo(pr) (&(pr)->pipe_info)
27#define usbhsp_pipe_to_priv(p) ((p)->priv)
28
29#define usbhsp_addr_offset(p) ((usbhs_pipe_number(p) - 1) * 2)
30
31#define usbhsp_is_dcp(p) ((p)->priv->pipe_info.pipe == (p))
32
33#define usbhsp_flags_set(p, f) ((p)->flags |= USBHS_PIPE_FLAGS_##f)
34#define usbhsp_flags_clr(p, f) ((p)->flags &= ~USBHS_PIPE_FLAGS_##f)
35#define usbhsp_flags_has(p, f) ((p)->flags & USBHS_PIPE_FLAGS_##f)
36#define usbhsp_flags_init(p) do {(p)->flags = 0; } while (0)
37
38#define usbhsp_type(p) ((p)->pipe_type)
39#define usbhsp_type_is(p, t) ((p)->pipe_type == t)
40
41/*
42 * for debug
43 */
44static char *usbhsp_pipe_name[] = {
45 [USB_ENDPOINT_XFER_CONTROL] = "DCP",
46 [USB_ENDPOINT_XFER_BULK] = "BULK",
47 [USB_ENDPOINT_XFER_INT] = "INT",
48 [USB_ENDPOINT_XFER_ISOC] = "ISO",
49};
50
51/*
52 * usb request functions
53 */
54void usbhs_usbreq_get_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req)
55{
56 u16 val;
57
58 val = usbhs_read(priv, USBREQ);
59 req->bRequest = (val >> 8) & 0xFF;
60 req->bRequestType = (val >> 0) & 0xFF;
61
62 req->wValue = usbhs_read(priv, USBVAL);
63 req->wIndex = usbhs_read(priv, USBINDX);
64 req->wLength = usbhs_read(priv, USBLENG);
65}
66
67void usbhs_usbreq_set_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req)
68{
69 usbhs_write(priv, USBREQ, (req->bRequest << 8) | req->bRequestType);
70 usbhs_write(priv, USBVAL, req->wValue);
71 usbhs_write(priv, USBINDX, req->wIndex);
72 usbhs_write(priv, USBLENG, req->wLength);
73}
74
75/*
76 * DCPCTR/PIPEnCTR functions
77 */
78static void usbhsp_pipectrl_set(struct usbhs_pipe *pipe, u16 mask, u16 val)
79{
80 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
81 int offset = usbhsp_addr_offset(pipe);
82
83 if (usbhsp_is_dcp(pipe))
84 usbhs_bset(priv, DCPCTR, mask, val);
85 else
86 usbhs_bset(priv, PIPEnCTR + offset, mask, val);
87}
88
89static u16 usbhsp_pipectrl_get(struct usbhs_pipe *pipe)
90{
91 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
92 int offset = usbhsp_addr_offset(pipe);
93
94 if (usbhsp_is_dcp(pipe))
95 return usbhs_read(priv, DCPCTR);
96 else
97 return usbhs_read(priv, PIPEnCTR + offset);
98}
99
100/*
101 * DCP/PIPE functions
102 */
103static void __usbhsp_pipe_xxx_set(struct usbhs_pipe *pipe,
104 u16 dcp_reg, u16 pipe_reg,
105 u16 mask, u16 val)
106{
107 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
108
109 if (usbhsp_is_dcp(pipe))
110 usbhs_bset(priv, dcp_reg, mask, val);
111 else
112 usbhs_bset(priv, pipe_reg, mask, val);
113}
114
115static u16 __usbhsp_pipe_xxx_get(struct usbhs_pipe *pipe,
116 u16 dcp_reg, u16 pipe_reg)
117{
118 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
119
120 if (usbhsp_is_dcp(pipe))
121 return usbhs_read(priv, dcp_reg);
122 else
123 return usbhs_read(priv, pipe_reg);
124}
125
126/*
127 * DCPCFG/PIPECFG functions
128 */
129static void usbhsp_pipe_cfg_set(struct usbhs_pipe *pipe, u16 mask, u16 val)
130{
131 __usbhsp_pipe_xxx_set(pipe, DCPCFG, PIPECFG, mask, val);
132}
133
134/*
135 * PIPEBUF
136 */
137static void usbhsp_pipe_buf_set(struct usbhs_pipe *pipe, u16 mask, u16 val)
138{
139 if (usbhsp_is_dcp(pipe))
140 return;
141
142 __usbhsp_pipe_xxx_set(pipe, 0, PIPEBUF, mask, val);
143}
144
145/*
146 * DCPMAXP/PIPEMAXP
147 */
148static void usbhsp_pipe_maxp_set(struct usbhs_pipe *pipe, u16 mask, u16 val)
149{
150 __usbhsp_pipe_xxx_set(pipe, DCPMAXP, PIPEMAXP, mask, val);
151}
152
153static u16 usbhsp_pipe_maxp_get(struct usbhs_pipe *pipe)
154{
155 return __usbhsp_pipe_xxx_get(pipe, DCPMAXP, PIPEMAXP);
156}
157
158/*
159 * pipe control functions
160 */
161static void usbhsp_pipe_select(struct usbhs_pipe *pipe)
162{
163 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
164
165 /*
166 * On pipe, this is necessary before
167 * accesses to below registers.
168 *
169 * PIPESEL : usbhsp_pipe_select
170 * PIPECFG : usbhsp_pipe_cfg_xxx
171 * PIPEBUF : usbhsp_pipe_buf_xxx
172 * PIPEMAXP : usbhsp_pipe_maxp_xxx
173 * PIPEPERI
174 */
175
176 /*
177 * if pipe is dcp, no pipe is selected.
178 * it is no problem, because dcp have its register
179 */
180 usbhs_write(priv, PIPESEL, 0xF & usbhs_pipe_number(pipe));
181}
182
183static int usbhsp_pipe_barrier(struct usbhs_pipe *pipe)
184{
185 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
186 struct device *dev = usbhs_priv_to_dev(priv);
187 int timeout = 1024;
188 u16 val;
189
190 /*
191 * make sure....
192 *
193 * Modify these bits when CSSTS = 0, PID = NAK, and no pipe number is
194 * specified by the CURPIPE bits.
195 * When changing the setting of this bit after changing
196 * the PID bits for the selected pipe from BUF to NAK,
197 * check that CSSTS = 0 and PBUSY = 0.
198 */
199
200 /*
201 * CURPIPE bit = 0
202 *
203 * see also
204 * "Operation"
205 * - "Pipe Control"
206 * - "Pipe Control Registers Switching Procedure"
207 */
208 usbhs_write(priv, CFIFOSEL, 0);
209
210 do {
211 val = usbhsp_pipectrl_get(pipe);
212 val &= CSSTS | PID_MASK;
213 if (!val)
214 return 0;
215
216 udelay(10);
217
218 } while (timeout--);
219
220 /*
221 * force NAK
222 */
223 timeout = 1024;
224 usbhs_fifo_disable(pipe);
225 do {
226 val = usbhsp_pipectrl_get(pipe);
227 val &= PBUSY;
228 if (!val)
229 return 0;
230
231 } while (timeout--);
232
233 dev_err(dev, "pipe barrier failed\n");
234
235 return -EBUSY;
236}
237
238static int usbhsp_pipe_is_accessible(struct usbhs_pipe *pipe)
239{
240 u16 val;
241
242 val = usbhsp_pipectrl_get(pipe);
243 if (val & BSTS)
244 return 0;
245
246 return -EBUSY;
247}
248
249/*
250 * PID ctrl
251 */
252static void __usbhsp_pid_try_nak_if_stall(struct usbhs_pipe *pipe)
253{
254 u16 pid = usbhsp_pipectrl_get(pipe);
255
256 pid &= PID_MASK;
257
258 /*
259 * see
260 * "Pipe n Control Register" - "PID"
261 */
262 switch (pid) {
263 case PID_STALL11:
264 usbhsp_pipectrl_set(pipe, PID_MASK, PID_STALL10);
265 /* fall-through */
266 case PID_STALL10:
267 usbhsp_pipectrl_set(pipe, PID_MASK, PID_NAK);
268 }
269}
270
271void usbhs_fifo_disable(struct usbhs_pipe *pipe)
272{
273 /* see "Pipe n Control Register" - "PID" */
274 __usbhsp_pid_try_nak_if_stall(pipe);
275
276 usbhsp_pipectrl_set(pipe, PID_MASK, PID_NAK);
277}
278
279void usbhs_fifo_enable(struct usbhs_pipe *pipe)
280{
281 /* see "Pipe n Control Register" - "PID" */
282 __usbhsp_pid_try_nak_if_stall(pipe);
283
284 usbhsp_pipectrl_set(pipe, PID_MASK, PID_BUF);
285}
286
287void usbhs_fifo_stall(struct usbhs_pipe *pipe)
288{
289 u16 pid = usbhsp_pipectrl_get(pipe);
290
291 pid &= PID_MASK;
292
293 /*
294 * see
295 * "Pipe n Control Register" - "PID"
296 */
297 switch (pid) {
298 case PID_NAK:
299 usbhsp_pipectrl_set(pipe, PID_MASK, PID_STALL10);
300 break;
301 case PID_BUF:
302 usbhsp_pipectrl_set(pipe, PID_MASK, PID_STALL11);
303 break;
304 }
305}
306
307/*
308 * CFIFO ctrl
309 */
310void usbhs_fifo_send_terminator(struct usbhs_pipe *pipe)
311{
312 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
313
314 usbhs_bset(priv, CFIFOCTR, BVAL, BVAL);
315}
316
317static void usbhsp_fifo_clear(struct usbhs_pipe *pipe)
318{
319 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
320
321 usbhs_write(priv, CFIFOCTR, BCLR);
322}
323
324static int usbhsp_fifo_barrier(struct usbhs_priv *priv)
325{
326 int timeout = 1024;
327
328 do {
329 /* The FIFO port is accessible */
330 if (usbhs_read(priv, CFIFOCTR) & FRDY)
331 return 0;
332
333 udelay(10);
334 } while (timeout--);
335
336 return -EBUSY;
337}
338
339static int usbhsp_fifo_rcv_len(struct usbhs_priv *priv)
340{
341 return usbhs_read(priv, CFIFOCTR) & DTLN_MASK;
342}
343
344static int usbhsp_fifo_select(struct usbhs_pipe *pipe, int write)
345{
346 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
347 struct device *dev = usbhs_priv_to_dev(priv);
348 int timeout = 1024;
349 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
350 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
351
352 if (usbhsp_is_dcp(pipe))
353 base |= (1 == write) << 5; /* ISEL */
354
355 /* "base" will be used below */
356 usbhs_write(priv, CFIFOSEL, base | MBW_32);
357
358 /* check ISEL and CURPIPE value */
359 while (timeout--) {
360 if (base == (mask & usbhs_read(priv, CFIFOSEL)))
361 return 0;
362 udelay(10);
363 }
364
365 dev_err(dev, "fifo select error\n");
366
367 return -EIO;
368}
369
370int usbhs_fifo_prepare_write(struct usbhs_pipe *pipe)
371{
372 return usbhsp_fifo_select(pipe, 1);
373}
374
375int usbhs_fifo_write(struct usbhs_pipe *pipe, u8 *buf, int len)
376{
377 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
378 void __iomem *addr = priv->base + CFIFO;
379 int maxp = usbhs_pipe_get_maxpacket(pipe);
380 int total_len;
381 int i, ret;
382
383 ret = usbhsp_pipe_is_accessible(pipe);
384 if (ret < 0)
385 return ret;
386
387 ret = usbhsp_fifo_select(pipe, 1);
388 if (ret < 0)
389 return ret;
390
391 ret = usbhsp_fifo_barrier(priv);
392 if (ret < 0)
393 return ret;
394
395 len = min(len, maxp);
396 total_len = len;
397
398 /*
399 * FIXME
400 *
401 * 32-bit access only
402 */
403 if (len >= 4 &&
404 !((unsigned long)buf & 0x03)) {
405 iowrite32_rep(addr, buf, len / 4);
406 len %= 4;
407 buf += total_len - len;
408 }
409
410 /* the rest operation */
411 for (i = 0; i < len; i++)
412 iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
413
414 if (total_len < maxp)
415 usbhs_fifo_send_terminator(pipe);
416
417 return total_len;
418}
419
420int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe)
421{
422 int ret;
423
424 /*
425 * select pipe and enable it to prepare packet receive
426 */
427 ret = usbhsp_fifo_select(pipe, 0);
428 if (ret < 0)
429 return ret;
430
431 usbhs_fifo_enable(pipe);
432
433 return ret;
434}
435
436int usbhs_fifo_read(struct usbhs_pipe *pipe, u8 *buf, int len)
437{
438 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
439 void __iomem *addr = priv->base + CFIFO;
440 int rcv_len;
441 int i, ret;
442 int total_len;
443 u32 data = 0;
444
445 ret = usbhsp_fifo_select(pipe, 0);
446 if (ret < 0)
447 return ret;
448
449 ret = usbhsp_fifo_barrier(priv);
450 if (ret < 0)
451 return ret;
452
453 rcv_len = usbhsp_fifo_rcv_len(priv);
454
455 /*
456 * Buffer clear if Zero-Length packet
457 *
458 * see
459 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
460 */
461 if (0 == rcv_len) {
462 usbhsp_fifo_clear(pipe);
463 return 0;
464 }
465
466 len = min(rcv_len, len);
467 total_len = len;
468
469 /*
470 * FIXME
471 *
472 * 32-bit access only
473 */
474 if (len >= 4 &&
475 !((unsigned long)buf & 0x03)) {
476 ioread32_rep(addr, buf, len / 4);
477 len %= 4;
478 buf += rcv_len - len;
479 }
480
481 /* the rest operation */
482 for (i = 0; i < len; i++) {
483 if (!(i & 0x03))
484 data = ioread32(addr);
485
486 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
487 }
488
489 return total_len;
490}
491
492/*
493 * pipe setup
494 */
495static int usbhsp_possible_double_buffer(struct usbhs_pipe *pipe)
496{
497 /*
498 * only ISO / BULK pipe can use double buffer
499 */
500 if (usbhsp_type_is(pipe, USB_ENDPOINT_XFER_BULK) ||
501 usbhsp_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
502 return 1;
503
504 return 0;
505}
506
507static u16 usbhsp_setup_pipecfg(struct usbhs_pipe *pipe,
508 const struct usb_endpoint_descriptor *desc,
509 int is_host)
510{
511 u16 type = 0;
512 u16 bfre = 0;
513 u16 dblb = 0;
514 u16 cntmd = 0;
515 u16 dir = 0;
516 u16 epnum = 0;
517 u16 shtnak = 0;
518 u16 type_array[] = {
519 [USB_ENDPOINT_XFER_BULK] = TYPE_BULK,
520 [USB_ENDPOINT_XFER_INT] = TYPE_INT,
521 [USB_ENDPOINT_XFER_ISOC] = TYPE_ISO,
522 };
523 int is_double = usbhsp_possible_double_buffer(pipe);
524
525 if (usbhsp_is_dcp(pipe))
526 return -EINVAL;
527
528 /*
529 * PIPECFG
530 *
531 * see
532 * - "Register Descriptions" - "PIPECFG" register
533 * - "Features" - "Pipe configuration"
534 * - "Operation" - "Pipe Control"
535 */
536
537 /* TYPE */
538 type = type_array[usbhsp_type(pipe)];
539
540 /* BFRE */
541 if (usbhsp_type_is(pipe, USB_ENDPOINT_XFER_ISOC) ||
542 usbhsp_type_is(pipe, USB_ENDPOINT_XFER_BULK))
543 bfre = 0; /* FIXME */
544
545 /* DBLB */
546 if (usbhsp_type_is(pipe, USB_ENDPOINT_XFER_ISOC) ||
547 usbhsp_type_is(pipe, USB_ENDPOINT_XFER_BULK))
548 dblb = (is_double) ? DBLB : 0;
549
550 /* CNTMD */
551 if (usbhsp_type_is(pipe, USB_ENDPOINT_XFER_BULK))
552 cntmd = 0; /* FIXME */
553
554 /* DIR */
555 if (usb_endpoint_dir_in(desc))
556 usbhsp_flags_set(pipe, IS_DIR_IN);
557
558 if ((is_host && usb_endpoint_dir_out(desc)) ||
559 (!is_host && usb_endpoint_dir_in(desc)))
560 dir |= DIR_OUT;
561
562 /* SHTNAK */
563 if (usbhsp_type_is(pipe, USB_ENDPOINT_XFER_BULK) &&
564 !dir)
565 shtnak = SHTNAK;
566
567 /* EPNUM */
568 epnum = 0xF & usb_endpoint_num(desc);
569
570 return type |
571 bfre |
572 dblb |
573 cntmd |
574 dir |
575 shtnak |
576 epnum;
577}
578
579static u16 usbhsp_setup_pipemaxp(struct usbhs_pipe *pipe,
580 const struct usb_endpoint_descriptor *desc,
581 int is_host)
582{
583 /* host should set DEVSEL */
584
585 /* reutn MXPS */
586 return PIPE_MAXP_MASK & le16_to_cpu(desc->wMaxPacketSize);
587}
588
589static u16 usbhsp_setup_pipebuff(struct usbhs_pipe *pipe,
590 const struct usb_endpoint_descriptor *desc,
591 int is_host)
592{
593 struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe);
594 struct usbhs_pipe_info *info = usbhsp_priv_to_pipeinfo(priv);
595 struct device *dev = usbhs_priv_to_dev(priv);
596 int pipe_num = usbhs_pipe_number(pipe);
597 int is_double = usbhsp_possible_double_buffer(pipe);
598 u16 buff_size;
599 u16 bufnmb;
600 u16 bufnmb_cnt;
601
602 /*
603 * PIPEBUF
604 *
605 * see
606 * - "Register Descriptions" - "PIPEBUF" register
607 * - "Features" - "Pipe configuration"
608 * - "Operation" - "FIFO Buffer Memory"
609 * - "Operation" - "Pipe Control"
610 *
611 * ex) if pipe6 - pipe9 are USB_ENDPOINT_XFER_INT (SH7724)
612 *
613 * BUFNMB: PIPE
614 * 0: pipe0 (DCP 256byte)
615 * 1: -
616 * 2: -
617 * 3: -
618 * 4: pipe6 (INT 64byte)
619 * 5: pipe7 (INT 64byte)
620 * 6: pipe8 (INT 64byte)
621 * 7: pipe9 (INT 64byte)
622 * 8 - xx: free (for BULK, ISOC)
623 */
624
625 /*
626 * FIXME
627 *
628 * it doesn't have good buffer allocator
629 *
630 * DCP : 256 byte
631 * BULK: 512 byte
632 * INT : 64 byte
633 * ISOC: 512 byte
634 */
635 if (usbhsp_type_is(pipe, USB_ENDPOINT_XFER_CONTROL))
636 buff_size = 256;
637 else if (usbhsp_type_is(pipe, USB_ENDPOINT_XFER_INT))
638 buff_size = 64;
639 else
640 buff_size = 512;
641
642 /* change buff_size to register value */
643 bufnmb_cnt = (buff_size / 64) - 1;
644
645 /* BUFNMB has been reserved for INT pipe
646 * see above */
647 if (usbhsp_type_is(pipe, USB_ENDPOINT_XFER_INT)) {
648 bufnmb = pipe_num - 2;
649 } else {
650 bufnmb = info->bufnmb_last;
651 info->bufnmb_last += bufnmb_cnt + 1;
652
653 /*
654 * double buffer
655 */
656 if (is_double)
657 info->bufnmb_last += bufnmb_cnt + 1;
658 }
659
660 dev_dbg(dev, "pipe : %d : buff_size 0x%x: bufnmb 0x%x\n",
661 pipe_num, buff_size, bufnmb);
662
663 return (0x1f & bufnmb_cnt) << 10 |
664 (0xff & bufnmb) << 0;
665}
666
667/*
668 * pipe control
669 */
670int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe)
671{
672 u16 mask = usbhsp_is_dcp(pipe) ? DCP_MAXP_MASK : PIPE_MAXP_MASK;
673
674 usbhsp_pipe_select(pipe);
675
676 return (int)(usbhsp_pipe_maxp_get(pipe) & mask);
677}
678
679int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe)
680{
681 return usbhsp_flags_has(pipe, IS_DIR_IN);
682}
683
684void usbhs_pipe_clear_sequence(struct usbhs_pipe *pipe)
685{
686 usbhsp_pipectrl_set(pipe, SQCLR, SQCLR);
687}
688
689static struct usbhs_pipe *usbhsp_get_pipe(struct usbhs_priv *priv, u32 type)
690{
691 struct usbhs_pipe *pos, *pipe;
692 int i;
693
694 /*
695 * find target pipe
696 */
697 pipe = NULL;
698 usbhs_for_each_pipe_with_dcp(pos, priv, i) {
699 if (!usbhsp_type_is(pos, type))
700 continue;
701 if (usbhsp_flags_has(pos, IS_USED))
702 continue;
703
704 pipe = pos;
705 break;
706 }
707
708 if (!pipe)
709 return NULL;
710
711 /*
712 * initialize pipe flags
713 */
714 usbhsp_flags_init(pipe);
715 usbhsp_flags_set(pipe, IS_USED);
716
717 return pipe;
718}
719
720void usbhs_pipe_init(struct usbhs_priv *priv)
721{
722 struct usbhs_pipe_info *info = usbhsp_priv_to_pipeinfo(priv);
723 struct usbhs_pipe *pipe;
724 int i;
725
726 /*
727 * FIXME
728 *
729 * driver needs good allocator.
730 *
731 * find first free buffer area (BULK, ISOC)
732 * (DCP, INT area is fixed)
733 *
734 * buffer number 0 - 3 have been reserved for DCP
735 * see
736 * usbhsp_to_bufnmb
737 */
738 info->bufnmb_last = 4;
739 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
740 if (usbhsp_type_is(pipe, USB_ENDPOINT_XFER_INT))
741 info->bufnmb_last++;
742
743 usbhsp_flags_init(pipe);
744 pipe->mod_private = NULL;
745
746 usbhsp_fifo_clear(pipe);
747 }
748}
749
750struct usbhs_pipe *usbhs_pipe_malloc(struct usbhs_priv *priv,
751 const struct usb_endpoint_descriptor *desc)
752{
753 struct device *dev = usbhs_priv_to_dev(priv);
754 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
755 struct usbhs_pipe *pipe;
756 int is_host = usbhs_mod_is_host(priv, mod);
757 int ret;
758 u16 pipecfg, pipebuf, pipemaxp;
759
760 pipe = usbhsp_get_pipe(priv, usb_endpoint_type(desc));
761 if (!pipe) {
762 dev_err(dev, "can't get pipe (%s)\n",
763 usbhsp_pipe_name[usb_endpoint_type(desc)]);
764 return NULL;
765 }
766
767 usbhs_fifo_disable(pipe);
768
769 /* make sure pipe is not busy */
770 ret = usbhsp_pipe_barrier(pipe);
771 if (ret < 0) {
772 dev_err(dev, "pipe setup failed %d\n", usbhs_pipe_number(pipe));
773 return NULL;
774 }
775
776 pipecfg = usbhsp_setup_pipecfg(pipe, desc, is_host);
777 pipebuf = usbhsp_setup_pipebuff(pipe, desc, is_host);
778 pipemaxp = usbhsp_setup_pipemaxp(pipe, desc, is_host);
779
780 /* buffer clear
781 * see PIPECFG :: BFRE */
782 usbhsp_pipectrl_set(pipe, ACLRM, ACLRM);
783 usbhsp_pipectrl_set(pipe, ACLRM, 0);
784
785 usbhsp_pipe_select(pipe);
786 usbhsp_pipe_cfg_set(pipe, 0xFFFF, pipecfg);
787 usbhsp_pipe_buf_set(pipe, 0xFFFF, pipebuf);
788 usbhsp_pipe_maxp_set(pipe, 0xFFFF, pipemaxp);
789
790 usbhs_pipe_clear_sequence(pipe);
791
792 dev_dbg(dev, "enable pipe %d : %s (%s)\n",
793 usbhs_pipe_number(pipe),
794 usbhsp_pipe_name[usb_endpoint_type(desc)],
795 usbhs_pipe_is_dir_in(pipe) ? "in" : "out");
796
797 return pipe;
798}
799
800/*
801 * dcp control
802 */
803struct usbhs_pipe *usbhs_dcp_malloc(struct usbhs_priv *priv)
804{
805 struct usbhs_pipe *pipe;
806
807 pipe = usbhsp_get_pipe(priv, USB_ENDPOINT_XFER_CONTROL);
808 if (!pipe)
809 return NULL;
810
811 /*
812 * dcpcfg : default
813 * dcpmaxp : default
814 * pipebuf : nothing to do
815 */
816
817 usbhsp_pipe_select(pipe);
818 usbhs_pipe_clear_sequence(pipe);
819
820 return pipe;
821}
822
823void usbhs_dcp_control_transfer_done(struct usbhs_pipe *pipe)
824{
825 WARN_ON(!usbhsp_is_dcp(pipe));
826
827 usbhs_fifo_enable(pipe);
828 usbhsp_pipectrl_set(pipe, CCPL, CCPL);
829}
830
831
832/*
833 * pipe module function
834 */
835int usbhs_pipe_probe(struct usbhs_priv *priv)
836{
837 struct usbhs_pipe_info *info = usbhsp_priv_to_pipeinfo(priv);
838 struct usbhs_pipe *pipe;
839 struct device *dev = usbhs_priv_to_dev(priv);
840 u32 *pipe_type = usbhs_get_dparam(priv, pipe_type);
841 int pipe_size = usbhs_get_dparam(priv, pipe_size);
842 int i;
843
844 /* This driver expects 1st pipe is DCP */
845 if (pipe_type[0] != USB_ENDPOINT_XFER_CONTROL) {
846 dev_err(dev, "1st PIPE is not DCP\n");
847 return -EINVAL;
848 }
849
850 info->pipe = kzalloc(sizeof(struct usbhs_pipe) * pipe_size, GFP_KERNEL);
851 if (!info->pipe) {
852 dev_err(dev, "Could not allocate pipe\n");
853 return -ENOMEM;
854 }
855
856 info->size = pipe_size;
857
858 /*
859 * init pipe
860 */
861 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
862 pipe->priv = priv;
863 usbhsp_type(pipe) = pipe_type[i] & USB_ENDPOINT_XFERTYPE_MASK;
864
865 dev_dbg(dev, "pipe %x\t: %s\n",
866 i, usbhsp_pipe_name[pipe_type[i]]);
867 }
868
869 return 0;
870}
871
872void usbhs_pipe_remove(struct usbhs_priv *priv)
873{
874 struct usbhs_pipe_info *info = usbhsp_priv_to_pipeinfo(priv);
875
876 kfree(info->pipe);
877}
diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h
new file mode 100644
index 000000000000..1cca9b7fb266
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/pipe.h
@@ -0,0 +1,104 @@
1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#ifndef RENESAS_USB_PIPE_H
18#define RENESAS_USB_PIPE_H
19
20#include "./common.h"
21
22/*
23 * struct
24 */
25struct usbhs_pipe {
26 u32 pipe_type; /* USB_ENDPOINT_XFER_xxx */
27
28 struct usbhs_priv *priv;
29
30 u32 flags;
31#define USBHS_PIPE_FLAGS_IS_USED (1 << 0)
32#define USBHS_PIPE_FLAGS_IS_DIR_IN (1 << 1)
33
34 void *mod_private;
35};
36
37struct usbhs_pipe_info {
38 struct usbhs_pipe *pipe;
39 int size; /* array size of "pipe" */
40 int bufnmb_last; /* FIXME : driver needs good allocator */
41};
42
43/*
44 * pipe list
45 */
46#define __usbhs_for_each_pipe(start, pos, info, i) \
47 for (i = start, pos = (info)->pipe; \
48 i < (info)->size; \
49 i++, pos = (info)->pipe + i)
50
51#define usbhs_for_each_pipe(pos, priv, i) \
52 __usbhs_for_each_pipe(1, pos, &((priv)->pipe_info), i)
53
54#define usbhs_for_each_pipe_with_dcp(pos, priv, i) \
55 __usbhs_for_each_pipe(0, pos, &((priv)->pipe_info), i)
56
57/*
58 * pipe module probe / remove
59 */
60int usbhs_pipe_probe(struct usbhs_priv *priv);
61void usbhs_pipe_remove(struct usbhs_priv *priv);
62
63/*
64 * cfifo
65 */
66int usbhs_fifo_write(struct usbhs_pipe *pipe, u8 *buf, int len);
67int usbhs_fifo_read(struct usbhs_pipe *pipe, u8 *buf, int len);
68int usbhs_fifo_prepare_write(struct usbhs_pipe *pipe);
69int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe);
70
71void usbhs_fifo_enable(struct usbhs_pipe *pipe);
72void usbhs_fifo_disable(struct usbhs_pipe *pipe);
73void usbhs_fifo_stall(struct usbhs_pipe *pipe);
74
75void usbhs_fifo_send_terminator(struct usbhs_pipe *pipe);
76
77
78/*
79 * usb request
80 */
81void usbhs_usbreq_get_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req);
82void usbhs_usbreq_set_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req);
83
84/*
85 * pipe control
86 */
87struct usbhs_pipe
88*usbhs_pipe_malloc(struct usbhs_priv *priv,
89 const struct usb_endpoint_descriptor *desc);
90
91int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe);
92void usbhs_pipe_init(struct usbhs_priv *priv);
93int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe);
94void usbhs_pipe_clear_sequence(struct usbhs_pipe *pipe);
95
96#define usbhs_pipe_number(p) (int)((p) - (p)->priv->pipe_info.pipe)
97
98/*
99 * dcp control
100 */
101struct usbhs_pipe *usbhs_dcp_malloc(struct usbhs_priv *priv);
102void usbhs_dcp_control_transfer_done(struct usbhs_pipe *pipe);
103
104#endif /* RENESAS_USB_PIPE_H */
diff --git a/drivers/usb/serial/Kconfig b/drivers/usb/serial/Kconfig
index c2b29761fa98..b71e309116a3 100644
--- a/drivers/usb/serial/Kconfig
+++ b/drivers/usb/serial/Kconfig
@@ -527,15 +527,6 @@ config USB_SERIAL_SAFE_PADDED
527 bool "USB Secure Encapsulated Driver - Padded" 527 bool "USB Secure Encapsulated Driver - Padded"
528 depends on USB_SERIAL_SAFE 528 depends on USB_SERIAL_SAFE
529 529
530config USB_SERIAL_SAMBA
531 tristate "USB Atmel SAM Boot Assistant (SAM-BA) driver"
532 help
533 Say Y here if you want to access the SAM-BA boot application of an
534 Atmel AT91SAM device.
535
536 To compile this driver as a module, choose M here: the
537 module will be called sam-ba.
538
539config USB_SERIAL_SIEMENS_MPI 530config USB_SERIAL_SIEMENS_MPI
540 tristate "USB Siemens MPI driver" 531 tristate "USB Siemens MPI driver"
541 help 532 help
diff --git a/drivers/usb/serial/Makefile b/drivers/usb/serial/Makefile
index 9a2117f2b06e..9e536eefb32c 100644
--- a/drivers/usb/serial/Makefile
+++ b/drivers/usb/serial/Makefile
@@ -48,7 +48,6 @@ obj-$(CONFIG_USB_SERIAL_PL2303) += pl2303.o
48obj-$(CONFIG_USB_SERIAL_QCAUX) += qcaux.o 48obj-$(CONFIG_USB_SERIAL_QCAUX) += qcaux.o
49obj-$(CONFIG_USB_SERIAL_QUALCOMM) += qcserial.o 49obj-$(CONFIG_USB_SERIAL_QUALCOMM) += qcserial.o
50obj-$(CONFIG_USB_SERIAL_SAFE) += safe_serial.o 50obj-$(CONFIG_USB_SERIAL_SAFE) += safe_serial.o
51obj-$(CONFIG_USB_SERIAL_SAMBA) += sam-ba.o
52obj-$(CONFIG_USB_SERIAL_SIEMENS_MPI) += siemens_mpi.o 51obj-$(CONFIG_USB_SERIAL_SIEMENS_MPI) += siemens_mpi.o
53obj-$(CONFIG_USB_SERIAL_SIERRAWIRELESS) += sierra.o 52obj-$(CONFIG_USB_SERIAL_SIERRAWIRELESS) += sierra.o
54obj-$(CONFIG_USB_SERIAL_SPCP8X5) += spcp8x5.o 53obj-$(CONFIG_USB_SERIAL_SPCP8X5) += spcp8x5.o
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 0f11afdda134..ebeccb75558d 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -112,6 +112,10 @@ static const struct usb_device_id id_table[] = {
112 { USB_DEVICE(0x10C4, 0x8418) }, /* IRZ Automation Teleport SG-10 GSM/GPRS Modem */ 112 { USB_DEVICE(0x10C4, 0x8418) }, /* IRZ Automation Teleport SG-10 GSM/GPRS Modem */
113 { USB_DEVICE(0x10C4, 0x846E) }, /* BEI USB Sensor Interface (VCP) */ 113 { USB_DEVICE(0x10C4, 0x846E) }, /* BEI USB Sensor Interface (VCP) */
114 { USB_DEVICE(0x10C4, 0x8477) }, /* Balluff RFID */ 114 { USB_DEVICE(0x10C4, 0x8477) }, /* Balluff RFID */
115 { USB_DEVICE(0x10C4, 0x85EA) }, /* AC-Services IBUS-IF */
116 { USB_DEVICE(0x10C4, 0x85EB) }, /* AC-Services CIS-IBUS */
117 { USB_DEVICE(0x10C4, 0x8664) }, /* AC-Services CAN-IF */
118 { USB_DEVICE(0x10C4, 0x8665) }, /* AC-Services OBD-IF */
115 { USB_DEVICE(0x10C4, 0xEA60) }, /* Silicon Labs factory default */ 119 { USB_DEVICE(0x10C4, 0xEA60) }, /* Silicon Labs factory default */
116 { USB_DEVICE(0x10C4, 0xEA61) }, /* Silicon Labs factory default */ 120 { USB_DEVICE(0x10C4, 0xEA61) }, /* Silicon Labs factory default */
117 { USB_DEVICE(0x10C4, 0xEA71) }, /* Infinity GPS-MIC-1 Radio Monophone */ 121 { USB_DEVICE(0x10C4, 0xEA71) }, /* Infinity GPS-MIC-1 Radio Monophone */
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 4de6ef0ae52a..e8dbde55f6c5 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -566,6 +566,7 @@ static struct usb_device_id id_table_combined [] = {
566 { USB_DEVICE(FTDI_VID, FTDI_IBS_APP70_PID) }, 566 { USB_DEVICE(FTDI_VID, FTDI_IBS_APP70_PID) },
567 { USB_DEVICE(FTDI_VID, FTDI_IBS_PEDO_PID) }, 567 { USB_DEVICE(FTDI_VID, FTDI_IBS_PEDO_PID) },
568 { USB_DEVICE(FTDI_VID, FTDI_IBS_PROD_PID) }, 568 { USB_DEVICE(FTDI_VID, FTDI_IBS_PROD_PID) },
569 { USB_DEVICE(FTDI_VID, FTDI_TAVIR_STK500_PID) },
569 /* 570 /*
570 * ELV devices: 571 * ELV devices:
571 */ 572 */
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h
index efffc23723bd..1d946cd238ba 100644
--- a/drivers/usb/serial/ftdi_sio_ids.h
+++ b/drivers/usb/serial/ftdi_sio_ids.h
@@ -491,6 +491,11 @@
491/* www.canusb.com Lawicel CANUSB device (FTDI_VID) */ 491/* www.canusb.com Lawicel CANUSB device (FTDI_VID) */
492#define FTDI_CANUSB_PID 0xFFA8 /* Product Id */ 492#define FTDI_CANUSB_PID 0xFFA8 /* Product Id */
493 493
494/*
495 * TavIR AVR product ids (FTDI_VID)
496 */
497#define FTDI_TAVIR_STK500_PID 0xFA33 /* STK500 AVR programmer */
498
494 499
495 500
496/********************************/ 501/********************************/
diff --git a/drivers/usb/serial/garmin_gps.c b/drivers/usb/serial/garmin_gps.c
index 26710b189918..b0a7a9e909a4 100644
--- a/drivers/usb/serial/garmin_gps.c
+++ b/drivers/usb/serial/garmin_gps.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Garmin GPS driver 2 * Garmin GPS driver
3 * 3 *
4 * Copyright (C) 2006-2009 Hermann Kneissel herkne@users.sourceforge.net 4 * Copyright (C) 2006-2011 Hermann Kneissel herkne@gmx.de
5 * 5 *
6 * The latest version of the driver can be found at 6 * The latest version of the driver can be found at
7 * http://sourceforge.net/projects/garmin-gps/ 7 * http://sourceforge.net/projects/garmin-gps/
@@ -51,7 +51,7 @@ static int debug;
51 */ 51 */
52 52
53#define VERSION_MAJOR 0 53#define VERSION_MAJOR 0
54#define VERSION_MINOR 33 54#define VERSION_MINOR 36
55 55
56#define _STR(s) #s 56#define _STR(s) #s
57#define _DRIVER_VERSION(a, b) "v" _STR(a) "." _STR(b) 57#define _DRIVER_VERSION(a, b) "v" _STR(a) "." _STR(b)
@@ -410,6 +410,7 @@ static int gsp_send_ack(struct garmin_data *garmin_data_p, __u8 pkt_id)
410 */ 410 */
411static int gsp_rec_packet(struct garmin_data *garmin_data_p, int count) 411static int gsp_rec_packet(struct garmin_data *garmin_data_p, int count)
412{ 412{
413 unsigned long flags;
413 const __u8 *recpkt = garmin_data_p->inbuffer+GSP_INITIAL_OFFSET; 414 const __u8 *recpkt = garmin_data_p->inbuffer+GSP_INITIAL_OFFSET;
414 __le32 *usbdata = (__le32 *) garmin_data_p->inbuffer; 415 __le32 *usbdata = (__le32 *) garmin_data_p->inbuffer;
415 416
@@ -458,7 +459,9 @@ static int gsp_rec_packet(struct garmin_data *garmin_data_p, int count)
458 /* if this was an abort-transfer command, flush all 459 /* if this was an abort-transfer command, flush all
459 queued data. */ 460 queued data. */
460 if (isAbortTrfCmnd(garmin_data_p->inbuffer)) { 461 if (isAbortTrfCmnd(garmin_data_p->inbuffer)) {
462 spin_lock_irqsave(&garmin_data_p->lock, flags);
461 garmin_data_p->flags |= FLAGS_DROP_DATA; 463 garmin_data_p->flags |= FLAGS_DROP_DATA;
464 spin_unlock_irqrestore(&garmin_data_p->lock, flags);
462 pkt_clear(garmin_data_p); 465 pkt_clear(garmin_data_p);
463 } 466 }
464 467
@@ -943,7 +946,7 @@ static int garmin_open(struct tty_struct *tty, struct usb_serial_port *port)
943 spin_lock_irqsave(&garmin_data_p->lock, flags); 946 spin_lock_irqsave(&garmin_data_p->lock, flags);
944 garmin_data_p->mode = initial_mode; 947 garmin_data_p->mode = initial_mode;
945 garmin_data_p->count = 0; 948 garmin_data_p->count = 0;
946 garmin_data_p->flags = 0; 949 garmin_data_p->flags &= FLAGS_SESSION_REPLY1_SEEN;
947 spin_unlock_irqrestore(&garmin_data_p->lock, flags); 950 spin_unlock_irqrestore(&garmin_data_p->lock, flags);
948 951
949 /* shutdown any bulk reads that might be going on */ 952 /* shutdown any bulk reads that might be going on */
@@ -1178,7 +1181,8 @@ static int garmin_write_room(struct tty_struct *tty)
1178 1181
1179 1182
1180static void garmin_read_process(struct garmin_data *garmin_data_p, 1183static void garmin_read_process(struct garmin_data *garmin_data_p,
1181 unsigned char *data, unsigned data_length) 1184 unsigned char *data, unsigned data_length,
1185 int bulk_data)
1182{ 1186{
1183 unsigned long flags; 1187 unsigned long flags;
1184 1188
@@ -1193,7 +1197,8 @@ static void garmin_read_process(struct garmin_data *garmin_data_p,
1193 send it directly to the tty port */ 1197 send it directly to the tty port */
1194 if (garmin_data_p->flags & FLAGS_QUEUING) { 1198 if (garmin_data_p->flags & FLAGS_QUEUING) {
1195 pkt_add(garmin_data_p, data, data_length); 1199 pkt_add(garmin_data_p, data, data_length);
1196 } else if (getLayerId(data) == GARMIN_LAYERID_APPL) { 1200 } else if (bulk_data ||
1201 getLayerId(data) == GARMIN_LAYERID_APPL) {
1197 1202
1198 spin_lock_irqsave(&garmin_data_p->lock, flags); 1203 spin_lock_irqsave(&garmin_data_p->lock, flags);
1199 garmin_data_p->flags |= APP_RESP_SEEN; 1204 garmin_data_p->flags |= APP_RESP_SEEN;
@@ -1237,7 +1242,7 @@ static void garmin_read_bulk_callback(struct urb *urb)
1237 usb_serial_debug_data(debug, &port->dev, 1242 usb_serial_debug_data(debug, &port->dev,
1238 __func__, urb->actual_length, data); 1243 __func__, urb->actual_length, data);
1239 1244
1240 garmin_read_process(garmin_data_p, data, urb->actual_length); 1245 garmin_read_process(garmin_data_p, data, urb->actual_length, 1);
1241 1246
1242 if (urb->actual_length == 0 && 1247 if (urb->actual_length == 0 &&
1243 0 != (garmin_data_p->flags & FLAGS_BULK_IN_RESTART)) { 1248 0 != (garmin_data_p->flags & FLAGS_BULK_IN_RESTART)) {
@@ -1346,7 +1351,7 @@ static void garmin_read_int_callback(struct urb *urb)
1346 __func__, garmin_data_p->serial_num); 1351 __func__, garmin_data_p->serial_num);
1347 } 1352 }
1348 1353
1349 garmin_read_process(garmin_data_p, data, urb->actual_length); 1354 garmin_read_process(garmin_data_p, data, urb->actual_length, 0);
1350 1355
1351 port->interrupt_in_urb->dev = port->serial->dev; 1356 port->interrupt_in_urb->dev = port->serial->dev;
1352 retval = usb_submit_urb(urb, GFP_ATOMIC); 1357 retval = usb_submit_urb(urb, GFP_ATOMIC);
@@ -1461,6 +1466,7 @@ static int garmin_attach(struct usb_serial *serial)
1461 garmin_data_p->timer.function = timeout_handler; 1466 garmin_data_p->timer.function = timeout_handler;
1462 garmin_data_p->port = port; 1467 garmin_data_p->port = port;
1463 garmin_data_p->state = 0; 1468 garmin_data_p->state = 0;
1469 garmin_data_p->flags = 0;
1464 garmin_data_p->count = 0; 1470 garmin_data_p->count = 0;
1465 usb_set_serial_port_data(port, garmin_data_p); 1471 usb_set_serial_port_data(port, garmin_data_p);
1466 1472
diff --git a/drivers/usb/serial/moto_modem.c b/drivers/usb/serial/moto_modem.c
index 653465f61d4a..e2bfecc46402 100644
--- a/drivers/usb/serial/moto_modem.c
+++ b/drivers/usb/serial/moto_modem.c
@@ -25,6 +25,7 @@ static const struct usb_device_id id_table[] = {
25 { USB_DEVICE(0x05c6, 0x3197) }, /* unknown Motorola phone */ 25 { USB_DEVICE(0x05c6, 0x3197) }, /* unknown Motorola phone */
26 { USB_DEVICE(0x0c44, 0x0022) }, /* unknown Mororola phone */ 26 { USB_DEVICE(0x0c44, 0x0022) }, /* unknown Mororola phone */
27 { USB_DEVICE(0x22b8, 0x2a64) }, /* Motorola KRZR K1m */ 27 { USB_DEVICE(0x22b8, 0x2a64) }, /* Motorola KRZR K1m */
28 { USB_DEVICE(0x22b8, 0x2c84) }, /* Motorola VE240 phone */
28 { USB_DEVICE(0x22b8, 0x2c64) }, /* Motorola V950 phone */ 29 { USB_DEVICE(0x22b8, 0x2c64) }, /* Motorola V950 phone */
29 { }, 30 { },
30}; 31};
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index d77ff0435896..4001f7630a54 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -972,7 +972,7 @@ static const struct usb_device_id option_ids[] = {
972 { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100) }, 972 { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100) },
973 { USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */ 973 { USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */
974 { USB_DEVICE(ONDA_VENDOR_ID, ONDA_MT825UP) }, /* ONDA MT825UP modem */ 974 { USB_DEVICE(ONDA_VENDOR_ID, ONDA_MT825UP) }, /* ONDA MT825UP modem */
975 { USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_GT_B3730, USB_CLASS_CDC_DATA, 0x00, 0x00) }, /* Samsung GT-B3730/GT-B3710 LTE USB modem.*/ 975 { USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_GT_B3730, USB_CLASS_CDC_DATA, 0x00, 0x00) }, /* Samsung GT-B3730 LTE USB modem.*/
976 { } /* Terminating entry */ 976 { } /* Terminating entry */
977}; 977};
978MODULE_DEVICE_TABLE(usb, option_ids); 978MODULE_DEVICE_TABLE(usb, option_ids);
@@ -1109,6 +1109,12 @@ static int option_probe(struct usb_serial *serial,
1109 serial->interface->cur_altsetting->desc.bInterfaceNumber == 1) 1109 serial->interface->cur_altsetting->desc.bInterfaceNumber == 1)
1110 return -ENODEV; 1110 return -ENODEV;
1111 1111
1112 /* Don't bind network interface on Samsung GT-B3730, it is handled by a separate module */
1113 if (serial->dev->descriptor.idVendor == SAMSUNG_VENDOR_ID &&
1114 serial->dev->descriptor.idProduct == SAMSUNG_PRODUCT_GT_B3730 &&
1115 serial->interface->cur_altsetting->desc.bInterfaceClass != USB_CLASS_CDC_DATA)
1116 return -ENODEV;
1117
1112 data = serial->private = kzalloc(sizeof(struct usb_wwan_intf_private), GFP_KERNEL); 1118 data = serial->private = kzalloc(sizeof(struct usb_wwan_intf_private), GFP_KERNEL);
1113 1119
1114 if (!data) 1120 if (!data)
diff --git a/drivers/usb/serial/sam-ba.c b/drivers/usb/serial/sam-ba.c
deleted file mode 100644
index e3bba64afc57..000000000000
--- a/drivers/usb/serial/sam-ba.c
+++ /dev/null
@@ -1,206 +0,0 @@
1/*
2 * Atmel SAM Boot Assistant (SAM-BA) driver
3 *
4 * Copyright (C) 2010 Johan Hovold <jhovold@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License version
8 * 2 as published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/tty.h>
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/usb.h>
16#include <linux/usb/serial.h>
17
18
19#define DRIVER_VERSION "v1.0"
20#define DRIVER_AUTHOR "Johan Hovold <jhovold@gmail.com>"
21#define DRIVER_DESC "Atmel SAM Boot Assistant (SAM-BA) driver"
22
23#define SAMBA_VENDOR_ID 0x3eb
24#define SAMBA_PRODUCT_ID 0x6124
25
26
27static int debug;
28
29static const struct usb_device_id id_table[] = {
30 /*
31 * NOTE: Only match the CDC Data interface.
32 */
33 { USB_DEVICE_AND_INTERFACE_INFO(SAMBA_VENDOR_ID, SAMBA_PRODUCT_ID,
34 USB_CLASS_CDC_DATA, 0, 0) },
35 { }
36};
37MODULE_DEVICE_TABLE(usb, id_table);
38
39static struct usb_driver samba_driver = {
40 .name = "sam-ba",
41 .probe = usb_serial_probe,
42 .disconnect = usb_serial_disconnect,
43 .id_table = id_table,
44 .no_dynamic_id = 1,
45};
46
47
48/*
49 * NOTE: The SAM-BA firmware cannot handle merged write requests so we cannot
50 * use the generic write implementation (which uses the port write fifo).
51 */
52static int samba_write(struct tty_struct *tty, struct usb_serial_port *port,
53 const unsigned char *buf, int count)
54{
55 struct urb *urb;
56 unsigned long flags;
57 int result;
58 int i;
59
60 if (!count)
61 return 0;
62
63 count = min_t(int, count, port->bulk_out_size);
64
65 spin_lock_irqsave(&port->lock, flags);
66 if (!port->write_urbs_free) {
67 spin_unlock_irqrestore(&port->lock, flags);
68 return 0;
69 }
70 i = find_first_bit(&port->write_urbs_free,
71 ARRAY_SIZE(port->write_urbs));
72 __clear_bit(i, &port->write_urbs_free);
73 port->tx_bytes += count;
74 spin_unlock_irqrestore(&port->lock, flags);
75
76 urb = port->write_urbs[i];
77 memcpy(urb->transfer_buffer, buf, count);
78 urb->transfer_buffer_length = count;
79 usb_serial_debug_data(debug, &port->dev, __func__, count,
80 urb->transfer_buffer);
81 result = usb_submit_urb(urb, GFP_ATOMIC);
82 if (result) {
83 dev_err(&port->dev, "%s - error submitting urb: %d\n",
84 __func__, result);
85 spin_lock_irqsave(&port->lock, flags);
86 __set_bit(i, &port->write_urbs_free);
87 port->tx_bytes -= count;
88 spin_unlock_irqrestore(&port->lock, flags);
89
90 return result;
91 }
92
93 return count;
94}
95
96static int samba_write_room(struct tty_struct *tty)
97{
98 struct usb_serial_port *port = tty->driver_data;
99 unsigned long flags;
100 unsigned long free;
101 int count;
102 int room;
103
104 spin_lock_irqsave(&port->lock, flags);
105 free = port->write_urbs_free;
106 spin_unlock_irqrestore(&port->lock, flags);
107
108 count = hweight_long(free);
109 room = count * port->bulk_out_size;
110
111 dbg("%s - returns %d", __func__, room);
112
113 return room;
114}
115
116static int samba_chars_in_buffer(struct tty_struct *tty)
117{
118 struct usb_serial_port *port = tty->driver_data;
119 unsigned long flags;
120 int chars;
121
122 spin_lock_irqsave(&port->lock, flags);
123 chars = port->tx_bytes;
124 spin_unlock_irqrestore(&port->lock, flags);
125
126 dbg("%s - returns %d", __func__, chars);
127
128 return chars;
129}
130
131static void samba_write_bulk_callback(struct urb *urb)
132{
133 struct usb_serial_port *port = urb->context;
134 unsigned long flags;
135 int i;
136
137 dbg("%s - port %d", __func__, port->number);
138
139 for (i = 0; i < ARRAY_SIZE(port->write_urbs); ++i) {
140 if (port->write_urbs[i] == urb)
141 break;
142 }
143 spin_lock_irqsave(&port->lock, flags);
144 __set_bit(i, &port->write_urbs_free);
145 port->tx_bytes -= urb->transfer_buffer_length;
146 spin_unlock_irqrestore(&port->lock, flags);
147
148 if (urb->status)
149 dbg("%s - non-zero urb status: %d", __func__, urb->status);
150
151 usb_serial_port_softint(port);
152}
153
154static struct usb_serial_driver samba_device = {
155 .driver = {
156 .owner = THIS_MODULE,
157 .name = "sam-ba",
158 },
159 .usb_driver = &samba_driver,
160 .id_table = id_table,
161 .num_ports = 1,
162 .bulk_in_size = 512,
163 .bulk_out_size = 2048,
164 .write = samba_write,
165 .write_room = samba_write_room,
166 .chars_in_buffer = samba_chars_in_buffer,
167 .write_bulk_callback = samba_write_bulk_callback,
168 .throttle = usb_serial_generic_throttle,
169 .unthrottle = usb_serial_generic_unthrottle,
170};
171
172static int __init samba_init(void)
173{
174 int retval;
175
176 retval = usb_serial_register(&samba_device);
177 if (retval)
178 return retval;
179
180 retval = usb_register(&samba_driver);
181 if (retval) {
182 usb_serial_deregister(&samba_device);
183 return retval;
184 }
185
186 printk(KERN_INFO KBUILD_MODNAME ": " DRIVER_VERSION ": "
187 DRIVER_DESC "\n");
188 return 0;
189}
190
191static void __exit samba_exit(void)
192{
193 usb_deregister(&samba_driver);
194 usb_serial_deregister(&samba_device);
195}
196
197module_init(samba_init);
198module_exit(samba_exit);
199
200MODULE_AUTHOR(DRIVER_AUTHOR);
201MODULE_DESCRIPTION(DRIVER_DESC);
202MODULE_VERSION(DRIVER_VERSION);
203MODULE_LICENSE("GPL");
204
205module_param(debug, bool, S_IRUGO | S_IWUSR);
206MODULE_PARM_DESC(debug, "Enable verbose debugging messages");
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 4eb56ed75fbc..fffdf00f87b9 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -72,6 +72,7 @@ struct fsl_usb2_platform_data {
72 void (*exit)(struct platform_device *); 72 void (*exit)(struct platform_device *);
73 void __iomem *regs; /* ioremap'd register base */ 73 void __iomem *regs; /* ioremap'd register base */
74 struct clk *clk; 74 struct clk *clk;
75 unsigned power_budget; /* hcd->power_budget */
75 unsigned big_endian_mmio:1; 76 unsigned big_endian_mmio:1;
76 unsigned big_endian_desc:1; 77 unsigned big_endian_desc:1;
77 unsigned es:1; /* need USBMODE:ES */ 78 unsigned es:1; /* need USBMODE:ES */
@@ -79,6 +80,21 @@ struct fsl_usb2_platform_data {
79 unsigned have_sysif_regs:1; 80 unsigned have_sysif_regs:1;
80 unsigned invert_drvvbus:1; 81 unsigned invert_drvvbus:1;
81 unsigned invert_pwr_fault:1; 82 unsigned invert_pwr_fault:1;
83
84 unsigned suspended:1;
85 unsigned already_suspended:1;
86
87 /* register save area for suspend/resume */
88 u32 pm_command;
89 u32 pm_status;
90 u32 pm_intr_enable;
91 u32 pm_frame_index;
92 u32 pm_segment;
93 u32 pm_frame_list;
94 u32 pm_async_next;
95 u32 pm_configured_flag;
96 u32 pm_portsc;
97 u32 pm_usbgenctrl;
82}; 98};
83 99
84/* Flags in fsl_usb2_mph_platform_data */ 100/* Flags in fsl_usb2_mph_platform_data */
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 65f78ca5d88e..73c7df489607 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -806,8 +806,10 @@ struct usbdrv_wrap {
806 * @resume: Called when the device is being resumed by the system. 806 * @resume: Called when the device is being resumed by the system.
807 * @reset_resume: Called when the suspended device has been reset instead 807 * @reset_resume: Called when the suspended device has been reset instead
808 * of being resumed. 808 * of being resumed.
809 * @pre_reset: Called by usb_reset_device() when the device 809 * @pre_reset: Called by usb_reset_device() when the device is about to be
810 * is about to be reset. 810 * reset. This routine must not return until the driver has no active
811 * URBs for the device, and no more URBs may be submitted until the
812 * post_reset method is called.
811 * @post_reset: Called by usb_reset_device() after the device 813 * @post_reset: Called by usb_reset_device() after the device
812 * has been reset 814 * has been reset
813 * @id_table: USB drivers use ID table to support hotplugging. 815 * @id_table: USB drivers use ID table to support hotplugging.
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index b72f305ce6bd..0fd3fbdd8283 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -579,7 +579,7 @@ struct usb_ss_ep_comp_descriptor {
579 579
580 __u8 bMaxBurst; 580 __u8 bMaxBurst;
581 __u8 bmAttributes; 581 __u8 bmAttributes;
582 __u16 wBytesPerInterval; 582 __le16 wBytesPerInterval;
583} __attribute__ ((packed)); 583} __attribute__ ((packed));
584 584
585#define USB_DT_SS_EP_COMP_SIZE 6 585#define USB_DT_SS_EP_COMP_SIZE 6
diff --git a/include/linux/usb/ehci_def.h b/include/linux/usb/ehci_def.h
index e49dfd45baa4..7cc95ee3606b 100644
--- a/include/linux/usb/ehci_def.h
+++ b/include/linux/usb/ehci_def.h
@@ -25,10 +25,15 @@
25struct ehci_caps { 25struct ehci_caps {
26 /* these fields are specified as 8 and 16 bit registers, 26 /* these fields are specified as 8 and 16 bit registers,
27 * but some hosts can't perform 8 or 16 bit PCI accesses. 27 * but some hosts can't perform 8 or 16 bit PCI accesses.
28 * some hosts treat caplength and hciversion as parts of a 32-bit
29 * register, others treat them as two separate registers, this
30 * affects the memory map for big endian controllers.
28 */ 31 */
29 u32 hc_capbase; 32 u32 hc_capbase;
30#define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */ 33#define HC_LENGTH(ehci, p) (0x00ff&((p) >> /* bits 7:0 / offset 00h */ \
31#define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */ 34 (ehci_big_endian_capbase(ehci) ? 24 : 0)))
35#define HC_VERSION(ehci, p) (0xffff&((p) >> /* bits 31:16 / offset 02h */ \
36 (ehci_big_endian_capbase(ehci) ? 0 : 16)))
32 u32 hcs_params; /* HCSPARAMS - offset 0x4 */ 37 u32 hcs_params; /* HCSPARAMS - offset 0x4 */
33#define HCS_DEBUG_PORT(p) (((p)>>20)&0xf) /* bits 23:20, debug port? */ 38#define HCS_DEBUG_PORT(p) (((p)>>20)&0xf) /* bits 23:20, debug port? */
34#define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */ 39#define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
@@ -52,7 +57,7 @@ struct ehci_caps {
52#define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1)) /* true: periodic_size changes*/ 57#define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1)) /* true: periodic_size changes*/
53#define HCC_64BIT_ADDR(p) ((p)&(1)) /* true: can use 64-bit addr */ 58#define HCC_64BIT_ADDR(p) ((p)&(1)) /* true: can use 64-bit addr */
54 u8 portroute[8]; /* nibbles for routing - offset 0xC */ 59 u8 portroute[8]; /* nibbles for routing - offset 0xC */
55} __attribute__ ((packed)); 60};
56 61
57 62
58/* Section 2.3 Host Controller Operational Registers */ 63/* Section 2.3 Host Controller Operational Registers */
@@ -150,7 +155,7 @@ struct ehci_regs {
150#define PORT_CSC (1<<1) /* connect status change */ 155#define PORT_CSC (1<<1) /* connect status change */
151#define PORT_CONNECT (1<<0) /* device connected */ 156#define PORT_CONNECT (1<<0) /* device connected */
152#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC) 157#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
153} __attribute__ ((packed)); 158};
154 159
155#define USBMODE 0x68 /* USB Device mode */ 160#define USBMODE 0x68 /* USB Device mode */
156#define USBMODE_SDIS (1<<3) /* Stream disable */ 161#define USBMODE_SDIS (1<<3) /* Stream disable */
@@ -194,7 +199,7 @@ struct ehci_dbg_port {
194 u32 data47; 199 u32 data47;
195 u32 address; 200 u32 address;
196#define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep)) 201#define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep))
197} __attribute__ ((packed)); 202};
198 203
199#ifdef CONFIG_EARLY_PRINTK_DBGP 204#ifdef CONFIG_EARLY_PRINTK_DBGP
200#include <linux/init.h> 205#include <linux/init.h>
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index e538172c0f64..dd1571db55e7 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -890,8 +890,8 @@ static inline void usb_free_descriptors(struct usb_descriptor_header **v)
890/* utility wrapping a simple endpoint selection policy */ 890/* utility wrapping a simple endpoint selection policy */
891 891
892extern struct usb_ep *usb_ep_autoconfig(struct usb_gadget *, 892extern struct usb_ep *usb_ep_autoconfig(struct usb_gadget *,
893 struct usb_endpoint_descriptor *) __devinit; 893 struct usb_endpoint_descriptor *);
894 894
895extern void usb_ep_autoconfig_reset(struct usb_gadget *) __devinit; 895extern void usb_ep_autoconfig_reset(struct usb_gadget *);
896 896
897#endif /* __LINUX_USB_GADGET_H */ 897#endif /* __LINUX_USB_GADGET_H */
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index 3657403eac18..00311fe9d0df 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -2,7 +2,7 @@
2 * 2 *
3 * Copyright (C) 2008 Google, Inc. 3 * Copyright (C) 2008 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com> 4 * Author: Brian Swetland <swetland@google.com>
5 * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. 5 * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
6 * 6 *
7 * This software is licensed under the terms of the GNU General Public 7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and 8 * License version 2, as published by the Free Software Foundation, and
@@ -54,6 +54,64 @@ enum otg_control_type {
54}; 54};
55 55
56/** 56/**
57 * PHY used in
58 *
59 * INVALID_PHY Unsupported PHY
60 * CI_45NM_INTEGRATED_PHY Chipidea 45nm integrated PHY
61 * SNPS_28NM_INTEGRATED_PHY Synopsis 28nm integrated PHY
62 *
63 */
64enum msm_usb_phy_type {
65 INVALID_PHY = 0,
66 CI_45NM_INTEGRATED_PHY,
67 SNPS_28NM_INTEGRATED_PHY,
68};
69
70#define IDEV_CHG_MAX 1500
71#define IUNIT 100
72
73/**
74 * Different states involved in USB charger detection.
75 *
76 * USB_CHG_STATE_UNDEFINED USB charger is not connected or detection
77 * process is not yet started.
78 * USB_CHG_STATE_WAIT_FOR_DCD Waiting for Data pins contact.
79 * USB_CHG_STATE_DCD_DONE Data pin contact is detected.
80 * USB_CHG_STATE_PRIMARY_DONE Primary detection is completed (Detects
81 * between SDP and DCP/CDP).
82 * USB_CHG_STATE_SECONDARY_DONE Secondary detection is completed (Detects
83 * between DCP and CDP).
84 * USB_CHG_STATE_DETECTED USB charger type is determined.
85 *
86 */
87enum usb_chg_state {
88 USB_CHG_STATE_UNDEFINED = 0,
89 USB_CHG_STATE_WAIT_FOR_DCD,
90 USB_CHG_STATE_DCD_DONE,
91 USB_CHG_STATE_PRIMARY_DONE,
92 USB_CHG_STATE_SECONDARY_DONE,
93 USB_CHG_STATE_DETECTED,
94};
95
96/**
97 * USB charger types
98 *
99 * USB_INVALID_CHARGER Invalid USB charger.
100 * USB_SDP_CHARGER Standard downstream port. Refers to a downstream port
101 * on USB2.0 compliant host/hub.
102 * USB_DCP_CHARGER Dedicated charger port (AC charger/ Wall charger).
103 * USB_CDP_CHARGER Charging downstream port. Enumeration can happen and
104 * IDEV_CHG_MAX can be drawn irrespective of USB state.
105 *
106 */
107enum usb_chg_type {
108 USB_INVALID_CHARGER = 0,
109 USB_SDP_CHARGER,
110 USB_DCP_CHARGER,
111 USB_CDP_CHARGER,
112};
113
114/**
57 * struct msm_otg_platform_data - platform device data 115 * struct msm_otg_platform_data - platform device data
58 * for msm_otg driver. 116 * for msm_otg driver.
59 * @phy_init_seq: PHY configuration sequence. val, reg pairs 117 * @phy_init_seq: PHY configuration sequence. val, reg pairs
@@ -64,7 +122,8 @@ enum otg_control_type {
64 * @otg_control: OTG switch controlled by user/Id pin 122 * @otg_control: OTG switch controlled by user/Id pin
65 * @default_mode: Default operational mode. Applicable only if 123 * @default_mode: Default operational mode. Applicable only if
66 * OTG switch is controller by user. 124 * OTG switch is controller by user.
67 * 125 * @pclk_src_name: pclk is derived from ebi1_usb_clk in case of 7x27 and 8k
126 * dfab_usb_hs_clk in case of 8660 and 8960.
68 */ 127 */
69struct msm_otg_platform_data { 128struct msm_otg_platform_data {
70 int *phy_init_seq; 129 int *phy_init_seq;
@@ -73,7 +132,9 @@ struct msm_otg_platform_data {
73 enum usb_mode_type mode; 132 enum usb_mode_type mode;
74 enum otg_control_type otg_control; 133 enum otg_control_type otg_control;
75 enum usb_mode_type default_mode; 134 enum usb_mode_type default_mode;
135 enum msm_usb_phy_type phy_type;
76 void (*setup_gpio)(enum usb_otg_state state); 136 void (*setup_gpio)(enum usb_otg_state state);
137 char *pclk_src_name;
77}; 138};
78 139
79/** 140/**
@@ -83,6 +144,7 @@ struct msm_otg_platform_data {
83 * @irq: IRQ number assigned for HSUSB controller. 144 * @irq: IRQ number assigned for HSUSB controller.
84 * @clk: clock struct of usb_hs_clk. 145 * @clk: clock struct of usb_hs_clk.
85 * @pclk: clock struct of usb_hs_pclk. 146 * @pclk: clock struct of usb_hs_pclk.
147 * @pclk_src: pclk source for voting.
86 * @phy_reset_clk: clock struct of usb_phy_clk. 148 * @phy_reset_clk: clock struct of usb_phy_clk.
87 * @core_clk: clock struct of usb_hs_core_clk. 149 * @core_clk: clock struct of usb_hs_core_clk.
88 * @regs: ioremapped register base address. 150 * @regs: ioremapped register base address.
@@ -90,7 +152,12 @@ struct msm_otg_platform_data {
90 * @sm_work: OTG state machine work. 152 * @sm_work: OTG state machine work.
91 * @in_lpm: indicates low power mode (LPM) state. 153 * @in_lpm: indicates low power mode (LPM) state.
92 * @async_int: Async interrupt arrived. 154 * @async_int: Async interrupt arrived.
93 * 155 * @cur_power: The amount of mA available from downstream port.
156 * @chg_work: Charger detection work.
157 * @chg_state: The state of charger detection process.
158 * @chg_type: The type of charger attached.
159 * @dcd_retires: The retry count used to track Data contact
160 * detection process.
94 */ 161 */
95struct msm_otg { 162struct msm_otg {
96 struct otg_transceiver otg; 163 struct otg_transceiver otg;
@@ -98,6 +165,7 @@ struct msm_otg {
98 int irq; 165 int irq;
99 struct clk *clk; 166 struct clk *clk;
100 struct clk *pclk; 167 struct clk *pclk;
168 struct clk *pclk_src;
101 struct clk *phy_reset_clk; 169 struct clk *phy_reset_clk;
102 struct clk *core_clk; 170 struct clk *core_clk;
103 void __iomem *regs; 171 void __iomem *regs;
@@ -107,6 +175,11 @@ struct msm_otg {
107 struct work_struct sm_work; 175 struct work_struct sm_work;
108 atomic_t in_lpm; 176 atomic_t in_lpm;
109 int async_int; 177 int async_int;
178 unsigned cur_power;
179 struct delayed_work chg_work;
180 enum usb_chg_state chg_state;
181 enum usb_chg_type chg_type;
182 u8 dcd_retries;
110}; 183};
111 184
112#endif 185#endif
diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h
index 7d1babbff071..6e97a2d3d39f 100644
--- a/include/linux/usb/msm_hsusb_hw.h
+++ b/include/linux/usb/msm_hsusb_hw.h
@@ -24,6 +24,7 @@
24#define USB_PORTSC (MSM_USB_BASE + 0x0184) 24#define USB_PORTSC (MSM_USB_BASE + 0x0184)
25#define USB_OTGSC (MSM_USB_BASE + 0x01A4) 25#define USB_OTGSC (MSM_USB_BASE + 0x01A4)
26#define USB_USBMODE (MSM_USB_BASE + 0x01A8) 26#define USB_USBMODE (MSM_USB_BASE + 0x01A8)
27#define USB_PHY_CTRL (MSM_USB_BASE + 0x0240)
27 28
28#define USBCMD_RESET 2 29#define USBCMD_RESET 2
29#define USB_USBINTR (MSM_USB_BASE + 0x0148) 30#define USB_USBINTR (MSM_USB_BASE + 0x0148)
@@ -42,6 +43,7 @@
42 43
43#define ASYNC_INTR_CTRL (1 << 29) /* Enable async interrupt */ 44#define ASYNC_INTR_CTRL (1 << 29) /* Enable async interrupt */
44#define ULPI_STP_CTRL (1 << 30) /* Block communication with PHY */ 45#define ULPI_STP_CTRL (1 << 30) /* Block communication with PHY */
46#define PHY_RETEN (1 << 1) /* PHY retention enable/disable */
45 47
46/* OTG definitions */ 48/* OTG definitions */
47#define OTGSC_INTSTS_MASK (0x7f << 16) 49#define OTGSC_INTSTS_MASK (0x7f << 16)
diff --git a/include/linux/usb/otg.h b/include/linux/usb/otg.h
index 6e40718f5abe..d87f44f5b04e 100644
--- a/include/linux/usb/otg.h
+++ b/include/linux/usb/otg.h
@@ -168,6 +168,7 @@ otg_shutdown(struct otg_transceiver *otg)
168#ifdef CONFIG_USB_OTG_UTILS 168#ifdef CONFIG_USB_OTG_UTILS
169extern struct otg_transceiver *otg_get_transceiver(void); 169extern struct otg_transceiver *otg_get_transceiver(void);
170extern void otg_put_transceiver(struct otg_transceiver *); 170extern void otg_put_transceiver(struct otg_transceiver *);
171extern const char *otg_state_string(enum usb_otg_state state);
171#else 172#else
172static inline struct otg_transceiver *otg_get_transceiver(void) 173static inline struct otg_transceiver *otg_get_transceiver(void)
173{ 174{
@@ -177,6 +178,11 @@ static inline struct otg_transceiver *otg_get_transceiver(void)
177static inline void otg_put_transceiver(struct otg_transceiver *x) 178static inline void otg_put_transceiver(struct otg_transceiver *x)
178{ 179{
179} 180}
181
182static inline const char *otg_state_string(enum usb_otg_state state)
183{
184 return NULL;
185}
180#endif 186#endif
181 187
182/* Context: can sleep */ 188/* Context: can sleep */
diff --git a/include/linux/usb/renesas_usbhs.h b/include/linux/usb/renesas_usbhs.h
new file mode 100644
index 000000000000..3a7f1d982dd6
--- /dev/null
+++ b/include/linux/usb/renesas_usbhs.h
@@ -0,0 +1,156 @@
1/*
2 * Renesas USB
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#ifndef RENESAS_USB_H
18#define RENESAS_USB_H
19#include <linux/platform_device.h>
20#include <linux/usb/ch9.h>
21
22/*
23 * module type
24 *
25 * it will be return value from get_id
26 */
27enum {
28 USBHS_HOST = 0,
29 USBHS_GADGET,
30 USBHS_MAX,
31};
32
33/*
34 * callback functions table for driver
35 *
36 * These functions are called from platform for driver.
37 * Callback function's pointer will be set before
38 * renesas_usbhs_platform_callback :: hardware_init was called
39 */
40struct renesas_usbhs_driver_callback {
41 int (*notify_hotplug)(struct platform_device *pdev);
42};
43
44/*
45 * callback functions for platform
46 *
47 * These functions are called from driver for platform
48 */
49struct renesas_usbhs_platform_callback {
50
51 /*
52 * option:
53 *
54 * Hardware init function for platform.
55 * it is called when driver was probed.
56 */
57 int (*hardware_init)(struct platform_device *pdev);
58
59 /*
60 * option:
61 *
62 * Hardware exit function for platform.
63 * it is called when driver was removed
64 */
65 void (*hardware_exit)(struct platform_device *pdev);
66
67 /*
68 * option:
69 *
70 * Phy reset for platform
71 */
72 void (*phy_reset)(struct platform_device *pdev);
73
74 /*
75 * get USB ID function
76 * - USBHS_HOST
77 * - USBHS_GADGET
78 */
79 int (*get_id)(struct platform_device *pdev);
80
81 /*
82 * get VBUS status function.
83 */
84 int (*get_vbus)(struct platform_device *pdev);
85};
86
87/*
88 * parameters for renesas usbhs
89 *
90 * some register needs USB chip specific parameters.
91 * This struct show it to driver
92 */
93struct renesas_usbhs_driver_param {
94 /*
95 * pipe settings
96 */
97 u32 *pipe_type; /* array of USB_ENDPOINT_XFER_xxx (from ep0) */
98 int pipe_size; /* pipe_type array size */
99
100 /*
101 * option:
102 *
103 * for BUSWAIT :: BWAIT
104 * */
105 int buswait_bwait;
106
107 /*
108 * option:
109 *
110 * delay time from notify_hotplug callback
111 */
112 int detection_delay;
113};
114
115/*
116 * option:
117 *
118 * platform information for renesas_usbhs driver.
119 */
120struct renesas_usbhs_platform_info {
121 /*
122 * option:
123 *
124 * platform set these functions before
125 * call platform_add_devices if needed
126 */
127 struct renesas_usbhs_platform_callback platform_callback;
128
129 /*
130 * driver set these callback functions pointer.
131 * platform can use it on callback functions
132 */
133 struct renesas_usbhs_driver_callback driver_callback;
134
135 /*
136 * option:
137 *
138 * driver use these param for some register
139 */
140 struct renesas_usbhs_driver_param driver_param;
141};
142
143/*
144 * macro for platform
145 */
146#define renesas_usbhs_get_info(pdev)\
147 ((struct renesas_usbhs_platform_info *)(pdev)->dev.platform_data)
148
149#define renesas_usbhs_call_notify_hotplug(pdev) \
150 ({ \
151 struct renesas_usbhs_driver_callback *dc; \
152 dc = &(renesas_usbhs_get_info(pdev)->driver_callback); \
153 if (dc && dc->notify_hotplug) \
154 dc->notify_hotplug(pdev); \
155 })
156#endif /* RENESAS_USB_H */