284 files changed, 11312 insertions, 3859 deletions

diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards
index 5fac246a9530..3509707f9320 100644
--- a/Documentation/devicetree/bindings/arm/arm-boards
+++ b/Documentation/devicetree/bindings/arm/arm-boards
@@ -14,6 +14,9 @@ Required nodes:
 - core-module: the root node to the Integrator platforms must have
   a core-module with regs and the compatible string
   "arm,core-module-integrator"
+- external-bus-interface: the root node to the Integrator platforms
+  must have an external bus interface with regs and the
+  compatible-string "arm,external-bus-interface"
 
   Required properties for the core module:
   - regs: the location and size of the core module registers, one
@@ -48,6 +51,11 @@ Required nodes:
                 reg = <0x10000000 0x200>;
         };
 
+        ebi@12000000 {
+                compatible = "arm,external-bus-interface";
+                reg = <0x12000000 0x100>;
+        };
+
         syscon {
                 compatible = "arm,integrator-ap-syscon";
                 reg = <0x11000000 0x100>;
diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt
index ad031211b5b8..2742e9cfd6b1 100644
--- a/Documentation/devicetree/bindings/arm/atmel-aic.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt
@@ -2,6 +2,7 @@
 
 Required properties:
 - compatible: Should be "atmel,<chip>-aic"
+  <chip> can be "at91rm9200" or "sama5d3"
 - interrupt-controller: Identifies the node as an interrupt controller.
 - interrupt-parent: For single AIC system, it is an empty property.
 - #interrupt-cells: The number of cells to define the interrupts. It should be 3.
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 1196290082d1..d2170e780f0b 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -50,7 +50,8 @@ Example:
         };
 
 RAMC SDRAM/DDR Controller required properties:
-- compatible: Should be "atmel,at91sam9260-sdramc",
+- compatible: Should be "atmel,at91rm9200-sdramc",
+                        "atmel,at91sam9260-sdramc",
                         "atmel,at91sam9g45-ddramc",
 - reg: Should contain registers location and length
   For at91sam9263 and at91sam9g45 you must specify 2 entries.
diff --git a/Documentation/devicetree/bindings/arm/moxart.txt b/Documentation/devicetree/bindings/arm/moxart.txt
new file mode 100644
index 000000000000..11087edb0658
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/moxart.txt
@@ -0,0 +1,12 @@
+MOXA ART device tree bindings
+
+Boards with the MOXA ART SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "moxa,moxart";
+
+Boards:
+
+- UC-7112-LX: embedded computer
+  compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart"
diff --git a/Documentation/devicetree/bindings/arm/samsung/sysreg.txt b/Documentation/devicetree/bindings/arm/samsung/sysreg.txt
index 5039c0a12f55..0ab3251a6ec2 100644
--- a/Documentation/devicetree/bindings/arm/samsung/sysreg.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/sysreg.txt
@@ -1,7 +1,12 @@
 SAMSUNG S5P/Exynos SoC series System Registers (SYSREG)
 
 Properties:
- - name : should be 'sysreg';
  - compatible : should contain "samsung,<chip name>-sysreg", "syscon";
    For Exynos4 SoC series it should be "samsung,exynos4-sysreg", "syscon";
  - reg : offset and length of the register set.
+
+Example:
+        syscon@10010000 {
+                compatible = "samsung,exynos4-sysreg", "syscon";
+                reg = <0x10010000 0x400>;
+        };
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt
new file mode 100644
index 000000000000..cd5e23912888
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/at91-clock.txt
@@ -0,0 +1,339 @@
+Device Tree Clock bindings for arch-at91
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be one of the following:
+        "atmel,at91rm9200-pmc" or
+        "atmel,at91sam9g45-pmc" or
+        "atmel,at91sam9n12-pmc" or
+        "atmel,at91sam9x5-pmc" or
+        "atmel,sama5d3-pmc":
+                at91 PMC (Power Management Controller)
+                All at91 specific clocks (clocks defined below) must be child
+                node of the PMC node.
+
+        "atmel,at91rm9200-clk-main":
+                at91 main oscillator
+
+        "atmel,at91rm9200-clk-master" or
+        "atmel,at91sam9x5-clk-master":
+                at91 master clock
+
+        "atmel,at91sam9x5-clk-peripheral" or
+        "atmel,at91rm9200-clk-peripheral":
+                at91 peripheral clocks
+
+        "atmel,at91rm9200-clk-pll" or
+        "atmel,at91sam9g45-clk-pll" or
+        "atmel,at91sam9g20-clk-pllb" or
+        "atmel,sama5d3-clk-pll":
+                at91 pll clocks
+
+        "atmel,at91sam9x5-clk-plldiv":
+                at91 plla divisor
+
+        "atmel,at91rm9200-clk-programmable" or
+        "atmel,at91sam9g45-clk-programmable" or
+        "atmel,at91sam9x5-clk-programmable":
+                at91 programmable clocks
+
+        "atmel,at91sam9x5-clk-smd":
+                at91 SMD (Soft Modem) clock
+
+        "atmel,at91rm9200-clk-system":
+                at91 system clocks
+
+        "atmel,at91rm9200-clk-usb" or
+        "atmel,at91sam9x5-clk-usb" or
+        "atmel,at91sam9n12-clk-usb":
+                at91 usb clock
+
+        "atmel,at91sam9x5-clk-utmi":
+                at91 utmi clock
+
+Required properties for PMC node:
+- reg : defines the IO memory reserved for the PMC.
+- #size-cells : shall be 0 (reg is used to encode clk id).
+- #address-cells : shall be 1 (reg is used to encode clk id).
+- interrupts : shall be set to PMC interrupt line.
+- interrupt-controller : tell that the PMC is an interrupt controller.
+- #interrupt-cells : must be set to 1. The first cell encodes the interrupt id,
+        and reflect the bit position in the PMC_ER/DR/SR registers.
+        You can use the dt macros defined in dt-bindings/clk/at91.h.
+        0 (AT91_PMC_MOSCS) -> main oscillator ready
+        1 (AT91_PMC_LOCKA) -> PLL A ready
+        2 (AT91_PMC_LOCKB) -> PLL B ready
+        3 (AT91_PMC_MCKRDY) -> master clock ready
+        6 (AT91_PMC_LOCKU) -> UTMI PLL clock ready
+        8 .. 15 (AT91_PMC_PCKRDY(id)) -> programmable clock ready
+        16 (AT91_PMC_MOSCSELS) -> main oscillator selected
+        17 (AT91_PMC_MOSCRCS) -> RC main oscillator stabilized
+        18 (AT91_PMC_CFDEV) -> clock failure detected
+
+For example:
+        pmc: pmc@fffffc00 {
+                compatible = "atmel,sama5d3-pmc";
+                interrupts = <1 4 7>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+                #size-cells = <0>;
+                #address-cells = <1>;
+
+                /* put at91 clocks here */
+        };
+
+Required properties for main clock:
+- interrupt-parent : must reference the PMC node.
+- interrupts : shall be set to "<0>".
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks (optional if clock-frequency is provided) : shall be the slow clock
+        phandle. This clock is used to calculate the main clock rate if
+        "clock-frequency" is not provided.
+- clock-frequency : the main oscillator frequency.Prefer the use of
+        "clock-frequency" over automatic clock rate calculation.
+
+For example:
+        main: mainck {
+                compatible = "atmel,at91rm9200-clk-main";
+                interrupt-parent = <&pmc>;
+                interrupts = <0>;
+                #clock-cells = <0>;
+                clocks = <&ck32k>;
+                clock-frequency = <18432000>;
+        };
+
+Required properties for master clock:
+- interrupt-parent : must reference the PMC node.
+- interrupts : shall be set to "<3>".
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the master clock sources (see atmel datasheet) phandles.
+        e.g. "<&ck32k>, <&main>, <&plla>, <&pllb>".
+- atmel,clk-output-range : minimum and maximum clock frequency (two u32
+                           fields).
+           e.g. output = <0 133000000>; <=> 0 to 133MHz.
+- atmel,clk-divisors : master clock divisors table (four u32 fields).
+                0 <=> reserved value.
+                e.g. divisors = <1 2 4 6>;
+- atmel,master-clk-have-div3-pres : some SoC use the reserved value 7 in the
+                                    PRES field as CLOCK_DIV3 (e.g sam9x5).
+
+For example:
+        mck: mck {
+                compatible = "atmel,at91rm9200-clk-master";
+                interrupt-parent = <&pmc>;
+                interrupts = <3>;
+                #clock-cells = <0>;
+                atmel,clk-output-range = <0 133000000>;
+                atmel,clk-divisors = <1 2 4 0>;
+        };
+
+Required properties for peripheral clocks:
+- #size-cells : shall be 0 (reg is used to encode clk id).
+- #address-cells : shall be 1 (reg is used to encode clk id).
+- clocks : shall be the master clock phandle.
+        e.g. clocks = <&mck>;
+- name: device tree node describing a specific system clock.
+        * #clock-cells : from common clock binding; shall be set to 0.
+        * reg: peripheral id. See Atmel's datasheets to get a full
+          list of peripheral ids.
+        * atmel,clk-output-range : minimum and maximum clock frequency
+          (two u32 fields). Only valid on at91sam9x5-clk-peripheral
+          compatible IPs.
+
+For example:
+        periph: periphck {
+                compatible = "atmel,at91sam9x5-clk-peripheral";
+                #size-cells = <0>;
+                #address-cells = <1>;
+                clocks = <&mck>;
+
+                ssc0_clk {
+                        #clock-cells = <0>;
+                        reg = <2>;
+                        atmel,clk-output-range = <0 133000000>;
+                };
+
+                usart0_clk {
+                        #clock-cells = <0>;
+                        reg = <3>;
+                        atmel,clk-output-range = <0 66000000>;
+                };
+        };
+
+
+Required properties for pll clocks:
+- interrupt-parent : must reference the PMC node.
+- interrupts : shall be set to "<1>".
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the main clock phandle.
+- reg : pll id.
+        0 -> PLL A
+        1 -> PLL B
+- atmel,clk-input-range : minimum and maximum source clock frequency (two u32
+                          fields).
+          e.g. input = <1 32000000>; <=> 1 to 32MHz.
+- #atmel,pll-clk-output-range-cells : number of cells reserved for pll output
+                                      range description. Sould be set to 2, 3
+                                      or 4.
+        * 1st and 2nd cells represent the frequency range (min-max).
+        * 3rd cell is optional and represents the OUT field value for the given
+          range.
+        * 4th cell is optional and represents the ICPLL field (PLLICPR
+          register)
+- atmel,pll-clk-output-ranges : pll output frequency ranges + optional parameter
+                                depending on #atmel,pll-output-range-cells
+                                property value.
+
+For example:
+        plla: pllack {
+                compatible = "atmel,at91sam9g45-clk-pll";
+                interrupt-parent = <&pmc>;
+                interrupts = <1>;
+                #clock-cells = <0>;
+                clocks = <&main>;
+                reg = <0>;
+                atmel,clk-input-range = <2000000 32000000>;
+                #atmel,pll-clk-output-range-cells = <4>;
+                atmel,pll-clk-output-ranges = <74500000 800000000 0 0
+                                               69500000 750000000 1 0
+                                               64500000 700000000 2 0
+                                               59500000 650000000 3 0
+                                               54500000 600000000 0 1
+                                               49500000 550000000 1 1
+                                               44500000 500000000 2 1
+                                               40000000 450000000 3 1>;
+        };
+
+Required properties for plldiv clocks (plldiv = pll / 2):
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the plla clock phandle.
+
+The pll divisor is equal to 2 and cannot be changed.
+
+For example:
+        plladiv: plladivck {
+                compatible = "atmel,at91sam9x5-clk-plldiv";
+                #clock-cells = <0>;
+                clocks = <&plla>;
+        };
+
+Required properties for programmable clocks:
+- interrupt-parent : must reference the PMC node.
+- #size-cells : shall be 0 (reg is used to encode clk id).
+- #address-cells : shall be 1 (reg is used to encode clk id).
+- clocks : shall be the programmable clock source phandles.
+        e.g. clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+- name: device tree node describing a specific prog clock.
+        * #clock-cells : from common clock binding; shall be set to 0.
+        * reg : programmable clock id (register offset from  PCKx
+                         register).
+        * interrupts : shall be set to "<(8 + id)>".
+
+For example:
+        prog: progck {
+                compatible = "atmel,at91sam9g45-clk-programmable";
+                #size-cells = <0>;
+                #address-cells = <1>;
+                interrupt-parent = <&pmc>;
+                clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
+
+                prog0 {
+                        #clock-cells = <0>;
+                        reg = <0>;
+                        interrupts = <8>;
+                };
+
+                prog1 {
+                        #clock-cells = <0>;
+                        reg = <1>;
+                        interrupts = <9>;
+                };
+        };
+
+
+Required properties for smd clock:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the smd clock source phandles.
+        e.g. clocks = <&plladiv>, <&utmi>;
+
+For example:
+        smd: smdck {
+                compatible = "atmel,at91sam9x5-clk-smd";
+                #clock-cells = <0>;
+                clocks = <&plladiv>, <&utmi>;
+        };
+
+Required properties for system clocks:
+- #size-cells : shall be 0 (reg is used to encode clk id).
+- #address-cells : shall be 1 (reg is used to encode clk id).
+- name: device tree node describing a specific system clock.
+        * #clock-cells : from common clock binding; shall be set to 0.
+        * reg: system clock id (bit position in SCER/SCDR/SCSR registers).
+              See Atmel's datasheet to get a full list of system clock ids.
+
+For example:
+        system: systemck {
+                compatible = "atmel,at91rm9200-clk-system";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                ddrck {
+                        #clock-cells = <0>;
+                        reg = <2>;
+                        clocks = <&mck>;
+                };
+
+                uhpck {
+                        #clock-cells = <0>;
+                        reg = <6>;
+                        clocks = <&usb>;
+                };
+
+                udpck {
+                        #clock-cells = <0>;
+                        reg = <7>;
+                        clocks = <&usb>;
+                };
+        };
+
+
+Required properties for usb clock:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the smd clock source phandles.
+        e.g. clocks = <&pllb>;
+- atmel,clk-divisors (only available for "atmel,at91rm9200-clk-usb"):
+        usb clock divisor table.
+        e.g. divisors = <1 2 4 0>;
+
+For example:
+        usb: usbck {
+                compatible = "atmel,at91sam9x5-clk-usb";
+                #clock-cells = <0>;
+                clocks = <&plladiv>, <&utmi>;
+        };
+
+        usb: usbck {
+                compatible = "atmel,at91rm9200-clk-usb";
+                #clock-cells = <0>;
+                clocks = <&pllb>;
+                atmel,clk-divisors = <1 2 4 0>;
+        };
+
+
+Required properties for utmi clock:
+- interrupt-parent : must reference the PMC node.
+- interrupts : shall be set to "<AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>".
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the main clock source phandle.
+
+For example:
+        utmi: utmick {
+                compatible = "atmel,at91sam9x5-clk-utmi";
+                interrupt-parent = <&pmc>;
+                interrupts = <AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>;
+                #clock-cells = <0>;
+                clocks = <&main>;
+        };
diff --git a/Documentation/devicetree/bindings/dma/ste-dma40.txt b/Documentation/devicetree/bindings/dma/ste-dma40.txt
index a8c21c256baa..1f5729f10621 100644
--- a/Documentation/devicetree/bindings/dma/ste-dma40.txt
+++ b/Documentation/devicetree/bindings/dma/ste-dma40.txt
@@ -50,6 +50,9 @@ Each dmas request consists of 4 cells:
         0x00000008: Use fixed channel:
                 Use automatic channel selection when unset
                 Use DMA request line number when set
+        0x00000010: Set channel as high priority:
+                Normal priority when unset
+                High priority when set
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index c67b975c8906..532b1d440abc 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -16,6 +16,8 @@ Required Properties:
           specific extensions.
         - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
           specific extensions.
+        - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
+          specific extensions.
 
 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
   unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
index b5a86d20ee36..167d5dab9f64 100644
--- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
+++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
@@ -31,38 +31,58 @@ Required properties:
         7: ..
         i: Local Timer Interrupt n
 
-Example 1: In this example, the system uses only the first global timer
-           interrupt generated by MCT and the remaining three global timer
-           interrupts are unused. Two local timer interrupts have been
-           specified.
+  For MCT block that uses a per-processor interrupt for local timers, such
+  as ones compatible with "samsung,exynos4412-mct", only one local timer
+  interrupt might be specified, meaning that all local timers use the same
+  per processor interrupt.
+
+Example 1: In this example, the IP contains two local timers, using separate
+           interrupts, so two local timer interrupts have been specified,
+           in addition to four global timer interrupts.
 
         mct@10050000 {
                 compatible = "samsung,exynos4210-mct";
                 reg = <0x10050000 0x800>;
-                interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>,
+                interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
                              <0 42 0>, <0 48 0>;
         };
 
-Example 2: In this example, the MCT global and local timer interrupts are
-           connected to two separate interrupt controllers. Hence, an
-           interrupt-map is created to map the interrupts to the respective
-           interrupt controllers.
+Example 2: In this example, the timer interrupts are connected to two separate
+           interrupt controllers. Hence, an interrupt-map is created to map
+           the interrupts to the respective interrupt controllers.
 
         mct@101C0000 {
                 compatible = "samsung,exynos4210-mct";
                 reg = <0x101C0000 0x800>;
-                interrupt-controller;
-                #interrups-cells = <2>;
                 interrupt-parent = <&mct_map>;
-                interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
-                             <4 0>, <5 0>;
+                interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
 
                 mct_map: mct-map {
-                        #interrupt-cells = <2>;
+                        #interrupt-cells = <1>;
                         #address-cells = <0>;
                         #size-cells = <0>;
-                        interrupt-map = <0x0 0 &combiner 23 3>,
-                                        <0x4 0 &gic 0 120 0>,
-                                        <0x5 0 &gic 0 121 0>;
+                        interrupt-map = <0 &gic 0 57 0>,
+                                        <1 &gic 0 69 0>,
+                                        <2 &combiner 12 6>,
+                                        <3 &combiner 12 7>,
+                                        <4 &gic 0 42 0>,
+                                        <5 &gic 0 48 0>;
                 };
         };
+
+Example 3: In this example, the IP contains four local timers, but using
+           a per-processor interrupt to handle them. Either all the local
+           timer interrupts can be specified, with the same interrupt specifier
+           value or just the first one.
+
+        mct@10050000 {
+                compatible = "samsung,exynos4412-mct";
+                reg = <0x10050000 0x800>;
+
+                /* Both ways are possible in this case. Either: */
+                interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
+                             <0 42 0>;
+                /* or: */
+                interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
+                             <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
+        };
diff --git a/Documentation/devicetree/bindings/usb/keystone-phy.txt b/Documentation/devicetree/bindings/usb/keystone-phy.txt
new file mode 100644
index 000000000000..f37b3a86341d
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-phy.txt
@@ -0,0 +1,20 @@
+TI Keystone USB PHY
+
+Required properties:
+ - compatible: should be "ti,keystone-usbphy".
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+   with 'reg' property.
+ - reg : Address and length of the usb phy control register set.
+
+The main purpose of this PHY driver is to enable the USB PHY reference clock
+gate on the Keystone SOC for both the USB2 and USB3 PHY. Otherwise it is just
+an NOP PHY driver.  Hence this node is referenced as both the usb2 and usb3
+phy node in the USB Glue layer driver node.
+
+usb_phy: usb_phy@2620738 {
+        compatible = "ti,keystone-usbphy";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        reg = <0x2620738 32>;
+        status = "disabled";
+};
diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt b/Documentation/devicetree/bindings/usb/keystone-usb.txt
new file mode 100644
index 000000000000..60527d335b58
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt
@@ -0,0 +1,42 @@
+TI Keystone Soc USB Controller
+
+DWC3 GLUE
+
+Required properties:
+ - compatible: should be "ti,keystone-dwc3".
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+   with 'reg' property.
+ - reg : Address and length of the register set for the USB subsystem on
+   the SOC.
+ - interrupts : The irq number of this device that is used to interrupt the
+   MPU.
+ - ranges: allows valid 1:1 translation between child's address space and
+   parent's address space.
+ - clocks: Clock IDs array as required by the controller.
+ - clock-names: names of clocks correseponding to IDs in the clock property.
+
+Sub-nodes:
+The dwc3 core should be added as subnode to Keystone DWC3 glue.
+- dwc3 :
+   The binding details of dwc3 can be found in:
+   Documentation/devicetree/bindings/usb/dwc3.txt
+
+Example:
+        usb: usb@2680000 {
+                compatible = "ti,keystone-dwc3";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x2680000 0x10000>;
+                clocks = <&clkusb>;
+                clock-names = "usb";
+                interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
+                ranges;
+                status = "disabled";
+
+                dwc3@2690000 {
+                        compatible = "synopsys,dwc3";
+                        reg = <0x2690000 0x70000>;
+                        interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
+                        usb-phy = <&usb_phy>, <&usb_phy>;
+                };
+        };
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c1f1a7eee953..483d316543ad 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -644,8 +644,9 @@ config ARCH_MSM
           stack and controls some vital subsystems
           (clock and power control, etc).
 
-config ARCH_SHMOBILE
-        bool "Renesas SH-Mobile / R-Mobile"
+config ARCH_SHMOBILE_LEGACY
+        bool "Renesas SH-Mobile / R-Mobile (non-multiplatform)"
+        select ARCH_SHMOBILE
         select ARM_PATCH_PHYS_VIRT
         select CLKDEV_LOOKUP
         select GENERIC_CLOCKEVENTS
@@ -660,7 +661,8 @@ config ARCH_SHMOBILE
         select PM_GENERIC_DOMAINS if PM
         select SPARSE_IRQ
         help
-          Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
+          Support for Renesas's SH-Mobile and R-Mobile ARM platforms using
+          a non-multiplatform kernel.
 
 config ARCH_RPC
         bool "RiscPC"
@@ -1611,7 +1613,7 @@ config HZ_FIXED
         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
                 ARCH_S5PV210 || ARCH_EXYNOS4
         default AT91_TIMER_HZ if ARCH_AT91
-        default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
+        default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
         default 0
 
 choice
@@ -1796,8 +1798,8 @@ config ARCH_WANT_GENERAL_HUGETLB
 source "mm/Kconfig"
 
 config FORCE_MAX_ZONEORDER
-        int "Maximum zone order" if ARCH_SHMOBILE
-        range 11 64 if ARCH_SHMOBILE
+        int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
+        range 11 64 if ARCH_SHMOBILE_LEGACY
         default "12" if SOC_AM33XX
         default "9" if SA1111
         default "11"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index c99b1086d83d..1edf8ebd8494 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -190,7 +190,6 @@ machine-$(CONFIG_ARCH_S5PC100)		+= s5pc100
 machine-$(CONFIG_ARCH_S5PV210)          += s5pv210
 machine-$(CONFIG_ARCH_SA1100)           += sa1100
 machine-$(CONFIG_ARCH_SHMOBILE)         += shmobile
-machine-$(CONFIG_ARCH_SHMOBILE_MULTI)   += shmobile
 machine-$(CONFIG_ARCH_SIRF)             += prima2
 machine-$(CONFIG_ARCH_SOCFPGA)          += socfpga
 machine-$(CONFIG_ARCH_STI)              += sti
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index e7190bb5998e..f54d5a25c7ee 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -64,7 +64,7 @@ else
 endif
 endif
 
-ifeq ($(CONFIG_ARCH_SHMOBILE),y)
+ifeq ($(CONFIG_ARCH_SHMOBILE_LEGACY),y)
 OBJS            += head-shmobile.o
 endif
 
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d57c1a65b24f..25d708c47eb5 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
 dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
 # sam9x5
 dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb
+dtb-$(CONFIG_ARCH_AT91) += at91-cosino_mega2560.dtb
 dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb
 dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb
 dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
@@ -40,6 +41,8 @@ dtb-$(CONFIG_ARCH_AT91)	+= sama5d31ek.dtb
 dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb
 dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
 dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
+dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
+
 dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
 dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm11351-brt.dtb \
@@ -90,6 +93,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
         kirkwood-mplcec4.dtb \
         kirkwood-mv88f6281gtw-ge.dtb \
         kirkwood-netgear_readynas_duo_v2.dtb \
+        kirkwood-netgear_readynas_nv+_v2.dtb \
         kirkwood-ns2.dtb \
         kirkwood-ns2lite.dtb \
         kirkwood-ns2max.dtb \
@@ -104,6 +108,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
         kirkwood-ts219-6281.dtb \
         kirkwood-ts219-6282.dtb
 dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
+dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
 dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \
         qcom-msm8960-cdp.dtb
 dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
@@ -114,6 +119,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
         armada-xp-axpwifiap.dtb \
         armada-xp-db.dtb \
         armada-xp-gp.dtb \
+        armada-xp-netgear-rn2120.dtb \
         armada-xp-matrix.dtb \
         armada-xp-openblocks-ax3-4.dtb
 dtb-$(CONFIG_ARCH_MXC) += \
@@ -216,7 +222,7 @@ dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
 dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
 dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
         s3c6410-smdk6410.dtb
-dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
+dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
         r7s72100-genmai.dtb \
         r8a7740-armadillo800eva.dtb \
         r8a7778-bockw.dtb \
@@ -225,6 +231,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
         r8a7779-marzen.dtb \
         r8a7779-marzen-reference.dtb \
         r8a7791-koelsch.dtb \
+        r8a7791-koelsch-reference.dtb \
         r8a7790-lager.dtb \
         r8a7790-lager-reference.dtb \
         sh73a0-kzm9g.dtb \
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
index 3a1de9eb5111..3c4f6d983cbd 100644
--- a/arch/arm/boot/dts/animeo_ip.dts
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -90,34 +90,19 @@
                         nand-on-flash-bbt;
                         status = "okay";
 
-                        at91bootstrap@0 {
-                                label = "at91bootstrap";
-                                reg = <0x0 0x8000>;
-                        };
-
-                        barebox@8000 {
+                        barebox@0 {
                                 label = "barebox";
-                                reg = <0x8000 0x40000>;
-                        };
-
-                        bareboxenv@48000 {
-                                label = "bareboxenv";
-                                reg = <0x48000 0x8000>;
-                        };
-
-                        user_block@0x50000 {
-                                label = "user_block";
-                                reg = <0x50000 0xb0000>;
+                                reg = <0x0 0x58000>;
                         };
 
-                        kernel@100000 {
-                                label = "kernel";
-                                reg = <0x100000 0x1b0000>;
+                        u_boot_env@58000 {
+                                label = "u_boot_env";
+                                reg = <0x58000 0x8000>;
                         };
 
-                        root@2b0000 {
-                                label = "root";
-                                reg = <0x2b0000 0x1D50000>;
+                        ubi@60000 {
+                                label = "ubi";
+                                reg = <0x60000 0x1FA0000>;
                         };
                 };
 
diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts
index 2471d9da767b..944e8785b308 100644
--- a/arch/arm/boot/dts/armada-370-mirabox.dts
+++ b/arch/arm/boot/dts/armada-370-mirabox.dts
@@ -74,13 +74,13 @@
                                 green_pwr_led {
                                         label = "mirabox:green:pwr";
                                         gpios = <&gpio1 31 1>;
-                                        linux,default-trigger = "heartbeat";
+                                        default-state = "keep";
                                 };
 
                                 blue_stat_led {
                                         label = "mirabox:blue:stat";
                                         gpios = <&gpio2 0 1>;
-                                        linux,default-trigger = "cpu0";
+                                        default-state = "off";
                                 };
 
                                 green_stat_led {
@@ -139,6 +139,27 @@
                                         reg = <0x25>;
                                 };
                         };
+
+                        nand@d0000 {
+                                status = "okay";
+                                num-cs = <1>;
+                                marvell,nand-keep-config;
+                                marvell,nand-enable-arbiter;
+                                nand-on-flash-bbt;
+
+                                partition@0 {
+                                        label = "U-Boot";
+                                        reg = <0 0x400000>;
+                                };
+                                partition@400000 {
+                                        label = "Linux";
+                                        reg = <0x400000 0x400000>;
+                                };
+                                partition@800000 {
+                                        label = "Filesystem";
+                                        reg = <0x800000 0x3f800000>;
+                                };
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
index 8ac2ac1f69cc..6a7383f24c7c 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
@@ -11,6 +11,8 @@
 
 /dts-v1/;
 
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
 #include "armada-370.dtsi"
 
 / {
@@ -62,6 +64,7 @@
                                         marvell,pins = "mpp57";
                                         marvell,function = "gpio";
                                 };
+
                                 sata1_led_pin: sata1-led-pin {
                                         marvell,pins = "mpp15";
                                         marvell,function = "gpio";
@@ -77,6 +80,21 @@
                                         marvell,function = "gpio";
                                 };
 
+                                backup_button_pin: backup-button-pin {
+                                        marvell,pins = "mpp58";
+                                        marvell,function = "gpio";
+                                };
+
+                                power_button_pin: power-button-pin {
+                                        marvell,pins = "mpp62";
+                                        marvell,function = "gpio";
+                                };
+
+                                reset_button_pin: reset-button-pin {
+                                        marvell,pins = "mpp6";
+                                        marvell,function = "gpio";
+                                };
+
                                 poweroff: poweroff {
                                         marvell,pins = "mpp8";
                                         marvell,function = "gpio";
@@ -84,7 +102,7 @@
                         };
 
                         mdio {
-                                phy0: ethernet-phy@0 {
+                                phy0: ethernet-phy@0 { /* Marvell 88E1318 */
                                         reg = <0>;
                                 };
                         };
@@ -113,82 +131,116 @@
                                         pwm_polarity = <0>;
                                 };
                         };
+
+                        nand@d0000 {
+                                status = "okay";
+                                num-cs = <1>;
+                                marvell,nand-keep-config;
+                                marvell,nand-enable-arbiter;
+                                nand-on-flash-bbt;
+
+                                partition@0 {
+                                        label = "u-boot";
+                                        reg = <0x0000000 0x180000>;  /* 1.5MB */
+                                        read-only;
+                                };
+
+                                partition@180000 {
+                                        label = "u-boot-env";
+                                        reg = <0x180000 0x20000>;    /* 128KB */
+                                        read-only;
+                                };
+
+                                partition@200000 {
+                                        label = "uImage";
+                                        reg = <0x0200000 0x600000>;    /* 6MB */
+                                };
+
+                                partition@800000 {
+                                        label = "minirootfs";
+                                        reg = <0x0800000 0x400000>;    /* 4MB */
+                                };
+
+                                /* Last MB is for the BBT, i.e. not writable */
+                                partition@c00000 {
+                                        label = "ubifs";
+                                        reg = <0x0c00000 0x7400000>; /* 116MB */
+                                };
+                        };
                 };
         };
 
         clocks {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               g762_clk: fixedclk {
+               g762_clk: g762-oscillator {
                          compatible = "fixed-clock";
                          #clock-cells = <0>;
                          clock-frequency = <8192>;
                };
         };
 
-        gpio_leds {
+        gpio-leds {
                 compatible = "gpio-leds";
-                pinctrl-0 = < &power_led_pin
-                              &sata1_led_pin
-                              &sata2_led_pin
-                              &backup_led_pin >;
+                pinctrl-0 = <&power_led_pin
+                             &sata1_led_pin
+                             &sata2_led_pin
+                             &backup_led_pin>;
                 pinctrl-names = "default";
 
-                blue_power_led {
+                blue-power-led {
                         label = "rn102:blue:pwr";
-                        gpios = <&gpio1 25 1>;  /* GPIO 57 Active Low */
-                        linux,default-trigger = "heartbeat";
+                        gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+                        default-state = "keep";
                 };
 
-                green_sata1_led {
+                green-sata1-led {
                         label = "rn102:green:sata1";
-                        gpios = <&gpio0 15 1>;  /* GPIO 15 Active Low */
+                        gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
                         default-state = "on";
                 };
 
-                green_sata2_led {
+                green-sata2-led {
                         label = "rn102:green:sata2";
-                        gpios = <&gpio0 14 1>;   /* GPIO 14 Active Low */
+                        gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
                         default-state = "on";
                 };
 
-                green_backup_led {
+                green-backup-led {
                         label = "rn102:green:backup";
-                        gpios = <&gpio1 24 1>;   /* GPIO 56 Active Low */
+                        gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
                         default-state = "on";
                 };
         };
 
-        gpio_keys {
+        gpio-keys {
                 compatible = "gpio-keys";
-                #address-cells = <1>;
-                #size-cells = <0>;
+                pinctrl-0 = <&power_button_pin
+                             &reset_button_pin
+                             &backup_button_pin>;
+                pinctrl-names = "default";
 
-                button@1 {
+                power-button {
                         label = "Power Button";
-                        linux,code = <116>;     /* KEY_POWER */
-                        gpios = <&gpio1 30 0>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
                 };
 
-                button@2 {
+                reset-button {
                         label = "Reset Button";
-                        linux,code = <0x198>;   /* KEY_RESTART */
-                        gpios = <&gpio0 6 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
                 };
 
-                button@3 {
+                backup-button {
                         label = "Backup Button";
-                        linux,code = <133>;     /* KEY_COPY */
-                        gpios = <&gpio1 26 1>;
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
                 };
         };
 
-        gpio_poweroff {
+        gpio-poweroff {
                 compatible = "gpio-poweroff";
                 pinctrl-0 = <&poweroff>;
                 pinctrl-names = "default";
-                gpios = <&gpio0 8 1>;
+                gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
         };
-
 };
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn104.dts b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
index b0b32f5fbeb4..272e2e2fc58f 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
@@ -11,6 +11,8 @@
 
 /dts-v1/;
 
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
 #include "armada-370.dtsi"
 
 / {
@@ -58,12 +60,12 @@
                                         marvell,function = "gpio";
                                 };
 
-                                backup_key_pin: backup-key-pin {
+                                backup_button_pin: backup-button-pin {
                                         marvell,pins = "mpp52";
                                         marvell,function = "gpio";
                                 };
 
-                                power_key_pin: power-key-pin {
+                                power_button_pin: power-button-pin {
                                         marvell,pins = "mpp62";
                                         marvell,function = "gpio";
                                 };
@@ -78,18 +80,18 @@
                                         marvell,function = "gpio";
                                 };
 
-                                reset_key_pin: reset-key-pin {
+                                reset_button_pin: reset-button-pin {
                                         marvell,pins = "mpp65";
                                         marvell,function = "gpio";
                                 };
                         };
 
                         mdio {
-                                phy0: ethernet-phy@0 {
+                                phy0: ethernet-phy@0 { /* Marvell 88E1318 */
                                         reg = <0>;
                                 };
 
-                                phy1: ethernet-phy@1 {
+                                phy1: ethernet-phy@1 { /* Marvell 88E1318 */
                                         reg = <1>;
                                 };
                         };
@@ -123,71 +125,133 @@
                                         fan_startv = <1>;
                                         pwm_polarity = <0>;
                                 };
+
+                                pca9554: pca9554@23 {
+                                        compatible = "nxp,pca9554";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        reg = <0x23>;
+                                };
+                        };
+
+                        nand@d0000 {
+                                status = "okay";
+                                num-cs = <1>;
+                                marvell,nand-keep-config;
+                                marvell,nand-enable-arbiter;
+                                nand-on-flash-bbt;
+
+                                partition@0 {
+                                        label = "u-boot";
+                                        reg = <0x0000000 0x180000>;  /* 1.5MB */
+                                        read-only;
+                                };
+
+                                partition@180000 {
+                                        label = "u-boot-env";
+                                        reg = <0x180000 0x20000>;    /* 128KB */
+                                        read-only;
+                                };
+
+                                partition@200000 {
+                                        label = "uImage";
+                                        reg = <0x0200000 0x600000>;    /* 6MB */
+                                };
+
+                                partition@800000 {
+                                        label = "minirootfs";
+                                        reg = <0x0800000 0x400000>;    /* 4MB */
+                                };
+
+                                /* Last MB is for the BBT, i.e. not writable */
+                                partition@c00000 {
+                                        label = "ubifs";
+                                        reg = <0x0c00000 0x7400000>; /* 116MB */
+                                };
                         };
                 };
         };
 
         clocks {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               g762_clk: fixedclk {
+               g762_clk: g762-oscillator {
                          compatible = "fixed-clock";
                          #clock-cells = <0>;
                          clock-frequency = <8192>;
                };
         };
 
-        gpio_leds {
+        gpio-leds {
                 compatible = "gpio-leds";
                 pinctrl-0 = <&backup_led_pin &power_led_pin>;
                 pinctrl-names = "default";
 
-                blue_backup_led {
+                blue-backup-led {
                         label = "rn104:blue:backup";
-                        gpios = <&gpio1 31 0>;   /* GPIO 63 Active High */
+                        gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
                         default-state = "off";
                 };
 
-                blue_power_led {
+                blue-power-led {
                         label = "rn104:blue:pwr";
-                        gpios = <&gpio2 0 1>;    /* GPIO 64 Active Low */
+                        gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
                         linux,default-trigger = "keep";
                 };
+
+                blue-sata1-led {
+                        label = "rn104:blue:sata1";
+                        gpios = <&pca9554 0 GPIO_ACTIVE_LOW>;
+                        default-state = "off";
+                };
+
+                blue-sata2-led {
+                        label = "rn104:blue:sata2";
+                        gpios = <&pca9554 1 GPIO_ACTIVE_LOW>;
+                        default-state = "off";
+                };
+
+                blue-sata3-led {
+                        label = "rn104:blue:sata3";
+                        gpios = <&pca9554 2 GPIO_ACTIVE_LOW>;
+                        default-state = "off";
+                };
+
+                blue-sata4-led {
+                        label = "rn104:blue:sata4";
+                        gpios = <&pca9554 3 GPIO_ACTIVE_LOW>;
+                        default-state = "off";
+                };
         };
 
-        gpio_keys {
+        gpio-keys {
                 compatible = "gpio-keys";
-                #address-cells = <1>;
-                #size-cells = <0>;
-                pinctrl-0 = <&backup_key_pin
-                             &power_key_pin
-                             &reset_key_pin>;
+                pinctrl-0 = <&backup_button_pin
+                             &power_button_pin
+                             &reset_button_pin>;
                 pinctrl-names = "default";
 
-                button@1 {
+                backup-button {
                         label = "Backup Button";
-                        linux,code = <133>;     /* KEY_COPY */
-                        gpios = <&gpio1 20 1>;
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
                 };
 
-                button@2 {
+                power-button {
                         label = "Power Button";
-                        linux,code = <116>;     /* KEY_POWER */
-                        gpios = <&gpio1 30 0>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
                 };
 
-                button@3 {
+                reset-button {
                         label = "Reset Button";
-                        linux,code = <0x198>;   /* KEY_RESTART */
-                        gpios = <&gpio2 1 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
                 };
         };
 
-        gpio_poweroff {
+        gpio-poweroff {
                 compatible = "gpio-poweroff";
                 pinctrl-0 = <&poweroff>;
                 pinctrl-names = "default";
-                gpios = <&gpio1 28 1>;
+                gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
         };
 };
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index f81810a59629..abbb807459d2 100644
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -104,6 +104,27 @@
                                         gpios = <&gpio0 6 1>;
                                 };
                         };
+
+                        nand@d0000 {
+                                status = "okay";
+                                num-cs = <1>;
+                                marvell,nand-keep-config;
+                                marvell,nand-enable-arbiter;
+                                nand-on-flash-bbt;
+
+                                partition@0 {
+                                        label = "U-Boot";
+                                        reg = <0 0x800000>;
+                                };
+                                partition@800000 {
+                                        label = "Linux";
+                                        reg = <0x800000 0x800000>;
+                                };
+                                partition@1000000 {
+                                        label = "Filesystem";
+                                        reg = <0x1000000 0x3f000000>;
+                                };
+                        };
                 };
         };
  };
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 7f10f627ae5b..b6b253924893 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -103,22 +103,52 @@
                         #size-cells = <1>;
                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
 
-                        mbusc: mbus-controller@20000 {
-                                compatible = "marvell,mbus-controller";
-                                reg = <0x20000 0x100>, <0x20180 0x20>;
+                        rtc@10300 {
+                                compatible = "marvell,orion-rtc";
+                                reg = <0x10300 0x20>;
+                                interrupts = <50>;
                         };
 
-                        mpic: interrupt-controller@20000 {
-                                compatible = "marvell,mpic";
-                                #interrupt-cells = <1>;
-                                #size-cells = <1>;
-                                interrupt-controller;
-                                msi-controller;
+                        spi0: spi@10600 {
+                                compatible = "marvell,orion-spi";
+                                reg = <0x10600 0x28>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                cell-index = <0>;
+                                interrupts = <30>;
+                                clocks = <&coreclk 0>;
+                                status = "disabled";
                         };
 
-                        coherency-fabric@20200 {
-                                compatible = "marvell,coherency-fabric";
-                                reg = <0x20200 0xb0>, <0x21010 0x1c>;
+                        spi1: spi@10680 {
+                                compatible = "marvell,orion-spi";
+                                reg = <0x10680 0x28>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                cell-index = <1>;
+                                interrupts = <92>;
+                                clocks = <&coreclk 0>;
+                                status = "disabled";
+                        };
+
+                        i2c0: i2c@11000 {
+                                compatible = "marvell,mv64xxx-i2c";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                interrupts = <31>;
+                                timeout-ms = <1000>;
+                                clocks = <&coreclk 0>;
+                                status = "disabled";
+                        };
+
+                        i2c1: i2c@11100 {
+                                compatible = "marvell,mv64xxx-i2c";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                interrupts = <32>;
+                                timeout-ms = <1000>;
+                                clocks = <&coreclk 0>;
+                                status = "disabled";
                         };
 
                         serial@12000 {
@@ -146,25 +176,41 @@
                                 clock-output-names = "nand";
                         };
 
+                        mbusc: mbus-controller@20000 {
+                                compatible = "marvell,mbus-controller";
+                                reg = <0x20000 0x100>, <0x20180 0x20>;
+                        };
+
+                        mpic: interrupt-controller@20000 {
+                                compatible = "marvell,mpic";
+                                #interrupt-cells = <1>;
+                                #size-cells = <1>;
+                                interrupt-controller;
+                                msi-controller;
+                        };
+
+                        coherency-fabric@20200 {
+                                compatible = "marvell,coherency-fabric";
+                                reg = <0x20200 0xb0>, <0x21010 0x1c>;
+                        };
+
                         timer@20300 {
                                 reg = <0x20300 0x30>, <0x21040 0x30>;
                                 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
                         };
 
-                        sata@a0000 {
-                                compatible = "marvell,orion-sata";
-                                reg = <0xa0000 0x5000>;
-                                interrupts = <55>;
-                                clocks = <&gateclk 15>, <&gateclk 30>;
-                                clock-names = "0", "1";
+                        usb@50000 {
+                                compatible = "marvell,orion-ehci";
+                                reg = <0x50000 0x500>;
+                                interrupts = <45>;
                                 status = "disabled";
                         };
 
-                        mdio {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "marvell,orion-mdio";
-                                reg = <0x72004 0x4>;
+                        usb@51000 {
+                                compatible = "marvell,orion-ehci";
+                                reg = <0x51000 0x500>;
+                                interrupts = <46>;
+                                status = "disabled";
                         };
 
                         eth0: ethernet@70000 {
@@ -175,6 +221,13 @@
                                 status = "disabled";
                         };
 
+                        mdio {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "marvell,orion-mdio";
+                                reg = <0x72004 0x4>;
+                        };
+
                         eth1: ethernet@74000 {
                                 compatible = "marvell,armada-370-neta";
                                 reg = <0x74000 0x4000>;
@@ -183,32 +236,25 @@
                                 status = "disabled";
                         };
 
-                        i2c0: i2c@11000 {
-                                compatible = "marvell,mv64xxx-i2c";
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                interrupts = <31>;
-                                timeout-ms = <1000>;
-                                clocks = <&coreclk 0>;
+                        sata@a0000 {
+                                compatible = "marvell,orion-sata";
+                                reg = <0xa0000 0x5000>;
+                                interrupts = <55>;
+                                clocks = <&gateclk 15>, <&gateclk 30>;
+                                clock-names = "0", "1";
                                 status = "disabled";
                         };
 
-                        i2c1: i2c@11100 {
-                                compatible = "marvell,mv64xxx-i2c";
+                        nand@d0000 {
+                                compatible = "marvell,armada370-nand";
+                                reg = <0xd0000 0x54>;
                                 #address-cells = <1>;
-                                #size-cells = <0>;
-                                interrupts = <32>;
-                                timeout-ms = <1000>;
-                                clocks = <&coreclk 0>;
+                                #size-cells = <1>;
+                                interrupts = <113>;
+                                clocks = <&coredivclk 0>;
                                 status = "disabled";
                         };
 
-                        rtc@10300 {
-                                compatible = "marvell,orion-rtc";
-                                reg = <0x10300 0x20>;
-                                interrupts = <50>;
-                        };
-
                         mvsdio@d4000 {
                                 compatible = "marvell,orion-sdio";
                                 reg = <0xd4000 0x200>;
@@ -220,43 +266,6 @@
                                 cap-mmc-highspeed;
                                 status = "disabled";
                         };
-
-                        usb@50000 {
-                                compatible = "marvell,orion-ehci";
-                                reg = <0x50000 0x500>;
-                                interrupts = <45>;
-                                status = "disabled";
-                        };
-
-                        usb@51000 {
-                                compatible = "marvell,orion-ehci";
-                                reg = <0x51000 0x500>;
-                                interrupts = <46>;
-                                status = "disabled";
-                        };
-
-                        spi0: spi@10600 {
-                                compatible = "marvell,orion-spi";
-                                reg = <0x10600 0x28>;
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                cell-index = <0>;
-                                interrupts = <30>;
-                                clocks = <&coreclk 0>;
-                                status = "disabled";
-                        };
-
-                        spi1: spi@10680 {
-                                compatible = "marvell,orion-spi";
-                                reg = <0x10680 0x28>;
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                cell-index = <1>;
-                                interrupts = <92>;
-                                clocks = <&coreclk 0>;
-                                status = "disabled";
-                        };
-
                 };
         };
 
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 7a4b82e71aaf..0d8530c98cf5 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -91,11 +91,6 @@
                 };
 
                 internal-regs {
-                        system-controller@18200 {
-                                compatible = "marvell,armada-370-xp-system-controller";
-                                reg = <0x18200 0x100>;
-                        };
-
                         L2: l2-cache {
                                 compatible = "marvell,aurora-outer-cache";
                                 reg = <0x08000 0x1000>;
@@ -103,8 +98,17 @@
                                 wt-override;
                         };
 
-                        interrupt-controller@20000 {
-                                reg = <0x20a00 0x1d0>, <0x21870 0x58>;
+                        i2c0: i2c@11000 {
+                                reg = <0x11000 0x20>;
+                        };
+
+                        i2c1: i2c@11100 {
+                                reg = <0x11100 0x20>;
+                        };
+
+                        system-controller@18200 {
+                                compatible = "marvell,armada-370-xp-system-controller";
+                                reg = <0x18200 0x100>;
                         };
 
                         pinctrl {
@@ -163,9 +167,11 @@
                                 interrupts = <91>;
                         };
 
-                        timer@20300 {
-                                compatible = "marvell,armada-370-timer";
-                                clocks = <&coreclk 2>;
+                        gateclk: clock-gating-control@18220 {
+                                compatible = "marvell,armada-370-gating-clock";
+                                reg = <0x18220 0x4>;
+                                clocks = <&coreclk 0>;
+                                #clock-cells = <1>;
                         };
 
                         coreclk: mvebu-sar@18230 {
@@ -174,11 +180,28 @@
                                 #clock-cells = <1>;
                         };
 
-                        gateclk: clock-gating-control@18220 {
-                                compatible = "marvell,armada-370-gating-clock";
-                                reg = <0x18220 0x4>;
+                        thermal@18300 {
+                                compatible = "marvell,armada370-thermal";
+                                reg = <0x18300 0x4
+                                        0x18304 0x4>;
+                                status = "okay";
+                        };
+
+                        interrupt-controller@20000 {
+                                reg = <0x20a00 0x1d0>, <0x21870 0x58>;
+                        };
+
+                        timer@20300 {
+                                compatible = "marvell,armada-370-timer";
+                                clocks = <&coreclk 2>;
+                        };
+
+                        usb@50000 {
+                                clocks = <&coreclk 0>;
+                        };
+
+                        usb@51000 {
                                 clocks = <&coreclk 0>;
-                                #clock-cells = <1>;
                         };
 
                         xor@60800 {
@@ -218,29 +241,6 @@
                                         dmacap,memset;
                                 };
                         };
-
-                        i2c0: i2c@11000 {
-                                reg = <0x11000 0x20>;
-                        };
-
-                        i2c1: i2c@11100 {
-                                reg = <0x11100 0x20>;
-                        };
-
-                        usb@50000 {
-                                clocks = <&coreclk 0>;
-                        };
-
-                        usb@51000 {
-                                clocks = <&coreclk 0>;
-                        };
-
-                        thermal@18300 {
-                                compatible = "marvell,armada370-thermal";
-                                reg = <0x18300 0x4
-                                        0x18304 0x4>;
-                                status = "okay";
-                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 2298e4a910e2..274e2ad5f51c 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -175,6 +175,14 @@
                                         spi-max-frequency = <108000000>;
                                 };
                         };
+
+                        nand@d0000 {
+                                status = "okay";
+                                num-cs = <1>;
+                                marvell,nand-keep-config;
+                                marvell,nand-enable-arbiter;
+                                nand-on-flash-bbt;
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
new file mode 100644
index 000000000000..f048b4ee4d52
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
@@ -0,0 +1,322 @@
+/*
+ * Device Tree file for NETGEAR ReadyNAS 2120
+ *
+ * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-xp-mv78230.dtsi"
+
+/ {
+        model = "NETGEAR ReadyNAS 2120";
+        compatible = "netgear,readynas-2120", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
+
+        chosen {
+                bootargs = "console=ttyS0,115200 earlyprintk";
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x00000000 0 0x80000000>; /* 2GB */
+        };
+
+        soc {
+                ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
+                          MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
+
+                pcie-controller {
+                        status = "okay";
+
+                        /* Connected to first Marvell 88SE9170 SATA controller */
+                        pcie@1,0 {
+                                /* Port 0, Lane 0 */
+                                status = "okay";
+                        };
+
+                        /* Connected to second Marvell 88SE9170 SATA controller */
+                        pcie@2,0 {
+                                /* Port 0, Lane 1 */
+                                status = "okay";
+                        };
+
+                        /* Connected to Fresco Logic FL1009 USB 3.0 controller */
+                        pcie@5,0 {
+                                /* Port 1, Lane 0 */
+                                status = "okay";
+                        };
+                };
+
+                internal-regs {
+                        pinctrl {
+                                poweroff: poweroff {
+                                        marvell,pins = "mpp42";
+                                        marvell,function = "gpio";
+                                };
+
+                                power_button_pin: power-button-pin {
+                                        marvell,pins = "mpp27";
+                                        marvell,function = "gpio";
+                                };
+
+                                reset_button_pin: reset-button-pin {
+                                        marvell,pins = "mpp41";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata1_led_pin: sata1-led-pin {
+                                        marvell,pins = "mpp31";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata2_led_pin: sata2-led-pin {
+                                        marvell,pins = "mpp40";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata3_led_pin: sata3-led-pin {
+                                        marvell,pins = "mpp44";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata4_led_pin: sata4-led-pin {
+                                        marvell,pins = "mpp47";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata1_power_pin: sata1-power-pin {
+                                        marvell,pins = "mpp24";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata2_power_pin: sata2-power-pin {
+                                        marvell,pins = "mpp25";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata3_power_pin: sata3-power-pin {
+                                        marvell,pins = "mpp26";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata4_power_pin: sata4-power-pin {
+                                        marvell,pins = "mpp28";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata1_pres_pin: sata1-pres-pin {
+                                        marvell,pins = "mpp32";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata2_pres_pin: sata2-pres-pin {
+                                        marvell,pins = "mpp33";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata3_pres_pin: sata3-pres-pin {
+                                        marvell,pins = "mpp34";
+                                        marvell,function = "gpio";
+                                };
+
+                                sata4_pres_pin: sata4-pres-pin {
+                                        marvell,pins = "mpp35";
+                                        marvell,function = "gpio";
+                                };
+
+                                err_led_pin: err-led-pin {
+                                        marvell,pins = "mpp45";
+                                        marvell,function = "gpio";
+                                };
+                        };
+
+                        serial@12000 {
+                                clocks = <&coreclk 0>;
+                                status = "okay";
+                        };
+
+                        mdio {
+                                phy0: ethernet-phy@0 { /* Marvell 88E1318 */
+                                        reg = <0>;
+                                };
+
+                                phy1: ethernet-phy@1 { /* Marvell 88E1318 */
+                                        reg = <1>;
+                                };
+                        };
+
+                        ethernet@70000 {
+                                status = "okay";
+                                phy = <&phy0>;
+                                phy-mode = "rgmii-id";
+                        };
+
+                        ethernet@74000 {
+                                status = "okay";
+                                phy = <&phy1>;
+                                phy-mode = "rgmii-id";
+                        };
+
+                        /* Front USB 2.0 port */
+                        usb@50000 {
+                                status = "okay";
+                        };
+
+                        i2c@11000 {
+                                compatible = "marvell,mv64xxx-i2c";
+                                clock-frequency = <400000>;
+                                status = "okay";
+
+                                /* Controller for rear fan #1 of 3 (Protechnic
+                                 * MGT4012XB-O20, 8000RPM) near eSATA port */
+                                g762_fan1: g762@3e {
+                                        compatible = "gmt,g762";
+                                        reg = <0x3e>;
+                                        clocks = <&g762_clk>; /* input clock */
+                                        fan_gear_mode = <0>;
+                                        fan_startv = <1>;
+                                        pwm_polarity = <0>;
+                                };
+
+                                /*  Controller for rear (center) fan #2 of 3 */
+                                g762_fan2: g762@48 {
+                                        compatible = "gmt,g762";
+                                        reg = <0x48>;
+                                        clocks = <&g762_clk>; /* input clock */
+                                        fan_gear_mode = <0>;
+                                        fan_startv = <1>;
+                                        pwm_polarity = <0>;
+                                };
+
+                                /*  Controller for rear fan #3 of 3 */
+                                g762_fan3: g762@49 {
+                                        compatible = "gmt,g762";
+                                        reg = <0x49>;
+                                        clocks = <&g762_clk>; /* input clock */
+                                        fan_gear_mode = <0>;
+                                        fan_startv = <1>;
+                                        pwm_polarity = <0>;
+                                };
+
+                                /* Temperature sensor */
+                                g751: g751@4c {
+                                        compatible = "gmt,g751";
+                                        reg = <0x4c>;
+                                };
+                        };
+
+                        nand@d0000 {
+                                status = "okay";
+                                num-cs = <1>;
+                                marvell,nand-keep-config;
+                                marvell,nand-enable-arbiter;
+                                nand-on-flash-bbt;
+
+                                partition@0 {
+                                        label = "u-boot";
+                                        reg = <0x0000000 0x180000>;  /* 1.5MB */
+                                        read-only;
+                                };
+
+                                partition@180000 {
+                                        label = "u-boot-env";
+                                        reg = <0x180000 0x20000>;    /* 128KB */
+                                        read-only;
+                                };
+
+                                partition@200000 {
+                                        label = "uImage";
+                                        reg = <0x0200000 0x600000>;    /* 6MB */
+                                };
+
+                                partition@800000 {
+                                        label = "minirootfs";
+                                        reg = <0x0800000 0x400000>;    /* 4MB */
+                                };
+
+                                /* Last MB is for the BBT, i.e. not writable */
+                                partition@c00000 {
+                                        label = "ubifs";
+                                        reg = <0x0c00000 0x7400000>; /* 116MB */
+                                };
+                        };
+                };
+        };
+
+        clocks {
+               g762_clk: g762-oscillator {
+                         compatible = "fixed-clock";
+                         #clock-cells = <0>;
+                         clock-frequency = <32768>;
+               };
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+                pinctrl-0 = <&sata1_led_pin &sata2_led_pin &err_led_pin
+                             &sata3_led_pin &sata4_led_pin>;
+                pinctrl-names = "default";
+
+                red-sata1-led {
+                        label = "rn2120:red:sata1";
+                        gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
+                        default-state = "off";
+                };
+
+                red-sata2-led {
+                        label = "rn2120:red:sata2";
+                        gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+                        default-state = "off";
+                };
+
+                red-sata3-led {
+                        label = "rn2120:red:sata3";
+                        gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+                        default-state = "off";
+                };
+
+                red-sata4-led {
+                        label = "rn2120:red:sata4";
+                        gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
+                        default-state = "off";
+                };
+
+                red-err-led {
+                        label = "rn2120:red:err";
+                        gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+                        default-state = "off";
+                };
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                pinctrl-0 = <&power_button_pin &reset_button_pin>;
+                pinctrl-names = "default";
+
+                power-button {
+                        label = "Power Button";
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+                };
+
+                reset-button {
+                        label = "Reset Button";
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+                };
+        };
+
+        gpio-poweroff {
+                compatible = "gpio-poweroff";
+                pinctrl-0 = <&poweroff>;
+                pinctrl-names = "default";
+                gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+        };
+};
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index 5695afcc04bf..99bcf76e6953 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -103,8 +103,7 @@
                                 green_led {
                                         label = "green_led";
                                         gpios = <&gpio1 21 1>;
-                                        default-state = "off";
-                                        linux,default-trigger = "heartbeat";
+                                        default-state = "keep";
                                 };
                         };
 
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 281c6447e872..4919fb82ac62 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -42,13 +42,14 @@
                                 wt-override;
                         };
 
-                        interrupt-controller@20000 {
-                              reg = <0x20a00 0x2d0>, <0x21070 0x58>;
+                        i2c0: i2c@11000 {
+                                compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
+                                reg = <0x11000 0x100>;
                         };
 
-                        armada-370-xp-pmsu@22000 {
-                                compatible = "marvell,armada-370-xp-pmsu";
-                                reg = <0x22100 0x430>, <0x20800 0x20>;
+                        i2c1: i2c@11100 {
+                                compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
+                                reg = <0x11100 0x100>;
                         };
 
                         serial@12200 {
@@ -68,10 +69,16 @@
                                 status = "disabled";
                         };
 
-                        timer@20300 {
-                                compatible = "marvell,armada-xp-timer";
-                                clocks = <&coreclk 2>, <&refclk>;
-                                clock-names = "nbclk", "fixed";
+                        system-controller@18200 {
+                                compatible = "marvell,armada-370-xp-system-controller";
+                                reg = <0x18200 0x500>;
+                        };
+
+                        gateclk: clock-gating-control@18220 {
+                                compatible = "marvell,armada-xp-gating-clock";
+                                reg = <0x18220 0x4>;
+                                clocks = <&coreclk 0>;
+                                #clock-cells = <1>;
                         };
 
                         coreclk: mvebu-sar@18230 {
@@ -80,6 +87,13 @@
                                 #clock-cells = <1>;
                         };
 
+                        thermal@182b0 {
+                                compatible = "marvell,armadaxp-thermal";
+                                reg = <0x182b0 0x4
+                                        0x184d0 0x4>;
+                                status = "okay";
+                        };
+
                         cpuclk: clock-complex@18700 {
                                 #clock-cells = <1>;
                                 compatible = "marvell,armada-xp-cpu-clock";
@@ -87,16 +101,19 @@
                                 clocks = <&coreclk 1>;
                         };
 
-                        gateclk: clock-gating-control@18220 {
-                                compatible = "marvell,armada-xp-gating-clock";
-                                reg = <0x18220 0x4>;
-                                clocks = <&coreclk 0>;
-                                #clock-cells = <1>;
+                        interrupt-controller@20000 {
+                              reg = <0x20a00 0x2d0>, <0x21070 0x58>;
                         };
 
-                        system-controller@18200 {
-                                compatible = "marvell,armada-370-xp-system-controller";
-                                reg = <0x18200 0x500>;
+                        timer@20300 {
+                                compatible = "marvell,armada-xp-timer";
+                                clocks = <&coreclk 2>, <&refclk>;
+                                clock-names = "nbclk", "fixed";
+                        };
+
+                        armada-370-xp-pmsu@22000 {
+                                compatible = "marvell,armada-370-xp-pmsu";
+                                reg = <0x22100 0x430>, <0x20800 0x20>;
                         };
 
                         eth2: ethernet@30000 {
@@ -107,6 +124,22 @@
                                 status = "disabled";
                         };
 
+                        usb@50000 {
+                                clocks = <&gateclk 18>;
+                        };
+
+                        usb@51000 {
+                                clocks = <&gateclk 19>;
+                        };
+
+                        usb@52000 {
+                                compatible = "marvell,orion-ehci";
+                                reg = <0x52000 0x500>;
+                                interrupts = <47>;
+                                clocks = <&gateclk 20>;
+                                status = "disabled";
+                        };
+
                         xor@60900 {
                                 compatible = "marvell,orion-xor";
                                 reg = <0x60900 0x100
@@ -146,39 +179,6 @@
                                         dmacap,memset;
                                 };
                         };
-
-                        i2c0: i2c@11000 {
-                                compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
-                                reg = <0x11000 0x100>;
-                        };
-
-                        i2c1: i2c@11100 {
-                                compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
-                                reg = <0x11100 0x100>;
-                        };
-
-                        usb@50000 {
-                                clocks = <&gateclk 18>;
-                        };
-
-                        usb@51000 {
-                                clocks = <&gateclk 19>;
-                        };
-
-                        usb@52000 {
-                                compatible = "marvell,orion-ehci";
-                                reg = <0x52000 0x500>;
-                                interrupts = <47>;
-                                clocks = <&gateclk 20>;
-                                status = "disabled";
-                        };
-
-                        thermal@182b0 {
-                                compatible = "marvell,armadaxp-thermal";
-                                reg = <0x182b0 0x4
-                                        0x184d0 0x4>;
-                                status = "okay";
-                        };
                 };
         };
 
diff --git a/arch/arm/boot/dts/at91-cosino.dtsi b/arch/arm/boot/dts/at91-cosino.dtsi
new file mode 100644
index 000000000000..2093c4d7cd6a
--- /dev/null
+++ b/arch/arm/boot/dts/at91-cosino.dtsi
@@ -0,0 +1,122 @@
+/*
+ * at91-cosino.dtsi - Device Tree file for Cosino core module
+ *
+ * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
+ *                      HCE Engineering
+ *
+ * Derived from at91sam9x5ek.dtsi by:
+ *      Copyright (C) 2012 Atmel,
+ *      2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#include "at91sam9g35.dtsi"
+
+/ {
+        model = "HCE Cosino core module";
+        compatible = "hce,cosino", "atmel,at91sam9x5", "atmel,at91sam9";
+
+        chosen {
+                bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
+        };
+
+        memory {
+                reg = <0x20000000 0x8000000>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                main_clock: clock@0 {
+                        compatible = "atmel,osc", "fixed-clock";
+                        clock-frequency = <12000000>;
+                };
+        };
+
+        ahb {
+                apb {
+                        mmc0: mmc@f0008000 {
+                                pinctrl-0 = <
+                                        &pinctrl_board_mmc0
+                                        &pinctrl_mmc0_slot0_clk_cmd_dat0
+                                        &pinctrl_mmc0_slot0_dat1_3>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
+                                };
+                        };
+
+                        dbgu: serial@fffff200 {
+                                status = "okay";
+                        };
+
+                        usart0: serial@f801c000 {
+                                status = "okay";
+                        };
+
+                        i2c0: i2c@f8010000 {
+                                status = "okay";
+                        };
+
+                        adc0: adc@f804c000 {
+                                atmel,adc-clock-rate = <1000000>;
+                                atmel,adc-ts-wires = <4>;
+                                atmel,adc-ts-pressure-threshold = <10000>;
+                                status = "okay";
+                        };
+
+                        pinctrl@fffff400 {
+                                mmc0 {
+                                        pinctrl_board_mmc0: mmc0-board {
+                                                atmel,pins =
+                                                        <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;  /* PD15 gpio CD pin pull up and deglitch */
+                                        };
+                                };
+                        };
+
+                        watchdog@fffffe40 {
+                                status = "okay";
+                        };
+                };
+
+                nand0: nand@40000000 {
+                        nand-bus-width = <8>;
+                        nand-ecc-mode = "hw";
+                        atmel,has-pmecc;        /* Enable PMECC */
+                        atmel,pmecc-cap = <4>;
+                        atmel,pmecc-sector-size = <512>;
+                        nand-on-flash-bbt;
+                        status = "okay";
+
+                        at91bootstrap@0 {
+                                label = "at91bootstrap";
+                                reg = <0x0 0x40000>;
+                        };
+
+                        uboot@40000 {
+                                label = "u-boot";
+                                reg = <0x40000 0x80000>;
+                        };
+
+                        ubootenv@c0000 {
+                                label = "U-Boot Env";
+                                reg = <0xc0000 0x140000>;
+                        };
+
+                        kernel@200000 {
+                                label = "kernel";
+                                reg = <0x200000 0x600000>;
+                        };
+
+                        rootfs@800000 {
+                                label = "rootfs";
+                                reg = <0x800000 0x0f800000>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91-cosino_mega2560.dts b/arch/arm/boot/dts/at91-cosino_mega2560.dts
new file mode 100644
index 000000000000..f9415dd11f17
--- /dev/null
+++ b/arch/arm/boot/dts/at91-cosino_mega2560.dts
@@ -0,0 +1,84 @@
+/*
+ * at91-cosino_mega2560.dts - Device Tree file for Cosino board with
+ *                            Mega 2560 extension
+ *
+ * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
+ *                      HCE Engineering
+ *
+ * Derived from at91sam9g35ek.dts by:
+ *      Copyright (C) 2012 Atmel,
+ *      2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/dts-v1/;
+#include "at91-cosino.dtsi"
+
+/ {
+        model = "HCE Cosino Mega 2560";
+        compatible = "hce,cosino_mega2560", "atmel,at91sam9x5", "atmel,at91sam9";
+
+        ahb {
+                apb {
+                        macb0: ethernet@f802c000 {
+                                phy-mode = "rmii";
+                                status = "okay";
+                        };
+
+                        adc0: adc@f804c000 {
+                                atmel,adc-clock-rate = <1000000>;
+                                atmel,adc-ts-wires = <4>;
+                                atmel,adc-ts-pressure-threshold = <10000>;
+                                status = "okay";
+                        };
+
+
+                        tsadcc: tsadcc@f804c000 {
+                                status = "okay";
+                        };
+
+                        rtc@fffffeb0 {
+                                status = "okay";
+                        };
+
+                        usart1: serial@f8020000 {
+                                status = "okay";
+                        };
+
+                        usart2: serial@f8024000 {
+                                status = "okay";
+                        };
+
+                        usb2: gadget@f803c000 {
+                                atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
+                                status = "okay";
+                        };
+
+                        mmc1: mmc@f000c000 {
+                                pinctrl-0 = <
+                                        &pinctrl_mmc1_slot0_clk_cmd_dat0
+                                        &pinctrl_mmc1_slot0_dat1_3>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        non-removable;
+                                };
+                        };
+                };
+
+                usb0: ohci@00600000 {
+                        status = "okay";
+                        num-ports = <3>;
+                        atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW */
+                                           &pioD 19 GPIO_ACTIVE_LOW
+                                           &pioD 20 GPIO_ACTIVE_LOW
+                                          >;
+                };
+
+                usb1: ehci@00700000 {
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index f77065506f1e..c61b16fba79b 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -191,12 +191,12 @@
                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
                                         };
 
-                                        pinctrl_uart0_rts: uart0_rts-0 {
+                                        pinctrl_uart0_cts: uart0_cts-0 {
                                                 atmel,pins =
                                                         <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
                                         };
 
-                                        pinctrl_uart0_cts: uart0_cts-0 {
+                                        pinctrl_uart0_rts: uart0_rts-0 {
                                                 atmel,pins =
                                                         <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
                                         };
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index d2d72c3b44c4..df6b0aa0e4dd 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -29,10 +29,22 @@
 
         ahb {
                 apb {
-                        dbgu: serial@fffff200 {
+                        usb1: gadget@fffb0000 {
+                                atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
+                                atmel,pullup-gpio = <&pioD 5 GPIO_ACTIVE_HIGH>;
                                 status = "okay";
                         };
 
+                        macb0: ethernet@fffbc000 {
+                                phy-mode = "rmii";
+                                status = "okay";
+
+                                phy0: ethernet-phy {
+                                        interrupt-parent = <&pioC>;
+                                        interrupts = <4 IRQ_TYPE_EDGE_BOTH>;
+                                };
+                        };
+
                         usart1: serial@fffc4000 {
                                 pinctrl-0 =
                                                 <&pinctrl_uart1
@@ -44,16 +56,6 @@
                                 status = "okay";
                         };
 
-                        macb0: ethernet@fffbc000 {
-                                phy-mode = "rmii";
-                                status = "okay";
-                        };
-
-                        usb1: gadget@fffb0000 {
-                                atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
-                                status = "okay";
-                        };
-
                         spi0: spi@fffe0000 {
                                 status = "okay";
                                 cs-gpios = <&pioA 3 0>, <0>, <0>, <0>;
@@ -63,12 +65,45 @@
                                         reg = <0>;
                                 };
                         };
+
+                        dbgu: serial@fffff200 {
+                                status = "okay";
+                        };
                 };
 
                 usb0: ohci@00300000 {
                         num-ports = <2>;
                         status = "okay";
                 };
+
+                nor_flash@10000000 {
+                        compatible = "cfi-flash";
+                        reg = <0x10000000 0x800000>;
+                        linux,mtd-name = "physmap-flash.0";
+                        bank-width = <2>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        barebox@0 {
+                                label = "barebox";
+                                reg = <0x00000 0x40000>;
+                        };
+
+                        bareboxenv@40000 {
+                                label = "bareboxenv";
+                                reg = <0x40000 0x10000>;
+                        };
+
+                        kernel@50000 {
+                                label = "kernel";
+                                reg = <0x50000 0x300000>;
+                        };
+
+                        root@350000  {
+                                label = "root";
+                                reg = <0x350000 0x4B0000>;
+                        };
+                };
         };
 
         leds {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index d5bd65f74602..c8fa9b9f07e3 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -30,6 +30,7 @@
                 i2c0 = &i2c0;
                 ssc0 = &ssc0;
                 ssc1 = &ssc1;
+                pwm0 = &pwm0;
         };
         cpus {
                 #address-cells = <0>;
@@ -366,6 +367,34 @@
                                         };
                                 };
 
+                                fb {
+                                        pinctrl_fb: fb-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC1 periph A */
+                                                         AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC2 periph A */
+                                                         AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC3 periph A */
+                                                         AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB9 periph B */
+                                                         AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC6 periph A */
+                                                         AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC7 periph A */
+                                                         AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC8 periph A */
+                                                         AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC9 periph A */
+                                                         AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC10 periph A */
+                                                         AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC11 periph A */
+                                                         AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC14 periph A */
+                                                         AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC15 periph A */
+                                                         AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC16 periph A */
+                                                         AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC12 periph B */
+                                                         AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC18 periph A */
+                                                         AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC19 periph A */
+                                                         AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC22 periph A */
+                                                         AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC23 periph A */
+                                                         AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC24 periph A */
+                                                         AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC17 periph B */
+                                                         AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC26 periph A */
+                                                         AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
+                                        };
+                                };
+
                                 pioA: gpio@fffff200 {
                                         compatible = "atmel,at91rm9200-gpio";
                                         reg = <0xfffff200 0x200>;
@@ -547,6 +576,23 @@
                                 pinctrl-0 = <&pinctrl_spi1>;
                                 status = "disabled";
                         };
+
+                        pwm0: pwm@fffb8000 {
+                                compatible = "atmel,at91sam9rl-pwm";
+                                reg = <0xfffb8000 0x300>;
+                                interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
+                                #pwm-cells = <3>;
+                                status = "disabled";
+                        };
+                };
+
+                fb0: fb@0x00700000 {
+                        compatible = "atmel,at91sam9263-lcdc";
+                        reg = <0x00700000 0x1000>;
+                        interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_fb>;
+                        status = "disabled";
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 70f835b55c0b..15009c9f2293 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -95,6 +95,36 @@
                         };
                 };
 
+                fb0: fb@0x00700000 {
+                        display = <&display0>;
+                        status = "okay";
+
+                        display0: display {
+                                bits-per-pixel = <16>;
+                                atmel,lcdcon-backlight;
+                                atmel,dmacon = <0x1>;
+                                atmel,lcdcon2 = <0x80008002>;
+                                atmel,guard-time = <1>;
+
+                                display-timings {
+                                        native-mode = <&timing0>;
+                                        timing0: timing0 {
+                                                clock-frequency = <4965000>;
+                                                hactive = <240>;
+                                                vactive = <320>;
+                                                hback-porch = <1>;
+                                                hfront-porch = <33>;
+                                                vback-porch = <1>;
+                                                vfront-porch = <0>;
+                                                hsync-len = <5>;
+                                                vsync-len = <1>;
+                                                hsync-active = <1>;
+                                                vsync-active = <1>;
+                                        };
+                                };
+                        };
+                };
+
                 nand0: nand@40000000 {
                         nand-bus-width = <8>;
                         nand-ecc-mode = "soft";
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index c3e514837074..ef0857cb171c 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -37,6 +37,7 @@
                 i2c1 = &i2c1;
                 ssc0 = &ssc0;
                 ssc1 = &ssc1;
+                pwm0 = &pwm0;
         };
         cpus {
                 #address-cells = <0>;
@@ -143,6 +144,22 @@
                                         };
                                 };
 
+                                i2c0 {
+                                        pinctrl_i2c0: i2c0-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA21 periph A TWCK0 */
+                                                         AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
+                                        };
+                                };
+
+                                i2c1 {
+                                        pinctrl_i2c1: i2c1-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB11 periph A TWCK1 */
+                                                         AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
+                                        };
+                                };
+
                                 usart0 {
                                         pinctrl_usart0: usart0-0 {
                                                 atmel,pins =
@@ -425,6 +442,42 @@
                                         };
                                 };
 
+                                fb {
+                                        pinctrl_fb: fb-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE0 periph A */
+                                                         AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE2 periph A */
+                                                         AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE3 periph A */
+                                                         AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE4 periph A */
+                                                         AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE5 periph A */
+                                                         AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE6 periph A */
+                                                         AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE7 periph A */
+                                                         AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE8 periph A */
+                                                         AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE9 periph A */
+                                                         AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE10 periph A */
+                                                         AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE11 periph A */
+                                                         AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE12 periph A */
+                                                         AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE13 periph A */
+                                                         AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE14 periph A */
+                                                         AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE15 periph A */
+                                                         AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE16 periph A */
+                                                         AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE17 periph A */
+                                                         AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE18 periph A */
+                                                         AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE19 periph A */
+                                                         AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE20 periph A */
+                                                         AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE21 periph A */
+                                                         AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE22 periph A */
+                                                         AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE23 periph A */
+                                                         AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE24 periph A */
+                                                         AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE25 periph A */
+                                                         AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE26 periph A */
+                                                         AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE27 periph A */
+                                                         AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE28 periph A */
+                                                         AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE29 periph A */
+                                                         AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
+                                        };
+                                };
+
                                 pioA: gpio@fffff200 {
                                         compatible = "atmel,at91rm9200-gpio";
                                         reg = <0xfffff200 0x200>;
@@ -542,6 +595,8 @@
                                 compatible = "atmel,at91sam9g10-i2c";
                                 reg = <0xfff84000 0x100>;
                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_i2c0>;
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 status = "disabled";
@@ -551,6 +606,8 @@
                                 compatible = "atmel,at91sam9g10-i2c";
                                 reg = <0xfff88000 0x100>;
                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_i2c1>;
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 status = "disabled";
@@ -614,10 +671,19 @@
                                 };
                         };
 
+                        pwm0: pwm@fffb8000 {
+                                compatible = "atmel,at91sam9rl-pwm";
+                                reg = <0xfffb8000 0x300>;
+                                interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+                                #pwm-cells = <3>;
+                                status = "disabled";
+                        };
+
                         mmc0: mmc@fff80000 {
                                 compatible = "atmel,hsmci";
                                 reg = <0xfff80000 0x600>;
                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
+                                pinctrl-names = "default";
                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
                                 dma-names = "rxtx";
                                 #address-cells = <1>;
@@ -629,6 +695,7 @@
                                 compatible = "atmel,hsmci";
                                 reg = <0xfffd0000 0x600>;
                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
+                                pinctrl-names = "default";
                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
                                 dma-names = "rxtx";
                                 #address-cells = <1>;
@@ -727,6 +794,15 @@
                         };
                 };
 
+                fb0: fb@0x00500000 {
+                        compatible = "atmel,at91sam9g45-lcdc";
+                        reg = <0x00500000 0x1000>;
+                        interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_fb>;
+                        status = "disabled";
+                };
+
                 nand0: nand@40000000 {
                         compatible = "atmel,at91rm9200-nand";
                         #address-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index a4b00e5c61c0..7ff665a8c708 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -105,6 +105,14 @@
                                                          AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;   /* PD29 gpio WP pin pull up */
                                         };
                                 };
+
+                                pwm0 {
+                                        pinctrl_pwm_leds: pwm-led {
+                                                atmel,pins =
+                                                        <AT91_PIOD 0  AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PD0 periph B */
+                                                         AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PD31 periph B */
+                                        };
+                                };
                         };
 
                         spi0: spi@fffa4000{
@@ -121,6 +129,42 @@
                                 atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>;
                                 status = "okay";
                         };
+
+                        pwm0: pwm@fffb8000 {
+                                status = "okay";
+
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_pwm_leds>;
+                        };
+                };
+
+                fb0: fb@0x00500000 {
+                        display = <&display0>;
+                        status = "okay";
+
+                        display0: display {
+                                bits-per-pixel = <32>;
+                                atmel,lcdcon-backlight;
+                                atmel,dmacon = <0x1>;
+                                atmel,lcdcon2 = <0x80008002>;
+                                atmel,guard-time = <9>;
+                                atmel,lcd-wiring-mode = "RGB";
+
+                                display-timings {
+                                        native-mode = <&timing0>;
+                                        timing0: timing0 {
+                                                clock-frequency = <9000000>;
+                                                hactive = <480>;
+                                                vactive = <272>;
+                                                hback-porch = <1>;
+                                                hfront-porch = <1>;
+                                                vback-porch = <40>;
+                                                vfront-porch = <1>;
+                                                hsync-len = <45>;
+                                                vsync-len = <1>;
+                                        };
+                                };
+                        };
                 };
 
                 nand0: nand@40000000 {
@@ -165,16 +209,22 @@
                         gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
                         linux,default-trigger = "heartbeat";
                 };
+        };
+
+        pwmleds {
+                compatible = "pwm-leds";
 
                 d6 {
                         label = "d6";
-                        gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
+                        pwms = <&pwm0 3 5000 0>;
+                        max-brightness = <255>;
                         linux,default-trigger = "nand-disk";
                 };
 
                 d7 {
                         label = "d7";
-                        gpios = <&pioD 31 GPIO_ACTIVE_LOW>;
+                        pwms = <&pwm0 1 5000 0>;
+                        max-brightness = <255>;
                         linux,default-trigger = "mmc0";
                 };
         };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 6224f9fe2f2b..7248270a3ea6 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -33,6 +33,7 @@
                 i2c0 = &i2c0;
                 i2c1 = &i2c1;
                 ssc0 = &ssc0;
+                pwm0 = &pwm0;
         };
         cpus {
                 #address-cells = <0>;
@@ -542,6 +543,14 @@
                                 reg = <0xfffffe40 0x10>;
                                 status = "disabled";
                         };
+
+                        pwm0: pwm@f8034000 {
+                                compatible = "atmel,at91sam9rl-pwm";
+                                reg = <0xf8034000 0x300>;
+                                interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
+                                #pwm-cells = <3>;
+                                status = "disabled";
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 40267a116c3c..6e5e9cfc3c49 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -35,6 +35,7 @@
                 i2c1 = &i2c1;
                 i2c2 = &i2c2;
                 ssc0 = &ssc0;
+                pwm0 = &pwm0;
         };
         cpus {
                 #address-cells = <0>;
@@ -762,6 +763,14 @@
                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
                                 status = "disabled";
                         };
+
+                        pwm0: pwm@f8034000 {
+                                compatible = "atmel,at91sam9rl-pwm";
+                                reg = <0xf8034000 0x300>;
+                                interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
+                                #pwm-cells = <3>;
+                                status = "disabled";
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts
index 8349a248ecea..7a70f4ca502a 100644
--- a/arch/arm/boot/dts/dove-cubox.dts
+++ b/arch/arm/boot/dts/dove-cubox.dts
@@ -23,7 +23,7 @@
                 power {
                         label = "Power";
                         gpios = <&gpio0 18 1>;
-                        linux,default-trigger = "default-on";
+                        default-state = "keep";
                 };
         };
 
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 113a8bc7bee7..852db2860015 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -107,51 +107,29 @@
                                   0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800   /* CESA SRAM  2k */
                                   0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU  SRAM  2k */
 
-                        mbusc: mbus-ctrl@20000 {
-                                compatible = "marvell,mbus-controller";
-                                reg = <0x20000 0x80>, <0x800100 0x8>;
-                        };
-
-                        timer: timer@20300 {
-                                compatible = "marvell,orion-timer";
-                                reg = <0x20300 0x20>;
-                                interrupt-parent = <&bridge_intc>;
-                                interrupts = <1>, <2>;
+                        spi0: spi-ctrl@10600 {
+                                compatible = "marvell,orion-spi";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                cell-index = <0>;
+                                interrupts = <6>;
+                                reg = <0x10600 0x28>;
                                 clocks = <&core_clk 0>;
+                                pinctrl-0 = <&pmx_spi0>;
+                                pinctrl-names = "default";
+                                status = "disabled";
                         };
 
-                        intc: main-interrupt-ctrl@20200 {
-                                compatible = "marvell,orion-intc";
-                                interrupt-controller;
-                                #interrupt-cells = <1>;
-                                reg = <0x20200 0x10>, <0x20210 0x10>;
-                        };
-
-                        bridge_intc: bridge-interrupt-ctrl@20110 {
-                                compatible = "marvell,orion-bridge-intc";
-                                interrupt-controller;
-                                #interrupt-cells = <1>;
-                                reg = <0x20110 0x8>;
-                                interrupts = <0>;
-                                marvell,#interrupts = <5>;
-                        };
-
-                        core_clk: core-clocks@d0214 {
-                                compatible = "marvell,dove-core-clock";
-                                reg = <0xd0214 0x4>;
-                                #clock-cells = <1>;
-                        };
-
-                        gate_clk: clock-gating-ctrl@d0038 {
-                                compatible = "marvell,dove-gating-clock";
-                                reg = <0xd0038 0x4>;
+                        i2c0: i2c-ctrl@11000 {
+                                compatible = "marvell,mv64xxx-i2c";
+                                reg = <0x11000 0x20>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                interrupts = <11>;
+                                clock-frequency = <400000>;
+                                timeout-ms = <1000>;
                                 clocks = <&core_clk 0>;
-                                #clock-cells = <1>;
-                        };
-
-                        thermal: thermal-diode@d001c {
-                                compatible = "marvell,dove-thermal";
-                                reg = <0xd001c 0x0c>, <0xd005c 0x08>;
+                                status = "disabled";
                         };
 
                         uart0: serial@12000 {
@@ -192,34 +170,213 @@
                                 status = "disabled";
                         };
 
-                        gpio0: gpio-ctrl@d0400 {
-                                compatible = "marvell,orion-gpio";
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                reg = <0xd0400 0x20>;
-                                ngpios = <32>;
+                        spi1: spi-ctrl@14600 {
+                                compatible = "marvell,orion-spi";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                cell-index = <1>;
+                                interrupts = <5>;
+                                reg = <0x14600 0x28>;
+                                clocks = <&core_clk 0>;
+                                status = "disabled";
+                        };
+
+                        mbusc: mbus-ctrl@20000 {
+                                compatible = "marvell,mbus-controller";
+                                reg = <0x20000 0x80>, <0x800100 0x8>;
+                        };
+
+                        bridge_intc: bridge-interrupt-ctrl@20110 {
+                                compatible = "marvell,orion-bridge-intc";
                                 interrupt-controller;
-                                #interrupt-cells = <2>;
-                                interrupts = <12>, <13>, <14>, <60>;
+                                #interrupt-cells = <1>;
+                                reg = <0x20110 0x8>;
+                                interrupts = <0>;
+                                marvell,#interrupts = <5>;
                         };
 
-                        gpio1: gpio-ctrl@d0420 {
-                                compatible = "marvell,orion-gpio";
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                reg = <0xd0420 0x20>;
-                                ngpios = <32>;
+                        intc: main-interrupt-ctrl@20200 {
+                                compatible = "marvell,orion-intc";
                                 interrupt-controller;
-                                #interrupt-cells = <2>;
-                                interrupts = <61>;
+                                #interrupt-cells = <1>;
+                                reg = <0x20200 0x10>, <0x20210 0x10>;
                         };
 
-                        gpio2: gpio-ctrl@e8400 {
-                                compatible = "marvell,orion-gpio";
-                                #gpio-cells = <2>;
-                                gpio-controller;
-                                reg = <0xe8400 0x0c>;
-                                ngpios = <8>;
+                        timer: timer@20300 {
+                                compatible = "marvell,orion-timer";
+                                reg = <0x20300 0x20>;
+                                interrupt-parent = <&bridge_intc>;
+                                interrupts = <1>, <2>;
+                                clocks = <&core_clk 0>;
+                        };
+
+                        crypto: crypto-engine@30000 {
+                                compatible = "marvell,orion-crypto";
+                                reg = <0x30000 0x10000>,
+                                      <0xffffe000 0x800>;
+                                reg-names = "regs", "sram";
+                                interrupts = <31>;
+                                clocks = <&gate_clk 15>;
+                                status = "okay";
+                        };
+
+                        ehci0: usb-host@50000 {
+                                compatible = "marvell,orion-ehci";
+                                reg = <0x50000 0x1000>;
+                                interrupts = <24>;
+                                clocks = <&gate_clk 0>;
+                                status = "okay";
+                        };
+
+                        ehci1: usb-host@51000 {
+                                compatible = "marvell,orion-ehci";
+                                reg = <0x51000 0x1000>;
+                                interrupts = <25>;
+                                clocks = <&gate_clk 1>;
+                                status = "okay";
+                        };
+
+                        xor0: dma-engine@60800 {
+                                compatible = "marvell,orion-xor";
+                                reg = <0x60800 0x100
+                                       0x60a00 0x100>;
+                                clocks = <&gate_clk 23>;
+                                status = "okay";
+
+                                channel0 {
+                                        interrupts = <39>;
+                                        dmacap,memcpy;
+                                        dmacap,xor;
+                                };
+
+                                channel1 {
+                                        interrupts = <40>;
+                                        dmacap,memcpy;
+                                        dmacap,xor;
+                                };
+                        };
+
+                        xor1: dma-engine@60900 {
+                                compatible = "marvell,orion-xor";
+                                reg = <0x60900 0x100
+                                       0x60b00 0x100>;
+                                clocks = <&gate_clk 24>;
+                                status = "okay";
+
+                                channel0 {
+                                        interrupts = <42>;
+                                        dmacap,memcpy;
+                                        dmacap,xor;
+                                };
+
+                                channel1 {
+                                        interrupts = <43>;
+                                        dmacap,memcpy;
+                                        dmacap,xor;
+                                };
+                        };
+
+                        sdio1: sdio-host@90000 {
+                                compatible = "marvell,dove-sdhci";
+                                reg = <0x90000 0x100>;
+                                interrupts = <36>, <38>;
+                                clocks = <&gate_clk 9>;
+                                pinctrl-0 = <&pmx_sdio1>;
+                                pinctrl-names = "default";
+                                status = "disabled";
+                        };
+
+                        eth: ethernet-ctrl@72000 {
+                                compatible = "marvell,orion-eth";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                reg = <0x72000 0x4000>;
+                                clocks = <&gate_clk 2>;
+                                marvell,tx-checksum-limit = <1600>;
+                                status = "disabled";
+
+                                ethernet-port@0 {
+                                        device_type = "network";
+                                        compatible = "marvell,orion-eth-port";
+                                        reg = <0>;
+                                        interrupts = <29>;
+                                        /* overwrite MAC address in bootloader */
+                                        local-mac-address = [00 00 00 00 00 00];
+                                        phy-handle = <&ethphy>;
+                                };
+                        };
+
+                        mdio: mdio-bus@72004 {
+                                compatible = "marvell,orion-mdio";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                reg = <0x72004 0x84>;
+                                interrupts = <30>;
+                                clocks = <&gate_clk 2>;
+                                status = "disabled";
+
+                                ethphy: ethernet-phy {
+                                        device_type = "ethernet-phy";
+                                        /* set phy address in board file */
+                                };
+                        };
+
+                        sdio0: sdio-host@92000 {
+                                compatible = "marvell,dove-sdhci";
+                                reg = <0x92000 0x100>;
+                                interrupts = <35>, <37>;
+                                clocks = <&gate_clk 8>;
+                                pinctrl-0 = <&pmx_sdio0>;
+                                pinctrl-names = "default";
+                                status = "disabled";
+                        };
+
+                        sata0: sata-host@a0000 {
+                                compatible = "marvell,orion-sata";
+                                reg = <0xa0000 0x2400>;
+                                interrupts = <62>;
+                                clocks = <&gate_clk 3>;
+                                nr-ports = <1>;
+                                status = "disabled";
+                        };
+
+                        audio0: audio-controller@b0000 {
+                                compatible = "marvell,dove-audio";
+                                reg = <0xb0000 0x2210>;
+                                interrupts = <19>, <20>;
+                                clocks = <&gate_clk 12>;
+                                clock-names = "internal";
+                                status = "disabled";
+                        };
+
+                        audio1: audio-controller@b4000 {
+                                compatible = "marvell,dove-audio";
+                                reg = <0xb4000 0x2210>;
+                                interrupts = <21>, <22>;
+                                clocks = <&gate_clk 13>;
+                                clock-names = "internal";
+                                status = "disabled";
+                        };
+
+                        thermal: thermal-diode@d001c {
+                                compatible = "marvell,dove-thermal";
+                                reg = <0xd001c 0x0c>, <0xd005c 0x08>;
+                        };
+
+                        gate_clk: clock-gating-ctrl@d0038 {
+                                compatible = "marvell,dove-gating-clock";
+                                reg = <0xd0038 0x4>;
+                                clocks = <&core_clk 0>;
+                                #clock-cells = <1>;
+                        };
+
+                        pmu_intc: pmu-interrupt-ctrl@d0050 {
+                                compatible = "marvell,dove-pmu-intc";
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                reg = <0xd0050 0x8>;
+                                interrupts = <33>;
+                                marvell,#interrupts = <7>;
                         };
 
                         pinctrl: pin-ctrl@d0200 {
@@ -413,193 +570,47 @@
                                 };
                         };
 
-                        spi0: spi-ctrl@10600 {
-                                compatible = "marvell,orion-spi";
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                cell-index = <0>;
-                                interrupts = <6>;
-                                reg = <0x10600 0x28>;
-                                clocks = <&core_clk 0>;
-                                pinctrl-0 = <&pmx_spi0>;
-                                pinctrl-names = "default";
-                                status = "disabled";
-                        };
-
-                        spi1: spi-ctrl@14600 {
-                                compatible = "marvell,orion-spi";
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                cell-index = <1>;
-                                interrupts = <5>;
-                                reg = <0x14600 0x28>;
-                                clocks = <&core_clk 0>;
-                                status = "disabled";
-                        };
-
-                        i2c0: i2c-ctrl@11000 {
-                                compatible = "marvell,mv64xxx-i2c";
-                                reg = <0x11000 0x20>;
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                interrupts = <11>;
-                                clock-frequency = <400000>;
-                                timeout-ms = <1000>;
-                                clocks = <&core_clk 0>;
-                                status = "disabled";
-                        };
-
-                        ehci0: usb-host@50000 {
-                                compatible = "marvell,orion-ehci";
-                                reg = <0x50000 0x1000>;
-                                interrupts = <24>;
-                                clocks = <&gate_clk 0>;
-                                status = "okay";
-                        };
-
-                        ehci1: usb-host@51000 {
-                                compatible = "marvell,orion-ehci";
-                                reg = <0x51000 0x1000>;
-                                interrupts = <25>;
-                                clocks = <&gate_clk 1>;
-                                status = "okay";
-                        };
-
-                        sdio0: sdio-host@92000 {
-                                compatible = "marvell,dove-sdhci";
-                                reg = <0x92000 0x100>;
-                                interrupts = <35>, <37>;
-                                clocks = <&gate_clk 8>;
-                                pinctrl-0 = <&pmx_sdio0>;
-                                pinctrl-names = "default";
-                                status = "disabled";
+                        core_clk: core-clocks@d0214 {
+                                compatible = "marvell,dove-core-clock";
+                                reg = <0xd0214 0x4>;
+                                #clock-cells = <1>;
                         };
 
-                        sdio1: sdio-host@90000 {
-                                compatible = "marvell,dove-sdhci";
-                                reg = <0x90000 0x100>;
-                                interrupts = <36>, <38>;
-                                clocks = <&gate_clk 9>;
-                                pinctrl-0 = <&pmx_sdio1>;
-                                pinctrl-names = "default";
-                                status = "disabled";
+                        gpio0: gpio-ctrl@d0400 {
+                                compatible = "marvell,orion-gpio";
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                reg = <0xd0400 0x20>;
+                                ngpios = <32>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                                interrupts = <12>, <13>, <14>, <60>;
                         };
 
-                        sata0: sata-host@a0000 {
-                                compatible = "marvell,orion-sata";
-                                reg = <0xa0000 0x2400>;
-                                interrupts = <62>;
-                                clocks = <&gate_clk 3>;
-                                nr-ports = <1>;
-                                status = "disabled";
+                        gpio1: gpio-ctrl@d0420 {
+                                compatible = "marvell,orion-gpio";
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                reg = <0xd0420 0x20>;
+                                ngpios = <32>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                                interrupts = <61>;
                         };
 
                         rtc: real-time-clock@d8500 {
                                 compatible = "marvell,orion-rtc";
                                 reg = <0xd8500 0x20>;
+                                interrupt-parent = <&pmu_intc>;
+                                interrupts = <5>;
                         };
 
-                        crypto: crypto-engine@30000 {
-                                compatible = "marvell,orion-crypto";
-                                reg = <0x30000 0x10000>,
-                                      <0xffffe000 0x800>;
-                                reg-names = "regs", "sram";
-                                interrupts = <31>;
-                                clocks = <&gate_clk 15>;
-                                status = "okay";
-                        };
-
-                        xor0: dma-engine@60800 {
-                                compatible = "marvell,orion-xor";
-                                reg = <0x60800 0x100
-                                       0x60a00 0x100>;
-                                clocks = <&gate_clk 23>;
-                                status = "okay";
-
-                                channel0 {
-                                        interrupts = <39>;
-                                        dmacap,memcpy;
-                                        dmacap,xor;
-                                };
-
-                                channel1 {
-                                        interrupts = <40>;
-                                        dmacap,memcpy;
-                                        dmacap,xor;
-                                };
-                        };
-
-                        xor1: dma-engine@60900 {
-                                compatible = "marvell,orion-xor";
-                                reg = <0x60900 0x100
-                                       0x60b00 0x100>;
-                                clocks = <&gate_clk 24>;
-                                status = "okay";
-
-                                channel0 {
-                                        interrupts = <42>;
-                                        dmacap,memcpy;
-                                        dmacap,xor;
-                                };
-
-                                channel1 {
-                                        interrupts = <43>;
-                                        dmacap,memcpy;
-                                        dmacap,xor;
-                                };
-                        };
-
-                        mdio: mdio-bus@72004 {
-                                compatible = "marvell,orion-mdio";
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                reg = <0x72004 0x84>;
-                                interrupts = <30>;
-                                clocks = <&gate_clk 2>;
-                                status = "disabled";
-
-                                ethphy: ethernet-phy {
-                                        device-type = "ethernet-phy";
-                                        /* set phy address in board file */
-                                };
-                        };
-
-                        eth: ethernet-ctrl@72000 {
-                                compatible = "marvell,orion-eth";
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                reg = <0x72000 0x4000>;
-                                clocks = <&gate_clk 2>;
-                                marvell,tx-checksum-limit = <1600>;
-                                status = "disabled";
-
-                                ethernet-port@0 {
-                                        device_type = "network";
-                                        compatible = "marvell,orion-eth-port";
-                                        reg = <0>;
-                                        interrupts = <29>;
-                                        /* overwrite MAC address in bootloader */
-                                        local-mac-address = [00 00 00 00 00 00];
-                                        phy-handle = <&ethphy>;
-                                };
-                        };
-
-                        audio0: audio-controller@b0000 {
-                                compatible = "marvell,dove-audio";
-                                reg = <0xb0000 0x2210>;
-                                interrupts = <19>, <20>;
-                                clocks = <&gate_clk 12>;
-                                clock-names = "internal";
-                                status = "disabled";
-                        };
-
-                        audio1: audio-controller@b4000 {
-                                compatible = "marvell,dove-audio";
-                                reg = <0xb4000 0x2210>;
-                                interrupts = <21>, <22>;
-                                clocks = <&gate_clk 13>;
-                                clock-names = "internal";
-                                status = "disabled";
+                        gpio2: gpio-ctrl@e8400 {
+                                compatible = "marvell,orion-gpio";
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                reg = <0xe8400 0x0c>;
+                                ngpios = <8>;
                         };
                 };
         };
diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
index 861aa7d6fc7d..50ccd151091e 100644
--- a/arch/arm/boot/dts/emev2-kzm9d.dts
+++ b/arch/arm/boot/dts/emev2-kzm9d.dts
@@ -9,7 +9,10 @@
  */
 /dts-v1/;
 
-/include/ "emev2.dtsi"
+#include "emev2.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
         model = "EMEV2 KZM9D Board";
@@ -47,11 +50,46 @@
                 reg = <0x20000000 0x10000>;
                 phy-mode = "mii";
                 interrupt-parent = <&gpio0>;
-                interrupts = <1 1>;     /* active high */
+                interrupts = <1 IRQ_TYPE_EDGE_RISING>;
                 reg-io-width = <4>;
                 smsc,irq-active-high;
                 smsc,irq-push-pull;
                 vddvario-supply = <&reg_1p8v>;
                 vdd33a-supply = <&reg_3p3v>;
         };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                button@1 {
+                        debounce_interval = <50>;
+                        wakeup = <1>;
+                        label = "DSW2-1";
+                        linux,code = <KEY_1>;
+                        gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+                };
+                button@2 {
+                        debounce_interval = <50>;
+                        wakeup = <1>;
+                        label = "DSW2-2";
+                        linux,code = <KEY_2>;
+                        gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
+                };
+                button@3 {
+                        debounce_interval = <50>;
+                        wakeup = <1>;
+                        label = "DSW2-3";
+                        linux,code = <KEY_3>;
+                        gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+                };
+                button@4 {
+                        debounce_interval = <50>;
+                        wakeup = <1>;
+                        label = "DSW2-4";
+                        linux,code = <KEY_4>;
+                        gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
index 9063a4434d6a..e37985fa10e2 100644
--- a/arch/arm/boot/dts/emev2.dtsi
+++ b/arch/arm/boot/dts/emev2.dtsi
@@ -8,7 +8,8 @@
  * kind, whether express or implied.
  */
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
         compatible = "renesas,emev2";
@@ -48,44 +49,129 @@
 
         pmu {
                 compatible = "arm,cortex-a9-pmu";
-                interrupts = <0 120 4>,
-                             <0 121 4>;
+                interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 121 IRQ_TYPE_LEVEL_HIGH>;
+        };
+
+        smu@e0110000 {
+                compatible = "renesas,emev2-smu";
+                reg = <0xe0110000 0x10000>;
+                #address-cells = <2>;
+                #size-cells = <0>;
+
+                c32ki: c32ki {
+                        compatible = "fixed-clock";
+                        clock-frequency = <32768>;
+                        #clock-cells = <0>;
+                };
+                pll3_fo: pll3_fo {
+                        compatible = "fixed-factor-clock";
+                        clocks = <&c32ki>;
+                        clock-div = <1>;
+                        clock-mult = <7000>;
+                        #clock-cells = <0>;
+                };
+                usia_u0_sclkdiv: usia_u0_sclkdiv {
+                        compatible = "renesas,emev2-smu-clkdiv";
+                        reg = <0x610 0>;
+                        clocks = <&pll3_fo>;
+                        #clock-cells = <0>;
+                };
+                usib_u1_sclkdiv: usib_u1_sclkdiv {
+                        compatible = "renesas,emev2-smu-clkdiv";
+                        reg = <0x65c 0>;
+                        clocks = <&pll3_fo>;
+                        #clock-cells = <0>;
+                };
+                usib_u2_sclkdiv: usib_u2_sclkdiv {
+                        compatible = "renesas,emev2-smu-clkdiv";
+                        reg = <0x65c 16>;
+                        clocks = <&pll3_fo>;
+                        #clock-cells = <0>;
+                };
+                usib_u3_sclkdiv: usib_u3_sclkdiv {
+                        compatible = "renesas,emev2-smu-clkdiv";
+                        reg = <0x660 0>;
+                        clocks = <&pll3_fo>;
+                        #clock-cells = <0>;
+                };
+                usia_u0_sclk: usia_u0_sclk {
+                        compatible = "renesas,emev2-smu-gclk";
+                        reg = <0x4a0 1>;
+                        clocks = <&usia_u0_sclkdiv>;
+                        #clock-cells = <0>;
+                };
+                usib_u1_sclk: usib_u1_sclk {
+                        compatible = "renesas,emev2-smu-gclk";
+                        reg = <0x4b8 1>;
+                        clocks = <&usib_u1_sclkdiv>;
+                        #clock-cells = <0>;
+                };
+                usib_u2_sclk: usib_u2_sclk {
+                        compatible = "renesas,emev2-smu-gclk";
+                        reg = <0x4bc 1>;
+                        clocks = <&usib_u2_sclkdiv>;
+                        #clock-cells = <0>;
+                };
+                usib_u3_sclk: usib_u3_sclk {
+                        compatible = "renesas,emev2-smu-gclk";
+                        reg = <0x4c0 1>;
+                        clocks = <&usib_u3_sclkdiv>;
+                        #clock-cells = <0>;
+                };
+                sti_sclk: sti_sclk {
+                        compatible = "renesas,emev2-smu-gclk";
+                        reg = <0x528 1>;
+                        clocks = <&c32ki>;
+                        #clock-cells = <0>;
+                };
         };
 
         sti@e0180000 {
                 compatible = "renesas,em-sti";
                 reg = <0xe0180000 0x54>;
-                interrupts = <0 125 0>;
+                interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&sti_sclk>;
+                clock-names = "sclk";
         };
 
         uart@e1020000 {
                 compatible = "renesas,em-uart";
                 reg = <0xe1020000 0x38>;
-                interrupts = <0 8 0>;
+                interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&usia_u0_sclk>;
+                clock-names = "sclk";
         };
 
         uart@e1030000 {
                 compatible = "renesas,em-uart";
                 reg = <0xe1030000 0x38>;
-                interrupts = <0 9 0>;
+                interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&usib_u1_sclk>;
+                clock-names = "sclk";
         };
 
         uart@e1040000 {
                 compatible = "renesas,em-uart";
                 reg = <0xe1040000 0x38>;
-                interrupts = <0 10 0>;
+                interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&usib_u2_sclk>;
+                clock-names = "sclk";
         };
 
         uart@e1050000 {
                 compatible = "renesas,em-uart";
                 reg = <0xe1050000 0x38>;
-                interrupts = <0 11 0>;
+                interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&usib_u3_sclk>;
+                clock-names = "sclk";
         };
 
         gpio0: gpio@e0050000 {
                 compatible = "renesas,em-gio";
                 reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
-                interrupts = <0 67 0>, <0 68 0>;
+                interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 68 IRQ_TYPE_LEVEL_HIGH>;
                 gpio-controller;
                 #gpio-cells = <2>;
                 ngpios = <32>;
@@ -95,7 +181,8 @@
         gpio1: gpio@e0050080 {
                 compatible = "renesas,em-gio";
                 reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
-                interrupts = <0 69 0>, <0 70 0>;
+                interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 70 IRQ_TYPE_LEVEL_HIGH>;
                 gpio-controller;
                 #gpio-cells = <2>;
                 ngpios = <32>;
@@ -105,7 +192,8 @@
         gpio2: gpio@e0050100 {
                 compatible = "renesas,em-gio";
                 reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
-                interrupts = <0 71 0>, <0 72 0>;
+                interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 72 IRQ_TYPE_LEVEL_HIGH>;
                 gpio-controller;
                 #gpio-cells = <2>;
                 ngpios = <32>;
@@ -115,7 +203,8 @@
         gpio3: gpio@e0050180 {
                 compatible = "renesas,em-gio";
                 reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
-                interrupts = <0 73 0>, <0 74 0>;
+                interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 74 IRQ_TYPE_LEVEL_HIGH>;
                 gpio-controller;
                 #gpio-cells = <2>;
                 ngpios = <32>;
@@ -125,7 +214,8 @@
         gpio4: gpio@e0050200 {
                 compatible = "renesas,em-gio";
                 reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
-                interrupts = <0 75 0>, <0 76 0>;
+                interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 76 IRQ_TYPE_LEVEL_HIGH>;
                 gpio-controller;
                 #gpio-cells = <2>;
                 ngpios = <31>;
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index a73eeb5f258f..08452e183b57 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -85,21 +85,21 @@
                 reg = <0x10023CE0 0x20>;
         };
 
-        gic:interrupt-controller@10490000 {
+        gic: interrupt-controller@10490000 {
                 compatible = "arm,cortex-a9-gic";
                 #interrupt-cells = <3>;
                 interrupt-controller;
                 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
         };
 
-        combiner:interrupt-controller@10440000 {
+        combiner: interrupt-controller@10440000 {
                 compatible = "samsung,exynos4210-combiner";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0x10440000 0x1000>;
         };
 
-        sys_reg: sysreg {
+        sys_reg: syscon@10010000 {
                 compatible = "samsung,exynos4-sysreg", "syscon";
                 reg = <0x10010000 0x400>;
         };
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index 1a12fb23767c..2aa13cb3bbed 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -313,7 +313,7 @@
         display-timings {
                 native-mode = <&timing0>;
                 timing0: timing {
-                        clock-frequency = <50000>;
+                        clock-frequency = <47500000>;
                         hactive = <1024>;
                         vactive = <600>;
                         hfront-porch = <64>;
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 057d6829d319..48ecd7a755ab 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -36,11 +36,11 @@
                 reg = <0x10023CA0 0x20>;
         };
 
-        gic:interrupt-controller@10490000 {
+        gic: interrupt-controller@10490000 {
                 cpu-offset = <0x8000>;
         };
 
-        combiner:interrupt-controller@10440000 {
+        combiner: interrupt-controller@10440000 {
                 samsung,combiner-nr = <16>;
                 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
                              <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
@@ -51,24 +51,21 @@
         mct@10050000 {
                 compatible = "samsung,exynos4210-mct";
                 reg = <0x10050000 0x800>;
-                interrupt-controller;
-                #interrups-cells = <2>;
                 interrupt-parent = <&mct_map>;
-                interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
-                             <4 0>, <5 0>;
+                interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
                 clocks = <&clock 3>, <&clock 344>;
                 clock-names = "fin_pll", "mct";
 
                 mct_map: mct-map {
-                        #interrupt-cells = <2>;
+                        #interrupt-cells = <1>;
                         #address-cells = <0>;
                         #size-cells = <0>;
-                        interrupt-map = <0x0 0 &gic 0 57 0>,
-                                        <0x1 0 &gic 0 69 0>,
-                                        <0x2 0 &combiner 12 6>,
-                                        <0x3 0 &combiner 12 7>,
-                                        <0x4 0 &gic 0 42 0>,
-                                        <0x5 0 &gic 0 48 0>;
+                        interrupt-map = <0 &gic 0 57 0>,
+                                        <1 &gic 0 69 0>,
+                                        <2 &combiner 12 6>,
+                                        <3 &combiner 12 7>,
+                                        <4 &gic 0 42 0>,
+                                        <5 &gic 0 48 0>;
                 };
         };
 
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index 6f34d7f6ba7e..94a43f9a05e2 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -22,7 +22,7 @@
 / {
         compatible = "samsung,exynos4212";
 
-        gic:interrupt-controller@10490000 {
+        gic: interrupt-controller@10490000 {
                 cpu-offset = <0x8000>;
         };
 
@@ -34,26 +34,4 @@
                              <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
                              <0 107 0>, <0 108 0>;
         };
-
-        mct@10050000 {
-                compatible = "samsung,exynos4412-mct";
-                reg = <0x10050000 0x800>;
-                interrupt-controller;
-                #interrups-cells = <2>;
-                interrupt-parent = <&mct_map>;
-                interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
-                             <4 0>, <5 0>;
-
-                mct_map: mct-map {
-                        #interrupt-cells = <2>;
-                        #address-cells = <0>;
-                        #size-cells = <0>;
-                        interrupt-map = <0x0 0 &gic 0 57 0>,
-                                        <0x1 0 &combiner 12 5>,
-                                        <0x2 0 &combiner 12 6>,
-                                        <0x3 0 &combiner 12 7>,
-                                        <0x4 0 &gic 1 12 0>,
-                                        <0x5 0 &gic 1 12 0>;
-                };
-        };
 };
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 46c678ee119c..8aad5f72ced7 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -38,9 +38,7 @@
                 };
         };
 
-        mshc@12550000 {
-                #address-cells = <1>;
-                #size-cells = <0>;
+        mmc@12550000 {
                 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
                 pinctrl-names = "default";
                 vmmc-supply = <&ldo20_reg &buck8_reg>;
@@ -49,7 +47,6 @@
                 num-slots = <1>;
                 supports-highspeed;
                 broken-cd;
-                fifo-depth = <0x80>;
                 card-detect-delay = <200>;
                 samsung,dw-mshc-ciu-div = <3>;
                 samsung,dw-mshc-sdr-timing = <2 3>;
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index d65984c440f6..6bc053924e9e 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -122,9 +122,7 @@
                 status = "okay";
         };
 
-        mshc@12550000 {
-                #address-cells = <1>;
-                #size-cells = <0>;
+        mmc@12550000 {
                 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
                 pinctrl-names = "default";
                 status = "okay";
@@ -132,7 +130,6 @@
                 num-slots = <1>;
                 supports-highspeed;
                 broken-cd;
-                fifo-depth = <0x80>;
                 card-detect-delay = <200>;
                 samsung,dw-mshc-ciu-div = <3>;
                 samsung,dw-mshc-sdr-timing = <2 3>;
@@ -159,7 +156,7 @@
         display-timings {
                 native-mode = <&timing0>;
                 timing0: timing {
-                        clock-frequency = <50000>;
+                        clock-frequency = <47500000>;
                         hactive = <1024>;
                         vactive = <600>;
                         hfront-porch = <64>;
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index fb7b9ae5f399..890ad275cb85 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -442,13 +442,25 @@
                 };
         };
 
-        sdhci@12510000 {
-                bus-width = <8>;
+        mmc@12550000 {
+                num-slots = <1>;
+                supports-highspeed;
+                broken-cd;
                 non-removable;
-                pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
-                pinctrl-names = "default";
+                card-detect-delay = <200>;
                 vmmc-supply = <&vemmc_reg>;
+                clock-frequency = <400000000>;
+                samsung,dw-mshc-ciu-div = <0>;
+                samsung,dw-mshc-sdr-timing = <2 3>;
+                samsung,dw-mshc-ddr-timing = <1 2>;
+                pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
+                pinctrl-names = "default";
                 status = "okay";
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <8>;
+                };
         };
 
         serial@13800000 {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index e743e677a9e2..87b339c739de 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -22,7 +22,7 @@
 / {
         compatible = "samsung,exynos4412";
 
-        gic:interrupt-controller@10490000 {
+        gic: interrupt-controller@10490000 {
                 cpu-offset = <0x4000>;
         };
 
@@ -35,37 +35,4 @@
                              <0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>;
         };
 
-        mct@10050000 {
-                compatible = "samsung,exynos4412-mct";
-                reg = <0x10050000 0x800>;
-                interrupt-controller;
-                #interrups-cells = <2>;
-                interrupt-parent = <&mct_map>;
-                interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
-                             <4 0>, <5 0>, <6 0>, <7 0>;
-                clocks = <&clock 3>, <&clock 344>;
-                clock-names = "fin_pll", "mct";
-
-                mct_map: mct-map {
-                        #interrupt-cells = <2>;
-                        #address-cells = <0>;
-                        #size-cells = <0>;
-                        interrupt-map = <0x0 0 &gic 0 57 0>,
-                                        <0x1 0 &combiner 12 5>,
-                                        <0x2 0 &combiner 12 6>,
-                                        <0x3 0 &combiner 12 7>,
-                                        <0x4 0 &gic 1 12 0>,
-                                        <0x5 0 &gic 1 12 0>,
-                                        <0x6 0 &gic 1 12 0>,
-                                        <0x7 0 &gic 1 12 0>;
-                };
-        };
-
-        mshc@12550000 {
-                compatible = "samsung,exynos4412-dw-mshc";
-                reg = <0x12550000 0x1000>;
-                interrupts = <0 77 0>;
-                #address-cells = <1>;
-                #size-cells = <0>;
-        };
 };
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index ad531fe6ab95..5c412aa14738 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -28,6 +28,7 @@
                 pinctrl3 = &pinctrl_3;
                 fimc-lite0 = &fimc_lite_0;
                 fimc-lite1 = &fimc_lite_1;
+                mshc0 = &mshc_0;
         };
 
         pd_isp: isp-power-domain@10023CA0 {
@@ -41,6 +42,26 @@
                 #clock-cells = <1>;
         };
 
+        mct@10050000 {
+                compatible = "samsung,exynos4412-mct";
+                reg = <0x10050000 0x800>;
+                interrupt-parent = <&mct_map>;
+                interrupts = <0>, <1>, <2>, <3>, <4>;
+                clocks = <&clock 3>, <&clock 344>;
+                clock-names = "fin_pll", "mct";
+
+                mct_map: mct-map {
+                        #interrupt-cells = <1>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-map = <0 &gic 0 57 0>,
+                                        <1 &combiner 12 5>,
+                                        <2 &combiner 12 6>,
+                                        <3 &combiner 12 7>,
+                                        <4 &gic 1 12 0>;
+                };
+        };
+
         pinctrl_0: pinctrl@11400000 {
                 compatible = "samsung,exynos4x12-pinctrl";
                 reg = <0x11400000 0x1000>;
@@ -176,4 +197,16 @@
                         };
                 };
         };
+
+        mshc_0: mmc@12550000 {
+                compatible = "samsung,exynos4412-dw-mshc";
+                reg = <0x12550000 0x1000>;
+                interrupts = <0 77 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                fifo-depth = <0x80>;
+                clocks = <&clock 301>, <&clock 149>;
+                clock-names = "biu", "ciu";
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 074739d39e2d..258dca441f36 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -23,7 +23,7 @@
                 reg = <0x10000000 0x100>;
         };
 
-        combiner:interrupt-controller@10440000 {
+        combiner: interrupt-controller@10440000 {
                 compatible = "samsung,exynos4210-combiner";
                 #interrupt-cells = <2>;
                 interrupt-controller;
@@ -39,7 +39,7 @@
                                 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
         };
 
-        gic:interrupt-controller@10481000 {
+        gic: interrupt-controller@10481000 {
                 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
                 #interrupt-cells = <3>;
                 interrupt-controller;
@@ -50,27 +50,6 @@
                 interrupts = <1 9 0xf04>;
         };
 
-        dwmmc_0: dwmmc0@12200000 {
-                compatible = "samsung,exynos5250-dw-mshc";
-                interrupts = <0 75 0>;
-                #address-cells = <1>;
-                #size-cells = <0>;
-        };
-
-        dwmmc_1: dwmmc1@12210000 {
-                compatible = "samsung,exynos5250-dw-mshc";
-                interrupts = <0 76 0>;
-                #address-cells = <1>;
-                #size-cells = <0>;
-        };
-
-        dwmmc_2: dwmmc2@12220000 {
-                compatible = "samsung,exynos5250-dw-mshc";
-                interrupts = <0 77 0>;
-                #address-cells = <1>;
-                #size-cells = <0>;
-        };
-
         serial@12C00000 {
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x12C00000 0x100>;
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 684527087aa4..b42e658876e5 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -34,6 +34,7 @@
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <20000>;
                 samsung,i2c-slave-addr = <0x66>;
+                status = "okay";
 
                 s5m8767_pmic@66 {
                         compatible = "samsung,s5m8767-pmic";
@@ -266,7 +267,7 @@
 
                                 buck2_reg: BUCK2 {
                                         regulator-name = "vdd_arm";
-                                        regulator-min-microvolt = <925000>;
+                                        regulator-min-microvolt = <912500>;
                                         regulator-max-microvolt = <1300000>;
                                         regulator-always-on;
                                         regulator-boot-on;
@@ -302,11 +303,13 @@
                                 buck7_reg: BUCK7 {
                                         regulator-name = "PVDD_BUCK7";
                                         regulator-always-on;
+                                        op_mode = <1>;
                                 };
 
                                 buck8_reg: BUCK8 {
                                         regulator-name = "PVDD_BUCK8";
                                         regulator-always-on;
+                                        op_mode = <1>;
                                 };
 
                                 buck9_reg: BUCK9 {
@@ -319,11 +322,9 @@
                 };
         };
 
-        i2c@12C70000 {
-                status = "disabled";
-        };
-
         i2c@12C80000 {
+                status = "okay";
+
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <66000>;
                 samsung,i2c-slave-addr = <0x50>;
@@ -335,7 +336,10 @@
         };
 
         i2c@12C90000 {
+                status = "okay";
+
                 wm1811a@1a {
+
                         compatible = "wlf,wm1811";
                         reg = <0x1a>;
 
@@ -353,23 +357,9 @@
                 };
         };
 
-        i2c@12CA0000 {
-                status = "disabled";
-        };
-
-        i2c@12CB0000 {
-                status = "disabled";
-        };
-
-        i2c@12CC0000 {
-                status = "disabled";
-        };
-
-        i2c@12CD0000 {
-                status = "disabled";
-        };
-
         i2c@12CE0000 {
+                status = "okay";
+
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <66000>;
                 samsung,i2c-slave-addr = <0x38>;
@@ -380,15 +370,11 @@
                 };
         };
 
-        i2c@121D0000 {
-                status = "disabled";
-        };
-
-        dwmmc_0: dwmmc0@12200000 {
+        mmc_0: mmc@12200000 {
+                status = "okay";
                 num-slots = <1>;
                 supports-highspeed;
                 broken-cd;
-                fifo-depth = <0x80>;
                 card-detect-delay = <200>;
                 samsung,dw-mshc-ciu-div = <3>;
                 samsung,dw-mshc-sdr-timing = <2 3>;
@@ -403,14 +389,10 @@
                 };
         };
 
-        dwmmc_1: dwmmc1@12210000 {
-                status = "disabled";
-        };
-
-        dwmmc_2: dwmmc2@12220000 {
+        mmc_2: mmc@12220000 {
+                status = "okay";
                 num-slots = <1>;
                 supports-highspeed;
-                fifo-depth = <0x80>;
                 card-detect-delay = <200>;
                 samsung,dw-mshc-ciu-div = <3>;
                 samsung,dw-mshc-sdr-timing = <2 3>;
@@ -426,26 +408,10 @@
                 };
         };
 
-        dwmmc_3: dwmmc3@12230000 {
-                status = "disabled";
-        };
-
         i2s0: i2s@03830000 {
                 status = "okay";
         };
 
-        spi_0: spi@12d20000 {
-                status = "disabled";
-        };
-
-        spi_1: spi@12d30000 {
-                status = "disabled";
-        };
-
-        spi_2: spi@12d40000 {
-                status = "disabled";
-        };
-
         gpio_keys {
                 compatible = "gpio-keys";
 
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/exynos5250-cros-common.dtsi
index 9b186ac06c8b..9a61494f45f5 100644
--- a/arch/arm/boot/dts/cros5250-common.dtsi
+++ b/arch/arm/boot/dts/exynos5250-cros-common.dtsi
@@ -37,6 +37,7 @@
         };
 
         i2c@12C60000 {
+                status = "okay";
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <378000>;
 
@@ -185,6 +186,7 @@
         };
 
         i2c@12C70000 {
+                status = "okay";
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <378000>;
 
@@ -198,6 +200,7 @@
         };
 
         i2c@12C80000 {
+                status = "okay";
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <66000>;
 
@@ -208,30 +211,31 @@
         };
 
         i2c@12C90000 {
+                status = "okay";
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <66000>;
         };
 
         i2c@12CA0000 {
+                status = "okay";
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <66000>;
         };
 
         i2c@12CB0000 {
+                status = "okay";
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <66000>;
         };
 
-        i2c@12CC0000 {
-                status = "disabled";
-        };
-
         i2c@12CD0000 {
+                status = "okay";
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <66000>;
         };
 
         i2c@12CE0000 {
+                status = "okay";
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <378000>;
 
@@ -241,11 +245,10 @@
                 };
         };
 
-        dwmmc0@12200000 {
+        mmc@12200000 {
                 num-slots = <1>;
                 supports-highspeed;
                 broken-cd;
-                fifo-depth = <0x80>;
                 card-detect-delay = <200>;
                 samsung,dw-mshc-ciu-div = <3>;
                 samsung,dw-mshc-sdr-timing = <2 3>;
@@ -259,14 +262,9 @@
                 };
         };
 
-        dwmmc1@12210000 {
-                status = "disabled";
-        };
-
-        dwmmc2@12220000 {
+        mmc@12220000 {
                 num-slots = <1>;
                 supports-highspeed;
-                fifo-depth = <0x80>;
                 card-detect-delay = <200>;
                 samsung,dw-mshc-ciu-div = <3>;
                 samsung,dw-mshc-sdr-timing = <2 3>;
@@ -281,11 +279,10 @@
                 };
         };
 
-        dwmmc3@12230000 {
+        mmc@12230000 {
                 num-slots = <1>;
                 supports-highspeed;
                 broken-cd;
-                fifo-depth = <0x80>;
                 card-detect-delay = <200>;
                 samsung,dw-mshc-ciu-div = <3>;
                 samsung,dw-mshc-sdr-timing = <2 3>;
@@ -298,19 +295,12 @@
                 };
         };
 
-        spi_0: spi@12d20000 {
-                status = "disabled";
-        };
-
         spi_1: spi@12d30000 {
+                status = "okay";
                 samsung,spi-src-clk = <0>;
                 num-cs = <1>;
         };
 
-        spi_2: spi@12d40000 {
-                status = "disabled";
-        };
-
         hdmi {
                 hpd-gpio = <&gpx3 7 0>;
         };
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index f86d56760a45..3e69837c435c 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,7 @@
         i2c@12C60000 {
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <20000>;
+                status = "okay";
 
                 eeprom@50 {
                         compatible = "samsung,s524ad0xd1";
@@ -37,7 +38,7 @@
                 };
         };
 
-        vdd:fixed-regulator@0 {
+        vdd: fixed-regulator@0 {
                 compatible = "regulator-fixed";
                 regulator-name = "vdd-supply";
                 regulator-min-microvolt = <1800000>;
@@ -45,7 +46,7 @@
                 regulator-always-on;
         };
 
-        dbvdd:fixed-regulator@1 {
+        dbvdd: fixed-regulator@1 {
                 compatible = "regulator-fixed";
                 regulator-name = "dbvdd-supply";
                 regulator-min-microvolt = <3300000>;
@@ -53,7 +54,7 @@
                 regulator-always-on;
         };
 
-        spkvdd:fixed-regulator@2 {
+        spkvdd: fixed-regulator@2 {
                 compatible = "regulator-fixed";
                 regulator-name = "spkvdd-supply";
                 regulator-min-microvolt = <5000000>;
@@ -64,6 +65,7 @@
         i2c@12C70000 {
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <20000>;
+                status = "okay";
 
                 eeprom@51 {
                         compatible = "samsung,s524ad0xd1";
@@ -77,6 +79,9 @@
                         gpio-controller;
                         #gpio-cells = <2>;
 
+                        clocks = <&codec_mclk>;
+                        clock-names = "MCLK1";
+
                         AVDD2-supply = <&vdd>;
                         CPVDD-supply = <&vdd>;
                         DBVDD-supply = <&dbvdd>;
@@ -89,6 +94,7 @@
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <40000>;
                 samsung,i2c-slave-addr = <0x38>;
+                status = "okay";
 
                 sata-phy {
                         compatible = "samsung,sata-phy";
@@ -103,6 +109,7 @@
         i2c@12C80000 {
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <66000>;
+                status = "okay";
 
                 hdmiddc@50 {
                         compatible = "samsung,exynos4210-hdmiddc";
@@ -110,29 +117,10 @@
                 };
         };
 
-        i2c@12C90000 {
-                status = "disabled";
-        };
-
-        i2c@12CA0000 {
-                status = "disabled";
-        };
-
-        i2c@12CB0000 {
-                status = "disabled";
-        };
-
-        i2c@12CC0000 {
-                status = "disabled";
-        };
-
-        i2c@12CD0000 {
-                status = "disabled";
-        };
-
         i2c@12CE0000 {
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-max-bus-freq = <66000>;
+                status = "okay";
 
                 hdmiphy@38 {
                         compatible = "samsung,exynos4212-hdmiphy";
@@ -140,11 +128,11 @@
                 };
         };
 
-        dwmmc0@12200000 {
+        mmc@12200000 {
+                status = "okay";
                 num-slots = <1>;
                 supports-highspeed;
                 broken-cd;
-                fifo-depth = <0x80>;
                 card-detect-delay = <200>;
                 samsung,dw-mshc-ciu-div = <3>;
                 samsung,dw-mshc-sdr-timing = <2 3>;
@@ -158,14 +146,10 @@
                 };
         };
 
-        dwmmc1@12210000 {
-                status = "disabled";
-        };
-
-        dwmmc2@12220000 {
+        mmc@12220000 {
+                status = "okay";
                 num-slots = <1>;
                 supports-highspeed;
-                fifo-depth = <0x80>;
                 card-detect-delay = <200>;
                 samsung,dw-mshc-ciu-div = <3>;
                 samsung,dw-mshc-sdr-timing = <2 3>;
@@ -180,15 +164,13 @@
                 };
         };
 
-        dwmmc3@12230000 {
-                status = "disabled";
-        };
-
         spi_0: spi@12d20000 {
                 status = "disabled";
         };
 
         spi_1: spi@12d30000 {
+                status = "okay";
+
                 w25q80bw@0 {
                         #address-cells = <1>;
                         #size-cells = <1>;
@@ -214,10 +196,6 @@
                 };
         };
 
-        spi_2: spi@12d40000 {
-                status = "disabled";
-        };
-
         hdmi {
                 hpd-gpio = <&gpx3 7 0>;
         };
@@ -279,5 +257,11 @@
                         compatible = "samsung,clock-xxti";
                         clock-frequency = <24000000>;
                 };
+
+                codec_mclk: codec-mclk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <16934000>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index fd711e245e8d..7e45eea2d78f 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -10,7 +10,7 @@
 
 /dts-v1/;
 #include "exynos5250.dtsi"
-#include "cros5250-common.dtsi"
+#include "exynos5250-cros-common.dtsi"
 
 / {
         model = "Google Snow";
@@ -85,7 +85,7 @@
                                         keypad,num-rows = <8>;
                                         keypad,num-columns = <13>;
                                         google,needs-ghost-filter;
-                                        linux,keymap = <0x0001003a      /* CAPSLK */
+                                        linux,keymap = <0x0001007d      /* L_META */
                                                         0x0002003b      /* F1 */
                                                         0x00030030      /* B */
                                                         0x00040044      /* F10 */
@@ -130,6 +130,7 @@
                                                         0x04060024      /* J */
                                                         0x04080027      /* ; */
                                                         0x04090026      /* L */
+                                                        0x040a002b      /* \ */
                                                         0x040b001c      /* ENTER */
 
                                                         0x0501002c      /* Z */
@@ -171,11 +172,20 @@
                 };
         };
 
+        mmc@12200000 {
+                status = "okay";
+        };
+
+        mmc@12220000 {
+                status = "okay";
+        };
+
         /*
          * On Snow we've got SIP WiFi and so can keep drive strengths low to
          * reduce EMI.
          */
-        dwmmc3@12230000 {
+        mmc@12230000 {
+                status = "okay";
                 slot@0 {
                         pinctrl-names = "default";
                         pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9db5047812f3..c341e55205cd 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -33,10 +33,10 @@
                 gsc1 = &gsc_1;
                 gsc2 = &gsc_2;
                 gsc3 = &gsc_3;
-                mshc0 = &dwmmc_0;
-                mshc1 = &dwmmc_1;
-                mshc2 = &dwmmc_2;
-                mshc3 = &dwmmc_3;
+                mshc0 = &mmc_0;
+                mshc1 = &mmc_1;
+                mshc2 = &mmc_2;
+                mshc3 = &mmc_3;
                 i2c0 = &i2c_0;
                 i2c1 = &i2c_1;
                 i2c2 = &i2c_2;
@@ -60,11 +60,13 @@
                         device_type = "cpu";
                         compatible = "arm,cortex-a15";
                         reg = <0>;
+                        clock-frequency = <1700000000>;
                 };
                 cpu@1 {
                         device_type = "cpu";
                         compatible = "arm,cortex-a15";
                         reg = <1>;
+                        clock-frequency = <1700000000>;
                 };
         };
 
@@ -242,6 +244,7 @@
                 clock-names = "i2c";
                 pinctrl-names = "default";
                 pinctrl-0 = <&i2c0_bus>;
+                status = "disabled";
         };
 
         i2c_1: i2c@12C70000 {
@@ -254,6 +257,7 @@
                 clock-names = "i2c";
                 pinctrl-names = "default";
                 pinctrl-0 = <&i2c1_bus>;
+                status = "disabled";
         };
 
         i2c_2: i2c@12C80000 {
@@ -266,6 +270,7 @@
                 clock-names = "i2c";
                 pinctrl-names = "default";
                 pinctrl-0 = <&i2c2_bus>;
+                status = "disabled";
         };
 
         i2c_3: i2c@12C90000 {
@@ -278,6 +283,7 @@
                 clock-names = "i2c";
                 pinctrl-names = "default";
                 pinctrl-0 = <&i2c3_bus>;
+                status = "disabled";
         };
 
         i2c_4: i2c@12CA0000 {
@@ -290,6 +296,7 @@
                 clock-names = "i2c";
                 pinctrl-names = "default";
                 pinctrl-0 = <&i2c4_bus>;
+                status = "disabled";
         };
 
         i2c_5: i2c@12CB0000 {
@@ -302,6 +309,7 @@
                 clock-names = "i2c";
                 pinctrl-names = "default";
                 pinctrl-0 = <&i2c5_bus>;
+                status = "disabled";
         };
 
         i2c_6: i2c@12CC0000 {
@@ -314,6 +322,7 @@
                 clock-names = "i2c";
                 pinctrl-names = "default";
                 pinctrl-0 = <&i2c6_bus>;
+                status = "disabled";
         };
 
         i2c_7: i2c@12CD0000 {
@@ -326,6 +335,7 @@
                 clock-names = "i2c";
                 pinctrl-names = "default";
                 pinctrl-0 = <&i2c7_bus>;
+                status = "disabled";
         };
 
         i2c_8: i2c@12CE0000 {
@@ -336,6 +346,7 @@
                 #size-cells = <0>;
                 clocks = <&clock 302>;
                 clock-names = "i2c";
+                status = "disabled";
         };
 
         i2c@121D0000 {
@@ -345,10 +356,12 @@
                 #size-cells = <0>;
                 clocks = <&clock 288>;
                 clock-names = "i2c";
+                status = "disabled";
         };
 
         spi_0: spi@12d20000 {
                 compatible = "samsung,exynos4210-spi";
+                status = "disabled";
                 reg = <0x12d20000 0x100>;
                 interrupts = <0 66 0>;
                 dmas = <&pdma0 5
@@ -364,6 +377,7 @@
 
         spi_1: spi@12d30000 {
                 compatible = "samsung,exynos4210-spi";
+                status = "disabled";
                 reg = <0x12d30000 0x100>;
                 interrupts = <0 67 0>;
                 dmas = <&pdma1 5
@@ -379,6 +393,7 @@
 
         spi_2: spi@12d40000 {
                 compatible = "samsung,exynos4210-spi";
+                status = "disabled";
                 reg = <0x12d40000 0x100>;
                 interrupts = <0 68 0>;
                 dmas = <&pdma0 7
@@ -392,25 +407,43 @@
                 pinctrl-0 = <&spi2_bus>;
         };
 
-        dwmmc_0: dwmmc0@12200000 {
+        mmc_0: mmc@12200000 {
+                compatible = "samsung,exynos5250-dw-mshc";
+                interrupts = <0 75 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
                 reg = <0x12200000 0x1000>;
                 clocks = <&clock 280>, <&clock 139>;
                 clock-names = "biu", "ciu";
+                fifo-depth = <0x80>;
+                status = "disabled";
         };
 
-        dwmmc_1: dwmmc1@12210000 {
+        mmc_1: mmc@12210000 {
+                compatible = "samsung,exynos5250-dw-mshc";
+                interrupts = <0 76 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
                 reg = <0x12210000 0x1000>;
                 clocks = <&clock 281>, <&clock 140>;
                 clock-names = "biu", "ciu";
+                fifo-depth = <0x80>;
+                status = "disabled";
         };
 
-        dwmmc_2: dwmmc2@12220000 {
+        mmc_2: mmc@12220000 {
+                compatible = "samsung,exynos5250-dw-mshc";
+                interrupts = <0 77 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
                 reg = <0x12220000 0x1000>;
                 clocks = <&clock 282>, <&clock 141>;
                 clock-names = "biu", "ciu";
+                fifo-depth = <0x80>;
+                status = "disabled";
         };
 
-        dwmmc_3: dwmmc3@12230000 {
+        mmc_3: mmc@12230000 {
                 compatible = "samsung,exynos5250-dw-mshc";
                 reg = <0x12230000 0x1000>;
                 interrupts = <0 78 0>;
@@ -418,6 +451,8 @@
                 #size-cells = <0>;
                 clocks = <&clock 283>, <&clock 142>;
                 clock-names = "biu", "ciu";
+                fifo-depth = <0x80>;
+                status = "disabled";
         };
 
         i2s0: i2s@03830000 {
@@ -526,6 +561,15 @@
                 };
         };
 
+        pwm: pwm@12dd0000 {
+                compatible = "samsung,exynos4210-pwm";
+                reg = <0x12dd0000 0x100>;
+                samsung,pwm-outputs = <0>, <1>, <2>, <3>;
+                #pwm-cells = <3>;
+                clocks = <&clock 311>;
+                clock-names = "timers";
+        };
+
         amba {
                 #address-cells = <1>;
                 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index e695aba5f73c..e62c8eb57438 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -64,7 +64,7 @@
                         samsung,pins = "gpx0-7";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <0>;
-                        samaung,pin-drv = <0>;
+                        samsung,pin-drv = <0>;
                 };
         };
 
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index 79524c74c603..fb5a1e25c632 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -31,6 +31,39 @@
                 };
         };
 
+        mmc@12200000 {
+                status = "okay";
+                broken-cd;
+                supports-highspeed;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <0 4>;
+                samsung,dw-mshc-ddr-timing = <0 2>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <8>;
+                };
+        };
+
+        mmc@12220000 {
+                status = "okay";
+                supports-highspeed;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3>;
+                samsung,dw-mshc-ddr-timing = <1 2>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <4>;
+                };
+        };
+
         dp-controller@145B0000 {
                 pinctrl-names = "default";
                 pinctrl-0 = <&dp_hpd>;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06cb3d3a..11dd202c54bb 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -22,6 +22,9 @@
         compatible = "samsung,exynos5420";
 
         aliases {
+                mshc0 = &mmc_0;
+                mshc1 = &mmc_1;
+                mshc2 = &mmc_2;
                 pinctrl0 = &pinctrl_0;
                 pinctrl1 = &pinctrl_1;
                 pinctrl2 = &pinctrl_2;
@@ -31,6 +34,18 @@
                 i2c1 = &i2c_1;
                 i2c2 = &i2c_2;
                 i2c3 = &i2c_3;
+                i2c4 = &hsi2c_4;
+                i2c5 = &hsi2c_5;
+                i2c6 = &hsi2c_6;
+                i2c7 = &hsi2c_7;
+                i2c8 = &hsi2c_8;
+                i2c9 = &hsi2c_9;
+                i2c10 = &hsi2c_10;
+                gsc0 = &gsc_0;
+                gsc1 = &gsc_1;
+                spi0 = &spi_0;
+                spi1 = &spi_1;
+                spi2 = &spi_2;
         };
 
         cpus {
@@ -64,6 +79,34 @@
                         reg = <0x3>;
                         clock-frequency = <1800000000>;
                 };
+
+                cpu4: cpu@100 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x100>;
+                        clock-frequency = <1000000000>;
+                };
+
+                cpu5: cpu@101 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x101>;
+                        clock-frequency = <1000000000>;
+                };
+
+                cpu6: cpu@102 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x102>;
+                        clock-frequency = <1000000000>;
+                };
+
+                cpu7: cpu@103 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x103>;
+                        clock-frequency = <1000000000>;
+                };
         };
 
         clock: clock-controller@10010000 {
@@ -88,13 +131,50 @@
                 clock-names = "mfc";
         };
 
+        mmc_0: mmc@12200000 {
+                compatible = "samsung,exynos5420-dw-mshc-smu";
+                interrupts = <0 75 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x12200000 0x2000>;
+                clocks = <&clock 351>, <&clock 132>;
+                clock-names = "biu", "ciu";
+                fifo-depth = <0x40>;
+                status = "disabled";
+        };
+
+        mmc_1: mmc@12210000 {
+                compatible = "samsung,exynos5420-dw-mshc-smu";
+                interrupts = <0 76 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x12210000 0x2000>;
+                clocks = <&clock 352>, <&clock 133>;
+                clock-names = "biu", "ciu";
+                fifo-depth = <0x40>;
+                status = "disabled";
+        };
+
+        mmc_2: mmc@12220000 {
+                compatible = "samsung,exynos5420-dw-mshc";
+                interrupts = <0 77 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x12220000 0x1000>;
+                clocks = <&clock 353>, <&clock 134>;
+                clock-names = "biu", "ciu";
+                fifo-depth = <0x40>;
+                status = "disabled";
+        };
+
         mct@101C0000 {
                 compatible = "samsung,exynos4210-mct";
                 reg = <0x101C0000 0x800>;
                 interrupt-controller;
                 #interrups-cells = <1>;
                 interrupt-parent = <&mct_map>;
-                interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>;
+                interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
+                                <8>, <9>, <10>, <11>;
                 clocks = <&clock 1>, <&clock 315>;
                 clock-names = "fin_pll", "mct";
 
@@ -109,7 +189,11 @@
                                         <4 &gic 0 120 0>,
                                         <5 &gic 0 121 0>,
                                         <6 &gic 0 122 0>,
-                                        <7 &gic 0 123 0>;
+                                        <7 &gic 0 123 0>,
+                                        <8 &gic 0 128 0>,
+                                        <9 &gic 0 129 0>,
+                                        <10 &gic 0 130 0>,
+                                        <11 &gic 0 131 0>;
                 };
         };
 
@@ -190,6 +274,106 @@
                 status = "okay";
         };
 
+        amba {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "arm,amba-bus";
+                interrupt-parent = <&gic>;
+                ranges;
+
+                pdma0: pdma@121A0000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x121A0000 0x1000>;
+                        interrupts = <0 34 0>;
+                        clocks = <&clock 362>;
+                        clock-names = "apb_pclk";
+                        #dma-cells = <1>;
+                        #dma-channels = <8>;
+                        #dma-requests = <32>;
+                };
+
+                pdma1: pdma@121B0000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x121B0000 0x1000>;
+                        interrupts = <0 35 0>;
+                        clocks = <&clock 363>;
+                        clock-names = "apb_pclk";
+                        #dma-cells = <1>;
+                        #dma-channels = <8>;
+                        #dma-requests = <32>;
+                };
+
+                mdma0: mdma@10800000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x10800000 0x1000>;
+                        interrupts = <0 33 0>;
+                        clocks = <&clock 473>;
+                        clock-names = "apb_pclk";
+                        #dma-cells = <1>;
+                        #dma-channels = <8>;
+                        #dma-requests = <1>;
+                };
+
+                mdma1: mdma@11C10000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x11C10000 0x1000>;
+                        interrupts = <0 124 0>;
+                        clocks = <&clock 442>;
+                        clock-names = "apb_pclk";
+                        #dma-cells = <1>;
+                        #dma-channels = <8>;
+                        #dma-requests = <1>;
+                };
+        };
+
+        spi_0: spi@12d20000 {
+                compatible = "samsung,exynos4210-spi";
+                reg = <0x12d20000 0x100>;
+                interrupts = <0 66 0>;
+                dmas = <&pdma0 5
+                        &pdma0 4>;
+                dma-names = "tx", "rx";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&spi0_bus>;
+                clocks = <&clock 271>, <&clock 135>;
+                clock-names = "spi", "spi_busclk0";
+                status = "disabled";
+        };
+
+        spi_1: spi@12d30000 {
+                compatible = "samsung,exynos4210-spi";
+                reg = <0x12d30000 0x100>;
+                interrupts = <0 67 0>;
+                dmas = <&pdma1 5
+                        &pdma1 4>;
+                dma-names = "tx", "rx";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&spi1_bus>;
+                clocks = <&clock 272>, <&clock 136>;
+                clock-names = "spi", "spi_busclk0";
+                status = "disabled";
+        };
+
+        spi_2: spi@12d40000 {
+                compatible = "samsung,exynos4210-spi";
+                reg = <0x12d40000 0x100>;
+                interrupts = <0 68 0>;
+                dmas = <&pdma0 7
+                        &pdma0 6>;
+                dma-names = "tx", "rx";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&spi2_bus>;
+                clocks = <&clock 273>, <&clock 137>;
+                clock-names = "spi", "spi_busclk0";
+                status = "disabled";
+        };
+
         serial@12C00000 {
                 clocks = <&clock 257>, <&clock 128>;
                 clock-names = "uart", "clk_uart_baud0";
@@ -210,6 +394,15 @@
                 clock-names = "uart", "clk_uart_baud0";
         };
 
+        pwm: pwm@12dd0000 {
+                compatible = "samsung,exynos4210-pwm";
+                reg = <0x12dd0000 0x100>;
+                samsung,pwm-outputs = <0>, <1>, <2>, <3>;
+                #pwm-cells = <3>;
+                clocks = <&clock 279>;
+                clock-names = "timers";
+        };
+
         dp_phy: video-phy@10040728 {
                 compatible = "samsung,exynos5250-dp-video-phy";
                 reg = <0x10040728 4>;
@@ -292,6 +485,97 @@
                 status = "disabled";
         };
 
+        hsi2c_4: i2c@12CA0000 {
+                compatible = "samsung,exynos5-hsi2c";
+                reg = <0x12CA0000 0x1000>;
+                interrupts = <0 60 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c4_hs_bus>;
+                clocks = <&clock 265>;
+                clock-names = "hsi2c";
+                status = "disabled";
+        };
+
+        hsi2c_5: i2c@12CB0000 {
+                compatible = "samsung,exynos5-hsi2c";
+                reg = <0x12CB0000 0x1000>;
+                interrupts = <0 61 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c5_hs_bus>;
+                clocks = <&clock 266>;
+                clock-names = "hsi2c";
+                status = "disabled";
+        };
+
+        hsi2c_6: i2c@12CC0000 {
+                compatible = "samsung,exynos5-hsi2c";
+                reg = <0x12CC0000 0x1000>;
+                interrupts = <0 62 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c6_hs_bus>;
+                clocks = <&clock 267>;
+                clock-names = "hsi2c";
+                status = "disabled";
+        };
+
+        hsi2c_7: i2c@12CD0000 {
+                compatible = "samsung,exynos5-hsi2c";
+                reg = <0x12CD0000 0x1000>;
+                interrupts = <0 63 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c7_hs_bus>;
+                clocks = <&clock 268>;
+                clock-names = "hsi2c";
+                status = "disabled";
+        };
+
+        hsi2c_8: i2c@12E00000 {
+                compatible = "samsung,exynos5-hsi2c";
+                reg = <0x12E00000 0x1000>;
+                interrupts = <0 87 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c8_hs_bus>;
+                clocks = <&clock 281>;
+                clock-names = "hsi2c";
+                status = "disabled";
+        };
+
+        hsi2c_9: i2c@12E10000 {
+                compatible = "samsung,exynos5-hsi2c";
+                reg = <0x12E10000 0x1000>;
+                interrupts = <0 88 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c9_hs_bus>;
+                clocks = <&clock 282>;
+                clock-names = "hsi2c";
+                status = "disabled";
+        };
+
+        hsi2c_10: i2c@12E20000 {
+                compatible = "samsung,exynos5-hsi2c";
+                reg = <0x12E20000 0x1000>;
+                interrupts = <0 203 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c10_hs_bus>;
+                clocks = <&clock 283>;
+                clock-names = "hsi2c";
+                status = "disabled";
+        };
+
         hdmi@14530000 {
                 compatible = "samsung,exynos4212-hdmi";
                 reg = <0x14530000 0x70000>;
@@ -310,4 +594,62 @@
                 clocks = <&clock 431>, <&clock 143>;
                 clock-names = "mixer", "sclk_hdmi";
         };
+
+        gsc_0: video-scaler@13e00000 {
+                compatible = "samsung,exynos5-gsc";
+                reg = <0x13e00000 0x1000>;
+                interrupts = <0 85 0>;
+                clocks = <&clock 465>;
+                clock-names = "gscl";
+                samsung,power-domain = <&gsc_pd>;
+        };
+
+        gsc_1: video-scaler@13e10000 {
+                compatible = "samsung,exynos5-gsc";
+                reg = <0x13e10000 0x1000>;
+                interrupts = <0 86 0>;
+                clocks = <&clock 466>;
+                clock-names = "gscl";
+                samsung,power-domain = <&gsc_pd>;
+        };
+
+        tmu_cpu0: tmu@10060000 {
+                compatible = "samsung,exynos5420-tmu";
+                reg = <0x10060000 0x100>;
+                interrupts = <0 65 0>;
+                clocks = <&clock 318>;
+                clock-names = "tmu_apbif";
+        };
+
+        tmu_cpu1: tmu@10064000 {
+                compatible = "samsung,exynos5420-tmu";
+                reg = <0x10064000 0x100>;
+                interrupts = <0 183 0>;
+                clocks = <&clock 318>;
+                clock-names = "tmu_apbif";
+        };
+
+        tmu_cpu2: tmu@10068000 {
+                compatible = "samsung,exynos5420-tmu-ext-triminfo";
+                reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+                interrupts = <0 184 0>;
+                clocks = <&clock 318>, <&clock 318>;
+                clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+        };
+
+        tmu_cpu3: tmu@1006c000 {
+                compatible = "samsung,exynos5420-tmu-ext-triminfo";
+                reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+                interrupts = <0 185 0>;
+                clocks = <&clock 318>, <&clock 319>;
+                clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+        };
+
+        tmu_gpu: tmu@100a0000 {
+                compatible = "samsung,exynos5420-tmu-ext-triminfo";
+                reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+                interrupts = <0 215 0>;
+                clocks = <&clock 319>, <&clock 318>;
+                clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 8da107088ce4..02a0a1226cef 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -29,7 +29,7 @@
                 #clock-cells = <1>;
         };
 
-        gic:interrupt-controller@2E0000 {
+        gic: interrupt-controller@2E0000 {
                 compatible = "arm,cortex-a15-gic";
                 #interrupt-cells = <3>;
                 interrupt-controller;
diff --git a/arch/arm/boot/dts/integrator.dtsi b/arch/arm/boot/dts/integrator.dtsi
index 0f06f8687b0b..88e3d477bf16 100644
--- a/arch/arm/boot/dts/integrator.dtsi
+++ b/arch/arm/boot/dts/integrator.dtsi
@@ -10,6 +10,11 @@
                 reg = <0x10000000 0x200>;
         };
 
+        ebi@12000000 {
+                compatible = "arm,external-bus-interface";
+                reg = <0x12000000 0x100>;
+        };
+
         timer@13000000 {
                 reg = <0x13000000 0x100>;
                 interrupt-parent = <&pic>;
diff --git a/arch/arm/boot/dts/k2hk-evm.dts b/arch/arm/boot/dts/k2hk-evm.dts
new file mode 100644
index 000000000000..eaefdfef65c3
--- /dev/null
+++ b/arch/arm/boot/dts/k2hk-evm.dts
@@ -0,0 +1,63 @@
+/*
+ * Copyright 2013 Texas Instruments, Inc.
+ *
+ * Keystone 2 Kepler/Hawking EVM device tree
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "keystone.dtsi"
+
+/ {
+        compatible =  "ti,keystone-evm";
+
+        soc {
+                clock {
+                        refclksys: refclksys {
+                                #clock-cells = <0>;
+                                compatible = "fixed-clock";
+                                clock-frequency = <122880000>;
+                                clock-output-names = "refclk-sys";
+                        };
+
+                        refclkpass: refclkpass {
+                                #clock-cells = <0>;
+                                compatible = "fixed-clock";
+                                clock-frequency = <122880000>;
+                                clock-output-names = "refclk-pass";
+                        };
+
+                        refclkarm: refclkarm {
+                                #clock-cells = <0>;
+                                compatible = "fixed-clock";
+                                clock-frequency = <125000000>;
+                                clock-output-names = "refclk-arm";
+                        };
+
+                        refclkddr3a: refclkddr3a {
+                                #clock-cells = <0>;
+                                compatible = "fixed-clock";
+                                clock-frequency = <100000000>;
+                                clock-output-names = "refclk-ddr3a";
+                        };
+
+                        refclkddr3b: refclkddr3b {
+                                #clock-cells = <0>;
+                                compatible = "fixed-clock";
+                                clock-frequency = <100000000>;
+                                clock-output-names = "refclk-ddr3b";
+                        };
+                };
+        };
+};
+
+&usb_phy {
+        status = "okay";
+};
+
+&usb {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi
index d6713b113258..2363593e1050 100644
--- a/arch/arm/boot/dts/keystone-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-clocks.dtsi
@@ -13,17 +13,10 @@ clocks {
         #size-cells = <1>;
         ranges;
 
-        refclkmain: refclkmain {
-                #clock-cells = <0>;
-                compatible = "fixed-clock";
-                clock-frequency = <122880000>;
-                clock-output-names = "refclk-main";
-        };
-
         mainpllclk: mainpllclk@2310110 {
                 #clock-cells = <0>;
                 compatible = "ti,keystone,main-pll-clock";
-                clocks = <&refclkmain>;
+                clocks = <&refclksys>;
                 reg = <0x02620350 4>, <0x02310110 4>;
                 reg-names = "control", "multiplier";
                 fixed-postdiv = <2>;
@@ -32,47 +25,43 @@ clocks {
         papllclk: papllclk@2620358 {
                 #clock-cells = <0>;
                 compatible = "ti,keystone,pll-clock";
-                clocks = <&refclkmain>;
+                clocks = <&refclkpass>;
                 clock-output-names = "pa-pll-clk";
                 reg = <0x02620358 4>;
                 reg-names = "control";
-                fixed-postdiv = <6>;
         };
 
-        ddr3allclk: ddr3apllclk@2620360 {
+        ddr3apllclk: ddr3apllclk@2620360 {
                 #clock-cells = <0>;
                 compatible = "ti,keystone,pll-clock";
-                clocks = <&refclkmain>;
+                clocks = <&refclkddr3a>;
                 clock-output-names = "ddr-3a-pll-clk";
                 reg = <0x02620360 4>;
                 reg-names = "control";
-                fixed-postdiv = <6>;
         };
 
-        ddr3bllclk: ddr3bpllclk@2620368 {
+        ddr3bpllclk: ddr3bpllclk@2620368 {
                 #clock-cells = <0>;
                 compatible = "ti,keystone,pll-clock";
-                clocks = <&refclkmain>;
+                clocks = <&refclkddr3b>;
                 clock-output-names = "ddr-3b-pll-clk";
                 reg = <0x02620368 4>;
                 reg-names = "control";
-                fixed-postdiv = <6>;
         };
 
         armpllclk: armpllclk@2620370 {
                 #clock-cells = <0>;
                 compatible = "ti,keystone,pll-clock";
-                clocks = <&refclkmain>;
+                clocks = <&refclkarm>;
                 clock-output-names = "arm-pll-clk";
                 reg = <0x02620370 4>;
                 reg-names = "control";
-                fixed-postdiv = <6>;
         };
 
         mainmuxclk: mainmuxclk@2310108 {
                 #clock-cells = <0>;
                 compatible = "ti,keystone,pll-mux-clock";
-                clocks = <&mainpllclk>, <&refclkmain>;
+                clocks = <&mainpllclk>, <&refclksys>;
                 reg = <0x02310108 4>;
                 bit-shift = <23>;
                 bit-mask = <1>;
@@ -135,6 +124,15 @@ clocks {
                 clock-output-names = "chipclk13";
         };
 
+        paclk13: paclk13 {
+                #clock-cells = <0>;
+                compatible = "fixed-factor-clock";
+                clocks = <&papllclk>;
+                clock-div = <3>;
+                clock-mult = <1>;
+                clock-output-names = "paclk13";
+        };
+
         chipclk14: chipclk14 {
                 #clock-cells = <0>;
                 compatible = "fixed-factor-clock";
diff --git a/arch/arm/boot/dts/keystone.dts b/arch/arm/boot/dts/keystone.dtsi
index 100bdf52b847..b4202907a27b 100644
--- a/arch/arm/boot/dts/keystone.dts
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -6,14 +6,12 @@
  * published by the Free Software Foundation.
  */
 
-/dts-v1/;
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include "skeleton.dtsi"
 
 / {
         model = "Texas Instruments Keystone 2 SoC";
-        compatible =  "ti,keystone-evm";
         #address-cells = <2>;
         #size-cells = <2>;
         interrupt-parent = <&gic>;
@@ -64,7 +62,11 @@
                 #address-cells = <1>;
                 interrupt-controller;
                 reg = <0x0 0x02561000 0x0 0x1000>,
-                      <0x0 0x02562000 0x0 0x2000>;
+                      <0x0 0x02562000 0x0 0x2000>,
+                      <0x0 0x02564000 0x0 0x1000>,
+                      <0x0 0x02566000 0x0 0x2000>;
+                interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+                                IRQ_TYPE_LEVEL_HIGH)>;
         };
 
         timer {
@@ -179,5 +181,32 @@
                         interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
                         clocks = <&clkspi>;
                 };
+
+                usb_phy: usb_phy@2620738 {
+                        compatible = "ti,keystone-usbphy";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x2620738 32>;
+                        status = "disabled";
+                };
+
+                usb: usb@2680000 {
+                        compatible = "ti,keystone-dwc3";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x2680000 0x10000>;
+                        clocks = <&clkusb>;
+                        clock-names = "usb";
+                        interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
+                        ranges;
+                        status = "disabled";
+
+                        dwc3@2690000 {
+                                compatible = "synopsys,dwc3";
+                                reg = <0x2690000 0x70000>;
+                                interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
+                                usb-phy = <&usb_phy>, <&usb_phy>;
+                        };
+                };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi
index 650ef30e1856..e4e1968dfca8 100644
--- a/arch/arm/boot/dts/kirkwood-6281.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6281.dtsi
@@ -97,6 +97,8 @@
                         reg = <0x90000 0x200>;
                         interrupts = <28>;
                         clocks = <&gate_clk 4>;
+                        pinctrl-0 = <&pmx_sdio>;
+                        pinctrl-names = "default";
                         bus-width = <4>;
                         cap-sdio-irq;
                         cap-sd-highspeed;
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi
index 3933a331ddc2..f010c21220bf 100644
--- a/arch/arm/boot/dts/kirkwood-6282.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
@@ -125,6 +125,8 @@
                         reg = <0x90000 0x200>;
                         interrupts = <28>;
                         clocks = <&gate_clk 4>;
+                        pinctrl-0 = <&pmx_sdio>;
+                        pinctrl-names = "default";
                         bus-width = <4>;
                         cap-sdio-irq;
                         cap-sd-highspeed;
diff --git a/arch/arm/boot/dts/kirkwood-cloudbox.dts b/arch/arm/boot/dts/kirkwood-cloudbox.dts
index 142b9cd3b454..bb4df405527c 100644
--- a/arch/arm/boot/dts/kirkwood-cloudbox.dts
+++ b/arch/arm/boot/dts/kirkwood-cloudbox.dts
@@ -66,8 +66,8 @@
 
                 button@1 {
                         label = "Power push button";
-                        linux,code = <116>;
-                        gpios = <&gpio0 16 1>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
                 };
         };
 
@@ -76,17 +76,17 @@
 
                 red-fail {
                         label = "cloudbox:red:fail";
-                        gpios = <&gpio0 14 0>;
+                        gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
                 };
                 blue-sata {
                         label = "cloudbox:blue:sata";
-                        gpios = <&gpio0 15 0>;
+                        gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
                 };
         };
 
         gpio_poweroff {
                 compatible = "gpio-poweroff";
-                gpios = <&gpio0 17 0>;
+                gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
         };
 };
 
diff --git a/arch/arm/boot/dts/kirkwood-db.dtsi b/arch/arm/boot/dts/kirkwood-db.dtsi
index 053aa20fb30f..afebc1570318 100644
--- a/arch/arm/boot/dts/kirkwood-db.dtsi
+++ b/arch/arm/boot/dts/kirkwood-db.dtsi
@@ -51,8 +51,8 @@
                 mvsdio@90000 {
                         pinctrl-0 = <&pmx_sdio_gpios>;
                         pinctrl-names = "default";
-                        wp-gpios = <&gpio1 5 0>;
-                        cd-gpios = <&gpio1 6 0>;
+                        wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+                        cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
                         status = "okay";
                 };
         };
diff --git a/arch/arm/boot/dts/kirkwood-dns320.dts b/arch/arm/boot/dts/kirkwood-dns320.dts
index e112ca62d978..bf7fe8ab88f4 100644
--- a/arch/arm/boot/dts/kirkwood-dns320.dts
+++ b/arch/arm/boot/dts/kirkwood-dns320.dts
@@ -24,24 +24,24 @@
 
                 blue-power {
                         label = "dns320:blue:power";
-                        gpios = <&gpio0 26 1>; /* GPIO 26 Active Low */
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+                        default-state = "keep";
                 };
                 blue-usb {
                         label = "dns320:blue:usb";
-                        gpios = <&gpio1 11 1>; /* GPIO 43 Active Low */
+                        gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
                 };
                 orange-l_hdd {
                         label = "dns320:orange:l_hdd";
-                        gpios = <&gpio0 28 1>; /* GPIO 28 Active Low */
+                        gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
                 };
                 orange-r_hdd {
                         label = "dns320:orange:r_hdd";
-                        gpios = <&gpio0 27 1>; /* GPIO 27 Active Low */
+                        gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
                 };
                 orange-usb {
                         label = "dns320:orange:usb";
-                        gpios = <&gpio1 3 1>; /* GPIO 35 Active Low */
+                        gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; /* GPIO 35 */
                 };
         };
 
diff --git a/arch/arm/boot/dts/kirkwood-dns325.dts b/arch/arm/boot/dts/kirkwood-dns325.dts
index 5119fb8a8eb6..cb9978c652f2 100644
--- a/arch/arm/boot/dts/kirkwood-dns325.dts
+++ b/arch/arm/boot/dts/kirkwood-dns325.dts
@@ -24,24 +24,24 @@
 
                 white-power {
                         label = "dns325:white:power";
-                        gpios = <&gpio0 26 1>; /* GPIO 26 Active Low */
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+                        default-state = "keep";
                 };
                 white-usb {
                         label = "dns325:white:usb";
-                        gpios = <&gpio1 11 1>; /* GPIO 43 Active Low */
+                        gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* GPIO 43 */
                 };
                 red-l_hdd {
                         label = "dns325:red:l_hdd";
-                        gpios = <&gpio0 28 1>; /* GPIO 28 Active Low */
+                        gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
                 };
                 red-r_hdd {
                         label = "dns325:red:r_hdd";
-                        gpios = <&gpio0 27 1>; /* GPIO 27 Active Low */
+                        gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
                 };
                 red-usb {
                         label = "dns325:red:usb";
-                        gpios = <&gpio0 29 1>; /* GPIO 29 Active Low */
+                        gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
                 };
         };
 
diff --git a/arch/arm/boot/dts/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
index aefa375a550d..12087566ac6d 100644
--- a/arch/arm/boot/dts/kirkwood-dnskw.dtsi
+++ b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
@@ -15,18 +15,18 @@
 
                 button@1 {
                         label = "Power button";
-                        linux,code = <116>;
-                        gpios = <&gpio1 2 1>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
                 };
                 button@2 {
                         label = "USB unmount button";
-                        linux,code = <161>;
-                        gpios = <&gpio1 15 1>;
+                        linux,code = <KEY_EJECTCD>;
+                        gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
                 };
                 button@3 {
                         label = "Reset button";
-                        linux,code = <0x198>;
-                        gpios = <&gpio1 16 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
                 };
         };
 
@@ -35,8 +35,8 @@
                 compatible = "gpio-fan";
                 pinctrl-0 = <&pmx_fan_high_speed &pmx_fan_low_speed>;
                 pinctrl-names = "default";
-                gpios = <&gpio1 14 1
-                         &gpio1 13 1>;
+                gpios = <&gpio1 14 GPIO_ACTIVE_LOW
+                         &gpio1 13 GPIO_ACTIVE_LOW>;
                 gpio-fan,speed-map = <0    0
                                       3000 1
                                       6000 2>;
@@ -46,7 +46,7 @@
                 compatible = "gpio-poweroff";
                 pinctrl-0 = <&pmx_power_off>;
                 pinctrl-names = "default";
-                gpios = <&gpio1 4 0>;
+                gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
         };
 
         ocp@f1000000 {
diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts
index 33ff368fbfa5..2a41c75c5c21 100644
--- a/arch/arm/boot/dts/kirkwood-dockstar.dts
+++ b/arch/arm/boot/dts/kirkwood-dockstar.dts
@@ -42,12 +42,12 @@
 
                 health {
                         label = "status:green:health";
-                        gpios = <&gpio1 14 1>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+                        default-state = "keep";
                 };
                 fault {
                         label = "status:orange:fault";
-                        gpios = <&gpio1 15 1>;
+                        gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
                 };
         };
         regulators {
diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts
index 6f62af99c9cb..a7558375e06f 100644
--- a/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts
@@ -87,15 +87,15 @@
 
                 bluetooth {
                         label = "dreamplug:blue:bluetooth";
-                        gpios = <&gpio1 15 1>;
+                        gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
                 };
                 wifi {
                         label = "dreamplug:green:wifi";
-                        gpios = <&gpio1 16 1>;
+                        gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
                 };
                 wifi-ap {
                         label = "dreamplug:green:wifi_ap";
-                        gpios = <&gpio1 17 1>;
+                        gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts
index a43bebb25110..c2e512953570 100644
--- a/arch/arm/boot/dts/kirkwood-goflexnet.dts
+++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts
@@ -85,44 +85,44 @@
 
                 health {
                         label = "status:green:health";
-                        gpios = <&gpio1 14 1>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+                        default-state = "keep";
                 };
                 fault {
                         label = "status:orange:fault";
-                        gpios = <&gpio1 15 1>;
+                        gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
                 };
                 left0 {
                         label = "status:white:left0";
-                        gpios = <&gpio1 10 0>;
+                        gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
                 };
                 left1 {
                         label = "status:white:left1";
-                        gpios = <&gpio1 11 0>;
+                        gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
                 };
                 left2 {
                         label = "status:white:left2";
-                        gpios = <&gpio1 12 0>;
+                        gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
                 };
                 left3 {
                         label = "status:white:left3";
-                        gpios = <&gpio1 13 0>;
+                        gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
                 };
                 right0 {
                         label = "status:white:right0";
-                        gpios = <&gpio1 6 0>;
+                        gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
                 };
                 right1 {
                         label = "status:white:right1";
-                        gpios = <&gpio1 7 0>;
+                        gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
                 };
                 right2 {
                         label = "status:white:right2";
-                        gpios = <&gpio1 8 0>;
+                        gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
                 };
                 right3 {
                         label = "status:white:right3";
-                        gpios = <&gpio1 9 0>;
+                        gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
                 };
         };
         regulators {
@@ -141,7 +141,7 @@
                         enable-active-high;
                         regulator-always-on;
                         regulator-boot-on;
-                        gpio = <&gpio0 29 0>;
+                        gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
index d30a91a5047d..0b557d5cb723 100644
--- a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
+++ b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
@@ -45,10 +45,10 @@
                         nr-ports = <1>;
                 };
 
+                /* AzureWave AW-GH381 WiFi/BT */
                 mvsdio@90000 {
                         status = "okay";
-                        /* No CD or WP GPIOs */
-                        broken-cd;
+                        non-removable;
                 };
         };
 
@@ -60,19 +60,19 @@
 
                 health-r {
                         label = "guruplug:red:health";
-                        gpios = <&gpio1 14 1>;
+                        gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
                 };
                 health-g {
                         label = "guruplug:green:health";
-                        gpios = <&gpio1 15 1>;
+                        gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
                 };
                 wmode-r {
                         label = "guruplug:red:wmode";
-                        gpios = <&gpio1 16 1>;
+                        gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
                 };
                 wmode-g {
                         label = "guruplug:green:wmode";
-                        gpios = <&gpio1 17 1>;
+                        gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts
index c5fb02f7ebc3..6ccc78866e6d 100644
--- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -63,13 +63,13 @@
 
                 button@1 {
                         label = "USB Copy";
-                        linux,code = <133>;
-                        gpios = <&gpio0 29 1>;
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
                 };
                 button@2 {
                         label = "Reset";
-                        linux,code = <0x198>;
-                        gpios = <&gpio0 28 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
                 };
         };
 
@@ -81,16 +81,16 @@
 
                 green-os {
                         label = "ib62x0:green:os";
-                        gpios = <&gpio0 25 0>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
+                        default-state = "keep";
                 };
                 red-os {
                         label = "ib62x0:red:os";
-                        gpios = <&gpio0 22 0>;
+                        gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
                 };
                 usb-copy {
                         label = "ib62x0:red:usb_copy";
-                        gpios = <&gpio0 27 0>;
+                        gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
                 };
         };
 
@@ -98,7 +98,7 @@
                 compatible = "gpio-poweroff";
                 pinctrl-0 = <&pmx_power_off>;
                 pinctrl-names = "default";
-                gpios = <&gpio0 24 0>;
+                gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
         };
 };
 
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts
index 4a62b206f680..f7636291de77 100644
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -94,37 +94,37 @@
 
                 led-level {
                         label = "led_level";
-                        gpios = <&gpio1 9 0>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+                        default-state = "on";
                 };
                 power-blue {
                         label = "power:blue";
-                        gpios = <&gpio1 10 0>;
-                        linux,default-trigger = "timer";
+                        gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+                        default-state = "keep";
                 };
                 power-red {
                         label = "power:red";
-                        gpios = <&gpio1 11 0>;
+                        gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
                 };
                 usb1 {
                         label = "usb1:blue";
-                        gpios = <&gpio1 12 0>;
+                        gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
                 };
                 usb2 {
                         label = "usb2:blue";
-                        gpios = <&gpio1 13 0>;
+                        gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
                 };
                 usb3 {
                         label = "usb3:blue";
-                        gpios = <&gpio1 14 0>;
+                        gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
                 };
                 usb4 {
                         label = "usb4:blue";
-                        gpios = <&gpio1 15 0>;
+                        gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
                 };
                 otb {
                         label = "otb:blue";
-                        gpios = <&gpio1 16 0>;
+                        gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
                 };
         };
 
@@ -137,14 +137,14 @@
 
                 button@1 {
                         label = "OTB Button";
-                        linux,code = <133>;
-                        gpios = <&gpio1 3 1>;
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
                         debounce-interval = <100>;
                 };
                 button@2 {
                         label = "Reset";
-                        linux,code = <0x198>;
-                        gpios = <&gpio0 12 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
                         debounce-interval = <100>;
                 };
         };
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index d15395d671ed..589000631b5a 100644
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -127,20 +127,20 @@
 
                 power_led {
                         label = "status:white:power_led";
-                        gpios = <&gpio0 16 0>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+                        default-state = "keep";
                 };
                 rebuild_led {
                         label = "status:white:rebuild_led";
-                        gpios = <&gpio1 4 0>;
+                        gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
                 };
                 health_led {
                         label = "status:red:health_led";
-                        gpios = <&gpio1 5 0>;
+                        gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
                 };
                 backup_led {
                         label = "status:blue:backup_led";
-                        gpios = <&gpio0 15 0>;
+                        gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
                 };
         };
         gpio-keys {
@@ -154,18 +154,18 @@
 
                 Power {
                         label = "Power Button";
-                        linux,code = <116>;
-                        gpios = <&gpio0 14 1>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
                 };
                 Reset {
                         label = "Reset Button";
-                        linux,code = <0x198>;
-                        gpios = <&gpio0 12 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
                 };
                 OTB {
                         label = "OTB Button";
-                        linux,code = <133>;
-                        gpios = <&gpio1 3 1>;
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
index cd44f37e54b5..5b5808ebc6e0 100644
--- a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
+++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
@@ -38,8 +38,8 @@
 
         i2c@0 {
                 compatible = "i2c-gpio";
-                gpios = < &gpio0 8 0            /* sda */
-                        &gpio0 9 0 >;           /* scl */
+                gpios = < &gpio0 8 GPIO_ACTIVE_HIGH             /* sda */
+                          &gpio0 9 GPIO_ACTIVE_HIGH>;           /* scl */
                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
index 4e8f9e42c592..fc1cd3b7b968 100644
--- a/arch/arm/boot/dts/kirkwood-lsxl.dtsi
+++ b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
@@ -108,20 +108,20 @@
 
                 button@1 {
                         label = "Function Button";
-                        linux,code = <357>;
-                        gpios = <&gpio1 9 1>;
+                        linux,code = <KEY_OPTION>;
+                        gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
                 };
                 button@2 {
                         label = "Power-on Switch";
-                        linux,code = <0>;
+                        linux,code = <KEY_RESERVED>;
                         linux,input-type = <5>;
-                        gpios = <&gpio1 10 1>;
+                        gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
                 };
                 button@3 {
                         label = "Power-auto Switch";
-                        linux,code = <1>;
+                        linux,code = <KEY_ESC>;
                         linux,input-type = <5>;
-                        gpios = <&gpio1 11 1>;
+                        gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
                 };
         };
 
@@ -134,28 +134,28 @@
 
                 led@1 {
                         label = "lsxl:blue:func";
-                        gpios = <&gpio1 4 1>;
+                        gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
                 };
 
                 led@2 {
                         label = "lsxl:red:alarm";
-                        gpios = <&gpio1 5 1>;
+                        gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
                 };
 
                 led@3 {
                         label = "lsxl:amber:info";
-                        gpios = <&gpio1 6 1>;
+                        gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
                 };
 
                 led@4 {
                         label = "lsxl:blue:power";
-                        gpios = <&gpio1 7 1>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+                        default-state = "keep";
                 };
 
                 led@5 {
                         label = "lsxl:red:func";
-                        gpios = <&gpio1 16 1>;
+                        gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
                 };
         };
 
@@ -163,13 +163,13 @@
                 compatible = "gpio-fan";
                 pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
                 pinctrl-names = "default";
-                gpios = <&gpio0 19 1
-                         &gpio0 18 1>;
+                gpios = <&gpio0 19 GPIO_ACTIVE_LOW
+                         &gpio0 18 GPIO_ACTIVE_LOW>;
                 gpio-fan,speed-map = <0    3
                                       1500 2
                                       3250 1
                                       5000 0>;
-                alarm-gpios = <&gpio1 8 0>;
+                alarm-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
         };
 
         restart_poweroff {
diff --git a/arch/arm/boot/dts/kirkwood-mplcec4.dts b/arch/arm/boot/dts/kirkwood-mplcec4.dts
index 6c1ec2786e6e..c20607cd7d7c 100644
--- a/arch/arm/boot/dts/kirkwood-mplcec4.dts
+++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts
@@ -110,7 +110,7 @@
                         pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
                         pinctrl-names = "default";
                         status = "okay";
-                        cd-gpios = <&gpio1 15 1>;
+                        cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
                         /* No WP GPIO */
                 };
         };
@@ -126,36 +126,36 @@
 
                 health {
                         label = "status:green:health";
-                        gpios = <&gpio0 7 1>;
+                        gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
                 };
 
                 user1o {
                         label = "user1:orange";
-                        gpios = <&gpio1 8 1>;
+                        gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
                         default-state = "on";
                 };
 
                 user1g {
                         label = "user1:green";
-                        gpios = <&gpio1 9 1>;
+                        gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
                         default-state = "on";
                 };
 
                 user0o {
                         label = "user0:orange";
-                        gpios = <&gpio1 12 1>;
+                        gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
                         default-state = "on";
                 };
 
                 user0g {
                         label = "user0:green";
-                        gpios = <&gpio1 13 1>;
+                        gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
                         default-state = "on";
                 };
 
                 misc {
                         label = "status:orange:misc";
-                        gpios = <&gpio1 14 1>;
+                        gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
                         default-state = "on";
                 };
 
diff --git a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
index 6317e1d088b3..dc86429756d7 100644
--- a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
+++ b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
@@ -90,17 +90,17 @@
 
                 green-status {
                         label = "gtw:green:Status";
-                        gpios = <&gpio0 20 0>;
+                        gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
                 };
 
                 red-status {
                         label = "gtw:red:Status";
-                        gpios = <&gpio0 21 0>;
+                        gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
                 };
 
                 green-usb {
                         label = "gtw:green:USB";
-                        gpios = <&gpio0 12 0>;
+                        gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
                 };
         };
 
@@ -113,13 +113,13 @@
 
                 button@1 {
                         label = "SWR Button";
-                        linux,code = <0x198>; /* KEY_RESTART */
-                        gpios = <&gpio1 15 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
                 };
                 button@2 {
                         label = "WPS Button";
-                        linux,code = <0x211>; /* KEY_WPS_BUTTON */
-                        gpios = <&gpio1 14 1>;
+                        linux,code = <KEY_WPS_BUTTON>;
+                        gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
index e6a102cf424c..4d2a8db9ab77 100644
--- a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
+++ b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
@@ -1,3 +1,14 @@
+/*
+ * Device Tree file for NETGEAR ReadyNAS Duo v2
+ *
+ * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
 /dts-v1/;
 
 #include "kirkwood.dtsi"
@@ -32,41 +43,50 @@
                                 marvell,pins = "mpp47";
                                 marvell,function = "gpio";
                         };
+
                         pmx_button_backup: pmx-button-backup {
                                 marvell,pins = "mpp45";
                                 marvell,function = "gpio";
                         };
+
                         pmx_button_reset: pmx-button-reset {
                                 marvell,pins = "mpp13";
                                 marvell,function = "gpio";
                         };
+
                         pmx_led_blue_power: pmx-led-blue-power {
                                 marvell,pins = "mpp31";
                                 marvell,function = "gpio";
                         };
+
                         pmx_led_blue_activity: pmx-led-blue-activity {
                                 marvell,pins = "mpp38";
                                 marvell,function = "gpio";
                         };
+
                         pmx_led_blue_disk1: pmx-led-blue-disk1 {
                                 marvell,pins = "mpp23";
                                 marvell,function = "gpio";
                         };
+
                         pmx_led_blue_disk2: pmx-led-blue-disk2 {
                                 marvell,pins = "mpp22";
                                 marvell,function = "gpio";
                         };
+
                         pmx_led_blue_backup: pmx-led-blue-backup {
                                 marvell,pins = "mpp29";
                                 marvell,function = "gpio";
                         };
+
+                        pmx_poweroff: pmx-poweroff {
+                                marvell,pins = "mpp30";
+                                marvell,function = "gpio";
+                        };
                 };
 
                 clocks {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       g762_clk: fixedclk {
+                       g762_clk: g762-oscillator {
                                  compatible = "fixed-clock";
                                  #clock-cells = <0>;
                                  clock-frequency = <8192>;
@@ -112,69 +132,80 @@
 
                 power_led {
                         label = "status:blue:power_led";
-                        gpios = <&gpio0 31 1>;   /* GPIO 31 Active Low */
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+                        default-state = "keep";
                 };
+
                 activity_led {
                         label = "status:blue:activity_led";
-                        gpios = <&gpio1 6 1>;    /* GPIO 38 Active Low */
+                        gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
                 };
+
                 disk1_led {
                         label = "status:blue:disk1_led";
-                        gpios = <&gpio0 23 1>;   /* GPIO 23 Active Low */
+                        gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
                 };
+
                 disk2_led {
                         label = "status:blue:disk2_led";
-                        gpios = <&gpio0 22 1>;   /* GPIO 22 Active Low */
+                        gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
                 };
+
                 backup_led {
                         label = "status:blue:backup_led";
-                        gpios = <&gpio0 29 1>;   /* GPIO 29 Active Low*/
+                        gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
                 };
         };
 
-        gpio_keys {
+        gpio-keys {
                 compatible = "gpio-keys";
-                #address-cells = <1>;
-                #size-cells = <0>;
                 pinctrl-0 = <&pmx_button_power &pmx_button_backup
                              &pmx_button_reset>;
                 pinctrl-names = "default";
 
-                button@1 {
+                power-button {
                         label = "Power Button";
-                        linux,code = <116>;     /* KEY_POWER */
-                        gpios = <&gpio1 15 1>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
                 };
-                button@2 {
+
+                reset-button {
                         label = "Reset Button";
-                        linux,code = <0x198>;   /* KEY_RESTART */
-                        gpios = <&gpio0 13 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
                 };
-                button@3 {
+
+                backup-button {
                         label = "Backup Button";
-                        linux,code = <133>;     /* KEY_COPY */
-                        gpios = <&gpio1 13 1>;
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
                 };
         };
 
-        regulators {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                usb_power: regulator@1 {
-                        compatible = "regulator-fixed";
-                        reg = <1>;
-                        regulator-name = "USB 3.0 Power";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                        enable-active-high;
-                        regulator-always-on;
-                        regulator-boot-on;
-                        gpio = <&gpio1 14 0>;
-                };
-        };
+        gpio-poweroff {
+                compatible = "gpio-poweroff";
+                pinctrl-0 = <&pmx_poweroff>;
+                pinctrl-names = "default";
+                gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
+        };
+
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                usb3_regulator: usb3-regulator {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "USB 3.0 Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+                };
+        };
 };
 
 &nand {
@@ -210,7 +241,7 @@
 &mdio {
         status = "okay";
 
-        ethphy0: ethernet-phy@0 {
+        ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */
                 device_type = "ethernet-phy";
                 reg = <0>;
         };
diff --git a/arch/arm/boot/dts/kirkwood-netgear_readynas_nv+_v2.dts b/arch/arm/boot/dts/kirkwood-netgear_readynas_nv+_v2.dts
new file mode 100644
index 000000000000..7c8a0d9d8d1f
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-netgear_readynas_nv+_v2.dts
@@ -0,0 +1,268 @@
+/*
+ * Device Tree file for NETGEAR ReadyNAS NV+ v2
+ *
+ * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6282.dtsi"
+
+/ {
+        model = "NETGEAR ReadyNAS NV+ v2";
+        compatible = "netgear,readynas-nv+-v2", "netgear,readynas", "marvell,kirkwood-88f6282", "marvell,kirkwood";
+
+        memory { /* 256 MB */
+                device_type = "memory";
+                reg = <0x00000000 0x10000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200n8 earlyprintk";
+        };
+
+        mbus {
+                pcie-controller {
+                        status = "okay";
+
+                        /* Connected to NEC uPD720200 USB 3.0 controller */
+                        pcie@1,0 {
+                                /* Port 0, Lane 0 */
+                                status = "okay";
+                        };
+                };
+        };
+
+        ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+                        pmx_button_power: pmx-button-power {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_button_backup: pmx-button-backup {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_button_reset: pmx-button-reset {
+                                marvell,pins = "mpp13";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_blue_power: pmx-led-blue-power {
+                                marvell,pins = "mpp31";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_blue_backup: pmx-led-blue-backup {
+                                marvell,pins = "mpp22";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_blue_disk1: pmx-led-blue-disk1 {
+                                marvell,pins = "mpp20";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_blue_disk2: pmx-led-blue-disk2 {
+                                marvell,pins = "mpp23";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_blue_disk3: pmx-led-blue-disk3 {
+                                marvell,pins = "mpp24";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_blue_disk4: pmx-led-blue-disk4 {
+                                marvell,pins = "mpp29";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_poweroff: pmx-poweroff {
+                                marvell,pins = "mpp30";
+                                marvell,function = "gpio";
+                        };
+                };
+
+                clocks {
+                       g762_clk: g762-oscillator {
+                                 compatible = "fixed-clock";
+                                 #clock-cells = <0>;
+                                 clock-frequency = <8192>;
+                       };
+                };
+
+                i2c@11000 {
+                        status = "okay";
+
+                        rs5c372a: rs5c372a@32 {
+                                compatible = "ricoh,rs5c372a";
+                                reg = <0x32>;
+                        };
+
+                        g762: g762@3e {
+                                compatible = "gmt,g762";
+                                reg = <0x3e>;
+                                clocks = <&g762_clk>; /* input clock */
+                                fan_gear_mode = <0>;
+                                fan_startv = <1>;
+                                pwm_polarity = <0>;
+                        };
+                };
+
+                serial@12000 {
+                        pinctrl-0 = <&pmx_uart0>;
+                        pinctrl-names = "default";
+                        status = "okay";
+                };
+
+                sata@80000 { /* Connected to Marvell 88SM4140 SATA port multiplier */
+                        status = "okay";
+                        nr-ports = <1>;
+                };
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+                pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_backup
+                              &pmx_led_blue_disk1 &pmx_led_blue_disk2
+                              &pmx_led_blue_disk3 &pmx_led_blue_disk3 >;
+                pinctrl-names = "default";
+
+                power_led {
+                        label = "status:blue:power_led";
+                        gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "default-on";
+                };
+
+                backup_led {
+                        label = "status:blue:backup_led";
+                        gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+                };
+
+                disk1_led {
+                        label = "status:blue:disk1_led";
+                        gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
+                };
+
+                disk2_led {
+                        label = "status:blue:disk2_led";
+                        gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+                };
+
+                disk3_led {
+                        label = "status:blue:disk3_led";
+                        gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+                };
+
+                disk4_led {
+                        label = "status:blue:disk4_led";
+                        gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+                };
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                pinctrl-0 = <&pmx_button_power &pmx_button_backup
+                             &pmx_button_reset>;
+                pinctrl-names = "default";
+
+                power-button {
+                        label = "Power Button";
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+                };
+
+                reset-button {
+                        label = "Reset Button";
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+                };
+
+                backup-button {
+                        label = "Backup Button";
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+                };
+        };
+
+        gpio-poweroff {
+                compatible = "gpio-poweroff";
+                pinctrl-0 = <&pmx_poweroff>;
+                pinctrl-names = "default";
+                gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
+        };
+
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                usb3_regulator: usb3-regulator {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "USB 3.0 Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+                };
+        };
+};
+
+&nand {
+        status = "okay";
+
+        partition@0 {
+                label = "u-boot";
+                reg = <0x0000000 0x180000>;
+                read-only;
+        };
+
+        partition@180000 {
+                label = "u-boot-env";
+                reg = <0x180000 0x20000>;
+        };
+
+        partition@200000 {
+                label = "uImage";
+                reg = <0x0200000 0x600000>;
+        };
+
+        partition@800000 {
+                label = "minirootfs";
+                reg = <0x0800000 0x1000000>;
+        };
+
+        partition@1800000 {
+                label = "jffs2";
+                reg = <0x1800000 0x6800000>;
+        };
+};
+
+&mdio {
+        status = "okay";
+
+        ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */
+                device_type = "ethernet-phy";
+                reg = <0>;
+        };
+};
+
+&eth0 {
+        status = "okay";
+
+        ethernet0-port@0 {
+                phy-handle = <&ethphy0>;
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
index 2fcb82e20828..ae1ccbe41029 100644
--- a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
+++ b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
@@ -64,8 +64,8 @@
 
                 button@1 {
                         label = "Power push button";
-                        linux,code = <116>;
-                        gpios = <&gpio1 0 0>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
                 };
         };
 
@@ -74,13 +74,13 @@
 
                 red-fail {
                         label = "ns2:red:fail";
-                        gpios = <&gpio0 12 0>;
+                        gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
                 };
         };
 
         gpio_poweroff {
                 compatible = "gpio-poweroff";
-                gpios = <&gpio0 31 0>;
+                gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
         };
 
 };
diff --git a/arch/arm/boot/dts/kirkwood-ns2lite.dts b/arch/arm/boot/dts/kirkwood-ns2lite.dts
index 279607093cdb..1f2ca60d8b3d 100644
--- a/arch/arm/boot/dts/kirkwood-ns2lite.dts
+++ b/arch/arm/boot/dts/kirkwood-ns2lite.dts
@@ -25,8 +25,8 @@
 
                 blue-sata {
                         label = "ns2:blue:sata";
-                        gpios = <&gpio0 30 1>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "ide-disk";
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-ns2max.dts b/arch/arm/boot/dts/kirkwood-ns2max.dts
index defdc77fb550..72c78d0b1116 100644
--- a/arch/arm/boot/dts/kirkwood-ns2max.dts
+++ b/arch/arm/boot/dts/kirkwood-ns2max.dts
@@ -22,10 +22,10 @@
 
         gpio_fan {
                 compatible = "gpio-fan";
-                gpios = <&gpio0 22 1
-                         &gpio0  7 1
-                         &gpio1  1 1
-                         &gpio0 23 1>;
+                gpios = <&gpio0 22 GPIO_ACTIVE_LOW
+                         &gpio0  7 GPIO_ACTIVE_LOW
+                         &gpio1  1 GPIO_ACTIVE_LOW
+                         &gpio0 23 GPIO_ACTIVE_LOW>;
                 gpio-fan,speed-map =
                         <   0  0
                          1500 15
@@ -36,7 +36,7 @@
                          3300 10
                          4300  9
                          5500  8>;
-                alarm-gpios = <&gpio0 25 1>;
+                alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
         };
 
         ns2-leds {
diff --git a/arch/arm/boot/dts/kirkwood-ns2mini.dts b/arch/arm/boot/dts/kirkwood-ns2mini.dts
index adbafdd90991..c441bf62c09f 100644
--- a/arch/arm/boot/dts/kirkwood-ns2mini.dts
+++ b/arch/arm/boot/dts/kirkwood-ns2mini.dts
@@ -23,10 +23,10 @@
 
         gpio_fan {
                 compatible = "gpio-fan";
-                gpios = <&gpio0 22 1
-                         &gpio0  7 1
-                         &gpio1  1 1
-                         &gpio0 23 1>;
+                gpios = <&gpio0 22 GPIO_ACTIVE_LOW
+                         &gpio0  7 GPIO_ACTIVE_LOW
+                         &gpio1  1 GPIO_ACTIVE_LOW
+                         &gpio0 23 GPIO_ACTIVE_LOW>;
                 gpio-fan,speed-map =
                         <   0  0
                          3000 15
@@ -37,7 +37,7 @@
                          7140 10
                          7980  9
                          9200  8>;
-                alarm-gpios = <&gpio0 25 1>;
+                alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
         };
 
         ns2-leds {
diff --git a/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi b/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi
index e3f915defd3d..aa78c2d11fe7 100644
--- a/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi
+++ b/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi
@@ -40,7 +40,7 @@
                 compatible = "gpio-poweroff";
                 pinctrl-0 = <&pmx_pwr_off>;
                 pinctrl-names = "default";
-                gpios = <&gpio1 16 0>;
+                gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
         };
 
         regulators {
@@ -58,7 +58,7 @@
                         regulator-max-microvolt = <5000000>;
                         regulator-always-on;
                         regulator-boot-on;
-                        gpio = <&gpio0 21 0>;
+                        gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-nsa310.dts b/arch/arm/boot/dts/kirkwood-nsa310.dts
index b5418bcaecce..03fa24cf3344 100644
--- a/arch/arm/boot/dts/kirkwood-nsa310.dts
+++ b/arch/arm/boot/dts/kirkwood-nsa310.dts
@@ -119,18 +119,18 @@
 
                 button@1 {
                         label = "Power Button";
-                        linux,code = <116>;
-                        gpios = <&gpio1 14 0>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
                 };
                 button@2 {
                         label = "Copy Button";
-                        linux,code = <133>;
-                        gpios = <&gpio1 5 1>;
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
                 };
                 button@3 {
                         label = "Reset Button";
-                        linux,code = <0x198>;
-                        gpios = <&gpio1 4 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
                 };
         };
 
@@ -145,43 +145,43 @@
 
                 green-sys {
                         label = "nsa310:green:sys";
-                        gpios = <&gpio0 28 0>;
+                        gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
                 };
                 red-sys {
                         label = "nsa310:red:sys";
-                        gpios = <&gpio0 29 0>;
+                        gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
                 };
                 green-hdd {
                         label = "nsa310:green:hdd";
-                        gpios = <&gpio1 9 0>;
+                        gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
                 };
                 red-hdd {
                         label = "nsa310:red:hdd";
-                        gpios = <&gpio1 10 0>;
+                        gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
                 };
                 green-esata {
                         label = "nsa310:green:esata";
-                        gpios = <&gpio0 12 0>;
+                        gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
                 };
                 red-esata {
                         label = "nsa310:red:esata";
-                        gpios = <&gpio0 13 0>;
+                        gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
                 };
                 green-usb {
                         label = "nsa310:green:usb";
-                        gpios = <&gpio0 15 0>;
+                        gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
                 };
                 red-usb {
                         label = "nsa310:red:usb";
-                        gpios = <&gpio0 16 0>;
+                        gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
                 };
                 green-copy {
                         label = "nsa310:green:copy";
-                        gpios = <&gpio1 7 0>;
+                        gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
                 };
                 red-copy {
                         label = "nsa310:red:copy";
-                        gpios = <&gpio1 8 0>;
+                        gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-nsa310a.dts b/arch/arm/boot/dts/kirkwood-nsa310a.dts
index ab0212b0e6f5..a5e779452867 100644
--- a/arch/arm/boot/dts/kirkwood-nsa310a.dts
+++ b/arch/arm/boot/dts/kirkwood-nsa310a.dts
@@ -107,18 +107,18 @@
 
                 button@1 {
                         label = "Power Button";
-                        linux,code = <116>;
-                        gpios = <&gpio1 14 0>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
                 };
                 button@2 {
                         label = "Copy Button";
-                        linux,code = <133>;
-                        gpios = <&gpio1 5 1>;
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
                 };
                 button@3 {
                         label = "Reset Button";
-                        linux,code = <0x198>;
-                        gpios = <&gpio1 4 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
                 };
         };
 
@@ -127,39 +127,39 @@
 
                 green-sys {
                         label = "nsa310:green:sys";
-                        gpios = <&gpio0 28 0>;
+                        gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
                 };
                 red-sys {
                         label = "nsa310:red:sys";
-                        gpios = <&gpio0 29 0>;
+                        gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
                 };
                 green-hdd {
                         label = "nsa310:green:hdd";
-                        gpios = <&gpio1 9 0>;
+                        gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
                 };
                 red-hdd {
                         label = "nsa310:red:hdd";
-                        gpios = <&gpio1 10 0>;
+                        gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
                 };
                 green-esata {
                         label = "nsa310:green:esata";
-                        gpios = <&gpio0 12 0>;
+                        gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
                 };
                 red-esata {
                         label = "nsa310:red:esata";
-                        gpios = <&gpio0 13 0>;
+                        gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
                 };
                 green-usb {
                         label = "nsa310:green:usb";
-                        gpios = <&gpio0 15 0>;
+                        gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
                 };
                 green-copy {
                         label = "nsa310:green:copy";
-                        gpios = <&gpio1 7 0>;
+                        gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
                 };
                 red-copy {
                         label = "nsa310:red:copy";
-                        gpios = <&gpio1 8 0>;
+                        gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
index f0e3d213604c..5c6a4f1b4e93 100644
--- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -101,17 +101,17 @@
 
                 led-red {
                         label = "obsa6:red:stat";
-                        gpios = <&gpio1 9 1>;
+                        gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
                 };
 
                 led-green {
                         label = "obsa6:green:stat";
-                        gpios = <&gpio1 10 1>;
+                        gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
                 };
 
                 led-yellow {
                         label = "obsa6:yellow:stat";
-                        gpios = <&gpio1 11 1>;
+                        gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
                 };
         };
 
@@ -124,8 +124,8 @@
 
                 button@1 {
                         label = "Init Button";
-                        linux,code = <116>;
-                        gpios = <&gpio1 6 0>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a7.dts b/arch/arm/boot/dts/kirkwood-openblocks_a7.dts
index 851fb2a60f20..c054ef61cff5 100644
--- a/arch/arm/boot/dts/kirkwood-openblocks_a7.dts
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a7.dts
@@ -126,17 +126,17 @@
 
                 led-red {
                         label = "obsa7:red:stat";
-                        gpios = <&gpio1 9 1>;
+                        gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
                 };
 
                 led-green {
                         label = "obsa7:green:stat";
-                        gpios = <&gpio1 10 1>;
+                        gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
                 };
 
                 led-yellow {
                         label = "obsa7:yellow:stat";
-                        gpios = <&gpio1 11 1>;
+                        gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
                 };
         };
 
@@ -149,8 +149,8 @@
 
                 button@1 {
                         label = "Init Button";
-                        linux,code = <116>;
-                        gpios = <&gpio1 6 0>;
+                        linux,code = <KEY_POWER>;
+                        gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi b/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi
index 1173d7fb31b2..7b1cd993e891 100644
--- a/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi
+++ b/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi
@@ -1,5 +1,5 @@
 /*
- * kirkwood-sheevaplug-common.dts - Common parts for Sheevaplugs
+ * kirkwood-sheevaplug-common.dtsi - Common parts for Sheevaplugs
  *
  * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com>
  *
diff --git a/arch/arm/boot/dts/kirkwood-sheevaplug-esata.dts b/arch/arm/boot/dts/kirkwood-sheevaplug-esata.dts
index eac6a21f3b1f..e2b4ea4f9e10 100644
--- a/arch/arm/boot/dts/kirkwood-sheevaplug-esata.dts
+++ b/arch/arm/boot/dts/kirkwood-sheevaplug-esata.dts
@@ -24,8 +24,8 @@
                         pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
                         pinctrl-names = "default";
                         status = "okay";
-                        cd-gpios = <&gpio1 12 1>;
-                        wp-gpios = <&gpio1 15 0>;
+                        cd-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+                        wp-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
                 };
         };
 
@@ -36,8 +36,8 @@
 
                 health {
                         label = "sheevaplug:blue:health";
-                        gpios = <&gpio1 17 1>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
+                        default-state = "keep";
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-sheevaplug.dts b/arch/arm/boot/dts/kirkwood-sheevaplug.dts
index bb61918313db..82f6abf120fd 100644
--- a/arch/arm/boot/dts/kirkwood-sheevaplug.dts
+++ b/arch/arm/boot/dts/kirkwood-sheevaplug.dts
@@ -1,5 +1,5 @@
 /*
- * kirkwood-sheevaplug-esata.dts - Device tree file for Sheevaplug
+ * kirkwood-sheevaplug.dts - Device tree file for Sheevaplug
  *
  * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com>
  *
@@ -31,13 +31,13 @@
 
                 health {
                         label = "sheevaplug:blue:health";
-                        gpios = <&gpio1 17 1>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
+                        default-state = "keep";
                 };
 
                 misc {
                         label = "sheevaplug:red:misc";
-                        gpios = <&gpio1 14 1>;
+                        gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts
index 320da677b984..40d6adf678ca 100644
--- a/arch/arm/boot/dts/kirkwood-topkick.dts
+++ b/arch/arm/boot/dts/kirkwood-topkick.dts
@@ -131,25 +131,25 @@
 
                 disk {
                         label = "topkick:yellow:disk";
-                        gpios = <&gpio0 21 1>;
+                        gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
                         linux,default-trigger = "ide-disk";
                 };
                 system2 {
                         label = "topkick:red:system";
-                        gpios = <&gpio1 5 1>;
+                        gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
                 };
                 system {
                         label = "topkick:blue:system";
-                        gpios = <&gpio1 6 1>;
+                        gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
                         default-state = "on";
                 };
                 wifi {
                         label = "topkick:green:wifi";
-                        gpios = <&gpio1 7 1>;
+                        gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
                 };
                 wifi2 {
                         label = "topkick:yellow:wifi";
-                        gpios = <&gpio1 16 1>;
+                        gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
                 };
         };
         regulators {
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6281.dts b/arch/arm/boot/dts/kirkwood-ts219-6281.dts
index f755bc1dc604..c17ae45e19be 100644
--- a/arch/arm/boot/dts/kirkwood-ts219-6281.dts
+++ b/arch/arm/boot/dts/kirkwood-ts219-6281.dts
@@ -41,13 +41,13 @@
 
                 button@1 {
                         label = "USB Copy";
-                        linux,code = <133>;
-                        gpios = <&gpio0 15 1>;
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
                 };
                 button@2 {
                         label = "Reset";
-                        linux,code = <0x198>;
-                        gpios = <&gpio0 16 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6282.dts b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
index 345562f75891..0713d072758a 100644
--- a/arch/arm/boot/dts/kirkwood-ts219-6282.dts
+++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
@@ -51,13 +51,13 @@
 
                 button@1 {
                         label = "USB Copy";
-                        linux,code = <133>;
-                        gpios = <&gpio1 11 1>;
+                        linux,code = <KEY_COPY>;
+                        gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
                 };
                 button@2 {
                         label = "Reset";
-                        linux,code = <0x198>;
-                        gpios = <&gpio1 5 1>;
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 8b73c80f1dad..1da94c187085 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -1,4 +1,6 @@
 /include/ "skeleton.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
 
 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
 
@@ -68,39 +70,21 @@
                 #address-cells = <1>;
                 #size-cells = <1>;
 
-                mbusc: mbus-controller@20000 {
-                        compatible = "marvell,mbus-controller";
-                        reg = <0x20000 0x80>, <0x1500 0x20>;
-                };
-
-                timer: timer@20300 {
-                        compatible = "marvell,orion-timer";
-                        reg = <0x20300 0x20>;
-                        interrupt-parent = <&bridge_intc>;
-                        interrupts = <1>, <2>;
-                        clocks = <&core_clk 0>;
-                };
-
-                intc: main-interrupt-ctrl@20200 {
-                        compatible = "marvell,orion-intc";
-                        interrupt-controller;
-                        #interrupt-cells = <1>;
-                        reg = <0x20200 0x10>, <0x20210 0x10>;
-                };
-
-                bridge_intc: bridge-interrupt-ctrl@20110 {
-                        compatible = "marvell,orion-bridge-intc";
-                        interrupt-controller;
-                        #interrupt-cells = <1>;
-                        reg = <0x20110 0x8>;
-                        interrupts = <1>;
-                        marvell,#interrupts = <6>;
-                };
-
                 core_clk: core-clocks@10030 {
                         compatible = "marvell,kirkwood-core-clock";
                         reg = <0x10030 0x4>;
-                        #clock-cells = <1>;
+                        #clock-cells = <1>;
+                };
+
+                spi@10600 {
+                        compatible = "marvell,orion-spi";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        interrupts = <23>;
+                        reg = <0x10600 0x28>;
+                        clocks = <&gate_clk 7>;
+                        status = "disabled";
                 };
 
                 gpio0: gpio@10100 {
@@ -127,6 +111,17 @@
                         clocks = <&gate_clk 7>;
                 };
 
+                i2c@11000 {
+                        compatible = "marvell,mv64xxx-i2c";
+                        reg = <0x11000 0x20>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupts = <29>;
+                        clock-frequency = <100000>;
+                        clocks = <&gate_clk 7>;
+                        status = "disabled";
+                };
+
                 serial@12000 {
                         compatible = "ns16550a";
                         reg = <0x12000 0x100>;
@@ -145,15 +140,18 @@
                         status = "disabled";
                 };
 
-                spi@10600 {
-                        compatible = "marvell,orion-spi";
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        interrupts = <23>;
-                        reg = <0x10600 0x28>;
-                        clocks = <&gate_clk 7>;
-                        status = "disabled";
+                mbusc: mbus-controller@20000 {
+                        compatible = "marvell,mbus-controller";
+                        reg = <0x20000 0x80>, <0x1500 0x20>;
+                };
+
+                bridge_intc: bridge-interrupt-ctrl@20110 {
+                        compatible = "marvell,orion-bridge-intc";
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        reg = <0x20110 0x8>;
+                        interrupts = <1>;
+                        marvell,#interrupts = <6>;
                 };
 
                 gate_clk: clock-gating-control@2011c {
@@ -163,6 +161,21 @@
                         #clock-cells = <1>;
                 };
 
+                intc: main-interrupt-ctrl@20200 {
+                        compatible = "marvell,orion-intc";
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        reg = <0x20200 0x10>, <0x20210 0x10>;
+                };
+
+                timer: timer@20300 {
+                        compatible = "marvell,orion-timer";
+                        reg = <0x20300 0x20>;
+                        interrupt-parent = <&bridge_intc>;
+                        interrupts = <1>, <2>;
+                        clocks = <&core_clk 0>;
+                };
+
                 wdt: watchdog-timer@20300 {
                         compatible = "marvell,orion-wdt";
                         reg = <0x20300 0x28>;
@@ -172,6 +185,14 @@
                         status = "okay";
                 };
 
+                ehci@50000 {
+                        compatible = "marvell,orion-ehci";
+                        reg = <0x50000 0x1000>;
+                        interrupts = <19>;
+                        clocks = <&gate_clk 3>;
+                        status = "okay";
+                };
+
                 xor@60800 {
                         compatible = "marvell,orion-xor";
                         reg = <0x60800 0x100
@@ -212,37 +233,6 @@
                         };
                 };
 
-                ehci@50000 {
-                        compatible = "marvell,orion-ehci";
-                        reg = <0x50000 0x1000>;
-                        interrupts = <19>;
-                        clocks = <&gate_clk 3>;
-                        status = "okay";
-                };
-
-                i2c@11000 {
-                        compatible = "marvell,mv64xxx-i2c";
-                        reg = <0x11000 0x20>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <29>;
-                        clock-frequency = <100000>;
-                        clocks = <&gate_clk 7>;
-                        status = "disabled";
-                };
-
-                mdio: mdio-bus@72004 {
-                        compatible = "marvell,orion-mdio";
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        reg = <0x72004 0x84>;
-                        interrupts = <46>;
-                        clocks = <&gate_clk 0>;
-                        status = "disabled";
-
-                        /* add phy nodes in board file */
-                };
-
                 eth0: ethernet-controller@72000 {
                         compatible = "marvell,kirkwood-eth";
                         #address-cells = <1>;
@@ -263,6 +253,18 @@
                         };
                 };
 
+                mdio: mdio-bus@72004 {
+                        compatible = "marvell,orion-mdio";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x72004 0x84>;
+                        interrupts = <46>;
+                        clocks = <&gate_clk 0>;
+                        status = "disabled";
+
+                        /* add phy nodes in board file */
+                };
+
                 eth1: ethernet-controller@76000 {
                         compatible = "marvell,kirkwood-eth";
                         #address-cells = <1>;
diff --git a/arch/arm/boot/dts/moxart-uc7112lx.dts b/arch/arm/boot/dts/moxart-uc7112lx.dts
new file mode 100644
index 000000000000..90749d55de0d
--- /dev/null
+++ b/arch/arm/boot/dts/moxart-uc7112lx.dts
@@ -0,0 +1,109 @@
+/* moxart-uc7112lx.dts - Device Tree file for MOXA UC-7112-LX
+ *
+ * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/dts-v1/;
+/include/ "moxart.dtsi"
+
+/ {
+        model = "MOXA UC-7112-LX";
+        compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart";
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x2000000>;
+        };
+
+        flash@80000000,0 {
+                compatible = "numonyx,js28f128", "cfi-flash";
+                reg = <0x80000000 0x1000000>;
+                bank-width = <2>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                partition@0 {
+                        label = "bootloader";
+                        reg = <0x0 0x40000>;
+                };
+                partition@40000 {
+                        label = "linux kernel";
+                        reg = <0x40000 0x1C0000>;
+                };
+                partition@200000 {
+                        label = "root filesystem";
+                        reg = <0x200000 0x800000>;
+                };
+                partition@a00000 {
+                        label = "user filesystem";
+                        reg = <0xa00000 0x600000>;
+                };
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                user-led {
+                        label = "ready-led";
+                        gpios = <&gpio 27 0x1>;
+                        default-state = "on";
+                        linux,default-trigger = "default-on";
+                };
+        };
+
+        gpio_keys_polled {
+                compatible = "gpio-keys-polled";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                poll-interval = <500>;
+                button@25 {
+                        label = "GPIO Reset";
+                        linux,code = <116>;
+                        gpios = <&gpio 25 1>;
+                };
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/mmcblk0p1 rw rootwait";
+        };
+};
+
+&clk_pll {
+        clocks = <&ref12>;
+};
+
+&sdhci {
+        status = "okay";
+};
+
+&mdio0 {
+        status = "okay";
+
+        ethphy0: ethernet-phy@1 {
+                device_type = "ethernet-phy";
+                compatible = "moxa,moxart-rtl8201cp", "ethernet-phy-ieee802.3-c22";
+                reg = <1>;
+        };
+};
+
+&mdio1 {
+        status = "okay";
+
+        ethphy1: ethernet-phy@1 {
+                device_type = "ethernet-phy";
+                compatible = "moxa,moxart-rtl8201cp", "ethernet-phy-ieee802.3-c22";
+                reg = <1>;
+        };
+};
+
+&mac0 {
+        status = "okay";
+};
+
+&mac1 {
+        status = "okay";
+};
+
+&uart0 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/moxart.dtsi b/arch/arm/boot/dts/moxart.dtsi
new file mode 100644
index 000000000000..da1d8effef97
--- /dev/null
+++ b/arch/arm/boot/dts/moxart.dtsi
@@ -0,0 +1,154 @@
+/* moxart.dtsi - Device Tree Include file for MOXA ART family SoC
+ *
+ * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        compatible = "moxa,moxart";
+        model = "MOXART";
+        interrupt-parent = <&intc>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "faraday,fa526";
+                        reg = <0>;
+                };
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                ref12: ref12M {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <12000000>;
+                };
+        };
+
+        soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x90000000 0x10000000>;
+                ranges;
+
+                intc: interrupt-controller@98800000 {
+                        compatible = "moxa,moxart-ic";
+                        reg = <0x98800000 0x38>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        interrupt-mask = <0x00080000>;
+                };
+
+                clk_pll: clk_pll@98100000 {
+                        compatible = "moxa,moxart-pll-clock";
+                        #clock-cells = <0>;
+                        reg = <0x98100000 0x34>;
+                };
+
+                clk_apb: clk_apb@98100000 {
+                        compatible = "moxa,moxart-apb-clock";
+                        #clock-cells = <0>;
+                        reg = <0x98100000 0x34>;
+                        clocks = <&clk_pll>;
+                };
+
+                timer: timer@98400000 {
+                        compatible = "moxa,moxart-timer";
+                        reg = <0x98400000 0x42>;
+                        interrupts = <19 1>;
+                        clocks = <&clk_apb>;
+                };
+
+                gpio: gpio@98700000 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                        compatible = "moxa,moxart-gpio";
+                        reg = <0x98700000 0xC>;
+                };
+
+                rtc: rtc {
+                        compatible = "moxa,moxart-rtc";
+                        gpio-rtc-sclk = <&gpio 5 0>;
+                        gpio-rtc-data = <&gpio 6 0>;
+                        gpio-rtc-reset = <&gpio 7 0>;
+                };
+
+                dma: dma@90500000 {
+                        compatible = "moxa,moxart-dma";
+                        reg = <0x90500080 0x40>;
+                        interrupts = <24 0>;
+                        #dma-cells = <1>;
+                };
+
+                watchdog: watchdog@98500000 {
+                        compatible = "moxa,moxart-watchdog";
+                        reg = <0x98500000 0x10>;
+                        clocks = <&clk_apb>;
+                };
+
+                sdhci: sdhci@98e00000 {
+                        compatible = "moxa,moxart-sdhci";
+                        reg = <0x98e00000 0x5C>;
+                        interrupts = <5 0>;
+                        clocks = <&clk_apb>;
+                        dmas =  <&dma 5>,
+                                <&dma 5>;
+                        dma-names = "tx", "rx";
+                        status = "disabled";
+                };
+
+                mdio0: mdio@90900090 {
+                        compatible = "moxa,moxart-mdio";
+                        reg = <0x90900090 0x8>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        status = "disabled";
+                };
+
+                mdio1: mdio@92000090 {
+                        compatible = "moxa,moxart-mdio";
+                        reg = <0x92000090 0x8>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        status = "disabled";
+                };
+
+                mac0: mac@90900000 {
+                        compatible = "moxa,moxart-mac";
+                        reg = <0x90900000 0x90>;
+                        interrupts = <25 0>;
+                        phy-handle = <&ethphy0>;
+                        phy-mode = "mii";
+                        status = "disabled";
+                };
+
+                mac1: mac@92000000 {
+                        compatible = "moxa,moxart-mac";
+                        reg = <0x92000000 0x90>;
+                        interrupts = <27 0>;
+                        phy-handle = <&ethphy1>;
+                        phy-mode = "mii";
+                        status = "disabled";
+                };
+
+                uart0: uart@98200000 {
+                        compatible = "ns16550a";
+                        reg = <0x98200000 0x20>;
+                        interrupts = <31 8>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clock-frequency = <14745600>;
+                        status = "disabled";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index aed83deaa991..fcc5bb63f03a 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -58,7 +58,7 @@
         status = "okay";
 
         ethphy: ethernet-phy {
-                device-type = "ethernet-phy";
+                device_type = "ethernet-phy";
                 reg = <8>;
         };
 };
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index e06c37e91ac6..9f51538cd9ef 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -42,6 +42,25 @@
                         interrupts = <6>, <7>, <8>, <9>;
                 };
 
+                spi@10600 {
+                        compatible = "marvell,orion-spi";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        reg = <0x10600 0x28>;
+                        status = "disabled";
+                };
+
+                i2c@11000 {
+                        compatible = "marvell,mv64xxx-i2c";
+                        reg = <0x11000 0x20>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupts = <5>;
+                        clock-frequency = <100000>;
+                        status = "disabled";
+                };
+
                 serial@12000 {
                         compatible = "ns16550a";
                         reg = <0x12000 0x100>;
@@ -60,15 +79,6 @@
                         status = "disabled";
                 };
 
-                spi@10600 {
-                        compatible = "marvell,orion-spi";
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        reg = <0x10600 0x28>;
-                        status = "disabled";
-                };
-
                 wdt@20300 {
                         compatible = "marvell,orion-wdt";
                         reg = <0x20300 0x28>;
@@ -82,30 +92,6 @@
                         status = "disabled";
                 };
 
-                ehci@a0000 {
-                        compatible = "marvell,orion-ehci";
-                        reg = <0xa0000 0x1000>;
-                        interrupts = <12>;
-                        status = "disabled";
-                };
-
-                sata@80000 {
-                        compatible = "marvell,orion-sata";
-                        reg = <0x80000 0x5000>;
-                        interrupts = <29>;
-                        status = "disabled";
-                };
-
-                i2c@11000 {
-                        compatible = "marvell,mv64xxx-i2c";
-                        reg = <0x11000 0x20>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <5>;
-                        clock-frequency = <100000>;
-                        status = "disabled";
-                };
-
                 xor@60900 {
                         compatible = "marvell,orion-xor";
                         reg = <0x60900 0x100
@@ -125,26 +111,6 @@
                         };
                 };
 
-                crypto@90000 {
-                        compatible = "marvell,orion-crypto";
-                        reg = <0x90000 0x10000>,
-                              <0xf2200000 0x800>;
-                        reg-names = "regs", "sram";
-                        interrupts = <28>;
-                        status = "okay";
-                };
-
-                mdio: mdio-bus@72004 {
-                        compatible = "marvell,orion-mdio";
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        reg = <0x72004 0x84>;
-                        interrupts = <22>;
-                        status = "disabled";
-
-                        /* add phy nodes in board file */
-                };
-
                 eth: ethernet-controller@72000 {
                         compatible = "marvell,orion-eth";
                         #address-cells = <1>;
@@ -162,5 +128,39 @@
                                 /* set phy-handle property in board file */
                         };
                 };
+
+                mdio: mdio-bus@72004 {
+                        compatible = "marvell,orion-mdio";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x72004 0x84>;
+                        interrupts = <22>;
+                        status = "disabled";
+
+                        /* add phy nodes in board file */
+                };
+
+                sata@80000 {
+                        compatible = "marvell,orion-sata";
+                        reg = <0x80000 0x5000>;
+                        interrupts = <29>;
+                        status = "disabled";
+                };
+
+                crypto@90000 {
+                        compatible = "marvell,orion-crypto";
+                        reg = <0x90000 0x10000>,
+                              <0xf2200000 0x800>;
+                        reg-names = "regs", "sram";
+                        interrupts = <28>;
+                        status = "okay";
+                };
+
+                ehci@a0000 {
+                        compatible = "marvell,orion-ehci";
+                        reg = <0xa0000 0x1000>;
+                        interrupts = <12>;
+                        status = "disabled";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index d7c5d721a5c7..a70546945985 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -10,5 +10,29 @@
                         marvell,intc-priority;
                         marvell,intc-nr-irqs = <34>;
                 };
+
+                pwm0: pwm@40b00000 {
+                        compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
+                        reg = <0x40b00000 0x10>;
+                        #pwm-cells = <1>;
+                };
+
+                pwm1: pwm@40b00010 {
+                        compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
+                        reg = <0x40b00010 0x10>;
+                        #pwm-cells = <1>;
+                };
+
+                pwm2: pwm@40c00000 {
+                        compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
+                        reg = <0x40c00000 0x10>;
+                        #pwm-cells = <1>;
+                };
+
+                pwm3: pwm@40c00010 {
+                        compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
+                        reg = <0x40c00010 0x10>;
+                        #pwm-cells = <1>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
index 1fb20f2333cc..b1deaf7e2e06 100644
--- a/arch/arm/boot/dts/r7s72100-genmai.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
@@ -9,7 +9,7 @@
  */
 
 /dts-v1/;
-/include/ "r7s72100.dtsi"
+#include "r7s72100.dtsi"
 
 / {
         model = "Genmai";
diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
index 9443e93d3cac..70b1fff8f4a3 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
@@ -9,7 +9,7 @@
  */
 
 /dts-v1/;
-/include/ "r8a73a4.dtsi"
+#include "r8a73a4.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 
 / {
@@ -25,6 +25,11 @@
                 reg = <0 0x40000000 0 0x40000000>;
         };
 
+        memory@200000000 {
+                device_type = "memory";
+                reg = <2 0x00000000 0 0x40000000>;
+        };
+
         vcc_mmc0: regulator@0 {
                 compatible = "regulator-fixed";
                 regulator-name = "MMC0 Vcc";
@@ -88,22 +93,22 @@
         pinctrl-0 = <&scifa0_pins>;
         pinctrl-names = "default";
 
-        scifa0_pins: scifa0 {
+        scifa0_pins: serial0 {
                 renesas,groups = "scifa0_data";
                 renesas,function = "scifa0";
         };
 
-        mmc0_pins: mmcif {
+        mmc0_pins: mmc {
                 renesas,groups = "mmc0_data8", "mmc0_ctrl";
                 renesas,function = "mmc0";
         };
 
-        sdhi0_pins: sdhi0 {
+        sdhi0_pins: sd0 {
                 renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
                 renesas,function = "sdhi0";
         };
 
-        sdhi1_pins: sdhi1 {
+        sdhi1_pins: sd1 {
                 renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
                 renesas,function = "sdhi1";
         };
diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
index 91436b58016f..ce085fa444a1 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
@@ -9,7 +9,8 @@
  */
 
 /dts-v1/;
-/include/ "r8a73a4.dtsi"
+#include "r8a73a4.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
         model = "APE6EVM";
@@ -24,6 +25,11 @@
                 reg = <0 0x40000000 0 0x40000000>;
         };
 
+        memory@200000000 {
+                device_type = "memory";
+                reg = <2 0x00000000 0 0x40000000>;
+        };
+
         ape6evm_fixed_3v3: fixedregulator@0 {
                 compatible = "regulator-fixed";
                 regulator-name = "3V3";
@@ -40,7 +46,7 @@
                         compatible = "smsc,lan9118", "smsc,lan9115";
                         reg = <0x08000000 0x1000>;
                         interrupt-parent = <&irqc1>;
-                        interrupts = <8 0x4>;
+                        interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
                         phy-mode = "mii";
                         reg-io-width = <4>;
                         smsc,irq-active-high;
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 287e047592a0..6b7ce89a68f7 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -9,6 +9,9 @@
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
         compatible = "renesas,r8a73a4";
         interrupt-parent = <&gic>;
@@ -36,15 +39,15 @@
                         <0 0xf1002000 0 0x1000>,
                         <0 0xf1004000 0 0x2000>,
                         <0 0xf1006000 0 0x2000>;
-                interrupts = <1 9 0xf04>;
+                interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
         };
 
         timer {
                 compatible = "arm,armv7-timer";
-                interrupts = <1 13 0xf08>,
-                                <1 14 0xf08>,
-                                <1 11 0xf08>,
-                                <1 10 0xf08>;
+                interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
         };
 
         irqc0: interrupt-controller@e61c0000 {
@@ -53,14 +56,38 @@
                 interrupt-controller;
                 reg = <0 0xe61c0000 0 0x200>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>,
-                                <0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>,
-                                <0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>,
-                                <0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>,
-                                <0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>,
-                                <0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>,
-                                <0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>,
-                                <0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>;
+                interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 1 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 2 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 3 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 4 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 5 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 6 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 7 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 8 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 9 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 10 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 11 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 12 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 13 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 14 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 15 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 16 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 17 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 18 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 19 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 20 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 21 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 22 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 23 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 24 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 25 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 26 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 27 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 28 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 29 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 30 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 31 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         irqc1: interrupt-controller@e61c0200 {
@@ -69,13 +96,32 @@
                 interrupt-controller;
                 reg = <0 0xe61c0200 0 0x200>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>,
-                                <0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>,
-                                <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>,
-                                <0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>,
-                                <0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>,
-                                <0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>,
-                                <0 56 4>, <0 57 4>;
+                interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 33 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 34 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 35 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 36 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 37 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 38 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 39 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 40 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 41 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 42 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 43 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 44 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 45 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 46 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 47 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 48 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 49 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 50 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 51 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 52 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 53 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 54 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 55 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 56 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 57 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         dmac: dma-multiplexer@0 {
@@ -91,27 +137,27 @@
                         compatible = "renesas,shdma-r8a73a4";
                         reg = <0 0xe6700020 0 0x89e0>;
                         interrupt-parent = <&gic>;
-                        interrupts = <0 220 4
-                                        0 200 4
-                                        0 201 4
-                                        0 202 4
-                                        0 203 4
-                                        0 204 4
-                                        0 205 4
-                                        0 206 4
-                                        0 207 4
-                                        0 208 4
-                                        0 209 4
-                                        0 210 4
-                                        0 211 4
-                                        0 212 4
-                                        0 213 4
-                                        0 214 4
-                                        0 215 4
-                                        0 216 4
-                                        0 217 4
-                                        0 218 4
-                                        0 219 4>;
+                        interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
+                                        0 200 IRQ_TYPE_LEVEL_HIGH
+                                        0 201 IRQ_TYPE_LEVEL_HIGH
+                                        0 202 IRQ_TYPE_LEVEL_HIGH
+                                        0 203 IRQ_TYPE_LEVEL_HIGH
+                                        0 204 IRQ_TYPE_LEVEL_HIGH
+                                        0 205 IRQ_TYPE_LEVEL_HIGH
+                                        0 206 IRQ_TYPE_LEVEL_HIGH
+                                        0 207 IRQ_TYPE_LEVEL_HIGH
+                                        0 208 IRQ_TYPE_LEVEL_HIGH
+                                        0 209 IRQ_TYPE_LEVEL_HIGH
+                                        0 210 IRQ_TYPE_LEVEL_HIGH
+                                        0 211 IRQ_TYPE_LEVEL_HIGH
+                                        0 212 IRQ_TYPE_LEVEL_HIGH
+                                        0 213 IRQ_TYPE_LEVEL_HIGH
+                                        0 214 IRQ_TYPE_LEVEL_HIGH
+                                        0 215 IRQ_TYPE_LEVEL_HIGH
+                                        0 216 IRQ_TYPE_LEVEL_HIGH
+                                        0 217 IRQ_TYPE_LEVEL_HIGH
+                                        0 218 IRQ_TYPE_LEVEL_HIGH
+                                        0 219 IRQ_TYPE_LEVEL_HIGH>;
                         interrupt-names = "error",
                                         "ch0", "ch1", "ch2", "ch3",
                                         "ch4", "ch5", "ch6", "ch7",
@@ -126,7 +172,7 @@
                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
                          <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 69 4>;
+                interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         i2c0: i2c@e6500000 {
@@ -135,7 +181,7 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0 0xe6500000 0 0x428>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 174 0x4>;
+                interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -145,7 +191,7 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0 0xe6510000 0 0x428>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 175 0x4>;
+                interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -155,7 +201,7 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0 0xe6520000 0 0x428>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 176 0x4>;
+                interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -165,7 +211,7 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0 0xe6530000 0 0x428>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 177 0x4>;
+                interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -175,7 +221,7 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0 0xe6540000 0 0x428>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 178 0x4>;
+                interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -185,7 +231,7 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0 0xe60b0000 0 0x428>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 179 0x4>;
+                interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -195,7 +241,7 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0 0xe6550000 0 0x428>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 184 0x4>;
+                interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -205,7 +251,7 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0 0xe6560000 0 0x428>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 185 0x4>;
+                interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -215,24 +261,24 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0 0xe6570000 0 0x428>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 173 0x4>;
+                interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
-        mmcif0: mmcif@ee200000 {
+        mmcif0: mmc@ee200000 {
                 compatible = "renesas,sh-mmcif";
                 reg = <0 0xee200000 0 0x80>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 169 0x4>;
+                interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
                 reg-io-width = <4>;
                 status = "disabled";
         };
 
-        mmcif1: mmcif@ee220000 {
+        mmcif1: mmc@ee220000 {
                 compatible = "renesas,sh-mmcif";
                 reg = <0 0xee220000 0 0x80>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 170 0x4>;
+                interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
                 reg-io-width = <4>;
                 status = "disabled";
         };
@@ -244,29 +290,29 @@
                 #gpio-cells = <2>;
         };
 
-        sdhi0: sdhi@ee100000 {
+        sdhi0: sd@ee100000 {
                 compatible = "renesas,sdhi-r8a73a4";
                 reg = <0 0xee100000 0 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 165 4>;
+                interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
                 cap-sd-highspeed;
                 status = "disabled";
         };
 
-        sdhi1: sdhi@ee120000 {
+        sdhi1: sd@ee120000 {
                 compatible = "renesas,sdhi-r8a73a4";
                 reg = <0 0xee120000 0 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 166 4>;
+                interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
                 cap-sd-highspeed;
                 status = "disabled";
         };
 
-        sdhi2: sdhi@ee140000 {
+        sdhi2: sd@ee140000 {
                 compatible = "renesas,sdhi-r8a73a4";
                 reg = <0 0xee140000 0 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 167 4>;
+                interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
                 cap-sd-highspeed;
                 status = "disabled";
         };
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index 1c56c5e56950..6d6fd3dff2d3 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -9,8 +9,9 @@
  */
 
 /dts-v1/;
-/include/ "r8a7740.dtsi"
+#include "r8a7740.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pwm/pwm.h>
 
 / {
@@ -86,31 +87,55 @@
                 pinctrl-0 = <&backlight_pins>;
                 pinctrl-names = "default";
         };
+
+        sound {
+                compatible = "simple-audio-card";
+
+                simple-audio-card,format = "i2s";
+
+                simple-audio-card,cpu {
+                        sound-dai = <&sh_fsi2 0>;
+                        bitclock-inversion;
+                };
+
+                simple-audio-card,codec {
+                        sound-dai = <&wm8978>;
+                        bitclock-master;
+                        frame-master;
+                        system-clock-frequency = <12288000>;
+                };
+        };
 };
 
 &i2c0 {
         status = "okay";
-        touchscreen: st1232@55 {
+        touchscreen@55 {
                 compatible = "sitronix,st1232";
                 reg = <0x55>;
                 interrupt-parent = <&irqpin1>;
-                interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
+                interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                 pinctrl-0 = <&st1232_pins>;
                 pinctrl-names = "default";
                 gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
         };
+
+        wm8978: wm8978@1a {
+                #sound-dai-cells = <0>;
+                compatible = "wlf,wm8978";
+                reg = <0x1a>;
+        };
 };
 
 &pfc {
         pinctrl-0 = <&scifa1_pins>;
         pinctrl-names = "default";
 
-        scifa1_pins: scifa1 {
+        scifa1_pins: serial1 {
                 renesas,groups = "scifa1_data";
                 renesas,function = "scifa1";
         };
 
-        st1232_pins: st1232 {
+        st1232_pins: touchscreen {
                 renesas,groups = "intc_irq10";
                 renesas,function = "intc";
         };
@@ -125,10 +150,16 @@
                 renesas,function = "mmc0";
         };
 
-        sdhi0_pins: sdhi0 {
+        sdhi0_pins: sd0 {
                 renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
                 renesas,function = "sdhi0";
         };
+
+        fsia_pins: sounda {
+                renesas,groups = "fsia_sclk_in", "fsia_mclk_out",
+                                 "fsia_data_in_1", "fsia_data_out_0";
+                renesas,function = "fsia";
+        };
 };
 
 &tpu {
@@ -155,3 +186,10 @@
         cd-gpios = <&pfc 167 GPIO_ACTIVE_LOW>;
         status = "okay";
 };
+
+&sh_fsi2 {
+        pinctrl-0 = <&fsia_pins>;
+        pinctrl-names = "default";
+
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
index 426cd9c3e1c4..a06a11e1a840 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
@@ -9,7 +9,7 @@
  */
 
 /dts-v1/;
-/include/ "r8a7740.dtsi"
+#include "r8a7740.dtsi"
 
 / {
         model = "armadillo 800 eva";
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index ae1e230f711d..2782f642acfc 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -10,6 +10,8 @@
 
 /include/ "skeleton.dtsi"
 
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
         compatible = "renesas,r8a7740";
 
@@ -34,12 +36,12 @@
 
         pmu {
                 compatible = "arm,cortex-a9-pmu";
-                interrupts = <0 83 4>;
+                interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         /* irqpin0: IRQ0 - IRQ7 */
         irqpin0: irqpin@e6900000 {
-                compatible = "renesas,intc-irqpin";
+                compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0xe6900000 4>,
@@ -48,19 +50,19 @@
                         <0xe6900040 1>,
                         <0xe6900060 1>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4>;
+                interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         /* irqpin1: IRQ8 - IRQ15 */
         irqpin1: irqpin@e6900004 {
-                compatible = "renesas,intc-irqpin";
+                compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0xe6900004 4>,
@@ -69,19 +71,19 @@
                         <0xe6900044 1>,
                         <0xe6900064 1>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4>;
+                interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         /* irqpin2: IRQ16 - IRQ23 */
         irqpin2: irqpin@e6900008 {
-                compatible = "renesas,intc-irqpin";
+                compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0xe6900008 4>,
@@ -90,19 +92,19 @@
                         <0xe6900048 1>,
                         <0xe6900068 1>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4>;
+                interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         /* irqpin3: IRQ24 - IRQ31 */
         irqpin3: irqpin@e690000c {
-                compatible = "renesas,intc-irqpin";
+                compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0xe690000c 4>,
@@ -111,14 +113,14 @@
                         <0xe690004c 1>,
                         <0xe690006c 1>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4
-                              0 149 0x4>;
+                interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH
+                              0 149 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         i2c0: i2c@fff20000 {
@@ -127,10 +129,10 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0xfff20000 0x425>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 201 0x4
-                              0 202 0x4
-                              0 203 0x4
-                              0 204 0x4>;
+                interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
+                              0 202 IRQ_TYPE_LEVEL_HIGH
+                              0 203 IRQ_TYPE_LEVEL_HIGH
+                              0 204 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -140,10 +142,10 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0xe6c20000 0x425>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 70 0x4
-                              0 71 0x4
-                              0 72 0x4
-                              0 73 0x4>;
+                interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
+                              0 71 IRQ_TYPE_LEVEL_HIGH
+                              0 72 IRQ_TYPE_LEVEL_HIGH
+                              0 73 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -162,36 +164,57 @@
                 #pwm-cells = <3>;
         };
 
-        mmcif0: mmcif@e6bd0000 {
+        mmcif0: mmc@e6bd0000 {
                 compatible = "renesas,sh-mmcif";
                 reg = <0xe6bd0000 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 56 4
-                                0 57 4>;
+                interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
+                              0 57 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
-        sdhi0: sdhi@e6850000 {
+        sdhi0: sd@e6850000 {
                 compatible = "renesas,sdhi-r8a7740";
                 reg = <0xe6850000 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 117 4
-                                0 118 4
-                                0 119 4>;
+                interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
+                              0 118 IRQ_TYPE_LEVEL_HIGH
+                              0 119 IRQ_TYPE_LEVEL_HIGH>;
                 cap-sd-highspeed;
                 cap-sdio-irq;
                 status = "disabled";
         };
 
-        sdhi1: sdhi@e6860000 {
+        sdhi1: sd@e6860000 {
                 compatible = "renesas,sdhi-r8a7740";
                 reg = <0xe6860000 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 121 4
-                                0 122 4
-                                0 123 4>;
+                interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
+                              0 122 IRQ_TYPE_LEVEL_HIGH
+                              0 123 IRQ_TYPE_LEVEL_HIGH>;
+                cap-sd-highspeed;
+                cap-sdio-irq;
+                status = "disabled";
+        };
+
+        sdhi2: sd@e6870000 {
+                compatible = "renesas,sdhi-r8a7740";
+                reg = <0xe6870000 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
+                              0 126 IRQ_TYPE_LEVEL_HIGH
+                              0 127 IRQ_TYPE_LEVEL_HIGH>;
                 cap-sd-highspeed;
                 cap-sdio-irq;
                 status = "disabled";
         };
+
+        sh_fsi2: sound@fe1f0000 {
+                #sound-dai-cells = <1>;
+                compatible = "renesas,sh_fsi2";
+                reg = <0xfe1f0000 0x400>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 9 0x4>;
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
index 969e386e852c..bb62c7a906f4 100644
--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
@@ -15,7 +15,8 @@
  */
 
 /dts-v1/;
-/include/ "r8a7778.dtsi"
+#include "r8a7778.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
         model = "bockw";
@@ -45,13 +46,65 @@
 
                 phy-mode = "mii";
                 interrupt-parent = <&irqpin>;
-                interrupts = <0 0>; /* IRQ0: hwirq 0 on irqpin */
+                interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
                 reg-io-width = <4>;
                 vddvario-supply = <&fixedregulator3v3>;
                 vdd33a-supply = <&fixedregulator3v3>;
         };
+
+};
+
+&mmcif {
+        pinctrl-0 = <&mmc_pins>;
+        pinctrl-names = "default";
+
+        vmmc-supply = <&fixedregulator3v3>;
+        bus-width = <8>;
+        broken-cd;
+        status = "okay";
 };
 
 &irqpin {
         status = "okay";
 };
+
+&pfc {
+        pinctrl-0 = <&scif0_pins>;
+        pinctrl-names = "default";
+
+        scif0_pins: serial0 {
+                renesas,groups = "scif0_data_a", "scif0_ctrl";
+                renesas,function = "scif0";
+        };
+
+        mmc_pins: mmc {
+                renesas,groups = "mmc_data8", "mmc_ctrl";
+                renesas,function = "mmc";
+        };
+
+        sdhi0_pins: sd0 {
+                renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
+                                  "sdhi0_cd", "sdhi0_wp";
+                renesas,function = "sdhi0";
+        };
+
+        hspi0_pins: hspi0 {
+                renesas,groups = "hspi0_a";
+                renesas,function = "hspi0";
+        };
+};
+
+&sdhi0 {
+        pinctrl-0 = <&sdhi0_pins>;
+        pinctrl-names = "default";
+
+        vmmc-supply = <&fixedregulator3v3>;
+        bus-width = <4>;
+        status = "okay";
+};
+
+&hspi0 {
+        pinctrl-0 = <&hspi0_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts
index 12bbebc9c955..46a884d45175 100644
--- a/arch/arm/boot/dts/r8a7778-bockw.dts
+++ b/arch/arm/boot/dts/r8a7778-bockw.dts
@@ -15,7 +15,7 @@
  */
 
 /dts-v1/;
-/include/ "r8a7778.dtsi"
+#include "r8a7778.dtsi"
 
 / {
         model = "bockw";
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index a6308a399e2d..ddb3bd7a8838 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -16,6 +16,8 @@
 
 /include/ "skeleton.dtsi"
 
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
         compatible = "renesas,r8a7778";
 
@@ -25,6 +27,12 @@
                 };
         };
 
+        aliases {
+                spi0 = &hspi0;
+                spi1 = &hspi1;
+                spi2 = &hspi2;
+        };
+
         gic: interrupt-controller@fe438000 {
                 compatible = "arm,cortex-a9-gic";
                 #interrupt-cells = <3>;
@@ -35,7 +43,7 @@
 
         /* irqpin: IRQ0 - IRQ3 */
         irqpin: irqpin@fe78001c {
-                compatible = "renesas,intc-irqpin";
+                compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 status = "disabled"; /* default off */
@@ -45,10 +53,10 @@
                         <0xfe780044 4>,
                         <0xfe780064 4>;
                 interrupt-parent = <&gic>;
-                interrupts =   <0 27 0x4
-                                0 28 0x4
-                                0 29 0x4
-                                0 30 0x4>;
+                interrupts =   <0 27 IRQ_TYPE_LEVEL_HIGH
+                                0 28 IRQ_TYPE_LEVEL_HIGH
+                                0 29 IRQ_TYPE_LEVEL_HIGH
+                                0 30 IRQ_TYPE_LEVEL_HIGH>;
                 sense-bitfield-width = <2>;
         };
 
@@ -56,7 +64,7 @@
                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
                 reg = <0xffc40000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 103 0x4>;
+                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 0 32>;
@@ -68,7 +76,7 @@
                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
                 reg = <0xffc41000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 103 0x4>;
+                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 32 32>;
@@ -80,7 +88,7 @@
                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
                 reg = <0xffc42000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 103 0x4>;
+                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 64 32>;
@@ -92,7 +100,7 @@
                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
                 reg = <0xffc43000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 103 0x4>;
+                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 96 32>;
@@ -104,7 +112,7 @@
                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
                 reg = <0xffc44000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 103 0x4>;
+                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 128 27>;
@@ -114,6 +122,148 @@
 
         pfc: pfc@fffc0000 {
                 compatible = "renesas,pfc-r8a7778";
-                reg = <0xfffc000 0x118>;
+                reg = <0xfffc0000 0x118>;
+        };
+
+        i2c0: i2c@ffc70000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,i2c-r8a7778";
+                reg = <0xffc70000 0x1000>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        i2c1: i2c@ffc71000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,i2c-r8a7778";
+                reg = <0xffc71000 0x1000>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        i2c2: i2c@ffc72000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,i2c-r8a7778";
+                reg = <0xffc72000 0x1000>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        i2c3: i2c@ffc73000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,i2c-r8a7778";
+                reg = <0xffc73000 0x1000>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        mmcif: mmc@ffe4e000 {
+                compatible = "renesas,sh-mmcif";
+                reg = <0xffe4e000 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        sdhi0: sd@ffe4c000 {
+                compatible = "renesas,sdhi-r8a7778";
+                reg = <0xffe4c000 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
+                cap-sd-highspeed;
+                cap-sdio-irq;
+                status = "disabled";
+        };
+
+        sdhi1: sd@ffe4d000 {
+                compatible = "renesas,sdhi-r8a7778";
+                reg = <0xffe4d000 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
+                cap-sd-highspeed;
+                cap-sdio-irq;
+                status = "disabled";
+        };
+
+        sdhi2: sd@ffe4f000 {
+                compatible = "renesas,sdhi-r8a7778";
+                reg = <0xffe4f000 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+                cap-sd-highspeed;
+                cap-sdio-irq;
+                status = "disabled";
+        };
+
+        i2c0: i2c@ffc70000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,i2c-r8a7778";
+                reg = <0xffc70000 0x1000>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        i2c1: i2c@ffc71000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,i2c-r8a7778";
+                reg = <0xffc71000 0x1000>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        i2c2: i2c@ffc72000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,i2c-r8a7778";
+                reg = <0xffc72000 0x1000>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        i2c3: i2c@ffc73000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,i2c-r8a7778";
+                reg = <0xffc73000 0x1000>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        hspi0: spi@fffc7000 {
+                compatible = "renesas,hspi";
+                reg = <0xfffc7000 0x18>;
+                interrupt-controller = <&gic>;
+                interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        hspi1: spi@fffc8000 {
+                compatible = "renesas,hspi";
+                reg = <0xfffc8000 0x18>;
+                interrupt-controller = <&gic>;
+                interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        hspi2: spi@fffc6000 {
+                compatible = "renesas,hspi";
+                reg = <0xfffc6000 0x18>;
+                interrupt-controller = <&gic>;
+                interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
         };
 };
diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
index ab4110aa3c3b..76f5eef7d1cc 100644
--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
@@ -10,8 +10,9 @@
  */
 
 /dts-v1/;
-/include/ "r8a7779.dtsi"
+#include "r8a7779.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
         model = "marzen";
@@ -43,7 +44,7 @@
 
                 phy-mode = "mii";
                 interrupt-parent = <&irqpin0>;
-                interrupts = <1 0>; /* IRQ1: hwirq 1 on irqpin0 */
+                interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
                 reg-io-width = <4>;
                 vddvario-supply = <&fixedregulator3v3>;
                 vdd33a-supply = <&fixedregulator3v3>;
@@ -68,7 +69,7 @@
 };
 
 &pfc {
-        pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
+        pinctrl-0 = <&scif2_pins &scif4_pins>;
         pinctrl-names = "default";
 
         lan0_pins: lan0 {
@@ -82,19 +83,38 @@
                 };
         };
 
-        scif2_pins: scif2 {
+        scif2_pins: serial2 {
                 renesas,groups = "scif2_data_c";
                 renesas,function = "scif2";
         };
 
-        scif4_pins: scif4 {
+        scif4_pins: serial4 {
                 renesas,groups = "scif4_data";
                 renesas,function = "scif4";
         };
 
-        sdhi0_pins: sdhi0 {
-                renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
-                                 "sdhi0_wp";
+        sdhi0_pins: sd0 {
+                renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
                 renesas,function = "sdhi0";
         };
+
+        hspi0_pins: hspi0 {
+                renesas,groups = "hspi0";
+                renesas,function = "hspi0";
+        };
+};
+
+&sdhi0 {
+        pinctrl-0 = <&sdhi0_pins>;
+        pinctrl-names = "default";
+
+        vmmc-supply = <&fixedregulator3v3>;
+        bus-width = <4>;
+        status = "okay";
+};
+
+&hspi0 {
+        pinctrl-0 = <&hspi0_pins>;
+        pinctrl-names = "default";
+        status = "okay";
 };
diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
index f3f7f7999736..a7af2c2371f2 100644
--- a/arch/arm/boot/dts/r8a7779-marzen.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
@@ -10,7 +10,7 @@
  */
 
 /dts-v1/;
-/include/ "r8a7779.dtsi"
+#include "r8a7779.dtsi"
 
 / {
         model = "marzen";
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 19faeac3fd2e..d0561d4c7c46 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -11,6 +11,8 @@
 
 /include/ "skeleton.dtsi"
 
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
         compatible = "renesas,r8a7779";
 
@@ -40,6 +42,12 @@
                 };
         };
 
+        aliases {
+                spi0 = &hspi0;
+                spi1 = &hspi1;
+                spi2 = &hspi2;
+        };
+
         gic: interrupt-controller@f0001000 {
                 compatible = "arm,cortex-a9-gic";
                 #interrupt-cells = <3>;
@@ -52,7 +60,7 @@
                 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                 reg = <0xffc40000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 141 0x4>;
+                interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 0 32>;
@@ -64,7 +72,7 @@
                 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                 reg = <0xffc41000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 142 0x4>;
+                interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 32 32>;
@@ -76,7 +84,7 @@
                 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                 reg = <0xffc42000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 143 0x4>;
+                interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 64 32>;
@@ -88,7 +96,7 @@
                 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                 reg = <0xffc43000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 144 0x4>;
+                interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 96 32>;
@@ -100,7 +108,7 @@
                 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                 reg = <0xffc44000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 145 0x4>;
+                interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 128 32>;
@@ -112,7 +120,7 @@
                 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                 reg = <0xffc45000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 146 0x4>;
+                interrupts = <0 146 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 160 32>;
@@ -124,7 +132,7 @@
                 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                 reg = <0xffc46000 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 147 0x4>;
+                interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 192 9>;
@@ -133,7 +141,7 @@
         };
 
         irqpin0: irqpin@fe780010 {
-                compatible = "renesas,intc-irqpin";
+                compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
                 #interrupt-cells = <2>;
                 status = "disabled";
                 interrupt-controller;
@@ -143,50 +151,50 @@
                         <0xfe780044 4>,
                         <0xfe780064 4>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 27 0x4
-                                0 28 0x4
-                                0 29 0x4
-                                0 30 0x4>;
+                interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
+                              0 28 IRQ_TYPE_LEVEL_HIGH
+                              0 29 IRQ_TYPE_LEVEL_HIGH
+                              0 30 IRQ_TYPE_LEVEL_HIGH>;
                 sense-bitfield-width = <2>;
         };
 
         i2c0: i2c@ffc70000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,rmobile-iic";
+                compatible = "renesas,i2c-r8a7779";
                 reg = <0xffc70000 0x1000>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 79 0x4>;
+                interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
         i2c1: i2c@ffc71000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,rmobile-iic";
+                compatible = "renesas,i2c-r8a7779";
                 reg = <0xffc71000 0x1000>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 82 0x4>;
+                interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
         i2c2: i2c@ffc72000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,rmobile-iic";
+                compatible = "renesas,i2c-r8a7779";
                 reg = <0xffc72000 0x1000>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 80 0x4>;
+                interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
         i2c3: i2c@ffc73000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,rmobile-iic";
+                compatible = "renesas,i2c-r8a7779";
                 reg = <0xffc73000 0x1000>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 81 0x4>;
+                interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -204,6 +212,70 @@
                 compatible = "renesas,rcar-sata";
                 reg = <0xfc600000 0x2000>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 100 0x4>;
+                interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
+        };
+
+        sdhi0: sd@ffe4c000 {
+                compatible = "renesas,sdhi-r8a7779";
+                reg = <0xffe4c000 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
+                cap-sd-highspeed;
+                cap-sdio-irq;
+                status = "disabled";
+        };
+
+        sdhi1: sd@ffe4d000 {
+                compatible = "renesas,sdhi-r8a7779";
+                reg = <0xffe4d000 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
+                cap-sd-highspeed;
+                cap-sdio-irq;
+                status = "disabled";
+        };
+
+        sdhi2: sd@ffe4e000 {
+                compatible = "renesas,sdhi-r8a7779";
+                reg = <0xffe4e000 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
+                cap-sd-highspeed;
+                cap-sdio-irq;
+                status = "disabled";
+        };
+
+        sdhi3: sd@ffe4f000 {
+                compatible = "renesas,sdhi-r8a7779";
+                reg = <0xffe4f000 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
+                cap-sd-highspeed;
+                cap-sdio-irq;
+                status = "disabled";
+        };
+
+        hspi0: spi@fffc7000 {
+                compatible = "renesas,hspi";
+                reg = <0xfffc7000 0x18>;
+                interrupt-controller = <&gic>;
+                interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        hspi1: spi@fffc8000 {
+                compatible = "renesas,hspi";
+                reg = <0xfffc8000 0x18>;
+                interrupt-controller = <&gic>;
+                interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        hspi2: spi@fffc6000 {
+                compatible = "renesas,hspi";
+                reg = <0xfffc6000 0x18>;
+                interrupt-controller = <&gic>;
+                interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
         };
 };
diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
index c462ef138922..dfedc0ea82e1 100644
--- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
+++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
@@ -9,7 +9,7 @@
  */
 
 /dts-v1/;
-/include/ "r8a7790.dtsi"
+#include "r8a7790.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 
 / {
@@ -25,6 +25,11 @@
                 reg = <0 0x40000000 0 0x80000000>;
         };
 
+        memory@180000000 {
+                device_type = "memory";
+                reg = <1 0x80000000 0 0x80000000>;
+        };
+
         lbsc {
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -42,4 +47,43 @@
                         gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
                 };
         };
+
+        fixedregulator3v3: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "fixed-3.3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-boot-on;
+                regulator-always-on;
+        };
+};
+
+&pfc {
+        pinctrl-0 = <&scif0_pins &scif1_pins>;
+        pinctrl-names = "default";
+
+        scif0_pins: serial0 {
+                renesas,groups = "scif0_data";
+                renesas,function = "scif0";
+        };
+
+        scif1_pins: serial1 {
+                renesas,groups = "scif1_data";
+                renesas,function = "scif1";
+        };
+
+        mmc1_pins: mmc1 {
+                renesas,groups = "mmc1_data8", "mmc1_ctrl";
+                renesas,function = "mmc1";
+        };
+};
+
+&mmcif1 {
+        pinctrl-0 = <&mmc1_pins>;
+        pinctrl-names = "default";
+
+        vmmc-supply = <&fixedregulator3v3>;
+        bus-width = <8>;
+        non-removable;
+        status = "okay";
 };
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 203bd089af29..10e6a08164e5 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -9,7 +9,7 @@
  */
 
 /dts-v1/;
-/include/ "r8a7790.dtsi"
+#include "r8a7790.dtsi"
 
 / {
         model = "Lager";
@@ -24,6 +24,11 @@
                 reg = <0 0x40000000 0 0x80000000>;
         };
 
+        memory@180000000 {
+                device_type = "memory";
+                reg = <1 0x80000000 0 0x80000000>;
+        };
+
         lbsc {
                 #address-cells = <1>;
                 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index ee845fad939b..0e4d5b57c48b 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -8,6 +8,9 @@
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
         compatible = "renesas,r8a7790";
         interrupt-parent = <&gic>;
@@ -84,14 +87,14 @@
                         <0 0xf1002000 0 0x1000>,
                         <0 0xf1004000 0 0x2000>,
                         <0 0xf1006000 0 0x2000>;
-                interrupts = <1 9 0xf04>;
+                interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
         };
 
         gpio0: gpio@ffc40000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xffc40000 0 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 4 0x4>;
+                interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 0 32>;
@@ -103,7 +106,7 @@
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xffc41000 0 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 5 0x4>;
+                interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 32 32>;
@@ -115,7 +118,7 @@
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xffc42000 0 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 6 0x4>;
+                interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 64 32>;
@@ -127,7 +130,7 @@
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xffc43000 0 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 7 0x4>;
+                interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 96 32>;
@@ -139,7 +142,7 @@
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xffc44000 0 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 8 0x4>;
+                interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 128 32>;
@@ -151,7 +154,7 @@
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xffc45000 0 0x2c>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 9 0x4>;
+                interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 160 32>;
@@ -159,21 +162,31 @@
                 interrupt-controller;
         };
 
+        thermal@e61f0000 {
+                compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal";
+                reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
+        };
+
         timer {
                 compatible = "arm,armv7-timer";
-                interrupts = <1 13 0xf08>,
-                                <1 14 0xf08>,
-                                <1 11 0xf08>,
-                                <1 10 0xf08>;
+                interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
         };
 
         irqc0: interrupt-controller@e61c0000 {
-                compatible = "renesas,irqc";
+                compatible = "renesas,irqc-r8a7790", "renesas,irqc";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0 0xe61c0000 0 0x200>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
+                interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 1 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 2 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 3 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         i2c0: i2c@e6508000 {
@@ -182,7 +195,7 @@
                 compatible = "renesas,i2c-r8a7790";
                 reg = <0 0xe6508000 0 0x40>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 287 0x4>;
+                interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -192,7 +205,7 @@
                 compatible = "renesas,i2c-r8a7790";
                 reg = <0 0xe6518000 0 0x40>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 288 0x4>;
+                interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -202,7 +215,7 @@
                 compatible = "renesas,i2c-r8a7790";
                 reg = <0 0xe6530000 0 0x40>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 286 0x4>;
+                interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -212,24 +225,24 @@
                 compatible = "renesas,i2c-r8a7790";
                 reg = <0 0xe6540000 0 0x40>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 290 0x4>;
+                interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
         mmcif0: mmcif@ee200000 {
-                compatible = "renesas,sh-mmcif";
+                compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
                 reg = <0 0xee200000 0 0x80>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 169 0x4>;
+                interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
                 reg-io-width = <4>;
                 status = "disabled";
         };
 
-        mmcif1: mmcif@ee220000 {
-                compatible = "renesas,sh-mmcif";
+        mmcif1: mmc@ee220000 {
+                compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
                 reg = <0 0xee220000 0 0x80>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 170 0x4>;
+                interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
                 reg-io-width = <4>;
                 status = "disabled";
         };
@@ -239,38 +252,38 @@
                 reg = <0 0xe6060000 0 0x250>;
         };
 
-        sdhi0: sdhi@ee100000 {
+        sdhi0: sd@ee100000 {
                 compatible = "renesas,sdhi-r8a7790";
                 reg = <0 0xee100000 0 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 165 4>;
+                interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
                 cap-sd-highspeed;
                 status = "disabled";
         };
 
-        sdhi1: sdhi@ee120000 {
+        sdhi1: sd@ee120000 {
                 compatible = "renesas,sdhi-r8a7790";
                 reg = <0 0xee120000 0 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 166 4>;
+                interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
                 cap-sd-highspeed;
                 status = "disabled";
         };
 
-        sdhi2: sdhi@ee140000 {
+        sdhi2: sd@ee140000 {
                 compatible = "renesas,sdhi-r8a7790";
                 reg = <0 0xee140000 0 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 167 4>;
+                interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
                 cap-sd-highspeed;
                 status = "disabled";
         };
 
-        sdhi3: sdhi@ee160000 {
+        sdhi3: sd@ee160000 {
                 compatible = "renesas,sdhi-r8a7790";
                 reg = <0 0xee160000 0 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 168 4>;
+                interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
                 cap-sd-highspeed;
                 status = "disabled";
         };
diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
new file mode 100644
index 000000000000..19192731c24a
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
@@ -0,0 +1,61 @@
+/*
+ * Device Tree Source for the Koelsch board
+ *
+ * Copyright (C) 2013 Renesas Electronics Corporation
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7791.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+        model = "Koelsch";
+        compatible = "renesas,koelsch-reference", "renesas,r8a7791";
+
+        chosen {
+                bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
+        };
+
+        memory@40000000 {
+                device_type = "memory";
+                reg = <0 0x40000000 0 0x80000000>;
+        };
+
+        lbsc {
+                #address-cells = <1>;
+                #size-cells = <1>;
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                led6 {
+                        gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+                };
+                led7 {
+                        gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
+                };
+                led8 {
+                        gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
+                };
+        };
+};
+
+&pfc {
+        pinctrl-0 = <&scif0_pins &scif1_pins>;
+        pinctrl-names = "default";
+
+        scif0_pins: serial0 {
+                renesas,groups = "scif0_data_d";
+                renesas,function = "scif0";
+        };
+
+        scif1_pins: serial1 {
+                renesas,groups = "scif1_data_d";
+                renesas,function = "scif1";
+        };
+};
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 1ce5250ec278..c4e8b3a0cd13 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -10,7 +10,7 @@
  */
 
 /dts-v1/;
-/include/ "r8a7791.dtsi"
+#include "r8a7791.dtsi"
 
 / {
         model = "Koelsch";
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index fea5cfef4691..a349aff54c76 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -9,6 +9,9 @@
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
         compatible = "renesas,r8a7791";
         interrupt-parent = <&gic>;
@@ -43,32 +46,141 @@
                         <0 0xf1002000 0 0x1000>,
                         <0 0xf1004000 0 0x2000>,
                         <0 0xf1006000 0 0x2000>;
-                interrupts = <1 9 0xf04>;
+                interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+        };
+
+        gpio0: gpio@e6050000 {
+                compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+                reg = <0 0xe6050000 0 0x50>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 0 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+
+        gpio1: gpio@e6051000 {
+                compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+                reg = <0 0xe6051000 0 0x50>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 32 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+
+        gpio2: gpio@e6052000 {
+                compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+                reg = <0 0xe6052000 0 0x50>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 64 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+
+        gpio3: gpio@e6053000 {
+                compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+                reg = <0 0xe6053000 0 0x50>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 96 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+
+        gpio4: gpio@e6054000 {
+                compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+                reg = <0 0xe6054000 0 0x50>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 128 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+
+        gpio5: gpio@e6055000 {
+                compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+                reg = <0 0xe6055000 0 0x50>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 160 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+
+        gpio6: gpio@e6055400 {
+                compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+                reg = <0 0xe6055400 0 0x50>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 192 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+
+        gpio7: gpio@e6055800 {
+                compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+                reg = <0 0xe6055800 0 0x50>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 224 26>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+
+        thermal@e61f0000 {
+                compatible = "renesas,thermal-r8a7791", "renesas,rcar-thermal";
+                reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         timer {
                 compatible = "arm,armv7-timer";
-                interrupts = <1 13 0xf08>,
-                                <1 14 0xf08>,
-                                <1 11 0xf08>,
-                                <1 10 0xf08>;
+                interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
         };
 
         irqc0: interrupt-controller@e61c0000 {
-                compatible = "renesas,irqc";
+                compatible = "renesas,irqc-r8a7791", "renesas,irqc";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0 0xe61c0000 0 0x200>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 0 4>,
-                              <0 1 4>,
-                              <0 2 4>,
-                              <0 3 4>,
-                              <0 12 4>,
-                              <0 13 4>,
-                              <0 14 4>,
-                              <0 15 4>,
-                              <0 16 4>,
-                              <0 17 4>;
+                interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 1 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 2 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 3 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 12 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 13 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 14 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 15 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 16 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 17 IRQ_TYPE_LEVEL_HIGH>;
+        };
+
+        pfc: pfc@e6060000 {
+                compatible = "renesas,pfc-r8a7791";
+                reg = <0 0xe6060000 0 0x250>;
+                #gpio-range-cells = <3>;
         };
 };
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 5cdaba4cea86..1105558d188b 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -1,6 +1,6 @@
 /*
  * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
- *                applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 SoC
+ *                applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
  *
  *  Copyright (C) 2013 Atmel,
  *                2013 Ludovic Desroches <ludovic.desroches@atmel.com>
@@ -13,6 +13,7 @@
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clk/at91.h>
 
 / {
         model = "Atmel SAMA5D3 family SoC";
@@ -36,6 +37,7 @@
                 i2c2 = &i2c2;
                 ssc0 = &ssc0;
                 ssc1 = &ssc1;
+                pwm0 = &pwm0;
         };
         cpus {
                 #address-cells = <1>;
@@ -56,6 +58,14 @@
                 reg = <0x20000000 0x8000000>;
         };
 
+        clocks {
+                adc_op_clk: adc_op_clk{
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <20000000>;
+                };
+        };
+
         ahb {
                 compatible = "simple-bus";
                 #address-cells = <1>;
@@ -79,6 +89,8 @@
                                 status = "disabled";
                                 #address-cells = <1>;
                                 #size-cells = <0>;
+                                clocks = <&mci0_clk>;
+                                clock-names = "mci_clk";
                         };
 
                         spi0: spi@f0004000 {
@@ -92,6 +104,8 @@
                                 dma-names = "tx", "rx";
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_spi0>;
+                                clocks = <&spi0_clk>;
+                                clock-names = "spi_clk";
                                 status = "disabled";
                         };
 
@@ -101,6 +115,8 @@
                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+                                clocks = <&ssc0_clk>;
+                                clock-names = "pclk";
                                 status = "disabled";
                         };
 
@@ -108,6 +124,8 @@
                                 compatible = "atmel,at91sam9x5-tcb";
                                 reg = <0xf0010000 0x100>;
                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
+                                clocks = <&tcb0_clk>;
+                                clock-names = "t0_clk";
                         };
 
                         i2c0: i2c@f0014000 {
@@ -121,6 +139,7 @@
                                 pinctrl-0 = <&pinctrl_i2c0>;
                                 #address-cells = <1>;
                                 #size-cells = <0>;
+                                clocks = <&twi0_clk>;
                                 status = "disabled";
                         };
 
@@ -135,6 +154,7 @@
                                 pinctrl-0 = <&pinctrl_i2c1>;
                                 #address-cells = <1>;
                                 #size-cells = <0>;
+                                clocks = <&twi1_clk>;
                                 status = "disabled";
                         };
 
@@ -144,6 +164,8 @@
                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_usart0>;
+                                clocks = <&usart0_clk>;
+                                clock-names = "usart";
                                 status = "disabled";
                         };
 
@@ -153,6 +175,17 @@
                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_usart1>;
+                                clocks = <&usart1_clk>;
+                                clock-names = "usart";
+                                status = "disabled";
+                        };
+
+                        pwm0: pwm@f002c000 {
+                                compatible = "atmel,sama5d3-pwm";
+                                reg = <0xf002c000 0x300>;
+                                interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
+                                #pwm-cells = <3>;
+                                clocks = <&pwm_clk>;
                                 status = "disabled";
                         };
 
@@ -174,6 +207,8 @@
                                 status = "disabled";
                                 #address-cells = <1>;
                                 #size-cells = <0>;
+                                clocks = <&mci1_clk>;
+                                clock-names = "mci_clk";
                         };
 
                         spi1: spi@f8008000 {
@@ -187,6 +222,8 @@
                                 dma-names = "tx", "rx";
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_spi1>;
+                                clocks = <&spi1_clk>;
+                                clock-names = "spi_clk";
                                 status = "disabled";
                         };
 
@@ -196,6 +233,8 @@
                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+                                clocks = <&ssc1_clk>;
+                                clock-names = "pclk";
                                 status = "disabled";
                         };
 
@@ -219,6 +258,9 @@
                                         &pinctrl_adc0_ad10
                                         &pinctrl_adc0_ad11
                                         >;
+                                clocks = <&adc_clk>,
+                                         <&adc_op_clk>;
+                                clock-names = "adc_clk", "adc_op_clk";
                                 atmel,adc-channel-base = <0x50>;
                                 atmel,adc-channels-used = <0xfff>;
                                 atmel,adc-drdy-mask = <0x1000000>;
@@ -272,8 +314,11 @@
                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
                                        <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
                                 dma-names = "tx", "rx";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_i2c2>;
                                 #address-cells = <1>;
                                 #size-cells = <0>;
+                                clocks = <&twi2_clk>;
                                 status = "disabled";
                         };
 
@@ -283,6 +328,8 @@
                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_usart2>;
+                                clocks = <&usart2_clk>;
+                                clock-names = "usart";
                                 status = "disabled";
                         };
 
@@ -292,25 +339,41 @@
                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_usart3>;
+                                clocks = <&usart3_clk>;
+                                clock-names = "usart";
                                 status = "disabled";
                         };
 
                         sha@f8034000 {
-                                compatible = "atmel,sam9g46-sha";
+                                compatible = "atmel,at91sam9g46-sha";
                                 reg = <0xf8034000 0x100>;
                                 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
+                                dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
+                                dma-names = "tx";
+                                clocks = <&sha_clk>;
+                                clock-names = "sha_clk";
                         };
 
                         aes@f8038000 {
-                                compatible = "atmel,sam9g46-aes";
+                                compatible = "atmel,at91sam9g46-aes";
                                 reg = <0xf8038000 0x100>;
-                                interrupts = <43 4 0>;
+                                interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
+                                dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
+                                       <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
+                                dma-names = "tx", "rx";
+                                clocks = <&aes_clk>;
+                                clock-names = "aes_clk";
                         };
 
                         tdes@f803c000 {
-                                compatible = "atmel,sam9g46-tdes";
+                                compatible = "atmel,at91sam9g46-tdes";
                                 reg = <0xf803c000 0x100>;
                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
+                                dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
+                                       <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
+                                dma-names = "tx", "rx";
+                                clocks = <&tdes_clk>;
+                                clock-names = "tdes_clk";
                         };
 
                         dma0: dma-controller@ffffe600 {
@@ -318,6 +381,8 @@
                                 reg = <0xffffe600 0x200>;
                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
                                 #dma-cells = <2>;
+                                clocks = <&dma0_clk>;
+                                clock-names = "dma_clk";
                         };
 
                         dma1: dma-controller@ffffe800 {
@@ -325,6 +390,8 @@
                                 reg = <0xffffe800 0x200>;
                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
                                 #dma-cells = <2>;
+                                clocks = <&dma1_clk>;
+                                clock-names = "dma_clk";
                         };
 
                         ramc0: ramc@ffffea00 {
@@ -338,6 +405,8 @@
                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_dbgu>;
+                                clocks = <&dbgu_clk>;
+                                clock-names = "usart";
                                 status = "disabled";
                         };
 
@@ -443,6 +512,14 @@
                                         };
                                 };
 
+                                i2c2 {
+                                        pinctrl_i2c2: i2c2-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
+                                                         AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
+                                        };
+                                };
+
                                 isi {
                                         pinctrl_isi: isi-0 {
                                                 atmel,pins =
@@ -626,6 +703,7 @@
                                         gpio-controller;
                                         interrupt-controller;
                                         #interrupt-cells = <2>;
+                                        clocks = <&pioA_clk>;
                                 };
 
                                 pioB: gpio@fffff400 {
@@ -636,6 +714,7 @@
                                         gpio-controller;
                                         interrupt-controller;
                                         #interrupt-cells = <2>;
+                                        clocks = <&pioB_clk>;
                                 };
 
                                 pioC: gpio@fffff600 {
@@ -646,6 +725,7 @@
                                         gpio-controller;
                                         interrupt-controller;
                                         #interrupt-cells = <2>;
+                                        clocks = <&pioC_clk>;
                                 };
 
                                 pioD: gpio@fffff800 {
@@ -656,6 +736,7 @@
                                         gpio-controller;
                                         interrupt-controller;
                                         #interrupt-cells = <2>;
+                                        clocks = <&pioD_clk>;
                                 };
 
                                 pioE: gpio@fffffa00 {
@@ -666,12 +747,334 @@
                                         gpio-controller;
                                         interrupt-controller;
                                         #interrupt-cells = <2>;
+                                        clocks = <&pioE_clk>;
                                 };
                         };
 
                         pmc: pmc@fffffc00 {
-                                compatible = "atmel,at91rm9200-pmc";
+                                compatible = "atmel,sama5d3-pmc";
                                 reg = <0xfffffc00 0x120>;
+                                interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                                interrupt-controller;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                #interrupt-cells = <1>;
+
+                                clk32k: slck {
+                                        compatible = "fixed-clock";
+                                        #clock-cells = <0>;
+                                        clock-frequency = <32768>;
+                                };
+
+                                main: mainck {
+                                        compatible = "atmel,at91rm9200-clk-main";
+                                        #clock-cells = <0>;
+                                        interrupt-parent = <&pmc>;
+                                        interrupts = <AT91_PMC_MOSCS>;
+                                        clocks = <&clk32k>;
+                                };
+
+                                plla: pllack {
+                                        compatible = "atmel,sama5d3-clk-pll";
+                                        #clock-cells = <0>;
+                                        interrupt-parent = <&pmc>;
+                                        interrupts = <AT91_PMC_LOCKA>;
+                                        clocks = <&main>;
+                                        reg = <0>;
+                                        atmel,clk-input-range = <8000000 50000000>;
+                                        #atmel,pll-clk-output-range-cells = <4>;
+                                        atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
+                                };
+
+                                plladiv: plladivck {
+                                        compatible = "atmel,at91sam9x5-clk-plldiv";
+                                        #clock-cells = <0>;
+                                        clocks = <&plla>;
+                                };
+
+                                utmi: utmick {
+                                        compatible = "atmel,at91sam9x5-clk-utmi";
+                                        #clock-cells = <0>;
+                                        interrupt-parent = <&pmc>;
+                                        interrupts = <AT91_PMC_LOCKU>;
+                                        clocks = <&main>;
+                                };
+
+                                mck: masterck {
+                                        compatible = "atmel,at91sam9x5-clk-master";
+                                        #clock-cells = <0>;
+                                        interrupt-parent = <&pmc>;
+                                        interrupts = <AT91_PMC_MCKRDY>;
+                                        clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
+                                        atmel,clk-output-range = <0 166000000>;
+                                        atmel,clk-divisors = <1 2 4 3>;
+                                };
+
+                                usb: usbck {
+                                        compatible = "atmel,at91sam9x5-clk-usb";
+                                        #clock-cells = <0>;
+                                        clocks = <&plladiv>, <&utmi>;
+                                };
+
+                                prog: progck {
+                                        compatible = "atmel,at91sam9x5-clk-programmable";
+                                        #address-cells = <1>;
+                                        #size-cells = <0>;
+                                        interrupt-parent = <&pmc>;
+                                        clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
+
+                                        prog0: prog0 {
+                                                #clock-cells = <0>;
+                                                reg = <0>;
+                                                interrupts = <AT91_PMC_PCKRDY(0)>;
+                                        };
+
+                                        prog1: prog1 {
+                                                #clock-cells = <0>;
+                                                reg = <1>;
+                                                interrupts = <AT91_PMC_PCKRDY(1)>;
+                                        };
+
+                                        prog2: prog2 {
+                                                #clock-cells = <0>;
+                                                reg = <2>;
+                                                interrupts = <AT91_PMC_PCKRDY(2)>;
+                                        };
+                                };
+
+                                smd: smdclk {
+                                        compatible = "atmel,at91sam9x5-clk-smd";
+                                        #clock-cells = <0>;
+                                        clocks = <&plladiv>, <&utmi>;
+                                };
+
+                                systemck {
+                                        compatible = "atmel,at91rm9200-clk-system";
+                                        #address-cells = <1>;
+                                        #size-cells = <0>;
+
+                                        ddrck: ddrck {
+                                                #clock-cells = <0>;
+                                                reg = <2>;
+                                                clocks = <&mck>;
+                                        };
+
+                                        smdck: smdck {
+                                                #clock-cells = <0>;
+                                                reg = <4>;
+                                                clocks = <&smd>;
+                                        };
+
+                                        uhpck: uhpck {
+                                                #clock-cells = <0>;
+                                                reg = <6>;
+                                                clocks = <&usb>;
+                                        };
+
+                                        udpck: udpck {
+                                                #clock-cells = <0>;
+                                                reg = <7>;
+                                                clocks = <&usb>;
+                                        };
+
+                                        pck0: pck0 {
+                                                #clock-cells = <0>;
+                                                reg = <8>;
+                                                clocks = <&prog0>;
+                                        };
+
+                                        pck1: pck1 {
+                                                #clock-cells = <0>;
+                                                reg = <9>;
+                                                clocks = <&prog1>;
+                                        };
+
+                                        pck2: pck2 {
+                                                #clock-cells = <0>;
+                                                reg = <10>;
+                                                clocks = <&prog2>;
+                                        };
+                                };
+
+                                periphck {
+                                        compatible = "atmel,at91sam9x5-clk-peripheral";
+                                        #address-cells = <1>;
+                                        #size-cells = <0>;
+                                        clocks = <&mck>;
+
+                                        dbgu_clk: dbgu_clk {
+                                                #clock-cells = <0>;
+                                                reg = <2>;
+                                        };
+
+                                        pioA_clk: pioA_clk {
+                                                #clock-cells = <0>;
+                                                reg = <6>;
+                                        };
+
+                                        pioB_clk: pioB_clk {
+                                                #clock-cells = <0>;
+                                                reg = <7>;
+                                        };
+
+                                        pioC_clk: pioC_clk {
+                                                #clock-cells = <0>;
+                                                reg = <8>;
+                                        };
+
+                                        pioD_clk: pioD_clk {
+                                                #clock-cells = <0>;
+                                                reg = <9>;
+                                        };
+
+                                        pioE_clk: pioE_clk {
+                                                #clock-cells = <0>;
+                                                reg = <10>;
+                                        };
+
+                                        usart0_clk: usart0_clk {
+                                                #clock-cells = <0>;
+                                                reg = <12>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+
+                                        usart1_clk: usart1_clk {
+                                                #clock-cells = <0>;
+                                                reg = <13>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+
+                                        usart2_clk: usart2_clk {
+                                                #clock-cells = <0>;
+                                                reg = <14>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+
+                                        usart3_clk: usart3_clk {
+                                                #clock-cells = <0>;
+                                                reg = <15>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+
+                                        twi0_clk: twi0_clk {
+                                                reg = <18>;
+                                                #clock-cells = <0>;
+                                                atmel,clk-output-range = <0 16625000>;
+                                        };
+
+                                        twi1_clk: twi1_clk {
+                                                #clock-cells = <0>;
+                                                reg = <19>;
+                                                atmel,clk-output-range = <0 16625000>;
+                                        };
+
+                                        twi2_clk: twi2_clk {
+                                                #clock-cells = <0>;
+                                                reg = <20>;
+                                                atmel,clk-output-range = <0 16625000>;
+                                        };
+
+                                        mci0_clk: mci0_clk {
+                                                #clock-cells = <0>;
+                                                reg = <21>;
+                                        };
+
+                                        mci1_clk: mci1_clk {
+                                                #clock-cells = <0>;
+                                                reg = <22>;
+                                        };
+
+                                        spi0_clk: spi0_clk {
+                                                #clock-cells = <0>;
+                                                reg = <24>;
+                                                atmel,clk-output-range = <0 133000000>;
+                                        };
+
+                                        spi1_clk: spi1_clk {
+                                                #clock-cells = <0>;
+                                                reg = <25>;
+                                                atmel,clk-output-range = <0 133000000>;
+                                        };
+
+                                        tcb0_clk: tcb0_clk {
+                                                #clock-cells = <0>;
+                                                reg = <26>;
+                                                atmel,clk-output-range = <0 133000000>;
+                                        };
+
+                                        pwm_clk: pwm_clk {
+                                                #clock-cells = <0>;
+                                                reg = <28>;
+                                        };
+
+                                        adc_clk: adc_clk {
+                                                #clock-cells = <0>;
+                                                reg = <29>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+
+                                        dma0_clk: dma0_clk {
+                                                #clock-cells = <0>;
+                                                reg = <30>;
+                                        };
+
+                                        dma1_clk: dma1_clk {
+                                                #clock-cells = <0>;
+                                                reg = <31>;
+                                        };
+
+                                        uhphs_clk: uhphs_clk {
+                                                #clock-cells = <0>;
+                                                reg = <32>;
+                                        };
+
+                                        udphs_clk: udphs_clk {
+                                                #clock-cells = <0>;
+                                                reg = <33>;
+                                        };
+
+                                        isi_clk: isi_clk {
+                                                #clock-cells = <0>;
+                                                reg = <37>;
+                                        };
+
+                                        ssc0_clk: ssc0_clk {
+                                                #clock-cells = <0>;
+                                                reg = <38>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+
+                                        ssc1_clk: ssc1_clk {
+                                                #clock-cells = <0>;
+                                                reg = <39>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+
+                                        sha_clk: sha_clk {
+                                                #clock-cells = <0>;
+                                                reg = <42>;
+                                        };
+
+                                        aes_clk: aes_clk {
+                                                #clock-cells = <0>;
+                                                reg = <43>;
+                                        };
+
+                                        tdes_clk: tdes_clk {
+                                                #clock-cells = <0>;
+                                                reg = <44>;
+                                        };
+
+                                        trng_clk: trng_clk {
+                                                #clock-cells = <0>;
+                                                reg = <45>;
+                                        };
+
+                                        fuse_clk: fuse_clk {
+                                                #clock-cells = <0>;
+                                                reg = <48>;
+                                        };
+                                };
                         };
 
                         rstc@fffffe00 {
@@ -683,6 +1086,7 @@
                                 compatible = "atmel,at91sam9260-pit";
                                 reg = <0xfffffe30 0xf>;
                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
+                                clocks = <&mck>;
                         };
 
                         watchdog@fffffe40 {
@@ -705,6 +1109,8 @@
                         reg = <0x00500000 0x100000
                                0xf8030000 0x4000>;
                         interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
+                        clocks = <&udphs_clk>, <&utmi>;
+                        clock-names = "pclk", "hclk";
                         status = "disabled";
 
                         ep0 {
@@ -817,6 +1223,9 @@
                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
                         reg = <0x00600000 0x100000>;
                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
+                        clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
+                                 <&uhpck>;
+                        clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
                         status = "disabled";
                 };
 
@@ -824,6 +1233,8 @@
                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
                         reg = <0x00700000 0x100000>;
                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
+                        clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
+                        clock-names = "usb_clk", "ehci_clk", "uhpck";
                         status = "disabled";
                 };
 
diff --git a/arch/arm/boot/dts/sama5d36.dtsi b/arch/arm/boot/dts/sama5d36.dtsi
new file mode 100644
index 000000000000..6c31c26e6cc0
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d36.dtsi
@@ -0,0 +1,20 @@
+/*
+ * sama5d36.dtsi - Device Tree Include file for SAMA5D36 SoC
+ *
+ *  Copyright (C) 2013 Atmel,
+ *                2013 Josh Wu <josh.wu@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+#include "sama5d3.dtsi"
+#include "sama5d3_can.dtsi"
+#include "sama5d3_emac.dtsi"
+#include "sama5d3_gmac.dtsi"
+#include "sama5d3_lcd.dtsi"
+#include "sama5d3_mci2.dtsi"
+#include "sama5d3_tcb1.dtsi"
+#include "sama5d3_uart.dtsi"
+
+/ {
+        compatible = "atmel,samad36", "atmel,sama5d3", "atmel,sama5";
+};
diff --git a/arch/arm/boot/dts/sama5d36ek.dts b/arch/arm/boot/dts/sama5d36ek.dts
new file mode 100644
index 000000000000..59576c6f9826
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d36ek.dts
@@ -0,0 +1,53 @@
+/*
+ * sama5d36ek.dts - Device Tree file for SAMA5D36-EK board
+ *
+ *  Copyright (C) 2013 Atmel,
+ *                2013 Josh Wu <josh.wu@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+/dts-v1/;
+#include "sama5d36.dtsi"
+#include "sama5d3xmb.dtsi"
+#include "sama5d3xdm.dtsi"
+
+/ {
+        model = "Atmel SAMA5D36-EK";
+        compatible = "atmel,sama5d36ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
+
+        ahb {
+                apb {
+                        spi0: spi@f0004000 {
+                                status = "okay";
+                        };
+
+                        ssc0: ssc@f0008000 {
+                                status = "okay";
+                        };
+
+                        can0: can@f000c000 {
+                                status = "okay";
+                        };
+
+                        i2c0: i2c@f0014000 {
+                                status = "okay";
+                        };
+
+                        i2c1: i2c@f0018000 {
+                                status = "okay";
+                        };
+
+                        macb0: ethernet@f0028000 {
+                                status = "okay";
+                        };
+
+                        macb1: ethernet@f802c000 {
+                                status = "okay";
+                        };
+                };
+        };
+
+        sound {
+                status = "okay";
+        };
+};
diff --git a/arch/arm/boot/dts/sama5d3_can.dtsi b/arch/arm/boot/dts/sama5d3_can.dtsi
index 8ed3260cef66..a0775851cce5 100644
--- a/arch/arm/boot/dts/sama5d3_can.dtsi
+++ b/arch/arm/boot/dts/sama5d3_can.dtsi
@@ -32,12 +32,30 @@
 
                         };
 
+                        pmc: pmc@fffffc00 {
+                                periphck {
+                                        can0_clk: can0_clk {
+                                                #clock-cells = <0>;
+                                                reg = <40>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+
+                                        can1_clk: can0_clk {
+                                                #clock-cells = <0>;
+                                                reg = <41>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+                                };
+                        };
+
                         can0: can@f000c000 {
                                 compatible = "atmel,at91sam9x5-can";
                                 reg = <0xf000c000 0x300>;
                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_can0_rx_tx>;
+                                clocks = <&can0_clk>;
+                                clock-names = "can_clk";
                                 status = "disabled";
                         };
 
@@ -47,6 +65,8 @@
                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_can1_rx_tx>;
+                                clocks = <&can1_clk>;
+                                clock-names = "can_clk";
                                 status = "disabled";
                         };
                 };
diff --git a/arch/arm/boot/dts/sama5d3_emac.dtsi b/arch/arm/boot/dts/sama5d3_emac.dtsi
index 4d4f351f1f9f..fe2af9276312 100644
--- a/arch/arm/boot/dts/sama5d3_emac.dtsi
+++ b/arch/arm/boot/dts/sama5d3_emac.dtsi
@@ -31,12 +31,23 @@
                                 };
                         };
 
+                        pmc: pmc@fffffc00 {
+                                periphck {
+                                        macb1_clk: macb1_clk {
+                                                #clock-cells = <0>;
+                                                reg = <35>;
+                                        };
+                                };
+                        };
+
                         macb1: ethernet@f802c000 {
                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
                                 reg = <0xf802c000 0x100>;
                                 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_macb1_rmii>;
+                                clocks = <&macb1_clk>, <&macb1_clk>;
+                                clock-names = "hclk", "pclk";
                                 status = "disabled";
                         };
                 };
diff --git a/arch/arm/boot/dts/sama5d3_gmac.dtsi b/arch/arm/boot/dts/sama5d3_gmac.dtsi
index 0ba8be30ccd8..a6cb0508762f 100644
--- a/arch/arm/boot/dts/sama5d3_gmac.dtsi
+++ b/arch/arm/boot/dts/sama5d3_gmac.dtsi
@@ -64,12 +64,23 @@
                                 };
                         };
 
+                        pmc: pmc@fffffc00 {
+                                periphck {
+                                        macb0_clk: macb0_clk {
+                                                #clock-cells = <0>;
+                                                reg = <34>;
+                                        };
+                                };
+                        };
+
                         macb0: ethernet@f0028000 {
                                 compatible = "cdns,pc302-gem", "cdns,gem";
                                 reg = <0xf0028000 0x100>;
                                 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
+                                clocks = <&macb0_clk>, <&macb0_clk>;
+                                clock-names = "hclk", "pclk";
                                 status = "disabled";
                         };
                 };
diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi
index 01f52a79f8ba..85d302701565 100644
--- a/arch/arm/boot/dts/sama5d3_lcd.dtsi
+++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi
@@ -50,6 +50,23 @@
                                         };
                                 };
                         };
+
+                        pmc: pmc@fffffc00 {
+                                periphck {
+                                        lcdc_clk: lcdc_clk {
+                                                #clock-cells = <0>;
+                                                reg = <36>;
+                                        };
+                                };
+
+                                systemck {
+                                        lcdck: lcdck {
+                                                #clock-cells = <0>;
+                                                reg = <3>;
+                                                clocks = <&mck>;
+                                        };
+                                };
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi
index 38e88e39e551..b029fe7ef17a 100644
--- a/arch/arm/boot/dts/sama5d3_mci2.dtsi
+++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi
@@ -9,6 +9,7 @@
 
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clk/at91.h>
 
 / {
         ahb {
@@ -30,6 +31,15 @@
                                 };
                         };
 
+                        pmc: pmc@fffffc00 {
+                                periphck {
+                                        mci2_clk: mci2_clk {
+                                                #clock-cells = <0>;
+                                                reg = <23>;
+                                        };
+                                };
+                        };
+
                         mmc2: mmc@f8004000 {
                                 compatible = "atmel,hsmci";
                                 reg = <0xf8004000 0x600>;
@@ -38,6 +48,8 @@
                                 dma-names = "rxtx";
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
+                                clocks = <&mci2_clk>;
+                                clock-names = "mci_clk";
                                 status = "disabled";
                                 #address-cells = <1>;
                                 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
index 5264bb4a6998..382b04431f66 100644
--- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi
+++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
@@ -9,6 +9,7 @@
 
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clk/at91.h>
 
 / {
         aliases {
@@ -17,10 +18,21 @@
 
         ahb {
                 apb {
+                        pmc: pmc@fffffc00 {
+                                periphck {
+                                        tcb1_clk: tcb1_clk {
+                                                #clock-cells = <0>;
+                                                reg = <27>;
+                                        };
+                                };
+                        };
+
                         tcb1: timer@f8014000 {
                                 compatible = "atmel,at91sam9x5-tcb";
                                 reg = <0xf8014000 0x100>;
                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
+                                clocks = <&tcb1_clk>;
+                                clock-names = "t0_clk";
                         };
                 };
         };
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
index 98fcb2d57446..a9fa75e41652 100644
--- a/arch/arm/boot/dts/sama5d3_uart.dtsi
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -9,8 +9,14 @@
 
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clk/at91.h>
 
 / {
+        aliases {
+                serial5 = &uart0;
+                serial6 = &uart1;
+        };
+
         ahb {
                 apb {
                         pinctrl@fffff200 {
@@ -31,12 +37,30 @@
                                 };
                         };
 
+                        pmc: pmc@fffffc00 {
+                                periphck {
+                                        uart0_clk: uart0_clk {
+                                                #clock-cells = <0>;
+                                                reg = <16>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+
+                                        uart1_clk: uart1_clk {
+                                                #clock-cells = <0>;
+                                                reg = <17>;
+                                                atmel,clk-output-range = <0 66000000>;
+                                        };
+                                };
+                        };
+
                         uart0: serial@f0024000 {
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xf0024000 0x200>;
                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_uart0>;
+                                clocks = <&uart0_clk>;
+                                clock-names = "usart";
                                 status = "disabled";
                         };
 
@@ -46,6 +70,8 @@
                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_uart1>;
+                                clocks = <&uart1_clk>;
+                                clock-names = "usart";
                                 status = "disabled";
                         };
                 };
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index 726a0f35100c..f55ed072c8e6 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -18,17 +18,6 @@
                 reg = <0x20000000 0x20000000>;
         };
 
-        clocks {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                ranges;
-
-                main_clock: clock@0 {
-                        compatible = "atmel,osc", "fixed-clock";
-                        clock-frequency = <12000000>;
-                };
-        };
-
         ahb {
                 apb {
                         spi0: spi@f0004000 {
@@ -38,6 +27,12 @@
                         macb0: ethernet@f0028000 {
                                 phy-mode = "rgmii";
                         };
+
+                        pmc: pmc@fffffc00 {
+                                main: mainck {
+                                        clock-frequency = <12000000>;
+                                };
+                        };
                 };
 
                 nand0: nand@60000000 {
diff --git a/arch/arm/boot/dts/sama5d3xdm.dtsi b/arch/arm/boot/dts/sama5d3xdm.dtsi
index 1c296d6b2f2a..f9bdde542ced 100644
--- a/arch/arm/boot/dts/sama5d3xdm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xdm.dtsi
@@ -18,6 +18,7 @@
                                         interrupts = <31 0x0>;
                                         pinctrl-names = "default";
                                         pinctrl-0 = <&pinctrl_qt1070_irq>;
+                                        wakeup-source;
                                 };
                         };
 
diff --git a/arch/arm/boot/dts/sh7372-mackerel.dts b/arch/arm/boot/dts/sh7372-mackerel.dts
index 8acf51e0cdae..a759a276c9a9 100644
--- a/arch/arm/boot/dts/sh7372-mackerel.dts
+++ b/arch/arm/boot/dts/sh7372-mackerel.dts
@@ -9,7 +9,7 @@
  */
 
 /dts-v1/;
-/include/ "sh7372.dtsi"
+#include "sh7372.dtsi"
 
 / {
         model = "Mackerel (AP4 EVM 2nd)";
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
index 8ee06dd81799..5bb593daab52 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
@@ -12,8 +12,9 @@
  */
 
 /dts-v1/;
-/include/ "sh73a0.dtsi"
+#include "sh73a0.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
         model = "KZM-A9-GT";
@@ -82,7 +83,7 @@
                 reg = <0x10000000 0x100>;
                 phy-mode = "mii";
                 interrupt-parent = <&irqpin0>;
-                interrupts = <3 0>;     /* active low */
+                interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
                 reg-io-width = <4>;
                 smsc,irq-push-pull;
                 smsc,save-mac-address;
@@ -105,6 +106,52 @@
                         gpios = <&pfc 23 GPIO_ACTIVE_LOW>;
                 };
         };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+
+                back-key {
+                        gpios = <&pcf8575 8 GPIO_ACTIVE_LOW>;
+                        linux,code = <158>;
+                        label = "SW3";
+                };
+
+                right-key {
+                        gpios = <&pcf8575 9 GPIO_ACTIVE_LOW>;
+                        linux,code = <106>;
+                        label = "SW2-R";
+                };
+
+                left-key {
+                        gpios = <&pcf8575 10 GPIO_ACTIVE_LOW>;
+                        linux,code = <105>;
+                        label = "SW2-L";
+                };
+
+                enter-key {
+                        gpios = <&pcf8575 11 GPIO_ACTIVE_LOW>;
+                        linux,code = <28>;
+                        label = "SW2-P";
+                };
+
+                up-key {
+                        gpios = <&pcf8575 12 GPIO_ACTIVE_LOW>;
+                        linux,code = <103>;
+                        label = "SW2-U";
+                };
+
+                down-key {
+                        gpios = <&pcf8575 13 GPIO_ACTIVE_LOW>;
+                        linux,code = <108>;
+                        label = "SW2-D";
+                };
+
+                home-key {
+                        gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
+                        linux,code = <102>;
+                        label = "SW1";
+                };
+        };
 };
 
 &i2c0 {
@@ -185,6 +232,17 @@
         pinctrl-0 = <&i2c3_pins>;
         pinctrl-names = "default";
         status = "okay";
+
+        pcf8575: gpio@20 {
+                compatible = "nxp,pcf8575";
+                reg = <0x20>;
+                interrupt-parent = <&irqpin2>;
+                interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
 };
 
 &mmcif {
@@ -205,7 +263,7 @@
                 renesas,function = "i2c3";
         };
 
-        mmcif_pins: mmcif {
+        mmcif_pins: mmc {
                 mux {
                         renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
                         renesas,function = "mmc0";
@@ -217,17 +275,17 @@
                 };
         };
 
-        scifa4_pins: scifa4 {
+        scifa4_pins: serial4 {
                 renesas,groups = "scifa4_data", "scifa4_ctrl";
                 renesas,function = "scifa4";
         };
 
-        sdhi0_pins: sdhi0 {
+        sdhi0_pins: sd0 {
                 renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
                 renesas,function = "sdhi0";
         };
 
-        sdhi2_pins: sdhi2 {
+        sdhi2_pins: sd2 {
                 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
                 renesas,function = "sdhi2";
         };
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts
index 0f1ca7792c46..27c5f426d172 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts
@@ -9,7 +9,7 @@
  */
 
 /dts-v1/;
-/include/ "sh73a0.dtsi"
+#include "sh73a0.dtsi"
 
 / {
         model = "KZM-A9-GT";
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index fcf26889a8a0..241c8cdaeaa1 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -10,6 +10,8 @@
 
 /include/ "skeleton.dtsi"
 
+#include <dt-bindings/interrupt-controller/irq.h>
+
 / {
         compatible = "renesas,sh73a0";
 
@@ -40,12 +42,12 @@
 
         pmu {
                 compatible = "arm,cortex-a9-pmu";
-                interrupts = <0 55 4>,
-                             <0 56 4>;
+                interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 56 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         irqpin0: irqpin@e6900000 {
-                compatible = "renesas,intc-irqpin";
+                compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0xe6900000 4>,
@@ -54,18 +56,18 @@
                         <0xe6900040 1>,
                         <0xe6900060 1>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 1 0x4
-                              0 2 0x4
-                              0 3 0x4
-                              0 4 0x4
-                              0 5 0x4
-                              0 6 0x4
-                              0 7 0x4
-                              0 8 0x4>;
+                interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH
+                              0 2 IRQ_TYPE_LEVEL_HIGH
+                              0 3 IRQ_TYPE_LEVEL_HIGH
+                              0 4 IRQ_TYPE_LEVEL_HIGH
+                              0 5 IRQ_TYPE_LEVEL_HIGH
+                              0 6 IRQ_TYPE_LEVEL_HIGH
+                              0 7 IRQ_TYPE_LEVEL_HIGH
+                              0 8 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         irqpin1: irqpin@e6900004 {
-                compatible = "renesas,intc-irqpin";
+                compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0xe6900004 4>,
@@ -74,19 +76,19 @@
                         <0xe6900044 1>,
                         <0xe6900064 1>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 9 0x4
-                              0 10 0x4
-                              0 11 0x4
-                              0 12 0x4
-                              0 13 0x4
-                              0 14 0x4
-                              0 15 0x4
-                              0 16 0x4>;
+                interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH
+                              0 10 IRQ_TYPE_LEVEL_HIGH
+                              0 11 IRQ_TYPE_LEVEL_HIGH
+                              0 12 IRQ_TYPE_LEVEL_HIGH
+                              0 13 IRQ_TYPE_LEVEL_HIGH
+                              0 14 IRQ_TYPE_LEVEL_HIGH
+                              0 15 IRQ_TYPE_LEVEL_HIGH
+                              0 16 IRQ_TYPE_LEVEL_HIGH>;
                 control-parent;
         };
 
         irqpin2: irqpin@e6900008 {
-                compatible = "renesas,intc-irqpin";
+                compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0xe6900008 4>,
@@ -95,18 +97,18 @@
                         <0xe6900048 1>,
                         <0xe6900068 1>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 17 0x4
-                              0 18 0x4
-                              0 19 0x4
-                              0 20 0x4
-                              0 21 0x4
-                              0 22 0x4
-                              0 23 0x4
-                              0 24 0x4>;
+                interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH
+                              0 18 IRQ_TYPE_LEVEL_HIGH
+                              0 19 IRQ_TYPE_LEVEL_HIGH
+                              0 20 IRQ_TYPE_LEVEL_HIGH
+                              0 21 IRQ_TYPE_LEVEL_HIGH
+                              0 22 IRQ_TYPE_LEVEL_HIGH
+                              0 23 IRQ_TYPE_LEVEL_HIGH
+                              0 24 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         irqpin3: irqpin@e690000c {
-                compatible = "renesas,intc-irqpin";
+                compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0xe690000c 4>,
@@ -115,14 +117,14 @@
                         <0xe690004c 1>,
                         <0xe690006c 1>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 25 0x4
-                              0 26 0x4
-                              0 27 0x4
-                              0 28 0x4
-                              0 29 0x4
-                              0 30 0x4
-                              0 31 0x4
-                              0 32 0x4>;
+                interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH
+                              0 26 IRQ_TYPE_LEVEL_HIGH
+                              0 27 IRQ_TYPE_LEVEL_HIGH
+                              0 28 IRQ_TYPE_LEVEL_HIGH
+                              0 29 IRQ_TYPE_LEVEL_HIGH
+                              0 30 IRQ_TYPE_LEVEL_HIGH
+                              0 31 IRQ_TYPE_LEVEL_HIGH
+                              0 32 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         i2c0: i2c@e6820000 {
@@ -131,10 +133,10 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0xe6820000 0x425>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 167 0x4
-                              0 168 0x4
-                              0 169 0x4
-                              0 170 0x4>;
+                interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH
+                              0 168 IRQ_TYPE_LEVEL_HIGH
+                              0 169 IRQ_TYPE_LEVEL_HIGH
+                              0 170 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -144,10 +146,10 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0xe6822000 0x425>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 51 0x4
-                              0 52 0x4
-                              0 53 0x4
-                              0 54 0x4>;
+                interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH
+                              0 52 IRQ_TYPE_LEVEL_HIGH
+                              0 53 IRQ_TYPE_LEVEL_HIGH
+                              0 54 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -157,10 +159,10 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0xe6824000 0x425>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 171 0x4
-                              0 172 0x4
-                              0 173 0x4
-                              0 174 0x4>;
+                interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH
+                              0 172 IRQ_TYPE_LEVEL_HIGH
+                              0 173 IRQ_TYPE_LEVEL_HIGH
+                              0 174 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -170,10 +172,10 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0xe6826000 0x425>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 183 0x4
-                              0 184 0x4
-                              0 185 0x4
-                              0 186 0x4>;
+                interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH
+                              0 184 IRQ_TYPE_LEVEL_HIGH
+                              0 185 IRQ_TYPE_LEVEL_HIGH
+                              0 186 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
@@ -183,52 +185,52 @@
                 compatible = "renesas,rmobile-iic";
                 reg = <0xe6828000 0x425>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 187 0x4
-                              0 188 0x4
-                              0 189 0x4
-                              0 190 0x4>;
+                interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH
+                              0 188 IRQ_TYPE_LEVEL_HIGH
+                              0 189 IRQ_TYPE_LEVEL_HIGH
+                              0 190 IRQ_TYPE_LEVEL_HIGH>;
                 status = "disabled";
         };
 
-        mmcif: mmcif@e6bd0000 {
+        mmcif: mmc@e6bd0000 {
                 compatible = "renesas,sh-mmcif";
                 reg = <0xe6bd0000 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 140 0x4
-                              0 141 0x4>;
+                interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH
+                              0 141 IRQ_TYPE_LEVEL_HIGH>;
                 reg-io-width = <4>;
                 status = "disabled";
         };
 
-        sdhi0: sdhi@ee100000 {
-                compatible = "renesas,sdhi-r8a7740";
+        sdhi0: sd@ee100000 {
+                compatible = "renesas,sdhi-sh73a0";
                 reg = <0xee100000 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 83 4
-                                0 84 4
-                                0 85 4>;
+                interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
+                              0 84 IRQ_TYPE_LEVEL_HIGH
+                              0 85 IRQ_TYPE_LEVEL_HIGH>;
                 cap-sd-highspeed;
                 status = "disabled";
         };
 
         /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
-        sdhi1: sdhi@ee120000 {
-                compatible = "renesas,sdhi-r8a7740";
+        sdhi1: sd@ee120000 {
+                compatible = "renesas,sdhi-sh73a0";
                 reg = <0xee120000 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 88 4
-                                0 89 4>;
+                interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
+                              0 89 IRQ_TYPE_LEVEL_HIGH>;
                 toshiba,mmc-wrprotect-disable;
                 cap-sd-highspeed;
                 status = "disabled";
         };
 
-        sdhi2: sdhi@ee140000 {
-                compatible = "renesas,sdhi-r8a7740";
+        sdhi2: sd@ee140000 {
+                compatible = "renesas,sdhi-sh73a0";
                 reg = <0xee140000 0x100>;
                 interrupt-parent = <&gic>;
-                interrupts = <0 104 4
-                                0 105 4>;
+                interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
+                              0 105 IRQ_TYPE_LEVEL_HIGH>;
                 toshiba,mmc-wrprotect-disable;
                 cap-sd-highspeed;
                 status = "disabled";
diff --git a/arch/arm/boot/dts/st-pincfg.h b/arch/arm/boot/dts/st-pincfg.h
index 8c45d85ac13e..4851c387d52d 100644
--- a/arch/arm/boot/dts/st-pincfg.h
+++ b/arch/arm/boot/dts/st-pincfg.h
@@ -15,7 +15,7 @@
 /* Pull Up */
 #define PU                      (1 << 26)
 /* Open Drain */
-#define OD                      (1 << 26)
+#define OD                      (1 << 25)
 #define RT                      (1 << 23)
 #define INVERTCLK               (1 << 22)
 #define CLKNOTDATA              (1 << 21)
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 7da99fe497e1..e0853ea02df2 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -913,6 +913,10 @@
                         interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
                         v-ape-supply = <&db8500_vape_reg>;
 
+                        dmas = <&dma 31 0 0x12>, /* Logical - DevToMem - HighPrio */
+                               <&dma 31 0 0x10>; /* Logical - MemToDev - HighPrio */
+                        dma-names = "rx", "tx";
+
                         clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;
                         clock-names = "msp", "apb_pclk";
 
@@ -925,6 +929,9 @@
                         interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
                         v-ape-supply = <&db8500_vape_reg>;
 
+                        dmas = <&dma 30 0 0x10>; /* Logical - MemToDev - HighPrio */
+                        dma-names = "tx";
+
                         clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;
                         clock-names = "msp", "apb_pclk";
 
@@ -938,6 +945,11 @@
                         interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
                         v-ape-supply = <&db8500_vape_reg>;
 
+                        dmas = <&dma 14 0 0x12>, /* Logical  - DevToMem - HighPrio */
+                               <&dma 14 1 0x19>; /* Physical Chan 1 - MemToDev
+                                                    HighPrio - Fixed */
+                        dma-names = "rx", "tx";
+
                         clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;
                         clock-names = "msp", "apb_pclk";
 
@@ -950,6 +962,9 @@
                         interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
                         v-ape-supply = <&db8500_vape_reg>;
 
+                        dmas = <&dma 30 0 0x12>; /* Logical - DevToMem - HighPrio */
+                        dma-names = "rx";
+
                         clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;
                         clock-names = "msp", "apb_pclk";
 
@@ -987,6 +1002,23 @@
                         status = "disabled";
                 };
 
+                mcde@a0350000 {
+                        compatible = "stericsson,mcde";
+                        reg = <0xa0350000 0x1000>, /* MCDE */
+                              <0xa0351000 0x1000>, /* DSI link 1 */
+                              <0xa0352000 0x1000>, /* DSI link 2 */
+                              <0xa0353000 0x1000>; /* DSI link 3 */
+                        interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
+                                 <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
+                                 <&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */
+                                 <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */
+                                 <&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */
+                                 <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */
+                                 <&prcmu_clk PRCMU_DSI1ESCCLK>, /* TVout clock 1 */
+                                 <&prcmu_clk PRCMU_DSI2ESCCLK>; /* TVout clock 2 */
+                };
+
                 cryp@a03cb000 {
                         compatible = "stericsson,ux500-cryp";
                         reg = <0xa03cb000 0x1000>;
diff --git a/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi b/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
new file mode 100644
index 000000000000..addfcc7c2750
--- /dev/null
+++ b/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
@@ -0,0 +1,745 @@
+/*
+ * Copyright 2013 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "ste-nomadik-pinctrl.dtsi"
+
+/ {
+        soc {
+                pinctrl {
+                        /* Settings for all UART default and sleep states */
+                        uart0 {
+                                uart0_default_mode: uart0_default {
+                                        default_mux {
+                                                ste,function = "u0";
+                                                ste,pins = "u0_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
+                                                ste,config = <&in_pu>;
+                                        };
+
+                                        default_cfg2 {
+                                                ste,pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
+                                                ste,config = <&out_hi>;
+                                        };
+                                };
+
+                                uart0_sleep_mode: uart0_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+
+                                        sleep_cfg2 {
+                                                ste,pins = "GPIO1_AJ3"; /* RTS */
+                                                ste,config = <&slpm_out_hi_wkup_pdis>;
+                                        };
+
+                                        sleep_cfg3 {
+                                                ste,pins = "GPIO3_AH3"; /* TXD */
+                                                ste,config = <&slpm_out_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        uart1 {
+                                uart1_default_mode: uart1_default {
+                                        default_mux {
+                                                ste,function = "u1";
+                                                ste,pins = "u1rxtx_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO4_AH6"; /* RXD */
+                                                ste,config = <&in_pu>;
+                                        };
+
+                                        default_cfg2 {
+                                                ste,pins = "GPIO5_AG6"; /* TXD */
+                                                ste,config = <&out_hi>;
+                                        };
+                                };
+
+                                uart1_sleep_mode: uart1_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO4_AH6"; /* RXD */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+
+                                        sleep_cfg2 {
+                                                ste,pins = "GPIO5_AG6"; /* TXD */
+                                                ste,config = <&slpm_out_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        uart2 {
+                                uart2_default_mode: uart2_default {
+                                        default_mux {
+                                                ste,function = "u2";
+                                                ste,pins = "u2rxtx_c_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO29_W2"; /* RXD */
+                                                ste,config = <&in_pu>;
+                                        };
+
+                                        default_cfg2 {
+                                                ste,pins = "GPIO30_W3"; /* TXD */
+                                                ste,config = <&out_hi>;
+                                        };
+                                };
+
+                                uart2_sleep_mode: uart2_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO29_W2"; /* RXD */
+                                                ste,config = <&in_wkup_pdis>;
+                                        };
+
+                                        sleep_cfg2 {
+                                                ste,pins = "GPIO30_W3"; /* TXD */
+                                                ste,config = <&out_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        /* Settings for all I2C default and sleep states */
+                        i2c0 {
+                                i2c0_default_mode: i2c_default {
+                                        default_mux {
+                                                ste,function = "i2c0";
+                                                ste,pins = "i2c0_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+
+                                i2c0_sleep_mode: i2c_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        i2c1 {
+                                i2c1_default_mode: i2c_default {
+                                        default_mux {
+                                                ste,function = "i2c1";
+                                                ste,pins = "i2c1_b_2";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+
+                                i2c1_sleep_mode: i2c_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        i2c2 {
+                                i2c2_default_mode: i2c_default {
+                                        default_mux {
+                                                ste,function = "i2c2";
+                                                ste,pins = "i2c2_b_2";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+
+                                i2c2_sleep_mode: i2c_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        i2c3 {
+                                i2c3_default_mode: i2c_default {
+                                        default_mux {
+                                                ste,function = "i2c3";
+                                                ste,pins = "i2c3_c_2";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+
+                                i2c3_sleep_mode: i2c_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        /*
+                         * Activating I2C4 will conflict with UART1 about the same pins so do not
+                         * enable I2C4 and UART1 at the same time.
+                         */
+                        i2c4 {
+                                i2c4_default_mode: i2c_default {
+                                        default_mux {
+                                                ste,function = "i2c4";
+                                                ste,pins = "i2c4_b_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+
+                                i2c4_sleep_mode: i2c_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        /* Settings for all SPI default and sleep states */
+                        spi2 {
+                                spi2_default_mode: spi_default {
+                                        default_mux {
+                                                ste,function = "spi2";
+                                                ste,pins = "spi2_oc1_2";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO216_AG12"; /* FRM */
+                                                ste,config = <&gpio_out_hi>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins = "GPIO218_AH11"; /* RXD */
+                                                ste,config = <&in_pd>;
+                                        };
+                                        default_cfg3 {
+                                                ste,pins =
+                                                "GPIO215_AH13", /* TXD */
+                                                "GPIO217_AH12"; /* CLK */
+                                                ste,config = <&out_lo>;
+                                        };
+                                };
+
+                                spi2_idle_mode: spi_idle {
+                                        /*
+                                         * The idle mode is basically sleep mode sans wakeups. Also
+                                         * note that we have muxes the pins off the function here
+                                         * as we do not state any muxing.
+                                         */
+                                        idle_cfg1 {
+                                                ste,pins = "GPIO218_AH11"; /* RXD */
+                                                ste,config = <&slpm_in_pdis>;
+                                        };
+                                        idle_cfg2 {
+                                                ste,pins = "GPIO215_AH13"; /* TXD */
+                                                ste,config = <&slpm_out_lo_pdis>;
+                                        };
+                                        idle_cfg3 {
+                                                ste,pins = "GPIO217_AH12"; /* CLK */
+                                                ste,config = <&slpm_pdis>;
+                                        };
+                                };
+
+                                spi2_sleep_mode: spi_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins =
+                                                "GPIO216_AG12", /* FRM */
+                                                "GPIO218_AH11"; /* RXD */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+                                        sleep_cfg2 {
+                                                ste,pins = "GPIO215_AH13"; /* TXD */
+                                                ste,config = <&slpm_out_lo_wkup_pdis>;
+                                        };
+                                        sleep_cfg3 {
+                                                ste,pins = "GPIO217_AH12"; /* CLK */
+                                                ste,config = <&slpm_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        /* Settings for all MMC/SD/SDIO default and sleep states */
+                        sdi0 {
+                                /* This is the external SD card slot, 4 bits wide */
+                                sdi0_default_mode: sdi0_default {
+                                        default_mux {
+                                                ste,function = "mc0";
+                                                ste,pins = "mc0_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins =
+                                                "GPIO18_AC2", /* CMDDIR */
+                                                "GPIO19_AC1", /* DAT0DIR */
+                                                "GPIO20_AB4"; /* DAT2DIR */
+                                                ste,config = <&out_hi>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins = "GPIO22_AA3"; /* FBCLK */
+                                                ste,config = <&in_nopull>;
+                                        };
+                                        default_cfg3 {
+                                                ste,pins = "GPIO23_AA4"; /* CLK */
+                                                ste,config = <&out_lo>;
+                                        };
+                                        default_cfg4 {
+                                                ste,pins =
+                                                "GPIO24_AB2", /* CMD */
+                                                "GPIO25_Y4", /* DAT0 */
+                                                "GPIO26_Y2", /* DAT1 */
+                                                "GPIO27_AA2", /* DAT2 */
+                                                "GPIO28_AA1"; /* DAT3 */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+
+                                sdi0_sleep_mode: sdi0_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins =
+                                                "GPIO18_AC2", /* CMDDIR */
+                                                "GPIO19_AC1", /* DAT0DIR */
+                                                "GPIO20_AB4"; /* DAT2DIR */
+                                                ste,config = <&slpm_out_hi_wkup_pdis>;
+                                        };
+                                        sleep_cfg2 {
+                                                ste,pins =
+                                                "GPIO22_AA3", /* FBCLK */
+                                                "GPIO24_AB2", /* CMD */
+                                                "GPIO25_Y4", /* DAT0 */
+                                                "GPIO26_Y2", /* DAT1 */
+                                                "GPIO27_AA2", /* DAT2 */
+                                                "GPIO28_AA1"; /* DAT3 */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+                                        sleep_cfg3 {
+                                                ste,pins = "GPIO23_AA4"; /* CLK */
+                                                ste,config = <&slpm_out_lo_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        sdi1 {
+                                /* This is the WLAN SDIO 4 bits wide */
+                                sdi1_default_mode: sdi1_default {
+                                        default_mux {
+                                                ste,function = "mc1";
+                                                ste,pins = "mc1_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO208_AH16"; /* CLK */
+                                                ste,config = <&out_lo>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins = "GPIO209_AG15"; /* FBCLK */
+                                                ste,config = <&in_nopull>;
+                                        };
+                                        default_cfg3 {
+                                                ste,pins =
+                                                "GPIO210_AJ15", /* CMD */
+                                                "GPIO211_AG14", /* DAT0 */
+                                                "GPIO212_AF13", /* DAT1 */
+                                                "GPIO213_AG13", /* DAT2 */
+                                                "GPIO214_AH15"; /* DAT3 */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+
+                                sdi1_sleep_mode: sdi1_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO208_AH16"; /* CLK */
+                                                ste,config = <&slpm_out_lo_wkup_pdis>;
+                                        };
+                                        sleep_cfg2 {
+                                                ste,pins =
+                                                "GPIO209_AG15", /* FBCLK */
+                                                "GPIO210_AJ15", /* CMD */
+                                                "GPIO211_AG14", /* DAT0 */
+                                                "GPIO212_AF13", /* DAT1 */
+                                                "GPIO213_AG13", /* DAT2 */
+                                                "GPIO214_AH15"; /* DAT3 */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        sdi2 {
+                                /* This is the eMMC 8 bits wide, usually PoP eMMC */
+                                sdi2_default_mode: sdi2_default {
+                                        default_mux {
+                                                ste,function = "mc2";
+                                                ste,pins = "mc2_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO128_A5"; /* CLK */
+                                                ste,config = <&out_lo>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins = "GPIO130_C8"; /* FBCLK */
+                                                ste,config = <&in_nopull>;
+                                        };
+                                        default_cfg3 {
+                                                ste,pins =
+                                                "GPIO129_B4", /* CMD */
+                                                "GPIO131_A12", /* DAT0 */
+                                                "GPIO132_C10", /* DAT1 */
+                                                "GPIO133_B10", /* DAT2 */
+                                                "GPIO134_B9", /* DAT3 */
+                                                "GPIO135_A9", /* DAT4 */
+                                                "GPIO136_C7", /* DAT5 */
+                                                "GPIO137_A7", /* DAT6 */
+                                                "GPIO138_C5"; /* DAT7 */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+
+                                sdi2_sleep_mode: sdi2_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO128_A5"; /* CLK */
+                                                ste,config = <&out_lo_wkup_pdis>;
+                                        };
+                                        sleep_cfg2 {
+                                                ste,pins =
+                                                "GPIO130_C8", /* FBCLK */
+                                                "GPIO129_B4"; /* CMD */
+                                                ste,config = <&in_wkup_pdis_en>;
+                                        };
+                                        sleep_cfg3 {
+                                                ste,pins =
+                                                "GPIO131_A12", /* DAT0 */
+                                                "GPIO132_C10", /* DAT1 */
+                                                "GPIO133_B10", /* DAT2 */
+                                                "GPIO134_B9", /* DAT3 */
+                                                "GPIO135_A9", /* DAT4 */
+                                                "GPIO136_C7", /* DAT5 */
+                                                "GPIO137_A7", /* DAT6 */
+                                                "GPIO138_C5"; /* DAT7 */
+                                                ste,config = <&in_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        sdi4 {
+                                /* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
+                                sdi4_default_mode: sdi4_default {
+                                        default_mux {
+                                                ste,function = "mc4";
+                                                ste,pins = "mc4_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO203_AE23"; /* CLK */
+                                                ste,config = <&out_lo>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins = "GPIO202_AF25"; /* FBCLK */
+                                                ste,config = <&in_nopull>;
+                                        };
+                                        default_cfg3 {
+                                                ste,pins =
+                                                "GPIO201_AF24", /* CMD */
+                                                "GPIO200_AH26", /* DAT0 */
+                                                "GPIO199_AH23", /* DAT1 */
+                                                "GPIO198_AG25", /* DAT2 */
+                                                "GPIO197_AH24", /* DAT3 */
+                                                "GPIO207_AJ23", /* DAT4 */
+                                                "GPIO206_AG24", /* DAT5 */
+                                                "GPIO205_AG23", /* DAT6 */
+                                                "GPIO204_AF23"; /* DAT7 */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+
+                                sdi4_sleep_mode: sdi4_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO203_AE23"; /* CLK */
+                                                ste,config = <&out_lo_wkup_pdis>;
+                                        };
+                                        sleep_cfg2 {
+                                                ste,pins =
+                                                "GPIO202_AF25", /* FBCLK */
+                                                "GPIO201_AF24", /* CMD */
+                                                "GPIO200_AH26", /* DAT0 */
+                                                "GPIO199_AH23", /* DAT1 */
+                                                "GPIO198_AG25", /* DAT2 */
+                                                "GPIO197_AH24", /* DAT3 */
+                                                "GPIO207_AJ23", /* DAT4 */
+                                                "GPIO206_AG24", /* DAT5 */
+                                                "GPIO205_AG23", /* DAT6 */
+                                                "GPIO204_AF23"; /* DAT7 */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        /*
+                         * Multi-rate serial ports (MSPs) - MSP3 output is internal and
+                         * cannot be muxed onto any pins.
+                         */
+                        msp0 {
+                                msp0_default_mode: msp0_default {
+                                        default_msp0_mux {
+                                                ste,function = "msp0";
+                                                ste,pins = "msp0txrx_a_1", "msp0tfstck_a_1";
+                                        };
+                                        default_msp0_cfg {
+                                                ste,pins =
+                                                "GPIO12_AC4", /* TXD */
+                                                "GPIO15_AC3", /* RXD */
+                                                "GPIO13_AF3", /* TFS */
+                                                "GPIO14_AE3"; /* TCK */
+                                                ste,config = <&in_nopull>;
+                                        };
+                                };
+                        };
+
+                        msp1 {
+                                msp1_default_mode: msp1_default {
+                                        default_mux {
+                                                ste,function = "msp1";
+                                                ste,pins = "msp1txrx_a_1", "msp1_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO33_AF2";
+                                                ste,config = <&out_lo>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins =
+                                                "GPIO34_AE1",
+                                                "GPIO35_AE2",
+                                                "GPIO36_AG2";
+                                                ste,config = <&in_nopull>;
+                                        };
+
+                                };
+                        };
+
+                        msp2 {
+                                msp2_default_mode: msp2_default {
+                                        /* MSP2 usually used for HDMI audio */
+                                        default_mux {
+                                                ste,function = "msp2";
+                                                ste,pins = "msp2_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins =
+                                                "GPIO193_AH27", /* TXD */
+                                                "GPIO194_AF27", /* TCK */
+                                                "GPIO195_AG28"; /* TFS */
+                                                ste,config = <&in_pd>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins = "GPIO196_AG26"; /* RXD */
+                                                ste,config = <&out_lo>;
+                                        };
+                                };
+                        };
+
+
+                        musb {
+                                musb_default_mode: musb_default {
+                                        default_mux {
+                                                ste,function = "usb";
+                                                ste,pins = "usb_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins =
+                                                "GPIO256_AF28", /* NXT */
+                                                "GPIO258_AD29", /* XCLK */
+                                                "GPIO259_AC29", /* DIR */
+                                                "GPIO260_AD28", /* DAT7 */
+                                                "GPIO261_AD26", /* DAT6 */
+                                                "GPIO262_AE26", /* DAT5 */
+                                                "GPIO263_AG29", /* DAT4 */
+                                                "GPIO264_AE27", /* DAT3 */
+                                                "GPIO265_AD27", /* DAT2 */
+                                                "GPIO266_AC28", /* DAT1 */
+                                                "GPIO267_AC27"; /* DAT0 */
+                                                ste,config = <&in_nopull>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins = "GPIO257_AE29"; /* STP */
+                                                ste,config = <&out_hi>;
+                                        };
+                                };
+
+                                musb_sleep_mode: musb_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins =
+                                                "GPIO256_AF28", /* NXT */
+                                                "GPIO258_AD29", /* XCLK */
+                                                "GPIO259_AC29"; /* DIR */
+                                                ste,config = <&slpm_wkup_pdis_en>;
+                                        };
+                                        sleep_cfg2 {
+                                                ste,pins = "GPIO257_AE29"; /* STP */
+                                                ste,config = <&slpm_out_hi_wkup_pdis>;
+                                        };
+                                        sleep_cfg3 {
+                                                ste,pins =
+                                                "GPIO260_AD28", /* DAT7 */
+                                                "GPIO261_AD26", /* DAT6 */
+                                                "GPIO262_AE26", /* DAT5 */
+                                                "GPIO263_AG29", /* DAT4 */
+                                                "GPIO264_AE27", /* DAT3 */
+                                                "GPIO265_AD27", /* DAT2 */
+                                                "GPIO266_AC28", /* DAT1 */
+                                                "GPIO267_AC27"; /* DAT0 */
+                                                ste,config = <&slpm_in_wkup_pdis_en>;
+                                        };
+                                };
+                        };
+
+                        mcde {
+                                lcd_default_mode: lcd_default {
+                                        default_mux {
+                                                /* Mux in VSI0 and all the data lines */
+                                                ste,function = "lcd";
+                                                ste,pins =
+                                                "lcdvsi0_a_1", /* VSI0 for LCD */
+                                                "lcd_d0_d7_a_1", /* Data lines */
+                                                "lcd_d8_d11_a_1", /* TV-out */
+                                                "lcdaclk_b_1", /* Clock line for TV-out */
+                                                "lcdvsi1_a_1"; /* VSI1 for HDMI */
+                                        };
+                                        default_cfg1 {
+                                                ste,pins =
+                                                "GPIO68_E1", /* VSI0 */
+                                                "GPIO69_E2"; /* VSI1 */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+                                lcd_sleep_mode: lcd_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO69_E2"; /* VSI1 */
+                                                ste,config = <&slpm_in_wkup_pdis>;
+                                        };
+                                };
+                        };
+
+                        ske {
+                                /* SKE keys on position 2 in an 8x8 matrix */
+                                ske_kpa2_default_mode: ske_kpa2_default {
+                                        default_mux {
+                                                ste,function = "kp";
+                                                ste,pins = "kp_a_2";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins =
+                                                "GPIO153_B17", /* I7 */
+                                                "GPIO154_C16", /* I6 */
+                                                "GPIO155_C19", /* I5 */
+                                                "GPIO156_C17", /* I4 */
+                                                "GPIO161_D21", /* I3 */
+                                                "GPIO162_D20", /* I2 */
+                                                "GPIO163_C20", /* I1 */
+                                                "GPIO164_B21"; /* I0 */
+                                                ste,config = <&in_pd>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins =
+                                                "GPIO157_A18", /* O7 */
+                                                "GPIO158_C18", /* O6 */
+                                                "GPIO159_B19", /* O5 */
+                                                "GPIO160_B20", /* O4 */
+                                                "GPIO165_C21", /* O3 */
+                                                "GPIO166_A22", /* O2 */
+                                                "GPIO167_B24", /* O1 */
+                                                "GPIO168_C22"; /* O0 */
+                                                ste,config = <&out_lo>;
+                                        };
+                                };
+                                ske_kpa2_sleep_mode: ske_kpa2_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins =
+                                                "GPIO153_B17", /* I7 */
+                                                "GPIO154_C16", /* I6 */
+                                                "GPIO155_C19", /* I5 */
+                                                "GPIO156_C17", /* I4 */
+                                                "GPIO161_D21", /* I3 */
+                                                "GPIO162_D20", /* I2 */
+                                                "GPIO163_C20", /* I1 */
+                                                "GPIO164_B21"; /* I0 */
+                                                ste,config = <&slpm_in_pu_wkup_pdis_en>;
+                                        };
+                                        sleep_cfg2 {
+                                                ste,pins =
+                                                "GPIO157_A18", /* O7 */
+                                                "GPIO158_C18", /* O6 */
+                                                "GPIO159_B19", /* O5 */
+                                                "GPIO160_B20", /* O4 */
+                                                "GPIO165_C21", /* O3 */
+                                                "GPIO166_A22", /* O2 */
+                                                "GPIO167_B24", /* O1 */
+                                                "GPIO168_C22"; /* O0 */
+                                                ste,config = <&slpm_out_lo_pdis>;
+                                        };
+                                };
+                                /*
+                                 * SKE keys on position 1 and "other C1" combi giving
+                                 * six rows of six keys.
+                                 */
+                                ske_kpaoc1_default_mode: ske_kpaoc1_default {
+                                        default_mux {
+                                                ste,function = "kp";
+                                                ste,pins = "kp_a_1", "kp_oc1_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins =
+                                                "GPIO91_B6", /* KP_O0 */
+                                                "GPIO90_A3", /* KP_O1 */
+                                                "GPIO87_B3", /* KP_O2 */
+                                                "GPIO86_C6", /* KP_O3 */
+                                                "GPIO96_D8", /* KP_O6 */
+                                                "GPIO94_D7"; /* KP_O7 */
+                                                ste,config = <&out_lo>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins =
+                                                "GPIO93_B7", /* KP_I0 */
+                                                "GPIO92_D6", /* KP_I1 */
+                                                "GPIO89_E6", /* KP_I2 */
+                                                "GPIO88_C4", /* KP_I3 */
+                                                "GPIO97_D9", /* KP_I6 */
+                                                "GPIO95_E8"; /* KP_I7 */
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+                        };
+
+                        wlan {
+                                wlan_default_mode: wlan_default {
+                                        /*
+                                         * Activate this mode with the WLAN chip.
+                                         * These are plain GPIO pins used by WLAN
+                                         */
+                                        default_cfg1 {
+                                                ste,pins =
+                                                "GPIO226_AF8", /* WLAN_PMU_EN */
+                                                "GPIO85_D5"; /* WLAN_ENA */
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins = "GPIO4_AH6"; /* WLAN_IRQ on UART1 */
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/ste-href-stuib.dtsi b/arch/arm/boot/dts/ste-href-stuib.dtsi
index 76704ec0ffcc..1c3574435ea8 100644
--- a/arch/arm/boot/dts/ste-href-stuib.dtsi
+++ b/arch/arm/boot/dts/ste-href-stuib.dtsi
@@ -12,6 +12,28 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                vdd-supply = <&ab8500_ldo_aux1_reg>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&prox_stuib_mode>, <&hall_stuib_mode>;
+
+                button@139 {
+                        /* Proximity sensor */
+                        gpios = <&gpio6 25 0x4>;
+                        linux,code = <11>; /* SW_FRONT_PROXIMITY */
+                        label = "SFH7741 Proximity Sensor";
+                };
+                button@145 {
+                        /* Hall sensor */
+                        gpios = <&gpio4 17 0x4>;
+                        linux,code = <0>; /* SW_LID */
+                        label = "HED54XXU11 Hall Effect Sensor";
+                };
+        };
+
         soc {
                 i2c@80004000 {
                         stmpe1601: stmpe1601@40 {
@@ -74,5 +96,24 @@
                                 rohm,flip-y;
                         };
                 };
+
+                pinctrl {
+                        prox {
+                                prox_stuib_mode: prox_stuib {
+                                        stuib_cfg {
+                                                ste,pins = "GPIO217_AH12";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                        hall {
+                                hall_stuib_mode: stuib_tvk {
+                                        stuib_cfg {
+                                                ste,pins = "GPIO145_C13";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                };
         };
 };
diff --git a/arch/arm/boot/dts/ste-href-tvk1281618.dtsi b/arch/arm/boot/dts/ste-href-tvk1281618.dtsi
index 76d3ef13175f..c40565320978 100644
--- a/arch/arm/boot/dts/ste-href-tvk1281618.dtsi
+++ b/arch/arm/boot/dts/ste-href-tvk1281618.dtsi
@@ -14,27 +14,105 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                vdd-supply = <&ab8500_ldo_aux1_reg>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&prox_tvk_mode>, <&hall_tvk_mode>;
+
+                button@139 {
+                        /* Proximity sensor */
+                        gpios = <&gpio6 25 0x4>;
+                        linux,code = <11>; /* SW_FRONT_PROXIMITY */
+                        label = "SFH7741 Proximity Sensor";
+                };
+                button@145 {
+                        /* Hall sensor */
+                        gpios = <&gpio4 17 0x4>;
+                        linux,code = <0>; /* SW_LID */
+                        label = "HED54XXU11 Hall Effect Sensor";
+                };
+        };
+
         soc {
-                /* Add Synaptics touch screen, TC35892 keypad etc here */
+                /* Add Synaptics touch screen, TC35893 keypad etc here */
                 i2c@80004000 {
-                        tc3589x@44 {
-                                compatible = "tc3589x";
+                        tc35893@44 {
+                                compatible = "toshiba,tc35893";
                                 reg = <0x44>;
                                 interrupt-parent = <&gpio6>;
                                 interrupts = <26 IRQ_TYPE_EDGE_RISING>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&tc35893_tvk_mode>;
 
                                 interrupt-controller;
-                                #interrupt-cells = <2>;
+                                #interrupt-cells = <1>;
 
                                 tc3589x_gpio {
-                                        compatible = "tc3589x-gpio";
-                                        interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+                                        compatible = "toshiba,tc3589x-gpio";
+                                        interrupts = <0>;
 
                                         interrupt-controller;
                                         #interrupt-cells = <2>;
                                         gpio-controller;
                                         #gpio-cells = <2>;
                                 };
+                                tc3589x_keypad {
+                                        compatible = "toshiba,tc3589x-keypad";
+                                        interrupts = <6>;
+                                        debounce-delay-ms = <4>;
+                                        keypad,num-columns = <8>;
+                                        keypad,num-rows = <8>;
+                                        linux,no-autorepeat;
+                                        linux,wakeup;
+                                        linux,keymap = <0x0301006b
+                                                        0x04010066
+                                                        0x06040072
+                                                        0x040200d7
+                                                        0x0303006a
+                                                        0x0205000e
+                                                        0x0607008b
+                                                        0x0500001c
+                                                        0x0403000b
+                                                        0x03040034
+                                                        0x05020067
+                                                        0x0305006c
+                                                        0x040500e7
+                                                        0x0005009e
+                                                        0x06020073
+                                                        0x01030039
+                                                        0x07060069
+                                                        0x050500d9>;
+                                };
+                        };
+                };
+                pinctrl {
+                        /* Pull up this GPIO pin */
+                        tc35893 {
+                                tc35893_tvk_mode: tc35893_tvk {
+                                        tvk_cfg {
+                                                ste,pins = "GPIO218_AH11";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                        prox {
+                                prox_tvk_mode: prox_tvk {
+                                        tvk_cfg {
+                                                ste,pins = "GPIO217_AH12";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                        hall {
+                                hall_tvk_mode: hall_tvk {
+                                        tvk_cfg {
+                                                ste,pins = "GPIO145_C13";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
                         };
                 };
         };
diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi
index aa3f02060fdd..e28242173d18 100644
--- a/arch/arm/boot/dts/ste-href.dtsi
+++ b/arch/arm/boot/dts/ste-href.dtsi
@@ -11,37 +11,57 @@
 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include "ste-dbx5x0.dtsi"
+#include "ste-href-family-pinctrl.dtsi"
 
 / {
         memory {
                 reg = <0x00000000 0x20000000>;
         };
 
-        gpio_keys {
-                compatible = "gpio-keys";
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                button@1 {
-                        linux,code = <11>;
-                        label = "SFH7741 Proximity Sensor";
+        soc {
+                usb_per5@a03e0000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&musb_default_mode>;
+                        pinctrl-1 = <&musb_sleep_mode>;
                 };
-        };
 
-        soc {
                 uart@80120000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&uart0_default_mode>;
+                        pinctrl-1 = <&uart0_sleep_mode>;
                         status = "okay";
                 };
 
                 uart@80121000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&uart1_default_mode>;
+                        pinctrl-1 = <&uart1_sleep_mode>;
                         status = "okay";
                 };
 
                 uart@80007000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&uart2_default_mode>;
+                        pinctrl-1 = <&uart2_sleep_mode>;
                         status = "okay";
                 };
 
+                i2c@80004000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c0_default_mode>;
+                        pinctrl-1 = <&i2c0_sleep_mode>;
+                };
+
+                i2c@80122000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c1_default_mode>;
+                        pinctrl-1 = <&i2c1_sleep_mode>;
+                };
+
                 i2c@80128000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c2_default_mode>;
+                        pinctrl-1 = <&i2c2_sleep_mode>;
                         lp5521@33 {
                                 compatible = "national,lp5521";
                                 reg = <0x33>;
@@ -85,6 +105,12 @@
                         };
                 };
 
+                i2c@80110000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c3_default_mode>;
+                        pinctrl-1 = <&i2c3_sleep_mode>;
+                };
+
                 // External Micro SD slot
                 sdi0_per1@80126000 {
                         arm,primecell-periphid = <0x10480180>;
@@ -94,6 +120,9 @@
                         mmc-cap-mmc-highspeed;
                         vmmc-supply = <&ab8500_ldo_aux3_reg>;
                         vqmmc-supply = <&vmmci>;
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&sdi0_default_mode>;
+                        pinctrl-1 = <&sdi0_sleep_mode>;
 
                         cd-gpios  = <&tc3589x_gpio 3 0x4>;
 
@@ -105,6 +134,9 @@
                         arm,primecell-periphid = <0x10480180>;
                         max-frequency = <100000000>;
                         bus-width = <4>;
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&sdi1_default_mode>;
+                        pinctrl-1 = <&sdi1_sleep_mode>;
 
                         status = "okay";
                 };
@@ -115,6 +147,9 @@
                         max-frequency = <100000000>;
                         bus-width = <8>;
                         mmc-cap-mmc-highspeed;
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&sdi2_default_mode>;
+                        pinctrl-1 = <&sdi2_sleep_mode>;
 
                         status = "okay";
                 };
@@ -126,6 +161,9 @@
                         bus-width = <8>;
                         mmc-cap-mmc-highspeed;
                         vmmc-supply = <&ab8500_ldo_aux2_reg>;
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&sdi4_default_mode>;
+                        pinctrl-1 = <&sdi4_sleep_mode>;
 
                         status = "okay";
                 };
@@ -137,7 +175,21 @@
                         stericsson,audio-codec = <&codec>;
                 };
 
+                msp0: msp@80123000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&msp0_default_mode>;
+                        status = "okay";
+                };
+
                 msp1: msp@80124000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&msp1_default_mode>;
+                        status = "okay";
+                };
+
+                msp2: msp@80117000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&msp2_default_mode>;
                         status = "okay";
                 };
 
@@ -198,5 +250,11 @@
                                 };
                         };
                 };
+
+                mcde@a0350000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&lcd_default_mode>;
+                        pinctrl-1 = <&lcd_sleep_mode>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi
index b2cd7bc2752f..b0f5def8e2a8 100644
--- a/arch/arm/boot/dts/ste-hrefprev60.dtsi
+++ b/arch/arm/boot/dts/ste-hrefprev60.dtsi
@@ -28,18 +28,20 @@
                                 reg = <0x33>;
                         };
 
-                        tc3589x@42 {
-                                compatible = "tc3589x";
+                        tc35892@42 {
+                                compatible = "toshiba,tc35892";
                                 reg = <0x42>;
                                 interrupt-parent = <&gpio6>;
                                 interrupts = <25 IRQ_TYPE_EDGE_RISING>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&tc35892_hrefprev60_mode>;
 
                                 interrupt-controller;
-                                #interrupt-cells = <2>;
+                                #interrupt-cells = <1>;
 
                                 tc3589x_gpio: tc3589x_gpio {
                                         compatible = "tc3589x-gpio";
-                                        interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+                                        interrupts = <0>;
 
                                         interrupt-controller;
                                         #interrupt-cells = <2>;
@@ -49,11 +51,74 @@
                         };
                 };
 
+                ssp@80002000 {
+                        /*
+                         * On the first generation boards, this SSP/SPI port was connected
+                         * to the AB8500.
+                         */
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&ssp0_hrefprev60_mode>;
+                };
+
                 vmmci: regulator-gpio {
                         gpios = <&tc3589x_gpio 18 0x4>;
                         enable-gpio = <&tc3589x_gpio 17 0x4>;
 
                         status = "okay";
                 };
+
+                pinctrl {
+                        /* Set this up using hogs */
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&ipgpio_hrefprev60_mode>;
+
+                        ssp0 {
+                                ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
+                                        hrefprev60_mux {
+                                                ste,function = "ssp0";
+                                                ste,pins = "ssp0_a_1";
+                                        };
+                                        hrefprev60_cfg1 {
+                                                ste,pins = "GPIO145_C13"; /* RXD */
+                                                ste,config = <&in_pd>;
+                                        };
+
+                                };
+                        };
+                        sdi0 {
+                                /* This additional pin needed on early MOP500 and HREFs previous to v60 */
+                                sdi0_default_mode: sdi0_default {
+                                        hrefprev60_mux {
+                                                ste,function = "mc0";
+                                                ste,pins = "mc0dat31dir_a_1";
+                                        };
+                                        hrefprev60_cfg1 {
+                                                ste,pins = "GPIO21_AB3"; /* DAT31DIR */
+                                                ste,config = <&out_hi>;
+                                        };
+
+                                };
+                        };
+                        tc35892 {
+                                tc35892_hrefprev60_mode: tc35892_hrefprev60 {
+                                        hrefprev60_cfg {
+                                                ste,pins = "GPIO217_AH12";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                        ipgpio {
+                                 ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
+                                        hrefprev60_mux {
+                                                ste,function = "ipgpio";
+                                                ste,pins = "ipgpio0_c_1", "ipgpio1_c_1";
+                                        };
+                                        hrefprev60_cfg1 {
+                                                ste,pins = "GPIO6_AF6", "GPIO7_AG5";
+                                                ste,config = <&in_pu>;
+                                        };
+                                 };
+                        };
+                };
         };
 };
diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
index aed511b47a9e..941bf9ad6f01 100644
--- a/arch/arm/boot/dts/ste-hrefv60plus.dtsi
+++ b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
@@ -16,12 +16,6 @@
         model = "ST-Ericsson HREF (v60+) platform with Device Tree";
         compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
 
-        gpio_keys {
-                button@1 {
-                        gpios = <&gpio5 25 0x4>;
-                };
-        };
-
         soc {
                 // External Micro SD slot
                 sdi0_per1@80126000 {
@@ -66,5 +60,216 @@
 
                         status = "okay";
                 };
+
+                pinctrl {
+                        /*
+                         * Set this up using hogs, as time goes by and as seems fit, these
+                         * can be moved over to being controlled by respective device.
+                         */
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&ipgpio_hrefv60_mode>,
+                                  <&accel_hrefv60_mode>,
+                                  <&magneto_hrefv60_mode>,
+                                  <&etm_hrefv60_mode>,
+                                  <&nahj_hrefv60_mode>,
+                                  <&nfc_hrefv60_mode>,
+                                  <&force_hrefv60_mode>,
+                                  <&dipro_hrefv60_mode>,
+                                  <&vaudio_hf_hrefv60_mode>,
+                                  <&gbf_hrefv60_mode>,
+                                  <&hdtv_hrefv60_mode>,
+                                  <&touch_hrefv60_mode>;
+
+                        sdi0 {
+                                /* SD card detect GPIO pin, extend default state */
+                                sdi0_default_mode: sdi0_default {
+                                        default_hrefv60_cfg1 {
+                                                ste,pins = "GPIO95_E8";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                        ipgpio {
+                                /*
+                                 * XENON Flashgun on image processor GPIO (controlled from image
+                                 * processor firmware), mux in these image processor GPIO lines 0
+                                 * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
+                                 * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
+                                 * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
+                                 */
+                                ipgpio_hrefv60_mode: ipgpio_hrefv60 {
+                                        hrefv60_mux {
+                                                ste,function = "ipgpio";
+                                                ste,pins = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
+                                        };
+                                        hrefv60_cfg1 {
+                                                ste,pins = "GPIO6_AF6", "GPIO7_AG5";
+                                                ste,config = <&in_pu>;
+                                        };
+                                        hrefv60_cfg2 {
+                                                ste,pins = "GPIO21_AB3";
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                        hrefv60_cfg3 {
+                                                ste,pins = "GPIO64_F3";
+                                                ste,config = <&out_lo>;
+                                        };
+                                };
+                        };
+                        accelerometer {
+                                accel_hrefv60_mode: accel_hrefv60 {
+                                        /* Accelerometer interrupt lines 1 & 2 */
+                                        hrefv60_cfg1 {
+                                                ste,pins = "GPIO82_C1", "GPIO83_D3";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                        magnetometer {
+                                magneto_hrefv60_mode: magneto_hrefv60 {
+                                        /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
+                                        hrefv60_cfg1 {
+                                                ste,pins = "GPIO31_V3";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                        hrefv60_cfg2 {
+                                                ste,pins = "GPIO32_V2";
+                                                ste,config = <&gpio_in_pd>;
+                                        };
+                                };
+                        };
+                        etm {
+                                /*
+                                 * Drive D19-D23 for the ETM PTM trace interface low,
+                                 * (presumably pins are unconnected therefore grounded here,
+                                 * the "other alt C1" setting enables these pins)
+                                 */
+                                etm_hrefv60_mode: etm_hrefv60 {
+                                        hrefv60_cfg1 {
+                                                ste,pins =
+                                                "GPIO70_G5",
+                                                "GPIO71_G4",
+                                                "GPIO72_H4",
+                                                "GPIO73_H3",
+                                                "GPIO74_J3";
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                 };
+                        };
+                        nahj {
+                                nahj_hrefv60_mode: nahj_hrefv60 {
+                                        /* NAHJ CTRL on GPIO76 to low, CTRL_INV on GPIO216 to high */
+                                        hrefv60_cfg1 {
+                                                ste,pins = "GPIO76_J2";
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                        hrefv60_cfg2 {
+                                                ste,pins = "GPIO216_AG12";
+                                                ste,config = <&gpio_out_hi>;
+                                        };
+                                 };
+                        };
+                        nfc {
+                                nfc_hrefv60_mode: nfc_hrefv60 {
+                                        /* NFC ENA and RESET to low, pulldown IRQ line */
+                                        hrefv60_cfg1 {
+                                                ste,pins =
+                                                "GPIO77_H1", /* NFC_ENA */
+                                                "GPIO142_C11"; /* NFC_RESET */
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                        hrefv60_cfg2 {
+                                                ste,pins = "GPIO144_B13"; /* NFC_IRQ */
+                                                ste,config = <&gpio_in_pd>;
+                                        };
+                                 };
+                        };
+                        force {
+                                force_hrefv60_mode: force_hrefv60 {
+                                        hrefv60_cfg1 {
+                                                ste,pins = "GPIO91_B6"; /* FORCE_SENSING_INT */
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                        hrefv60_cfg2 {
+                                                ste,pins =
+                                                "GPIO92_D6", /* FORCE_SENSING_RST */
+                                                "GPIO97_D9"; /* FORCE_SENSING_WU */
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                 };
+                        };
+                        dipro {
+                                dipro_hrefv60_mode: dipro_hrefv60 {
+                                        hrefv60_cfg1 {
+                                                ste,pins = "GPIO139_C9"; /* DIPRO_INT */
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                 };
+                        };
+                        vaudio_hf {
+                                vaudio_hf_hrefv60_mode: vaudio_hf_hrefv60 {
+                                        /* Audio Amplifier HF enable GPIO */
+                                        hrefv60_cfg1 {
+                                                ste,pins = "GPIO149_B14"; /* VAUDIO_HF_EN, enable MAX8968 */
+                                                ste,config = <&gpio_out_hi>;
+                                        };
+                                 };
+                        };
+                        gbf {
+                                gbf_hrefv60_mode: gbf_hrefv60 {
+                                        /*
+                                         * GBF (GPS, Bluetooth, FM-radio) interface,
+                                         * pull low to reset state
+                                         */
+                                        hrefv60_cfg1 {
+                                                ste,pins = "GPIO171_D23"; /* GBF_ENA_RESET */
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                 };
+                        };
+                        hdtv {
+                                hdtv_hrefv60_mode: hdtv_hrefv60 {
+                                        /* MSP : HDTV INTERFACE GPIO line */
+                                        hrefv60_cfg1 {
+                                                ste,pins = "GPIO192_AJ27";
+                                                ste,config = <&gpio_in_pd>;
+                                        };
+                                 };
+                        };
+                        touch {
+                                touch_hrefv60_mode: touch_hrefv60 {
+                                        /*
+                                         * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
+                                         * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
+                                         * reset signals low.
+                                         */
+                                        hrefv60_cfg1 {
+                                                ste,pins = "GPIO143_D12", "GPIO146_D13";
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                        hrefv60_cfg2 {
+                                                ste,pins = "GPIO67_G2";
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                        mcde {
+                                lcd_hrefv60_mode: lcd_hrefv60 {
+                                        /*
+                                         * Display Interface 1 uses GPIO 65 for RST (reset).
+                                         * Display Interface 2 uses GPIO 66 for RST (reset).
+                                         * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
+                                         */
+                                        hrefv60_cfg1 {
+                                                ste,pins ="GPIO65_F1";
+                                                ste,config = <&gpio_out_hi>;
+                                        };
+                                        hrefv60_cfg2 {
+                                                ste,pins ="GPIO66_G3";
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                };
+                        };
+                };
         };
 };
diff --git a/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi b/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi
index efddee9403c4..e6f22b266420 100644
--- a/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi
@@ -31,17 +31,57 @@
                 ste,output = <OUTPUT_LOW>;
         };
 
+        gpio_in_pu: gpio_input_pull_up {
+                ste,gpio = <GPIOMODE_ENABLED>;
+                ste,input = <INPUT_PULLUP>;
+        };
+
+        gpio_in_pd: gpio_input_pull_down {
+                ste,gpio = <GPIOMODE_ENABLED>;
+                ste,input = <INPUT_PULLDOWN>;
+        };
+
         gpio_out_lo: gpio_output_low {
                 ste,gpio = <GPIOMODE_ENABLED>;
                 ste,output = <OUTPUT_LOW>;
         };
 
+        gpio_out_hi: gpio_output_high {
+                ste,gpio = <GPIOMODE_ENABLED>;
+                ste,output = <OUTPUT_HIGH>;
+        };
+
+        slpm_pdis: slpm_pdis {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_DISABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+
+        slpm_wkup_pdis: slpm_wkup_pdis {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+
+        slpm_wkup_pdis_en: slpm_wkup_pdis_en {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_ENABLED>;
+        };
+
         slpm_in_pu: slpm_in_pu {
                 ste,sleep = <SLPM_ENABLED>;
                 ste,sleep-input = <SLPM_INPUT_PULLUP>;
                 ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
         };
 
+        slpm_in_pdis: slpm_in_pdis {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-input = <SLPM_DIR_INPUT>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_DISABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+
         slpm_in_wkup_pdis: slpm_in_wkup_pdis {
                 ste,sleep = <SLPM_ENABLED>;
                 ste,sleep-input = <SLPM_DIR_INPUT>;
@@ -49,6 +89,20 @@
                 ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
         };
 
+        slpm_in_wkup_pdis_en: slpm_in_wkup_pdis_en {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-input = <SLPM_DIR_INPUT>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_ENABLED>;
+        };
+
+        slpm_in_pu_wkup_pdis_en: slpm_in_wkup_pdis_en {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-input = <SLPM_INPUT_PULLUP>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_ENABLED>;
+        };
+
         slpm_out_lo: slpm_out_lo {
                 ste,sleep = <SLPM_ENABLED>;
                 ste,sleep-output = <SLPM_OUTPUT_LOW>;
@@ -68,6 +122,20 @@
                 ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
         };
 
+        slpm_out_lo_pdis: slpm_out_lo_pdis {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-output = <SLPM_OUTPUT_LOW>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_DISABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+
+        slpm_out_lo_wkup_pdis: slpm_out_lo_wkup_pdis {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-output = <SLPM_OUTPUT_LOW>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+
         slpm_out_wkup_pdis: slpm_out_wkup_pdis {
                 ste,sleep = <SLPM_ENABLED>;
                 ste,sleep-output = <SLPM_DIR_OUTPUT>;
@@ -81,6 +149,18 @@
                 ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
         };
 
+        in_wkup_pdis_en: in_wkup_pdis_en {
+                ste,sleep-input = <SLPM_DIR_INPUT>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_ENABLED>;
+        };
+
+        out_lo_wkup_pdis: out_lo_wkup_pdis {
+                ste,sleep-output = <SLPM_OUTPUT_LOW>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+
         out_hi_wkup_pdis: out_hi_wkup_pdis {
                 ste,sleep-output = <SLPM_OUTPUT_HIGH>;
                 ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
diff --git a/arch/arm/boot/dts/ste-nomadik-s8815.dts b/arch/arm/boot/dts/ste-nomadik-s8815.dts
index 16c3888b7b15..f557feb997f4 100644
--- a/arch/arm/boot/dts/ste-nomadik-s8815.dts
+++ b/arch/arm/boot/dts/ste-nomadik-s8815.dts
@@ -67,10 +67,6 @@
 
         /* Custom board node with GPIO pins to active etc */
         usb-s8815 {
-                /* The S8815 is using this very GPIO pin for the SMSC91x IRQs */
-                ethernet-gpio {
-                        gpios = <&gpio3 8 0x1>;
-                };
                 /* This will bias the MMC/SD card detect line */
                 mmcsd-gpio {
                         gpios = <&gpio3 16 0x1>;
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index 79425e3836ce..5acc0449676a 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -769,14 +769,14 @@
                 #size-cells = <1>;
                 ranges;
 
-                vica: intc@0x10140000 {
+                vica: intc@10140000 {
                         compatible = "arm,versatile-vic";
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         reg = <0x10140000 0x20>;
                 };
 
-                vicb: intc@0x10140020 {
+                vicb: intc@10140020 {
                         compatible = "arm,versatile-vic";
                         interrupt-controller;
                         #interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index f0b39f835914..9070c3701c89 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -11,6 +11,7 @@
 
 /dts-v1/;
 #include "ste-dbx5x0.dtsi"
+#include "ste-href-family-pinctrl.dtsi"
 
 / {
         model = "Calao Systems Snowball platform with device tree";
@@ -75,6 +76,8 @@
 
         leds {
                 compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&gpioled_snowball_mode>;
                 used-led {
                         label = "user_led";
                         gpios = <&gpio4 14 0x4>;
@@ -84,6 +87,11 @@
         };
 
         soc {
+                usb_per5@a03e0000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&musb_default_mode>;
+                        pinctrl-1 = <&musb_sleep_mode>;
+                };
 
                 sound {
                         compatible = "stericsson,snd-soc-mop500";
@@ -92,7 +100,21 @@
                         stericsson,audio-codec = <&codec>;
                 };
 
+                msp0: msp@80123000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&msp0_default_mode>;
+                        status = "okay";
+                };
+
                 msp1: msp@80124000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&msp1_default_mode>;
+                        status = "okay";
+                };
+
+                msp2: msp@80117000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&msp2_default_mode>;
                         status = "okay";
                 };
 
@@ -110,6 +132,8 @@
                                 interrupt-parent = <&gpio4>;
                                 vdd33a-supply = <&en_3v3_reg>;
                                 vddvario-supply = <&db8500_vape_reg>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&eth_snowball_mode>;
 
                                 reg-shift = <1>;
                                 reg-io-width = <2>;
@@ -136,6 +160,9 @@
                         mmc-cap-mmc-highspeed;
                         vmmc-supply = <&ab8500_ldo_aux3_reg>;
                         vqmmc-supply = <&vmmci>;
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&sdi0_default_mode>;
+                        pinctrl-1 = <&sdi0_sleep_mode>;
 
                         cd-gpios  = <&gpio6 26 0x4>; // 218
                         cd-inverted;
@@ -143,6 +170,27 @@
                         status = "okay";
                 };
 
+                // WLAN SDIO channel
+                sdi1_per2@80118000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <100000000>;
+                        bus-width = <4>;
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&sdi1_default_mode>;
+                        pinctrl-1 = <&sdi1_sleep_mode>;
+
+                        status = "okay";
+                };
+
+                // Unused PoP eMMC - register and put it to sleep by default */
+                sdi2_per3@80005000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&sdi2_sleep_mode>;
+
+                        status = "okay";
+                };
+
                 // On-board eMMC
                 sdi4_per2@80114000 {
                         arm,primecell-periphid = <0x10480180>;
@@ -150,22 +198,63 @@
                         bus-width = <8>;
                         mmc-cap-mmc-highspeed;
                         vmmc-supply = <&ab8500_ldo_aux2_reg>;
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&sdi4_default_mode>;
+                        pinctrl-1 = <&sdi4_sleep_mode>;
 
                         status = "okay";
                 };
 
                 uart@80120000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&uart0_default_mode>;
+                        pinctrl-1 = <&uart0_sleep_mode>;
                         status = "okay";
                 };
 
                 uart@80121000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&uart1_default_mode>;
+                        pinctrl-1 = <&uart1_sleep_mode>;
                         status = "okay";
                 };
 
                 uart@80007000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&uart2_default_mode>;
+                        pinctrl-1 = <&uart2_sleep_mode>;
                         status = "okay";
                 };
 
+                i2c@80004000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c0_default_mode>;
+                        pinctrl-1 = <&i2c0_sleep_mode>;
+                };
+
+                i2c@80122000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c1_default_mode>;
+                        pinctrl-1 = <&i2c1_sleep_mode>;
+                };
+
+                i2c@80128000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c2_default_mode>;
+                        pinctrl-1 = <&i2c2_sleep_mode>;
+                };
+
+                i2c@80110000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c3_default_mode>;
+                        pinctrl-1 = <&i2c3_sleep_mode>;
+                };
+
+                ssp@80002000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&ssp0_snowball_mode>;
+                };
+
                 cpufreq-cooling {
                         status = "okay";
                 };
@@ -266,5 +355,141 @@
                                 };
                         };
                 };
+
+                pinctrl {
+                        /*
+                         * Set this up using hogs, as time goes by and as seems fit, these
+                         * can be moved over to being controlled by respective device.
+                         */
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&accel_snowball_mode>,
+                                  <&magneto_snowball_mode>,
+                                  <&gbf_snowball_mode>,
+                                  <&wlan_snowball_mode>;
+
+                        ethernet {
+                                /*
+                                 * Mux in "SM" which is used for the
+                                 * SMSC911x Ethernet adapter
+                                 */
+                                eth_snowball_mode: eth_snowball {
+                                        snowball_mux {
+                                                ste,function = "sm";
+                                                ste,pins = "sm_b_1";
+                                        };
+                                        /* LAN IRQ pin */
+                                        snowball_cfg1 {
+                                                ste,pins = "GPIO140_B11";
+                                                ste,config = <&in_nopull>;
+                                        };
+                                        /* LAN reset pin */
+                                        snowball_cfg2 {
+                                                ste,pins = "GPIO141_C12";
+                                                ste,config = <&gpio_out_hi>;
+                                        };
+
+                                };
+                        };
+                        sdi0 {
+                                sdi0_default_mode: sdi0_default {
+                                        snowball_mux {
+                                                ste,function = "mc0";
+                                                ste,pins = "mc0dat31dir_a_1";
+                                        };
+                                        snowball_cfg1 {
+                                                ste,pins = "GPIO21_AB3"; /* DAT31DIR */
+                                                ste,config = <&out_hi>;
+                                        };
+
+                                };
+                        };
+                        ssp0 {
+                                ssp0_snowball_mode: ssp0_snowball_default {
+                                        snowball_mux {
+                                                ste,function = "ssp0";
+                                                ste,pins = "ssp0_a_1";
+                                        };
+                                        snowball_cfg1 {
+                                                ste,pins = "GPIO144_B13"; /* FRM */
+                                                ste,config = <&gpio_out_hi>;
+                                        };
+                                        snowball_cfg2 {
+                                                ste,pins = "GPIO145_C13"; /* RXD */
+                                                ste,config = <&in_pd>;
+                                        };
+                                        snowball_cfg3 {
+                                                ste,pins =
+                                                "GPIO146_D13", /* TXD */
+                                                "GPIO143_D12"; /* CLK */
+                                                ste,config = <&out_lo>;
+                                        };
+
+                                };
+                        };
+                        gpio_led {
+                                gpioled_snowball_mode: gpioled_default {
+                                        snowball_cfg1 {
+                                                ste,pins = "GPIO142_C11";
+                                                ste,config = <&gpio_out_hi>;
+                                        };
+
+                                };
+                        };
+                        accelerometer {
+                                accel_snowball_mode: accel_snowball {
+                                        /* Accelerometer lines */
+                                        snowball_cfg1 {
+                                                ste,pins =
+                                                "GPIO163_C20", /* ACCEL_IRQ1 */
+                                                "GPIO164_B21"; /* ACCEL_IRQ2 */
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                        magnetometer {
+                                magneto_snowball_mode: magneto_snowball {
+                                        snowball_cfg1 {
+                                                ste,pins = "GPIO165_C21"; /* MAG_DRDY */
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                        gbf {
+                                gbf_snowball_mode: gbf_snowball {
+                                        /*
+                                         * GBF (GPS, Bluetooth, FM-radio) interface,
+                                         * pull low to reset state
+                                         */
+                                        snowball_cfg1 {
+                                                ste,pins = "GPIO171_D23"; /* GBF_ENA_RESET */
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                 };
+                        };
+                        wlan {
+                                wlan_snowball_mode: wlan_snowball {
+                                        /*
+                                         * Activate this mode with the WLAN chip.
+                                         * These are plain GPIO pins used by WLAN
+                                         */
+                                        snowball_cfg1 {
+                                                ste,pins =
+                                                "GPIO161_D21", /* WLAN_PMU_EN */
+                                                "GPIO215_AH13"; /* WLAN_ENA */
+                                                ste,config = <&gpio_out_lo>;
+                                        };
+                                        snowball_cfg2 {
+                                                ste,pins = "GPIO216_AG12"; /* WLAN_IRQ */
+                                                ste,config = <&gpio_in_pu>;
+                                        };
+                                };
+                        };
+                };
+
+                mcde@a0350000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&lcd_default_mode>;
+                        pinctrl-1 = <&lcd_sleep_mode>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/stih415-pinctrl.dtsi b/arch/arm/boot/dts/stih415-pinctrl.dtsi
index 1d322b24d1e4..e56449d41481 100644
--- a/arch/arm/boot/dts/stih415-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih415-pinctrl.dtsi
@@ -86,6 +86,24 @@
                                         };
                                 };
                         };
+
+                        sbc_i2c0 {
+                                pinctrl_sbc_i2c0_default: sbc_i2c0-default {
+                                        st,pins {
+                                                sda = <&PIO4 6 ALT1 BIDIR>;
+                                                scl = <&PIO4 5 ALT1 BIDIR>;
+                                        };
+                                };
+                        };
+
+                        sbc_i2c1 {
+                                pinctrl_sbc_i2c1_default: sbc_i2c1-default {
+                                        st,pins {
+                                                sda = <&PIO3 2 ALT2 BIDIR>;
+                                                scl = <&PIO3 1 ALT2 BIDIR>;
+                                        };
+                                };
+                        };
                 };
 
                 pin-controller-front {
@@ -143,6 +161,24 @@
                                 reg             = <0x7000 0x100>;
                                 st,bank-name    = "PIO12";
                         };
+
+                        i2c0 {
+                                pinctrl_i2c0_default: i2c0-default {
+                                        st,pins {
+                                                sda = <&PIO9 3 ALT1 BIDIR>;
+                                                scl = <&PIO9 2 ALT1 BIDIR>;
+                                        };
+                                };
+                        };
+
+                        i2c1 {
+                                pinctrl_i2c1_default: i2c1-default {
+                                        st,pins {
+                                                sda = <&PIO12 1 ALT1 BIDIR>;
+                                                scl = <&PIO12 0 ALT1 BIDIR>;
+                                        };
+                                };
+                        };
                 };
 
                 pin-controller-rear {
diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi
index 74ab8ded4b49..d9c7dd1d95a4 100644
--- a/arch/arm/boot/dts/stih415.dtsi
+++ b/arch/arm/boot/dts/stih415.dtsi
@@ -9,6 +9,7 @@
 #include "stih41x.dtsi"
 #include "stih415-clock.dtsi"
 #include "stih415-pinctrl.dtsi"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 / {
 
         L2: cache-controller {
@@ -83,5 +84,57 @@
                         pinctrl-names   = "default";
                         pinctrl-0       = <&pinctrl_sbc_serial1>;
                 };
+
+                i2c@fed40000 {
+                        compatible      = "st,comms-ssc4-i2c";
+                        reg             = <0xfed40000 0x110>;
+                        interrupts      = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks          = <&CLKS_ICN_REG_0>;
+                        clock-names     = "ssc";
+                        clock-frequency = <400000>;
+                        pinctrl-names   = "default";
+                        pinctrl-0       = <&pinctrl_i2c0_default>;
+
+                        status          = "disabled";
+                };
+
+                i2c@fed41000 {
+                        compatible      = "st,comms-ssc4-i2c";
+                        reg             = <0xfed41000 0x110>;
+                        interrupts      = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks          = <&CLKS_ICN_REG_0>;
+                        clock-names     = "ssc";
+                        clock-frequency = <400000>;
+                        pinctrl-names   = "default";
+                        pinctrl-0       = <&pinctrl_i2c1_default>;
+
+                        status          = "disabled";
+                };
+
+                i2c@fe540000 {
+                        compatible      = "st,comms-ssc4-i2c";
+                        reg             = <0xfe540000 0x110>;
+                        interrupts      = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks          = <&CLK_SYSIN>;
+                        clock-names     = "ssc";
+                        clock-frequency = <400000>;
+                        pinctrl-names   = "default";
+                        pinctrl-0       = <&pinctrl_sbc_i2c0_default>;
+
+                        status          = "disabled";
+                };
+
+                i2c@fe541000 {
+                        compatible      = "st,comms-ssc4-i2c";
+                        reg             = <0xfe541000 0x110>;
+                        interrupts      = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks          = <&CLK_SYSIN>;
+                        clock-names     = "ssc";
+                        clock-frequency = <400000>;
+                        pinctrl-names   = "default";
+                        pinctrl-0       = <&pinctrl_sbc_i2c1_default>;
+
+                        status          = "disabled";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi
index 0f246c979262..b29ff4ba542c 100644
--- a/arch/arm/boot/dts/stih416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi
@@ -97,6 +97,24 @@
                                         };
                                 };
                         };
+
+                        sbc_i2c0 {
+                                pinctrl_sbc_i2c0_default: sbc_i2c0-default {
+                                        st,pins {
+                                                sda = <&PIO4 6 ALT1 BIDIR>;
+                                                scl = <&PIO4 5 ALT1 BIDIR>;
+                                        };
+                                };
+                        };
+
+                        sbc_i2c1 {
+                                pinctrl_sbc_i2c1_default: sbc_i2c1-default {
+                                        st,pins {
+                                                sda = <&PIO3 2 ALT2 BIDIR>;
+                                                scl = <&PIO3 1 ALT2 BIDIR>;
+                                        };
+                                };
+                        };
                 };
 
                 pin-controller-front {
@@ -175,6 +193,23 @@
                                 };
                         };
 
+                        i2c0 {
+                                pinctrl_i2c0_default: i2c0-default {
+                                        st,pins {
+                                                sda = <&PIO9 3 ALT1 BIDIR>;
+                                                scl = <&PIO9 2 ALT1 BIDIR>;
+                                        };
+                                };
+                        };
+
+                        i2c1 {
+                                pinctrl_i2c1_default: i2c1-default {
+                                        st,pins {
+                                                sda = <&PIO12 1 ALT1 BIDIR>;
+                                                scl = <&PIO12 0 ALT1 BIDIR>;
+                                        };
+                                };
+                        };
                 };
 
                 pin-controller-rear {
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 1a0326ea7d07..b7ab47b95816 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -9,6 +9,7 @@
 #include "stih41x.dtsi"
 #include "stih416-clock.dtsi"
 #include "stih416-pinctrl.dtsi"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 / {
         L2: cache-controller {
                 compatible = "arm,pl310-cache";
@@ -92,5 +93,57 @@
                         pinctrl-0       = <&pinctrl_sbc_serial1>;
                         clocks          = <&CLK_SYSIN>;
                 };
+
+                i2c@fed40000 {
+                        compatible      = "st,comms-ssc4-i2c";
+                        reg             = <0xfed40000 0x110>;
+                        interrupts      = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks          = <&CLK_S_ICN_REG_0>;
+                        clock-names     = "ssc";
+                        clock-frequency = <400000>;
+                        pinctrl-names   = "default";
+                        pinctrl-0       = <&pinctrl_i2c0_default>;
+
+                        status          = "disabled";
+                };
+
+                i2c@fed41000 {
+                        compatible      = "st,comms-ssc4-i2c";
+                        reg             = <0xfed41000 0x110>;
+                        interrupts      = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks          = <&CLK_S_ICN_REG_0>;
+                        clock-names     = "ssc";
+                        clock-frequency = <400000>;
+                        pinctrl-names   = "default";
+                        pinctrl-0       = <&pinctrl_i2c1_default>;
+
+                        status          = "disabled";
+                };
+
+                i2c@fe540000 {
+                        compatible      = "st,comms-ssc4-i2c";
+                        reg             = <0xfe540000 0x110>;
+                        interrupts      = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks          = <&CLK_SYSIN>;
+                        clock-names     = "ssc";
+                        clock-frequency = <400000>;
+                        pinctrl-names   = "default";
+                        pinctrl-0       = <&pinctrl_sbc_i2c0_default>;
+
+                        status          = "disabled";
+                };
+
+                i2c@fe541000 {
+                        compatible      = "st,comms-ssc4-i2c";
+                        reg             = <0xfe541000 0x110>;
+                        interrupts      = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks          = <&CLK_SYSIN>;
+                        clock-names     = "ssc";
+                        clock-frequency = <400000>;
+                        pinctrl-names   = "default";
+                        pinctrl-0       = <&pinctrl_sbc_i2c1_default>;
+
+                        status          = "disabled";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/stih41x-b2000.dtsi b/arch/arm/boot/dts/stih41x-b2000.dtsi
index 8e694d2b8f5b..1e6aa92772f5 100644
--- a/arch/arm/boot/dts/stih41x-b2000.dtsi
+++ b/arch/arm/boot/dts/stih41x-b2000.dtsi
@@ -37,5 +37,14 @@
                         };
                 };
 
+                /* HDMI Tx I2C */
+                i2c@fed41000 {
+                        /* HDMI V1.3a supports Standard mode only */
+                        clock-frequency = <100000>;
+                        i2c-min-scl-pulse-width-us = <0>;
+                        i2c-min-sda-pulse-width-us = <5>;
+
+                        status = "okay";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/stih41x-b2020.dtsi b/arch/arm/boot/dts/stih41x-b2020.dtsi
index 133e18143b1b..0ef0a69df8ea 100644
--- a/arch/arm/boot/dts/stih41x-b2020.dtsi
+++ b/arch/arm/boot/dts/stih41x-b2020.dtsi
@@ -38,5 +38,27 @@
                                 default-state = "off";
                         };
                 };
+
+                i2c@fed40000 {
+                        status = "okay";
+                };
+
+                /* HDMI Tx I2C */
+                i2c@fed41000 {
+                        /* HDMI V1.3a supports Standard mode only */
+                        clock-frequency = <100000>;
+                        i2c-min-scl-pulse-width-us = <0>;
+                        i2c-min-sda-pulse-width-us = <5>;
+
+                        status = "okay";
+                };
+
+                i2c@fe540000 {
+                        status = "okay";
+                };
+
+                i2c@fe541000 {
+                        status = "okay";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index e7f73b2e4550..5d7681be0580 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -15,6 +15,25 @@
 / {
         compatible = "xlnx,zynq-7000";
 
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        compatible = "arm,cortex-a9";
+                        device_type = "cpu";
+                        reg = <0>;
+                        clocks = <&clkc 3>;
+                };
+
+                cpu@1 {
+                        compatible = "arm,cortex-a9";
+                        device_type = "cpu";
+                        reg = <1>;
+                        clocks = <&clkc 3>;
+                };
+        };
+
         pmu {
                 compatible = "arm,cortex-a9-pmu";
                 interrupts = <0 5 4>, <0 6 4>;
@@ -65,6 +84,24 @@
                         interrupts = <0 50 4>;
                 };
 
+                gem0: ethernet@e000b000 {
+                        compatible = "cdns,gem";
+                        reg = <0xe000b000 0x4000>;
+                        status = "disabled";
+                        interrupts = <0 22 4>;
+                        clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
+                        clock-names = "pclk", "hclk", "tx_clk";
+                };
+
+                gem1: ethernet@e000c000 {
+                        compatible = "cdns,gem";
+                        reg = <0xe000c000 0x4000>;
+                        status = "disabled";
+                        interrupts = <0 45 4>;
+                        clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;
+                        clock-names = "pclk", "hclk", "tx_clk";
+                };
+
                 slcr: slcr@f8000000 {
                         compatible = "xlnx,zynq-slcr";
                         reg = <0xF8000000 0x1000>;
@@ -106,7 +143,6 @@
                         compatible = "cdns,ttc";
                         clocks = <&clkc 6>;
                         reg = <0xF8001000 0x1000>;
-                        clock-ranges;
                 };
 
                 ttc1: ttc1@f8002000 {
@@ -115,7 +151,6 @@
                         compatible = "cdns,ttc";
                         clocks = <&clkc 6>;
                         reg = <0xF8002000 0x1000>;
-                        clock-ranges;
                 };
                 scutimer: scutimer@f8f00600 {
                         interrupt-parent = <&intc>;
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index 21aea99a067b..34d680a46b7e 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -29,6 +29,11 @@
 
 };
 
+&gem0 {
+        status = "okay";
+        phy-mode = "rgmii";
+};
+
 &uart1 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
index 79009e0b74b9..b2835d5fc09a 100644
--- a/arch/arm/boot/dts/zynq-zc706.dts
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -30,6 +30,11 @@
 
 };
 
+&gem0 {
+        status = "okay";
+        phy-mode = "rgmii";
+};
+
 &uart1 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/zynq-zed.dts b/arch/arm/boot/dts/zynq-zed.dts
index d6acf2b1cdf4..2eda06889dfc 100644
--- a/arch/arm/boot/dts/zynq-zed.dts
+++ b/arch/arm/boot/dts/zynq-zed.dts
@@ -30,6 +30,11 @@
 
 };
 
+&gem0 {
+        status = "okay";
+        phy-mode = "rgmii";
+};
+
 &uart1 {
         status = "okay";
 };
diff --git a/arch/arm/configs/ape6evm_defconfig b/arch/arm/configs/ape6evm_defconfig
index 1ce39940795d..cb26c62dc722 100644
--- a/arch/arm/configs/ape6evm_defconfig
+++ b/arch/arm/configs/ape6evm_defconfig
@@ -13,7 +13,7 @@ CONFIG_EMBEDDED=y
 CONFIG_PERF_EVENTS=y
 CONFIG_SLAB=y
 # CONFIG_BLOCK is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A73A4=y
 CONFIG_MACH_APE6EVM=y
 # CONFIG_ARM_THUMB is not set
diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
index fae939d3d7f0..5abf1a2e3160 100644
--- a/arch/arm/configs/armadillo800eva_defconfig
+++ b/arch/arm/configs/armadillo800eva_defconfig
@@ -15,7 +15,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A7740=y
 CONFIG_MACH_ARMADILLO800EVA=y
 # CONFIG_SH_TIMER_TMU is not set
diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
index b38cd107f82d..1dd39716d7cb 100644
--- a/arch/arm/configs/bockw_defconfig
+++ b/arch/arm/configs/bockw_defconfig
@@ -8,7 +8,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_EMBEDDED=y
 CONFIG_SLAB=y
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A7778=y
 CONFIG_MACH_BOCKW=y
 CONFIG_MEMORY_START=0x60000000
diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
index 825c16dee8a0..7fd65a01ec7e 100644
--- a/arch/arm/configs/koelsch_defconfig
+++ b/arch/arm/configs/koelsch_defconfig
@@ -9,7 +9,7 @@ CONFIG_EMBEDDED=y
 CONFIG_PERF_EVENTS=y
 CONFIG_SLAB=y
 # CONFIG_BLOCK is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A7791=y
 CONFIG_MACH_KOELSCH=y
 # CONFIG_SWP_EMULATE is not set
diff --git a/arch/arm/configs/kzm9d_defconfig b/arch/arm/configs/kzm9d_defconfig
index 6c37f4a98eb8..217f1dda2965 100644
--- a/arch/arm/configs/kzm9d_defconfig
+++ b/arch/arm/configs/kzm9d_defconfig
@@ -13,7 +13,7 @@ CONFIG_SLAB=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_EMEV2=y
 CONFIG_MACH_KZM9D=y
 CONFIG_MEMORY_START=0x40000000
diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig
index 1ad028023a64..9934dbc23d64 100644
--- a/arch/arm/configs/kzm9g_defconfig
+++ b/arch/arm/configs/kzm9g_defconfig
@@ -22,7 +22,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_SH73A0=y
 CONFIG_MACH_KZM9G=y
 CONFIG_MEMORY_START=0x41000000
diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
index 35bff5e0d57a..35dc8b2be47f 100644
--- a/arch/arm/configs/lager_defconfig
+++ b/arch/arm/configs/lager_defconfig
@@ -12,7 +12,7 @@ CONFIG_SLAB=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A7790=y
 CONFIG_MACH_LAGER=y
 # CONFIG_SH_TIMER_TMU is not set
diff --git a/arch/arm/configs/mackerel_defconfig b/arch/arm/configs/mackerel_defconfig
index 9fb11895b2e2..a61e1653fc5e 100644
--- a/arch/arm/configs/mackerel_defconfig
+++ b/arch/arm/configs/mackerel_defconfig
@@ -14,7 +14,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_SH7372=y
 CONFIG_MACH_MACKEREL=y
 CONFIG_MEMORY_SIZE=0x10000000
diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
index 5cc6360340b1..6981338cd08d 100644
--- a/arch/arm/configs/marzen_defconfig
+++ b/arch/arm/configs/marzen_defconfig
@@ -9,7 +9,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_EMBEDDED=y
 CONFIG_SLAB=y
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A7779=y
 CONFIG_MACH_MARZEN=y
 CONFIG_MEMORY_START=0x60000000
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 699b71e7f7ec..b4f7d6ffa30b 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -1,15 +1,33 @@
 if ARCH_AT91
 
+config HAVE_AT91_UTMI
+        bool
+
+config HAVE_AT91_USB_CLK
+        bool
+
 config HAVE_AT91_DBGU0
         bool
 
 config HAVE_AT91_DBGU1
         bool
 
+config AT91_USE_OLD_CLK
+        bool
+
 config AT91_PMC_UNIT
         bool
         default !ARCH_AT91X40
 
+config COMMON_CLK_AT91
+        bool
+        default AT91_PMC_UNIT && USE_OF && !AT91_USE_OLD_CLK
+        select COMMON_CLK
+
+config OLD_CLK_AT91
+        bool
+        default AT91_PMC_UNIT && AT91_USE_OLD_CLK
+
 config AT91_SAM9_ALT_RESET
         bool
         default !ARCH_AT91X40
@@ -21,6 +39,9 @@ config AT91_SAM9G45_RESET
 config AT91_SAM9_TIME
         bool
 
+config HAVE_AT91_SMD
+        bool
+
 config SOC_AT91SAM9
         bool
         select AT91_SAM9_TIME
@@ -65,6 +86,9 @@ config SOC_SAMA5D3
         select SOC_SAMA5
         select HAVE_FB_ATMEL
         select HAVE_AT91_DBGU1
+        select HAVE_AT91_UTMI
+        select HAVE_AT91_SMD
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using one of Atmel's SAMA5D3 family SoC.
           This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35.
@@ -78,11 +102,15 @@ config SOC_AT91RM9200
         select HAVE_AT91_DBGU0
         select MULTI_IRQ_HANDLER
         select SPARSE_IRQ
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_USB_CLK
 
 config SOC_AT91SAM9260
         bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
         select HAVE_AT91_DBGU0
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
           or AT91SAM9G20 SoC.
@@ -92,6 +120,8 @@ config SOC_AT91SAM9261
         select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
 
@@ -100,18 +130,25 @@ config SOC_AT91SAM9263
         select HAVE_AT91_DBGU1
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_USB_CLK
 
 config SOC_AT91SAM9RL
         bool "AT91SAM9RL"
         select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_UTMI
 
 config SOC_AT91SAM9G45
         bool "AT91SAM9G45 or AT91SAM9M10 families"
         select HAVE_AT91_DBGU1
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_UTMI
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
           This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
@@ -121,6 +158,10 @@ config SOC_AT91SAM9X5
         select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_UTMI
+        select HAVE_AT91_SMD
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
           This means that your SAM9 name finishes with a '5' (except if it is
@@ -133,6 +174,8 @@ config SOC_AT91SAM9N12
         select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using Atmel's AT91SAM9N12 SoC.
 
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
index ca900be144ce..b736b571e882 100644
--- a/arch/arm/mach-at91/Kconfig.non_dt
+++ b/arch/arm/mach-at91/Kconfig.non_dt
@@ -12,26 +12,32 @@ config ARCH_AT91_NONE
 config ARCH_AT91RM9200
         bool "AT91RM9200"
         select SOC_AT91RM9200
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91SAM9260
         bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20"
         select SOC_AT91SAM9260
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91SAM9261
         bool "AT91SAM9261 or AT91SAM9G10"
         select SOC_AT91SAM9261
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91SAM9263
         bool "AT91SAM9263"
         select SOC_AT91SAM9263
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91SAM9RL
         bool "AT91SAM9RL"
         select SOC_AT91SAM9RL
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91SAM9G45
         bool "AT91SAM9G45"
         select SOC_AT91SAM9G45
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91X40
         bool "AT91x40"
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 90aab2d5a07f..705b38a179ec 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -7,7 +7,7 @@ obj-m		:=
 obj-n           :=
 obj-            :=
 
-obj-$(CONFIG_AT91_PMC_UNIT)     += clock.o
+obj-$(CONFIG_OLD_CLK_AT91)      += clock.o
 obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
 obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
 obj-$(CONFIG_AT91_SAM9_TIME)    += at91sam926x_time.o
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 25805f2f6010..e47f5fd232f5 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -12,13 +12,13 @@
 
 #include <linux/module.h>
 #include <linux/reboot.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/system_misc.h>
 #include <mach/at91rm9200.h>
-#include <mach/at91_pmc.h>
 #include <mach/at91_st.h>
 #include <mach/cpu.h>
 
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index d6a1fa85371d..6c821e562159 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,6 +11,7 @@
  */
 
 #include <linux/module.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
@@ -20,7 +21,6 @@
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
 #include <mach/at91sam9260.h>
-#include <mach/at91_pmc.h>
 
 #include "at91_aic.h"
 #include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 23ba1d8a1531..6276b4c1acfe 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,6 +11,7 @@
  */
 
 #include <linux/module.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
@@ -19,7 +20,6 @@
 #include <asm/system_misc.h>
 #include <mach/cpu.h>
 #include <mach/at91sam9261.h>
-#include <mach/at91_pmc.h>
 
 #include "at91_aic.h"
 #include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 7eccb0fc57bc..37b90f4b990c 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,6 +11,7 @@
  */
 
 #include <linux/module.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
@@ -18,7 +19,6 @@
 #include <asm/mach/map.h>
 #include <asm/system_misc.h>
 #include <mach/at91sam9263.h>
-#include <mach/at91_pmc.h>
 
 #include "at91_aic.h"
 #include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index bb392320a0dd..0f04ffe9c5a8 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -39,6 +39,7 @@
 static u32 pit_cycle;           /* write-once */
 static u32 pit_cnt;             /* access only w/system irq blocked */
 static void __iomem *pit_base_addr __read_mostly;
+static struct clk *mck;
 
 static inline unsigned int pit_read(unsigned int reg_offset)
 {
@@ -195,10 +196,14 @@ static int __init of_at91sam926x_pit_init(void)
         if (!pit_base_addr)
                 goto node_err;
 
+        mck = of_clk_get(np, 0);
+
         /* Get the interrupts property */
         ret = irq_of_parse_and_map(np, 0);
         if (!ret) {
                 pr_crit("AT91: PIT: Unable to get IRQ from DT\n");
+                if (!IS_ERR(mck))
+                        clk_put(mck);
                 goto ioremap_err;
         }
         at91sam926x_pit_irq.irq = ret;
@@ -230,6 +235,8 @@ void __init at91sam926x_pit_init(void)
         unsigned        bits;
         int             ret;
 
+        mck = ERR_PTR(-ENOENT);
+
         /* For device tree enabled device: initialize here */
         of_at91sam926x_pit_init();
 
@@ -237,7 +244,12 @@ void __init at91sam926x_pit_init(void)
          * Use our actual MCK to figure out how many MCK/16 ticks per
          * 1/HZ period (instead of a compile-time constant LATCH).
          */
-        pit_rate = clk_get_rate(clk_get(NULL, "mck")) / 16;
+        if (IS_ERR(mck))
+                mck = clk_get(NULL, "mck");
+
+        if (IS_ERR(mck))
+                panic("AT91: PIT: Unable to get mck clk\n");
+        pit_rate = clk_get_rate(mck) / 16;
         pit_cycle = (pit_rate + HZ/2) / HZ;
         WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0);
 
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 9405aa08b104..2f455ce35268 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -12,13 +12,13 @@
 
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/system_misc.h>
 #include <mach/at91sam9g45.h>
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include "at91_aic.h"
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 388ec3aec4b9..4ef088c62eab 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -8,12 +8,12 @@
 
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/at91sam9n12.h>
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include "board.h"
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 0750ffb7e6b1..3651517abedf 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/module.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
@@ -19,7 +20,6 @@
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
 #include <mach/at91sam9rl.h>
-#include <mach/at91_pmc.h>
 
 #include "at91_aic.h"
 #include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index e8a2e075a1b8..3e8ec26e39dc 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -8,12 +8,12 @@
 
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/at91sam9x5.h>
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include "board.h"
diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c
index bf00d15d954d..075ec0576ada 100644
--- a/arch/arm/mach-at91/board-dt-sama5.c
+++ b/arch/arm/mach-at91/board-dt-sama5.c
@@ -16,6 +16,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/phy.h>
+#include <linux/clk-provider.h>
 
 #include <asm/setup.h>
 #include <asm/irq.h>
@@ -26,6 +27,13 @@
 #include "at91_aic.h"
 #include "generic.h"
 
+static void __init sama5_dt_timer_init(void)
+{
+#if defined(CONFIG_COMMON_CLK)
+        of_clk_init(NULL);
+#endif
+        at91sam926x_pit_init();
+}
 
 static const struct of_device_id irq_of_match[] __initconst = {
 
@@ -72,7 +80,7 @@ static const char *sama5_dt_board_compat[] __initdata = {
 
 DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)")
         /* Maintainer: Atmel */
-        .init_time      = at91sam926x_pit_init,
+        .init_time      = sama5_dt_timer_init,
         .map_io         = at91_map_io,
         .handle_irq     = at91_aic5_handle_irq,
         .init_early     = at91_dt_initialize,
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 6b2630a92f71..72b257944733 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -24,9 +24,9 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/of_address.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <mach/hardware.h>
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include <asm/proc-fns.h>
@@ -884,6 +884,11 @@ static int __init at91_pmc_init(unsigned long main_clock)
 #if defined(CONFIG_OF)
 static struct of_device_id pmc_ids[] = {
         { .compatible = "atmel,at91rm9200-pmc" },
+        { .compatible = "atmel,at91sam9260-pmc" },
+        { .compatible = "atmel,at91sam9g45-pmc" },
+        { .compatible = "atmel,at91sam9n12-pmc" },
+        { .compatible = "atmel,at91sam9x5-pmc" },
+        { .compatible = "atmel,sama5d3-pmc" },
         { /*sentinel*/ }
 };
 
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 26dee3ce9397..631fa3b8c16d 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -46,11 +46,12 @@ extern void at91sam926x_pit_init(void);
 extern void at91x40_timer_init(void);
 
  /* Clocks */
-#ifdef CONFIG_AT91_PMC_UNIT
+#ifdef CONFIG_OLD_CLK_AT91
 extern int __init at91_clock_init(unsigned long main_clock);
 extern int __init at91_dt_clock_init(void);
 #else
 static int inline at91_clock_init(unsigned long main_clock) { return 0; }
+static int inline at91_dt_clock_init(void) { return 0; }
 #endif
 struct device;
 
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 9986542e8060..d43b79f56e94 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -19,13 +19,13 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <linux/atomic.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include "at91_aic.h"
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 098c28ddf025..20018779bae7 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -13,8 +13,8 @@
  */
 
 #include <linux/linkage.h>
+#include <linux/clk/at91_pmc.h>
 #include <mach/hardware.h>
-#include <mach/at91_pmc.h>
 #include <mach/at91_ramc.h>
 
 
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index a28873fe3049..3d775d08de08 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -9,360 +9,19 @@
 
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/sama5d3.h>
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include "soc.h"
 #include "generic.h"
-#include "clock.h"
 #include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
- *  Clocks
- * -------------------------------------------------------------------- */
-
-/*
- * The peripheral clocks.
- */
-
-static struct clk pioA_clk = {
-        .name           = "pioA_clk",
-        .pid            = SAMA5D3_ID_PIOA,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioB_clk = {
-        .name           = "pioB_clk",
-        .pid            = SAMA5D3_ID_PIOB,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioC_clk = {
-        .name           = "pioC_clk",
-        .pid            = SAMA5D3_ID_PIOC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioD_clk = {
-        .name           = "pioD_clk",
-        .pid            = SAMA5D3_ID_PIOD,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioE_clk = {
-        .name           = "pioE_clk",
-        .pid            = SAMA5D3_ID_PIOE,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart0_clk = {
-        .name           = "usart0_clk",
-        .pid            = SAMA5D3_ID_USART0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk usart1_clk = {
-        .name           = "usart1_clk",
-        .pid            = SAMA5D3_ID_USART1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk usart2_clk = {
-        .name           = "usart2_clk",
-        .pid            = SAMA5D3_ID_USART2,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk usart3_clk = {
-        .name           = "usart3_clk",
-        .pid            = SAMA5D3_ID_USART3,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk uart0_clk = {
-        .name           = "uart0_clk",
-        .pid            = SAMA5D3_ID_UART0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk uart1_clk = {
-        .name           = "uart1_clk",
-        .pid            = SAMA5D3_ID_UART1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk twi0_clk = {
-        .name           = "twi0_clk",
-        .pid            = SAMA5D3_ID_TWI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV8,
-};
-static struct clk twi1_clk = {
-        .name           = "twi1_clk",
-        .pid            = SAMA5D3_ID_TWI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV8,
-};
-static struct clk twi2_clk = {
-        .name           = "twi2_clk",
-        .pid            = SAMA5D3_ID_TWI2,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV8,
-};
-static struct clk mmc0_clk = {
-        .name           = "mci0_clk",
-        .pid            = SAMA5D3_ID_HSMCI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc1_clk = {
-        .name           = "mci1_clk",
-        .pid            = SAMA5D3_ID_HSMCI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc2_clk = {
-        .name           = "mci2_clk",
-        .pid            = SAMA5D3_ID_HSMCI2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi0_clk = {
-        .name           = "spi0_clk",
-        .pid            = SAMA5D3_ID_SPI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi1_clk = {
-        .name           = "spi1_clk",
-        .pid            = SAMA5D3_ID_SPI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tcb0_clk = {
-        .name           = "tcb0_clk",
-        .pid            = SAMA5D3_ID_TC0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk tcb1_clk = {
-        .name           = "tcb1_clk",
-        .pid            = SAMA5D3_ID_TC1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk adc_clk = {
-        .name           = "adc_clk",
-        .pid            = SAMA5D3_ID_ADC,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk adc_op_clk = {
-        .name           = "adc_op_clk",
-        .type           = CLK_TYPE_PERIPHERAL,
-        .rate_hz        = 5000000,
-};
-static struct clk dma0_clk = {
-        .name           = "dma0_clk",
-        .pid            = SAMA5D3_ID_DMA0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk dma1_clk = {
-        .name           = "dma1_clk",
-        .pid            = SAMA5D3_ID_DMA1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk uhphs_clk = {
-        .name           = "uhphs",
-        .pid            = SAMA5D3_ID_UHPHS,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk udphs_clk = {
-        .name           = "udphs_clk",
-        .pid            = SAMA5D3_ID_UDPHS,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* gmac only for sama5d33, sama5d34, sama5d35 */
-static struct clk macb0_clk = {
-        .name           = "macb0_clk",
-        .pid            = SAMA5D3_ID_GMAC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* emac only for sama5d31, sama5d35 */
-static struct clk macb1_clk = {
-        .name           = "macb1_clk",
-        .pid            = SAMA5D3_ID_EMAC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* lcd only for sama5d31, sama5d33, sama5d34 */
-static struct clk lcdc_clk = {
-        .name           = "lcdc_clk",
-        .pid            = SAMA5D3_ID_LCDC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* isi only for sama5d33, sama5d35 */
-static struct clk isi_clk = {
-        .name           = "isi_clk",
-        .pid            = SAMA5D3_ID_ISI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk can0_clk = {
-        .name           = "can0_clk",
-        .pid            = SAMA5D3_ID_CAN0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk can1_clk = {
-        .name           = "can1_clk",
-        .pid            = SAMA5D3_ID_CAN1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk ssc0_clk = {
-        .name           = "ssc0_clk",
-        .pid            = SAMA5D3_ID_SSC0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk ssc1_clk = {
-        .name           = "ssc1_clk",
-        .pid            = SAMA5D3_ID_SSC1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk sha_clk = {
-        .name           = "sha_clk",
-        .pid            = SAMA5D3_ID_SHA,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV8,
-};
-static struct clk aes_clk = {
-        .name           = "aes_clk",
-        .pid            = SAMA5D3_ID_AES,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tdes_clk = {
-        .name           = "tdes_clk",
-        .pid            = SAMA5D3_ID_TDES,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-
-static struct clk *periph_clocks[] __initdata = {
-        &pioA_clk,
-        &pioB_clk,
-        &pioC_clk,
-        &pioD_clk,
-        &pioE_clk,
-        &usart0_clk,
-        &usart1_clk,
-        &usart2_clk,
-        &usart3_clk,
-        &uart0_clk,
-        &uart1_clk,
-        &twi0_clk,
-        &twi1_clk,
-        &twi2_clk,
-        &mmc0_clk,
-        &mmc1_clk,
-        &mmc2_clk,
-        &spi0_clk,
-        &spi1_clk,
-        &tcb0_clk,
-        &tcb1_clk,
-        &adc_clk,
-        &adc_op_clk,
-        &dma0_clk,
-        &dma1_clk,
-        &uhphs_clk,
-        &udphs_clk,
-        &macb0_clk,
-        &macb1_clk,
-        &lcdc_clk,
-        &isi_clk,
-        &can0_clk,
-        &can1_clk,
-        &ssc0_clk,
-        &ssc1_clk,
-        &sha_clk,
-        &aes_clk,
-        &tdes_clk,
-};
-
-static struct clk pck0 = {
-        .name           = "pck0",
-        .pmc_mask       = AT91_PMC_PCK0,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 0,
-};
-
-static struct clk pck1 = {
-        .name           = "pck1",
-        .pmc_mask       = AT91_PMC_PCK1,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 1,
-};
-
-static struct clk pck2 = {
-        .name           = "pck2",
-        .pmc_mask       = AT91_PMC_PCK2,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 2,
-};
-
-static struct clk_lookup periph_clocks_lookups[] = {
-        /* lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
-        CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioD_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioE_clk),
-        CLKDEV_CON_DEV_ID("usart", "f001c000.serial", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "f0020000.serial", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart2_clk),
-        CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart3_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f0014000.i2c", &twi0_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f0018000.i2c", &twi1_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f801c000.i2c", &twi2_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "f0000000.mmc", &mmc0_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "f8000000.mmc", &mmc1_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "f8004000.mmc", &mmc2_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi0_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "f8008000.spi", &spi1_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "f0010000.timer", &tcb0_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "f8014000.timer", &tcb1_clk),
-        CLKDEV_CON_DEV_ID("tsc_clk", "f8018000.tsadcc", &adc_clk),
-        CLKDEV_CON_DEV_ID("dma_clk", "ffffe600.dma-controller", &dma0_clk),
-        CLKDEV_CON_DEV_ID("dma_clk", "ffffe800.dma-controller", &dma1_clk),
-        CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk),
-        CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk),
-        CLKDEV_CON_DEV_ID("hclk", "f0028000.ethernet", &macb0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "f0028000.ethernet", &macb0_clk),
-        CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "f802c000.ethernet", &macb1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "f0008000.ssc", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "f000c000.ssc", &ssc1_clk),
-        CLKDEV_CON_DEV_ID("can_clk", "f000c000.can", &can0_clk),
-        CLKDEV_CON_DEV_ID("can_clk", "f8010000.can", &can1_clk),
-        CLKDEV_CON_DEV_ID("sha_clk", "f8034000.sha", &sha_clk),
-        CLKDEV_CON_DEV_ID("aes_clk", "f8038000.aes", &aes_clk),
-        CLKDEV_CON_DEV_ID("tdes_clk", "f803c000.tdes", &tdes_clk),
-};
-
-static void __init sama5d3_register_clocks(void)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
-                clk_register(periph_clocks[i]);
-
-        clkdev_add_table(periph_clocks_lookups,
-                         ARRAY_SIZE(periph_clocks_lookups));
-
-        clk_register(&pck0);
-        clk_register(&pck1);
-        clk_register(&pck2);
-}
-
-/* --------------------------------------------------------------------
  *  AT91SAM9x5 processor initialization
  * -------------------------------------------------------------------- */
 
@@ -378,6 +37,5 @@ static void __init sama5d3_initialize(void)
 
 AT91_SOC_START(sama5d3)
         .map_io = sama5d3_map_io,
-        .register_clocks = sama5d3_register_clocks,
         .init = sama5d3_initialize,
 AT91_SOC_END
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 094b3459c288..7d3f7cc61081 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -11,6 +11,7 @@
 #include <linux/pm.h>
 #include <linux/of_address.h>
 #include <linux/pinctrl/machine.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/system_misc.h>
 #include <asm/mach/map.h>
@@ -18,7 +19,6 @@
 #include <mach/hardware.h>
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
-#include <mach/at91_pmc.h>
 
 #include "at91_shdwc.h"
 #include "soc.h"
@@ -491,7 +491,8 @@ void __init at91rm9200_dt_initialize(void)
         at91_dt_clock_init();
 
         /* Register the processor-specific clocks */
-        at91_boot_soc.register_clocks();
+        if (at91_boot_soc.register_clocks)
+                at91_boot_soc.register_clocks();
 
         at91_boot_soc.init();
 }
@@ -506,7 +507,8 @@ void __init at91_dt_initialize(void)
         at91_dt_clock_init();
 
         /* Register the processor-specific clocks */
-        at91_boot_soc.register_clocks();
+        if (at91_boot_soc.register_clocks)
+                at91_boot_soc.register_clocks();
 
         if (at91_boot_soc.init)
                 at91_boot_soc.init();
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index c122bcff9f7c..0d1a89298ece 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -162,7 +162,7 @@ void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 /*****************************************************************************
  * SoC RTC
  ****************************************************************************/
-void __init dove_rtc_init(void)
+static void __init dove_rtc_init(void)
 {
         orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
 }
@@ -257,18 +257,9 @@ void __init dove_timer_init(void)
 }
 
 /*****************************************************************************
- * Cryptographic Engines and Security Accelerator (CESA)
- ****************************************************************************/
-void __init dove_crypto_init(void)
-{
-        orion_crypto_init(DOVE_CRYPT_PHYS_BASE, DOVE_CESA_PHYS_BASE,
-                          DOVE_CESA_SIZE, IRQ_DOVE_CRYPTO);
-}
-
-/*****************************************************************************
  * XOR 0
  ****************************************************************************/
-void __init dove_xor0_init(void)
+static void __init dove_xor0_init(void)
 {
         orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
                         IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
@@ -277,7 +268,7 @@ void __init dove_xor0_init(void)
 /*****************************************************************************
  * XOR 1
  ****************************************************************************/
-void __init dove_xor1_init(void)
+static void __init dove_xor1_init(void)
 {
         orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
                         IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index d50dc2dbfd89..cc1d3fe21c4e 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -63,6 +63,9 @@
 
 /* Base address to the AP system controller */
 void __iomem *ap_syscon_base;
+/* Base address to the external bus interface */
+static void __iomem *ebi_base;
+
 
 /*
  * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
@@ -72,15 +75,11 @@ void __iomem *ap_syscon_base;
  * just for now).
  */
 #define VA_IC_BASE      __io_address(INTEGRATOR_IC_BASE)
-#define VA_EBI_BASE     __io_address(INTEGRATOR_EBI_BASE)
-#define VA_CMIC_BASE    __io_address(INTEGRATOR_HDR_IC)
 
 /*
  * Logical      Physical
  * ef000000                     Cache flush
- * f1000000     10000000        Core module registers
  * f1100000     11000000        System controller registers
- * f1200000     12000000        EBI registers
  * f1300000     13000000        Counter/Timer
  * f1400000     14000000        Interrupt controller
  * f1600000     16000000        UART 0
@@ -91,16 +90,6 @@ void __iomem *ap_syscon_base;
 
 static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
         {
-                .virtual        = IO_ADDRESS(INTEGRATOR_HDR_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_HDR_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_EBI_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_EBI_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        = IO_ADDRESS(INTEGRATOR_CT_BASE),
                 .pfn            = __phys_to_pfn(INTEGRATOR_CT_BASE),
                 .length         = SZ_4K,
@@ -174,9 +163,6 @@ device_initcall(irq_syscore_init);
 /*
  * Flash handling.
  */
-#define EBI_CSR1 (VA_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET)
-#define EBI_LOCK (VA_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET)
-
 static int ap_flash_init(struct platform_device *dev)
 {
         u32 tmp;
@@ -184,13 +170,15 @@ static int ap_flash_init(struct platform_device *dev)
         writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP,
                ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
 
-        tmp = readl(EBI_CSR1) | INTEGRATOR_EBI_WRITE_ENABLE;
-        writel(tmp, EBI_CSR1);
+        tmp = readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) |
+                INTEGRATOR_EBI_WRITE_ENABLE;
+        writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);
 
-        if (!(readl(EBI_CSR1) & INTEGRATOR_EBI_WRITE_ENABLE)) {
-                writel(0xa05f, EBI_LOCK);
-                writel(tmp, EBI_CSR1);
-                writel(0, EBI_LOCK);
+        if (!(readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET)
+              & INTEGRATOR_EBI_WRITE_ENABLE)) {
+                writel(0xa05f, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);
+                writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);
+                writel(0, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);
         }
         return 0;
 }
@@ -202,13 +190,15 @@ static void ap_flash_exit(struct platform_device *dev)
         writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP,
                ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
 
-        tmp = readl(EBI_CSR1) & ~INTEGRATOR_EBI_WRITE_ENABLE;
-        writel(tmp, EBI_CSR1);
+        tmp = readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) &
+                ~INTEGRATOR_EBI_WRITE_ENABLE;
+        writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);
 
-        if (readl(EBI_CSR1) & INTEGRATOR_EBI_WRITE_ENABLE) {
-                writel(0xa05f, EBI_LOCK);
-                writel(tmp, EBI_CSR1);
-                writel(0, EBI_LOCK);
+        if (readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) &
+            INTEGRATOR_EBI_WRITE_ENABLE) {
+                writel(0xa05f, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);
+                writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);
+                writel(0, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);
         }
 }
 
@@ -475,11 +465,17 @@ static const struct of_device_id ap_syscon_match[] = {
         { },
 };
 
+static const struct of_device_id ebi_match[] = {
+        { .compatible = "arm,external-bus-interface"},
+        { },
+};
+
 static void __init ap_init_of(void)
 {
         unsigned long sc_dec;
         struct device_node *root;
         struct device_node *syscon;
+        struct device_node *ebi;
         struct device *parent;
         struct soc_device *soc_dev;
         struct soc_device_attribute *soc_dev_attr;
@@ -495,10 +491,16 @@ static void __init ap_init_of(void)
         syscon = of_find_matching_node(root, ap_syscon_match);
         if (!syscon)
                 return;
+        ebi = of_find_matching_node(root, ebi_match);
+        if (!ebi)
+                return;
 
         ap_syscon_base = of_iomap(syscon, 0);
         if (!ap_syscon_base)
                 return;
+        ebi_base = of_iomap(ebi, 0);
+        if (!ebi_base)
+                return;
 
         ap_sc_id = readl(ap_syscon_base);
 
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 4fc0a195de01..5e84149d1790 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -64,9 +64,6 @@ static void __iomem *intcp_con_base;
 
 /*
  * Logical      Physical
- * f1000000     10000000        Core module registers
- * f1100000     11000000        System controller registers
- * f1200000     12000000        EBI registers
  * f1300000     13000000        Counter/Timer
  * f1400000     14000000        Interrupt controller
  * f1600000     16000000        UART 0
@@ -74,21 +71,10 @@ static void __iomem *intcp_con_base;
  * f1a00000     1a000000        Debug LEDs
  * fc900000     c9000000        GPIO
  * fca00000     ca000000        SIC
- * fcb00000     cb000000        CP system control
  */
 
 static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
         {
-                .virtual        = IO_ADDRESS(INTEGRATOR_HDR_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_HDR_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_EBI_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_EBI_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        = IO_ADDRESS(INTEGRATOR_CT_BASE),
                 .pfn            = __phys_to_pfn(INTEGRATOR_CT_BASE),
                 .length         = SZ_4K,
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 9caa4fe95913..78188159484d 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -10,55 +10,21 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <linux/clk.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_net.h>
 #include <linux/of_platform.h>
-#include <linux/clk-provider.h>
 #include <linux/dma-mapping.h>
 #include <linux/irqchip.h>
 #include <linux/kexec.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/map.h>
 #include <mach/bridge-regs.h>
-#include <linux/platform_data/usb-ehci-orion.h>
-#include <plat/irq.h>
 #include <plat/common.h>
 #include "common.h"
 
-/*
- * There are still devices that doesn't know about DT yet.  Get clock
- * gates here and add a clock lookup alias, so that old platform
- * devices still work.
-*/
-
-static void __init kirkwood_legacy_clk_init(void)
-{
-
-        struct device_node *np = of_find_compatible_node(
-                NULL, NULL, "marvell,kirkwood-gating-clock");
-        struct of_phandle_args clkspec;
-        struct clk *clk;
-
-        clkspec.np = np;
-        clkspec.args_count = 1;
-
-        /*
-         * The ethernet interfaces forget the MAC address assigned by
-         * u-boot if the clocks are turned off. Until proper DT support
-         * is available we always enable them for now.
-         */
-        clkspec.args[0] = CGC_BIT_GE0;
-        clk = of_clk_get_from_provider(&clkspec);
-        clk_prepare_enable(clk);
-
-        clkspec.args[0] = CGC_BIT_GE1;
-        clk = of_clk_get_from_provider(&clkspec);
-        clk_prepare_enable(clk);
-}
-
 #define MV643XX_ETH_MAC_ADDR_LOW        0x0414
 #define MV643XX_ETH_MAC_ADDR_HIGH       0x0418
 
@@ -140,7 +106,7 @@ eth_fixup_skip:
 
 static void __init kirkwood_dt_init(void)
 {
-        pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk);
+        pr_info("Kirkwood: %s.\n", kirkwood_id());
 
         /*
          * Disable propagation of mbus errors to the CPU local bus,
@@ -156,8 +122,6 @@ static void __init kirkwood_dt_init(void)
 
         kirkwood_cpufreq_init();
         kirkwood_cpuidle_init();
-        /* Setup clocks for legacy devices */
-        kirkwood_legacy_clk_init();
 
         kirkwood_pm_init();
         kirkwood_dt_eth_fixup();
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 58adf2fd9cfc..4e9d58148ca7 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -27,6 +27,7 @@
 #include <asm/smp_plat.h>
 #include <asm/cacheflush.h>
 #include "armada-370-xp.h"
+#include "coherency.h"
 
 unsigned long coherency_phys_base;
 static void __iomem *coherency_base;
diff --git a/arch/arm/mach-mvebu/coherency.h b/arch/arm/mach-mvebu/coherency.h
index df33ad8a6c08..760226c41353 100644
--- a/arch/arm/mach-mvebu/coherency.h
+++ b/arch/arm/mach-mvebu/coherency.h
@@ -14,7 +14,9 @@
 #ifndef __MACH_370_XP_COHERENCY_H
 #define __MACH_370_XP_COHERENCY_H
 
-int set_cpu_coherent(int cpu_id, int smp_group_id);
+extern unsigned long coherency_phys_base;
+
+int set_cpu_coherent(unsigned int cpu_id, int smp_group_id);
 int coherency_init(void);
 
 #endif  /* __MACH_370_XP_COHERENCY_H */
diff --git a/arch/arm/mach-mvebu/common.h b/arch/arm/mach-mvebu/common.h
index e366010e1d91..0e6016fadcc5 100644
--- a/arch/arm/mach-mvebu/common.h
+++ b/arch/arm/mach-mvebu/common.h
@@ -26,7 +26,6 @@ void armada_370_xp_handle_irq(struct pt_regs *regs);
 
 void armada_xp_cpu_die(unsigned int cpu);
 int armada_370_xp_coherency_init(void);
-int armada_370_xp_pmsu_init(void);
 void armada_xp_secondary_startup(void);
 extern struct smp_operations armada_xp_smp_ops;
 #endif
diff --git a/arch/arm/mach-mvebu/hotplug.c b/arch/arm/mach-mvebu/hotplug.c
index b228b6a80c85..d95e91047168 100644
--- a/arch/arm/mach-mvebu/hotplug.c
+++ b/arch/arm/mach-mvebu/hotplug.c
@@ -15,6 +15,7 @@
 #include <linux/errno.h>
 #include <linux/smp.h>
 #include <asm/proc-fns.h>
+#include "common.h"
 
 /*
  * platform-specific code to shutdown a CPU
diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c
index ff69c2df298b..a6da03f5b24e 100644
--- a/arch/arm/mach-mvebu/platsmp.c
+++ b/arch/arm/mach-mvebu/platsmp.c
@@ -46,7 +46,7 @@ static struct clk *__init get_cpu_clk(int cpu)
         return cpu_clk;
 }
 
-void __init set_secondary_cpus_clock(void)
+static void __init set_secondary_cpus_clock(void)
 {
         int thiscpu, cpu;
         unsigned long rate;
@@ -94,7 +94,7 @@ static void __init armada_xp_smp_init_cpus(void)
         set_smp_cross_call(armada_mpic_send_doorbell);
 }
 
-void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
+static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
 {
         struct device_node *node;
         struct resource res;
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index 27fc4f049474..d71ef53107c4 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <linux/smp.h>
 #include <asm/smp_plat.h>
+#include "pmsu.h"
 
 static void __iomem *pmsu_mp_base;
 static void __iomem *pmsu_reset_base;
@@ -58,7 +59,7 @@ int armada_xp_boot_cpu(unsigned int cpu_id, void *boot_addr)
 }
 #endif
 
-int __init armada_370_xp_pmsu_init(void)
+static int __init armada_370_xp_pmsu_init(void)
 {
         struct device_node *np;
 
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index 5175083cdb34..a7fb89a5b5d9 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -27,6 +27,7 @@
 #include <linux/of_address.h>
 #include <linux/io.h>
 #include <linux/reboot.h>
+#include "common.h"
 
 static void __iomem *system_controller_base;
 
@@ -39,14 +40,14 @@ struct mvebu_system_controller {
 };
 static struct mvebu_system_controller *mvebu_sc;
 
-const struct mvebu_system_controller armada_370_xp_system_controller = {
+static const struct mvebu_system_controller armada_370_xp_system_controller = {
         .rstoutn_mask_offset = 0x60,
         .system_soft_reset_offset = 0x64,
         .rstoutn_mask_reset_out_en = 0x1,
         .system_soft_reset = 0x1,
 };
 
-const struct mvebu_system_controller orion_system_controller = {
+static const struct mvebu_system_controller orion_system_controller = {
         .rstoutn_mask_offset = 0x108,
         .system_soft_reset_offset = 0x10c,
         .rstoutn_mask_reset_out_en = 0x4,
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index cce2c9dfb5d1..4a1065e41e9c 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -110,38 +110,6 @@ static void cpu8815_restart(enum reboot_mode mode, const char *cmd)
 }
 
 /*
- * The SMSC911x IRQ is connected to a GPIO pin, but the driver expects
- * to simply request an IRQ passed as a resource. So the GPIO pin needs
- * to be requested by this hog and set as input.
- */
-static int __init cpu8815_eth_init(void)
-{
-        struct device_node *eth;
-        int gpio, irq, err;
-
-        eth = of_find_node_by_path("/usb-s8815/ethernet-gpio");
-        if (!eth) {
-                pr_info("could not find any ethernet GPIO\n");
-                return 0;
-        }
-        gpio = of_get_gpio(eth, 0);
-        err = gpio_request(gpio, "eth_irq");
-        if (err) {
-                pr_info("failed to request ethernet GPIO\n");
-                return -ENODEV;
-        }
-        err = gpio_direction_input(gpio);
-        if (err) {
-                pr_info("failed to set ethernet GPIO as input\n");
-                return -ENODEV;
-        }
-        irq = gpio_to_irq(gpio);
-        pr_info("enabled USB-S8815 ethernet GPIO %d, IRQ %d\n", gpio, irq);
-        return 0;
-}
-device_initcall(cpu8815_eth_init);
-
-/*
  * This GPIO pin turns on a line that is used to detect card insertion
  * on this board.
  */
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
index b91002ca92f3..c134a826070a 100644
--- a/arch/arm/mach-orion5x/board-dt.c
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -21,7 +21,7 @@
 #include <plat/irq.h>
 #include "common.h"
 
-struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
+static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL),
         OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0",
                        NULL),
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 91a5852b44f3..3f1de1111e0f 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -24,7 +24,6 @@
 #include <asm/page.h>
 #include <asm/setup.h>
 #include <asm/system_misc.h>
-#include <asm/timex.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
@@ -135,7 +134,7 @@ void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 /*****************************************************************************
  * SPI
  ****************************************************************************/
-void __init orion5x_spi_init()
+void __init orion5x_spi_init(void)
 {
         orion_spi_init(SPI_PHYS_BASE);
 }
@@ -185,7 +184,7 @@ static void __init orion5x_crypto_init(void)
 /*****************************************************************************
  * Watchdog
  ****************************************************************************/
-void __init orion5x_wdt_init(void)
+static void __init orion5x_wdt_init(void)
 {
         orion_wdt_init();
 }
@@ -246,7 +245,7 @@ void orion5x_setup_wins(void)
 
 int orion5x_tclk;
 
-int __init orion5x_find_tclk(void)
+static int __init orion5x_find_tclk(void)
 {
         u32 dev, rev;
 
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 4b2aefd1d961..dc01c4ffc9a8 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -202,7 +202,7 @@ __initcall(db88f5281_7seg_init);
  * PCI
  ****************************************************************************/
 
-void __init db88f5281_pci_preinit(void)
+static void __init db88f5281_pci_preinit(void)
 {
         int pin;
 
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index 30a192b9c517..9654b0cc5892 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -16,6 +16,7 @@
 #include <mach/bridge-regs.h>
 #include <plat/orion-gpio.h>
 #include <plat/irq.h>
+#include "common.h"
 
 static int __initdata gpio0_irqs[4] = {
         IRQ_ORION5X_GPIO_0_7,
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 7fab67053030..87a12d6930ff 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -240,11 +240,11 @@ static int __init pcie_setup(struct pci_sys_data *sys)
 #define PCI_BAR_SIZE_DDR_CS(n)  (((n) == 0) ? ORION5X_PCI_REG(0xc08) : \
                                  ((n) == 1) ? ORION5X_PCI_REG(0xd08) : \
                                  ((n) == 2) ? ORION5X_PCI_REG(0xc0c) : \
-                                 ((n) == 3) ? ORION5X_PCI_REG(0xd0c) : 0)
+                                 ((n) == 3) ? ORION5X_PCI_REG(0xd0c) : NULL)
 #define PCI_BAR_REMAP_DDR_CS(n) (((n) == 0) ? ORION5X_PCI_REG(0xc48) : \
                                  ((n) == 1) ? ORION5X_PCI_REG(0xd48) : \
                                  ((n) == 2) ? ORION5X_PCI_REG(0xc4c) : \
-                                 ((n) == 3) ? ORION5X_PCI_REG(0xd4c) : 0)
+                                 ((n) == 3) ? ORION5X_PCI_REG(0xd4c) : NULL)
 #define PCI_BAR_ENABLE          ORION5X_PCI_REG(0xc3c)
 #define PCI_ADDR_DECODE_CTRL    ORION5X_PCI_REG(0xd3c)
 
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index b1cf68493ffc..b576ef5f18a1 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -108,7 +108,7 @@ static struct platform_device rd88f5182_gpio_leds = {
  * PCI
  ****************************************************************************/
 
-void __init rd88f5182_pci_preinit(void)
+static void __init rd88f5182_pci_preinit(void)
 {
         int pin;
 
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 7e9064844698..6208d125c1b9 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -77,7 +77,7 @@ static struct platform_device tsp2_nor_flash = {
 #define TSP2_PCI_SLOT0_OFFS             7
 #define TSP2_PCI_SLOT0_IRQ_PIN          11
 
-void __init tsp2_pci_preinit(void)
+static void __init tsp2_pci_preinit(void)
 {
         int pin;
 
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index e90c0618fdad..9136797addb2 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -106,7 +106,7 @@ static struct platform_device qnap_ts209_nor_flash = {
 #define QNAP_TS209_PCI_SLOT0_IRQ_PIN    6
 #define QNAP_TS209_PCI_SLOT1_IRQ_PIN    7
 
-void __init qnap_ts209_pci_preinit(void)
+static void __init qnap_ts209_pci_preinit(void)
 {
         int pin;
 
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index e960855d32ac..db16dae441e2 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -57,7 +57,7 @@ static struct map_desc ts78xx_io_desc[] __initdata = {
         },
 };
 
-void __init ts78xx_map_io(void)
+static void __init ts78xx_map_io(void)
 {
         orion5x_map_io();
         iotable_init(ts78xx_io_desc, ARRAY_SIZE(ts78xx_io_desc));
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 58d46a3d7b78..97ae4703cb78 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -36,7 +36,9 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <linux/platform_data/mtd-nand-s3c2410.h>
+#include <linux/platform_data/mmc-sdhci-s3c.h>
 #include <plat/regs-serial.h>
+#include <plat/sdhci.h>
 #include <linux/platform_data/touchscreen-s3c2410.h>
 
 #include <video/platform_lcd.h>
@@ -214,6 +216,13 @@ static struct platform_device mini6410_lcd_powerdev = {
         .dev.platform_data      = &mini6410_lcd_power_data,
 };
 
+static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata = {
+        .max_width              = 4,
+        .cd_type                = S3C_SDHCI_CD_GPIO,
+        .ext_cd_gpio            = S3C64XX_GPN(10),
+        .ext_cd_gpio_invert     = true,
+};
+
 static struct platform_device *mini6410_devices[] __initdata = {
         &mini6410_device_eth,
         &s3c_device_hsmmc0,
@@ -321,6 +330,7 @@ static void __init mini6410_machine_init(void)
 
         s3c_nand_set_platdata(&mini6410_nand_info);
         s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
+        s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata);
         s3c24xx_ts_set_platdata(NULL);
 
         /* configure nCS1 width to 16 bits */
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index a4a4b75109b2..aa9017bb750c 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -1,6 +1,10 @@
+config ARCH_SHMOBILE
+        bool
+
 config ARCH_SHMOBILE_MULTI
         bool "SH-Mobile Series" if ARCH_MULTI_V7
         depends on MMU
+        select ARCH_SHMOBILE
         select CPU_V7
         select GENERIC_CLOCKEVENTS
         select HAVE_ARM_SCU if SMP
@@ -30,7 +34,7 @@ config MACH_KZM9D
 comment "SH-Mobile System Configuration"
 endif
 
-if ARCH_SHMOBILE
+if ARCH_SHMOBILE_LEGACY
 
 comment "SH-Mobile System Type"
 
@@ -97,18 +101,23 @@ config ARCH_R8A7790
 
 config ARCH_R8A7791
         bool "R-Car M2 (R8A77910)"
+        select ARCH_WANT_OPTIONAL_GPIOLIB
         select ARM_GIC
         select CPU_V7
         select SH_CLK_CPG
+        select RENESAS_IRQC
 
 config ARCH_EMEV2
         bool "Emma Mobile EV2"
         select ARCH_WANT_OPTIONAL_GPIOLIB
         select ARM_GIC
         select CPU_V7
+        select USE_OF
+        select AUTO_ZRELADDR
 
 config ARCH_R7S72100
         bool "RZ/A1H (R7S72100)"
+        select ARCH_WANT_OPTIONAL_GPIOLIB
         select ARM_GIC
         select CPU_V7
         select SH_CLK_CPG
@@ -231,12 +240,6 @@ config MACH_KOELSCH
         depends on ARCH_R8A7791
         select USE_OF
 
-config MACH_KZM9D
-        bool "KZM9D board"
-        depends on ARCH_EMEV2
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
-        select USE_OF
-
 config MACH_KZM9G
         bool "KZM-A9-GT board"
         depends on ARCH_SH73A0
@@ -274,7 +277,7 @@ source "drivers/sh/Kconfig"
 
 endif
 
-if ARCH_SHMOBILE || ARCH_SHMOBILE_MULTI
+if ARCH_SHMOBILE
 
 menu "Timer and clock configuration"
 
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 51db2bcafabf..c7e877499dc2 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -71,7 +71,6 @@ obj-$(CONFIG_MACH_LAGER_REFERENCE)	+= board-lager-reference.o
 obj-$(CONFIG_MACH_ARMADILLO800EVA)      += board-armadillo800eva.o
 obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)    += board-armadillo800eva-reference.o
 obj-$(CONFIG_MACH_KOELSCH)      += board-koelsch.o
-obj-$(CONFIG_MACH_KZM9D)        += board-kzm9d.o
 obj-$(CONFIG_MACH_KZM9G)        += board-kzm9g.o
 obj-$(CONFIG_MACH_KZM9G_REFERENCE)      += board-kzm9g-reference.o
 endif
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
index 391d72a5536c..4f30e3dc0919 100644
--- a/arch/arm/mach-shmobile/Makefile.boot
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -8,7 +8,6 @@ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
 loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
 loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
 loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
-loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
 loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
 loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
 loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
index 0fa068e30a30..fe071a9130b7 100644
--- a/arch/arm/mach-shmobile/board-ape6evm.c
+++ b/arch/arm/mach-shmobile/board-ape6evm.c
@@ -168,7 +168,7 @@ static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = {
 };
 
 static const struct resource mmcif0_resources[] __initconst = {
-        DEFINE_RES_MEM_NAMED(0xee200000, 0x100, "MMCIF0"),
+        DEFINE_RES_MEM(0xee200000, 0x100),
         DEFINE_RES_IRQ(gic_spi(169)),
 };
 
@@ -179,7 +179,7 @@ static const struct sh_mobile_sdhi_info sdhi0_pdata __initconst = {
 };
 
 static const struct resource sdhi0_resources[] __initconst = {
-        DEFINE_RES_MEM_NAMED(0xee100000, 0x100, "SDHI0"),
+        DEFINE_RES_MEM(0xee100000, 0x100),
         DEFINE_RES_IRQ(gic_spi(165)),
 };
 
@@ -191,7 +191,7 @@ static const struct sh_mobile_sdhi_info sdhi1_pdata __initconst = {
 };
 
 static const struct resource sdhi1_resources[] __initconst = {
-        DEFINE_RES_MEM_NAMED(0xee120000, 0x100, "SDHI1"),
+        DEFINE_RES_MEM(0xee120000, 0x100),
         DEFINE_RES_IRQ(gic_spi(166)),
 };
 
diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
index ae88fdad4b3a..875cf3f3f503 100644
--- a/arch/arm/mach-shmobile/board-bockw-reference.c
+++ b/arch/arm/mach-shmobile/board-bockw-reference.c
@@ -19,7 +19,6 @@
  */
 
 #include <linux/of_platform.h>
-#include <linux/pinctrl/machine.h>
 #include <mach/common.h>
 #include <mach/r8a7778.h>
 #include <asm/mach/arch.h>
@@ -28,14 +27,6 @@
  *      see board-bock.c for checking detail of dip-switch
  */
 
-static const struct pinctrl_map bockw_pinctrl_map[] = {
-        /* SCIF0 */
-        PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
-                                  "scif0_data_a", "scif0"),
-        PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
-                                  "scif0_ctrl", "scif0"),
-};
-
 #define FPGA    0x18200000
 #define IRQ0MR  0x30
 #define COMCTLR 0x101c
@@ -45,10 +36,6 @@ static void __init bockw_init(void)
 
         r8a7778_clock_init();
         r8a7778_init_irq_extpin_dt(1);
-
-        pinctrl_register_mappings(bockw_pinctrl_map,
-                                  ARRAY_SIZE(bockw_pinctrl_map));
-        r8a7778_pinmux_init();
         r8a7778_add_dt_devices();
 
         fpga = ioremap_nocache(FPGA, SZ_1M);
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
deleted file mode 100644
index 30c2cc695b12..000000000000
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * kzm9d board support
- *
- * Copyright (C) 2012  Renesas Solutions Corp.
- * Copyright (C) 2012  Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
-#include <linux/smsc911x.h>
-#include <mach/common.h>
-#include <mach/emev2.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-};
-
-/* Ether */
-static struct resource smsc911x_resources[] = {
-        [0] = {
-                .start  = 0x20000000,
-                .end    = 0x2000ffff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = EMEV2_GPIO_IRQ(1),
-                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
-        },
-};
-
-static struct smsc911x_platform_config smsc911x_platdata = {
-        .flags          = SMSC911X_USE_32BIT,
-        .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
-        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
-};
-
-static struct platform_device smsc91x_device = {
-        .name   = "smsc911x",
-        .id     = -1,
-        .dev    = {
-                  .platform_data = &smsc911x_platdata,
-                },
-        .num_resources  = ARRAY_SIZE(smsc911x_resources),
-        .resource       = smsc911x_resources,
-};
-
-static struct platform_device *kzm9d_devices[] __initdata = {
-        &smsc91x_device,
-};
-
-void __init kzm9d_add_standard_devices(void)
-{
-        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
-        emev2_add_standard_devices();
-
-        platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices));
-}
-
-static const char *kzm9d_boards_compat_dt[] __initdata = {
-        "renesas,kzm9d",
-        NULL,
-};
-
-DT_MACHINE_START(KZM9D_DT, "kzm9d")
-        .smp            = smp_ops(emev2_smp_ops),
-        .map_io         = emev2_map_io,
-        .init_early     = emev2_init_delay,
-        .init_machine   = kzm9d_add_standard_devices,
-        .init_late      = shmobile_init_late,
-        .dt_compat      = kzm9d_boards_compat_dt,
-MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
index 1a1a4a888632..7df9ea0839db 100644
--- a/arch/arm/mach-shmobile/board-lager-reference.c
+++ b/arch/arm/mach-shmobile/board-lager-reference.c
@@ -20,16 +20,15 @@
 
 #include <linux/init.h>
 #include <linux/of_platform.h>
+#include <mach/rcar-gen2.h>
 #include <mach/r8a7790.h>
 #include <asm/mach/arch.h>
 
 static void __init lager_add_standard_devices(void)
 {
-        /* clocks are setup late during boot in the case of DT */
         r8a7790_clock_init();
-
         r8a7790_add_dt_devices();
-        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
 
 static const char *lager_boards_compat_dt[] __initdata = {
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index a8d3ce646fb9..78a31b667988 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -148,7 +148,7 @@ static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
 };
 
 static const struct resource mmcif1_resources[] __initconst = {
-        DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
+        DEFINE_RES_MEM(0xee220000, 0x80),
         DEFINE_RES_IRQ(gic_spi(170)),
 };
 
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index da1352f5f71b..d832a4477b4b 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -29,6 +29,7 @@
 #include <linux/leds.h>
 #include <linux/dma-mapping.h>
 #include <linux/pinctrl/machine.h>
+#include <linux/platform_data/camera-rcar.h>
 #include <linux/platform_data/gpio-rcar.h>
 #include <linux/platform_data/rcar-du.h>
 #include <linux/platform_data/usb-rcar-phy.h>
@@ -259,10 +260,30 @@ static struct platform_device leds_device = {
         },
 };
 
+/* VIN */
 static struct rcar_vin_platform_data vin_platform_data __initdata = {
         .flags  = RCAR_VIN_BT656,
 };
 
+#define MARZEN_VIN(idx)                                         \
+static struct resource vin##idx##_resources[] __initdata = {    \
+        DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000),    \
+        DEFINE_RES_IRQ(gic_iid(0x5f + (idx))),                  \
+};                                                              \
+                                                                \
+static struct platform_device_info vin##idx##_info __initdata = { \
+        .parent         = &platform_bus,                        \
+        .name           = "r8a7779-vin",                        \
+        .id             = idx,                                  \
+        .res            = vin##idx##_resources,                 \
+        .num_res        = ARRAY_SIZE(vin##idx##_resources),     \
+        .dma_mask       = DMA_BIT_MASK(32),                     \
+        .data           = &vin_platform_data,                   \
+        .size_data      = sizeof(vin_platform_data),            \
+}
+MARZEN_VIN(1);
+MARZEN_VIN(3);
+
 #define MARZEN_CAMERA(idx)                                      \
 static struct i2c_board_info camera##idx##_info = {             \
         I2C_BOARD_INFO("adv7180", 0x20 + (idx)),                \
@@ -326,8 +347,6 @@ static const struct pinctrl_map marzen_pinctrl_map[] = {
                                   "sdhi0_ctrl", "sdhi0"),
         PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
                                   "sdhi0_cd", "sdhi0"),
-        PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
-                                  "sdhi0_wp", "sdhi0"),
         /* SMSC */
         PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
                                   "intc_irq1_b", "intc"),
@@ -367,8 +386,8 @@ static void __init marzen_init(void)
         r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
 
         r8a7779_add_standard_devices();
-        r8a7779_add_vin_device(1, &vin_platform_data);
-        r8a7779_add_vin_device(3, &vin_platform_data);
+        platform_device_register_full(&vin1_info);
+        platform_device_register_full(&vin3_info);
         platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
         marzen_add_du_device();
 }
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index 4aba20ca127e..7b457aed8253 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -170,6 +170,9 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
 
         /* MSTP clocks */
+        CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
+
+        /* ICK */
         CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),
         CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP46]),
         CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP45]),
@@ -178,6 +181,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
         CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
         CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
+        CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
 };
 
 void __init r7s72100_clock_init(void)
diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
index 571409b611d3..7348d58f500e 100644
--- a/arch/arm/mach-shmobile/clock-r8a73a4.c
+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
@@ -584,15 +584,15 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
         CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
         CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
-        CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
+        CLKDEV_DEV_ID("ee220000.mmc", &mstp_clks[MSTP305]),
         CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
-        CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
+        CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP312]),
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
-        CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
+        CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]),
         CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
-        CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
+        CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
-        CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
+        CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
         CLKDEV_DEV_ID("e6550000.i2c", &mstp_clks[MSTP316]),
         CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
         CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index c826bca4024e..dd989f93498f 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -585,22 +585,23 @@ static struct clk_lookup lookups[] = {
 
         CLKDEV_DEV_ID("sh_cmt.10",              &mstp_clks[MSTP329]),
         CLKDEV_DEV_ID("sh_fsi2",                &mstp_clks[MSTP328]),
+        CLKDEV_DEV_ID("fe1f0000.sound",         &mstp_clks[MSTP328]),
         CLKDEV_DEV_ID("i2c-sh_mobile.1",        &mstp_clks[MSTP323]),
         CLKDEV_DEV_ID("e6c20000.i2c",           &mstp_clks[MSTP323]),
         CLKDEV_DEV_ID("renesas_usbhs",          &mstp_clks[MSTP320]),
         CLKDEV_DEV_ID("sh_mobile_sdhi.0",       &mstp_clks[MSTP314]),
-        CLKDEV_DEV_ID("e6850000.sdhi",          &mstp_clks[MSTP314]),
+        CLKDEV_DEV_ID("e6850000.sd",            &mstp_clks[MSTP314]),
         CLKDEV_DEV_ID("sh_mobile_sdhi.1",       &mstp_clks[MSTP313]),
-        CLKDEV_DEV_ID("e6860000.sdhi",          &mstp_clks[MSTP313]),
+        CLKDEV_DEV_ID("e6860000.sd",            &mstp_clks[MSTP313]),
         CLKDEV_DEV_ID("sh_mmcif",               &mstp_clks[MSTP312]),
-        CLKDEV_DEV_ID("e6bd0000.mmcif",         &mstp_clks[MSTP312]),
+        CLKDEV_DEV_ID("e6bd0000.mmc",           &mstp_clks[MSTP312]),
         CLKDEV_DEV_ID("r8a7740-gether",         &mstp_clks[MSTP309]),
         CLKDEV_DEV_ID("e9a00000.sh-eth",        &mstp_clks[MSTP309]),
         CLKDEV_DEV_ID("renesas-tpu-pwm",        &mstp_clks[MSTP304]),
         CLKDEV_DEV_ID("e6600000.pwm",           &mstp_clks[MSTP304]),
 
         CLKDEV_DEV_ID("sh_mobile_sdhi.2",       &mstp_clks[MSTP415]),
-        CLKDEV_DEV_ID("e6870000.sdhi",          &mstp_clks[MSTP415]),
+        CLKDEV_DEV_ID("e6870000.sd",            &mstp_clks[MSTP415]),
 
         /* ICK */
         CLKDEV_ICK_ID("host",   "renesas_usbhs",        &mstp_clks[MSTP416]),
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
index fb6af83858e3..4b601bf4ede4 100644
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -173,9 +173,13 @@ static struct clk_lookup lookups[] = {
 
         /* MSTP32 clocks */
         CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
+        CLKDEV_DEV_ID("ffe4e000.mmc", &mstp_clks[MSTP331]), /* MMC */
         CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
+        CLKDEV_DEV_ID("ffe4c000.sd", &mstp_clks[MSTP323]), /* SDHI0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
+        CLKDEV_DEV_ID("ffe4d000.sd", &mstp_clks[MSTP322]), /* SDHI1 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
+        CLKDEV_DEV_ID("ffe4f000.sd", &mstp_clks[MSTP321]), /* SDHI2 */
         CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
         CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
         CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
@@ -183,9 +187,13 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
         CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP100]), /* USB FUNC */
         CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
+        CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
         CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
+        CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
         CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
+        CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
         CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
+        CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
         CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
         CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
@@ -195,8 +203,11 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
         CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
         CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
+        CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
         CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
+        CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
         CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
+        CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
         CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
 
         CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
index 1f7080fab0a5..f1fb89b76786 100644
--- a/arch/arm/mach-shmobile/clock-r8a7779.c
+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
@@ -184,9 +184,13 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
         CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP016]), /* TMU02 */
         CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
+        CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
         CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
+        CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
         CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
+        CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
         CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
+        CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
         CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
         CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
@@ -194,12 +198,19 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
         CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
         CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
+        CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
         CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
+        CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
         CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
+        CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
+        CLKDEV_DEV_ID("ffe4c000.sd", &mstp_clks[MSTP323]), /* SDHI0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
+        CLKDEV_DEV_ID("ffe4d000.sd", &mstp_clks[MSTP322]), /* SDHI1 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
+        CLKDEV_DEV_ID("ffe4e000.sd", &mstp_clks[MSTP321]), /* SDHI2 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
+        CLKDEV_DEV_ID("ffe4f000.sd", &mstp_clks[MSTP320]), /* SDHI3 */
         CLKDEV_DEV_ID("rcar-du-r8a7779", &mstp_clks[MSTP103]), /* DU */
 };
 
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index a64f965c7da1..312376d2cfd1 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -53,6 +53,7 @@
 #define SMSTPCR7 0xe615014c
 #define SMSTPCR8 0xe6150990
 #define SMSTPCR9 0xe6150994
+#define SMSTPCR10 0xe6150998
 
 #define SDCKCR          0xE6150074
 #define SD2CKCR         0xE6150078
@@ -77,7 +78,7 @@ static struct sh_clk_ops followparent_clk_ops = {
 };
 
 static struct clk main_clk = {
-        /* .parent will be set r8a73a4_clock_init */
+        /* .parent will be set r8a7790_clock_init */
         .ops    = &followparent_clk_ops,
 };
 
@@ -182,10 +183,14 @@ static struct clk div6_clks[DIV6_NR] = {
 
 /* MSTP */
 enum {
+        MSTP1015, MSTP1014, MSTP1013, MSTP1012, MSTP1011, MSTP1010,
+        MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
         MSTP931, MSTP930, MSTP929, MSTP928,
+        MSTP917,
         MSTP813,
         MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
         MSTP717, MSTP716,
+        MSTP704,
         MSTP522,
         MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
         MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
@@ -194,10 +199,22 @@ enum {
 };
 
 static struct clk mstp_clks[MSTP_NR] = {
-        [MSTP931] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 31, 0), /* I2C0 */
-        [MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
-        [MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
-        [MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
+        [MSTP1015] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 15, 0), /* SSI0 */
+        [MSTP1014] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 14, 0), /* SSI1 */
+        [MSTP1013] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 13, 0), /* SSI2 */
+        [MSTP1012] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 12, 0), /* SSI3 */
+        [MSTP1011] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 11, 0), /* SSI4 */
+        [MSTP1010] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 10, 0), /* SSI5 */
+        [MSTP1009] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  9, 0), /* SSI6 */
+        [MSTP1008] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  8, 0), /* SSI7 */
+        [MSTP1007] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  7, 0), /* SSI8 */
+        [MSTP1006] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  6, 0), /* SSI9 */
+        [MSTP1005] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  5, 0), /* SSI ALL */
+        [MSTP931] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 31, 0), /* I2C0 */
+        [MSTP930] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 30, 0), /* I2C1 */
+        [MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */
+        [MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
+        [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
         [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
         [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
         [MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
@@ -208,6 +225,7 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
         [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
         [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
+        [MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
         [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
         [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
         [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
@@ -262,11 +280,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("ssprs",          &div6_clks[DIV6_SSPRS]),
 
         /* MSTP */
-        CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
-        CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
-        CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
-        CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
-        CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
+        CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP1005]),
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
         CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
         CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
@@ -282,20 +296,42 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
         CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
         CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
+        CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
         CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
-        CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
+        CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
-        CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
+        CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
         CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
-        CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
+        CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]),
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
-        CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
+        CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP312]),
         CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
-        CLKDEV_DEV_ID("ee160000.sdhi", &mstp_clks[MSTP311]),
+        CLKDEV_DEV_ID("ee160000.sd", &mstp_clks[MSTP311]),
         CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
-        CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
+        CLKDEV_DEV_ID("ee220000.mmc", &mstp_clks[MSTP305]),
         CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
         CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+        CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+        CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
+
+        /* ICK */
+        CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
+        CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
+        CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
+        CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
+        CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
+        CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
+        CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
+        CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
+        CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
+        CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP1012]),
+        CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP1011]),
+        CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP1010]),
+        CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP1009]),
+        CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP1008]),
+        CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP1007]),
+        CLKDEV_ICK_ID("ssi.9", "rcar_sound", &mstp_clks[MSTP1006]),
+
 };
 
 #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)              \
@@ -321,10 +357,10 @@ void __init r8a7790_clock_init(void)
                 R8A7790_CLOCK_ROOT(20, &extal_clk, 130, 156, 80, 66);
                 break;
         case MD(14):
-                R8A7790_CLOCK_ROOT(26, &extal_div2_clk, 200, 240, 122, 102);
+                R8A7790_CLOCK_ROOT(26 / 2, &extal_div2_clk, 200, 240, 122, 102);
                 break;
         case MD(13) | MD(14):
-                R8A7790_CLOCK_ROOT(30, &extal_div2_clk, 172, 208, 106, 88);
+                R8A7790_CLOCK_ROOT(30 / 2, &extal_div2_clk, 172, 208, 106, 88);
                 break;
         }
 
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index c9a26f16ce5b..ff2d60d55bd5 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -103,6 +103,7 @@ SH_FIXED_RATIO_CLK_SET(hp_clk,			pll1_clk,	1, 12);
 SH_FIXED_RATIO_CLK_SET(p_clk,                   pll1_clk,       1, 24);
 SH_FIXED_RATIO_CLK_SET(rclk_clk,                pll1_clk,       1, (48 * 1024));
 SH_FIXED_RATIO_CLK_SET(mp_clk,                  pll1_div2_clk,  1, 15);
+SH_FIXED_RATIO_CLK_SET(zx_clk,                  pll1_clk,       1, 3);
 
 static struct clk *main_clks[] = {
         &extal_clk,
@@ -116,12 +117,14 @@ static struct clk *main_clks[] = {
         &rclk_clk,
         &mp_clk,
         &cp_clk,
+        &zx_clk,
 };
 
 /* MSTP */
 enum {
-        MSTP721, MSTP720,
+        MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
         MSTP719, MSTP718, MSTP715, MSTP714,
+        MSTP522,
         MSTP216, MSTP207, MSTP206,
         MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
         MSTP124,
@@ -129,12 +132,16 @@ enum {
 };
 
 static struct clk mstp_clks[MSTP_NR] = {
+        [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
+        [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
+        [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
         [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
         [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
         [MSTP719] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 19, 0), /* SCIF2 */
         [MSTP718] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 18, 0), /* SCIF3 */
         [MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */
         [MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */
+        [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
         [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
         [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
         [MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
@@ -164,6 +171,9 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("peripheral_clk", &hp_clk),
 
         /* MSTP */
+        CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7791", &mstp_clks[MSTP726]),
+        CLKDEV_ICK_ID("du.0", "rcar-du-r8a7791", &mstp_clks[MSTP724]),
+        CLKDEV_ICK_ID("du.1", "rcar-du-r8a7791", &mstp_clks[MSTP723]),
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
         CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
         CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), /* SCIFB0 */
@@ -180,6 +190,8 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
         CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
         CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+        CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
+        CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
 };
 
 #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31)              \
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 5390c6bbbc02..28489978b09c 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -504,10 +504,6 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
         CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
         CLKDEV_CON_ID("hdmi_clk", &div6_reparent_clks[DIV6_HDMI]),
-        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
-        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
-        CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
-        CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
 
         /* MSTP32 clocks */
         CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
@@ -574,6 +570,11 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
         CLKDEV_DEV_ID("sh_cmt.2", &mstp_clks[MSTP400]), /* CMT2 */
 
+        /* ICK */
+        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
+        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
+        CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
+        CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
         CLKDEV_ICK_ID("hdmi", "sh_mobile_lcdc_fb.1",
                       &div6_reparent_clks[DIV6_HDMI]),
         CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index c92c023f0d27..30d88689a960 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -625,12 +625,6 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("sdhi0_clk", &div6_clks[DIV6_SDHI0]),
         CLKDEV_CON_ID("sdhi1_clk", &div6_clks[DIV6_SDHI1]),
         CLKDEV_CON_ID("sdhi2_clk", &div6_clks[DIV6_SDHI2]),
-        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
-        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
-        CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
-        CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
-        CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
-        CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
 
         /* MSTP32 clocks */
         CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
@@ -663,13 +657,13 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */
         CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */
         CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
-        CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), /* SDHI0 */
+        CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]), /* SDHI0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
-        CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]), /* SDHI1 */
+        CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]), /* SDHI1 */
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
-        CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
+        CLKDEV_DEV_ID("e6bd0000.mmc", &mstp_clks[MSTP312]), /* MMCIF0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
-        CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */
+        CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP311]), /* SDHI2 */
         CLKDEV_DEV_ID("renesas-tpu-pwm.0", &mstp_clks[MSTP304]), /* TPU0 */
         CLKDEV_DEV_ID("renesas-tpu-pwm.1", &mstp_clks[MSTP303]), /* TPU1 */
         CLKDEV_DEV_ID("renesas-tpu-pwm.2", &mstp_clks[MSTP302]), /* TPU2 */
@@ -680,6 +674,14 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
         CLKDEV_DEV_ID("e6828000.i2c", &mstp_clks[MSTP410]), /* I2C4 */
         CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
+
+        /* ICK */
+        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
+        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
+        CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
+        CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
+        CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
+        CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
 };
 
 void __init sh73a0_clock_init(void)
diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
index c2eb7568d9be..fcb142a14e07 100644
--- a/arch/arm/mach-shmobile/include/mach/emev2.h
+++ b/arch/arm/mach-shmobile/include/mach/emev2.h
@@ -3,12 +3,7 @@
 
 extern void emev2_map_io(void);
 extern void emev2_init_delay(void);
-extern void emev2_add_standard_devices(void);
 extern void emev2_clock_init(void);
-
-#define EMEV2_GPIO_BASE 200
-#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
-
 extern struct smp_operations emev2_smp_ops;
 
 #endif /* __ASM_EMEV2_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
index 441886c9714b..b497f932d04f 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
@@ -27,6 +27,24 @@ enum {
         HPBDMA_SLAVE_DUMMY,
         HPBDMA_SLAVE_SDHI0_TX,
         HPBDMA_SLAVE_SDHI0_RX,
+        HPBDMA_SLAVE_HPBIF0_TX,
+        HPBDMA_SLAVE_HPBIF0_RX,
+        HPBDMA_SLAVE_HPBIF1_TX,
+        HPBDMA_SLAVE_HPBIF1_RX,
+        HPBDMA_SLAVE_HPBIF2_TX,
+        HPBDMA_SLAVE_HPBIF2_RX,
+        HPBDMA_SLAVE_HPBIF3_TX,
+        HPBDMA_SLAVE_HPBIF3_RX,
+        HPBDMA_SLAVE_HPBIF4_TX,
+        HPBDMA_SLAVE_HPBIF4_RX,
+        HPBDMA_SLAVE_HPBIF5_TX,
+        HPBDMA_SLAVE_HPBIF5_RX,
+        HPBDMA_SLAVE_HPBIF6_TX,
+        HPBDMA_SLAVE_HPBIF6_RX,
+        HPBDMA_SLAVE_HPBIF7_TX,
+        HPBDMA_SLAVE_HPBIF7_RX,
+        HPBDMA_SLAVE_HPBIF8_TX,
+        HPBDMA_SLAVE_HPBIF8_RX,
 };
 
 extern void r8a7778_add_standard_devices(void);
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
index 17af34ed89c8..5014145f272e 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
@@ -3,8 +3,6 @@
 
 #include <linux/sh_clk.h>
 #include <linux/pm_domain.h>
-#include <linux/sh_eth.h>
-#include <linux/platform_data/camera-rcar.h>
 
 /* HPB-DMA slave IDs */
 enum {
@@ -40,9 +38,6 @@ extern void r8a7779_earlytimer_init(void);
 extern void r8a7779_add_early_devices(void);
 extern void r8a7779_add_standard_devices(void);
 extern void r8a7779_add_standard_devices_dt(void);
-extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
-extern void r8a7779_add_vin_device(int idx,
-                                   struct rcar_vin_platform_data *pdata);
 extern void r8a7779_init_late(void);
 extern void r8a7779_clock_init(void);
 extern void r8a7779_pinmux_init(void);
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
index 051ead3c286e..200fa699f730 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
@@ -4,6 +4,7 @@
 void r8a7791_add_standard_devices(void);
 void r8a7791_add_dt_devices(void);
 void r8a7791_clock_init(void);
+void r8a7791_pinmux_init(void);
 void r8a7791_init_early(void);
 extern struct smp_operations r8a7791_smp_ops;
 
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index 3ad531caf4f0..c8f2a1a69a52 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -16,24 +16,15 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
+#include <linux/clk-provider.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/platform_device.h>
-#include <linux/platform_data/gpio-em.h>
 #include <linux/of_platform.h>
-#include <linux/delay.h>
-#include <linux/input.h>
-#include <linux/io.h>
-#include <linux/irqchip/arm-gic.h>
 #include <mach/common.h>
 #include <mach/emev2.h>
-#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/time.h>
 
 static struct map_desc emev2_io_desc[] __initdata = {
 #ifdef CONFIG_SMP
@@ -52,150 +43,20 @@ void __init emev2_map_io(void)
         iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
 }
 
-/* UART */
-static struct resource uart0_resources[] = {
-        DEFINE_RES_MEM(0xe1020000, 0x38),
-        DEFINE_RES_IRQ(40),
-};
-
-static struct resource uart1_resources[] = {
-        DEFINE_RES_MEM(0xe1030000, 0x38),
-        DEFINE_RES_IRQ(41),
-};
-
-static struct resource uart2_resources[] = {
-        DEFINE_RES_MEM(0xe1040000, 0x38),
-        DEFINE_RES_IRQ(42),
-};
-
-static struct resource uart3_resources[] = {
-        DEFINE_RES_MEM(0xe1050000, 0x38),
-        DEFINE_RES_IRQ(43),
-};
-
-#define emev2_register_uart(idx)                                        \
-        platform_device_register_simple("serial8250-em", idx,           \
-                                        uart##idx##_resources,          \
-                                        ARRAY_SIZE(uart##idx##_resources))
-
-/* STI */
-static struct resource sti_resources[] = {
-        DEFINE_RES_MEM(0xe0180000, 0x54),
-        DEFINE_RES_IRQ(157),
-};
-
-#define emev2_register_sti()                                    \
-        platform_device_register_simple("em_sti", 0,            \
-                                        sti_resources,          \
-                                        ARRAY_SIZE(sti_resources))
-
-/* GIO */
-static struct gpio_em_config gio0_config = {
-        .gpio_base = 0,
-        .irq_base = EMEV2_GPIO_IRQ(0),
-        .number_of_pins = 32,
-};
-
-static struct resource gio0_resources[] = {
-        DEFINE_RES_MEM(0xe0050000, 0x2c),
-        DEFINE_RES_MEM(0xe0050040, 0x20),
-        DEFINE_RES_IRQ(99),
-        DEFINE_RES_IRQ(100),
-};
-
-static struct gpio_em_config gio1_config = {
-        .gpio_base = 32,
-        .irq_base = EMEV2_GPIO_IRQ(32),
-        .number_of_pins = 32,
-};
-
-static struct resource gio1_resources[] = {
-        DEFINE_RES_MEM(0xe0050080, 0x2c),
-        DEFINE_RES_MEM(0xe00500c0, 0x20),
-        DEFINE_RES_IRQ(101),
-        DEFINE_RES_IRQ(102),
-};
-
-static struct gpio_em_config gio2_config = {
-        .gpio_base = 64,
-        .irq_base = EMEV2_GPIO_IRQ(64),
-        .number_of_pins = 32,
-};
-
-static struct resource gio2_resources[] = {
-        DEFINE_RES_MEM(0xe0050100, 0x2c),
-        DEFINE_RES_MEM(0xe0050140, 0x20),
-        DEFINE_RES_IRQ(103),
-        DEFINE_RES_IRQ(104),
-};
-
-static struct gpio_em_config gio3_config = {
-        .gpio_base = 96,
-        .irq_base = EMEV2_GPIO_IRQ(96),
-        .number_of_pins = 32,
-};
-
-static struct resource gio3_resources[] = {
-        DEFINE_RES_MEM(0xe0050180, 0x2c),
-        DEFINE_RES_MEM(0xe00501c0, 0x20),
-        DEFINE_RES_IRQ(105),
-        DEFINE_RES_IRQ(106),
-};
-
-static struct gpio_em_config gio4_config = {
-        .gpio_base = 128,
-        .irq_base = EMEV2_GPIO_IRQ(128),
-        .number_of_pins = 31,
-};
-
-static struct resource gio4_resources[] = {
-        DEFINE_RES_MEM(0xe0050200, 0x2c),
-        DEFINE_RES_MEM(0xe0050240, 0x20),
-        DEFINE_RES_IRQ(107),
-        DEFINE_RES_IRQ(108),
-};
-
-#define emev2_register_gio(idx)                                         \
-        platform_device_register_resndata(&platform_bus, "em_gio",      \
-                                          idx, gio##idx##_resources,    \
-                                          ARRAY_SIZE(gio##idx##_resources), \
-                                          &gio##idx##_config,           \
-                                          sizeof(struct gpio_em_config))
-
-static struct resource pmu_resources[] = {
-        DEFINE_RES_IRQ(152),
-        DEFINE_RES_IRQ(153),
-};
-
-#define emev2_register_pmu()                                    \
-        platform_device_register_simple("arm-pmu", -1,          \
-                                        pmu_resources,          \
-                                        ARRAY_SIZE(pmu_resources))
-
-void __init emev2_add_standard_devices(void)
-{
-        if (!IS_ENABLED(CONFIG_COMMON_CLK))
-                emev2_clock_init();
-
-        emev2_register_uart(0);
-        emev2_register_uart(1);
-        emev2_register_uart(2);
-        emev2_register_uart(3);
-        emev2_register_sti();
-        emev2_register_gio(0);
-        emev2_register_gio(1);
-        emev2_register_gio(2);
-        emev2_register_gio(3);
-        emev2_register_gio(4);
-        emev2_register_pmu();
-}
-
 void __init emev2_init_delay(void)
 {
         shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
 }
 
-#ifdef CONFIG_USE_OF
+static void __init emev2_add_standard_devices_dt(void)
+{
+#ifdef CONFIG_COMMON_CLK
+        of_clk_init(NULL);
+#else
+        emev2_clock_init();
+#endif
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
 
 static const char *emev2_boards_compat_dt[] __initdata = {
         "renesas,emev2",
@@ -206,7 +67,7 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
         .smp            = smp_ops(emev2_smp_ops),
         .map_io         = emev2_map_io,
         .init_early     = emev2_init_delay,
+        .init_machine   = emev2_add_standard_devices_dt,
+        .init_late      = shmobile_init_late,
         .dt_compat      = emev2_boards_compat_dt,
 MACHINE_END
-
-#endif /* CONFIG_USE_OF */
diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
index d4eb509a1c87..55f0b9c7c482 100644
--- a/arch/arm/mach-shmobile/setup-r7s72100.c
+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
@@ -22,6 +22,7 @@
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
 #include <mach/common.h>
 #include <mach/irqs.h>
 #include <mach/r7s72100.h>
@@ -58,6 +59,26 @@ static inline void r7s72100_register_scif(int idx)
                                       sizeof(struct plat_sci_port));
 }
 
+
+static struct sh_timer_config mtu2_0_platform_data __initdata = {
+        .name = "MTU2_0",
+        .timer_bit = 0,
+        .channel_offset = -0x80,
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_0_resources[] __initdata = {
+        DEFINE_RES_MEM(0xfcff0300, 0x27),
+        DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
+};
+
+#define r7s72100_register_mtu2(idx)                                     \
+        platform_device_register_resndata(&platform_bus, "sh_mtu2",     \
+                                          idx, mtu2_##idx##_resources,  \
+                                          ARRAY_SIZE(mtu2_##idx##_resources), \
+                                          &mtu2_##idx##_platform_data,  \
+                                          sizeof(struct sh_timer_config))
+
 void __init r7s72100_add_dt_devices(void)
 {
         r7s72100_register_scif(SCIF0);
@@ -68,6 +89,7 @@ void __init r7s72100_add_dt_devices(void)
         r7s72100_register_scif(SCIF5);
         r7s72100_register_scif(SCIF6);
         r7s72100_register_scif(SCIF7);
+        r7s72100_register_mtu2(0);
 }
 
 void __init r7s72100_init_early(void)
diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
index b0f2749071be..cc94b64c2ef5 100644
--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
@@ -275,7 +275,7 @@ static const struct sh_dmae_pdata dma_pdata = {
 
 static struct resource dma_resources[] = {
         DEFINE_RES_MEM(0xe6700020, 0x89e0),
-        DEFINE_RES_IRQ_NAMED(gic_spi(220), "error_irq"),
+        DEFINE_RES_IRQ(gic_spi(220)),
         {
                 /* IRQ for channels 0-19 */
                 .start  = gic_spi(200),
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index 03fcc5974ef9..81701cfb6cc6 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -319,6 +319,29 @@ void __init r8a7778_add_dt_devices(void)
 #define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1)  /* SDHI0 */
 #define HPB_DMAE_ASYNCMDR_ASMD21_MULTI  0       /* SDHI0 */
 
+#define HPBDMA_HPBIF(_id)                               \
+{                                                       \
+        .id     = HPBDMA_SLAVE_HPBIF## _id ##_TX,       \
+        .addr   = 0xffda0000 + (_id * 0x1000),          \
+        .dcr    = HPB_DMAE_DCR_CT |                     \
+                  HPB_DMAE_DCR_DIP |                    \
+                  HPB_DMAE_DCR_SPDS_32BIT |             \
+                  HPB_DMAE_DCR_DMDL |                   \
+                  HPB_DMAE_DCR_DPDS_32BIT,              \
+        .port   = 0x1111,                               \
+        .dma_ch = (28 + _id),                           \
+}, {                                                    \
+        .id     = HPBDMA_SLAVE_HPBIF## _id ##_RX,       \
+        .addr   = 0xffda0000 + (_id * 0x1000),          \
+        .dcr    = HPB_DMAE_DCR_CT |                     \
+                  HPB_DMAE_DCR_DIP |                    \
+                  HPB_DMAE_DCR_SMDL |                   \
+                  HPB_DMAE_DCR_SPDS_32BIT |             \
+                  HPB_DMAE_DCR_DPDS_32BIT,              \
+        .port   = 0x1111,                               \
+        .dma_ch = (28 + _id),                           \
+}
+
 static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
         {
                 .id     = HPBDMA_SLAVE_SDHI0_TX,
@@ -349,11 +372,39 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
                 .flags  = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
                 .dma_ch = 22,
         },
+
+        HPBDMA_HPBIF(0),
+        HPBDMA_HPBIF(1),
+        HPBDMA_HPBIF(2),
+        HPBDMA_HPBIF(3),
+        HPBDMA_HPBIF(4),
+        HPBDMA_HPBIF(5),
+        HPBDMA_HPBIF(6),
+        HPBDMA_HPBIF(7),
+        HPBDMA_HPBIF(8),
 };
 
 static const struct hpb_dmae_channel hpb_dmae_channels[] = {
         HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
         HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
 };
 
 static struct hpb_dmae_pdata dma_platform_data __initdata = {
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 13049e9d691c..8f9453152fb9 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -598,45 +598,6 @@ static struct platform_device ohci1_device = {
         .resource       = ohci1_resources,
 };
 
-/* Ether */
-static struct resource ether_resources[] __initdata = {
-        {
-                .start  = 0xfde00000,
-                .end    = 0xfde003ff,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = gic_iid(0xb4),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-#define R8A7779_VIN(idx) \
-static struct resource vin##idx##_resources[] __initdata = {            \
-        DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000),            \
-        DEFINE_RES_IRQ(gic_iid(0x5f + (idx))),                          \
-};                                                                      \
-                                                                        \
-static struct platform_device_info vin##idx##_info __initdata = {       \
-        .parent         = &platform_bus,                                \
-        .name           = "r8a7779-vin",                                \
-        .id             = idx,                                          \
-        .res            = vin##idx##_resources,                         \
-        .num_res        = ARRAY_SIZE(vin##idx##_resources),             \
-        .dma_mask       = DMA_BIT_MASK(32),                             \
-}
-
-R8A7779_VIN(0);
-R8A7779_VIN(1);
-R8A7779_VIN(2);
-R8A7779_VIN(3);
-
-static struct platform_device_info *vin_info_table[] __initdata = {
-        &vin0_info,
-        &vin1_info,
-        &vin2_info,
-        &vin3_info,
-};
-
 /* HPB-DMA */
 
 /* Asynchronous mode register bits */
@@ -825,24 +786,6 @@ void __init r8a7779_add_standard_devices(void)
         r8a7779_register_hpb_dmae();
 }
 
-void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
-{
-        platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
-                                          ether_resources,
-                                          ARRAY_SIZE(ether_resources),
-                                          pdata, sizeof(*pdata));
-}
-
-void __init r8a7779_add_vin_device(int id, struct rcar_vin_platform_data *pdata)
-{
-        BUG_ON(id < 0 || id > 3);
-
-        vin_info_table[id]->data = pdata;
-        vin_info_table[id]->size_data = sizeof(*pdata);
-
-        platform_device_register_full(vin_info_table[id]);
-}
-
 /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
 void __init __weak r8a7779_register_twd(void) { }
 
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index c47bcebbcb00..3543c3bacb75 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -34,6 +34,10 @@ static const struct resource pfc_resources[] __initconst = {
         DEFINE_RES_MEM(0xe6060000, 0x250),
 };
 
+#define r8a7790_register_pfc()                                          \
+        platform_device_register_simple("pfc-r8a7790", -1, pfc_resources, \
+                                        ARRAY_SIZE(pfc_resources))
+
 #define R8A7790_GPIO(idx)                                               \
 static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \
         DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50),              \
@@ -65,8 +69,7 @@ R8A7790_GPIO(5);
 
 void __init r8a7790_pinmux_init(void)
 {
-        platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
-                                        ARRAY_SIZE(pfc_resources));
+        r8a7790_register_pfc();
         r8a7790_register_gpio(0);
         r8a7790_register_gpio(1);
         r8a7790_register_gpio(2);
diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
index d9393d61ee27..cddca99b434f 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -22,6 +22,7 @@
 #include <linux/irq.h>
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
+#include <linux/platform_data/gpio-rcar.h>
 #include <linux/platform_data/irq-renesas-irqc.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
@@ -31,6 +32,58 @@
 #include <mach/rcar-gen2.h>
 #include <asm/mach/arch.h>
 
+static const struct resource pfc_resources[] __initconst = {
+        DEFINE_RES_MEM(0xe6060000, 0x250),
+};
+
+#define r8a7791_register_pfc()                                          \
+        platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
+                                        ARRAY_SIZE(pfc_resources))
+
+#define R8A7791_GPIO(idx, base, nr)                                     \
+static const struct resource r8a7791_gpio##idx##_resources[] __initconst = { \
+        DEFINE_RES_MEM((base), 0x50),                                   \
+        DEFINE_RES_IRQ(gic_spi(4 + (idx))),                             \
+};                                                                      \
+                                                                        \
+static const struct gpio_rcar_config                                    \
+r8a7791_gpio##idx##_platform_data __initconst = {                       \
+        .gpio_base      = 32 * (idx),                                   \
+        .irq_base       = 0,                                            \
+        .number_of_pins = (nr),                                         \
+        .pctl_name      = "pfc-r8a7791",                                \
+        .has_both_edge_trigger = 1,                                     \
+};                                                                      \
+
+R8A7791_GPIO(0, 0xe6050000, 32);
+R8A7791_GPIO(1, 0xe6051000, 32);
+R8A7791_GPIO(2, 0xe6052000, 32);
+R8A7791_GPIO(3, 0xe6053000, 32);
+R8A7791_GPIO(4, 0xe6054000, 32);
+R8A7791_GPIO(5, 0xe6055000, 32);
+R8A7791_GPIO(6, 0xe6055400, 32);
+R8A7791_GPIO(7, 0xe6055800, 26);
+
+#define r8a7791_register_gpio(idx)                                      \
+        platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
+                r8a7791_gpio##idx##_resources,                          \
+                ARRAY_SIZE(r8a7791_gpio##idx##_resources),              \
+                &r8a7791_gpio##idx##_platform_data,                     \
+                sizeof(r8a7791_gpio##idx##_platform_data))
+
+void __init r8a7791_pinmux_init(void)
+{
+        r8a7791_register_pfc();
+        r8a7791_register_gpio(0);
+        r8a7791_register_gpio(1);
+        r8a7791_register_gpio(2);
+        r8a7791_register_gpio(3);
+        r8a7791_register_gpio(4);
+        r8a7791_register_gpio(5);
+        r8a7791_register_gpio(6);
+        r8a7791_register_gpio(7);
+}
+
 #define SCIF_COMMON(scif_type, baseaddr, irq)                   \
         .type           = scif_type,                            \
         .mapbase        = baseaddr,                             \
@@ -136,6 +189,17 @@ static struct resource irqc0_resources[] = {
                                           &irqc##idx##_data,            \
                                           sizeof(struct renesas_irqc_config))
 
+static const struct resource thermal_resources[] __initconst = {
+        DEFINE_RES_MEM(0xe61f0000, 0x14),
+        DEFINE_RES_MEM(0xe61f0100, 0x38),
+        DEFINE_RES_IRQ(gic_spi(69)),
+};
+
+#define r8a7791_register_thermal()                                      \
+        platform_device_register_simple("rcar_thermal", -1,             \
+                                        thermal_resources,              \
+                                        ARRAY_SIZE(thermal_resources))
+
 void __init r8a7791_add_dt_devices(void)
 {
         r8a7791_register_scif(SCIFA0);
@@ -160,6 +224,7 @@ void __init r8a7791_add_standard_devices(void)
 {
         r8a7791_add_dt_devices();
         r8a7791_register_irqc(0);
+        r8a7791_register_thermal();
 }
 
 void __init r8a7791_init_early(void)
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index 22de17417fd7..65151c48cbd4 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -273,7 +273,7 @@ static struct sh_timer_config tmu00_platform_data = {
 };
 
 static struct resource tmu00_resources[] = {
-        [0] = DEFINE_RES_MEM_NAMED(0xfff60008, 0xc, "TMU00"),
+        [0] = DEFINE_RES_MEM(0xfff60008, 0xc),
         [1] = {
                 .start  = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */
                 .flags  = IORESOURCE_IRQ,
@@ -298,7 +298,7 @@ static struct sh_timer_config tmu01_platform_data = {
 };
 
 static struct resource tmu01_resources[] = {
-        [0] = DEFINE_RES_MEM_NAMED(0xfff60014, 0xc, "TMU00"),
+        [0] = DEFINE_RES_MEM(0xfff60014, 0xc),
         [1] = {
                 .start  = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */
                 .flags  = IORESOURCE_IRQ,
@@ -316,7 +316,7 @@ static struct platform_device tmu01_device = {
 };
 
 static struct resource i2c0_resources[] = {
-        [0] = DEFINE_RES_MEM_NAMED(0xe6820000, 0x426, "IIC0"),
+        [0] = DEFINE_RES_MEM(0xe6820000, 0x426),
         [1] = {
                 .start  = gic_spi(167),
                 .end    = gic_spi(170),
@@ -325,7 +325,7 @@ static struct resource i2c0_resources[] = {
 };
 
 static struct resource i2c1_resources[] = {
-        [0] = DEFINE_RES_MEM_NAMED(0xe6822000, 0x426, "IIC1"),
+        [0] = DEFINE_RES_MEM(0xe6822000, 0x426),
         [1] = {
                 .start  = gic_spi(51),
                 .end    = gic_spi(54),
@@ -334,7 +334,7 @@ static struct resource i2c1_resources[] = {
 };
 
 static struct resource i2c2_resources[] = {
-        [0] = DEFINE_RES_MEM_NAMED(0xe6824000, 0x426, "IIC2"),
+        [0] = DEFINE_RES_MEM(0xe6824000, 0x426),
         [1] = {
                 .start  = gic_spi(171),
                 .end    = gic_spi(174),
@@ -343,7 +343,7 @@ static struct resource i2c2_resources[] = {
 };
 
 static struct resource i2c3_resources[] = {
-        [0] = DEFINE_RES_MEM_NAMED(0xe6826000, 0x426, "IIC3"),
+        [0] = DEFINE_RES_MEM(0xe6826000, 0x426),
         [1] = {
                 .start  = gic_spi(183),
                 .end    = gic_spi(186),
@@ -352,7 +352,7 @@ static struct resource i2c3_resources[] = {
 };
 
 static struct resource i2c4_resources[] = {
-        [0] = DEFINE_RES_MEM_NAMED(0xe6828000, 0x426, "IIC4"),
+        [0] = DEFINE_RES_MEM(0xe6828000, 0x426),
         [1] = {
                 .start  = gic_spi(187),
                 .end    = gic_spi(190),
@@ -722,7 +722,7 @@ static struct platform_device pmu_device = {
 
 /* an IPMMU module for ICB */
 static struct resource ipmmu_resources[] = {
-        DEFINE_RES_MEM_NAMED(0xfe951000, 0x100, "IPMMU"),
+        DEFINE_RES_MEM(0xfe951000, 0x100),
 };
 
 static const char * const ipmmu_dev_names[] = {
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index 616b96e86ad4..d05ba759da30 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -2,10 +2,10 @@
 # Makefile for the linux kernel, U8500 machine.
 #
 
-obj-y                           := cpu.o devices.o id.o timer.o pm.o
+obj-y                           := cpu.o id.o timer.o pm.o
 obj-$(CONFIG_CACHE_L2X0)        += cache-l2x0.o
-obj-$(CONFIG_UX500_SOC_DB8500)  += cpu-db8500.o devices-db8500.o
-obj-$(CONFIG_MACH_MOP500)       += board-mop500.o board-mop500-sdi.o \
+obj-$(CONFIG_UX500_SOC_DB8500)  += cpu-db8500.o
+obj-$(CONFIG_MACH_MOP500)       += board-mop500-sdi.o \
                                 board-mop500-regulators.o \
                                 board-mop500-pins.o \
                                 board-mop500-audio.o
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index 154e15f59702..dc7f90157766 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -7,16 +7,13 @@
 #include <linux/platform_device.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
-#include <linux/platform_data/pinctrl-nomadik.h>
 #include <linux/platform_data/dma-ste-dma40.h>
 
-#include "devices.h"
 #include "irqs.h"
 #include <linux/platform_data/asoc-ux500-msp.h>
 
 #include "ste-dma40-db8500.h"
 #include "board-mop500.h"
-#include "devices-db8500.h"
 
 static struct stedma40_chan_cfg msp0_dma_rx = {
         .high_priority = true,
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 0efb1560fc35..f63619b69113 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -10,94 +10,18 @@
 #include <linux/string.h>
 #include <linux/pinctrl/machine.h>
 #include <linux/pinctrl/pinconf-generic.h>
-#include <linux/platform_data/pinctrl-nomadik.h>
 
 #include <asm/mach-types.h>
 
 #include "board-mop500.h"
 
-enum custom_pin_cfg_t {
-        PINS_FOR_DEFAULT,
-        PINS_FOR_U9500,
-};
-
-static enum custom_pin_cfg_t pinsfor;
-
 /* These simply sets bias for pins */
 #define BIAS(a,b) static unsigned long a[] = { b }
 
-BIAS(pd, PIN_PULL_DOWN);
-BIAS(in_nopull, PIN_INPUT_NOPULL);
-BIAS(in_nopull_slpm_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE);
-BIAS(in_pu, PIN_INPUT_PULLUP);
-BIAS(in_pd, PIN_INPUT_PULLDOWN);
-BIAS(out_hi, PIN_OUTPUT_HIGH);
-BIAS(out_lo, PIN_OUTPUT_LOW);
-BIAS(out_lo_slpm_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE);
-
 BIAS(abx500_out_lo, PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, 0));
 BIAS(abx500_in_pd, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 1));
 BIAS(abx500_in_nopull, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0));
 
-/* These also force them into GPIO mode */
-BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
-BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
-BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
-BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
-BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
-BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
-/* Sleep modes */
-BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED|
-        PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
-BIAS(slpm_in_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|
-        PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED);
-BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED|
-        PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
-BIAS(slpm_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|
-        PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED);
-BIAS(slpm_out_lo_pdis, PIN_SLEEPMODE_ENABLED|
-        PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE|PIN_SLPM_PDIS_DISABLED);
-BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|
-        PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
-BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|
-        PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
-BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|
-        PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
-BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP|
-        PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED);
-BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|
-        PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
-BIAS(out_lo_wkup_pdis, PIN_SLPM_OUTPUT_LOW|
-        PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
-BIAS(in_wkup_pdis_en, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
-        PIN_SLPM_PDIS_ENABLED);
-BIAS(in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
-        PIN_SLPM_PDIS_DISABLED);
-BIAS(out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|
-        PIN_SLPM_PDIS_DISABLED);
-
-/* We use these to define hog settings that are always done on boot */
-#define DB8500_MUX_HOG(group,func) \
-        PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)
-#define DB8500_PIN_HOG(pin,conf) \
-        PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)
-
-/* These are default states associated with device and changed runtime */
-#define DB8500_MUX(group,func,dev) \
-        PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
-#define DB8500_PIN(pin,conf,dev) \
-        PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
-#define DB8500_PIN_IDLE(pin, conf, dev) \
-        PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_IDLE, "pinctrl-db8500",  \
-                            pin, conf)
-#define DB8500_PIN_SLEEP(pin, conf, dev) \
-        PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
-                            pin, conf)
-#define DB8500_MUX_STATE(group, func, dev, state) \
-        PIN_MAP_MUX_GROUP(dev, state, "pinctrl-db8500", group, func)
-#define DB8500_PIN_STATE(pin, conf, dev, state) \
-        PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-db8500", pin, conf)
-
 #define AB8500_MUX_HOG(group, func) \
         PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-ab8500.0", group, func)
 #define AB8500_PIN_HOG(pin, conf) \
@@ -344,725 +268,8 @@ static struct pinctrl_map __initdata ab8505_pinmap[] = {
         AB8505_PIN_HOG("GPIO53_D15", in_pd),
 };
 
-/* Pin control settings */
-static struct pinctrl_map __initdata mop500_family_pinmap[] = {
-        /*
-         * uMSP0, mux in 4 pins, regular placement of RX/TX
-         * explicitly set the pins to no pull
-         */
-        DB8500_MUX_HOG("msp0txrx_a_1", "msp0"),
-        DB8500_MUX_HOG("msp0tfstck_a_1", "msp0"),
-        DB8500_PIN_HOG("GPIO12_AC4", in_nopull), /* TXD */
-        DB8500_PIN_HOG("GPIO15_AC3", in_nopull), /* RXD */
-        DB8500_PIN_HOG("GPIO13_AF3", in_nopull), /* TFS */
-        DB8500_PIN_HOG("GPIO14_AE3", in_nopull), /* TCK */
-        /* MSP2 for HDMI, pull down TXD, TCK, TFS  */
-        DB8500_MUX_HOG("msp2_a_1", "msp2"),
-        DB8500_PIN_HOG("GPIO193_AH27", in_pd), /* TXD */
-        DB8500_PIN_HOG("GPIO194_AF27", in_pd), /* TCK */
-        DB8500_PIN_HOG("GPIO195_AG28", in_pd), /* TFS */
-        DB8500_PIN_HOG("GPIO196_AG26", out_lo), /* RXD */
-        /*
-         * LCD, set TE0 (using LCD VSI0) and D14 (touch screen interrupt) to
-         * pull-up
-         * TODO: is this really correct? Snowball doesn't have a LCD.
-         */
-        DB8500_MUX_HOG("lcdvsi0_a_1", "lcd"),
-        DB8500_PIN_HOG("GPIO68_E1", in_pu),
-        DB8500_PIN_HOG("GPIO84_C2", gpio_in_pu),
-        /*
-         * STMPE1601/tc35893 keypad IRQ GPIO 218
-         * TODO: set for snowball and HREF really??
-         */
-        DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu),
-        /*
-         * UART0, we do not mux in u0 here.
-         * uart-0 pins gpio configuration should be kept intact to prevent
-         * a glitch in tx line when the tty dev is opened. Later these pins
-         * are configured by uart driver
-         */
-        DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */
-        DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */
-        DB8500_PIN_HOG("GPIO2_AH4", in_pu), /* RXD */
-        DB8500_PIN_HOG("GPIO3_AH3", out_hi), /* TXD */
-        /*
-         * Mux in UART2 on altfunction C and set pull-ups.
-         * TODO: is this used on U8500 variants and Snowball really?
-         * The setting on GPIO31 conflicts with magnetometer use on hrefv60
-         */
-        /* default state for UART2 */
-        DB8500_MUX("u2rxtx_c_1", "u2", "uart2"),
-        DB8500_PIN("GPIO29_W2", in_pu, "uart2"), /* RXD */
-        DB8500_PIN("GPIO30_W3", out_hi, "uart2"), /* TXD */
-        /* Sleep state for UART2 */
-        DB8500_PIN_SLEEP("GPIO29_W2", in_wkup_pdis, "uart2"),
-        DB8500_PIN_SLEEP("GPIO30_W3", out_wkup_pdis, "uart2"),
-        /*
-         * The following pin sets were known as "runtime pins" before being
-         * converted to the pinctrl model. Here we model them as "default"
-         * states.
-         */
-        /* Mux in UART0 after initialization */
-        DB8500_MUX("u0_a_1", "u0", "uart0"),
-        DB8500_PIN("GPIO0_AJ5", in_pu, "uart0"), /* CTS */
-        DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */
-        DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
-        DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
-        /* Sleep state for UART0 */
-        DB8500_PIN_SLEEP("GPIO0_AJ5", slpm_in_wkup_pdis, "uart0"),
-        DB8500_PIN_SLEEP("GPIO1_AJ3", slpm_out_hi_wkup_pdis, "uart0"),
-        DB8500_PIN_SLEEP("GPIO2_AH4", slpm_in_wkup_pdis, "uart0"),
-        DB8500_PIN_SLEEP("GPIO3_AH3", slpm_out_wkup_pdis, "uart0"),
-        /* Mux in UART1 after initialization */
-        DB8500_MUX("u1rxtx_a_1", "u1", "uart1"),
-        DB8500_PIN("GPIO4_AH6", in_pu, "uart1"), /* RXD */
-        DB8500_PIN("GPIO5_AG6", out_hi, "uart1"), /* TXD */
-        /* Sleep state for UART1 */
-        DB8500_PIN_SLEEP("GPIO4_AH6", slpm_in_wkup_pdis, "uart1"),
-        DB8500_PIN_SLEEP("GPIO5_AG6", slpm_out_wkup_pdis, "uart1"),
-        /* MSP1 for ALSA codec */
-        DB8500_MUX_HOG("msp1txrx_a_1", "msp1"),
-        DB8500_MUX_HOG("msp1_a_1", "msp1"),
-        DB8500_PIN_HOG("GPIO33_AF2", out_lo_slpm_nowkup),
-        DB8500_PIN_HOG("GPIO34_AE1", in_nopull_slpm_nowkup),
-        DB8500_PIN_HOG("GPIO35_AE2", in_nopull_slpm_nowkup),
-        DB8500_PIN_HOG("GPIO36_AG2", in_nopull_slpm_nowkup),
-        /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
-        DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
-        DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
-        /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */
-        DB8500_MUX("lcdvsi1_a_1", "lcd", "0-0070"),
-        DB8500_PIN("GPIO69_E2", in_pu, "0-0070"),
-        /* LCD VSI1 sleep state */
-        DB8500_PIN_SLEEP("GPIO69_E2", slpm_in_wkup_pdis, "0-0070"),
-        /* Mux in i2c0 block, default state */
-        DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),
-        /* i2c0 sleep state */
-        DB8500_PIN_SLEEP("GPIO147_C15", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SDA */
-        DB8500_PIN_SLEEP("GPIO148_B16", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SCL */
-        /* Mux in i2c1 block, default state  */
-        DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"),
-        /* i2c1 sleep state */
-        DB8500_PIN_SLEEP("GPIO16_AD3", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SDA */
-        DB8500_PIN_SLEEP("GPIO17_AD4", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SCL */
-        /* Mux in i2c2 block, default state  */
-        DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"),
-        /* i2c2 sleep state */
-        DB8500_PIN_SLEEP("GPIO10_AF5", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SDA */
-        DB8500_PIN_SLEEP("GPIO11_AG4", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SCL */
-        /* Mux in i2c3 block, default state  */
-        DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"),
-        /* i2c3 sleep state */
-        DB8500_PIN_SLEEP("GPIO229_AG7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SDA */
-        DB8500_PIN_SLEEP("GPIO230_AF7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SCL */
-        /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */
-        DB8500_MUX("mc0_a_1", "mc0", "sdi0"),
-        DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */
-        DB8500_PIN("GPIO19_AC1", out_hi, "sdi0"), /* DAT0DIR */
-        DB8500_PIN("GPIO20_AB4", out_hi, "sdi0"), /* DAT2DIR */
-        DB8500_PIN("GPIO22_AA3", in_nopull, "sdi0"), /* FBCLK */
-        DB8500_PIN("GPIO23_AA4", out_lo, "sdi0"), /* CLK */
-        DB8500_PIN("GPIO24_AB2", in_pu, "sdi0"), /* CMD */
-        DB8500_PIN("GPIO25_Y4", in_pu, "sdi0"), /* DAT0 */
-        DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
-        DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
-        DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
-        /* SDI0 sleep state */
-        DB8500_PIN_SLEEP("GPIO18_AC2", slpm_out_hi_wkup_pdis, "sdi0"),
-        DB8500_PIN_SLEEP("GPIO19_AC1", slpm_out_hi_wkup_pdis, "sdi0"),
-        DB8500_PIN_SLEEP("GPIO20_AB4", slpm_out_hi_wkup_pdis, "sdi0"),
-        DB8500_PIN_SLEEP("GPIO22_AA3", slpm_in_wkup_pdis, "sdi0"),
-        DB8500_PIN_SLEEP("GPIO23_AA4", slpm_out_lo_wkup_pdis, "sdi0"),
-        DB8500_PIN_SLEEP("GPIO24_AB2", slpm_in_wkup_pdis, "sdi0"),
-        DB8500_PIN_SLEEP("GPIO25_Y4", slpm_in_wkup_pdis, "sdi0"),
-        DB8500_PIN_SLEEP("GPIO26_Y2", slpm_in_wkup_pdis, "sdi0"),
-        DB8500_PIN_SLEEP("GPIO27_AA2", slpm_in_wkup_pdis, "sdi0"),
-        DB8500_PIN_SLEEP("GPIO28_AA1", slpm_in_wkup_pdis, "sdi0"),
-
-        /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
-        DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
-        DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
-        DB8500_PIN("GPIO209_AG15", in_nopull, "sdi1"), /* FBCLK */
-        DB8500_PIN("GPIO210_AJ15", in_pu, "sdi1"), /* CMD */
-        DB8500_PIN("GPIO211_AG14", in_pu, "sdi1"), /* DAT0 */
-        DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
-        DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
-        DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
-        /* SDI1 sleep state */
-        DB8500_PIN_SLEEP("GPIO208_AH16", slpm_out_lo_wkup_pdis, "sdi1"), /* CLK */
-        DB8500_PIN_SLEEP("GPIO209_AG15", slpm_in_wkup_pdis, "sdi1"), /* FBCLK */
-        DB8500_PIN_SLEEP("GPIO210_AJ15", slpm_in_wkup_pdis, "sdi1"), /* CMD */
-        DB8500_PIN_SLEEP("GPIO211_AG14", slpm_in_wkup_pdis, "sdi1"), /* DAT0 */
-        DB8500_PIN_SLEEP("GPIO212_AF13", slpm_in_wkup_pdis, "sdi1"), /* DAT1 */
-        DB8500_PIN_SLEEP("GPIO213_AG13", slpm_in_wkup_pdis, "sdi1"), /* DAT2 */
-        DB8500_PIN_SLEEP("GPIO214_AH15", slpm_in_wkup_pdis, "sdi1"), /* DAT3 */
-
-        /* Mux in SDI2 (here called MC2) used for for PoP eMMC */
-        DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
-        DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
-        DB8500_PIN("GPIO129_B4", in_pu, "sdi2"), /* CMD */
-        DB8500_PIN("GPIO130_C8", in_nopull, "sdi2"), /* FBCLK */
-        DB8500_PIN("GPIO131_A12", in_pu, "sdi2"), /* DAT0 */
-        DB8500_PIN("GPIO132_C10", in_pu, "sdi2"), /* DAT1 */
-        DB8500_PIN("GPIO133_B10", in_pu, "sdi2"), /* DAT2 */
-        DB8500_PIN("GPIO134_B9", in_pu, "sdi2"), /* DAT3 */
-        DB8500_PIN("GPIO135_A9", in_pu, "sdi2"), /* DAT4 */
-        DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
-        DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
-        DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
-        /* SDI2 sleep state */
-        DB8500_PIN_SLEEP("GPIO128_A5", out_lo_wkup_pdis, "sdi2"), /* CLK */
-        DB8500_PIN_SLEEP("GPIO129_B4", in_wkup_pdis_en, "sdi2"), /* CMD */
-        DB8500_PIN_SLEEP("GPIO130_C8", in_wkup_pdis_en, "sdi2"), /* FBCLK */
-        DB8500_PIN_SLEEP("GPIO131_A12", in_wkup_pdis, "sdi2"), /* DAT0 */
-        DB8500_PIN_SLEEP("GPIO132_C10", in_wkup_pdis, "sdi2"), /* DAT1 */
-        DB8500_PIN_SLEEP("GPIO133_B10", in_wkup_pdis, "sdi2"), /* DAT2 */
-        DB8500_PIN_SLEEP("GPIO134_B9", in_wkup_pdis, "sdi2"), /* DAT3 */
-        DB8500_PIN_SLEEP("GPIO135_A9", in_wkup_pdis, "sdi2"), /* DAT4 */
-        DB8500_PIN_SLEEP("GPIO136_C7", in_wkup_pdis, "sdi2"), /* DAT5 */
-        DB8500_PIN_SLEEP("GPIO137_A7", in_wkup_pdis, "sdi2"), /* DAT6 */
-        DB8500_PIN_SLEEP("GPIO138_C5", in_wkup_pdis, "sdi2"), /* DAT7 */
-
-        /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
-        DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
-        DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
-        DB8500_PIN("GPIO198_AG25", in_pu, "sdi4"), /* DAT2 */
-        DB8500_PIN("GPIO199_AH23", in_pu, "sdi4"), /* DAT1 */
-        DB8500_PIN("GPIO200_AH26", in_pu, "sdi4"), /* DAT0 */
-        DB8500_PIN("GPIO201_AF24", in_pu, "sdi4"), /* CMD */
-        DB8500_PIN("GPIO202_AF25", in_nopull, "sdi4"), /* FBCLK */
-        DB8500_PIN("GPIO203_AE23", out_lo, "sdi4"), /* CLK */
-        DB8500_PIN("GPIO204_AF23", in_pu, "sdi4"), /* DAT7 */
-        DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
-        DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
-        DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
-        /*SDI4 sleep state */
-        DB8500_PIN_SLEEP("GPIO197_AH24", slpm_in_wkup_pdis, "sdi4"), /* DAT3 */
-        DB8500_PIN_SLEEP("GPIO198_AG25", slpm_in_wkup_pdis, "sdi4"), /* DAT2 */
-        DB8500_PIN_SLEEP("GPIO199_AH23", slpm_in_wkup_pdis, "sdi4"), /* DAT1 */
-        DB8500_PIN_SLEEP("GPIO200_AH26", slpm_in_wkup_pdis, "sdi4"), /* DAT0 */
-        DB8500_PIN_SLEEP("GPIO201_AF24", slpm_in_wkup_pdis, "sdi4"), /* CMD */
-        DB8500_PIN_SLEEP("GPIO202_AF25", slpm_in_wkup_pdis, "sdi4"), /* FBCLK */
-        DB8500_PIN_SLEEP("GPIO203_AE23", slpm_out_lo_wkup_pdis, "sdi4"), /* CLK */
-        DB8500_PIN_SLEEP("GPIO204_AF23", slpm_in_wkup_pdis, "sdi4"), /* DAT7 */
-        DB8500_PIN_SLEEP("GPIO205_AG23", slpm_in_wkup_pdis, "sdi4"), /* DAT6 */
-        DB8500_PIN_SLEEP("GPIO206_AG24", slpm_in_wkup_pdis, "sdi4"), /* DAT5 */
-        DB8500_PIN_SLEEP("GPIO207_AJ23", slpm_in_wkup_pdis, "sdi4"), /* DAT4 */
-
-        /* Mux in USB pins, drive STP high */
-        /* USB default state */
-        DB8500_MUX("usb_a_1", "usb", "ab8500-usb.0"),
-        DB8500_PIN("GPIO257_AE29", out_hi, "ab8500-usb.0"), /* STP */
-        /* USB sleep state */
-        DB8500_PIN_SLEEP("GPIO256_AF28", slpm_wkup_pdis_en, "ab8500-usb.0"), /* NXT */
-        DB8500_PIN_SLEEP("GPIO257_AE29", slpm_out_hi_wkup_pdis, "ab8500-usb.0"), /* STP */
-        DB8500_PIN_SLEEP("GPIO258_AD29", slpm_wkup_pdis_en, "ab8500-usb.0"), /* XCLK */
-        DB8500_PIN_SLEEP("GPIO259_AC29", slpm_wkup_pdis_en, "ab8500-usb.0"), /* DIR */
-        DB8500_PIN_SLEEP("GPIO260_AD28", slpm_in_wkup_pdis_en, "ab8500-usb.0"), /* DAT7 */
-        DB8500_PIN_SLEEP("GPIO261_AD26", slpm_in_wkup_pdis_en, "ab8500-usb.0"), /* DAT6 */
-        DB8500_PIN_SLEEP("GPIO262_AE26", slpm_in_wkup_pdis_en, "ab8500-usb.0"), /* DAT5 */
-        DB8500_PIN_SLEEP("GPIO263_AG29", slpm_in_wkup_pdis_en, "ab8500-usb.0"), /* DAT4 */
-        DB8500_PIN_SLEEP("GPIO264_AE27", slpm_in_wkup_pdis_en, "ab8500-usb.0"), /* DAT3 */
-        DB8500_PIN_SLEEP("GPIO265_AD27", slpm_in_wkup_pdis_en, "ab8500-usb.0"), /* DAT2 */
-        DB8500_PIN_SLEEP("GPIO266_AC28", slpm_in_wkup_pdis_en, "ab8500-usb.0"), /* DAT1 */
-        DB8500_PIN_SLEEP("GPIO267_AC27", slpm_in_wkup_pdis_en, "ab8500-usb.0"), /* DAT0 */
-
-        /* Mux in SPI2 pins on the "other C1" altfunction */
-        DB8500_MUX("spi2_oc1_2", "spi2", "spi2"),
-        DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */
-        DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
-        DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
-        DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
-        /* SPI2 idle state */
-        DB8500_PIN_IDLE("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
-        DB8500_PIN_IDLE("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
-        DB8500_PIN_IDLE("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
-        /* SPI2 sleep state */
-        DB8500_PIN_SLEEP("GPIO216_AG12", slpm_in_wkup_pdis, "spi2"), /* FRM */
-        DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
-        DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
-        DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
-
-        /* ske default state */
-        DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"),
-        DB8500_PIN("GPIO153_B17", in_pd, "nmk-ske-keypad"), /* I7 */
-        DB8500_PIN("GPIO154_C16", in_pd, "nmk-ske-keypad"), /* I6 */
-        DB8500_PIN("GPIO155_C19", in_pd, "nmk-ske-keypad"), /* I5 */
-        DB8500_PIN("GPIO156_C17", in_pd, "nmk-ske-keypad"), /* I4 */
-        DB8500_PIN("GPIO161_D21", in_pd, "nmk-ske-keypad"), /* I3 */
-        DB8500_PIN("GPIO162_D20", in_pd, "nmk-ske-keypad"), /* I2 */
-        DB8500_PIN("GPIO163_C20", in_pd, "nmk-ske-keypad"), /* I1 */
-        DB8500_PIN("GPIO164_B21", in_pd, "nmk-ske-keypad"), /* I0 */
-        DB8500_PIN("GPIO157_A18", out_lo, "nmk-ske-keypad"), /* O7 */
-        DB8500_PIN("GPIO158_C18", out_lo, "nmk-ske-keypad"), /* O6 */
-        DB8500_PIN("GPIO159_B19", out_lo, "nmk-ske-keypad"), /* O5 */
-        DB8500_PIN("GPIO160_B20", out_lo, "nmk-ske-keypad"), /* O4 */
-        DB8500_PIN("GPIO165_C21", out_lo, "nmk-ske-keypad"), /* O3 */
-        DB8500_PIN("GPIO166_A22", out_lo, "nmk-ske-keypad"), /* O2 */
-        DB8500_PIN("GPIO167_B24", out_lo, "nmk-ske-keypad"), /* O1 */
-        DB8500_PIN("GPIO168_C22", out_lo, "nmk-ske-keypad"), /* O0 */
-        /* ske sleep state */
-        DB8500_PIN_SLEEP("GPIO153_B17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I7 */
-        DB8500_PIN_SLEEP("GPIO154_C16", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I6 */
-        DB8500_PIN_SLEEP("GPIO155_C19", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I5 */
-        DB8500_PIN_SLEEP("GPIO156_C17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I4 */
-        DB8500_PIN_SLEEP("GPIO161_D21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I3 */
-        DB8500_PIN_SLEEP("GPIO162_D20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I2 */
-        DB8500_PIN_SLEEP("GPIO163_C20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I1 */
-        DB8500_PIN_SLEEP("GPIO164_B21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I0 */
-        DB8500_PIN_SLEEP("GPIO157_A18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O7 */
-        DB8500_PIN_SLEEP("GPIO158_C18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O6 */
-        DB8500_PIN_SLEEP("GPIO159_B19", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O5 */
-        DB8500_PIN_SLEEP("GPIO160_B20", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O4 */
-        DB8500_PIN_SLEEP("GPIO165_C21", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O3 */
-        DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */
-        DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */
-        DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */
-
-        /* STM APE pins states */
-        DB8500_MUX_STATE("stmape_c_1", "stmape",
-                "stm", "ape_mipi34"),
-        DB8500_PIN_STATE("GPIO70_G5", in_nopull,
-                "stm", "ape_mipi34"), /* clk */
-        DB8500_PIN_STATE("GPIO71_G4", in_nopull,
-                "stm", "ape_mipi34"), /* dat3 */
-        DB8500_PIN_STATE("GPIO72_H4", in_nopull,
-                "stm", "ape_mipi34"), /* dat2 */
-        DB8500_PIN_STATE("GPIO73_H3", in_nopull,
-                "stm", "ape_mipi34"), /* dat1 */
-        DB8500_PIN_STATE("GPIO74_J3", in_nopull,
-                "stm", "ape_mipi34"), /* dat0 */
-
-        DB8500_PIN_STATE("GPIO70_G5", slpm_out_lo_pdis,
-                "stm", "ape_mipi34_sleep"), /* clk */
-        DB8500_PIN_STATE("GPIO71_G4", slpm_out_lo_pdis,
-                "stm", "ape_mipi34_sleep"), /* dat3 */
-        DB8500_PIN_STATE("GPIO72_H4", slpm_out_lo_pdis,
-                "stm", "ape_mipi34_sleep"), /* dat2 */
-        DB8500_PIN_STATE("GPIO73_H3", slpm_out_lo_pdis,
-                "stm", "ape_mipi34_sleep"), /* dat1 */
-        DB8500_PIN_STATE("GPIO74_J3", slpm_out_lo_pdis,
-                "stm", "ape_mipi34_sleep"), /* dat0 */
-
-        DB8500_MUX_STATE("stmape_oc1_1", "stmape",
-                "stm", "ape_microsd"),
-        DB8500_PIN_STATE("GPIO23_AA4", in_nopull,
-                "stm", "ape_microsd"), /* clk */
-        DB8500_PIN_STATE("GPIO25_Y4", in_nopull,
-                "stm", "ape_microsd"), /* dat0 */
-        DB8500_PIN_STATE("GPIO26_Y2", in_nopull,
-                "stm", "ape_microsd"), /* dat1 */
-        DB8500_PIN_STATE("GPIO27_AA2", in_nopull,
-                "stm", "ape_microsd"), /* dat2 */
-        DB8500_PIN_STATE("GPIO28_AA1", in_nopull,
-                "stm", "ape_microsd"), /* dat3 */
-
-        DB8500_PIN_STATE("GPIO23_AA4", slpm_out_lo_wkup_pdis,
-                "stm", "ape_microsd_sleep"), /* clk */
-        DB8500_PIN_STATE("GPIO25_Y4", slpm_in_wkup_pdis,
-                "stm", "ape_microsd_sleep"), /* dat0 */
-        DB8500_PIN_STATE("GPIO26_Y2", slpm_in_wkup_pdis,
-                "stm", "ape_microsd_sleep"), /* dat1 */
-        DB8500_PIN_STATE("GPIO27_AA2", slpm_in_wkup_pdis,
-                "stm", "ape_microsd_sleep"), /* dat2 */
-        DB8500_PIN_STATE("GPIO28_AA1", slpm_in_wkup_pdis,
-                "stm", "ape_microsd_sleep"), /* dat3 */
-
-        /*  STM Modem pins states */
-        DB8500_MUX_STATE("stmmod_oc3_2", "stmmod",
-                "stm", "mod_mipi34"),
-        DB8500_MUX_STATE("uartmodrx_oc3_1", "uartmod",
-                "stm", "mod_mipi34"),
-        DB8500_MUX_STATE("uartmodtx_oc3_1", "uartmod",
-                "stm", "mod_mipi34"),
-        DB8500_PIN_STATE("GPIO70_G5", in_nopull,
-                "stm", "mod_mipi34"), /* clk */
-        DB8500_PIN_STATE("GPIO71_G4", in_nopull,
-                "stm", "mod_mipi34"), /* dat3 */
-        DB8500_PIN_STATE("GPIO72_H4", in_nopull,
-                "stm", "mod_mipi34"), /* dat2 */
-        DB8500_PIN_STATE("GPIO73_H3", in_nopull,
-                "stm", "mod_mipi34"), /* dat1 */
-        DB8500_PIN_STATE("GPIO74_J3", in_nopull,
-                "stm", "mod_mipi34"), /* dat0 */
-        DB8500_PIN_STATE("GPIO75_H2", in_pu,
-                "stm", "mod_mipi34"), /* uartmod rx */
-        DB8500_PIN_STATE("GPIO76_J2", out_lo,
-                "stm", "mod_mipi34"), /* uartmod tx */
-
-        DB8500_PIN_STATE("GPIO70_G5", slpm_out_lo_pdis,
-                "stm", "mod_mipi34_sleep"), /* clk */
-        DB8500_PIN_STATE("GPIO71_G4", slpm_out_lo_pdis,
-                "stm", "mod_mipi34_sleep"), /* dat3 */
-        DB8500_PIN_STATE("GPIO72_H4", slpm_out_lo_pdis,
-                "stm", "mod_mipi34_sleep"), /* dat2 */
-        DB8500_PIN_STATE("GPIO73_H3", slpm_out_lo_pdis,
-                "stm", "mod_mipi34_sleep"), /* dat1 */
-        DB8500_PIN_STATE("GPIO74_J3", slpm_out_lo_pdis,
-                "stm", "mod_mipi34_sleep"), /* dat0 */
-        DB8500_PIN_STATE("GPIO75_H2", slpm_in_wkup_pdis,
-                "stm", "mod_mipi34_sleep"), /* uartmod rx */
-        DB8500_PIN_STATE("GPIO76_J2", slpm_out_lo_wkup_pdis,
-                "stm", "mod_mipi34_sleep"), /* uartmod tx */
-
-        DB8500_MUX_STATE("stmmod_b_1", "stmmod",
-                "stm", "mod_microsd"),
-        DB8500_MUX_STATE("uartmodrx_oc3_1", "uartmod",
-                "stm", "mod_microsd"),
-        DB8500_MUX_STATE("uartmodtx_oc3_1", "uartmod",
-                "stm", "mod_microsd"),
-        DB8500_PIN_STATE("GPIO23_AA4", in_nopull,
-                "stm", "mod_microsd"), /* clk */
-        DB8500_PIN_STATE("GPIO25_Y4", in_nopull,
-                "stm", "mod_microsd"), /* dat0 */
-        DB8500_PIN_STATE("GPIO26_Y2", in_nopull,
-                "stm", "mod_microsd"), /* dat1 */
-        DB8500_PIN_STATE("GPIO27_AA2", in_nopull,
-                "stm", "mod_microsd"), /* dat2 */
-        DB8500_PIN_STATE("GPIO28_AA1", in_nopull,
-                "stm", "mod_microsd"), /* dat3 */
-        DB8500_PIN_STATE("GPIO75_H2", in_pu,
-                "stm", "mod_microsd"), /* uartmod rx */
-        DB8500_PIN_STATE("GPIO76_J2", out_lo,
-                "stm", "mod_microsd"), /* uartmod tx */
-
-        DB8500_PIN_STATE("GPIO23_AA4", slpm_out_lo_wkup_pdis,
-                "stm", "mod_microsd_sleep"), /* clk */
-        DB8500_PIN_STATE("GPIO25_Y4", slpm_in_wkup_pdis,
-                "stm", "mod_microsd_sleep"), /* dat0 */
-        DB8500_PIN_STATE("GPIO26_Y2", slpm_in_wkup_pdis,
-                "stm", "mod_microsd_sleep"), /* dat1 */
-        DB8500_PIN_STATE("GPIO27_AA2", slpm_in_wkup_pdis,
-                "stm", "mod_microsd_sleep"), /* dat2 */
-        DB8500_PIN_STATE("GPIO28_AA1", slpm_in_wkup_pdis,
-                "stm", "mod_microsd_sleep"), /* dat3 */
-        DB8500_PIN_STATE("GPIO75_H2", slpm_in_wkup_pdis,
-                "stm", "mod_microsd_sleep"), /* uartmod rx */
-        DB8500_PIN_STATE("GPIO76_J2", slpm_out_lo_wkup_pdis,
-                "stm", "mod_microsd_sleep"), /* uartmod tx */
-
-        /*  STM dual Modem/APE pins state */
-        DB8500_MUX_STATE("stmmod_oc3_2", "stmmod",
-                "stm", "mod_mipi34_ape_mipi60"),
-        DB8500_MUX_STATE("stmape_c_2", "stmape",
-                "stm", "mod_mipi34_ape_mipi60"),
-        DB8500_MUX_STATE("uartmodrx_oc3_1", "uartmod",
-                "stm", "mod_mipi34_ape_mipi60"),
-        DB8500_MUX_STATE("uartmodtx_oc3_1", "uartmod",
-                "stm", "mod_mipi34_ape_mipi60"),
-        DB8500_PIN_STATE("GPIO70_G5", in_nopull,
-                "stm", "mod_mipi34_ape_mipi60"), /* clk */
-        DB8500_PIN_STATE("GPIO71_G4", in_nopull,
-                "stm", "mod_mipi34_ape_mipi60"), /* dat3 */
-        DB8500_PIN_STATE("GPIO72_H4", in_nopull,
-                "stm", "mod_mipi34_ape_mipi60"), /* dat2 */
-        DB8500_PIN_STATE("GPIO73_H3", in_nopull,
-                "stm", "mod_mipi34_ape_mipi60"), /* dat1 */
-        DB8500_PIN_STATE("GPIO74_J3", in_nopull,
-                "stm", "mod_mipi34_ape_mipi60"), /* dat0 */
-        DB8500_PIN_STATE("GPIO75_H2", in_pu,
-                "stm", "mod_mipi34_ape_mipi60"), /* uartmod rx */
-        DB8500_PIN_STATE("GPIO76_J2", out_lo,
-                "stm", "mod_mipi34_ape_mipi60"), /* uartmod tx */
-        DB8500_PIN_STATE("GPIO155_C19", in_nopull,
-                "stm", "mod_mipi34_ape_mipi60"), /* clk */
-        DB8500_PIN_STATE("GPIO156_C17", in_nopull,
-                "stm", "mod_mipi34_ape_mipi60"), /* dat3 */
-        DB8500_PIN_STATE("GPIO157_A18", in_nopull,
-                "stm", "mod_mipi34_ape_mipi60"), /* dat2 */
-        DB8500_PIN_STATE("GPIO158_C18", in_nopull,
-                "stm", "mod_mipi34_ape_mipi60"), /* dat1 */
-        DB8500_PIN_STATE("GPIO159_B19", in_nopull,
-                "stm", "mod_mipi34_ape_mipi60"), /* dat0 */
-
-        DB8500_PIN_STATE("GPIO70_G5", slpm_out_lo_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* clk */
-        DB8500_PIN_STATE("GPIO71_G4", slpm_out_lo_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat3 */
-        DB8500_PIN_STATE("GPIO72_H4", slpm_out_lo_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat2 */
-        DB8500_PIN_STATE("GPIO73_H3", slpm_out_lo_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat1 */
-        DB8500_PIN_STATE("GPIO74_J3", slpm_out_lo_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat0 */
-        DB8500_PIN_STATE("GPIO75_H2", slpm_in_wkup_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* uartmod rx */
-        DB8500_PIN_STATE("GPIO76_J2", slpm_out_lo_wkup_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* uartmod tx */
-        DB8500_PIN_STATE("GPIO155_C19", slpm_in_wkup_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* clk */
-        DB8500_PIN_STATE("GPIO156_C17", slpm_in_wkup_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat3 */
-        DB8500_PIN_STATE("GPIO157_A18", slpm_in_wkup_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat2 */
-        DB8500_PIN_STATE("GPIO158_C18", slpm_in_wkup_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat1 */
-        DB8500_PIN_STATE("GPIO159_B19", slpm_in_wkup_pdis,
-                "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat0 */
-};
-
-/*
- * These are specifically for the MOP500 and HREFP (pre-v60) version of the
- * board, which utilized a TC35892 GPIO expander instead of using a lot of
- * on-chip pins as the HREFv60 and later does.
- */
-static struct pinctrl_map __initdata mop500_pinmap[] = {
-        /* Mux in SSP0, pull down RXD pin */
-        DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
-        DB8500_PIN_HOG("GPIO145_C13", pd),
-        /*
-         * XENON Flashgun on image processor GPIO (controlled from image
-         * processor firmware), mux in these image processor GPIO lines 0
-         * (XENON_FLASH_ID) and 1 (XENON_READY) on altfunction C and pull up
-         * the pins.
-         */
-        DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
-        DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
-        DB8500_PIN_HOG("GPIO6_AF6", in_pu),
-        DB8500_PIN_HOG("GPIO7_AG5", in_pu),
-        /* TC35892 IRQ, pull up the line, let the driver mux in the pin */
-        DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),
-        /* Mux in UART1 and set the pull-ups */
-        DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
-        DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */
-        DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */
-        /*
-         * Runtime stuff: make it possible to mux in the SKE keypad
-         * and bias the pins
-         */
-        /* ske default state */
-        DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"),
-        DB8500_PIN("GPIO153_B17", in_pu, "nmk-ske-keypad"), /* I7 */
-        DB8500_PIN("GPIO154_C16", in_pu, "nmk-ske-keypad"), /* I6 */
-        DB8500_PIN("GPIO155_C19", in_pu, "nmk-ske-keypad"), /* I5 */
-        DB8500_PIN("GPIO156_C17", in_pu, "nmk-ske-keypad"), /* I4 */
-        DB8500_PIN("GPIO161_D21", in_pu, "nmk-ske-keypad"), /* I3 */
-        DB8500_PIN("GPIO162_D20", in_pu, "nmk-ske-keypad"), /* I2 */
-        DB8500_PIN("GPIO163_C20", in_pu, "nmk-ske-keypad"), /* I1 */
-        DB8500_PIN("GPIO164_B21", in_pu, "nmk-ske-keypad"), /* I0 */
-        DB8500_PIN("GPIO157_A18", out_lo, "nmk-ske-keypad"), /* O7 */
-        DB8500_PIN("GPIO158_C18", out_lo, "nmk-ske-keypad"), /* O6 */
-        DB8500_PIN("GPIO159_B19", out_lo, "nmk-ske-keypad"), /* O5 */
-        DB8500_PIN("GPIO160_B20", out_lo, "nmk-ske-keypad"), /* O4 */
-        DB8500_PIN("GPIO165_C21", out_lo, "nmk-ske-keypad"), /* O3 */
-        DB8500_PIN("GPIO166_A22", out_lo, "nmk-ske-keypad"), /* O2 */
-        DB8500_PIN("GPIO167_B24", out_lo, "nmk-ske-keypad"), /* O1 */
-        DB8500_PIN("GPIO168_C22", out_lo, "nmk-ske-keypad"), /* O0 */
-        /* ske sleep state */
-        DB8500_PIN_SLEEP("GPIO153_B17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I7 */
-        DB8500_PIN_SLEEP("GPIO154_C16", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I6 */
-        DB8500_PIN_SLEEP("GPIO155_C19", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I5 */
-        DB8500_PIN_SLEEP("GPIO156_C17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I4 */
-        DB8500_PIN_SLEEP("GPIO161_D21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I3 */
-        DB8500_PIN_SLEEP("GPIO162_D20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I2 */
-        DB8500_PIN_SLEEP("GPIO163_C20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I1 */
-        DB8500_PIN_SLEEP("GPIO164_B21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I0 */
-        DB8500_PIN_SLEEP("GPIO157_A18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O7 */
-        DB8500_PIN_SLEEP("GPIO158_C18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O6 */
-        DB8500_PIN_SLEEP("GPIO159_B19", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O5 */
-        DB8500_PIN_SLEEP("GPIO160_B20", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O4 */
-        DB8500_PIN_SLEEP("GPIO165_C21", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O3 */
-        DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */
-        DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */
-        DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */
-
-        /* Mux in and drive the SDI0 DAT31DIR line high at runtime */
-        DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),
-        DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),
-};
-
-/*
- * The HREFv60 series of platforms is using available pins on the DB8500
- * insteaf of the Toshiba I2C GPIO expander, reusing some pins like the SSP0
- * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.
- */
-static struct pinctrl_map __initdata hrefv60_pinmap[] = {
-        /* Drive WLAN_ENA low */
-        DB8500_PIN_HOG("GPIO85_D5", gpio_out_lo), /* WLAN_ENA */
-        /*
-         * XENON Flashgun on image processor GPIO (controlled from image
-         * processor firmware), mux in these image processor GPIO lines 0
-         * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
-         * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
-         * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
-         */
-        DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
-        DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
-        DB8500_MUX_HOG("ipgpio4_c_1", "ipgpio"),
-        DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* XENON_FLASH_ID */
-        DB8500_PIN_HOG("GPIO7_AG5", in_pu), /* XENON_READY */
-        DB8500_PIN_HOG("GPIO21_AB3", gpio_out_lo), /* XENON_EN1 */
-        DB8500_PIN_HOG("GPIO64_F3", out_lo), /* XENON_EN2 */
-        /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
-        DB8500_PIN_HOG("GPIO31_V3", gpio_in_pu), /* EN1 */
-        DB8500_PIN_HOG("GPIO32_V2", gpio_in_pd), /* DRDY */
-        /*
-         * Display Interface 1 uses GPIO 65 for RST (reset).
-         * Display Interface 2 uses GPIO 66 for RST (reset).
-         * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
-         */
-        DB8500_PIN_HOG("GPIO65_F1", gpio_out_hi), /* DISP1 NO RST */
-        DB8500_PIN_HOG("GPIO66_G3", gpio_out_lo), /* DISP2 RST */
-        /*
-         * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
-         * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
-         * reset signals low.
-         */
-        DB8500_PIN_HOG("GPIO143_D12", gpio_out_lo), /* TOUCH_RST1 */
-        DB8500_PIN_HOG("GPIO67_G2", gpio_in_pu), /* TOUCH_INT2 */
-        DB8500_PIN_HOG("GPIO146_D13", gpio_out_lo), /* TOUCH_RST2 */
-        /*
-         * Drive D19-D23 for the ETM PTM trace interface low,
-         * (presumably pins are unconnected therefore grounded here,
-         * the "other alt C1" setting enables these pins)
-         */
-        DB8500_PIN_HOG("GPIO70_G5", gpio_out_lo),
-        DB8500_PIN_HOG("GPIO71_G4", gpio_out_lo),
-        DB8500_PIN_HOG("GPIO72_H4", gpio_out_lo),
-        DB8500_PIN_HOG("GPIO73_H3", gpio_out_lo),
-        DB8500_PIN_HOG("GPIO74_J3", gpio_out_lo),
-        /* NAHJ CTRL on GPIO 76 to low, CTRL_INV on GPIO216 to high */
-        DB8500_PIN_HOG("GPIO76_J2", gpio_out_lo), /* CTRL */
-        DB8500_PIN_HOG("GPIO216_AG12", gpio_out_hi), /* CTRL_INV */
-        /* NFC ENA and RESET to low, pulldown IRQ line */
-        DB8500_PIN_HOG("GPIO77_H1", gpio_out_lo), /* NFC_ENA */
-        DB8500_PIN_HOG("GPIO144_B13", gpio_in_pd), /* NFC_IRQ */
-        DB8500_PIN_HOG("GPIO142_C11", gpio_out_lo), /* NFC_RESET */
-        /*
-         * SKE keyboard partly on alt A and partly on "Other alt C1"
-         * Driver KP_O1,2,3,6,7 low and pull up KP_I 0,2,3 for three
-         * rows of 6 keys, then pull up force sensing interrup and
-         * drive reset and force sensing WU low.
-         */
-        DB8500_MUX_HOG("kp_a_1", "kp"),
-        DB8500_MUX_HOG("kp_oc1_1", "kp"),
-        DB8500_PIN_HOG("GPIO90_A3", out_lo), /* KP_O1 */
-        DB8500_PIN_HOG("GPIO87_B3", out_lo), /* KP_O2 */
-        DB8500_PIN_HOG("GPIO86_C6", out_lo), /* KP_O3 */
-        DB8500_PIN_HOG("GPIO96_D8", out_lo), /* KP_O6 */
-        DB8500_PIN_HOG("GPIO94_D7", out_lo), /* KP_O7 */
-        DB8500_PIN_HOG("GPIO93_B7", in_pu), /* KP_I0 */
-        DB8500_PIN_HOG("GPIO89_E6", in_pu), /* KP_I2 */
-        DB8500_PIN_HOG("GPIO88_C4", in_pu), /* KP_I3 */
-        DB8500_PIN_HOG("GPIO91_B6", gpio_in_pu), /* FORCE_SENSING_INT */
-        DB8500_PIN_HOG("GPIO92_D6", gpio_out_lo), /* FORCE_SENSING_RST */
-        DB8500_PIN_HOG("GPIO97_D9", gpio_out_lo), /* FORCE_SENSING_WU */
-        /* DiPro Sensor interrupt */
-        DB8500_PIN_HOG("GPIO139_C9", gpio_in_pu), /* DIPRO_INT */
-        /* Audio Amplifier HF enable */
-        DB8500_PIN_HOG("GPIO149_B14", gpio_out_hi), /* VAUDIO_HF_EN, enable MAX8968 */
-        /* GBF interface, pull low to reset state */
-        DB8500_PIN_HOG("GPIO171_D23", gpio_out_lo), /* GBF_ENA_RESET */
-        /* MSP : HDTV INTERFACE GPIO line */
-        DB8500_PIN_HOG("GPIO192_AJ27", gpio_in_pd),
-        /* Accelerometer interrupt lines */
-        DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */
-        DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
-        /* SD card detect GPIO pin */
-        DB8500_PIN_HOG("GPIO95_E8", gpio_in_pu),
-        /*
-         * Runtime stuff
-         * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor
-         * etc.
-         */
-        DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
-        DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"),
-        DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
-};
-
-static struct pinctrl_map __initdata u9500_pinmap[] = {
-        /* Mux in UART1 (just RX/TX) and set the pull-ups */
-        DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
-        DB8500_PIN_HOG("GPIO4_AH6", in_pu),
-        DB8500_PIN_HOG("GPIO5_AG6", out_hi),
-        /* WLAN_IRQ line */
-        DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),
-        /* HSI */
-        DB8500_MUX_HOG("hsir_a_1", "hsi"),
-        DB8500_MUX_HOG("hsit_a_2", "hsi"),
-        DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */
-        DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */
-        DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */
-        DB8500_PIN_HOG("GPIO222_AJ9", out_lo), /* TX FLA0 */
-        DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */
-        DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */
-        DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */
-        DB8500_PIN_HOG("GPIO226_AF8", gpio_out_hi), /* ACWAKE0 */
-};
-
-static struct pinctrl_map __initdata u8500_pinmap[] = {
-        DB8500_PIN_HOG("GPIO226_AF8", gpio_out_lo), /* WLAN_PMU_EN */
-        DB8500_PIN_HOG("GPIO4_AH6", gpio_in_pu), /* WLAN_IRQ */
-};
-
-static struct pinctrl_map __initdata snowball_pinmap[] = {
-        /* Mux in SSP0 connected to AB8500, pull down RXD pin */
-        DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
-        DB8500_PIN_HOG("GPIO145_C13", pd),
-        /* Always drive the MC0 DAT31DIR line high on these boards */
-        DB8500_PIN_HOG("GPIO21_AB3", out_hi),
-        /* Mux in "SM" which is used for the SMSC911x Ethernet adapter */
-        DB8500_MUX_HOG("sm_b_1", "sm"),
-        /* User LED */
-        DB8500_PIN_HOG("GPIO142_C11", gpio_out_hi),
-        /* Drive RSTn_LAN high */
-        DB8500_PIN_HOG("GPIO141_C12", gpio_out_hi),
-        /*  Accelerometer/Magnetometer */
-        DB8500_PIN_HOG("GPIO163_C20", gpio_in_pu), /* ACCEL_IRQ1 */
-        DB8500_PIN_HOG("GPIO164_B21", gpio_in_pu), /* ACCEL_IRQ2 */
-        DB8500_PIN_HOG("GPIO165_C21", gpio_in_pu), /* MAG_DRDY */
-        /* WLAN/GBF */
-        DB8500_PIN_HOG("GPIO161_D21", gpio_out_lo), /* WLAN_PMU_EN */
-        DB8500_PIN_HOG("GPIO171_D23", gpio_out_hi), /* GBF_ENA */
-        DB8500_PIN_HOG("GPIO215_AH13", gpio_out_lo), /* WLAN_ENA */
-        DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */
-};
-
-/*
- * passing "pinsfor=" in kernel cmdline allows for custom
- * configuration of GPIOs on u8500 derived boards.
- */
-static int __init early_pinsfor(char *p)
-{
-        pinsfor = PINS_FOR_DEFAULT;
-
-        if (strcmp(p, "u9500-21") == 0)
-                pinsfor = PINS_FOR_U9500;
-
-        return 0;
-}
-early_param("pinsfor", early_pinsfor);
-
-int pins_for_u9500(void)
-{
-        if (pinsfor == PINS_FOR_U9500)
-                return 1;
-
-        return 0;
-}
-
-static void __init mop500_href_family_pinmaps_init(void)
-{
-        switch (pinsfor) {
-        case PINS_FOR_U9500:
-                pinctrl_register_mappings(u9500_pinmap,
-                                          ARRAY_SIZE(u9500_pinmap));
-                break;
-        case PINS_FOR_DEFAULT:
-                pinctrl_register_mappings(u8500_pinmap,
-                                          ARRAY_SIZE(u8500_pinmap));
-        default:
-                break;
-        }
-}
-
 void __init mop500_pinmaps_init(void)
 {
-        pinctrl_register_mappings(mop500_family_pinmap,
-                                  ARRAY_SIZE(mop500_family_pinmap));
-        pinctrl_register_mappings(mop500_pinmap,
-                                  ARRAY_SIZE(mop500_pinmap));
-        mop500_href_family_pinmaps_init();
         if (machine_is_u8520())
                 pinctrl_register_mappings(ab8505_pinmap,
                                           ARRAY_SIZE(ab8505_pinmap));
@@ -1073,23 +280,12 @@ void __init mop500_pinmaps_init(void)
 
 void __init snowball_pinmaps_init(void)
 {
-        pinctrl_register_mappings(mop500_family_pinmap,
-                                  ARRAY_SIZE(mop500_family_pinmap));
-        pinctrl_register_mappings(snowball_pinmap,
-                                  ARRAY_SIZE(snowball_pinmap));
-        pinctrl_register_mappings(u8500_pinmap,
-                                  ARRAY_SIZE(u8500_pinmap));
         pinctrl_register_mappings(ab8500_pinmap,
                                   ARRAY_SIZE(ab8500_pinmap));
 }
 
 void __init hrefv60_pinmaps_init(void)
 {
-        pinctrl_register_mappings(mop500_family_pinmap,
-                                  ARRAY_SIZE(mop500_family_pinmap));
-        pinctrl_register_mappings(hrefv60_pinmap,
-                                  ARRAY_SIZE(hrefv60_pinmap));
-        mop500_href_family_pinmaps_init();
         pinctrl_register_mappings(ab8500_pinmap,
                                   ARRAY_SIZE(ab8500_pinmap));
 }
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 26600a1c5319..fcbf3a13a539 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -14,10 +14,8 @@
 #include <linux/platform_data/dma-ste-dma40.h>
 
 #include <asm/mach-types.h>
-#include "devices.h"
 
 #include "db8500-regs.h"
-#include "devices-db8500.h"
 #include "board-mop500.h"
 #include "ste-dma40-db8500.h"
 
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
deleted file mode 100644
index 514d40b625a4..000000000000
--- a/arch/arm/mach-ux500/board-mop500.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (C) 2008-2012 ST-Ericsson
- *
- * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2, as
- * published by the Free Software Foundation.
- *
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/platform_data/db8500_thermal.h>
-#include <linux/amba/bus.h>
-#include <linux/amba/pl022.h>
-#include <linux/mfd/abx500/ab8500.h>
-#include <linux/regulator/ab8500.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/driver.h>
-#include <linux/mfd/tps6105x.h>
-#include <linux/platform_data/leds-lp55xx.h>
-#include <linux/input.h>
-#include <linux/delay.h>
-#include <linux/leds.h>
-#include <linux/pinctrl/consumer.h>
-#include <linux/platform_data/pinctrl-nomadik.h>
-#include <linux/platform_data/dma-ste-dma40.h>
-
-#include <asm/mach-types.h>
-
-#include "setup.h"
-#include "devices.h"
-#include "irqs.h"
-
-#include "ste-dma40-db8500.h"
-#include "db8500-regs.h"
-#include "devices-db8500.h"
-#include "board-mop500.h"
-#include "board-mop500-regulators.h"
-
-struct ab8500_platform_data ab8500_platdata = {
-        .irq_base       = MOP500_AB8500_IRQ_BASE,
-        .regulator      = &ab8500_regulator_plat_data,
-};
-
-#ifdef CONFIG_STE_DMA40
-static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
-        .mode = STEDMA40_MODE_LOGICAL,
-        .dir = DMA_DEV_TO_MEM,
-        .dev_type = DB8500_DMA_DEV8_SSP0,
-};
-
-static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
-        .mode = STEDMA40_MODE_LOGICAL,
-        .dir = DMA_MEM_TO_DEV,
-        .dev_type = DB8500_DMA_DEV8_SSP0,
-};
-#endif
-
-struct pl022_ssp_controller ssp0_plat = {
-        .bus_id = 0,
-#ifdef CONFIG_STE_DMA40
-        .enable_dma = 1,
-        .dma_filter = stedma40_filter,
-        .dma_rx_param = &ssp0_dma_cfg_rx,
-        .dma_tx_param = &ssp0_dma_cfg_tx,
-#else
-        .enable_dma = 0,
-#endif
-        /* on this platform, gpio 31,142,144,214 &
-         * 224 are connected as chip selects
-         */
-        .num_chipselect = 5,
-};
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index 511d6febbe99..d48e8662c676 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -87,7 +87,6 @@ extern struct msp_i2s_platform_data msp0_platform_data;
 extern struct msp_i2s_platform_data msp1_platform_data;
 extern struct msp_i2s_platform_data msp2_platform_data;
 extern struct msp_i2s_platform_data msp3_platform_data;
-extern struct pl022_ssp_controller ssp0_plat;
 
 void __init mop500_pinmaps_init(void);
 void __init snowball_pinmaps_init(void);
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 12c7e5c03ea4..d8f5ce430fa7 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -21,21 +21,32 @@
 #include <linux/of.h>
 #include <linux/of_platform.h>
 #include <linux/regulator/machine.h>
-#include <linux/platform_data/pinctrl-nomadik.h>
 #include <linux/random.h>
 
 #include <asm/pmu.h>
 #include <asm/mach/map.h>
 
 #include "setup.h"
-#include "devices.h"
 #include "irqs.h"
 
-#include "devices-db8500.h"
-#include "db8500-regs.h"
+#include "board-mop500-regulators.h"
 #include "board-mop500.h"
+#include "db8500-regs.h"
 #include "id.h"
 
+struct ab8500_platform_data ab8500_platdata = {
+        .irq_base       = MOP500_AB8500_IRQ_BASE,
+        .regulator      = &ab8500_regulator_plat_data,
+};
+
+struct prcmu_pdata db8500_prcmu_pdata = {
+        .ab_platdata    = &ab8500_platdata,
+        .ab_irq         = IRQ_DB8500_AB8500,
+        .irq_base       = IRQ_PRCMU_BASE,
+        .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
+        .legacy_offset  = DB8500_PRCMU_LEGACY_OFFSET,
+};
+
 /* minimum static i/o mapping required to boot U8500 platforms */
 static struct map_desc u8500_uart_io_desc[] __initdata = {
         __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
@@ -159,9 +170,6 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
         OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
                         NULL),
-        /* Requires device name bindings. */
-        OF_DEV_AUXDATA("stericsson,db8500-pinctrl", U8500_PRCMU_BASE,
-                "pinctrl-db8500", NULL),
         {},
 };
 
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index f84d4397896b..d11ac4bf336c 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -25,7 +25,6 @@
 #include <asm/mach/map.h>
 
 #include "setup.h"
-#include "devices.h"
 
 #include "board-mop500.h"
 #include "db8500-regs.h"
@@ -64,12 +63,7 @@ void __init ux500_init_irq(void)
         } else
                 ux500_unknown_soc();
 
-#ifdef CONFIG_OF
-        if (of_have_populated_dt())
-                irqchip_init();
-        else
-#endif
-                gic_init(0, 29, dist_base, cpu_base);
+        irqchip_init();
 
         /*
          * Init clocks here so that they are available for system timer
@@ -79,16 +73,11 @@ void __init ux500_init_irq(void)
                 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
                 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
 
-                if (of_have_populated_dt())
-                        u8500_of_clk_init(U8500_CLKRST1_BASE,
-                                          U8500_CLKRST2_BASE,
-                                          U8500_CLKRST3_BASE,
-                                          U8500_CLKRST5_BASE,
-                                          U8500_CLKRST6_BASE);
-                else
-                        u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
-                                       U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
-                                       U8500_CLKRST6_BASE);
+                u8500_of_clk_init(U8500_CLKRST1_BASE,
+                                  U8500_CLKRST2_BASE,
+                                  U8500_CLKRST3_BASE,
+                                  U8500_CLKRST5_BASE,
+                                  U8500_CLKRST6_BASE);
         } else if (cpu_is_u9540()) {
                 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
                 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
deleted file mode 100644
index c59f89d058ff..000000000000
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
- * License terms: GNU General Public License (GPL) version 2
- */
-
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/amba/bus.h>
-#include <linux/amba/pl022.h>
-#include <linux/mfd/dbx500-prcmu.h>
-
-#include "setup.h"
-#include "irqs.h"
-
-#include "db8500-regs.h"
-#include "devices-db8500.h"
-
-struct prcmu_pdata db8500_prcmu_pdata = {
-        .ab_platdata    = &ab8500_platdata,
-        .ab_irq         = IRQ_DB8500_AB8500,
-        .irq_base       = IRQ_PRCMU_BASE,
-        .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
-        .legacy_offset  = DB8500_PRCMU_LEGACY_OFFSET,
-};
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h
deleted file mode 100644
index b8ffc9979bb2..000000000000
--- a/arch/arm/mach-ux500/devices-db8500.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
- * License terms: GNU General Public License (GPL), version 2.
- */
-
-#ifndef __DEVICES_DB8500_H
-#define __DEVICES_DB8500_H
-
-#include "irqs.h"
-#include "db8500-regs.h"
-
-struct platform_device;
-
-extern struct ab8500_platform_data ab8500_platdata;
-extern struct prcmu_pdata db8500_prcmu_pdata;
-
-#endif
diff --git a/arch/arm/mach-ux500/devices.c b/arch/arm/mach-ux500/devices.c
deleted file mode 100644
index 0f9e52b95935..000000000000
--- a/arch/arm/mach-ux500/devices.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
- * License terms: GNU General Public License (GPL) version 2
- */
-
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/amba/bus.h>
-
-#include "setup.h"
-
-#include "db8500-regs.h"
-
-void __init amba_add_devices(struct amba_device *devs[], int num)
-{
-        int i;
-
-        for (i = 0; i < num; i++) {
-                struct amba_device *d = devs[i];
-                amba_device_register(d, &iomem_resource);
-        }
-}
diff --git a/arch/arm/mach-ux500/devices.h b/arch/arm/mach-ux500/devices.h
deleted file mode 100644
index 5bca7c605cd6..000000000000
--- a/arch/arm/mach-ux500/devices.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * License terms: GNU General Public License (GPL) version 2
- */
-
-#ifndef __ASM_ARCH_DEVICES_H__
-#define __ASM_ARCH_DEVICES_H__
-
-struct platform_device;
-struct amba_device;
-
-extern struct amba_device ux500_pl031_device;
-
-#endif
diff --git a/arch/arm/mach-ux500/setup.h b/arch/arm/mach-ux500/setup.h
index bdb356498a74..7164cfd99710 100644
--- a/arch/arm/mach-ux500/setup.h
+++ b/arch/arm/mach-ux500/setup.h
@@ -19,17 +19,11 @@
 void ux500_restart(enum reboot_mode mode, const char *cmd);
 
 void __init ux500_map_io(void);
-extern void __init u8500_map_io(void);
-
-extern struct device * __init u8500_init_devices(void);
 
 extern void __init ux500_init_irq(void);
 
 extern struct device *ux500_soc_device_init(const char *soc_id);
 
-struct amba_device;
-extern void __init amba_add_devices(struct amba_device *devs[], int num);
-
 extern void ux500_timer_init(void);
 
 #define __IO_DEV_DESC(x, sz)    {               \
diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c
index 05a4ff78b3bd..87efda0aa348 100644
--- a/arch/arm/mach-ux500/timer.c
+++ b/arch/arm/mach-ux500/timer.c
@@ -10,40 +10,12 @@
 #include <linux/clocksource.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
-#include <linux/platform_data/clocksource-nomadik-mtu.h>
-
-#include <asm/smp_twd.h>
 
 #include "setup.h"
-#include "irqs.h"
 
 #include "db8500-regs.h"
 #include "id.h"
 
-#ifdef CONFIG_HAVE_ARM_TWD
-static DEFINE_TWD_LOCAL_TIMER(u8500_twd_local_timer,
-                              U8500_TWD_BASE, IRQ_LOCALTIMER);
-
-static void __init ux500_twd_init(void)
-{
-        struct twd_local_timer *twd_local_timer;
-        int err;
-
-        /* Use this to switch local timer base if changed in new ASICs */
-        twd_local_timer = &u8500_twd_local_timer;
-
-        if (of_have_populated_dt())
-                clocksource_of_init();
-        else {
-                err = twd_local_timer_register(twd_local_timer);
-                if (err)
-                        pr_err("twd_local_timer_register failed %d\n", err);
-        }
-}
-#else
-#define ux500_twd_init()        do { } while(0)
-#endif
-
 const static struct of_device_id prcmu_timer_of_match[] __initconst = {
         { .compatible = "stericsson,db8500-prcmu-timer-4", },
         { },
@@ -51,54 +23,26 @@ const static struct of_device_id prcmu_timer_of_match[] __initconst = {
 
 void __init ux500_timer_init(void)
 {
-        void __iomem *mtu_timer_base;
         void __iomem *prcmu_timer_base;
         void __iomem *tmp_base;
         struct device_node *np;
 
-        if (cpu_is_u8500_family() || cpu_is_ux540_family()) {
-                mtu_timer_base = __io_address(U8500_MTU0_BASE);
+        if (cpu_is_u8500_family() || cpu_is_ux540_family())
                 prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
-        } else {
+        else
                 ux500_unknown_soc();
-        }
 
-        /* TODO: Once MTU has been DT:ed place code above into else. */
-        if (of_have_populated_dt()) {
-#ifdef CONFIG_OF
-                np = of_find_matching_node(NULL, prcmu_timer_of_match);
-                if (!np)
-#endif
-                        goto dt_fail;
+        np = of_find_matching_node(NULL, prcmu_timer_of_match);
+        if (!np)
+                goto dt_fail;
 
-                tmp_base = of_iomap(np, 0);
-                if (!tmp_base)
-                        goto dt_fail;
+        tmp_base = of_iomap(np, 0);
+        if (!tmp_base)
+                goto dt_fail;
 
-                prcmu_timer_base = tmp_base;
-        }
+        prcmu_timer_base = tmp_base;
 
 dt_fail:
-        /* Doing it the old fashioned way. */
-
-        /*
-         * Here we register the timerblocks active in the system.
-         * Localtimers (twd) is started when both cpu is up and running.
-         * MTU register a clocksource, clockevent and sched_clock.
-         * Since the MTU is located in the VAPE power domain
-         * it will be cleared in sleep which makes it unsuitable.
-         * We however need it as a timer tick (clockevent)
-         * during boot to calibrate delay until twd is started.
-         * RTC-RTT have problems as timer tick during boot since it is
-         * depending on delay which is not yet calibrated. RTC-RTT is in the
-         * always-on powerdomain and is used as clockevent instead of twd when
-         * sleeping.
-         * The PRCMU timer 4 register a clocksource and
-         * sched_clock with higher rating then MTU since is always-on.
-         *
-         */
-        if (!of_have_populated_dt())
-                nmdk_timer_init(mtu_timer_base, IRQ_MTU0);
         clksrc_dbx500_prcmu_init(prcmu_timer_base);
-        ux500_twd_init();
+        clocksource_of_init();
 }
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index c66d163d7a2a..830ff07f3385 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -22,6 +22,7 @@
 #include <linux/platform_data/dma-mv_xor.h>
 #include <linux/platform_data/usb-ehci-orion.h>
 #include <mach/bridge-regs.h>
+#include <plat/common.h>
 
 /* Create a clkdev entry for a given device/clk */
 void __init orion_clkdev_add(const char *con_id, const char *dev_id,
@@ -256,7 +257,7 @@ static __init void ge_complete(
 /*****************************************************************************
  * GE00
  ****************************************************************************/
-struct mv643xx_eth_shared_platform_data orion_ge00_shared_data;
+static struct mv643xx_eth_shared_platform_data orion_ge00_shared_data;
 
 static struct resource orion_ge00_shared_resources[] = {
         {
@@ -322,7 +323,7 @@ void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
 /*****************************************************************************
  * GE01
  ****************************************************************************/
-struct mv643xx_eth_shared_platform_data orion_ge01_shared_data;
+static struct mv643xx_eth_shared_platform_data orion_ge01_shared_data;
 
 static struct resource orion_ge01_shared_resources[] = {
         {
@@ -373,7 +374,7 @@ void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
 /*****************************************************************************
  * GE10
  ****************************************************************************/
-struct mv643xx_eth_shared_platform_data orion_ge10_shared_data;
+static struct mv643xx_eth_shared_platform_data orion_ge10_shared_data;
 
 static struct resource orion_ge10_shared_resources[] = {
         {
@@ -422,7 +423,7 @@ void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
 /*****************************************************************************
  * GE11
  ****************************************************************************/
-struct mv643xx_eth_shared_platform_data orion_ge11_shared_data;
+static struct mv643xx_eth_shared_platform_data orion_ge11_shared_data;
 
 static struct resource orion_ge11_shared_resources[] = {
         {
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 9d2b2ac74938..15921a1839d7 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -17,6 +17,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/sched_clock.h>
+#include <plat/time.h>
 
 /*
  * MBus bridge block registers.
@@ -174,7 +175,7 @@ static irqreturn_t orion_timer_interrupt(int irq, void *dev_id)
 
 static struct irqaction orion_timer_irq = {
         .name           = "orion_tick",
-        .flags          = IRQF_DISABLED | IRQF_TIMER,
+        .flags          = IRQF_TIMER,
         .handler        = orion_timer_interrupt
 };
 
diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index 4afc32f90b6d..f48dc0a4736c 100644
--- a/arch/arm/plat-samsung/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -145,6 +145,8 @@ static inline void arch_enable_uart_fifo(void)
                         if (!(fifocon & S3C2410_UFCON_RESETBOTH))
                                 break;
                 }
+
+                uart_wr(S3C2410_UFCON, S3C2410_UFCON_FIFOMODE);
         }
 }
 #else
diff --git a/drivers/Makefile b/drivers/Makefile
index 3cc8214f9b26..8e3b8b06c0b2 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -118,7 +118,7 @@ obj-$(CONFIG_SGI_SN)		+= sn/
 obj-y                           += firmware/
 obj-$(CONFIG_CRYPTO)            += crypto/
 obj-$(CONFIG_SUPERH)            += sh/
-obj-$(CONFIG_ARCH_SHMOBILE)     += sh/
+obj-$(CONFIG_ARCH_SHMOBILE_LEGACY)      += sh/
 ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
 obj-y                           += clocksource/
 endif
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 7a10bc9a23e7..ace7309c4369 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
 obj-$(CONFIG_PLAT_SAMSUNG)      += samsung/
 obj-$(CONFIG_COMMON_CLK_XGENE)  += clk-xgene.o
 obj-$(CONFIG_COMMON_CLK_KEYSTONE)       += keystone/
+obj-$(CONFIG_COMMON_CLK_AT91)   += at91/
 
 obj-$(CONFIG_X86)               += x86/
 
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
new file mode 100644
index 000000000000..0e92b716f934
--- /dev/null
+++ b/drivers/clk/at91/Makefile
@@ -0,0 +1,12 @@
+#
+# Makefile for at91 specific clk
+#
+
+obj-y += pmc.o
+obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o
+obj-y += clk-system.o clk-peripheral.o
+
+obj-$(CONFIG_AT91_PROGRAMMABLE_CLOCKS)  += clk-programmable.o
+obj-$(CONFIG_HAVE_AT91_UTMI)            += clk-utmi.o
+obj-$(CONFIG_HAVE_AT91_USB_CLK)         += clk-usb.o
+obj-$(CONFIG_HAVE_AT91_SMD)             += clk-smd.o
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
new file mode 100644
index 000000000000..8e9e8cc0412d
--- /dev/null
+++ b/drivers/clk/at91/clk-main.c
@@ -0,0 +1,187 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+
+#include "pmc.h"
+
+#define SLOW_CLOCK_FREQ         32768
+#define MAINF_DIV               16
+#define MAINFRDY_TIMEOUT        (((MAINF_DIV + 1) * USEC_PER_SEC) / \
+                                 SLOW_CLOCK_FREQ)
+#define MAINF_LOOP_MIN_WAIT     (USEC_PER_SEC / SLOW_CLOCK_FREQ)
+#define MAINF_LOOP_MAX_WAIT     MAINFRDY_TIMEOUT
+
+struct clk_main {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+        unsigned long rate;
+        unsigned int irq;
+        wait_queue_head_t wait;
+};
+
+#define to_clk_main(hw) container_of(hw, struct clk_main, hw)
+
+static irqreturn_t clk_main_irq_handler(int irq, void *dev_id)
+{
+        struct clk_main *clkmain = (struct clk_main *)dev_id;
+
+        wake_up(&clkmain->wait);
+        disable_irq_nosync(clkmain->irq);
+
+        return IRQ_HANDLED;
+}
+
+static int clk_main_prepare(struct clk_hw *hw)
+{
+        struct clk_main *clkmain = to_clk_main(hw);
+        struct at91_pmc *pmc = clkmain->pmc;
+        unsigned long halt_time, timeout;
+        u32 tmp;
+
+        while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS)) {
+                enable_irq(clkmain->irq);
+                wait_event(clkmain->wait,
+                           pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS);
+        }
+
+        if (clkmain->rate)
+                return 0;
+
+        timeout = jiffies + usecs_to_jiffies(MAINFRDY_TIMEOUT);
+        do {
+                halt_time = jiffies;
+                tmp = pmc_read(pmc, AT91_CKGR_MCFR);
+                if (tmp & AT91_PMC_MAINRDY)
+                        return 0;
+                usleep_range(MAINF_LOOP_MIN_WAIT, MAINF_LOOP_MAX_WAIT);
+        } while (time_before(halt_time, timeout));
+
+        return 0;
+}
+
+static int clk_main_is_prepared(struct clk_hw *hw)
+{
+        struct clk_main *clkmain = to_clk_main(hw);
+
+        return !!(pmc_read(clkmain->pmc, AT91_PMC_SR) & AT91_PMC_MOSCS);
+}
+
+static unsigned long clk_main_recalc_rate(struct clk_hw *hw,
+                                          unsigned long parent_rate)
+{
+        u32 tmp;
+        struct clk_main *clkmain = to_clk_main(hw);
+        struct at91_pmc *pmc = clkmain->pmc;
+
+        if (clkmain->rate)
+                return clkmain->rate;
+
+        tmp = pmc_read(pmc, AT91_CKGR_MCFR) & AT91_PMC_MAINF;
+        clkmain->rate = (tmp * parent_rate) / MAINF_DIV;
+
+        return clkmain->rate;
+}
+
+static const struct clk_ops main_ops = {
+        .prepare = clk_main_prepare,
+        .is_prepared = clk_main_is_prepared,
+        .recalc_rate = clk_main_recalc_rate,
+};
+
+static struct clk * __init
+at91_clk_register_main(struct at91_pmc *pmc,
+                       unsigned int irq,
+                       const char *name,
+                       const char *parent_name,
+                       unsigned long rate)
+{
+        int ret;
+        struct clk_main *clkmain;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        if (!pmc || !irq || !name)
+                return ERR_PTR(-EINVAL);
+
+        if (!rate && !parent_name)
+                return ERR_PTR(-EINVAL);
+
+        clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL);
+        if (!clkmain)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &main_ops;
+        init.parent_names = parent_name ? &parent_name : NULL;
+        init.num_parents = parent_name ? 1 : 0;
+        init.flags = parent_name ? 0 : CLK_IS_ROOT;
+
+        clkmain->hw.init = &init;
+        clkmain->rate = rate;
+        clkmain->pmc = pmc;
+        clkmain->irq = irq;
+        init_waitqueue_head(&clkmain->wait);
+        irq_set_status_flags(clkmain->irq, IRQ_NOAUTOEN);
+        ret = request_irq(clkmain->irq, clk_main_irq_handler,
+                          IRQF_TRIGGER_HIGH, "clk-main", clkmain);
+        if (ret)
+                return ERR_PTR(ret);
+
+        clk = clk_register(NULL, &clkmain->hw);
+        if (IS_ERR(clk)) {
+                free_irq(clkmain->irq, clkmain);
+                kfree(clkmain);
+        }
+
+        return clk;
+}
+
+
+
+static void __init
+of_at91_clk_main_setup(struct device_node *np, struct at91_pmc *pmc)
+{
+        struct clk *clk;
+        unsigned int irq;
+        const char *parent_name;
+        const char *name = np->name;
+        u32 rate = 0;
+
+        parent_name = of_clk_get_parent_name(np, 0);
+        of_property_read_string(np, "clock-output-names", &name);
+        of_property_read_u32(np, "clock-frequency", &rate);
+        irq = irq_of_parse_and_map(np, 0);
+        if (!irq)
+                return;
+
+        clk = at91_clk_register_main(pmc, irq, name, parent_name, rate);
+        if (IS_ERR(clk))
+                return;
+
+        of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
+void __init of_at91rm9200_clk_main_setup(struct device_node *np,
+                                         struct at91_pmc *pmc)
+{
+        of_at91_clk_main_setup(np, pmc);
+}
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
new file mode 100644
index 000000000000..bd313f7816a8
--- /dev/null
+++ b/drivers/clk/at91/clk-master.c
@@ -0,0 +1,270 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/io.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+
+#include "pmc.h"
+
+#define MASTER_SOURCE_MAX       4
+
+#define MASTER_PRES_MASK        0x7
+#define MASTER_PRES_MAX         MASTER_PRES_MASK
+#define MASTER_DIV_SHIFT        8
+#define MASTER_DIV_MASK         0x3
+
+struct clk_master_characteristics {
+        struct clk_range output;
+        u32 divisors[4];
+        u8 have_div3_pres;
+};
+
+struct clk_master_layout {
+        u32 mask;
+        u8 pres_shift;
+};
+
+#define to_clk_master(hw) container_of(hw, struct clk_master, hw)
+
+struct clk_master {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+        unsigned int irq;
+        wait_queue_head_t wait;
+        const struct clk_master_layout *layout;
+        const struct clk_master_characteristics *characteristics;
+};
+
+static irqreturn_t clk_master_irq_handler(int irq, void *dev_id)
+{
+        struct clk_master *master = (struct clk_master *)dev_id;
+
+        wake_up(&master->wait);
+        disable_irq_nosync(master->irq);
+
+        return IRQ_HANDLED;
+}
+static int clk_master_prepare(struct clk_hw *hw)
+{
+        struct clk_master *master = to_clk_master(hw);
+        struct at91_pmc *pmc = master->pmc;
+
+        while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MCKRDY)) {
+                enable_irq(master->irq);
+                wait_event(master->wait,
+                           pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MCKRDY);
+        }
+
+        return 0;
+}
+
+static int clk_master_is_prepared(struct clk_hw *hw)
+{
+        struct clk_master *master = to_clk_master(hw);
+
+        return !!(pmc_read(master->pmc, AT91_PMC_SR) & AT91_PMC_MCKRDY);
+}
+
+static unsigned long clk_master_recalc_rate(struct clk_hw *hw,
+                                            unsigned long parent_rate)
+{
+        u8 pres;
+        u8 div;
+        unsigned long rate = parent_rate;
+        struct clk_master *master = to_clk_master(hw);
+        struct at91_pmc *pmc = master->pmc;
+        const struct clk_master_layout *layout = master->layout;
+        const struct clk_master_characteristics *characteristics =
+                                                master->characteristics;
+        u32 tmp;
+
+        pmc_lock(pmc);
+        tmp = pmc_read(pmc, AT91_PMC_MCKR) & layout->mask;
+        pmc_unlock(pmc);
+
+        pres = (tmp >> layout->pres_shift) & MASTER_PRES_MASK;
+        div = (tmp >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK;
+
+        if (characteristics->have_div3_pres && pres == MASTER_PRES_MAX)
+                rate /= 3;
+        else
+                rate >>= pres;
+
+        rate /= characteristics->divisors[div];
+
+        if (rate < characteristics->output.min)
+                pr_warn("master clk is underclocked");
+        else if (rate > characteristics->output.max)
+                pr_warn("master clk is overclocked");
+
+        return rate;
+}
+
+static u8 clk_master_get_parent(struct clk_hw *hw)
+{
+        struct clk_master *master = to_clk_master(hw);
+        struct at91_pmc *pmc = master->pmc;
+
+        return pmc_read(pmc, AT91_PMC_MCKR) & AT91_PMC_CSS;
+}
+
+static const struct clk_ops master_ops = {
+        .prepare = clk_master_prepare,
+        .is_prepared = clk_master_is_prepared,
+        .recalc_rate = clk_master_recalc_rate,
+        .get_parent = clk_master_get_parent,
+};
+
+static struct clk * __init
+at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq,
+                const char *name, int num_parents,
+                const char **parent_names,
+                const struct clk_master_layout *layout,
+                const struct clk_master_characteristics *characteristics)
+{
+        int ret;
+        struct clk_master *master;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        if (!pmc || !irq || !name || !num_parents || !parent_names)
+                return ERR_PTR(-EINVAL);
+
+        master = kzalloc(sizeof(*master), GFP_KERNEL);
+        if (!master)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &master_ops;
+        init.parent_names = parent_names;
+        init.num_parents = num_parents;
+        init.flags = 0;
+
+        master->hw.init = &init;
+        master->layout = layout;
+        master->characteristics = characteristics;
+        master->pmc = pmc;
+        master->irq = irq;
+        init_waitqueue_head(&master->wait);
+        irq_set_status_flags(master->irq, IRQ_NOAUTOEN);
+        ret = request_irq(master->irq, clk_master_irq_handler,
+                          IRQF_TRIGGER_HIGH, "clk-master", master);
+        if (ret)
+                return ERR_PTR(ret);
+
+        clk = clk_register(NULL, &master->hw);
+        if (IS_ERR(clk))
+                kfree(master);
+
+        return clk;
+}
+
+
+static const struct clk_master_layout at91rm9200_master_layout = {
+        .mask = 0x31F,
+        .pres_shift = 2,
+};
+
+static const struct clk_master_layout at91sam9x5_master_layout = {
+        .mask = 0x373,
+        .pres_shift = 4,
+};
+
+
+static struct clk_master_characteristics * __init
+of_at91_clk_master_get_characteristics(struct device_node *np)
+{
+        struct clk_master_characteristics *characteristics;
+
+        characteristics = kzalloc(sizeof(*characteristics), GFP_KERNEL);
+        if (!characteristics)
+                return NULL;
+
+        if (of_at91_get_clk_range(np, "atmel,clk-output-range", &characteristics->output))
+                goto out_free_characteristics;
+
+        of_property_read_u32_array(np, "atmel,clk-divisors",
+                                   characteristics->divisors, 4);
+
+        characteristics->have_div3_pres =
+                of_property_read_bool(np, "atmel,master-clk-have-div3-pres");
+
+        return characteristics;
+
+out_free_characteristics:
+        kfree(characteristics);
+        return NULL;
+}
+
+static void __init
+of_at91_clk_master_setup(struct device_node *np, struct at91_pmc *pmc,
+                         const struct clk_master_layout *layout)
+{
+        struct clk *clk;
+        int num_parents;
+        int i;
+        unsigned int irq;
+        const char *parent_names[MASTER_SOURCE_MAX];
+        const char *name = np->name;
+        struct clk_master_characteristics *characteristics;
+
+        num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+        if (num_parents <= 0 || num_parents > MASTER_SOURCE_MAX)
+                return;
+
+        for (i = 0; i < num_parents; ++i) {
+                parent_names[i] = of_clk_get_parent_name(np, i);
+                if (!parent_names[i])
+                        return;
+        }
+
+        of_property_read_string(np, "clock-output-names", &name);
+
+        characteristics = of_at91_clk_master_get_characteristics(np);
+        if (!characteristics)
+                return;
+
+        irq = irq_of_parse_and_map(np, 0);
+        if (!irq)
+                return;
+
+        clk = at91_clk_register_master(pmc, irq, name, num_parents,
+                                       parent_names, layout,
+                                       characteristics);
+        if (IS_ERR(clk))
+                goto out_free_characteristics;
+
+        of_clk_add_provider(np, of_clk_src_simple_get, clk);
+        return;
+
+out_free_characteristics:
+        kfree(characteristics);
+}
+
+void __init of_at91rm9200_clk_master_setup(struct device_node *np,
+                                           struct at91_pmc *pmc)
+{
+        of_at91_clk_master_setup(np, pmc, &at91rm9200_master_layout);
+}
+
+void __init of_at91sam9x5_clk_master_setup(struct device_node *np,
+                                           struct at91_pmc *pmc)
+{
+        of_at91_clk_master_setup(np, pmc, &at91sam9x5_master_layout);
+}
diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c
new file mode 100644
index 000000000000..597fed423d7d
--- /dev/null
+++ b/drivers/clk/at91/clk-peripheral.c
@@ -0,0 +1,410 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#include "pmc.h"
+
+#define PERIPHERAL_MAX          64
+
+#define PERIPHERAL_AT91RM9200   0
+#define PERIPHERAL_AT91SAM9X5   1
+
+#define PERIPHERAL_ID_MIN       2
+#define PERIPHERAL_ID_MAX       31
+#define PERIPHERAL_MASK(id)     (1 << ((id) & PERIPHERAL_ID_MAX))
+
+#define PERIPHERAL_RSHIFT_MASK  0x3
+#define PERIPHERAL_RSHIFT(val)  (((val) >> 16) & PERIPHERAL_RSHIFT_MASK)
+
+#define PERIPHERAL_MAX_SHIFT    4
+
+struct clk_peripheral {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+        u32 id;
+};
+
+#define to_clk_peripheral(hw) container_of(hw, struct clk_peripheral, hw)
+
+struct clk_sam9x5_peripheral {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+        struct clk_range range;
+        u32 id;
+        u32 div;
+        bool auto_div;
+};
+
+#define to_clk_sam9x5_peripheral(hw) \
+        container_of(hw, struct clk_sam9x5_peripheral, hw)
+
+static int clk_peripheral_enable(struct clk_hw *hw)
+{
+        struct clk_peripheral *periph = to_clk_peripheral(hw);
+        struct at91_pmc *pmc = periph->pmc;
+        int offset = AT91_PMC_PCER;
+        u32 id = periph->id;
+
+        if (id < PERIPHERAL_ID_MIN)
+                return 0;
+        if (id > PERIPHERAL_ID_MAX)
+                offset = AT91_PMC_PCER1;
+        pmc_write(pmc, offset, PERIPHERAL_MASK(id));
+        return 0;
+}
+
+static void clk_peripheral_disable(struct clk_hw *hw)
+{
+        struct clk_peripheral *periph = to_clk_peripheral(hw);
+        struct at91_pmc *pmc = periph->pmc;
+        int offset = AT91_PMC_PCDR;
+        u32 id = periph->id;
+
+        if (id < PERIPHERAL_ID_MIN)
+                return;
+        if (id > PERIPHERAL_ID_MAX)
+                offset = AT91_PMC_PCDR1;
+        pmc_write(pmc, offset, PERIPHERAL_MASK(id));
+}
+
+static int clk_peripheral_is_enabled(struct clk_hw *hw)
+{
+        struct clk_peripheral *periph = to_clk_peripheral(hw);
+        struct at91_pmc *pmc = periph->pmc;
+        int offset = AT91_PMC_PCSR;
+        u32 id = periph->id;
+
+        if (id < PERIPHERAL_ID_MIN)
+                return 1;
+        if (id > PERIPHERAL_ID_MAX)
+                offset = AT91_PMC_PCSR1;
+        return !!(pmc_read(pmc, offset) & PERIPHERAL_MASK(id));
+}
+
+static const struct clk_ops peripheral_ops = {
+        .enable = clk_peripheral_enable,
+        .disable = clk_peripheral_disable,
+        .is_enabled = clk_peripheral_is_enabled,
+};
+
+static struct clk * __init
+at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name,
+                             const char *parent_name, u32 id)
+{
+        struct clk_peripheral *periph;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        if (!pmc || !name || !parent_name || id > PERIPHERAL_ID_MAX)
+                return ERR_PTR(-EINVAL);
+
+        periph = kzalloc(sizeof(*periph), GFP_KERNEL);
+        if (!periph)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &peripheral_ops;
+        init.parent_names = (parent_name ? &parent_name : NULL);
+        init.num_parents = (parent_name ? 1 : 0);
+        init.flags = 0;
+
+        periph->id = id;
+        periph->hw.init = &init;
+        periph->pmc = pmc;
+
+        clk = clk_register(NULL, &periph->hw);
+        if (IS_ERR(clk))
+                kfree(periph);
+
+        return clk;
+}
+
+static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)
+{
+        struct clk *parent;
+        unsigned long parent_rate;
+        int shift = 0;
+
+        if (!periph->auto_div)
+                return;
+
+        if (periph->range.max) {
+                parent = clk_get_parent_by_index(periph->hw.clk, 0);
+                parent_rate = __clk_get_rate(parent);
+                if (!parent_rate)
+                        return;
+
+                for (; shift < PERIPHERAL_MAX_SHIFT; shift++) {
+                        if (parent_rate >> shift <= periph->range.max)
+                                break;
+                }
+        }
+
+        periph->auto_div = false;
+        periph->div = shift;
+}
+
+static int clk_sam9x5_peripheral_enable(struct clk_hw *hw)
+{
+        struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+        struct at91_pmc *pmc = periph->pmc;
+
+        if (periph->id < PERIPHERAL_ID_MIN)
+                return 0;
+
+        pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID) |
+                                     AT91_PMC_PCR_CMD |
+                                     AT91_PMC_PCR_DIV(periph->div) |
+                                     AT91_PMC_PCR_EN);
+        return 0;
+}
+
+static void clk_sam9x5_peripheral_disable(struct clk_hw *hw)
+{
+        struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+        struct at91_pmc *pmc = periph->pmc;
+
+        if (periph->id < PERIPHERAL_ID_MIN)
+                return;
+
+        pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID) |
+                                     AT91_PMC_PCR_CMD);
+}
+
+static int clk_sam9x5_peripheral_is_enabled(struct clk_hw *hw)
+{
+        struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+        struct at91_pmc *pmc = periph->pmc;
+        int ret;
+
+        if (periph->id < PERIPHERAL_ID_MIN)
+                return 1;
+
+        pmc_lock(pmc);
+        pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID));
+        ret = !!(pmc_read(pmc, AT91_PMC_PCR) & AT91_PMC_PCR_EN);
+        pmc_unlock(pmc);
+
+        return ret;
+}
+
+static unsigned long
+clk_sam9x5_peripheral_recalc_rate(struct clk_hw *hw,
+                                  unsigned long parent_rate)
+{
+        struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+        struct at91_pmc *pmc = periph->pmc;
+        u32 tmp;
+
+        if (periph->id < PERIPHERAL_ID_MIN)
+                return parent_rate;
+
+        pmc_lock(pmc);
+        pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID));
+        tmp = pmc_read(pmc, AT91_PMC_PCR);
+        pmc_unlock(pmc);
+
+        if (tmp & AT91_PMC_PCR_EN) {
+                periph->div = PERIPHERAL_RSHIFT(tmp);
+                periph->auto_div = false;
+        } else {
+                clk_sam9x5_peripheral_autodiv(periph);
+        }
+
+        return parent_rate >> periph->div;
+}
+
+static long clk_sam9x5_peripheral_round_rate(struct clk_hw *hw,
+                                             unsigned long rate,
+                                             unsigned long *parent_rate)
+{
+        int shift = 0;
+        unsigned long best_rate;
+        unsigned long best_diff;
+        unsigned long cur_rate = *parent_rate;
+        unsigned long cur_diff;
+        struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+
+        if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max)
+                return *parent_rate;
+
+        if (periph->range.max) {
+                for (; shift < PERIPHERAL_MAX_SHIFT; shift++) {
+                        cur_rate = *parent_rate >> shift;
+                        if (cur_rate <= periph->range.max)
+                                break;
+                }
+        }
+
+        if (rate >= cur_rate)
+                return cur_rate;
+
+        best_diff = cur_rate - rate;
+        best_rate = cur_rate;
+        for (; shift < PERIPHERAL_MAX_SHIFT; shift++) {
+                cur_rate = *parent_rate >> shift;
+                if (cur_rate < rate)
+                        cur_diff = rate - cur_rate;
+                else
+                        cur_diff = cur_rate - rate;
+
+                if (cur_diff < best_diff) {
+                        best_diff = cur_diff;
+                        best_rate = cur_rate;
+                }
+
+                if (!best_diff || cur_rate < rate)
+                        break;
+        }
+
+        return best_rate;
+}
+
+static int clk_sam9x5_peripheral_set_rate(struct clk_hw *hw,
+                                          unsigned long rate,
+                                          unsigned long parent_rate)
+{
+        int shift;
+        struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+        if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) {
+                if (parent_rate == rate)
+                        return 0;
+                else
+                        return -EINVAL;
+        }
+
+        if (periph->range.max && rate > periph->range.max)
+                return -EINVAL;
+
+        for (shift = 0; shift < PERIPHERAL_MAX_SHIFT; shift++) {
+                if (parent_rate >> shift == rate) {
+                        periph->auto_div = false;
+                        periph->div = shift;
+                        return 0;
+                }
+        }
+
+        return -EINVAL;
+}
+
+static const struct clk_ops sam9x5_peripheral_ops = {
+        .enable = clk_sam9x5_peripheral_enable,
+        .disable = clk_sam9x5_peripheral_disable,
+        .is_enabled = clk_sam9x5_peripheral_is_enabled,
+        .recalc_rate = clk_sam9x5_peripheral_recalc_rate,
+        .round_rate = clk_sam9x5_peripheral_round_rate,
+        .set_rate = clk_sam9x5_peripheral_set_rate,
+};
+
+static struct clk * __init
+at91_clk_register_sam9x5_peripheral(struct at91_pmc *pmc, const char *name,
+                                    const char *parent_name, u32 id,
+                                    const struct clk_range *range)
+{
+        struct clk_sam9x5_peripheral *periph;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        if (!pmc || !name || !parent_name)
+                return ERR_PTR(-EINVAL);
+
+        periph = kzalloc(sizeof(*periph), GFP_KERNEL);
+        if (!periph)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &sam9x5_peripheral_ops;
+        init.parent_names = (parent_name ? &parent_name : NULL);
+        init.num_parents = (parent_name ? 1 : 0);
+        init.flags = 0;
+
+        periph->id = id;
+        periph->hw.init = &init;
+        periph->div = 0;
+        periph->pmc = pmc;
+        periph->auto_div = true;
+        periph->range = *range;
+
+        clk = clk_register(NULL, &periph->hw);
+        if (IS_ERR(clk))
+                kfree(periph);
+        else
+                clk_sam9x5_peripheral_autodiv(periph);
+
+        return clk;
+}
+
+static void __init
+of_at91_clk_periph_setup(struct device_node *np, struct at91_pmc *pmc, u8 type)
+{
+        int num;
+        u32 id;
+        struct clk *clk;
+        const char *parent_name;
+        const char *name;
+        struct device_node *periphclknp;
+
+        parent_name = of_clk_get_parent_name(np, 0);
+        if (!parent_name)
+                return;
+
+        num = of_get_child_count(np);
+        if (!num || num > PERIPHERAL_MAX)
+                return;
+
+        for_each_child_of_node(np, periphclknp) {
+                if (of_property_read_u32(periphclknp, "reg", &id))
+                        continue;
+
+                if (id >= PERIPHERAL_MAX)
+                        continue;
+
+                if (of_property_read_string(np, "clock-output-names", &name))
+                        name = periphclknp->name;
+
+                if (type == PERIPHERAL_AT91RM9200) {
+                        clk = at91_clk_register_peripheral(pmc, name,
+                                                           parent_name, id);
+                } else {
+                        struct clk_range range = CLK_RANGE(0, 0);
+
+                        of_at91_get_clk_range(periphclknp,
+                                              "atmel,clk-output-range",
+                                              &range);
+
+                        clk = at91_clk_register_sam9x5_peripheral(pmc, name,
+                                                                  parent_name,
+                                                                  id, &range);
+                }
+
+                if (IS_ERR(clk))
+                        continue;
+
+                of_clk_add_provider(periphclknp, of_clk_src_simple_get, clk);
+        }
+}
+
+void __init of_at91rm9200_clk_periph_setup(struct device_node *np,
+                                           struct at91_pmc *pmc)
+{
+        of_at91_clk_periph_setup(np, pmc, PERIPHERAL_AT91RM9200);
+}
+
+void __init of_at91sam9x5_clk_periph_setup(struct device_node *np,
+                                           struct at91_pmc *pmc)
+{
+        of_at91_clk_periph_setup(np, pmc, PERIPHERAL_AT91SAM9X5);
+}
diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c
new file mode 100644
index 000000000000..cf6ed023504c
--- /dev/null
+++ b/drivers/clk/at91/clk-pll.c
@@ -0,0 +1,531 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/io.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+
+#include "pmc.h"
+
+#define PLL_STATUS_MASK(id)     (1 << (1 + (id)))
+#define PLL_REG(id)             (AT91_CKGR_PLLAR + ((id) * 4))
+#define PLL_DIV_MASK            0xff
+#define PLL_DIV_MAX             PLL_DIV_MASK
+#define PLL_DIV(reg)            ((reg) & PLL_DIV_MASK)
+#define PLL_MUL(reg, layout)    (((reg) >> (layout)->mul_shift) & \
+                                 (layout)->mul_mask)
+#define PLL_ICPR_SHIFT(id)      ((id) * 16)
+#define PLL_ICPR_MASK(id)       (0xffff << PLL_ICPR_SHIFT(id))
+#define PLL_MAX_COUNT           0x3ff
+#define PLL_COUNT_SHIFT         8
+#define PLL_OUT_SHIFT           14
+#define PLL_MAX_ID              1
+
+struct clk_pll_characteristics {
+        struct clk_range input;
+        int num_output;
+        struct clk_range *output;
+        u16 *icpll;
+        u8 *out;
+};
+
+struct clk_pll_layout {
+        u32 pllr_mask;
+        u16 mul_mask;
+        u8 mul_shift;
+};
+
+#define to_clk_pll(hw) container_of(hw, struct clk_pll, hw)
+
+struct clk_pll {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+        unsigned int irq;
+        wait_queue_head_t wait;
+        u8 id;
+        u8 div;
+        u8 range;
+        u16 mul;
+        const struct clk_pll_layout *layout;
+        const struct clk_pll_characteristics *characteristics;
+};
+
+static irqreturn_t clk_pll_irq_handler(int irq, void *dev_id)
+{
+        struct clk_pll *pll = (struct clk_pll *)dev_id;
+
+        wake_up(&pll->wait);
+        disable_irq_nosync(pll->irq);
+
+        return IRQ_HANDLED;
+}
+
+static int clk_pll_prepare(struct clk_hw *hw)
+{
+        struct clk_pll *pll = to_clk_pll(hw);
+        struct at91_pmc *pmc = pll->pmc;
+        const struct clk_pll_layout *layout = pll->layout;
+        const struct clk_pll_characteristics *characteristics =
+                                                        pll->characteristics;
+        u8 id = pll->id;
+        u32 mask = PLL_STATUS_MASK(id);
+        int offset = PLL_REG(id);
+        u8 out = 0;
+        u32 pllr, icpr;
+        u8 div;
+        u16 mul;
+
+        pllr = pmc_read(pmc, offset);
+        div = PLL_DIV(pllr);
+        mul = PLL_MUL(pllr, layout);
+
+        if ((pmc_read(pmc, AT91_PMC_SR) & mask) &&
+            (div == pll->div && mul == pll->mul))
+                return 0;
+
+        if (characteristics->out)
+                out = characteristics->out[pll->range];
+        if (characteristics->icpll) {
+                icpr = pmc_read(pmc, AT91_PMC_PLLICPR) & ~PLL_ICPR_MASK(id);
+                icpr |= (characteristics->icpll[pll->range] <<
+                        PLL_ICPR_SHIFT(id));
+                pmc_write(pmc, AT91_PMC_PLLICPR, icpr);
+        }
+
+        pllr &= ~layout->pllr_mask;
+        pllr |= layout->pllr_mask &
+               (pll->div | (PLL_MAX_COUNT << PLL_COUNT_SHIFT) |
+                (out << PLL_OUT_SHIFT) |
+                ((pll->mul & layout->mul_mask) << layout->mul_shift));
+        pmc_write(pmc, offset, pllr);
+
+        while (!(pmc_read(pmc, AT91_PMC_SR) & mask)) {
+                enable_irq(pll->irq);
+                wait_event(pll->wait,
+                           pmc_read(pmc, AT91_PMC_SR) & mask);
+        }
+
+        return 0;
+}
+
+static int clk_pll_is_prepared(struct clk_hw *hw)
+{
+        struct clk_pll *pll = to_clk_pll(hw);
+        struct at91_pmc *pmc = pll->pmc;
+
+        return !!(pmc_read(pmc, AT91_PMC_SR) &
+                  PLL_STATUS_MASK(pll->id));
+}
+
+static void clk_pll_unprepare(struct clk_hw *hw)
+{
+        struct clk_pll *pll = to_clk_pll(hw);
+        struct at91_pmc *pmc = pll->pmc;
+        const struct clk_pll_layout *layout = pll->layout;
+        int offset = PLL_REG(pll->id);
+        u32 tmp = pmc_read(pmc, offset) & ~(layout->pllr_mask);
+
+        pmc_write(pmc, offset, tmp);
+}
+
+static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
+                                         unsigned long parent_rate)
+{
+        struct clk_pll *pll = to_clk_pll(hw);
+        const struct clk_pll_layout *layout = pll->layout;
+        struct at91_pmc *pmc = pll->pmc;
+        int offset = PLL_REG(pll->id);
+        u32 tmp = pmc_read(pmc, offset) & layout->pllr_mask;
+        u8 div = PLL_DIV(tmp);
+        u16 mul = PLL_MUL(tmp, layout);
+        if (!div || !mul)
+                return 0;
+
+        return (parent_rate * (mul + 1)) / div;
+}
+
+static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate,
+                                     unsigned long parent_rate,
+                                     u32 *div, u32 *mul,
+                                     u32 *index) {
+        unsigned long maxrate;
+        unsigned long minrate;
+        unsigned long divrate;
+        unsigned long bestdiv = 1;
+        unsigned long bestmul;
+        unsigned long tmpdiv;
+        unsigned long roundup;
+        unsigned long rounddown;
+        unsigned long remainder;
+        unsigned long bestremainder;
+        unsigned long maxmul;
+        unsigned long maxdiv;
+        unsigned long mindiv;
+        int i = 0;
+        const struct clk_pll_layout *layout = pll->layout;
+        const struct clk_pll_characteristics *characteristics =
+                                                        pll->characteristics;
+
+        /* Minimum divider = 1 */
+        /* Maximum multiplier = max_mul */
+        maxmul = layout->mul_mask + 1;
+        maxrate = (parent_rate * maxmul) / 1;
+
+        /* Maximum divider = max_div */
+        /* Minimum multiplier = 2 */
+        maxdiv = PLL_DIV_MAX;
+        minrate = (parent_rate * 2) / maxdiv;
+
+        if (parent_rate < characteristics->input.min ||
+            parent_rate < characteristics->input.max)
+                return -ERANGE;
+
+        if (parent_rate < minrate || parent_rate > maxrate)
+                return -ERANGE;
+
+        for (i = 0; i < characteristics->num_output; i++) {
+                if (parent_rate >= characteristics->output[i].min &&
+                    parent_rate <= characteristics->output[i].max)
+                        break;
+        }
+
+        if (i >= characteristics->num_output)
+                return -ERANGE;
+
+        bestmul = rate / parent_rate;
+        rounddown = parent_rate % rate;
+        roundup = rate - rounddown;
+        bestremainder = roundup < rounddown ? roundup : rounddown;
+
+        if (!bestremainder) {
+                if (div)
+                        *div = bestdiv;
+                if (mul)
+                        *mul = bestmul;
+                if (index)
+                        *index = i;
+                return rate;
+        }
+
+        maxdiv = 255 / (bestmul + 1);
+        if (parent_rate / maxdiv < characteristics->input.min)
+                maxdiv = parent_rate / characteristics->input.min;
+        mindiv = parent_rate / characteristics->input.max;
+        if (parent_rate % characteristics->input.max)
+                mindiv++;
+
+        for (tmpdiv = mindiv; tmpdiv < maxdiv; tmpdiv++) {
+                divrate = parent_rate / tmpdiv;
+
+                rounddown = rate % divrate;
+                roundup = divrate - rounddown;
+                remainder = roundup < rounddown ? roundup : rounddown;
+
+                if (remainder < bestremainder) {
+                        bestremainder = remainder;
+                        bestmul = rate / divrate;
+                        bestdiv = tmpdiv;
+                }
+
+                if (!remainder)
+                        break;
+        }
+
+        rate = (parent_rate / bestdiv) * bestmul;
+
+        if (div)
+                *div = bestdiv;
+        if (mul)
+                *mul = bestmul;
+        if (index)
+                *index = i;
+
+        return rate;
+}
+
+static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
+                                        unsigned long *parent_rate)
+{
+        struct clk_pll *pll = to_clk_pll(hw);
+
+        return clk_pll_get_best_div_mul(pll, rate, *parent_rate,
+                                        NULL, NULL, NULL);
+}
+
+static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
+                            unsigned long parent_rate)
+{
+        struct clk_pll *pll = to_clk_pll(hw);
+        long ret;
+        u32 div;
+        u32 mul;
+        u32 index;
+
+        ret = clk_pll_get_best_div_mul(pll, rate, parent_rate,
+                                       &div, &mul, &index);
+        if (ret < 0)
+                return ret;
+
+        pll->range = index;
+        pll->div = div;
+        pll->mul = mul;
+
+        return 0;
+}
+
+static const struct clk_ops pll_ops = {
+        .prepare = clk_pll_prepare,
+        .unprepare = clk_pll_unprepare,
+        .is_prepared = clk_pll_is_prepared,
+        .recalc_rate = clk_pll_recalc_rate,
+        .round_rate = clk_pll_round_rate,
+        .set_rate = clk_pll_set_rate,
+};
+
+static struct clk * __init
+at91_clk_register_pll(struct at91_pmc *pmc, unsigned int irq, const char *name,
+                      const char *parent_name, u8 id,
+                      const struct clk_pll_layout *layout,
+                      const struct clk_pll_characteristics *characteristics)
+{
+        struct clk_pll *pll;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+        int ret;
+        int offset = PLL_REG(id);
+        u32 tmp;
+
+        if (id > PLL_MAX_ID)
+                return ERR_PTR(-EINVAL);
+
+        pll = kzalloc(sizeof(*pll), GFP_KERNEL);
+        if (!pll)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &pll_ops;
+        init.parent_names = &parent_name;
+        init.num_parents = 1;
+        init.flags = CLK_SET_RATE_GATE;
+
+        pll->id = id;
+        pll->hw.init = &init;
+        pll->layout = layout;
+        pll->characteristics = characteristics;
+        pll->pmc = pmc;
+        pll->irq = irq;
+        tmp = pmc_read(pmc, offset) & layout->pllr_mask;
+        pll->div = PLL_DIV(tmp);
+        pll->mul = PLL_MUL(tmp, layout);
+        init_waitqueue_head(&pll->wait);
+        irq_set_status_flags(pll->irq, IRQ_NOAUTOEN);
+        ret = request_irq(pll->irq, clk_pll_irq_handler, IRQF_TRIGGER_HIGH,
+                          id ? "clk-pllb" : "clk-plla", pll);
+        if (ret)
+                return ERR_PTR(ret);
+
+        clk = clk_register(NULL, &pll->hw);
+        if (IS_ERR(clk))
+                kfree(pll);
+
+        return clk;
+}
+
+
+static const struct clk_pll_layout at91rm9200_pll_layout = {
+        .pllr_mask = 0x7FFFFFF,
+        .mul_shift = 16,
+        .mul_mask = 0x7FF,
+};
+
+static const struct clk_pll_layout at91sam9g45_pll_layout = {
+        .pllr_mask = 0xFFFFFF,
+        .mul_shift = 16,
+        .mul_mask = 0xFF,
+};
+
+static const struct clk_pll_layout at91sam9g20_pllb_layout = {
+        .pllr_mask = 0x3FFFFF,
+        .mul_shift = 16,
+        .mul_mask = 0x3F,
+};
+
+static const struct clk_pll_layout sama5d3_pll_layout = {
+        .pllr_mask = 0x1FFFFFF,
+        .mul_shift = 18,
+        .mul_mask = 0x7F,
+};
+
+
+static struct clk_pll_characteristics * __init
+of_at91_clk_pll_get_characteristics(struct device_node *np)
+{
+        int i;
+        int offset;
+        u32 tmp;
+        int num_output;
+        u32 num_cells;
+        struct clk_range input;
+        struct clk_range *output;
+        u8 *out = NULL;
+        u16 *icpll = NULL;
+        struct clk_pll_characteristics *characteristics;
+
+        if (of_at91_get_clk_range(np, "atmel,clk-input-range", &input))
+                return NULL;
+
+        if (of_property_read_u32(np, "#atmel,pll-clk-output-range-cells",
+                                 &num_cells))
+                return NULL;
+
+        if (num_cells < 2 || num_cells > 4)
+                return NULL;
+
+        if (!of_get_property(np, "atmel,pll-clk-output-ranges", &tmp))
+                return NULL;
+        num_output = tmp / (sizeof(u32) * num_cells);
+
+        characteristics = kzalloc(sizeof(*characteristics), GFP_KERNEL);
+        if (!characteristics)
+                return NULL;
+
+        output = kzalloc(sizeof(*output) * num_output, GFP_KERNEL);
+        if (!output)
+                goto out_free_characteristics;
+
+        if (num_cells > 2) {
+                out = kzalloc(sizeof(*out) * num_output, GFP_KERNEL);
+                if (!out)
+                        goto out_free_output;
+        }
+
+        if (num_cells > 3) {
+                icpll = kzalloc(sizeof(*icpll) * num_output, GFP_KERNEL);
+                if (!icpll)
+                        goto out_free_output;
+        }
+
+        for (i = 0; i < num_output; i++) {
+                offset = i * num_cells;
+                if (of_property_read_u32_index(np,
+                                               "atmel,pll-clk-output-ranges",
+                                               offset, &tmp))
+                        goto out_free_output;
+                output[i].min = tmp;
+                if (of_property_read_u32_index(np,
+                                               "atmel,pll-clk-output-ranges",
+                                               offset + 1, &tmp))
+                        goto out_free_output;
+                output[i].max = tmp;
+
+                if (num_cells == 2)
+                        continue;
+
+                if (of_property_read_u32_index(np,
+                                               "atmel,pll-clk-output-ranges",
+                                               offset + 2, &tmp))
+                        goto out_free_output;
+                out[i] = tmp;
+
+                if (num_cells == 3)
+                        continue;
+
+                if (of_property_read_u32_index(np,
+                                               "atmel,pll-clk-output-ranges",
+                                               offset + 3, &tmp))
+                        goto out_free_output;
+                icpll[i] = tmp;
+        }
+
+        characteristics->input = input;
+        characteristics->num_output = num_output;
+        characteristics->output = output;
+        characteristics->out = out;
+        characteristics->icpll = icpll;
+        return characteristics;
+
+out_free_output:
+        kfree(icpll);
+        kfree(out);
+        kfree(output);
+out_free_characteristics:
+        kfree(characteristics);
+        return NULL;
+}
+
+static void __init
+of_at91_clk_pll_setup(struct device_node *np, struct at91_pmc *pmc,
+                      const struct clk_pll_layout *layout)
+{
+        u32 id;
+        unsigned int irq;
+        struct clk *clk;
+        const char *parent_name;
+        const char *name = np->name;
+        struct clk_pll_characteristics *characteristics;
+
+        if (of_property_read_u32(np, "reg", &id))
+                return;
+
+        parent_name = of_clk_get_parent_name(np, 0);
+
+        of_property_read_string(np, "clock-output-names", &name);
+
+        characteristics = of_at91_clk_pll_get_characteristics(np);
+        if (!characteristics)
+                return;
+
+        irq = irq_of_parse_and_map(np, 0);
+        if (!irq)
+                return;
+
+        clk = at91_clk_register_pll(pmc, irq, name, parent_name, id, layout,
+                                    characteristics);
+        if (IS_ERR(clk))
+                goto out_free_characteristics;
+
+        of_clk_add_provider(np, of_clk_src_simple_get, clk);
+        return;
+
+out_free_characteristics:
+        kfree(characteristics);
+}
+
+void __init of_at91rm9200_clk_pll_setup(struct device_node *np,
+                                               struct at91_pmc *pmc)
+{
+        of_at91_clk_pll_setup(np, pmc, &at91rm9200_pll_layout);
+}
+
+void __init of_at91sam9g45_clk_pll_setup(struct device_node *np,
+                                                struct at91_pmc *pmc)
+{
+        of_at91_clk_pll_setup(np, pmc, &at91sam9g45_pll_layout);
+}
+
+void __init of_at91sam9g20_clk_pllb_setup(struct device_node *np,
+                                                 struct at91_pmc *pmc)
+{
+        of_at91_clk_pll_setup(np, pmc, &at91sam9g20_pllb_layout);
+}
+
+void __init of_sama5d3_clk_pll_setup(struct device_node *np,
+                                            struct at91_pmc *pmc)
+{
+        of_at91_clk_pll_setup(np, pmc, &sama5d3_pll_layout);
+}
diff --git a/drivers/clk/at91/clk-plldiv.c b/drivers/clk/at91/clk-plldiv.c
new file mode 100644
index 000000000000..ea226562bb40
--- /dev/null
+++ b/drivers/clk/at91/clk-plldiv.c
@@ -0,0 +1,135 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#include "pmc.h"
+
+#define to_clk_plldiv(hw) container_of(hw, struct clk_plldiv, hw)
+
+struct clk_plldiv {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+};
+
+static unsigned long clk_plldiv_recalc_rate(struct clk_hw *hw,
+                                            unsigned long parent_rate)
+{
+        struct clk_plldiv *plldiv = to_clk_plldiv(hw);
+        struct at91_pmc *pmc = plldiv->pmc;
+
+        if (pmc_read(pmc, AT91_PMC_MCKR) & AT91_PMC_PLLADIV2)
+                return parent_rate / 2;
+
+        return parent_rate;
+}
+
+static long clk_plldiv_round_rate(struct clk_hw *hw, unsigned long rate,
+                                        unsigned long *parent_rate)
+{
+        unsigned long div;
+
+        if (rate > *parent_rate)
+                return *parent_rate;
+        div = *parent_rate / 2;
+        if (rate < div)
+                return div;
+
+        if (rate - div < *parent_rate - rate)
+                return div;
+
+        return *parent_rate;
+}
+
+static int clk_plldiv_set_rate(struct clk_hw *hw, unsigned long rate,
+                               unsigned long parent_rate)
+{
+        struct clk_plldiv *plldiv = to_clk_plldiv(hw);
+        struct at91_pmc *pmc = plldiv->pmc;
+        u32 tmp;
+
+        if (parent_rate != rate && (parent_rate / 2) != rate)
+                return -EINVAL;
+
+        pmc_lock(pmc);
+        tmp = pmc_read(pmc, AT91_PMC_MCKR) & ~AT91_PMC_PLLADIV2;
+        if ((parent_rate / 2) == rate)
+                tmp |= AT91_PMC_PLLADIV2;
+        pmc_write(pmc, AT91_PMC_MCKR, tmp);
+        pmc_unlock(pmc);
+
+        return 0;
+}
+
+static const struct clk_ops plldiv_ops = {
+        .recalc_rate = clk_plldiv_recalc_rate,
+        .round_rate = clk_plldiv_round_rate,
+        .set_rate = clk_plldiv_set_rate,
+};
+
+static struct clk * __init
+at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name,
+                         const char *parent_name)
+{
+        struct clk_plldiv *plldiv;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL);
+        if (!plldiv)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &plldiv_ops;
+        init.parent_names = parent_name ? &parent_name : NULL;
+        init.num_parents = parent_name ? 1 : 0;
+        init.flags = CLK_SET_RATE_GATE;
+
+        plldiv->hw.init = &init;
+        plldiv->pmc = pmc;
+
+        clk = clk_register(NULL, &plldiv->hw);
+
+        if (IS_ERR(clk))
+                kfree(plldiv);
+
+        return clk;
+}
+
+static void __init
+of_at91_clk_plldiv_setup(struct device_node *np, struct at91_pmc *pmc)
+{
+        struct clk *clk;
+        const char *parent_name;
+        const char *name = np->name;
+
+        parent_name = of_clk_get_parent_name(np, 0);
+
+        of_property_read_string(np, "clock-output-names", &name);
+
+        clk = at91_clk_register_plldiv(pmc, name, parent_name);
+
+        if (IS_ERR(clk))
+                return;
+
+        of_clk_add_provider(np, of_clk_src_simple_get, clk);
+        return;
+}
+
+void __init of_at91sam9x5_clk_plldiv_setup(struct device_node *np,
+                                           struct at91_pmc *pmc)
+{
+        of_at91_clk_plldiv_setup(np, pmc);
+}
diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
new file mode 100644
index 000000000000..fd792b203eaf
--- /dev/null
+++ b/drivers/clk/at91/clk-programmable.c
@@ -0,0 +1,366 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/io.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+
+#include "pmc.h"
+
+#define PROG_SOURCE_MAX         5
+#define PROG_ID_MAX             7
+
+#define PROG_STATUS_MASK(id)    (1 << ((id) + 8))
+#define PROG_PRES_MASK          0x7
+#define PROG_MAX_RM9200_CSS     3
+
+struct clk_programmable_layout {
+        u8 pres_shift;
+        u8 css_mask;
+        u8 have_slck_mck;
+};
+
+struct clk_programmable {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+        unsigned int irq;
+        wait_queue_head_t wait;
+        u8 id;
+        u8 css;
+        u8 pres;
+        u8 slckmck;
+        const struct clk_programmable_layout *layout;
+};
+
+#define to_clk_programmable(hw) container_of(hw, struct clk_programmable, hw)
+
+
+static irqreturn_t clk_programmable_irq_handler(int irq, void *dev_id)
+{
+        struct clk_programmable *prog = (struct clk_programmable *)dev_id;
+
+        wake_up(&prog->wait);
+
+        return IRQ_HANDLED;
+}
+
+static int clk_programmable_prepare(struct clk_hw *hw)
+{
+        u32 tmp;
+        struct clk_programmable *prog = to_clk_programmable(hw);
+        struct at91_pmc *pmc = prog->pmc;
+        const struct clk_programmable_layout *layout = prog->layout;
+        u8 id = prog->id;
+        u32 mask = PROG_STATUS_MASK(id);
+
+        tmp = prog->css | (prog->pres << layout->pres_shift);
+        if (layout->have_slck_mck && prog->slckmck)
+                tmp |= AT91_PMC_CSSMCK_MCK;
+
+        pmc_write(pmc, AT91_PMC_PCKR(id), tmp);
+
+        while (!(pmc_read(pmc, AT91_PMC_SR) & mask))
+                wait_event(prog->wait, pmc_read(pmc, AT91_PMC_SR) & mask);
+
+        return 0;
+}
+
+static int clk_programmable_is_ready(struct clk_hw *hw)
+{
+        struct clk_programmable *prog = to_clk_programmable(hw);
+        struct at91_pmc *pmc = prog->pmc;
+
+        return !!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_PCKR(prog->id));
+}
+
+static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw,
+                                                  unsigned long parent_rate)
+{
+        u32 tmp;
+        struct clk_programmable *prog = to_clk_programmable(hw);
+        struct at91_pmc *pmc = prog->pmc;
+        const struct clk_programmable_layout *layout = prog->layout;
+
+        tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id));
+        prog->pres = (tmp >> layout->pres_shift) & PROG_PRES_MASK;
+
+        return parent_rate >> prog->pres;
+}
+
+static long clk_programmable_round_rate(struct clk_hw *hw, unsigned long rate,
+                                        unsigned long *parent_rate)
+{
+        unsigned long best_rate = *parent_rate;
+        unsigned long best_diff;
+        unsigned long new_diff;
+        unsigned long cur_rate;
+        int shift = shift;
+
+        if (rate > *parent_rate)
+                return *parent_rate;
+        else
+                best_diff = *parent_rate - rate;
+
+        if (!best_diff)
+                return best_rate;
+
+        for (shift = 1; shift < PROG_PRES_MASK; shift++) {
+                cur_rate = *parent_rate >> shift;
+
+                if (cur_rate > rate)
+                        new_diff = cur_rate - rate;
+                else
+                        new_diff = rate - cur_rate;
+
+                if (!new_diff)
+                        return cur_rate;
+
+                if (new_diff < best_diff) {
+                        best_diff = new_diff;
+                        best_rate = cur_rate;
+                }
+
+                if (rate > cur_rate)
+                        break;
+        }
+
+        return best_rate;
+}
+
+static int clk_programmable_set_parent(struct clk_hw *hw, u8 index)
+{
+        struct clk_programmable *prog = to_clk_programmable(hw);
+        const struct clk_programmable_layout *layout = prog->layout;
+        if (index > layout->css_mask) {
+                if (index > PROG_MAX_RM9200_CSS && layout->have_slck_mck) {
+                        prog->css = 0;
+                        prog->slckmck = 1;
+                        return 0;
+                } else {
+                        return -EINVAL;
+                }
+        }
+
+        prog->css = index;
+        return 0;
+}
+
+static u8 clk_programmable_get_parent(struct clk_hw *hw)
+{
+        u32 tmp;
+        u8 ret;
+        struct clk_programmable *prog = to_clk_programmable(hw);
+        struct at91_pmc *pmc = prog->pmc;
+        const struct clk_programmable_layout *layout = prog->layout;
+
+        tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id));
+        prog->css = tmp & layout->css_mask;
+        ret = prog->css;
+        if (layout->have_slck_mck) {
+                prog->slckmck = !!(tmp & AT91_PMC_CSSMCK_MCK);
+                if (prog->slckmck && !ret)
+                        ret = PROG_MAX_RM9200_CSS + 1;
+        }
+
+        return ret;
+}
+
+static int clk_programmable_set_rate(struct clk_hw *hw, unsigned long rate,
+                                     unsigned long parent_rate)
+{
+        struct clk_programmable *prog = to_clk_programmable(hw);
+        unsigned long best_rate = parent_rate;
+        unsigned long best_diff;
+        unsigned long new_diff;
+        unsigned long cur_rate;
+        int shift = 0;
+
+        if (rate > parent_rate)
+                return parent_rate;
+        else
+                best_diff = parent_rate - rate;
+
+        if (!best_diff) {
+                prog->pres = shift;
+                return 0;
+        }
+
+        for (shift = 1; shift < PROG_PRES_MASK; shift++) {
+                cur_rate = parent_rate >> shift;
+
+                if (cur_rate > rate)
+                        new_diff = cur_rate - rate;
+                else
+                        new_diff = rate - cur_rate;
+
+                if (!new_diff)
+                        break;
+
+                if (new_diff < best_diff) {
+                        best_diff = new_diff;
+                        best_rate = cur_rate;
+                }
+
+                if (rate > cur_rate)
+                        break;
+        }
+
+        prog->pres = shift;
+        return 0;
+}
+
+static const struct clk_ops programmable_ops = {
+        .prepare = clk_programmable_prepare,
+        .is_prepared = clk_programmable_is_ready,
+        .recalc_rate = clk_programmable_recalc_rate,
+        .round_rate = clk_programmable_round_rate,
+        .get_parent = clk_programmable_get_parent,
+        .set_parent = clk_programmable_set_parent,
+        .set_rate = clk_programmable_set_rate,
+};
+
+static struct clk * __init
+at91_clk_register_programmable(struct at91_pmc *pmc, unsigned int irq,
+                               const char *name, const char **parent_names,
+                               u8 num_parents, u8 id,
+                               const struct clk_programmable_layout *layout)
+{
+        int ret;
+        struct clk_programmable *prog;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+        char irq_name[11];
+
+        if (id > PROG_ID_MAX)
+                return ERR_PTR(-EINVAL);
+
+        prog = kzalloc(sizeof(*prog), GFP_KERNEL);
+        if (!prog)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &programmable_ops;
+        init.parent_names = parent_names;
+        init.num_parents = num_parents;
+        init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
+
+        prog->id = id;
+        prog->layout = layout;
+        prog->hw.init = &init;
+        prog->pmc = pmc;
+        prog->irq = irq;
+        init_waitqueue_head(&prog->wait);
+        irq_set_status_flags(prog->irq, IRQ_NOAUTOEN);
+        snprintf(irq_name, sizeof(irq_name), "clk-prog%d", id);
+        ret = request_irq(prog->irq, clk_programmable_irq_handler,
+                          IRQF_TRIGGER_HIGH, irq_name, prog);
+        if (ret)
+                return ERR_PTR(ret);
+
+        clk = clk_register(NULL, &prog->hw);
+        if (IS_ERR(clk))
+                kfree(prog);
+
+        return clk;
+}
+
+static const struct clk_programmable_layout at91rm9200_programmable_layout = {
+        .pres_shift = 2,
+        .css_mask = 0x3,
+        .have_slck_mck = 0,
+};
+
+static const struct clk_programmable_layout at91sam9g45_programmable_layout = {
+        .pres_shift = 2,
+        .css_mask = 0x3,
+        .have_slck_mck = 1,
+};
+
+static const struct clk_programmable_layout at91sam9x5_programmable_layout = {
+        .pres_shift = 4,
+        .css_mask = 0x7,
+        .have_slck_mck = 0,
+};
+
+static void __init
+of_at91_clk_prog_setup(struct device_node *np, struct at91_pmc *pmc,
+                       const struct clk_programmable_layout *layout)
+{
+        int num;
+        u32 id;
+        int i;
+        unsigned int irq;
+        struct clk *clk;
+        int num_parents;
+        const char *parent_names[PROG_SOURCE_MAX];
+        const char *name;
+        struct device_node *progclknp;
+
+        num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+        if (num_parents <= 0 || num_parents > PROG_SOURCE_MAX)
+                return;
+
+        for (i = 0; i < num_parents; ++i) {
+                parent_names[i] = of_clk_get_parent_name(np, i);
+                if (!parent_names[i])
+                        return;
+        }
+
+        num = of_get_child_count(np);
+        if (!num || num > (PROG_ID_MAX + 1))
+                return;
+
+        for_each_child_of_node(np, progclknp) {
+                if (of_property_read_u32(progclknp, "reg", &id))
+                        continue;
+
+                if (of_property_read_string(np, "clock-output-names", &name))
+                        name = progclknp->name;
+
+                irq = irq_of_parse_and_map(progclknp, 0);
+                if (!irq)
+                        continue;
+
+                clk = at91_clk_register_programmable(pmc, irq, name,
+                                                     parent_names, num_parents,
+                                                     id, layout);
+                if (IS_ERR(clk))
+                        continue;
+
+                of_clk_add_provider(progclknp, of_clk_src_simple_get, clk);
+        }
+}
+
+
+void __init of_at91rm9200_clk_prog_setup(struct device_node *np,
+                                         struct at91_pmc *pmc)
+{
+        of_at91_clk_prog_setup(np, pmc, &at91rm9200_programmable_layout);
+}
+
+void __init of_at91sam9g45_clk_prog_setup(struct device_node *np,
+                                          struct at91_pmc *pmc)
+{
+        of_at91_clk_prog_setup(np, pmc, &at91sam9g45_programmable_layout);
+}
+
+void __init of_at91sam9x5_clk_prog_setup(struct device_node *np,
+                                         struct at91_pmc *pmc)
+{
+        of_at91_clk_prog_setup(np, pmc, &at91sam9x5_programmable_layout);
+}
diff --git a/drivers/clk/at91/clk-smd.c b/drivers/clk/at91/clk-smd.c
new file mode 100644
index 000000000000..144d47ecfe63
--- /dev/null
+++ b/drivers/clk/at91/clk-smd.c
@@ -0,0 +1,171 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#include "pmc.h"
+
+#define SMD_SOURCE_MAX          2
+
+#define SMD_DIV_SHIFT           8
+#define SMD_MAX_DIV             0xf
+
+struct at91sam9x5_clk_smd {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+};
+
+#define to_at91sam9x5_clk_smd(hw) \
+        container_of(hw, struct at91sam9x5_clk_smd, hw)
+
+static unsigned long at91sam9x5_clk_smd_recalc_rate(struct clk_hw *hw,
+                                                    unsigned long parent_rate)
+{
+        u32 tmp;
+        u8 smddiv;
+        struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw);
+        struct at91_pmc *pmc = smd->pmc;
+
+        tmp = pmc_read(pmc, AT91_PMC_SMD);
+        smddiv = (tmp & AT91_PMC_SMD_DIV) >> SMD_DIV_SHIFT;
+        return parent_rate / (smddiv + 1);
+}
+
+static long at91sam9x5_clk_smd_round_rate(struct clk_hw *hw, unsigned long rate,
+                                          unsigned long *parent_rate)
+{
+        unsigned long div;
+        unsigned long bestrate;
+        unsigned long tmp;
+
+        if (rate >= *parent_rate)
+                return *parent_rate;
+
+        div = *parent_rate / rate;
+        if (div > SMD_MAX_DIV)
+                return *parent_rate / (SMD_MAX_DIV + 1);
+
+        bestrate = *parent_rate / div;
+        tmp = *parent_rate / (div + 1);
+        if (bestrate - rate > rate - tmp)
+                bestrate = tmp;
+
+        return bestrate;
+}
+
+static int at91sam9x5_clk_smd_set_parent(struct clk_hw *hw, u8 index)
+{
+        u32 tmp;
+        struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw);
+        struct at91_pmc *pmc = smd->pmc;
+
+        if (index > 1)
+                return -EINVAL;
+        tmp = pmc_read(pmc, AT91_PMC_SMD) & ~AT91_PMC_SMDS;
+        if (index)
+                tmp |= AT91_PMC_SMDS;
+        pmc_write(pmc, AT91_PMC_SMD, tmp);
+        return 0;
+}
+
+static u8 at91sam9x5_clk_smd_get_parent(struct clk_hw *hw)
+{
+        struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw);
+        struct at91_pmc *pmc = smd->pmc;
+
+        return pmc_read(pmc, AT91_PMC_SMD) & AT91_PMC_SMDS;
+}
+
+static int at91sam9x5_clk_smd_set_rate(struct clk_hw *hw, unsigned long rate,
+                                       unsigned long parent_rate)
+{
+        u32 tmp;
+        struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw);
+        struct at91_pmc *pmc = smd->pmc;
+        unsigned long div = parent_rate / rate;
+
+        if (parent_rate % rate || div < 1 || div > (SMD_MAX_DIV + 1))
+                return -EINVAL;
+        tmp = pmc_read(pmc, AT91_PMC_SMD) & ~AT91_PMC_SMD_DIV;
+        tmp |= (div - 1) << SMD_DIV_SHIFT;
+        pmc_write(pmc, AT91_PMC_SMD, tmp);
+
+        return 0;
+}
+
+static const struct clk_ops at91sam9x5_smd_ops = {
+        .recalc_rate = at91sam9x5_clk_smd_recalc_rate,
+        .round_rate = at91sam9x5_clk_smd_round_rate,
+        .get_parent = at91sam9x5_clk_smd_get_parent,
+        .set_parent = at91sam9x5_clk_smd_set_parent,
+        .set_rate = at91sam9x5_clk_smd_set_rate,
+};
+
+static struct clk * __init
+at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name,
+                            const char **parent_names, u8 num_parents)
+{
+        struct at91sam9x5_clk_smd *smd;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        smd = kzalloc(sizeof(*smd), GFP_KERNEL);
+        if (!smd)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &at91sam9x5_smd_ops;
+        init.parent_names = parent_names;
+        init.num_parents = num_parents;
+        init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
+
+        smd->hw.init = &init;
+        smd->pmc = pmc;
+
+        clk = clk_register(NULL, &smd->hw);
+        if (IS_ERR(clk))
+                kfree(smd);
+
+        return clk;
+}
+
+void __init of_at91sam9x5_clk_smd_setup(struct device_node *np,
+                                        struct at91_pmc *pmc)
+{
+        struct clk *clk;
+        int i;
+        int num_parents;
+        const char *parent_names[SMD_SOURCE_MAX];
+        const char *name = np->name;
+
+        num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+        if (num_parents <= 0 || num_parents > SMD_SOURCE_MAX)
+                return;
+
+        for (i = 0; i < num_parents; i++) {
+                parent_names[i] = of_clk_get_parent_name(np, i);
+                if (!parent_names[i])
+                        return;
+        }
+
+        of_property_read_string(np, "clock-output-names", &name);
+
+        clk = at91sam9x5_clk_register_smd(pmc, name, parent_names,
+                                          num_parents);
+        if (IS_ERR(clk))
+                return;
+
+        of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c
new file mode 100644
index 000000000000..8f7c0434a09f
--- /dev/null
+++ b/drivers/clk/at91/clk-system.c
@@ -0,0 +1,135 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#include "pmc.h"
+
+#define SYSTEM_MAX_ID           31
+
+#define SYSTEM_MAX_NAME_SZ      32
+
+#define to_clk_system(hw) container_of(hw, struct clk_system, hw)
+struct clk_system {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+        u8 id;
+};
+
+static int clk_system_enable(struct clk_hw *hw)
+{
+        struct clk_system *sys = to_clk_system(hw);
+        struct at91_pmc *pmc = sys->pmc;
+
+        pmc_write(pmc, AT91_PMC_SCER, 1 << sys->id);
+        return 0;
+}
+
+static void clk_system_disable(struct clk_hw *hw)
+{
+        struct clk_system *sys = to_clk_system(hw);
+        struct at91_pmc *pmc = sys->pmc;
+
+        pmc_write(pmc, AT91_PMC_SCDR, 1 << sys->id);
+}
+
+static int clk_system_is_enabled(struct clk_hw *hw)
+{
+        struct clk_system *sys = to_clk_system(hw);
+        struct at91_pmc *pmc = sys->pmc;
+
+        return !!(pmc_read(pmc, AT91_PMC_SCSR) & (1 << sys->id));
+}
+
+static const struct clk_ops system_ops = {
+        .enable = clk_system_enable,
+        .disable = clk_system_disable,
+        .is_enabled = clk_system_is_enabled,
+};
+
+static struct clk * __init
+at91_clk_register_system(struct at91_pmc *pmc, const char *name,
+                         const char *parent_name, u8 id)
+{
+        struct clk_system *sys;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        if (!parent_name || id > SYSTEM_MAX_ID)
+                return ERR_PTR(-EINVAL);
+
+        sys = kzalloc(sizeof(*sys), GFP_KERNEL);
+        if (!sys)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &system_ops;
+        init.parent_names = &parent_name;
+        init.num_parents = 1;
+        /*
+         * CLK_IGNORE_UNUSED is used to avoid ddrck switch off.
+         * TODO : we should implement a driver supporting at91 ddr controller
+         * (see drivers/memory) which would request and enable the ddrck clock.
+         * When this is done we will be able to remove CLK_IGNORE_UNUSED flag.
+         */
+        init.flags = CLK_IGNORE_UNUSED;
+
+        sys->id = id;
+        sys->hw.init = &init;
+        sys->pmc = pmc;
+
+        clk = clk_register(NULL, &sys->hw);
+        if (IS_ERR(clk))
+                kfree(sys);
+
+        return clk;
+}
+
+static void __init
+of_at91_clk_sys_setup(struct device_node *np, struct at91_pmc *pmc)
+{
+        int num;
+        u32 id;
+        struct clk *clk;
+        const char *name;
+        struct device_node *sysclknp;
+        const char *parent_name;
+
+        num = of_get_child_count(np);
+        if (num > (SYSTEM_MAX_ID + 1))
+                return;
+
+        for_each_child_of_node(np, sysclknp) {
+                if (of_property_read_u32(sysclknp, "reg", &id))
+                        continue;
+
+                if (of_property_read_string(np, "clock-output-names", &name))
+                        name = sysclknp->name;
+
+                parent_name = of_clk_get_parent_name(sysclknp, 0);
+
+                clk = at91_clk_register_system(pmc, name, parent_name, id);
+                if (IS_ERR(clk))
+                        continue;
+
+                of_clk_add_provider(sysclknp, of_clk_src_simple_get, clk);
+        }
+}
+
+void __init of_at91rm9200_clk_sys_setup(struct device_node *np,
+                                        struct at91_pmc *pmc)
+{
+        of_at91_clk_sys_setup(np, pmc);
+}
diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c
new file mode 100644
index 000000000000..7d1d26a4bd04
--- /dev/null
+++ b/drivers/clk/at91/clk-usb.c
@@ -0,0 +1,398 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#include "pmc.h"
+
+#define USB_SOURCE_MAX          2
+
+#define SAM9X5_USB_DIV_SHIFT    8
+#define SAM9X5_USB_MAX_DIV      0xf
+
+#define RM9200_USB_DIV_SHIFT    28
+#define RM9200_USB_DIV_TAB_SIZE 4
+
+struct at91sam9x5_clk_usb {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+};
+
+#define to_at91sam9x5_clk_usb(hw) \
+        container_of(hw, struct at91sam9x5_clk_usb, hw)
+
+struct at91rm9200_clk_usb {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+        u32 divisors[4];
+};
+
+#define to_at91rm9200_clk_usb(hw) \
+        container_of(hw, struct at91rm9200_clk_usb, hw)
+
+static unsigned long at91sam9x5_clk_usb_recalc_rate(struct clk_hw *hw,
+                                                    unsigned long parent_rate)
+{
+        u32 tmp;
+        u8 usbdiv;
+        struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
+        struct at91_pmc *pmc = usb->pmc;
+
+        tmp = pmc_read(pmc, AT91_PMC_USB);
+        usbdiv = (tmp & AT91_PMC_OHCIUSBDIV) >> SAM9X5_USB_DIV_SHIFT;
+        return parent_rate / (usbdiv + 1);
+}
+
+static long at91sam9x5_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
+                                          unsigned long *parent_rate)
+{
+        unsigned long div;
+        unsigned long bestrate;
+        unsigned long tmp;
+
+        if (rate >= *parent_rate)
+                return *parent_rate;
+
+        div = *parent_rate / rate;
+        if (div >= SAM9X5_USB_MAX_DIV)
+                return *parent_rate / (SAM9X5_USB_MAX_DIV + 1);
+
+        bestrate = *parent_rate / div;
+        tmp = *parent_rate / (div + 1);
+        if (bestrate - rate > rate - tmp)
+                bestrate = tmp;
+
+        return bestrate;
+}
+
+static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index)
+{
+        u32 tmp;
+        struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
+        struct at91_pmc *pmc = usb->pmc;
+
+        if (index > 1)
+                return -EINVAL;
+        tmp = pmc_read(pmc, AT91_PMC_USB) & ~AT91_PMC_USBS;
+        if (index)
+                tmp |= AT91_PMC_USBS;
+        pmc_write(pmc, AT91_PMC_USB, tmp);
+        return 0;
+}
+
+static u8 at91sam9x5_clk_usb_get_parent(struct clk_hw *hw)
+{
+        struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
+        struct at91_pmc *pmc = usb->pmc;
+
+        return pmc_read(pmc, AT91_PMC_USB) & AT91_PMC_USBS;
+}
+
+static int at91sam9x5_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
+                                       unsigned long parent_rate)
+{
+        u32 tmp;
+        struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
+        struct at91_pmc *pmc = usb->pmc;
+        unsigned long div = parent_rate / rate;
+
+        if (parent_rate % rate || div < 1 || div >= SAM9X5_USB_MAX_DIV)
+                return -EINVAL;
+
+        tmp = pmc_read(pmc, AT91_PMC_USB) & ~AT91_PMC_OHCIUSBDIV;
+        tmp |= (div - 1) << SAM9X5_USB_DIV_SHIFT;
+        pmc_write(pmc, AT91_PMC_USB, tmp);
+
+        return 0;
+}
+
+static const struct clk_ops at91sam9x5_usb_ops = {
+        .recalc_rate = at91sam9x5_clk_usb_recalc_rate,
+        .round_rate = at91sam9x5_clk_usb_round_rate,
+        .get_parent = at91sam9x5_clk_usb_get_parent,
+        .set_parent = at91sam9x5_clk_usb_set_parent,
+        .set_rate = at91sam9x5_clk_usb_set_rate,
+};
+
+static int at91sam9n12_clk_usb_enable(struct clk_hw *hw)
+{
+        struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
+        struct at91_pmc *pmc = usb->pmc;
+
+        pmc_write(pmc, AT91_PMC_USB,
+                  pmc_read(pmc, AT91_PMC_USB) | AT91_PMC_USBS);
+        return 0;
+}
+
+static void at91sam9n12_clk_usb_disable(struct clk_hw *hw)
+{
+        struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
+        struct at91_pmc *pmc = usb->pmc;
+
+        pmc_write(pmc, AT91_PMC_USB,
+                  pmc_read(pmc, AT91_PMC_USB) & ~AT91_PMC_USBS);
+}
+
+static int at91sam9n12_clk_usb_is_enabled(struct clk_hw *hw)
+{
+        struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
+        struct at91_pmc *pmc = usb->pmc;
+
+        return !!(pmc_read(pmc, AT91_PMC_USB) & AT91_PMC_USBS);
+}
+
+static const struct clk_ops at91sam9n12_usb_ops = {
+        .enable = at91sam9n12_clk_usb_enable,
+        .disable = at91sam9n12_clk_usb_disable,
+        .is_enabled = at91sam9n12_clk_usb_is_enabled,
+        .recalc_rate = at91sam9x5_clk_usb_recalc_rate,
+        .round_rate = at91sam9x5_clk_usb_round_rate,
+        .set_rate = at91sam9x5_clk_usb_set_rate,
+};
+
+static struct clk * __init
+at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name,
+                            const char **parent_names, u8 num_parents)
+{
+        struct at91sam9x5_clk_usb *usb;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        usb = kzalloc(sizeof(*usb), GFP_KERNEL);
+        if (!usb)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &at91sam9x5_usb_ops;
+        init.parent_names = parent_names;
+        init.num_parents = num_parents;
+        init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
+
+        usb->hw.init = &init;
+        usb->pmc = pmc;
+
+        clk = clk_register(NULL, &usb->hw);
+        if (IS_ERR(clk))
+                kfree(usb);
+
+        return clk;
+}
+
+static struct clk * __init
+at91sam9n12_clk_register_usb(struct at91_pmc *pmc, const char *name,
+                             const char *parent_name)
+{
+        struct at91sam9x5_clk_usb *usb;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        usb = kzalloc(sizeof(*usb), GFP_KERNEL);
+        if (!usb)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &at91sam9n12_usb_ops;
+        init.parent_names = &parent_name;
+        init.num_parents = 1;
+        init.flags = CLK_SET_RATE_GATE;
+
+        usb->hw.init = &init;
+        usb->pmc = pmc;
+
+        clk = clk_register(NULL, &usb->hw);
+        if (IS_ERR(clk))
+                kfree(usb);
+
+        return clk;
+}
+
+static unsigned long at91rm9200_clk_usb_recalc_rate(struct clk_hw *hw,
+                                                    unsigned long parent_rate)
+{
+        struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
+        struct at91_pmc *pmc = usb->pmc;
+        u32 tmp;
+        u8 usbdiv;
+
+        tmp = pmc_read(pmc, AT91_CKGR_PLLBR);
+        usbdiv = (tmp & AT91_PMC_USBDIV) >> RM9200_USB_DIV_SHIFT;
+        if (usb->divisors[usbdiv])
+                return parent_rate / usb->divisors[usbdiv];
+
+        return 0;
+}
+
+static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
+                                          unsigned long *parent_rate)
+{
+        struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
+        unsigned long bestrate = 0;
+        int bestdiff = -1;
+        unsigned long tmprate;
+        int tmpdiff;
+        int i = 0;
+
+        for (i = 0; i < 4; i++) {
+                if (!usb->divisors[i])
+                        continue;
+                tmprate = *parent_rate / usb->divisors[i];
+                if (tmprate < rate)
+                        tmpdiff = rate - tmprate;
+                else
+                        tmpdiff = tmprate - rate;
+
+                if (bestdiff < 0 || bestdiff > tmpdiff) {
+                        bestrate = tmprate;
+                        bestdiff = tmpdiff;
+                }
+
+                if (!bestdiff)
+                        break;
+        }
+
+        return bestrate;
+}
+
+static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
+                                       unsigned long parent_rate)
+{
+        u32 tmp;
+        int i;
+        struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
+        struct at91_pmc *pmc = usb->pmc;
+        unsigned long div = parent_rate / rate;
+
+        if (parent_rate % rate)
+                return -EINVAL;
+        for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) {
+                if (usb->divisors[i] == div) {
+                        tmp = pmc_read(pmc, AT91_CKGR_PLLBR) &
+                              ~AT91_PMC_USBDIV;
+                        tmp |= i << RM9200_USB_DIV_SHIFT;
+                        pmc_write(pmc, AT91_CKGR_PLLBR, tmp);
+                        return 0;
+                }
+        }
+
+        return -EINVAL;
+}
+
+static const struct clk_ops at91rm9200_usb_ops = {
+        .recalc_rate = at91rm9200_clk_usb_recalc_rate,
+        .round_rate = at91rm9200_clk_usb_round_rate,
+        .set_rate = at91rm9200_clk_usb_set_rate,
+};
+
+static struct clk * __init
+at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name,
+                            const char *parent_name, const u32 *divisors)
+{
+        struct at91rm9200_clk_usb *usb;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        usb = kzalloc(sizeof(*usb), GFP_KERNEL);
+        if (!usb)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &at91rm9200_usb_ops;
+        init.parent_names = &parent_name;
+        init.num_parents = 1;
+        init.flags = 0;
+
+        usb->hw.init = &init;
+        usb->pmc = pmc;
+        memcpy(usb->divisors, divisors, sizeof(usb->divisors));
+
+        clk = clk_register(NULL, &usb->hw);
+        if (IS_ERR(clk))
+                kfree(usb);
+
+        return clk;
+}
+
+void __init of_at91sam9x5_clk_usb_setup(struct device_node *np,
+                                        struct at91_pmc *pmc)
+{
+        struct clk *clk;
+        int i;
+        int num_parents;
+        const char *parent_names[USB_SOURCE_MAX];
+        const char *name = np->name;
+
+        num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+        if (num_parents <= 0 || num_parents > USB_SOURCE_MAX)
+                return;
+
+        for (i = 0; i < num_parents; i++) {
+                parent_names[i] = of_clk_get_parent_name(np, i);
+                if (!parent_names[i])
+                        return;
+        }
+
+        of_property_read_string(np, "clock-output-names", &name);
+
+        clk = at91sam9x5_clk_register_usb(pmc, name, parent_names, num_parents);
+        if (IS_ERR(clk))
+                return;
+
+        of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
+void __init of_at91sam9n12_clk_usb_setup(struct device_node *np,
+                                         struct at91_pmc *pmc)
+{
+        struct clk *clk;
+        const char *parent_name;
+        const char *name = np->name;
+
+        parent_name = of_clk_get_parent_name(np, 0);
+        if (!parent_name)
+                return;
+
+        of_property_read_string(np, "clock-output-names", &name);
+
+        clk = at91sam9n12_clk_register_usb(pmc, name, parent_name);
+        if (IS_ERR(clk))
+                return;
+
+        of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
+void __init of_at91rm9200_clk_usb_setup(struct device_node *np,
+                                        struct at91_pmc *pmc)
+{
+        struct clk *clk;
+        const char *parent_name;
+        const char *name = np->name;
+        u32 divisors[4] = {0, 0, 0, 0};
+
+        parent_name = of_clk_get_parent_name(np, 0);
+        if (!parent_name)
+                return;
+
+        of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4);
+        if (!divisors[0])
+                return;
+
+        of_property_read_string(np, "clock-output-names", &name);
+
+        clk = at91rm9200_clk_register_usb(pmc, name, parent_name, divisors);
+        if (IS_ERR(clk))
+                return;
+
+        of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
new file mode 100644
index 000000000000..ae3263bc1476
--- /dev/null
+++ b/drivers/clk/at91/clk-utmi.c
@@ -0,0 +1,159 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/io.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+
+#include "pmc.h"
+
+#define UTMI_FIXED_MUL          40
+
+struct clk_utmi {
+        struct clk_hw hw;
+        struct at91_pmc *pmc;
+        unsigned int irq;
+        wait_queue_head_t wait;
+};
+
+#define to_clk_utmi(hw) container_of(hw, struct clk_utmi, hw)
+
+static irqreturn_t clk_utmi_irq_handler(int irq, void *dev_id)
+{
+        struct clk_utmi *utmi = (struct clk_utmi *)dev_id;
+
+        wake_up(&utmi->wait);
+        disable_irq_nosync(utmi->irq);
+
+        return IRQ_HANDLED;
+}
+
+static int clk_utmi_prepare(struct clk_hw *hw)
+{
+        struct clk_utmi *utmi = to_clk_utmi(hw);
+        struct at91_pmc *pmc = utmi->pmc;
+        u32 tmp = at91_pmc_read(AT91_CKGR_UCKR) | AT91_PMC_UPLLEN |
+                  AT91_PMC_UPLLCOUNT | AT91_PMC_BIASEN;
+
+        pmc_write(pmc, AT91_CKGR_UCKR, tmp);
+
+        while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_LOCKU)) {
+                enable_irq(utmi->irq);
+                wait_event(utmi->wait,
+                           pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_LOCKU);
+        }
+
+        return 0;
+}
+
+static int clk_utmi_is_prepared(struct clk_hw *hw)
+{
+        struct clk_utmi *utmi = to_clk_utmi(hw);
+        struct at91_pmc *pmc = utmi->pmc;
+
+        return !!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_LOCKU);
+}
+
+static void clk_utmi_unprepare(struct clk_hw *hw)
+{
+        struct clk_utmi *utmi = to_clk_utmi(hw);
+        struct at91_pmc *pmc = utmi->pmc;
+        u32 tmp = at91_pmc_read(AT91_CKGR_UCKR) & ~AT91_PMC_UPLLEN;
+
+        pmc_write(pmc, AT91_CKGR_UCKR, tmp);
+}
+
+static unsigned long clk_utmi_recalc_rate(struct clk_hw *hw,
+                                          unsigned long parent_rate)
+{
+        /* UTMI clk is a fixed clk multiplier */
+        return parent_rate * UTMI_FIXED_MUL;
+}
+
+static const struct clk_ops utmi_ops = {
+        .prepare = clk_utmi_prepare,
+        .unprepare = clk_utmi_unprepare,
+        .is_prepared = clk_utmi_is_prepared,
+        .recalc_rate = clk_utmi_recalc_rate,
+};
+
+static struct clk * __init
+at91_clk_register_utmi(struct at91_pmc *pmc, unsigned int irq,
+                       const char *name, const char *parent_name)
+{
+        int ret;
+        struct clk_utmi *utmi;
+        struct clk *clk = NULL;
+        struct clk_init_data init;
+
+        utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
+        if (!utmi)
+                return ERR_PTR(-ENOMEM);
+
+        init.name = name;
+        init.ops = &utmi_ops;
+        init.parent_names = parent_name ? &parent_name : NULL;
+        init.num_parents = parent_name ? 1 : 0;
+        init.flags = CLK_SET_RATE_GATE;
+
+        utmi->hw.init = &init;
+        utmi->pmc = pmc;
+        utmi->irq = irq;
+        init_waitqueue_head(&utmi->wait);
+        irq_set_status_flags(utmi->irq, IRQ_NOAUTOEN);
+        ret = request_irq(utmi->irq, clk_utmi_irq_handler,
+                          IRQF_TRIGGER_HIGH, "clk-utmi", utmi);
+        if (ret)
+                return ERR_PTR(ret);
+
+        clk = clk_register(NULL, &utmi->hw);
+        if (IS_ERR(clk))
+                kfree(utmi);
+
+        return clk;
+}
+
+static void __init
+of_at91_clk_utmi_setup(struct device_node *np, struct at91_pmc *pmc)
+{
+        unsigned int irq;
+        struct clk *clk;
+        const char *parent_name;
+        const char *name = np->name;
+
+        parent_name = of_clk_get_parent_name(np, 0);
+
+        of_property_read_string(np, "clock-output-names", &name);
+
+        irq = irq_of_parse_and_map(np, 0);
+        if (!irq)
+                return;
+
+        clk = at91_clk_register_utmi(pmc, irq, name, parent_name);
+        if (IS_ERR(clk))
+                return;
+
+        of_clk_add_provider(np, of_clk_src_simple_get, clk);
+        return;
+}
+
+void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np,
+                                         struct at91_pmc *pmc)
+{
+        of_at91_clk_utmi_setup(np, pmc);
+}
diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
new file mode 100644
index 000000000000..7b9db603b936
--- /dev/null
+++ b/drivers/clk/at91/pmc.c
@@ -0,0 +1,397 @@
+/*
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_irq.h>
+
+#include <asm/proc-fns.h>
+
+#include "pmc.h"
+
+void __iomem *at91_pmc_base;
+EXPORT_SYMBOL_GPL(at91_pmc_base);
+
+void at91sam9_idle(void)
+{
+        at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+        cpu_do_idle();
+}
+
+int of_at91_get_clk_range(struct device_node *np, const char *propname,
+                          struct clk_range *range)
+{
+        u32 min, max;
+        int ret;
+
+        ret = of_property_read_u32_index(np, propname, 0, &min);
+        if (ret)
+                return ret;
+
+        ret = of_property_read_u32_index(np, propname, 1, &max);
+        if (ret)
+                return ret;
+
+        if (range) {
+                range->min = min;
+                range->max = max;
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(of_at91_get_clk_range);
+
+static void pmc_irq_mask(struct irq_data *d)
+{
+        struct at91_pmc *pmc = irq_data_get_irq_chip_data(d);
+
+        pmc_write(pmc, AT91_PMC_IDR, 1 << d->hwirq);
+}
+
+static void pmc_irq_unmask(struct irq_data *d)
+{
+        struct at91_pmc *pmc = irq_data_get_irq_chip_data(d);
+
+        pmc_write(pmc, AT91_PMC_IER, 1 << d->hwirq);
+}
+
+static int pmc_irq_set_type(struct irq_data *d, unsigned type)
+{
+        if (type != IRQ_TYPE_LEVEL_HIGH) {
+                pr_warn("PMC: type not supported (support only IRQ_TYPE_LEVEL_HIGH type)\n");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static struct irq_chip pmc_irq = {
+        .name = "PMC",
+        .irq_disable = pmc_irq_mask,
+        .irq_mask = pmc_irq_mask,
+        .irq_unmask = pmc_irq_unmask,
+        .irq_set_type = pmc_irq_set_type,
+};
+
+static struct lock_class_key pmc_lock_class;
+
+static int pmc_irq_map(struct irq_domain *h, unsigned int virq,
+                       irq_hw_number_t hw)
+{
+        struct at91_pmc *pmc = h->host_data;
+
+        irq_set_lockdep_class(virq, &pmc_lock_class);
+
+        irq_set_chip_and_handler(virq, &pmc_irq,
+                                 handle_level_irq);
+        set_irq_flags(virq, IRQF_VALID);
+        irq_set_chip_data(virq, pmc);
+
+        return 0;
+}
+
+static int pmc_irq_domain_xlate(struct irq_domain *d,
+                                struct device_node *ctrlr,
+                                const u32 *intspec, unsigned int intsize,
+                                irq_hw_number_t *out_hwirq,
+                                unsigned int *out_type)
+{
+        struct at91_pmc *pmc = d->host_data;
+        const struct at91_pmc_caps *caps = pmc->caps;
+
+        if (WARN_ON(intsize < 1))
+                return -EINVAL;
+
+        *out_hwirq = intspec[0];
+
+        if (!(caps->available_irqs & (1 << *out_hwirq)))
+                return -EINVAL;
+
+        *out_type = IRQ_TYPE_LEVEL_HIGH;
+
+        return 0;
+}
+
+static struct irq_domain_ops pmc_irq_ops = {
+        .map    = pmc_irq_map,
+        .xlate  = pmc_irq_domain_xlate,
+};
+
+static irqreturn_t pmc_irq_handler(int irq, void *data)
+{
+        struct at91_pmc *pmc = (struct at91_pmc *)data;
+        unsigned long sr;
+        int n;
+
+        sr = pmc_read(pmc, AT91_PMC_SR) & pmc_read(pmc, AT91_PMC_IMR);
+        if (!sr)
+                return IRQ_NONE;
+
+        for_each_set_bit(n, &sr, BITS_PER_LONG)
+                generic_handle_irq(irq_find_mapping(pmc->irqdomain, n));
+
+        return IRQ_HANDLED;
+}
+
+static const struct at91_pmc_caps at91rm9200_caps = {
+        .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB |
+                          AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY |
+                          AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY |
+                          AT91_PMC_PCK3RDY,
+};
+
+static const struct at91_pmc_caps at91sam9260_caps = {
+        .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB |
+                          AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY |
+                          AT91_PMC_PCK1RDY,
+};
+
+static const struct at91_pmc_caps at91sam9g45_caps = {
+        .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
+                          AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
+                          AT91_PMC_PCK1RDY,
+};
+
+static const struct at91_pmc_caps at91sam9n12_caps = {
+        .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB |
+                          AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY |
+                          AT91_PMC_PCK1RDY | AT91_PMC_MOSCSELS |
+                          AT91_PMC_MOSCRCS | AT91_PMC_CFDEV,
+};
+
+static const struct at91_pmc_caps at91sam9x5_caps = {
+        .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
+                          AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
+                          AT91_PMC_PCK1RDY | AT91_PMC_MOSCSELS |
+                          AT91_PMC_MOSCRCS | AT91_PMC_CFDEV,
+};
+
+static const struct at91_pmc_caps sama5d3_caps = {
+        .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
+                          AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
+                          AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY |
+                          AT91_PMC_MOSCSELS | AT91_PMC_MOSCRCS |
+                          AT91_PMC_CFDEV,
+};
+
+static struct at91_pmc *__init at91_pmc_init(struct device_node *np,
+                                             void __iomem *regbase, int virq,
+                                             const struct at91_pmc_caps *caps)
+{
+        struct at91_pmc *pmc;
+
+        if (!regbase || !virq ||  !caps)
+                return NULL;
+
+        at91_pmc_base = regbase;
+
+        pmc = kzalloc(sizeof(*pmc), GFP_KERNEL);
+        if (!pmc)
+                return NULL;
+
+        spin_lock_init(&pmc->lock);
+        pmc->regbase = regbase;
+        pmc->virq = virq;
+        pmc->caps = caps;
+
+        pmc->irqdomain = irq_domain_add_linear(np, 32, &pmc_irq_ops, pmc);
+
+        if (!pmc->irqdomain)
+                goto out_free_pmc;
+
+        pmc_write(pmc, AT91_PMC_IDR, 0xffffffff);
+        if (request_irq(pmc->virq, pmc_irq_handler, IRQF_SHARED, "pmc", pmc))
+                goto out_remove_irqdomain;
+
+        return pmc;
+
+out_remove_irqdomain:
+        irq_domain_remove(pmc->irqdomain);
+out_free_pmc:
+        kfree(pmc);
+
+        return NULL;
+}
+
+static const struct of_device_id pmc_clk_ids[] __initdata = {
+        /* Main clock */
+        {
+                .compatible = "atmel,at91rm9200-clk-main",
+                .data = of_at91rm9200_clk_main_setup,
+        },
+        /* PLL clocks */
+        {
+                .compatible = "atmel,at91rm9200-clk-pll",
+                .data = of_at91rm9200_clk_pll_setup,
+        },
+        {
+                .compatible = "atmel,at91sam9g45-clk-pll",
+                .data = of_at91sam9g45_clk_pll_setup,
+        },
+        {
+                .compatible = "atmel,at91sam9g20-clk-pllb",
+                .data = of_at91sam9g20_clk_pllb_setup,
+        },
+        {
+                .compatible = "atmel,sama5d3-clk-pll",
+                .data = of_sama5d3_clk_pll_setup,
+        },
+        {
+                .compatible = "atmel,at91sam9x5-clk-plldiv",
+                .data = of_at91sam9x5_clk_plldiv_setup,
+        },
+        /* Master clock */
+        {
+                .compatible = "atmel,at91rm9200-clk-master",
+                .data = of_at91rm9200_clk_master_setup,
+        },
+        {
+                .compatible = "atmel,at91sam9x5-clk-master",
+                .data = of_at91sam9x5_clk_master_setup,
+        },
+        /* System clocks */
+        {
+                .compatible = "atmel,at91rm9200-clk-system",
+                .data = of_at91rm9200_clk_sys_setup,
+        },
+        /* Peripheral clocks */
+        {
+                .compatible = "atmel,at91rm9200-clk-peripheral",
+                .data = of_at91rm9200_clk_periph_setup,
+        },
+        {
+                .compatible = "atmel,at91sam9x5-clk-peripheral",
+                .data = of_at91sam9x5_clk_periph_setup,
+        },
+        /* Programmable clocks */
+#if defined(CONFIG_AT91_PROGRAMMABLE_CLOCKS)
+        {
+                .compatible = "atmel,at91rm9200-clk-programmable",
+                .data = of_at91rm9200_clk_prog_setup,
+        },
+        {
+                .compatible = "atmel,at91sam9g45-clk-programmable",
+                .data = of_at91sam9g45_clk_prog_setup,
+        },
+        {
+                .compatible = "atmel,at91sam9x5-clk-programmable",
+                .data = of_at91sam9x5_clk_prog_setup,
+        },
+#endif
+        /* UTMI clock */
+#if defined(CONFIG_HAVE_AT91_UTMI)
+        {
+                .compatible = "atmel,at91sam9x5-clk-utmi",
+                .data = of_at91sam9x5_clk_utmi_setup,
+        },
+#endif
+        /* USB clock */
+#if defined(CONFIG_HAVE_AT91_USB_CLK)
+        {
+                .compatible = "atmel,at91rm9200-clk-usb",
+                .data = of_at91rm9200_clk_usb_setup,
+        },
+        {
+                .compatible = "atmel,at91sam9x5-clk-usb",
+                .data = of_at91sam9x5_clk_usb_setup,
+        },
+        {
+                .compatible = "atmel,at91sam9n12-clk-usb",
+                .data = of_at91sam9n12_clk_usb_setup,
+        },
+#endif
+        /* SMD clock */
+#if defined(CONFIG_HAVE_AT91_SMD)
+        {
+                .compatible = "atmel,at91sam9x5-clk-smd",
+                .data = of_at91sam9x5_clk_smd_setup,
+        },
+#endif
+        { /*sentinel*/ }
+};
+
+static void __init of_at91_pmc_setup(struct device_node *np,
+                                     const struct at91_pmc_caps *caps)
+{
+        struct at91_pmc *pmc;
+        struct device_node *childnp;
+        void (*clk_setup)(struct device_node *, struct at91_pmc *);
+        const struct of_device_id *clk_id;
+        void __iomem *regbase = of_iomap(np, 0);
+        int virq;
+
+        if (!regbase)
+                return;
+
+        virq = irq_of_parse_and_map(np, 0);
+        if (!virq)
+                return;
+
+        pmc = at91_pmc_init(np, regbase, virq, caps);
+        if (!pmc)
+                return;
+        for_each_child_of_node(np, childnp) {
+                clk_id = of_match_node(pmc_clk_ids, childnp);
+                if (!clk_id)
+                        continue;
+                clk_setup = clk_id->data;
+                clk_setup(childnp, pmc);
+        }
+}
+
+static void __init of_at91rm9200_pmc_setup(struct device_node *np)
+{
+        of_at91_pmc_setup(np, &at91rm9200_caps);
+}
+CLK_OF_DECLARE(at91rm9200_clk_pmc, "atmel,at91rm9200-pmc",
+               of_at91rm9200_pmc_setup);
+
+static void __init of_at91sam9260_pmc_setup(struct device_node *np)
+{
+        of_at91_pmc_setup(np, &at91sam9260_caps);
+}
+CLK_OF_DECLARE(at91sam9260_clk_pmc, "atmel,at91sam9260-pmc",
+               of_at91sam9260_pmc_setup);
+
+static void __init of_at91sam9g45_pmc_setup(struct device_node *np)
+{
+        of_at91_pmc_setup(np, &at91sam9g45_caps);
+}
+CLK_OF_DECLARE(at91sam9g45_clk_pmc, "atmel,at91sam9g45-pmc",
+               of_at91sam9g45_pmc_setup);
+
+static void __init of_at91sam9n12_pmc_setup(struct device_node *np)
+{
+        of_at91_pmc_setup(np, &at91sam9n12_caps);
+}
+CLK_OF_DECLARE(at91sam9n12_clk_pmc, "atmel,at91sam9n12-pmc",
+               of_at91sam9n12_pmc_setup);
+
+static void __init of_at91sam9x5_pmc_setup(struct device_node *np)
+{
+        of_at91_pmc_setup(np, &at91sam9x5_caps);
+}
+CLK_OF_DECLARE(at91sam9x5_clk_pmc, "atmel,at91sam9x5-pmc",
+               of_at91sam9x5_pmc_setup);
+
+static void __init of_sama5d3_pmc_setup(struct device_node *np)
+{
+        of_at91_pmc_setup(np, &sama5d3_caps);
+}
+CLK_OF_DECLARE(sama5d3_clk_pmc, "atmel,sama5d3-pmc",
+               of_sama5d3_pmc_setup);
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
new file mode 100644
index 000000000000..ba8d14233f80
--- /dev/null
+++ b/drivers/clk/at91/pmc.h
@@ -0,0 +1,116 @@
+/*
+ * drivers/clk/at91/pmc.h
+ *
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __PMC_H_
+#define __PMC_H_
+
+#include <linux/io.h>
+#include <linux/irqdomain.h>
+#include <linux/spinlock.h>
+
+struct clk_range {
+        unsigned long min;
+        unsigned long max;
+};
+
+#define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,}
+
+struct at91_pmc_caps {
+        u32 available_irqs;
+};
+
+struct at91_pmc {
+        void __iomem *regbase;
+        int virq;
+        spinlock_t lock;
+        const struct at91_pmc_caps *caps;
+        struct irq_domain *irqdomain;
+};
+
+static inline void pmc_lock(struct at91_pmc *pmc)
+{
+        spin_lock(&pmc->lock);
+}
+
+static inline void pmc_unlock(struct at91_pmc *pmc)
+{
+        spin_unlock(&pmc->lock);
+}
+
+static inline u32 pmc_read(struct at91_pmc *pmc, int offset)
+{
+        return readl(pmc->regbase + offset);
+}
+
+static inline void pmc_write(struct at91_pmc *pmc, int offset, u32 value)
+{
+        writel(value, pmc->regbase + offset);
+}
+
+int of_at91_get_clk_range(struct device_node *np, const char *propname,
+                          struct clk_range *range);
+
+extern void __init of_at91rm9200_clk_main_setup(struct device_node *np,
+                                                struct at91_pmc *pmc);
+
+extern void __init of_at91rm9200_clk_pll_setup(struct device_node *np,
+                                               struct at91_pmc *pmc);
+extern void __init of_at91sam9g45_clk_pll_setup(struct device_node *np,
+                                                struct at91_pmc *pmc);
+extern void __init of_at91sam9g20_clk_pllb_setup(struct device_node *np,
+                                                 struct at91_pmc *pmc);
+extern void __init of_sama5d3_clk_pll_setup(struct device_node *np,
+                                            struct at91_pmc *pmc);
+extern void __init of_at91sam9x5_clk_plldiv_setup(struct device_node *np,
+                                                  struct at91_pmc *pmc);
+
+extern void __init of_at91rm9200_clk_master_setup(struct device_node *np,
+                                                  struct at91_pmc *pmc);
+extern void __init of_at91sam9x5_clk_master_setup(struct device_node *np,
+                                                  struct at91_pmc *pmc);
+
+extern void __init of_at91rm9200_clk_sys_setup(struct device_node *np,
+                                               struct at91_pmc *pmc);
+
+extern void __init of_at91rm9200_clk_periph_setup(struct device_node *np,
+                                                  struct at91_pmc *pmc);
+extern void __init of_at91sam9x5_clk_periph_setup(struct device_node *np,
+                                                  struct at91_pmc *pmc);
+
+#if defined(CONFIG_AT91_PROGRAMMABLE_CLOCKS)
+extern void __init of_at91rm9200_clk_prog_setup(struct device_node *np,
+                                                struct at91_pmc *pmc);
+extern void __init of_at91sam9g45_clk_prog_setup(struct device_node *np,
+                                                 struct at91_pmc *pmc);
+extern void __init of_at91sam9x5_clk_prog_setup(struct device_node *np,
+                                                struct at91_pmc *pmc);
+#endif
+
+#if defined(CONFIG_HAVE_AT91_UTMI)
+extern void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np,
+                                                struct at91_pmc *pmc);
+#endif
+
+#if defined(CONFIG_HAVE_AT91_USB_CLK)
+extern void __init of_at91rm9200_clk_usb_setup(struct device_node *np,
+                                               struct at91_pmc *pmc);
+extern void __init of_at91sam9x5_clk_usb_setup(struct device_node *np,
+                                               struct at91_pmc *pmc);
+extern void __init of_at91sam9n12_clk_usb_setup(struct device_node *np,
+                                                struct at91_pmc *pmc);
+#endif
+
+#if defined(CONFIG_HAVE_AT91_SMD)
+extern void __init of_at91sam9x5_clk_smd_setup(struct device_node *np,
+                                               struct at91_pmc *pmc);
+#endif
+
+#endif /* __PMC_H_ */
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index ad5ff50c5f28..d967571d305e 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -530,7 +530,8 @@ static struct samsung_div_clock exynos4_div_clks[] __initdata = {
         DIV(sclk_i2s1, "sclk_i2s1", "sclk_audio1", DIV_PERIL5, 0, 6),
         DIV(sclk_i2s2, "sclk_i2s2", "sclk_audio2", DIV_PERIL5, 8, 6),
         DIV(none, "div_mmc4", "mout_mmc4", DIV_FSYS3, 0, 4),
-        DIV(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8),
+        DIV_F(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8,
+                        CLK_SET_RATE_PARENT, 0),
         DIV(none, "div_uart0", "mout_uart0", DIV_PERIL0, 0, 4),
         DIV(none, "div_uart1", "mout_uart1", DIV_PERIL0, 4, 4),
         DIV(none, "div_uart2", "mout_uart2", DIV_PERIL0, 8, 4),
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 62b0de6a1837..48f76bc05da0 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -71,6 +71,10 @@ enum {
         MCT_L1_IRQ,
         MCT_L2_IRQ,
         MCT_L3_IRQ,
+        MCT_L4_IRQ,
+        MCT_L5_IRQ,
+        MCT_L6_IRQ,
+        MCT_L7_IRQ,
         MCT_NR_IRQS,
 };
 
diff --git a/drivers/clocksource/nomadik-mtu.c b/drivers/clocksource/nomadik-mtu.c
index ed7b73b508e0..f00b5c9ce8b6 100644
--- a/drivers/clocksource/nomadik-mtu.c
+++ b/drivers/clocksource/nomadik-mtu.c
@@ -20,7 +20,6 @@
 #include <linux/jiffies.h>
 #include <linux/delay.h>
 #include <linux/err.h>
-#include <linux/platform_data/clocksource-nomadik-mtu.h>
 #include <linux/sched_clock.h>
 #include <asm/mach/time.h>
 
@@ -103,7 +102,7 @@ static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev)
         return 0;
 }
 
-void nmdk_clkevt_reset(void)
+static void nmdk_clkevt_reset(void)
 {
         if (clkevt_periodic) {
                 /* Timer: configure load and background-load, and fire it up */
@@ -144,7 +143,7 @@ static void nmdk_clkevt_mode(enum clock_event_mode mode,
         }
 }
 
-void nmdk_clksrc_reset(void)
+static void nmdk_clksrc_reset(void)
 {
         /* Disable */
         writel(0, mtu_base + MTU_CR(0));
@@ -192,8 +191,8 @@ static struct irqaction nmdk_timer_irq = {
         .dev_id         = &nmdk_clkevt,
 };
 
-static void __init __nmdk_timer_init(void __iomem *base, int irq,
-                                     struct clk *pclk, struct clk *clk)
+static void __init nmdk_timer_init(void __iomem *base, int irq,
+                                   struct clk *pclk, struct clk *clk)
 {
         unsigned long rate;
 
@@ -245,18 +244,6 @@ static void __init __nmdk_timer_init(void __iomem *base, int irq,
         register_current_timer_delay(&mtu_delay_timer);
 }
 
-void __init nmdk_timer_init(void __iomem *base, int irq)
-{
-        struct clk *clk0, *pclk0;
-
-        pclk0 = clk_get_sys("mtu0", "apb_pclk");
-        BUG_ON(IS_ERR(pclk0));
-        clk0 = clk_get_sys("mtu0", NULL);
-        BUG_ON(IS_ERR(clk0));
-
-        __nmdk_timer_init(base, irq, pclk0, clk0);
-}
-
 static void __init nmdk_timer_of_init(struct device_node *node)
 {
         struct clk *pclk;
@@ -280,7 +267,7 @@ static void __init nmdk_timer_of_init(struct device_node *node)
         if (irq <= 0)
                 panic("Can't parse IRQ");
 
-        __nmdk_timer_init(base, irq, pclk, clk);
+        nmdk_timer_init(base, irq, pclk, clk);
 }
 CLOCKSOURCE_OF_DECLARE(nomadik_mtu, "st,nomadik-mtu",
                        nmdk_timer_of_init);
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index b8c031b7de4e..00a2de957b23 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -2409,6 +2409,7 @@ static void d40_set_prio_realtime(struct d40_chan *d40c)
 #define D40_DT_FLAGS_DIR(flags)        ((flags >> 1) & 0x1)
 #define D40_DT_FLAGS_BIG_ENDIAN(flags) ((flags >> 2) & 0x1)
 #define D40_DT_FLAGS_FIXED_CHAN(flags) ((flags >> 3) & 0x1)
+#define D40_DT_FLAGS_HIGH_PRIO(flags)  ((flags >> 4) & 0x1)
 
 static struct dma_chan *d40_xlate(struct of_phandle_args *dma_spec,
                                   struct of_dma *ofdma)
@@ -2446,6 +2447,9 @@ static struct dma_chan *d40_xlate(struct of_phandle_args *dma_spec,
                 cfg.use_fixed_channel = true;
         }
 
+        if (D40_DT_FLAGS_HIGH_PRIO(flags))
+                cfg.high_priority = true;
+
         return dma_request_channel(cap, stedma40_filter, &cfg);
 }
 
diff --git a/drivers/pinctrl/pinctrl-nomadik.c b/drivers/pinctrl/pinctrl-nomadik.c
index 7111c3b59130..983662e846a4 100644
--- a/drivers/pinctrl/pinctrl-nomadik.c
+++ b/drivers/pinctrl/pinctrl-nomadik.c
@@ -4,7 +4,7 @@
  * Copyright (C) 2008,2009 STMicroelectronics
  * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
  *   Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
- * Copyright (C) 2011 Linus Walleij <linus.walleij@linaro.org>
+ * Copyright (C) 2011-2013 Linus Walleij <linus.walleij@linaro.org>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -33,7 +33,6 @@
 #include <linux/pinctrl/pinconf.h>
 /* Since we request GPIOs from ourself */
 #include <linux/pinctrl/consumer.h>
-#include <linux/platform_data/pinctrl-nomadik.h>
 #include "pinctrl-nomadik.h"
 #include "core.h"
 
@@ -45,6 +44,221 @@
  * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
  */
 
+/*
+ * pin configurations are represented by 32-bit integers:
+ *
+ *      bit  0.. 8 - Pin Number (512 Pins Maximum)
+ *      bit  9..10 - Alternate Function Selection
+ *      bit 11..12 - Pull up/down state
+ *      bit     13 - Sleep mode behaviour
+ *      bit     14 - Direction
+ *      bit     15 - Value (if output)
+ *      bit 16..18 - SLPM pull up/down state
+ *      bit 19..20 - SLPM direction
+ *      bit 21..22 - SLPM Value (if output)
+ *      bit 23..25 - PDIS value (if input)
+ *      bit     26 - Gpio mode
+ *      bit     27 - Sleep mode
+ *
+ * to facilitate the definition, the following macros are provided
+ *
+ * PIN_CFG_DEFAULT - default config (0):
+ *                   pull up/down = disabled
+ *                   sleep mode = input/wakeup
+ *                   direction = input
+ *                   value = low
+ *                   SLPM direction = same as normal
+ *                   SLPM pull = same as normal
+ *                   SLPM value = same as normal
+ *
+ * PIN_CFG         - default config with alternate function
+ */
+
+typedef unsigned long pin_cfg_t;
+
+#define PIN_NUM_MASK            0x1ff
+#define PIN_NUM(x)              ((x) & PIN_NUM_MASK)
+
+#define PIN_ALT_SHIFT           9
+#define PIN_ALT_MASK            (0x3 << PIN_ALT_SHIFT)
+#define PIN_ALT(x)              (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
+#define PIN_GPIO                (NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
+#define PIN_ALT_A               (NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
+#define PIN_ALT_B               (NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
+#define PIN_ALT_C               (NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
+
+#define PIN_PULL_SHIFT          11
+#define PIN_PULL_MASK           (0x3 << PIN_PULL_SHIFT)
+#define PIN_PULL(x)             (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
+#define PIN_PULL_NONE           (NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
+#define PIN_PULL_UP             (NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
+#define PIN_PULL_DOWN           (NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
+
+#define PIN_SLPM_SHIFT          13
+#define PIN_SLPM_MASK           (0x1 << PIN_SLPM_SHIFT)
+#define PIN_SLPM(x)             (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
+#define PIN_SLPM_MAKE_INPUT     (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
+#define PIN_SLPM_NOCHANGE       (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
+/* These two replace the above in DB8500v2+ */
+#define PIN_SLPM_WAKEUP_ENABLE  (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
+#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
+#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
+
+#define PIN_SLPM_GPIO  PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
+#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
+
+#define PIN_DIR_SHIFT           14
+#define PIN_DIR_MASK            (0x1 << PIN_DIR_SHIFT)
+#define PIN_DIR(x)              (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
+#define PIN_DIR_INPUT           (0 << PIN_DIR_SHIFT)
+#define PIN_DIR_OUTPUT          (1 << PIN_DIR_SHIFT)
+
+#define PIN_VAL_SHIFT           15
+#define PIN_VAL_MASK            (0x1 << PIN_VAL_SHIFT)
+#define PIN_VAL(x)              (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
+#define PIN_VAL_LOW             (0 << PIN_VAL_SHIFT)
+#define PIN_VAL_HIGH            (1 << PIN_VAL_SHIFT)
+
+#define PIN_SLPM_PULL_SHIFT     16
+#define PIN_SLPM_PULL_MASK      (0x7 << PIN_SLPM_PULL_SHIFT)
+#define PIN_SLPM_PULL(x)        \
+        (((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT)
+#define PIN_SLPM_PULL_NONE      \
+        ((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT)
+#define PIN_SLPM_PULL_UP        \
+        ((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT)
+#define PIN_SLPM_PULL_DOWN      \
+        ((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT)
+
+#define PIN_SLPM_DIR_SHIFT      19
+#define PIN_SLPM_DIR_MASK       (0x3 << PIN_SLPM_DIR_SHIFT)
+#define PIN_SLPM_DIR(x)         \
+        (((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT)
+#define PIN_SLPM_DIR_INPUT      ((1 + 0) << PIN_SLPM_DIR_SHIFT)
+#define PIN_SLPM_DIR_OUTPUT     ((1 + 1) << PIN_SLPM_DIR_SHIFT)
+
+#define PIN_SLPM_VAL_SHIFT      21
+#define PIN_SLPM_VAL_MASK       (0x3 << PIN_SLPM_VAL_SHIFT)
+#define PIN_SLPM_VAL(x)         \
+        (((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT)
+#define PIN_SLPM_VAL_LOW        ((1 + 0) << PIN_SLPM_VAL_SHIFT)
+#define PIN_SLPM_VAL_HIGH       ((1 + 1) << PIN_SLPM_VAL_SHIFT)
+
+#define PIN_SLPM_PDIS_SHIFT             23
+#define PIN_SLPM_PDIS_MASK              (0x3 << PIN_SLPM_PDIS_SHIFT)
+#define PIN_SLPM_PDIS(x)        \
+        (((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
+#define PIN_SLPM_PDIS_NO_CHANGE         (0 << PIN_SLPM_PDIS_SHIFT)
+#define PIN_SLPM_PDIS_DISABLED          (1 << PIN_SLPM_PDIS_SHIFT)
+#define PIN_SLPM_PDIS_ENABLED           (2 << PIN_SLPM_PDIS_SHIFT)
+
+#define PIN_LOWEMI_SHIFT        25
+#define PIN_LOWEMI_MASK         (0x1 << PIN_LOWEMI_SHIFT)
+#define PIN_LOWEMI(x)           (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
+#define PIN_LOWEMI_DISABLED     (0 << PIN_LOWEMI_SHIFT)
+#define PIN_LOWEMI_ENABLED      (1 << PIN_LOWEMI_SHIFT)
+
+#define PIN_GPIOMODE_SHIFT      26
+#define PIN_GPIOMODE_MASK       (0x1 << PIN_GPIOMODE_SHIFT)
+#define PIN_GPIOMODE(x)         (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
+#define PIN_GPIOMODE_DISABLED   (0 << PIN_GPIOMODE_SHIFT)
+#define PIN_GPIOMODE_ENABLED    (1 << PIN_GPIOMODE_SHIFT)
+
+#define PIN_SLEEPMODE_SHIFT     27
+#define PIN_SLEEPMODE_MASK      (0x1 << PIN_SLEEPMODE_SHIFT)
+#define PIN_SLEEPMODE(x)        (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
+#define PIN_SLEEPMODE_DISABLED  (0 << PIN_SLEEPMODE_SHIFT)
+#define PIN_SLEEPMODE_ENABLED   (1 << PIN_SLEEPMODE_SHIFT)
+
+
+/* Shortcuts.  Use these instead of separate DIR, PULL, and VAL.  */
+#define PIN_INPUT_PULLDOWN      (PIN_DIR_INPUT | PIN_PULL_DOWN)
+#define PIN_INPUT_PULLUP        (PIN_DIR_INPUT | PIN_PULL_UP)
+#define PIN_INPUT_NOPULL        (PIN_DIR_INPUT | PIN_PULL_NONE)
+#define PIN_OUTPUT_LOW          (PIN_DIR_OUTPUT | PIN_VAL_LOW)
+#define PIN_OUTPUT_HIGH         (PIN_DIR_OUTPUT | PIN_VAL_HIGH)
+
+#define PIN_SLPM_INPUT_PULLDOWN (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
+#define PIN_SLPM_INPUT_PULLUP   (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
+#define PIN_SLPM_INPUT_NOPULL   (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
+#define PIN_SLPM_OUTPUT_LOW     (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
+#define PIN_SLPM_OUTPUT_HIGH    (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
+
+#define PIN_CFG_DEFAULT         (0)
+
+#define PIN_CFG(num, alt)               \
+        (PIN_CFG_DEFAULT |\
+         (PIN_NUM(num) | PIN_##alt))
+
+#define PIN_CFG_INPUT(num, alt, pull)           \
+        (PIN_CFG_DEFAULT |\
+         (PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull))
+
+#define PIN_CFG_OUTPUT(num, alt, val)           \
+        (PIN_CFG_DEFAULT |\
+         (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
+
+/*
+ * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
+ * the "gpio" namespace for generic and cross-machine functions
+ */
+
+#define GPIO_BLOCK_SHIFT 5
+#define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT)
+
+/* Register in the logic block */
+#define NMK_GPIO_DAT    0x00
+#define NMK_GPIO_DATS   0x04
+#define NMK_GPIO_DATC   0x08
+#define NMK_GPIO_PDIS   0x0c
+#define NMK_GPIO_DIR    0x10
+#define NMK_GPIO_DIRS   0x14
+#define NMK_GPIO_DIRC   0x18
+#define NMK_GPIO_SLPC   0x1c
+#define NMK_GPIO_AFSLA  0x20
+#define NMK_GPIO_AFSLB  0x24
+#define NMK_GPIO_LOWEMI 0x28
+
+#define NMK_GPIO_RIMSC  0x40
+#define NMK_GPIO_FIMSC  0x44
+#define NMK_GPIO_IS     0x48
+#define NMK_GPIO_IC     0x4c
+#define NMK_GPIO_RWIMSC 0x50
+#define NMK_GPIO_FWIMSC 0x54
+#define NMK_GPIO_WKS    0x58
+/* These appear in DB8540 and later ASICs */
+#define NMK_GPIO_EDGELEVEL 0x5C
+#define NMK_GPIO_LEVEL  0x60
+
+
+/* Pull up/down values */
+enum nmk_gpio_pull {
+        NMK_GPIO_PULL_NONE,
+        NMK_GPIO_PULL_UP,
+        NMK_GPIO_PULL_DOWN,
+};
+
+/* Sleep mode */
+enum nmk_gpio_slpm {
+        NMK_GPIO_SLPM_INPUT,
+        NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
+        NMK_GPIO_SLPM_NOCHANGE,
+        NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
+};
+
+/*
+ * Platform data to register a block: only the initial gpio/irq number.
+ */
+struct nmk_gpio_platform_data {
+        char *name;
+        int first_gpio;
+        int first_irq;
+        int num_gpio;
+        u32 (*get_secondary_status)(unsigned int bank);
+        void (*set_ioforce)(bool enable);
+        bool supports_sleepmode;
+};
+
 struct nmk_gpio_chip {
         struct gpio_chip chip;
         struct irq_domain *domain;
@@ -1026,7 +1240,7 @@ static const struct irq_domain_ops nmk_gpio_irq_simple_ops = {
 
 static int nmk_gpio_probe(struct platform_device *dev)
 {
-        struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
+        struct nmk_gpio_platform_data *pdata;
         struct device_node *np = dev->dev.of_node;
         struct nmk_gpio_chip *nmk_chip;
         struct gpio_chip *chip;
@@ -1034,32 +1248,24 @@ static int nmk_gpio_probe(struct platform_device *dev)
         struct clk *clk;
         int secondary_irq;
         void __iomem *base;
-        int irq_start = 0;
         int irq;
         int ret;
 
-        if (!pdata && !np) {
-                dev_err(&dev->dev, "No platform data or device tree found\n");
-                return -ENODEV;
-        }
-
-        if (np) {
-                pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL);
-                if (!pdata)
-                        return -ENOMEM;
-
-                if (of_get_property(np, "st,supports-sleepmode", NULL))
-                        pdata->supports_sleepmode = true;
+        pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL);
+        if (!pdata)
+                return -ENOMEM;
 
-                if (of_property_read_u32(np, "gpio-bank", &dev->id)) {
-                        dev_err(&dev->dev, "gpio-bank property not found\n");
-                        return -EINVAL;
-                }
+        if (of_get_property(np, "st,supports-sleepmode", NULL))
+                pdata->supports_sleepmode = true;
 
-                pdata->first_gpio = dev->id * NMK_GPIO_PER_CHIP;
-                pdata->num_gpio   = NMK_GPIO_PER_CHIP;
+        if (of_property_read_u32(np, "gpio-bank", &dev->id)) {
+                dev_err(&dev->dev, "gpio-bank property not found\n");
+                return -EINVAL;
         }
 
+        pdata->first_gpio = dev->id * NMK_GPIO_PER_CHIP;
+        pdata->num_gpio = NMK_GPIO_PER_CHIP;
+
         irq = platform_get_irq(dev, 0);
         if (irq < 0)
                 return irq;
@@ -1107,10 +1313,7 @@ static int nmk_gpio_probe(struct platform_device *dev)
         clk_enable(nmk_chip->clk);
         nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI);
         clk_disable(nmk_chip->clk);
-
-#ifdef CONFIG_OF_GPIO
         chip->of_node = np;
-#endif
 
         ret = gpiochip_add(&nmk_chip->chip);
         if (ret)
@@ -1122,10 +1325,8 @@ static int nmk_gpio_probe(struct platform_device *dev)
 
         platform_set_drvdata(dev, nmk_chip);
 
-        if (!np)
-                irq_start = pdata->first_irq;
         nmk_chip->domain = irq_domain_add_simple(np,
-                                NMK_GPIO_PER_CHIP, irq_start,
+                                NMK_GPIO_PER_CHIP, 0,
                                 &nmk_gpio_irq_simple_ops, nmk_chip);
         if (!nmk_chip->domain) {
                 dev_err(&dev->dev, "failed to create irqdomain\n");
@@ -1858,11 +2059,10 @@ static int nmk_pinctrl_resume(struct platform_device *pdev)
 
 static int nmk_pinctrl_probe(struct platform_device *pdev)
 {
-        const struct platform_device_id *platid = platform_get_device_id(pdev);
+        const struct of_device_id *match;
         struct device_node *np = pdev->dev.of_node;
         struct device_node *prcm_np;
         struct nmk_pinctrl *npct;
-        struct resource *res;
         unsigned int version = 0;
         int i;
 
@@ -1870,16 +2070,10 @@ static int nmk_pinctrl_probe(struct platform_device *pdev)
         if (!npct)
                 return -ENOMEM;
 
-        if (platid)
-                version = platid->driver_data;
-        else if (np) {
-                const struct of_device_id *match;
-
-                match = of_match_device(nmk_pinctrl_match, &pdev->dev);
-                if (!match)
-                        return -ENODEV;
-                version = (unsigned int) match->data;
-        }
+        match = of_match_device(nmk_pinctrl_match, &pdev->dev);
+        if (!match)
+                return -ENODEV;
+        version = (unsigned int) match->data;
 
         /* Poke in other ASIC variants here */
         if (version == PINCTRL_NMK_STN8815)
@@ -1889,17 +2083,9 @@ static int nmk_pinctrl_probe(struct platform_device *pdev)
         if (version == PINCTRL_NMK_DB8540)
                 nmk_pinctrl_db8540_init(&npct->soc);
 
-        if (np) {
-                prcm_np = of_parse_phandle(np, "prcm", 0);
-                if (prcm_np)
-                        npct->prcm_base = of_iomap(prcm_np, 0);
-        }
-
-        /* Allow platform passed information to over-write DT. */
-        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (res)
-                npct->prcm_base = devm_ioremap(&pdev->dev, res->start,
-                                               resource_size(res));
+        prcm_np = of_parse_phandle(np, "prcm", 0);
+        if (prcm_np)
+                npct->prcm_base = of_iomap(prcm_np, 0);
         if (!npct->prcm_base) {
                 if (version == PINCTRL_NMK_STN8815) {
                         dev_info(&pdev->dev,
@@ -1958,13 +2144,6 @@ static struct platform_driver nmk_gpio_driver = {
         .probe = nmk_gpio_probe,
 };
 
-static const struct platform_device_id nmk_pinctrl_id[] = {
-        { "pinctrl-stn8815", PINCTRL_NMK_STN8815 },
-        { "pinctrl-db8500", PINCTRL_NMK_DB8500 },
-        { "pinctrl-db8540", PINCTRL_NMK_DB8540 },
-        { }
-};
-
 static struct platform_driver nmk_pinctrl_driver = {
         .driver = {
                 .owner = THIS_MODULE,
@@ -1972,7 +2151,6 @@ static struct platform_driver nmk_pinctrl_driver = {
                 .of_match_table = nmk_pinctrl_match,
         },
         .probe = nmk_pinctrl_probe,
-        .id_table = nmk_pinctrl_id,
 #ifdef CONFIG_PM
         .suspend = nmk_pinctrl_suspend,
         .resume = nmk_pinctrl_resume,
diff --git a/drivers/pinctrl/pinctrl-nomadik.h b/drivers/pinctrl/pinctrl-nomadik.h
index bcd4191e10ea..d8215f1e70c7 100644
--- a/drivers/pinctrl/pinctrl-nomadik.h
+++ b/drivers/pinctrl/pinctrl-nomadik.h
@@ -1,13 +1,23 @@
 #ifndef PINCTRL_PINCTRL_NOMADIK_H
 #define PINCTRL_PINCTRL_NOMADIK_H
 
-#include <linux/platform_data/pinctrl-nomadik.h>
-
 /* Package definitions */
 #define PINCTRL_NMK_STN8815     0
 #define PINCTRL_NMK_DB8500      1
 #define PINCTRL_NMK_DB8540      2
 
+/* Alternate functions: function C is set in hw by setting both A and B */
+#define NMK_GPIO_ALT_GPIO       0
+#define NMK_GPIO_ALT_A  1
+#define NMK_GPIO_ALT_B  2
+#define NMK_GPIO_ALT_C  (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
+
+#define NMK_GPIO_ALT_CX_SHIFT 2
+#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
+#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
+#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
+#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
+
 #define PRCM_GPIOCR_ALTCX(pin_num,\
         altc1_used, altc1_ri, altc1_cb,\
         altc2_used, altc2_ri, altc2_cb,\
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index 2cb52e0438df..9f71d9fdcc14 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -326,7 +326,7 @@ static int vbus_is_present(struct usba_udc *udc)
 
 #if defined(CONFIG_ARCH_AT91SAM9RL)
 
-#include <mach/at91_pmc.h>
+#include <linux/clk/at91_pmc.h>
 
 static void toggle_bias(int is_on)
 {
diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bindings/clk/at91.h
new file mode 100644
index 000000000000..0b4cb999a3f7
--- /dev/null
+++ b/include/dt-bindings/clk/at91.h
@@ -0,0 +1,22 @@
+/*
+ * This header provides constants for AT91 pmc status.
+ *
+ * The constants defined in this header are being used in dts.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#ifndef _DT_BINDINGS_CLK_AT91_H
+#define _DT_BINDINGS_CLK_AT91_H
+
+#define AT91_PMC_MOSCS          0               /* MOSCS Flag */
+#define AT91_PMC_LOCKA          1               /* PLLA Lock */
+#define AT91_PMC_LOCKB          2               /* PLLB Lock */
+#define AT91_PMC_MCKRDY         3               /* Master Clock */
+#define AT91_PMC_LOCKU          6               /* UPLL Lock */
+#define AT91_PMC_PCKRDY(id)     (8 + (id))      /* Programmable Clock */
+#define AT91_PMC_MOSCSELS       16              /* Main Oscillator Selection */
+#define AT91_PMC_MOSCRCS        17              /* Main On-Chip RC */
+#define AT91_PMC_CFDEV          18              /* Clock Failure Detector Event */
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/include/linux/clk/at91_pmc.h
index c604cc69acb5..a6911ebbd02a 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/include/linux/clk/at91_pmc.h
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-at91/include/mach/at91_pmc.h
+ * include/linux/clk/at91_pmc.h
  *
  * Copyright (C) 2005 Ivan Kokshaysky
  * Copyright (C) SAN People
@@ -164,6 +164,8 @@ extern void __iomem *at91_pmc_base;
 #define         AT91_PMC_CFDEV          (1 << 18)               /* Clock Failure Detector Event [some SAM9] */
 #define AT91_PMC_IMR            0x6c                    /* Interrupt Mask Register */
 
+#define AT91_PMC_PLLICPR        0x80                    /* PLL Charge Pump Current Register */
+
 #define AT91_PMC_PROT           0xe4                    /* Write Protect Mode Register [some SAM9] */
 #define         AT91_PMC_WPEN           (0x1  <<  0)            /* Write Protect Enable */
 #define         AT91_PMC_WPKEY          (0xffffff << 8)         /* Write Protect Key */
diff --git a/include/linux/platform_data/clocksource-nomadik-mtu.h b/include/linux/platform_data/clocksource-nomadik-mtu.h
deleted file mode 100644
index 80088973b734..000000000000
--- a/include/linux/platform_data/clocksource-nomadik-mtu.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef __PLAT_MTU_H
-#define __PLAT_MTU_H
-
-void nmdk_timer_init(void __iomem *base, int irq);
-void nmdk_clkevt_reset(void);
-void nmdk_clksrc_reset(void);
-
-#endif /* __PLAT_MTU_H */
-
diff --git a/include/linux/platform_data/pinctrl-nomadik.h b/include/linux/platform_data/pinctrl-nomadik.h
deleted file mode 100644
index abf5bed84df3..000000000000
--- a/include/linux/platform_data/pinctrl-nomadik.h
+++ /dev/null
@@ -1,242 +0,0 @@
-/*
- * Structures and registers for GPIO access in the Nomadik SoC
- *
- * Copyright (C) 2008 STMicroelectronics
- *     Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
- * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __PLAT_NOMADIK_GPIO
-#define __PLAT_NOMADIK_GPIO
-
-/*
- * pin configurations are represented by 32-bit integers:
- *
- *      bit  0.. 8 - Pin Number (512 Pins Maximum)
- *      bit  9..10 - Alternate Function Selection
- *      bit 11..12 - Pull up/down state
- *      bit     13 - Sleep mode behaviour
- *      bit     14 - Direction
- *      bit     15 - Value (if output)
- *      bit 16..18 - SLPM pull up/down state
- *      bit 19..20 - SLPM direction
- *      bit 21..22 - SLPM Value (if output)
- *      bit 23..25 - PDIS value (if input)
- *      bit     26 - Gpio mode
- *      bit     27 - Sleep mode
- *
- * to facilitate the definition, the following macros are provided
- *
- * PIN_CFG_DEFAULT - default config (0):
- *                   pull up/down = disabled
- *                   sleep mode = input/wakeup
- *                   direction = input
- *                   value = low
- *                   SLPM direction = same as normal
- *                   SLPM pull = same as normal
- *                   SLPM value = same as normal
- *
- * PIN_CFG         - default config with alternate function
- */
-
-typedef unsigned long pin_cfg_t;
-
-#define PIN_NUM_MASK            0x1ff
-#define PIN_NUM(x)              ((x) & PIN_NUM_MASK)
-
-#define PIN_ALT_SHIFT           9
-#define PIN_ALT_MASK            (0x3 << PIN_ALT_SHIFT)
-#define PIN_ALT(x)              (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
-#define PIN_GPIO                (NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
-#define PIN_ALT_A               (NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
-#define PIN_ALT_B               (NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
-#define PIN_ALT_C               (NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
-
-#define PIN_PULL_SHIFT          11
-#define PIN_PULL_MASK           (0x3 << PIN_PULL_SHIFT)
-#define PIN_PULL(x)             (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
-#define PIN_PULL_NONE           (NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
-#define PIN_PULL_UP             (NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
-#define PIN_PULL_DOWN           (NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
-
-#define PIN_SLPM_SHIFT          13
-#define PIN_SLPM_MASK           (0x1 << PIN_SLPM_SHIFT)
-#define PIN_SLPM(x)             (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
-#define PIN_SLPM_MAKE_INPUT     (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
-#define PIN_SLPM_NOCHANGE       (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
-/* These two replace the above in DB8500v2+ */
-#define PIN_SLPM_WAKEUP_ENABLE  (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
-#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
-#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
-
-#define PIN_SLPM_GPIO  PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
-#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
-
-#define PIN_DIR_SHIFT           14
-#define PIN_DIR_MASK            (0x1 << PIN_DIR_SHIFT)
-#define PIN_DIR(x)              (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
-#define PIN_DIR_INPUT           (0 << PIN_DIR_SHIFT)
-#define PIN_DIR_OUTPUT          (1 << PIN_DIR_SHIFT)
-
-#define PIN_VAL_SHIFT           15
-#define PIN_VAL_MASK            (0x1 << PIN_VAL_SHIFT)
-#define PIN_VAL(x)              (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
-#define PIN_VAL_LOW             (0 << PIN_VAL_SHIFT)
-#define PIN_VAL_HIGH            (1 << PIN_VAL_SHIFT)
-
-#define PIN_SLPM_PULL_SHIFT     16
-#define PIN_SLPM_PULL_MASK      (0x7 << PIN_SLPM_PULL_SHIFT)
-#define PIN_SLPM_PULL(x)        \
-        (((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT)
-#define PIN_SLPM_PULL_NONE      \
-        ((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT)
-#define PIN_SLPM_PULL_UP        \
-        ((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT)
-#define PIN_SLPM_PULL_DOWN      \
-        ((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT)
-
-#define PIN_SLPM_DIR_SHIFT      19
-#define PIN_SLPM_DIR_MASK       (0x3 << PIN_SLPM_DIR_SHIFT)
-#define PIN_SLPM_DIR(x)         \
-        (((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT)
-#define PIN_SLPM_DIR_INPUT      ((1 + 0) << PIN_SLPM_DIR_SHIFT)
-#define PIN_SLPM_DIR_OUTPUT     ((1 + 1) << PIN_SLPM_DIR_SHIFT)
-
-#define PIN_SLPM_VAL_SHIFT      21
-#define PIN_SLPM_VAL_MASK       (0x3 << PIN_SLPM_VAL_SHIFT)
-#define PIN_SLPM_VAL(x)         \
-        (((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT)
-#define PIN_SLPM_VAL_LOW        ((1 + 0) << PIN_SLPM_VAL_SHIFT)
-#define PIN_SLPM_VAL_HIGH       ((1 + 1) << PIN_SLPM_VAL_SHIFT)
-
-#define PIN_SLPM_PDIS_SHIFT             23
-#define PIN_SLPM_PDIS_MASK              (0x3 << PIN_SLPM_PDIS_SHIFT)
-#define PIN_SLPM_PDIS(x)        \
-        (((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
-#define PIN_SLPM_PDIS_NO_CHANGE         (0 << PIN_SLPM_PDIS_SHIFT)
-#define PIN_SLPM_PDIS_DISABLED          (1 << PIN_SLPM_PDIS_SHIFT)
-#define PIN_SLPM_PDIS_ENABLED           (2 << PIN_SLPM_PDIS_SHIFT)
-
-#define PIN_LOWEMI_SHIFT        25
-#define PIN_LOWEMI_MASK         (0x1 << PIN_LOWEMI_SHIFT)
-#define PIN_LOWEMI(x)           (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
-#define PIN_LOWEMI_DISABLED     (0 << PIN_LOWEMI_SHIFT)
-#define PIN_LOWEMI_ENABLED      (1 << PIN_LOWEMI_SHIFT)
-
-#define PIN_GPIOMODE_SHIFT      26
-#define PIN_GPIOMODE_MASK       (0x1 << PIN_GPIOMODE_SHIFT)
-#define PIN_GPIOMODE(x)         (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
-#define PIN_GPIOMODE_DISABLED   (0 << PIN_GPIOMODE_SHIFT)
-#define PIN_GPIOMODE_ENABLED    (1 << PIN_GPIOMODE_SHIFT)
-
-#define PIN_SLEEPMODE_SHIFT     27
-#define PIN_SLEEPMODE_MASK      (0x1 << PIN_SLEEPMODE_SHIFT)
-#define PIN_SLEEPMODE(x)        (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
-#define PIN_SLEEPMODE_DISABLED  (0 << PIN_SLEEPMODE_SHIFT)
-#define PIN_SLEEPMODE_ENABLED   (1 << PIN_SLEEPMODE_SHIFT)
-
-
-/* Shortcuts.  Use these instead of separate DIR, PULL, and VAL.  */
-#define PIN_INPUT_PULLDOWN      (PIN_DIR_INPUT | PIN_PULL_DOWN)
-#define PIN_INPUT_PULLUP        (PIN_DIR_INPUT | PIN_PULL_UP)
-#define PIN_INPUT_NOPULL        (PIN_DIR_INPUT | PIN_PULL_NONE)
-#define PIN_OUTPUT_LOW          (PIN_DIR_OUTPUT | PIN_VAL_LOW)
-#define PIN_OUTPUT_HIGH         (PIN_DIR_OUTPUT | PIN_VAL_HIGH)
-
-#define PIN_SLPM_INPUT_PULLDOWN (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
-#define PIN_SLPM_INPUT_PULLUP   (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
-#define PIN_SLPM_INPUT_NOPULL   (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
-#define PIN_SLPM_OUTPUT_LOW     (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
-#define PIN_SLPM_OUTPUT_HIGH    (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
-
-#define PIN_CFG_DEFAULT         (0)
-
-#define PIN_CFG(num, alt)               \
-        (PIN_CFG_DEFAULT |\
-         (PIN_NUM(num) | PIN_##alt))
-
-#define PIN_CFG_INPUT(num, alt, pull)           \
-        (PIN_CFG_DEFAULT |\
-         (PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull))
-
-#define PIN_CFG_OUTPUT(num, alt, val)           \
-        (PIN_CFG_DEFAULT |\
-         (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
-
-/*
- * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
- * the "gpio" namespace for generic and cross-machine functions
- */
-
-#define GPIO_BLOCK_SHIFT 5
-#define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT)
-
-/* Register in the logic block */
-#define NMK_GPIO_DAT    0x00
-#define NMK_GPIO_DATS   0x04
-#define NMK_GPIO_DATC   0x08
-#define NMK_GPIO_PDIS   0x0c
-#define NMK_GPIO_DIR    0x10
-#define NMK_GPIO_DIRS   0x14
-#define NMK_GPIO_DIRC   0x18
-#define NMK_GPIO_SLPC   0x1c
-#define NMK_GPIO_AFSLA  0x20
-#define NMK_GPIO_AFSLB  0x24
-#define NMK_GPIO_LOWEMI 0x28
-
-#define NMK_GPIO_RIMSC  0x40
-#define NMK_GPIO_FIMSC  0x44
-#define NMK_GPIO_IS     0x48
-#define NMK_GPIO_IC     0x4c
-#define NMK_GPIO_RWIMSC 0x50
-#define NMK_GPIO_FWIMSC 0x54
-#define NMK_GPIO_WKS    0x58
-/* These appear in DB8540 and later ASICs */
-#define NMK_GPIO_EDGELEVEL 0x5C
-#define NMK_GPIO_LEVEL  0x60
-
-/* Alternate functions: function C is set in hw by setting both A and B */
-#define NMK_GPIO_ALT_GPIO       0
-#define NMK_GPIO_ALT_A  1
-#define NMK_GPIO_ALT_B  2
-#define NMK_GPIO_ALT_C  (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
-
-#define NMK_GPIO_ALT_CX_SHIFT 2
-#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
-#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
-#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
-#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
-
-/* Pull up/down values */
-enum nmk_gpio_pull {
-        NMK_GPIO_PULL_NONE,
-        NMK_GPIO_PULL_UP,
-        NMK_GPIO_PULL_DOWN,
-};
-
-/* Sleep mode */
-enum nmk_gpio_slpm {
-        NMK_GPIO_SLPM_INPUT,
-        NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
-        NMK_GPIO_SLPM_NOCHANGE,
-        NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
-};
-
-/*
- * Platform data to register a block: only the initial gpio/irq number.
- */
-struct nmk_gpio_platform_data {
-        char *name;
-        int first_gpio;
-        int first_irq;
-        int num_gpio;
-        u32 (*get_secondary_status)(unsigned int bank);
-        void (*set_ioforce)(bool enable);
-        bool supports_sleepmode;
-};
-
-#endif /* __PLAT_NOMADIK_GPIO */