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-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/mach-mmp/aspenite.c5
-rw-r--r--arch/arm/mach-mmp/avengers_lite.c1
-rw-r--r--arch/arm/mach-mmp/brownstone.c1
-rw-r--r--arch/arm/mach-mmp/flint.c5
-rw-r--r--arch/arm/mach-mmp/gplugd.c1
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio-pxa.h3
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h7
-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h6
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa910.h2
-rw-r--r--arch/arm/mach-mmp/mmp2.c39
-rw-r--r--arch/arm/mach-mmp/pxa168.c40
-rw-r--r--arch/arm/mach-mmp/pxa910.c40
-rw-r--r--arch/arm/mach-mmp/tavorevb.c6
-rw-r--r--arch/arm/mach-mmp/teton_bga.c3
-rw-r--r--arch/arm/mach-mmp/ttc_dkb.c8
-rw-r--r--arch/arm/mach-pxa/am200epd.c4
-rw-r--r--arch/arm/mach-pxa/am300epd.c4
-rw-r--r--arch/arm/mach-pxa/balloon3.c2
-rw-r--r--arch/arm/mach-pxa/capc7117.c12
-rw-r--r--arch/arm/mach-pxa/cm-x270.c4
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c4
-rw-r--r--arch/arm/mach-pxa/cm-x300.c6
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270.c6
-rw-r--r--arch/arm/mach-pxa/colibri-pxa300.c4
-rw-r--r--arch/arm/mach-pxa/colibri-pxa320.c4
-rw-r--r--arch/arm/mach-pxa/corgi.c2
-rw-r--r--arch/arm/mach-pxa/corgi_pm.c20
-rw-r--r--arch/arm/mach-pxa/devices.c30
-rw-r--r--arch/arm/mach-pxa/devices.h1
-rw-r--r--arch/arm/mach-pxa/em-x270.c6
-rw-r--r--arch/arm/mach-pxa/eseries.c4
-rw-r--r--arch/arm/mach-pxa/hx4700.c18
-rw-r--r--arch/arm/mach-pxa/icontrol.c8
-rw-r--r--arch/arm/mach-pxa/idp.c4
-rw-r--r--arch/arm/mach-pxa/include/mach/balloon3.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/corgi.h26
-rw-r--r--arch/arm/mach-pxa/include/mach/csb726.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio-pxa.h133
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h20
-rw-r--r--arch/arm/mach-pxa/include/mach/gumstix.h20
-rw-r--r--arch/arm/mach-pxa/include/mach/hx4700.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/idp.h16
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/littleton.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/magician.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmld.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/palmt5.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtc.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtx.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/pcm027.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/pcm990_baseboard.h14
-rw-r--r--arch/arm/mach-pxa/include/mach/poodle.h26
-rw-r--r--arch/arm/mach-pxa/include/mach/spitz.h40
-rw-r--r--arch/arm/mach-pxa/include/mach/tosa.h54
-rw-r--r--arch/arm/mach-pxa/include/mach/trizeps4.h16
-rw-r--r--arch/arm/mach-pxa/irq.c61
-rw-r--r--arch/arm/mach-pxa/littleton.c6
-rw-r--r--arch/arm/mach-pxa/lpd270.c4
-rw-r--r--arch/arm/mach-pxa/lubbock.c4
-rw-r--r--arch/arm/mach-pxa/magician.c8
-rw-r--r--arch/arm/mach-pxa/mainstone.c4
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c6
-rw-r--r--arch/arm/mach-pxa/mioa701.c8
-rw-r--r--arch/arm/mach-pxa/mxm8x10.c4
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c6
-rw-r--r--arch/arm/mach-pxa/poodle.c6
-rw-r--r--arch/arm/mach-pxa/pxa25x.c6
-rw-r--r--arch/arm/mach-pxa/pxa27x.c6
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c8
-rw-r--r--arch/arm/mach-pxa/pxa95x.c5
-rw-r--r--arch/arm/mach-pxa/raumfeld.c8
-rw-r--r--arch/arm/mach-pxa/saar.c6
-rw-r--r--arch/arm/mach-pxa/saarb.c2
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c24
-rw-r--r--arch/arm/mach-pxa/spitz.c2
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c10
-rw-r--r--arch/arm/mach-pxa/stargate2.c26
-rw-r--r--arch/arm/mach-pxa/tavorevb.c4
-rw-r--r--arch/arm/mach-pxa/tavorevb3.c2
-rw-r--r--arch/arm/mach-pxa/tosa.c4
-rw-r--r--arch/arm/mach-pxa/viper.c12
-rw-r--r--arch/arm/mach-pxa/vpac270.c10
-rw-r--r--arch/arm/mach-pxa/z2.c2
-rw-r--r--arch/arm/mach-pxa/zeus.c20
-rw-r--r--arch/arm/mach-pxa/zylonite.c4
-rw-r--r--arch/arm/mach-pxa/zylonite_pxa300.c4
-rw-r--r--arch/arm/plat-pxa/include/plat/gpio-pxa.h44
-rw-r--r--arch/arm/plat-pxa/include/plat/gpio.h30
-rw-r--r--drivers/gpio/Kconfig6
-rw-r--r--drivers/gpio/Makefile2
-rw-r--r--drivers/gpio/gpio-pxa.c377
-rw-r--r--drivers/pcmcia/pxa2xx_cm_x255.c16
-rw-r--r--drivers/pcmcia/pxa2xx_cm_x270.c9
-rw-r--r--include/linux/gpio-pxa.h16
97 files changed, 809 insertions, 716 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 44789eff983f..57e16d4e14dc 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -591,6 +591,7 @@ config ARCH_MMP
591 select ARCH_REQUIRE_GPIOLIB 591 select ARCH_REQUIRE_GPIOLIB
592 select CLKDEV_LOOKUP 592 select CLKDEV_LOOKUP
593 select GENERIC_CLOCKEVENTS 593 select GENERIC_CLOCKEVENTS
594 select GPIO_PXA
594 select HAVE_SCHED_CLOCK 595 select HAVE_SCHED_CLOCK
595 select TICK_ONESHOT 596 select TICK_ONESHOT
596 select PLAT_PXA 597 select PLAT_PXA
@@ -673,6 +674,7 @@ config ARCH_PXA
673 select CLKSRC_MMIO 674 select CLKSRC_MMIO
674 select ARCH_REQUIRE_GPIOLIB 675 select ARCH_REQUIRE_GPIOLIB
675 select GENERIC_CLOCKEVENTS 676 select GENERIC_CLOCKEVENTS
677 select GPIO_PXA
676 select HAVE_SCHED_CLOCK 678 select HAVE_SCHED_CLOCK
677 select TICK_ONESHOT 679 select TICK_ONESHOT
678 select PLAT_PXA 680 select PLAT_PXA
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 7a60bbbce7a4..f0d236dfb02b 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -120,8 +120,8 @@ static struct resource smc91x_resources[] = {
120 .flags = IORESOURCE_MEM, 120 .flags = IORESOURCE_MEM,
121 }, 121 },
122 [1] = { 122 [1] = {
123 .start = gpio_to_irq(27), 123 .start = MMP_GPIO_TO_IRQ(27),
124 .end = gpio_to_irq(27), 124 .end = MMP_GPIO_TO_IRQ(27),
125 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 125 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
126 } 126 }
127}; 127};
@@ -232,6 +232,7 @@ static void __init common_init(void)
232 pxa168_add_nand(&aspenite_nand_info); 232 pxa168_add_nand(&aspenite_nand_info);
233 pxa168_add_fb(&aspenite_lcd_info); 233 pxa168_add_fb(&aspenite_lcd_info);
234 pxa168_add_keypad(&aspenite_keypad_info); 234 pxa168_add_keypad(&aspenite_keypad_info);
235 platform_device_register(&pxa168_device_gpio);
235 236
236 /* off-chip devices */ 237 /* off-chip devices */
237 platform_device_register(&smc91x_device); 238 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 39f0878d64a0..c5d53e0742e9 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -38,6 +38,7 @@ static void __init avengers_lite_init(void)
38 38
39 /* on-chip devices */ 39 /* on-chip devices */
40 pxa168_add_uart(2); 40 pxa168_add_uart(2);
41 platform_device_register(&pxa168_device_gpio);
41} 42}
42 43
43MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") 44MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index 983cfb15fbde..eb07565a06a3 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -202,6 +202,7 @@ static void __init brownstone_init(void)
202 /* on-chip devices */ 202 /* on-chip devices */
203 mmp2_add_uart(1); 203 mmp2_add_uart(1);
204 mmp2_add_uart(3); 204 mmp2_add_uart(3);
205 platform_device_register(&mmp2_device_gpio);
205 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info)); 206 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
206 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ 207 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
207 mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */ 208 mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index c4fd806b15b4..c1f0aa88dd8a 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -87,8 +87,8 @@ static struct resource smc91x_resources[] = {
87 .flags = IORESOURCE_MEM, 87 .flags = IORESOURCE_MEM,
88 }, 88 },
89 [1] = { 89 [1] = {
90 .start = gpio_to_irq(155), 90 .start = MMP_GPIO_TO_IRQ(155),
91 .end = gpio_to_irq(155), 91 .end = MMP_GPIO_TO_IRQ(155),
92 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 92 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
93 } 93 }
94}; 94};
@@ -110,6 +110,7 @@ static void __init flint_init(void)
110 /* on-chip devices */ 110 /* on-chip devices */
111 mmp2_add_uart(1); 111 mmp2_add_uart(1);
112 mmp2_add_uart(2); 112 mmp2_add_uart(2);
113 platform_device_register(&mmp2_device_gpio);
113 114
114 /* off-chip devices */ 115 /* off-chip devices */
115 platform_device_register(&smc91x_device); 116 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 69156568bc41..933420a7c3ba 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -184,6 +184,7 @@ static void __init gplugd_init(void)
184 pxa168_add_uart(3); 184 pxa168_add_uart(3);
185 pxa168_add_ssp(0); 185 pxa168_add_ssp(0);
186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info)); 186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
187 platform_device_register(&pxa168_device_gpio);
187 188
188 pxa168_add_eth(&gplugd_eth_platform_data); 189 pxa168_add_eth(&gplugd_eth_platform_data);
189} 190}
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index d14eeaf16322..9b79937d7817 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -2,6 +2,7 @@
2#define __ASM_MACH_GPIO_PXA_H 2#define __ASM_MACH_GPIO_PXA_H
3 3
4#include <mach/addr-map.h> 4#include <mach/addr-map.h>
5#include <mach/cputype.h>
5#include <mach/irqs.h> 6#include <mach/irqs.h>
6 7
7#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) 8#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
@@ -9,8 +10,6 @@
9#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
10#define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) 11#define GPIO_REG(x) (GPIO_REGS_VIRT + (x))
11 12
12#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
13
14#define gpio_to_bank(gpio) ((gpio) >> 5) 13#define gpio_to_bank(gpio) ((gpio) >> 5)
15 14
16/* NOTE: these macros are defined here to make optimization of 15/* NOTE: these macros are defined here to make optimization of
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index 681262359d1c..13219ebf5128 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -3,11 +3,6 @@
3 3
4#include <asm-generic/gpio.h> 4#include <asm-generic/gpio.h>
5 5
6#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) 6#include <mach/cputype.h>
7#define irq_to_gpio(irq) ((irq) - IRQ_GPIO_START)
8 7
9#define __gpio_is_inverted(gpio) (0)
10#define __gpio_is_occupied(gpio) (0)
11
12#include <plat/gpio.h>
13#endif /* __ASM_MACH_GPIO_H */ 8#endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index a09d328e2ddd..34635a0bbb59 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -219,10 +219,10 @@
219#define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2) 219#define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2)
220 220
221#define IRQ_GPIO_START 128 221#define IRQ_GPIO_START 128
222#define IRQ_GPIO_NUM 192 222#define MMP_NR_BUILTIN_GPIO 192
223#define IRQ_GPIO(x) (IRQ_GPIO_START + (x)) 223#define MMP_GPIO_TO_IRQ(gpio) (IRQ_GPIO_START + (gpio))
224 224
225#define IRQ_BOARD_START (IRQ_GPIO_START + IRQ_GPIO_NUM) 225#define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
226 226
227#define NR_IRQS (IRQ_BOARD_START) 227#define NR_IRQS (IRQ_BOARD_START)
228 228
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index 2f7b2d3c2b18..cba22fed2265 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -32,6 +32,8 @@ extern struct pxa_device_desc mmp2_device_sdh3;
32extern struct pxa_device_desc mmp2_device_asram; 32extern struct pxa_device_desc mmp2_device_asram;
33extern struct pxa_device_desc mmp2_device_isram; 33extern struct pxa_device_desc mmp2_device_isram;
34 34
35extern struct platform_device mmp2_device_gpio;
36
35static inline int mmp2_add_uart(int id) 37static inline int mmp2_add_uart(int id)
36{ 38{
37 struct pxa_device_desc *d = NULL; 39 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 7fb568d2845b..f9286089da3a 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -42,6 +42,8 @@ struct pxa168_usb_pdata {
42/* pdata can be NULL */ 42/* pdata can be NULL */
43int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata); 43int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata);
44 44
45extern struct platform_device pxa168_device_gpio;
46
45static inline int pxa168_add_uart(int id) 47static inline int pxa168_add_uart(int id)
46{ 48{
47 struct pxa_device_desc *d = NULL; 49 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index 91be75591398..4de13abef7bb 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -21,6 +21,8 @@ extern struct pxa_device_desc pxa910_device_pwm3;
21extern struct pxa_device_desc pxa910_device_pwm4; 21extern struct pxa_device_desc pxa910_device_pwm4;
22extern struct pxa_device_desc pxa910_device_nand; 22extern struct pxa_device_desc pxa910_device_nand;
23 23
24extern struct platform_device pxa910_device_gpio;
25
24static inline int pxa910_add_uart(int id) 26static inline int pxa910_add_uart(int id)
25{ 27{
26 struct pxa_device_desc *d = NULL; 28 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 5dd1d4a6aeb9..617c60a170a4 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -13,6 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/hardware/cache-tauros2.h> 18#include <asm/hardware/cache-tauros2.h>
18 19
@@ -24,7 +25,6 @@
24#include <mach/irqs.h> 25#include <mach/irqs.h>
25#include <mach/dma.h> 26#include <mach/dma.h>
26#include <mach/mfp.h> 27#include <mach/mfp.h>
27#include <mach/gpio-pxa.h>
28#include <mach/devices.h> 28#include <mach/devices.h>
29#include <mach/mmp2.h> 29#include <mach/mmp2.h>
30 30
@@ -33,8 +33,6 @@
33 33
34#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) 34#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
35 35
36#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
37
38static struct mfp_addr_map mmp2_addr_map[] __initdata = { 36static struct mfp_addr_map mmp2_addr_map[] __initdata = {
39 37
40 MFP_ADDR_X(GPIO0, GPIO58, 0x54), 38 MFP_ADDR_X(GPIO0, GPIO58, 0x54),
@@ -95,24 +93,9 @@ void mmp2_clear_pmic_int(void)
95 __raw_writel(data, mfpr_pmic); 93 __raw_writel(data, mfpr_pmic);
96} 94}
97 95
98static void __init mmp2_init_gpio(void)
99{
100 int i;
101
102 /* enable GPIO clock */
103 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
104
105 /* unmask GPIO edge detection for all 6 banks -- APMASKx */
106 for (i = 0; i < 6; i++)
107 __raw_writel(0xffffffff, APMASK(i));
108
109 pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
110}
111
112void __init mmp2_init_irq(void) 96void __init mmp2_init_irq(void)
113{ 97{
114 mmp2_init_icu(); 98 mmp2_init_icu();
115 mmp2_init_gpio();
116} 99}
117 100
118static void sdhc_clk_enable(struct clk *clk) 101static void sdhc_clk_enable(struct clk *clk)
@@ -149,6 +132,7 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
149static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); 132static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
150static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); 133static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
151static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); 134static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
135static APBC_CLK(gpio, MMP2_GPIO, 0, 26000000);
152 136
153static APMU_CLK(nand, NAND, 0xbf, 100000000); 137static APMU_CLK(nand, NAND, 0xbf, 100000000);
154static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops); 138static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
@@ -168,6 +152,7 @@ static struct clk_lookup mmp2_clkregs[] = {
168 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), 152 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
169 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), 153 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
170 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 154 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
155 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
171 INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"), 156 INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"),
172 INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"), 157 INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"),
173 INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"), 158 INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"),
@@ -230,3 +215,21 @@ MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000);
230/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */ 215/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */
231MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000); 216MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000);
232 217
218struct resource mmp2_resource_gpio[] = {
219 {
220 .start = 0xd4019000,
221 .end = 0xd4019fff,
222 .flags = IORESOURCE_MEM,
223 }, {
224 .start = IRQ_MMP2_GPIO,
225 .end = IRQ_MMP2_GPIO,
226 .flags = IORESOURCE_IRQ,
227 },
228};
229
230struct platform_device mmp2_device_gpio = {
231 .name = "pxa-gpio",
232 .id = -1,
233 .num_resources = ARRAY_SIZE(mmp2_resource_gpio),
234 .resource = mmp2_resource_gpio,
235};
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 76ca15c00e45..84245035f351 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -13,6 +13,7 @@
13#include <linux/list.h> 13#include <linux/list.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/mach/time.h> 18#include <asm/mach/time.h>
18#include <mach/addr-map.h> 19#include <mach/addr-map.h>
@@ -20,7 +21,6 @@
20#include <mach/regs-apbc.h> 21#include <mach/regs-apbc.h>
21#include <mach/regs-apmu.h> 22#include <mach/regs-apmu.h>
22#include <mach/irqs.h> 23#include <mach/irqs.h>
23#include <mach/gpio-pxa.h>
24#include <mach/dma.h> 24#include <mach/dma.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
26#include <mach/mfp.h> 26#include <mach/mfp.h>
@@ -43,26 +43,9 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
43 MFP_ADDR_END, 43 MFP_ADDR_END,
44}; 44};
45 45
46#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
47
48static void __init pxa168_init_gpio(void)
49{
50 int i;
51
52 /* enable GPIO clock */
53 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
54
55 /* unmask GPIO edge detection for all 4 banks - APMASKx */
56 for (i = 0; i < 4; i++)
57 __raw_writel(0xffffffff, APMASK(i));
58
59 pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL);
60}
61
62void __init pxa168_init_irq(void) 46void __init pxa168_init_irq(void)
63{ 47{
64 icu_init_irq(); 48 icu_init_irq();
65 pxa168_init_gpio();
66} 49}
67 50
68/* APB peripheral clocks */ 51/* APB peripheral clocks */
@@ -80,6 +63,7 @@ static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
80static APBC_CLK(ssp3, PXA168_SSP3, 4, 0); 63static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
81static APBC_CLK(ssp4, PXA168_SSP4, 4, 0); 64static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
82static APBC_CLK(ssp5, PXA168_SSP5, 4, 0); 65static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
66static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
83static APBC_CLK(keypad, PXA168_KPC, 0, 32000); 67static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
84 68
85static APMU_CLK(nand, NAND, 0x19b, 156000000); 69static APMU_CLK(nand, NAND, 0x19b, 156000000);
@@ -105,6 +89,7 @@ static struct clk_lookup pxa168_clkregs[] = {
105 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL), 89 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
106 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 90 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
107 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), 91 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
92 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
108 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), 93 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
109 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), 94 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
110 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"), 95 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
@@ -174,6 +159,25 @@ PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
174PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); 159PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
175PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); 160PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
176 161
162struct resource pxa168_resource_gpio[] = {
163 {
164 .start = 0xd4019000,
165 .end = 0xd4019fff,
166 .flags = IORESOURCE_MEM,
167 }, {
168 .start = IRQ_PXA168_GPIOX,
169 .end = IRQ_PXA168_GPIOX,
170 .flags = IORESOURCE_IRQ,
171 },
172};
173
174struct platform_device pxa168_device_gpio = {
175 .name = "pxa-gpio",
176 .id = -1,
177 .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
178 .resource = pxa168_resource_gpio,
179};
180
177struct resource pxa168_usb_host_resources[] = { 181struct resource pxa168_usb_host_resources[] = {
178 /* USB Host conroller register base */ 182 /* USB Host conroller register base */
179 [0] = { 183 [0] = {
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 4ebbfbba39fc..3241a25784d0 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/list.h> 13#include <linux/list.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/platform_device.h>
15 16
16#include <asm/mach/time.h> 17#include <asm/mach/time.h>
17#include <mach/addr-map.h> 18#include <mach/addr-map.h>
@@ -19,7 +20,6 @@
19#include <mach/regs-apmu.h> 20#include <mach/regs-apmu.h>
20#include <mach/cputype.h> 21#include <mach/cputype.h>
21#include <mach/irqs.h> 22#include <mach/irqs.h>
22#include <mach/gpio-pxa.h>
23#include <mach/dma.h> 23#include <mach/dma.h>
24#include <mach/mfp.h> 24#include <mach/mfp.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
@@ -77,26 +77,9 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
77 MFP_ADDR_END, 77 MFP_ADDR_END,
78}; 78};
79 79
80#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
81
82static void __init pxa910_init_gpio(void)
83{
84 int i;
85
86 /* enable GPIO clock */
87 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO);
88
89 /* unmask GPIO edge detection for all 4 banks - APMASKx */
90 for (i = 0; i < 4; i++)
91 __raw_writel(0xffffffff, APMASK(i));
92
93 pxa_init_gpio(IRQ_PXA910_AP_GPIO, 0, 127, NULL);
94}
95
96void __init pxa910_init_irq(void) 80void __init pxa910_init_irq(void)
97{ 81{
98 icu_init_irq(); 82 icu_init_irq();
99 pxa910_init_gpio();
100} 83}
101 84
102/* APB peripheral clocks */ 85/* APB peripheral clocks */
@@ -108,6 +91,7 @@ static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
108static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); 91static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
109static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); 92static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
110static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); 93static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
94static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
111 95
112static APMU_CLK(nand, NAND, 0x19b, 156000000); 96static APMU_CLK(nand, NAND, 0x19b, 156000000);
113static APMU_CLK(u2o, USB, 0x1b, 480000000); 97static APMU_CLK(u2o, USB, 0x1b, 480000000);
@@ -123,6 +107,7 @@ static struct clk_lookup pxa910_clkregs[] = {
123 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), 107 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
124 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), 108 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
125 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 109 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
110 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
126 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"), 111 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
127}; 112};
128 113
@@ -179,3 +164,22 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
179PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); 164PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
180PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); 165PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
181PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); 166PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
167
168struct resource pxa910_resource_gpio[] = {
169 {
170 .start = 0xd4019000,
171 .end = 0xd4019fff,
172 .flags = IORESOURCE_MEM,
173 }, {
174 .start = IRQ_PXA910_AP_GPIO,
175 .end = IRQ_PXA910_AP_GPIO,
176 .flags = IORESOURCE_IRQ,
177 },
178};
179
180struct platform_device pxa910_device_gpio = {
181 .name = "pxa-gpio",
182 .id = -1,
183 .num_resources = ARRAY_SIZE(pxa910_resource_gpio),
184 .resource = pxa910_resource_gpio,
185};
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index eb5be879fd8c..bb2ddb72bca2 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -19,6 +19,7 @@
19#include <mach/addr-map.h> 19#include <mach/addr-map.h>
20#include <mach/mfp-pxa910.h> 20#include <mach/mfp-pxa910.h>
21#include <mach/pxa910.h> 21#include <mach/pxa910.h>
22#include <mach/irqs.h>
22 23
23#include "common.h" 24#include "common.h"
24 25
@@ -71,8 +72,8 @@ static struct resource smc91x_resources[] = {
71 .flags = IORESOURCE_MEM, 72 .flags = IORESOURCE_MEM,
72 }, 73 },
73 [1] = { 74 [1] = {
74 .start = gpio_to_irq(80), 75 .start = MMP_GPIO_TO_IRQ(80),
75 .end = gpio_to_irq(80), 76 .end = MMP_GPIO_TO_IRQ(80),
76 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 77 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
77 } 78 }
78}; 79};
@@ -93,6 +94,7 @@ static void __init tavorevb_init(void)
93 94
94 /* on-chip devices */ 95 /* on-chip devices */
95 pxa910_add_uart(1); 96 pxa910_add_uart(1);
97 platform_device_register(&pxa910_device_gpio);
96 98
97 /* off-chip devices */ 99 /* off-chip devices */
98 platform_device_register(&smc91x_device); 100 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index bbe4727b96cc..703de85b571c 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -66,7 +66,7 @@ static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = {
66static struct i2c_board_info teton_bga_i2c_info[] __initdata = { 66static struct i2c_board_info teton_bga_i2c_info[] __initdata = {
67 { 67 {
68 I2C_BOARD_INFO("ds1337", 0x68), 68 I2C_BOARD_INFO("ds1337", 0x68),
69 .irq = gpio_to_irq(RTC_INT_GPIO) 69 .irq = MMP_GPIO_TO_IRQ(RTC_INT_GPIO)
70 }, 70 },
71}; 71};
72 72
@@ -78,6 +78,7 @@ static void __init teton_bga_init(void)
78 pxa168_add_uart(1); 78 pxa168_add_uart(1);
79 pxa168_add_keypad(&teton_bga_keypad_info); 79 pxa168_add_keypad(&teton_bga_keypad_info);
80 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info)); 80 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info));
81 platform_device_register(&pxa168_device_gpio);
81} 82}
82 83
83MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform") 84MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 176515a76989..a80ed262df1c 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -24,12 +24,13 @@
24#include <mach/addr-map.h> 24#include <mach/addr-map.h>
25#include <mach/mfp-pxa910.h> 25#include <mach/mfp-pxa910.h>
26#include <mach/pxa910.h> 26#include <mach/pxa910.h>
27#include <mach/irqs.h>
27 28
28#include "common.h" 29#include "common.h"
29 30
30#define TTCDKB_GPIO_EXT0(x) (NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ 31#define TTCDKB_GPIO_EXT0(x) (MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 : \
31 ((x < 16) ? x : 15))) 32 ((x < 16) ? x : 15)))
32#define TTCDKB_GPIO_EXT1(x) (NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ 33#define TTCDKB_GPIO_EXT1(x) (MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \
33 ((x < 16) ? x : 15))) 34 ((x < 16) ? x : 15)))
34 35
35/* 36/*
@@ -122,6 +123,7 @@ static struct platform_device ttc_dkb_device_onenand = {
122}; 123};
123 124
124static struct platform_device *ttc_dkb_devices[] = { 125static struct platform_device *ttc_dkb_devices[] = {
126 &pxa910_device_gpio,
125 &ttc_dkb_device_onenand, 127 &ttc_dkb_device_onenand,
126}; 128};
127 129
@@ -136,7 +138,7 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {
136 { 138 {
137 .type = "max7312", 139 .type = "max7312",
138 .addr = 0x23, 140 .addr = 0x23,
139 .irq = IRQ_GPIO(80), 141 .irq = MMP_GPIO_TO_IRQ(80),
140 .platform_data = &max7312_data, 142 .platform_data = &max7312_data,
141 }, 143 },
142}; 144};
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index 4cb069fd9af2..ccdac4b6a469 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -138,7 +138,7 @@ static void am200_cleanup(struct metronomefb_par *par)
138{ 138{
139 int i; 139 int i;
140 140
141 free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); 141 free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
142 142
143 for (i = 0; i < ARRAY_SIZE(gpios); i++) 143 for (i = 0; i < ARRAY_SIZE(gpios); i++)
144 gpio_free(gpios[i]); 144 gpio_free(gpios[i]);
@@ -292,7 +292,7 @@ static int am200_setup_irq(struct fb_info *info)
292{ 292{
293 int ret; 293 int ret;
294 294
295 ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq, 295 ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am200_handle_irq,
296 IRQF_DISABLED|IRQF_TRIGGER_FALLING, 296 IRQF_DISABLED|IRQF_TRIGGER_FALLING,
297 "AM200", info->par); 297 "AM200", info->par);
298 if (ret) 298 if (ret)
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index fa8bad235d9f..76c4b9494031 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -176,7 +176,7 @@ static void am300_cleanup(struct broadsheetfb_par *par)
176{ 176{
177 int i; 177 int i;
178 178
179 free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); 179 free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
180 180
181 for (i = 0; i < ARRAY_SIZE(gpios); i++) 181 for (i = 0; i < ARRAY_SIZE(gpios); i++)
182 gpio_free(gpios[i]); 182 gpio_free(gpios[i]);
@@ -240,7 +240,7 @@ static int am300_setup_irq(struct fb_info *info)
240 int ret; 240 int ret;
241 struct broadsheetfb_par *par = info->par; 241 struct broadsheetfb_par *par = info->par;
242 242
243 ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am300_handle_irq, 243 ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am300_handle_irq,
244 IRQF_DISABLED|IRQF_TRIGGER_RISING, 244 IRQF_DISABLED|IRQF_TRIGGER_RISING,
245 "AM300", par); 245 "AM300", par);
246 if (ret) 246 if (ret)
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index fc0b8544e174..1c7890cdb0c9 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -179,7 +179,7 @@ static unsigned long balloon3_ac97_pin_config[] __initdata = {
179}; 179};
180 180
181static struct ucb1400_pdata vpac270_ucb1400_pdata = { 181static struct ucb1400_pdata vpac270_ucb1400_pdata = {
182 .irq = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ), 182 .irq = PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ),
183}; 183};
184 184
185 185
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index 4efc16d39c79..5516317b9e64 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -50,8 +50,8 @@ static struct resource capc7117_ide_resources[] = {
50 .flags = IORESOURCE_MEM 50 .flags = IORESOURCE_MEM
51 }, 51 },
52 [2] = { 52 [2] = {
53 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)), 53 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
54 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)), 54 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
55 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING 55 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
56 } 56 }
57}; 57};
@@ -80,7 +80,7 @@ static void __init capc7117_ide_init(void)
80static struct plat_serial8250_port ti16c752_platform_data[] = { 80static struct plat_serial8250_port ti16c752_platform_data[] = {
81 [0] = { 81 [0] = {
82 .mapbase = 0x14000000, 82 .mapbase = 0x14000000,
83 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO78)), 83 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO78)),
84 .irqflags = IRQF_TRIGGER_RISING, 84 .irqflags = IRQF_TRIGGER_RISING,
85 .flags = TI16C752_FLAGS, 85 .flags = TI16C752_FLAGS,
86 .iotype = UPIO_MEM, 86 .iotype = UPIO_MEM,
@@ -89,7 +89,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
89 }, 89 },
90 [1] = { 90 [1] = {
91 .mapbase = 0x14000040, 91 .mapbase = 0x14000040,
92 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)), 92 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO79)),
93 .irqflags = IRQF_TRIGGER_RISING, 93 .irqflags = IRQF_TRIGGER_RISING,
94 .flags = TI16C752_FLAGS, 94 .flags = TI16C752_FLAGS,
95 .iotype = UPIO_MEM, 95 .iotype = UPIO_MEM,
@@ -98,7 +98,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
98 }, 98 },
99 [2] = { 99 [2] = {
100 .mapbase = 0x14000080, 100 .mapbase = 0x14000080,
101 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)), 101 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO80)),
102 .irqflags = IRQF_TRIGGER_RISING, 102 .irqflags = IRQF_TRIGGER_RISING,
103 .flags = TI16C752_FLAGS, 103 .flags = TI16C752_FLAGS,
104 .iotype = UPIO_MEM, 104 .iotype = UPIO_MEM,
@@ -107,7 +107,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
107 }, 107 },
108 [3] = { 108 [3] = {
109 .mapbase = 0x140000c0, 109 .mapbase = 0x140000c0,
110 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)), 110 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO81)),
111 .irqflags = IRQF_TRIGGER_RISING, 111 .irqflags = IRQF_TRIGGER_RISING,
112 .flags = TI16C752_FLAGS, 112 .flags = TI16C752_FLAGS,
113 .iotype = UPIO_MEM, 113 .iotype = UPIO_MEM,
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index 13518a705399..431ef56700c4 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -33,7 +33,7 @@
33/* GPIO IRQ usage */ 33/* GPIO IRQ usage */
34#define GPIO83_MMC_IRQ (83) 34#define GPIO83_MMC_IRQ (83)
35 35
36#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) 36#define CMX270_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO83_MMC_IRQ)
37 37
38/* MMC power enable */ 38/* MMC power enable */
39#define GPIO105_MMC_POWER (105) 39#define GPIO105_MMC_POWER (105)
@@ -380,7 +380,7 @@ static struct spi_board_info cm_x270_spi_devices[] __initdata = {
380 .modalias = "libertas_spi", 380 .modalias = "libertas_spi",
381 .max_speed_hz = 13000000, 381 .max_speed_hz = 13000000,
382 .bus_num = 2, 382 .bus_num = 2,
383 .irq = gpio_to_irq(95), 383 .irq = PXA_GPIO_TO_IRQ(95),
384 .chip_select = 0, 384 .chip_select = 0,
385 .controller_data = &cm_x270_libertas_chip, 385 .controller_data = &cm_x270_libertas_chip,
386 .platform_data = &cm_x270_libertas_pdata, 386 .platform_data = &cm_x270_libertas_pdata,
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index f2e4190080cb..9344a0e3ba8a 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -58,8 +58,8 @@ extern void cmx270_init(void);
58#define CMX255_GPIO_IT8152_IRQ (0) 58#define CMX255_GPIO_IT8152_IRQ (0)
59#define CMX270_GPIO_IT8152_IRQ (22) 59#define CMX270_GPIO_IT8152_IRQ (22)
60 60
61#define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ) 61#define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
62#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) 62#define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
63 63
64#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) 64#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
65static struct resource cmx255_dm9000_resource[] = { 65static struct resource cmx255_dm9000_resource[] = {
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index e096bba8fd57..684acf6ed3d5 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -64,7 +64,7 @@
64#define GPIO82_MMC_IRQ (82) 64#define GPIO82_MMC_IRQ (82)
65#define GPIO85_MMC_WP (85) 65#define GPIO85_MMC_WP (85)
66 66
67#define CM_X300_MMC_IRQ IRQ_GPIO(GPIO82_MMC_IRQ) 67#define CM_X300_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ)
68 68
69#define GPIO95_RTC_CS (95) 69#define GPIO95_RTC_CS (95)
70#define GPIO96_RTC_WR (96) 70#define GPIO96_RTC_WR (96)
@@ -229,8 +229,8 @@ static struct resource dm9000_resources[] = {
229 .flags = IORESOURCE_MEM, 229 .flags = IORESOURCE_MEM,
230 }, 230 },
231 [2] = { 231 [2] = {
232 .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), 232 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
233 .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), 233 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
235 } 235 }
236}; 236};
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 05bfa1b1c001..f0fe9a51dfcc 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -218,8 +218,8 @@ static struct resource colibri_pxa270_dm9000_resources[] = {
218 .flags = IORESOURCE_MEM, 218 .flags = IORESOURCE_MEM,
219 }, 219 },
220 { 220 {
221 .start = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), 221 .start = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
222 .end = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), 222 .end = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
223 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, 223 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
224 }, 224 },
225}; 225};
@@ -249,7 +249,7 @@ static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = {
249}; 249};
250 250
251static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = { 251static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = {
252 .irq = gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ), 252 .irq = PXA_GPIO_TO_IRQ(GPIO113_COLIBRI_PXA270_TS_IRQ),
253}; 253};
254 254
255static struct platform_device colibri_pxa270_ucb1400_device = { 255static struct platform_device colibri_pxa270_ucb1400_device = {
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index c825e8bf2db1..0a6222e20f9b 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -78,8 +78,8 @@ static struct resource colibri_asix_resource[] = {
78 .flags = IORESOURCE_MEM, 78 .flags = IORESOURCE_MEM,
79 }, 79 },
80 [1] = { 80 [1] = {
81 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 81 .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
82 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 82 .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
83 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, 83 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
84 } 84 }
85}; 85};
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 692e1ffc5586..8cbb2b43ed11 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -115,8 +115,8 @@ static struct resource colibri_asix_resource[] = {
115 .flags = IORESOURCE_MEM, 115 .flags = IORESOURCE_MEM,
116 }, 116 },
117 [1] = { 117 [1] = {
118 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 118 .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
119 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 119 .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
120 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, 120 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
121 } 121 }
122}; 122};
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 549468d088b9..3812ba0ff50c 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -531,7 +531,7 @@ static struct spi_board_info corgi_spi_devices[] = {
531 .chip_select = 0, 531 .chip_select = 0,
532 .platform_data = &corgi_ads7846_info, 532 .platform_data = &corgi_ads7846_info,
533 .controller_data= &corgi_ads7846_chip, 533 .controller_data= &corgi_ads7846_chip,
534 .irq = gpio_to_irq(CORGI_GPIO_TP_INT), 534 .irq = PXA_GPIO_TO_IRQ(CORGI_GPIO_TP_INT),
535 }, { 535 }, {
536 .modalias = "corgi-lcd", 536 .modalias = "corgi-lcd",
537 .max_speed_hz = 50000, 537 .max_speed_hz = 50000,
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 29034778bfda..eca862fb2cd5 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -40,7 +40,9 @@ static struct gpio charger_gpios[] = {
40 { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, 40 { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
41 { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, 41 { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
42 { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" }, 42 { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" },
43 { CORGI_GPIO_AC_IN, GPIOF_IN, "Charger Detection" },
43 { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" }, 44 { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" },
45 { CORGI_GPIO_WAKEUP, GPIOF_IN, "System wakeup notification" },
44}; 46};
45 47
46static void corgi_charger_init(void) 48static void corgi_charger_init(void)
@@ -90,7 +92,12 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
90{ 92{
91 int is_resume = 0; 93 int is_resume = 0;
92 94
93 dev_dbg(sharpsl_pm.dev, "GPLR0 = %x,%x\n", GPLR0, PEDR); 95 dev_dbg(sharpsl_pm.dev, "PEDR = %x, GPIO_AC_IN = %d, "
96 "GPIO_CHRG_FULL = %d, GPIO_KEY_INT = %d, GPIO_WAKEUP = %d\n",
97 PEDR, gpio_get_value(CORGI_GPIO_AC_IN),
98 gpio_get_value(CORGI_GPIO_CHRG_FULL),
99 gpio_get_value(CORGI_GPIO_KEY_INT),
100 gpio_get_value(CORGI_GPIO_WAKEUP));
94 101
95 if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) { 102 if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) {
96 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) { 103 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
@@ -124,14 +131,21 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
124 131
125static unsigned long corgi_charger_wakeup(void) 132static unsigned long corgi_charger_wakeup(void)
126{ 133{
127 return ~GPLR0 & ( GPIO_bit(CORGI_GPIO_AC_IN) | GPIO_bit(CORGI_GPIO_KEY_INT) | GPIO_bit(CORGI_GPIO_WAKEUP) ); 134 unsigned long ret;
135
136 ret = (!gpio_get_value(CORGI_GPIO_AC_IN) << GPIO_bit(CORGI_GPIO_AC_IN))
137 | (!gpio_get_value(CORGI_GPIO_KEY_INT)
138 << GPIO_bit(CORGI_GPIO_KEY_INT))
139 | (!gpio_get_value(CORGI_GPIO_WAKEUP)
140 << GPIO_bit(CORGI_GPIO_WAKEUP));
141 return ret;
128} 142}
129 143
130unsigned long corgipm_read_devdata(int type) 144unsigned long corgipm_read_devdata(int type)
131{ 145{
132 switch(type) { 146 switch(type) {
133 case SHARPSL_STATUS_ACIN: 147 case SHARPSL_STATUS_ACIN:
134 return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0); 148 return !gpio_get_value(CORGI_GPIO_AC_IN);
135 case SHARPSL_STATUS_LOCK: 149 case SHARPSL_STATUS_LOCK:
136 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); 150 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
137 case SHARPSL_STATUS_CHRGFULL: 151 case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 2e0425404de5..5bc13121eac5 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -1051,6 +1051,36 @@ struct platform_device pxa3xx_device_ssp4 = {
1051}; 1051};
1052#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ 1052#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
1053 1053
1054struct resource pxa_resource_gpio[] = {
1055 {
1056 .start = 0x40e00000,
1057 .end = 0x40e0ffff,
1058 .flags = IORESOURCE_MEM,
1059 }, {
1060 .start = IRQ_GPIO0,
1061 .end = IRQ_GPIO0,
1062 .name = "gpio0",
1063 .flags = IORESOURCE_IRQ,
1064 }, {
1065 .start = IRQ_GPIO1,
1066 .end = IRQ_GPIO1,
1067 .name = "gpio1",
1068 .flags = IORESOURCE_IRQ,
1069 }, {
1070 .start = IRQ_GPIO_2_x,
1071 .end = IRQ_GPIO_2_x,
1072 .name = "gpio_mux",
1073 .flags = IORESOURCE_IRQ,
1074 },
1075};
1076
1077struct platform_device pxa_device_gpio = {
1078 .name = "pxa-gpio",
1079 .id = -1,
1080 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1081 .resource = pxa_resource_gpio,
1082};
1083
1054/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. 1084/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1055 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ 1085 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1056void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info) 1086void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 2fd5a8b35757..1475db107254 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -16,6 +16,7 @@ extern struct platform_device pxa_device_ficp;
16extern struct platform_device sa1100_device_rtc; 16extern struct platform_device sa1100_device_rtc;
17extern struct platform_device pxa_device_rtc; 17extern struct platform_device pxa_device_rtc;
18extern struct platform_device pxa_device_ac97; 18extern struct platform_device pxa_device_ac97;
19extern struct platform_device pxa_device_gpio;
19 20
20extern struct platform_device pxa27x_device_i2c_power; 21extern struct platform_device pxa27x_device_i2c_power;
21extern struct platform_device pxa27x_device_ohci; 22extern struct platform_device pxa27x_device_ohci;
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 94acc0b01dd6..3358f4da2ec9 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -70,7 +70,7 @@
70/* common GPIOs */ 70/* common GPIOs */
71#define GPIO11_NAND_CS (11) 71#define GPIO11_NAND_CS (11)
72#define GPIO41_ETHIRQ (41) 72#define GPIO41_ETHIRQ (41)
73#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ) 73#define EM_X270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO41_ETHIRQ)
74#define GPIO115_WLAN_PWEN (115) 74#define GPIO115_WLAN_PWEN (115)
75#define GPIO19_WLAN_STRAP (19) 75#define GPIO19_WLAN_STRAP (19)
76#define GPIO9_USB_VBUS_EN (9) 76#define GPIO9_USB_VBUS_EN (9)
@@ -805,7 +805,7 @@ static struct spi_board_info em_x270_spi_devices[] __initdata = {
805 .modalias = "libertas_spi", 805 .modalias = "libertas_spi",
806 .max_speed_hz = 13000000, 806 .max_speed_hz = 13000000,
807 .bus_num = 2, 807 .bus_num = 2,
808 .irq = IRQ_GPIO(116), 808 .irq = PXA_GPIO_TO_IRQ(116),
809 .chip_select = 0, 809 .chip_select = 0,
810 .controller_data = &em_x270_libertas_chip, 810 .controller_data = &em_x270_libertas_chip,
811 .platform_data = &em_x270_libertas_pdata, 811 .platform_data = &em_x270_libertas_pdata,
@@ -1203,7 +1203,7 @@ static struct da903x_platform_data em_x270_da9030_info = {
1203 1203
1204static struct i2c_board_info em_x270_i2c_pmic_info = { 1204static struct i2c_board_info em_x270_i2c_pmic_info = {
1205 I2C_BOARD_INFO("da9030", 0x49), 1205 I2C_BOARD_INFO("da9030", 0x49),
1206 .irq = IRQ_GPIO(0), 1206 .irq = PXA_GPIO_TO_IRQ(0),
1207 .platform_data = &em_x270_da9030_info, 1207 .platform_data = &em_x270_da9030_info,
1208}; 1208};
1209 1209
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index d82b7aa3c096..e556a1e3ff0f 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -119,8 +119,8 @@ struct resource eseries_tmio_resources[] = {
119 .flags = IORESOURCE_MEM, 119 .flags = IORESOURCE_MEM,
120 }, 120 },
121 [1] = { 121 [1] = {
122 .start = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ), 122 .start = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
123 .end = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ), 123 .end = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
124 .flags = IORESOURCE_IRQ, 124 .flags = IORESOURCE_IRQ,
125 }, 125 },
126}; 126};
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 6f6368ece9bd..82e9976e5657 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -252,8 +252,8 @@ static struct resource asic3_resources[] = {
252 .flags = IORESOURCE_MEM, 252 .flags = IORESOURCE_MEM,
253 }, 253 },
254 [1] = { 254 [1] = {
255 .start = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ), 255 .start = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ),
256 .end = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ), 256 .end = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ),
257 .flags = IORESOURCE_IRQ, 257 .flags = IORESOURCE_IRQ,
258 }, 258 },
259 /* SD part */ 259 /* SD part */
@@ -263,8 +263,8 @@ static struct resource asic3_resources[] = {
263 .flags = IORESOURCE_MEM, 263 .flags = IORESOURCE_MEM,
264 }, 264 },
265 [3] = { 265 [3] = {
266 .start = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ), 266 .start = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
267 .end = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ), 267 .end = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
268 .flags = IORESOURCE_IRQ, 268 .flags = IORESOURCE_IRQ,
269 }, 269 },
270}; 270};
@@ -587,7 +587,7 @@ static struct spi_board_info tsc2046_board_info[] __initdata = {
587 .modalias = "ads7846", 587 .modalias = "ads7846",
588 .bus_num = 2, 588 .bus_num = 2,
589 .max_speed_hz = 2600000, /* 100 kHz sample rate */ 589 .max_speed_hz = 2600000, /* 100 kHz sample rate */
590 .irq = gpio_to_irq(GPIO58_HX4700_TSC2046_nPENIRQ), 590 .irq = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ),
591 .platform_data = &tsc2046_info, 591 .platform_data = &tsc2046_info,
592 .controller_data = &tsc2046_chip, 592 .controller_data = &tsc2046_chip,
593 }, 593 },
@@ -635,15 +635,15 @@ static struct resource power_supply_resources[] = {
635 .name = "ac", 635 .name = "ac",
636 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 636 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
637 IORESOURCE_IRQ_LOWEDGE, 637 IORESOURCE_IRQ_LOWEDGE,
638 .start = gpio_to_irq(GPIOD9_nAC_IN), 638 .start = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN),
639 .end = gpio_to_irq(GPIOD9_nAC_IN), 639 .end = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN),
640 }, 640 },
641 [1] = { 641 [1] = {
642 .name = "usb", 642 .name = "usb",
643 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 643 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
644 IORESOURCE_IRQ_LOWEDGE, 644 IORESOURCE_IRQ_LOWEDGE,
645 .start = gpio_to_irq(GPIOD14_nUSBC_DETECT), 645 .start = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT),
646 .end = gpio_to_irq(GPIOD14_nUSBC_DETECT), 646 .end = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT),
647 }, 647 },
648}; 648};
649 649
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index f78d5db758da..33e81e87a9da 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -86,7 +86,7 @@ static struct spi_board_info mcp251x_board_info[] = {
86 .chip_select = 0, 86 .chip_select = 0,
87 .platform_data = &mcp251x_info, 87 .platform_data = &mcp251x_info,
88 .controller_data = &mcp251x_chip_info1, 88 .controller_data = &mcp251x_chip_info1,
89 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ1) 89 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ1)
90 }, 90 },
91 { 91 {
92 .modalias = "mcp2515", 92 .modalias = "mcp2515",
@@ -95,7 +95,7 @@ static struct spi_board_info mcp251x_board_info[] = {
95 .chip_select = 1, 95 .chip_select = 1,
96 .platform_data = &mcp251x_info, 96 .platform_data = &mcp251x_info,
97 .controller_data = &mcp251x_chip_info2, 97 .controller_data = &mcp251x_chip_info2,
98 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ2) 98 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ2)
99 }, 99 },
100 { 100 {
101 .modalias = "mcp2515", 101 .modalias = "mcp2515",
@@ -104,7 +104,7 @@ static struct spi_board_info mcp251x_board_info[] = {
104 .chip_select = 0, 104 .chip_select = 0,
105 .platform_data = &mcp251x_info, 105 .platform_data = &mcp251x_info,
106 .controller_data = &mcp251x_chip_info3, 106 .controller_data = &mcp251x_chip_info3,
107 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ3) 107 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ3)
108 }, 108 },
109 { 109 {
110 .modalias = "mcp2515", 110 .modalias = "mcp2515",
@@ -113,7 +113,7 @@ static struct spi_board_info mcp251x_board_info[] = {
113 .chip_select = 1, 113 .chip_select = 1,
114 .platform_data = &mcp251x_info, 114 .platform_data = &mcp251x_info,
115 .controller_data = &mcp251x_chip_info4, 115 .controller_data = &mcp251x_chip_info4,
116 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ4) 116 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ4)
117 } 117 }
118}; 118};
119 119
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index ddf20e5c376e..bb98ff57b71f 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -75,8 +75,8 @@ static struct resource smc91x_resources[] = {
75 .flags = IORESOURCE_MEM, 75 .flags = IORESOURCE_MEM,
76 }, 76 },
77 [1] = { 77 [1] = {
78 .start = IRQ_GPIO(4), 78 .start = PXA_GPIO_TO_IRQ(4),
79 .end = IRQ_GPIO(4), 79 .end = PXA_GPIO_TO_IRQ(4),
80 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 80 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
81 } 81 }
82}; 82};
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 6d7eab3d0867..f02fa1e6ba86 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -172,9 +172,9 @@ enum balloon3_features {
172/* Balloon3 Interrupts */ 172/* Balloon3 Interrupts */
173#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) 173#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x))
174 174
175#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ) 175#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ)
176#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) 176#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ)
177#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) 177#define BALLOON3_S0_CD_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD)
178 178
179#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) 179#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16)
180 180
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 5dfd1195a5a7..f3c3493b468d 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -66,18 +66,18 @@
66/* 66/*
67 * Corgi Interrupts 67 * Corgi Interrupts
68 */ 68 */
69#define CORGI_IRQ_GPIO_KEY_INT IRQ_GPIO(0) 69#define CORGI_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(0)
70#define CORGI_IRQ_GPIO_AC_IN IRQ_GPIO(1) 70#define CORGI_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1)
71#define CORGI_IRQ_GPIO_WAKEUP IRQ_GPIO(3) 71#define CORGI_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(3)
72#define CORGI_IRQ_GPIO_AK_INT IRQ_GPIO(4) 72#define CORGI_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(4)
73#define CORGI_IRQ_GPIO_TP_INT IRQ_GPIO(5) 73#define CORGI_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5)
74#define CORGI_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) 74#define CORGI_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9)
75#define CORGI_IRQ_GPIO_nSD_INT IRQ_GPIO(10) 75#define CORGI_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(10)
76#define CORGI_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(11) 76#define CORGI_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(11)
77#define CORGI_IRQ_GPIO_CF_CD IRQ_GPIO(14) 77#define CORGI_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14)
78#define CORGI_IRQ_GPIO_CHRG_FULL IRQ_GPIO(16) /* Battery fully charged */ 78#define CORGI_IRQ_GPIO_CHRG_FULL PXA_GPIO_TO_IRQ(16) /* Battery fully charged */
79#define CORGI_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) 79#define CORGI_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17)
80#define CORGI_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(58+(a)) /* Keyboard Sense lines */ 80#define CORGI_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(58+(a)) /* Keyboard Sense lines */
81 81
82 82
83/* 83/*
@@ -98,7 +98,7 @@
98 CORGI_SCP_MIC_BIAS ) 98 CORGI_SCP_MIC_BIAS )
99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) 99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
100 100
101#define CORGI_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) 101#define CORGI_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
102#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0) 102#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0)
103#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */ 103#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */
104#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */ 104#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */
diff --git a/arch/arm/mach-pxa/include/mach/csb726.h b/arch/arm/mach-pxa/include/mach/csb726.h
index 747ab1a71f2f..2628e7b72116 100644
--- a/arch/arm/mach-pxa/include/mach/csb726.h
+++ b/arch/arm/mach-pxa/include/mach/csb726.h
@@ -19,8 +19,8 @@
19#define CSB726_FLASH_SIZE (64 * 1024 * 1024) 19#define CSB726_FLASH_SIZE (64 * 1024 * 1024)
20#define CSB726_FLASH_uMON (8 * 1024 * 1024) 20#define CSB726_FLASH_uMON (8 * 1024 * 1024)
21 21
22#define CSB726_IRQ_LAN gpio_to_irq(CSB726_GPIO_IRQ_LAN) 22#define CSB726_IRQ_LAN PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_LAN)
23#define CSB726_IRQ_SM501 gpio_to_irq(CSB726_GPIO_IRQ_SM501) 23#define CSB726_IRQ_SM501 PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_SM501)
24 24
25#endif 25#endif
26 26
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
deleted file mode 100644
index 41b4c93a96c2..000000000000
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * Written by Philipp Zabel <philipp.zabel@gmail.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 */
19#ifndef __MACH_PXA_GPIO_PXA_H
20#define __MACH_PXA_GPIO_PXA_H
21
22#include <mach/irqs.h>
23#include <mach/hardware.h>
24
25#define GPIO_REGS_VIRT io_p2v(0x40E00000)
26
27#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
28#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
29
30/* GPIO Pin Level Registers */
31#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00)
32#define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00)
33#define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00)
34#define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00)
35
36/* GPIO Pin Direction Registers */
37#define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c)
38#define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c)
39#define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c)
40#define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c)
41
42/* GPIO Pin Output Set Registers */
43#define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18)
44#define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18)
45#define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18)
46#define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18)
47
48/* GPIO Pin Output Clear Registers */
49#define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24)
50#define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24)
51#define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24)
52#define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24)
53
54/* GPIO Rising Edge Detect Registers */
55#define GRER0 GPIO_REG(BANK_OFF(0) + 0x30)
56#define GRER1 GPIO_REG(BANK_OFF(1) + 0x30)
57#define GRER2 GPIO_REG(BANK_OFF(2) + 0x30)
58#define GRER3 GPIO_REG(BANK_OFF(3) + 0x30)
59
60/* GPIO Falling Edge Detect Registers */
61#define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c)
62#define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c)
63#define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c)
64#define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c)
65
66/* GPIO Edge Detect Status Registers */
67#define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48)
68#define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48)
69#define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48)
70#define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48)
71
72/* GPIO Alternate Function Select Registers */
73#define GAFR0_L GPIO_REG(0x0054)
74#define GAFR0_U GPIO_REG(0x0058)
75#define GAFR1_L GPIO_REG(0x005C)
76#define GAFR1_U GPIO_REG(0x0060)
77#define GAFR2_L GPIO_REG(0x0064)
78#define GAFR2_U GPIO_REG(0x0068)
79#define GAFR3_L GPIO_REG(0x006C)
80#define GAFR3_U GPIO_REG(0x0070)
81
82/* More handy macros. The argument is a literal GPIO number. */
83
84#define GPIO_bit(x) (1 << ((x) & 0x1f))
85
86#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
87#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
88#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
89#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
90#define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
91#define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
92#define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
93#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
94
95
96#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM
97
98#define gpio_to_bank(gpio) ((gpio) >> 5)
99
100#ifdef CONFIG_CPU_PXA26x
101/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
102 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
103 */
104static inline int __gpio_is_inverted(unsigned gpio)
105{
106 return cpu_is_pxa25x() && gpio > 85;
107}
108#else
109static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
110#endif
111
112/*
113 * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
114 * function of a GPIO, and GPDRx cannot be altered once configured. It
115 * is attributed as "occupied" here (I know this terminology isn't
116 * accurate, you are welcome to propose a better one :-)
117 */
118static inline int __gpio_is_occupied(unsigned gpio)
119{
120 if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
121 int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
122 int dir = GPDR(gpio) & GPIO_bit(gpio);
123
124 if (__gpio_is_inverted(gpio))
125 return af != 1 || dir == 0;
126 else
127 return af != 0 || dir != 0;
128 } else
129 return GPDR(gpio) & GPIO_bit(gpio);
130}
131
132#include <plat/gpio-pxa.h>
133#endif /* __MACH_PXA_GPIO_PXA_H */
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 004cade7bb13..0248e433bc98 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -25,24 +25,8 @@
25#define __ASM_ARCH_PXA_GPIO_H 25#define __ASM_ARCH_PXA_GPIO_H
26 26
27#include <asm-generic/gpio.h> 27#include <asm-generic/gpio.h>
28/* The defines for the driver are needed for the accelerated accessors */
29#include "gpio-pxa.h"
30 28
31#define gpio_to_irq(gpio) IRQ_GPIO(gpio) 29#include <mach/irqs.h>
30#include <mach/hardware.h>
32 31
33static inline int irq_to_gpio(unsigned int irq)
34{
35 int gpio;
36
37 if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1)
38 return irq - IRQ_GPIO0;
39
40 gpio = irq - PXA_GPIO_IRQ_BASE;
41 if (gpio >= 2 && gpio < NR_BUILTIN_GPIO)
42 return gpio;
43
44 return -1;
45}
46
47#include <plat/gpio.h>
48#endif 32#endif
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h
index 9b898680b206..dba14b6503ad 100644
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -24,7 +24,7 @@ has detected a cable insertion; driven low otherwise. */
24#define GPIO_GUMSTIX_USB_GPIOx 41 24#define GPIO_GUMSTIX_USB_GPIOx 41
25 25
26/* usb state change */ 26/* usb state change */
27#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) 27#define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
28 28
29#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN) 29#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
30#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT) 30#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
@@ -35,7 +35,7 @@ has detected a cable insertion; driven low otherwise. */
35 */ 35 */
36#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */ 36#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */
37#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */ 37#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */
38#define GUMSTIX_IRQ_GPIO_nSD_DETECT IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT) 38#define GUMSTIX_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT)
39 39
40/* 40/*
41 * SMC Ethernet definitions 41 * SMC Ethernet definitions
@@ -49,10 +49,10 @@ has detected a cable insertion; driven low otherwise. */
49 49
50#define GPIO_GUMSTIX_ETH0 36 50#define GPIO_GUMSTIX_ETH0 36
51#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN) 51#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
52#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0) 52#define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
53#define GPIO_GUMSTIX_ETH1 27 53#define GPIO_GUMSTIX_ETH1 27
54#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN) 54#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
55#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1) 55#define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
56 56
57 57
58/* CF reset line */ 58/* CF reset line */
@@ -63,18 +63,18 @@ has detected a cable insertion; driven low otherwise. */
63#define GPIO4_nSTSCHG GPIO4_nBVD1 63#define GPIO4_nSTSCHG GPIO4_nBVD1
64#define GPIO11_nCD 11 64#define GPIO11_nCD 11
65#define GPIO26_PRDY_nBSY 26 65#define GPIO26_PRDY_nBSY 26
66#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG) 66#define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
67#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD) 67#define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD)
68#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY) 68#define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
69 69
70/* CF slot 1 */ 70/* CF slot 1 */
71#define GPIO18_nBVD1 18 71#define GPIO18_nBVD1 18
72#define GPIO18_nSTSCHG GPIO18_nBVD1 72#define GPIO18_nSTSCHG GPIO18_nBVD1
73#define GPIO36_nCD 36 73#define GPIO36_nCD 36
74#define GPIO27_PRDY_nBSY 27 74#define GPIO27_PRDY_nBSY 27
75#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG) 75#define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
76#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD) 76#define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD)
77#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY) 77#define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
78 78
79/* CF GPIO line modes */ 79/* CF GPIO line modes */
80#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN) 80#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
index 37408449ec25..8bc02913517c 100644
--- a/arch/arm/mach-pxa/include/mach/hx4700.h
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -15,7 +15,7 @@
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/mfd/asic3.h> 16#include <linux/mfd/asic3.h>
17 17
18#define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO 18#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO
19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) 19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
20#define HX4700_NR_IRQS (IRQ_BOARD_START + 70) 20#define HX4700_NR_IRQS (IRQ_BOARD_START + 70)
21 21
diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h
index 5eff96fcc944..22a96f87232b 100644
--- a/arch/arm/mach-pxa/include/mach/idp.h
+++ b/arch/arm/mach-pxa/include/mach/idp.h
@@ -131,28 +131,26 @@
131#define PCC_VS2 (1 << 1) 131#define PCC_VS2 (1 << 1)
132#define PCC_VS1 (1 << 0) 132#define PCC_VS1 (1 << 0)
133 133
134#define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x)))
135
136/* A listing of interrupts used by external hardware devices */ 134/* A listing of interrupts used by external hardware devices */
137 135
138#define TOUCH_PANEL_IRQ IRQ_GPIO(5) 136#define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5)
139#define IDE_IRQ IRQ_GPIO(21) 137#define IDE_IRQ PXA_GPIO_TO_IRQ(21)
140 138
141#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 139#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
142 140
143#define ETHERNET_IRQ IRQ_GPIO(4) 141#define ETHERNET_IRQ PXA_GPIO_TO_IRQ(4)
144#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING 142#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
145 143
146#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING 144#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
147 145
148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) 146#define PCMCIA_S0_CD_VALID PXA_GPIO_TO_IRQ(7)
149#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH 147#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
150 148
151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) 149#define PCMCIA_S1_CD_VALID PXA_GPIO_TO_IRQ(8)
152#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH 150#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
153 151
154#define PCMCIA_S0_RDYINT IRQ_GPIO(19) 152#define PCMCIA_S0_RDYINT PXA_GPIO_TO_IRQ(19)
155#define PCMCIA_S1_RDYINT IRQ_GPIO(22) 153#define PCMCIA_S1_RDYINT PXA_GPIO_TO_IRQ(22)
156 154
157 155
158/* 156/*
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 7cc5a781e99e..32975adf3ca4 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -88,10 +88,8 @@
88#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ 88#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */
89 89
90#define PXA_GPIO_IRQ_BASE PXA_IRQ(96) 90#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)
91#define PXA_GPIO_IRQ_NUM (192) 91#define PXA_NR_BUILTIN_GPIO (192)
92 92#define PXA_GPIO_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
93#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
94#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
95 93
96/* 94/*
97 * The following interrupts are for board specific purposes. Since 95 * The following interrupts are for board specific purposes. Since
@@ -100,7 +98,7 @@
100 * By default, no board IRQ is reserved. It should be finished in 98 * By default, no board IRQ is reserved. It should be finished in
101 * custom board since sparse IRQ is already enabled. 99 * custom board since sparse IRQ is already enabled.
102 */ 100 */
103#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) 101#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
104 102
105#define NR_IRQS (IRQ_BOARD_START) 103#define NR_IRQS (IRQ_BOARD_START)
106 104
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index b6238cbd8aea..8066be54e9f5 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -1,13 +1,11 @@
1#ifndef __ASM_ARCH_LITTLETON_H 1#ifndef __ASM_ARCH_LITTLETON_H
2#define __ASM_ARCH_LITTLETON_H 2#define __ASM_ARCH_LITTLETON_H
3 3
4#include <mach/gpio-pxa.h>
5
6#define LITTLETON_ETH_PHYS 0x30000000 4#define LITTLETON_ETH_PHYS 0x30000000
7 5
8#define LITTLETON_GPIO_LCD_CS (17) 6#define LITTLETON_GPIO_LCD_CS (17)
9 7
10#define EXT0_GPIO_BASE (NR_BUILTIN_GPIO) 8#define EXT0_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
11#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x)) 9#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x))
12 10
13#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8) 11#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8)
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h
index 7cbfc5d3f9df..ba6a6e1d29e9 100644
--- a/arch/arm/mach-pxa/include/mach/magician.h
+++ b/arch/arm/mach-pxa/include/mach/magician.h
@@ -78,7 +78,7 @@
78 * CPLD EGPIOs 78 * CPLD EGPIOs
79 */ 79 */
80 80
81#define MAGICIAN_EGPIO_BASE NR_BUILTIN_GPIO 81#define MAGICIAN_EGPIO_BASE PXA_NR_BUILTIN_GPIO
82#define MAGICIAN_EGPIO(reg,bit) \ 82#define MAGICIAN_EGPIO(reg,bit) \
83 (MAGICIAN_EGPIO_BASE + 8*reg + bit) 83 (MAGICIAN_EGPIO_BASE + 8*reg + bit)
84 84
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
index ae536e86d8e8..2c4471336570 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/include/mach/palmld.h
@@ -68,10 +68,10 @@
68/* 20, 53 and 86 are usb related too */ 68/* 20, 53 and 86 are usb related too */
69 69
70/* INTERRUPTS */ 70/* INTERRUPTS */
71#define IRQ_GPIO_PALMLD_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMLD_GPIO_RESET) 71#define IRQ_GPIO_PALMLD_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET)
72#define IRQ_GPIO_PALMLD_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMLD_SD_DETECT_N) 72#define IRQ_GPIO_PALMLD_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N)
73#define IRQ_GPIO_PALMLD_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMLD_WM9712_IRQ) 73#define IRQ_GPIO_PALMLD_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ)
74#define IRQ_GPIO_PALMLD_IDE_IRQ IRQ_GPIO(GPIO_NR_PALMLD_IDE_IRQ) 74#define IRQ_GPIO_PALMLD_IDE_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ)
75 75
76 76
77/** HERE ARE INIT VALUES **/ 77/** HERE ARE INIT VALUES **/
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
index 6baf7469d4ec..0bd4f036c72f 100644
--- a/arch/arm/mach-pxa/include/mach/palmt5.h
+++ b/arch/arm/mach-pxa/include/mach/palmt5.h
@@ -48,10 +48,10 @@
48#define GPIO_NR_PALMT5_BT_RESET 83 48#define GPIO_NR_PALMT5_BT_RESET 83
49 49
50/* INTERRUPTS */ 50/* INTERRUPTS */
51#define IRQ_GPIO_PALMT5_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMT5_SD_DETECT_N) 51#define IRQ_GPIO_PALMT5_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N)
52#define IRQ_GPIO_PALMT5_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMT5_WM9712_IRQ) 52#define IRQ_GPIO_PALMT5_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ)
53#define IRQ_GPIO_PALMT5_USB_DETECT IRQ_GPIO(GPIO_NR_PALMT5_USB_DETECT) 53#define IRQ_GPIO_PALMT5_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT)
54#define IRQ_GPIO_PALMT5_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMT5_GPIO_RESET) 54#define IRQ_GPIO_PALMT5_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET)
55 55
56/** HERE ARE INIT VALUES **/ 56/** HERE ARE INIT VALUES **/
57 57
diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h
index 3f9dd3fd4638..c383a21680b6 100644
--- a/arch/arm/mach-pxa/include/mach/palmtc.h
+++ b/arch/arm/mach-pxa/include/mach/palmtc.h
@@ -52,8 +52,8 @@
52#define GPIO_NR_PALMTC_IR_DISABLE 45 52#define GPIO_NR_PALMTC_IR_DISABLE 45
53 53
54/* IRQs */ 54/* IRQs */
55#define IRQ_GPIO_PALMTC_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N) 55#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N)
56#define IRQ_GPIO_PALMTC_WLAN_READY IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY) 56#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY)
57 57
58/* UCB1400 GPIOs */ 58/* UCB1400 GPIOs */
59#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) 59#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00)
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 7074a6ed46c6..f2e530380253 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -62,10 +62,10 @@
62#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 62#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79
63 63
64/* INTERRUPTS */ 64/* INTERRUPTS */
65#define IRQ_GPIO_PALMTX_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N) 65#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N)
66#define IRQ_GPIO_PALMTX_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ) 66#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ)
67#define IRQ_GPIO_PALMTX_USB_DETECT IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT) 67#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT)
68#define IRQ_GPIO_PALMTX_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET) 68#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET)
69 69
70/** HERE ARE INIT VALUES **/ 70/** HERE ARE INIT VALUES **/
71 71
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
index 4bac588478a8..6bf28de228bd 100644
--- a/arch/arm/mach-pxa/include/mach/pcm027.h
+++ b/arch/arm/mach-pxa/include/mach/pcm027.h
@@ -34,7 +34,7 @@
34 34
35/* I2C RTC */ 35/* I2C RTC */
36#define PCM027_RTC_IRQ_GPIO 0 36#define PCM027_RTC_IRQ_GPIO 0
37#define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO) 37#define PCM027_RTC_IRQ PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO)
38#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 38#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
39#define ADR_PCM027_RTC 0x51 /* I2C address */ 39#define ADR_PCM027_RTC 0x51 /* I2C address */
40 40
@@ -43,21 +43,21 @@
43 43
44/* Ethernet chip (SMSC91C111) */ 44/* Ethernet chip (SMSC91C111) */
45#define PCM027_ETH_IRQ_GPIO 52 45#define PCM027_ETH_IRQ_GPIO 52
46#define PCM027_ETH_IRQ IRQ_GPIO(PCM027_ETH_IRQ_GPIO) 46#define PCM027_ETH_IRQ PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO)
47#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING 47#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING
48#define PCM027_ETH_PHYS PXA_CS5_PHYS 48#define PCM027_ETH_PHYS PXA_CS5_PHYS
49#define PCM027_ETH_SIZE (1*1024*1024) 49#define PCM027_ETH_SIZE (1*1024*1024)
50 50
51/* CAN controller SJA1000 (unsupported yet) */ 51/* CAN controller SJA1000 (unsupported yet) */
52#define PCM027_CAN_IRQ_GPIO 114 52#define PCM027_CAN_IRQ_GPIO 114
53#define PCM027_CAN_IRQ IRQ_GPIO(PCM027_CAN_IRQ_GPIO) 53#define PCM027_CAN_IRQ PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO)
54#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 54#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
55#define PCM027_CAN_PHYS 0x22000000 55#define PCM027_CAN_PHYS 0x22000000
56#define PCM027_CAN_SIZE 0x100 56#define PCM027_CAN_SIZE 0x100
57 57
58/* SPI GPIO expander (unsupported yet) */ 58/* SPI GPIO expander (unsupported yet) */
59#define PCM027_EGPIO_IRQ_GPIO 27 59#define PCM027_EGPIO_IRQ_GPIO 27
60#define PCM027_EGPIO_IRQ IRQ_GPIO(PCM027_EGPIO_IRQ_GPIO) 60#define PCM027_EGPIO_IRQ PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO)
61#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 61#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
62#define PCM027_EGPIO_CS 24 62#define PCM027_EGPIO_CS 24
63/* 63/*
diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
index 8a4383b776d7..d72791695b26 100644
--- a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
+++ b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
@@ -28,14 +28,14 @@
28 28
29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ 29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
30#define PCM990_CTRL_INT_IRQ_GPIO 9 30#define PCM990_CTRL_INT_IRQ_GPIO 9
31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) 31#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING 32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ 33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
34#define PCM990_CTRL_BASE 0xea000000 34#define PCM990_CTRL_BASE 0xea000000
35#define PCM990_CTRL_SIZE (1*1024*1024) 35#define PCM990_CTRL_SIZE (1*1024*1024)
36 36
37#define PCM990_CTRL_PWR_IRQ_GPIO 14 37#define PCM990_CTRL_PWR_IRQ_GPIO 14
38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) 38#define PCM990_CTRL_PWR_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO)
39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING 39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING
40 40
41/* visible CPLD (U7) registers */ 41/* visible CPLD (U7) registers */
@@ -132,7 +132,7 @@
132 * IDE 132 * IDE
133 */ 133 */
134#define PCM990_IDE_IRQ_GPIO 13 134#define PCM990_IDE_IRQ_GPIO 13
135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) 135#define PCM990_IDE_IRQ PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO)
136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING 136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ 137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */
138#define PCM990_IDE_PLD_BASE 0xee000000 138#define PCM990_IDE_PLD_BASE 0xee000000
@@ -188,11 +188,11 @@
188 * Compact Flash 188 * Compact Flash
189 */ 189 */
190#define PCM990_CF_IRQ_GPIO 11 190#define PCM990_CF_IRQ_GPIO 11
191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) 191#define PCM990_CF_IRQ PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO)
192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING 192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING
193 193
194#define PCM990_CF_CD_GPIO 12 194#define PCM990_CF_CD_GPIO 12
195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) 195#define PCM990_CF_CD PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO)
196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING 196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
197 197
198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ 198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
@@ -258,14 +258,14 @@
258 * Wolfson AC97 Touch 258 * Wolfson AC97 Touch
259 */ 259 */
260#define PCM990_AC97_IRQ_GPIO 10 260#define PCM990_AC97_IRQ_GPIO 10
261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) 261#define PCM990_AC97_IRQ PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO)
262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING 262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING
263 263
264/* 264/*
265 * MMC phyCORE 265 * MMC phyCORE
266 */ 266 */
267#define PCM990_MMC0_IRQ_GPIO 9 267#define PCM990_MMC0_IRQ_GPIO 9
268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) 268#define PCM990_MMC0_IRQ PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO)
269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
270 270
271/* 271/*
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 83d1cfd00fc9..f32ff75dcca8 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -47,18 +47,18 @@
47#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ 47#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */
48 48
49/* PXA GPIOs */ 49/* PXA GPIOs */
50#define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0) 50#define POODLE_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(0)
51#define POODLE_IRQ_GPIO_AC_IN IRQ_GPIO(1) 51#define POODLE_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1)
52#define POODLE_IRQ_GPIO_HP_IN IRQ_GPIO(4) 52#define POODLE_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(4)
53#define POODLE_IRQ_GPIO_CO IRQ_GPIO(16) 53#define POODLE_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(16)
54#define POODLE_IRQ_GPIO_TP_INT IRQ_GPIO(5) 54#define POODLE_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5)
55#define POODLE_IRQ_GPIO_WAKEUP IRQ_GPIO(11) 55#define POODLE_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(11)
56#define POODLE_IRQ_GPIO_GA_INT IRQ_GPIO(10) 56#define POODLE_IRQ_GPIO_GA_INT PXA_GPIO_TO_IRQ(10)
57#define POODLE_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) 57#define POODLE_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17)
58#define POODLE_IRQ_GPIO_CF_CD IRQ_GPIO(14) 58#define POODLE_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14)
59#define POODLE_IRQ_GPIO_nSD_INT IRQ_GPIO(8) 59#define POODLE_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(8)
60#define POODLE_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) 60#define POODLE_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9)
61#define POODLE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(13) 61#define POODLE_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(13)
62 62
63/* SCOOP GPIOs */ 63/* SCOOP GPIOs */
64#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11 64#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11
@@ -71,7 +71,7 @@
71#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) 71#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
72#define POODLE_SCOOP_IO_OUT ( 0 ) 72#define POODLE_SCOOP_IO_OUT ( 0 )
73 73
74#define POODLE_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) 74#define POODLE_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
75#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) 75#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0)
76#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) 76#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2)
77#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) 77#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7)
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index 685749a51c42..0bfe6507c95d 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -108,7 +108,7 @@
108#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) 108#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
109#define SPITZ_SCP_SUS_SET 0 109#define SPITZ_SCP_SUS_SET 0
110 110
111#define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO) 111#define SPITZ_SCP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
112#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0) 112#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0)
113#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1) 113#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1)
114#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2) 114#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2)
@@ -140,7 +140,7 @@
140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) 140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
141#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) 141#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
142 142
143#define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12) 143#define SPITZ_SCP2_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
144#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0) 144#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0)
145#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1) 145#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1)
146#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2) 146#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2)
@@ -152,7 +152,7 @@
152#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8) 152#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8)
153 153
154/* Akita IO Expander GPIOs */ 154/* Akita IO Expander GPIOs */
155#define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12) 155#define AKITA_IOEXP_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
156#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0) 156#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0)
157#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1) 157#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1)
158#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2) 158#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2)
@@ -164,23 +164,23 @@
164 164
165/* Spitz IRQ Definitions */ 165/* Spitz IRQ Definitions */
166 166
167#define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT) 167#define SPITZ_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT)
168#define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN) 168#define SPITZ_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN)
169#define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT) 169#define SPITZ_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT)
170#define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN) 170#define SPITZ_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN)
171#define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT) 171#define SPITZ_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT)
172#define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC) 172#define SPITZ_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC)
173#define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY) 173#define SPITZ_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY)
174#define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA) 174#define SPITZ_IRQ_GPIO_SWA PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA)
175#define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB) 175#define SPITZ_IRQ_GPIO_SWB PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB)
176#define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER) 176#define SPITZ_IRQ_GPIO_BAT_COVER PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER)
177#define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT) 177#define SPITZ_IRQ_GPIO_FATAL_BAT PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT)
178#define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO) 178#define SPITZ_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO)
179#define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ) 179#define SPITZ_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ)
180#define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD) 180#define SPITZ_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD)
181#define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ) 181#define SPITZ_IRQ_GPIO_CF2_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ)
182#define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT) 182#define SPITZ_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT)
183#define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT) 183#define SPITZ_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT)
184 184
185/* 185/*
186 * Shared data structures 186 * Shared data structures
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 1272c4b56ceb..2bb0e862598c 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -24,7 +24,7 @@
24/* 24/*
25 * SCOOP2 internal GPIOs 25 * SCOOP2 internal GPIOs
26 */ 26 */
27#define TOSA_SCOOP_GPIO_BASE NR_BUILTIN_GPIO 27#define TOSA_SCOOP_GPIO_BASE PXA_NR_BUILTIN_GPIO
28#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 28#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11
29#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1) 29#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1)
30#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) 30#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
@@ -42,7 +42,7 @@
42/* 42/*
43 * SCOOP2 jacket GPIOs 43 * SCOOP2 jacket GPIOs
44 */ 44 */
45#define TOSA_SCOOP_JC_GPIO_BASE (NR_BUILTIN_GPIO + 12) 45#define TOSA_SCOOP_JC_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
46#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0) 46#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
47#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) 47#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
48#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) 48#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
@@ -59,7 +59,7 @@
59/* 59/*
60 * TC6393XB GPIOs 60 * TC6393XB GPIOs
61 */ 61 */
62#define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12) 62#define TOSA_TC6393XB_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 2 * 12)
63 63
64#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0) 64#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0)
65#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1) 65#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1)
@@ -141,30 +141,30 @@
141/* 141/*
142 * Interrupts 142 * Interrupts
143 */ 143 */
144#define TOSA_IRQ_GPIO_WAKEUP IRQ_GPIO(TOSA_GPIO_WAKEUP) 144#define TOSA_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(TOSA_GPIO_WAKEUP)
145#define TOSA_IRQ_GPIO_AC_IN IRQ_GPIO(TOSA_GPIO_AC_IN) 145#define TOSA_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN)
146#define TOSA_IRQ_GPIO_RECORD_BTN IRQ_GPIO(TOSA_GPIO_RECORD_BTN) 146#define TOSA_IRQ_GPIO_RECORD_BTN PXA_GPIO_TO_IRQ(TOSA_GPIO_RECORD_BTN)
147#define TOSA_IRQ_GPIO_SYNC IRQ_GPIO(TOSA_GPIO_SYNC) 147#define TOSA_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(TOSA_GPIO_SYNC)
148#define TOSA_IRQ_GPIO_USB_IN IRQ_GPIO(TOSA_GPIO_USB_IN) 148#define TOSA_IRQ_GPIO_USB_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_USB_IN)
149#define TOSA_IRQ_GPIO_JACKET_DETECT IRQ_GPIO(TOSA_GPIO_JACKET_DETECT) 149#define TOSA_IRQ_GPIO_JACKET_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_JACKET_DETECT)
150#define TOSA_IRQ_GPIO_nSD_INT IRQ_GPIO(TOSA_GPIO_nSD_INT) 150#define TOSA_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_INT)
151#define TOSA_IRQ_GPIO_nSD_DETECT IRQ_GPIO(TOSA_GPIO_nSD_DETECT) 151#define TOSA_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_DETECT)
152#define TOSA_IRQ_GPIO_BAT1_CRG IRQ_GPIO(TOSA_GPIO_BAT1_CRG) 152#define TOSA_IRQ_GPIO_BAT1_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_CRG)
153#define TOSA_IRQ_GPIO_CF_CD IRQ_GPIO(TOSA_GPIO_CF_CD) 153#define TOSA_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_CD)
154#define TOSA_IRQ_GPIO_BAT0_CRG IRQ_GPIO(TOSA_GPIO_BAT0_CRG) 154#define TOSA_IRQ_GPIO_BAT0_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_CRG)
155#define TOSA_IRQ_GPIO_TC6393XB_INT IRQ_GPIO(TOSA_GPIO_TC6393XB_INT) 155#define TOSA_IRQ_GPIO_TC6393XB_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TC6393XB_INT)
156#define TOSA_IRQ_GPIO_BAT0_LOW IRQ_GPIO(TOSA_GPIO_BAT0_LOW) 156#define TOSA_IRQ_GPIO_BAT0_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_LOW)
157#define TOSA_IRQ_GPIO_EAR_IN IRQ_GPIO(TOSA_GPIO_EAR_IN) 157#define TOSA_IRQ_GPIO_EAR_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_EAR_IN)
158#define TOSA_IRQ_GPIO_CF_IRQ IRQ_GPIO(TOSA_GPIO_CF_IRQ) 158#define TOSA_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_IRQ)
159#define TOSA_IRQ_GPIO_ON_KEY IRQ_GPIO(TOSA_GPIO_ON_KEY) 159#define TOSA_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(TOSA_GPIO_ON_KEY)
160#define TOSA_IRQ_GPIO_VGA_LINE IRQ_GPIO(TOSA_GPIO_VGA_LINE) 160#define TOSA_IRQ_GPIO_VGA_LINE PXA_GPIO_TO_IRQ(TOSA_GPIO_VGA_LINE)
161#define TOSA_IRQ_GPIO_TP_INT IRQ_GPIO(TOSA_GPIO_TP_INT) 161#define TOSA_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TP_INT)
162#define TOSA_IRQ_GPIO_JC_CF_IRQ IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ) 162#define TOSA_IRQ_GPIO_JC_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_JC_CF_IRQ)
163#define TOSA_IRQ_GPIO_BAT_LOCKED IRQ_GPIO(TOSA_GPIO_BAT_LOCKED) 163#define TOSA_IRQ_GPIO_BAT_LOCKED PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT_LOCKED)
164#define TOSA_IRQ_GPIO_BAT1_LOW IRQ_GPIO(TOSA_GPIO_BAT1_LOW) 164#define TOSA_IRQ_GPIO_BAT1_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_LOW)
165#define TOSA_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(69+(a)) 165#define TOSA_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(69+(a))
166 166
167#define TOSA_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW) 167#define TOSA_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_MAIN_BAT_LOW)
168 168
169#define TOSA_KEY_SYNC KEY_102ND /* ??? */ 169#define TOSA_KEY_SYNC KEY_102ND /* ??? */
170 170
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
index 903e1a2e6641..d2ca01053f69 100644
--- a/arch/arm/mach-pxa/include/mach/trizeps4.h
+++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
@@ -43,30 +43,30 @@
43 43
44/* Ethernet Controller Davicom DM9000 */ 44/* Ethernet Controller Davicom DM9000 */
45#define GPIO_DM9000 101 45#define GPIO_DM9000 101
46#define TRIZEPS4_ETH_IRQ IRQ_GPIO(GPIO_DM9000) 46#define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000)
47 47
48/* UCB1400 audio / TS-controller */ 48/* UCB1400 audio / TS-controller */
49#define GPIO_UCB1400 1 49#define GPIO_UCB1400 1
50#define TRIZEPS4_UCB1400_IRQ IRQ_GPIO(GPIO_UCB1400) 50#define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400)
51 51
52/* PCMCIA socket Compact Flash */ 52/* PCMCIA socket Compact Flash */
53#define GPIO_PCD 11 /* PCMCIA Card Detect */ 53#define GPIO_PCD 11 /* PCMCIA Card Detect */
54#define TRIZEPS4_CD_IRQ IRQ_GPIO(GPIO_PCD) 54#define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD)
55#define GPIO_PRDY 13 /* READY / nINT */ 55#define GPIO_PRDY 13 /* READY / nINT */
56#define TRIZEPS4_READY_NINT IRQ_GPIO(GPIO_PRDY) 56#define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY)
57 57
58/* MMC socket */ 58/* MMC socket */
59#define GPIO_MMC_DET 12 59#define GPIO_MMC_DET 12
60#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) 60#define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET)
61 61
62/* DOC NAND chip */ 62/* DOC NAND chip */
63#define GPIO_DOC_LOCK 94 63#define GPIO_DOC_LOCK 94
64#define GPIO_DOC_IRQ 93 64#define GPIO_DOC_IRQ 93
65#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ) 65#define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ)
66 66
67/* SPI interface */ 67/* SPI interface */
68#define GPIO_SPI 53 68#define GPIO_SPI 53
69#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI) 69#define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI)
70 70
71/* LEDS using tx2 / rx2 */ 71/* LEDS using tx2 / rx2 */
72#define GPIO_SYS_BUSY_LED 46 72#define GPIO_SYS_BUSY_LED 46
@@ -74,7 +74,7 @@
74 74
75/* Off-module PIC on ConXS board */ 75/* Off-module PIC on ConXS board */
76#define GPIO_PIC 0 76#define GPIO_PIC 0
77#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) 77#define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC)
78 78
79#ifdef CONFIG_MACH_TRIZEPS_CONXS 79#ifdef CONFIG_MACH_TRIZEPS_CONXS
80/* for CONXS base board define these registers */ 80/* for CONXS base board define these registers */
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 532c5d3a97d2..5dae15ea6718 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -22,7 +22,6 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/irqs.h> 24#include <mach/irqs.h>
25#include <mach/gpio-pxa.h>
26 25
27#include "generic.h" 26#include "generic.h"
28 27
@@ -92,44 +91,6 @@ static struct irq_chip pxa_internal_irq_chip = {
92 .irq_unmask = pxa_unmask_irq, 91 .irq_unmask = pxa_unmask_irq,
93}; 92};
94 93
95/*
96 * GPIO IRQs for GPIO 0 and 1
97 */
98static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
99{
100 int gpio = d->irq - IRQ_GPIO0;
101
102 if (__gpio_is_occupied(gpio)) {
103 pr_err("%s failed: GPIO is configured\n", __func__);
104 return -EINVAL;
105 }
106
107 if (type & IRQ_TYPE_EDGE_RISING)
108 GRER0 |= GPIO_bit(gpio);
109 else
110 GRER0 &= ~GPIO_bit(gpio);
111
112 if (type & IRQ_TYPE_EDGE_FALLING)
113 GFER0 |= GPIO_bit(gpio);
114 else
115 GFER0 &= ~GPIO_bit(gpio);
116
117 return 0;
118}
119
120static void pxa_ack_low_gpio(struct irq_data *d)
121{
122 GEDR0 = (1 << (d->irq - IRQ_GPIO0));
123}
124
125static struct irq_chip pxa_low_gpio_chip = {
126 .name = "GPIO-l",
127 .irq_ack = pxa_ack_low_gpio,
128 .irq_mask = pxa_mask_irq,
129 .irq_unmask = pxa_unmask_irq,
130 .irq_set_type = pxa_set_low_gpio_type,
131};
132
133asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) 94asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs)
134{ 95{
135 uint32_t icip, icmr, mask; 96 uint32_t icip, icmr, mask;
@@ -160,26 +121,7 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
160 } while (1); 121 } while (1);
161} 122}
162 123
163static void __init pxa_init_low_gpio_irq(set_wake_t fn) 124void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int))
164{
165 int irq;
166
167 /* clear edge detection on GPIO 0 and 1 */
168 GFER0 &= ~0x3;
169 GRER0 &= ~0x3;
170 GEDR0 = 0x3;
171
172 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
173 irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
174 handle_edge_irq);
175 irq_set_chip_data(irq, irq_base(0));
176 set_irq_flags(irq, IRQF_VALID);
177 }
178
179 pxa_low_gpio_chip.irq_set_wake = fn;
180}
181
182void __init pxa_init_irq(int irq_nr, set_wake_t fn)
183{ 125{
184 int irq, i, n; 126 int irq, i, n;
185 127
@@ -209,7 +151,6 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
209 __raw_writel(1, irq_base(0) + ICCR); 151 __raw_writel(1, irq_base(0) + ICCR);
210 152
211 pxa_internal_irq_chip.irq_set_wake = fn; 153 pxa_internal_irq_chip.irq_set_wake = fn;
212 pxa_init_low_gpio_irq(fn);
213} 154}
214 155
215#ifdef CONFIG_PM 156#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 7b324ec6449f..d21e28b46d81 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -124,8 +124,8 @@ static struct resource smc91x_resources[] = {
124 .flags = IORESOURCE_MEM, 124 .flags = IORESOURCE_MEM,
125 }, 125 },
126 [1] = { 126 [1] = {
127 .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), 127 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
128 .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), 128 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
129 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 129 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
130 } 130 }
131}; 131};
@@ -396,7 +396,7 @@ static struct i2c_board_info littleton_i2c_info[] = {
396 .type = "da9034", 396 .type = "da9034",
397 .addr = 0x34, 397 .addr = 0x34,
398 .platform_data = &littleton_da9034_info, 398 .platform_data = &littleton_da9034_info,
399 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO18)), 399 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO18)),
400 }, 400 },
401 [1] = { 401 [1] = {
402 .type = "max7320", 402 .type = "max7320",
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 1dd530279e0b..565dd2f2eaa2 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -152,8 +152,8 @@ static void __init lpd270_init_irq(void)
152 handle_level_irq); 152 handle_level_irq);
153 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 153 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
154 } 154 }
155 irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); 155 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler);
156 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 156 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
157} 157}
158 158
159 159
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index c48ce6da9184..2fb2b50831d1 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -170,8 +170,8 @@ static void __init lubbock_init_irq(void)
170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
171 } 171 }
172 172
173 irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); 173 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lubbock_irq_handler);
174 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 174 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
175} 175}
176 176
177#ifdef CONFIG_PM 177#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 4b796c37af3e..e340ea084248 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -184,8 +184,8 @@ static struct resource egpio_resources[] = {
184 .flags = IORESOURCE_MEM, 184 .flags = IORESOURCE_MEM,
185 }, 185 },
186 [1] = { 186 [1] = {
187 .start = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ), 187 .start = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ),
188 .end = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ), 188 .end = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ),
189 .flags = IORESOURCE_IRQ, 189 .flags = IORESOURCE_IRQ,
190 }, 190 },
191}; 191};
@@ -468,8 +468,8 @@ static struct resource pasic3_resources[] = {
468 }, 468 },
469 /* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */ 469 /* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */
470 [1] = { 470 [1] = {
471 .start = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ), 471 .start = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ),
472 .end = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ), 472 .end = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ),
473 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 473 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
474 } 474 }
475}; 475};
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 0567d3965fda..ea62a990ae4b 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -178,8 +178,8 @@ static void __init mainstone_init_irq(void)
178 MST_INTMSKENA = 0; 178 MST_INTMSKENA = 0;
179 MST_INTSETCLR = 0; 179 MST_INTSETCLR = 0;
180 180
181 irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); 181 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler);
182 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 182 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
183} 183}
184 184
185#ifdef CONFIG_PM 185#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 43a5f6861ca3..f14775536b83 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -13,6 +13,7 @@
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 */ 14 */
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/gpio-pxa.h>
16#include <linux/module.h> 17#include <linux/module.h>
17#include <linux/kernel.h> 18#include <linux/kernel.h>
18#include <linux/init.h> 19#include <linux/init.h>
@@ -20,7 +21,6 @@
20 21
21#include <mach/pxa2xx-regs.h> 22#include <mach/pxa2xx-regs.h>
22#include <mach/mfp-pxa2xx.h> 23#include <mach/mfp-pxa2xx.h>
23#include <mach/gpio-pxa.h>
24 24
25#include "generic.h" 25#include "generic.h"
26 26
@@ -29,6 +29,10 @@
29#define GAFR_L(x) __GAFR(0, x) 29#define GAFR_L(x) __GAFR(0, x)
30#define GAFR_U(x) __GAFR(1, x) 30#define GAFR_U(x) __GAFR(1, x)
31 31
32#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
33#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
34#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
35
32#define PWER_WE35 (1 << 24) 36#define PWER_WE35 (1 << 24)
33 37
34struct gpio_desc { 38struct gpio_desc {
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index b938fc2c316a..23f90c74c191 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -541,15 +541,15 @@ static struct pda_power_pdata power_pdata = {
541static struct resource power_resources[] = { 541static struct resource power_resources[] = {
542 [0] = { 542 [0] = {
543 .name = "ac", 543 .name = "ac",
544 .start = gpio_to_irq(GPIO96_AC_DETECT), 544 .start = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
545 .end = gpio_to_irq(GPIO96_AC_DETECT), 545 .end = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
546 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 546 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
547 IORESOURCE_IRQ_LOWEDGE, 547 IORESOURCE_IRQ_LOWEDGE,
548 }, 548 },
549 [1] = { 549 [1] = {
550 .name = "usb", 550 .name = "usb",
551 .start = gpio_to_irq(GPIO13_nUSB_DETECT), 551 .start = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
552 .end = gpio_to_irq(GPIO13_nUSB_DETECT), 552 .end = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
553 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 553 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
554 IORESOURCE_IRQ_LOWEDGE, 554 IORESOURCE_IRQ_LOWEDGE,
555 }, 555 },
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 90928d6e1a5b..83570a79e7d2 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -417,8 +417,8 @@ static struct resource dm9k_resources[] = {
417 .flags = IORESOURCE_MEM 417 .flags = IORESOURCE_MEM
418 }, 418 },
419 [2] = { 419 [2] = {
420 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)), 420 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
421 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)), 421 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
422 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE 422 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
423 } 423 }
424}; 424};
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 6d38c6548b3d..abab4e2b122c 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -378,7 +378,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
378#include <linux/i2c/pca953x.h> 378#include <linux/i2c/pca953x.h>
379 379
380static struct pca953x_platform_data pca9536_data = { 380static struct pca953x_platform_data pca9536_data = {
381 .gpio_base = NR_BUILTIN_GPIO, 381 .gpio_base = PXA_NR_BUILTIN_GPIO,
382}; 382};
383 383
384static int gpio_bus_switch = -EINVAL; 384static int gpio_bus_switch = -EINVAL;
@@ -406,9 +406,9 @@ static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
406 int ret; 406 int ret;
407 407
408 if (gpio_bus_switch < 0) { 408 if (gpio_bus_switch < 0) {
409 ret = gpio_request(NR_BUILTIN_GPIO, "camera"); 409 ret = gpio_request(PXA_NR_BUILTIN_GPIO, "camera");
410 if (!ret) { 410 if (!ret) {
411 gpio_bus_switch = NR_BUILTIN_GPIO; 411 gpio_bus_switch = PXA_NR_BUILTIN_GPIO;
412 gpio_direction_output(gpio_bus_switch, 0); 412 gpio_direction_output(gpio_bus_switch, 0);
413 } 413 }
414 } 414 }
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 50c833177866..8ee4b6cfa385 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -166,8 +166,8 @@ static struct resource locomo_resources[] = {
166 .flags = IORESOURCE_MEM, 166 .flags = IORESOURCE_MEM,
167 }, 167 },
168 [1] = { 168 [1] = {
169 .start = IRQ_GPIO(10), 169 .start = PXA_GPIO_TO_IRQ(10),
170 .end = IRQ_GPIO(10), 170 .end = PXA_GPIO_TO_IRQ(10),
171 .flags = IORESOURCE_IRQ, 171 .flags = IORESOURCE_IRQ,
172 }, 172 },
173}; 173};
@@ -212,7 +212,7 @@ static struct spi_board_info poodle_spi_devices[] = {
212 .bus_num = 1, 212 .bus_num = 1,
213 .platform_data = &poodle_ads7846_info, 213 .platform_data = &poodle_ads7846_info,
214 .controller_data= &poodle_ads7846_chip, 214 .controller_data= &poodle_ads7846_chip,
215 .irq = gpio_to_irq(POODLE_GPIO_TP_INT), 215 .irq = PXA_GPIO_TO_IRQ(POODLE_GPIO_TP_INT),
216 }, 216 },
217}; 217};
218 218
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index f05f9486b0cb..8a775f631c55 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -17,6 +17,7 @@
17 * need be. 17 * need be.
18 */ 18 */
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/gpio-pxa.h>
20#include <linux/module.h> 21#include <linux/module.h>
21#include <linux/kernel.h> 22#include <linux/kernel.h>
22#include <linux/init.h> 23#include <linux/init.h>
@@ -208,6 +209,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
208 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), 209 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
209 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), 210 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
210 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), 211 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
212 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
211}; 213};
212 214
213static struct clk_lookup pxa25x_hwuart_clkreg = 215static struct clk_lookup pxa25x_hwuart_clkreg =
@@ -287,7 +289,7 @@ static inline void pxa25x_init_pm(void) {}
287 289
288static int pxa25x_set_wake(struct irq_data *d, unsigned int on) 290static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
289{ 291{
290 int gpio = irq_to_gpio(d->irq); 292 int gpio = pxa_irq_to_gpio(d->irq);
291 uint32_t mask = 0; 293 uint32_t mask = 0;
292 294
293 if (gpio >= 0 && gpio < 85) 295 if (gpio >= 0 && gpio < 85)
@@ -312,14 +314,12 @@ set_pwer:
312void __init pxa25x_init_irq(void) 314void __init pxa25x_init_irq(void)
313{ 315{
314 pxa_init_irq(32, pxa25x_set_wake); 316 pxa_init_irq(32, pxa25x_set_wake);
315 pxa_init_gpio(IRQ_GPIO_2_x, 2, 84, pxa25x_set_wake);
316} 317}
317 318
318#ifdef CONFIG_CPU_PXA26x 319#ifdef CONFIG_CPU_PXA26x
319void __init pxa26x_init_irq(void) 320void __init pxa26x_init_irq(void)
320{ 321{
321 pxa_init_irq(32, pxa25x_set_wake); 322 pxa_init_irq(32, pxa25x_set_wake);
322 pxa_init_gpio(IRQ_GPIO_2_x, 2, 89, pxa25x_set_wake);
323} 323}
324#endif 324#endif
325 325
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index bc5a98ebaa72..6c49e66057e3 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -12,6 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/gpio.h> 14#include <linux/gpio.h>
15#include <linux/gpio-pxa.h>
15#include <linux/module.h> 16#include <linux/module.h>
16#include <linux/kernel.h> 17#include <linux/kernel.h>
17#include <linux/init.h> 18#include <linux/init.h>
@@ -229,6 +230,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
229 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), 230 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
230 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), 231 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
231 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), 232 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
233 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
232}; 234};
233 235
234#ifdef CONFIG_PM 236#ifdef CONFIG_PM
@@ -355,7 +357,7 @@ static inline void pxa27x_init_pm(void) {}
355 */ 357 */
356static int pxa27x_set_wake(struct irq_data *d, unsigned int on) 358static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
357{ 359{
358 int gpio = irq_to_gpio(d->irq); 360 int gpio = pxa_irq_to_gpio(d->irq);
359 uint32_t mask; 361 uint32_t mask;
360 362
361 if (gpio >= 0 && gpio < 128) 363 if (gpio >= 0 && gpio < 128)
@@ -386,7 +388,6 @@ static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
386void __init pxa27x_init_irq(void) 388void __init pxa27x_init_irq(void)
387{ 389{
388 pxa_init_irq(34, pxa27x_set_wake); 390 pxa_init_irq(34, pxa27x_set_wake);
389 pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake);
390} 391}
391 392
392static struct map_desc pxa27x_io_desc[] __initdata = { 393static struct map_desc pxa27x_io_desc[] __initdata = {
@@ -422,6 +423,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
422} 423}
423 424
424static struct platform_device *devices[] __initdata = { 425static struct platform_device *devices[] __initdata = {
426 &pxa_device_gpio,
425 &pxa27x_device_udc, 427 &pxa27x_device_udc,
426 &pxa_device_pmu, 428 &pxa_device_pmu,
427 &pxa_device_i2s, 429 &pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 0737c59b88ae..4f402afa6609 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -25,7 +25,6 @@
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/suspend.h> 26#include <asm/suspend.h>
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/gpio-pxa.h>
29#include <mach/pxa3xx-regs.h> 28#include <mach/pxa3xx-regs.h>
30#include <mach/reset.h> 29#include <mach/reset.h>
31#include <mach/ohci.h> 30#include <mach/ohci.h>
@@ -56,6 +55,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
56static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0); 55static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
57static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0); 56static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
58static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); 57static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
58static DEFINE_PXA3_CKEN(pxa3xx_gpio, GPIO, 13000000, 0);
59 59
60static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops); 60static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
61static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops); 61static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);
@@ -88,6 +88,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
88 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL), 88 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
89 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL), 89 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
90 INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL), 90 INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
91 INIT_CLKREG(&clk_pxa3xx_gpio, "pxa-gpio", NULL),
91}; 92};
92 93
93#ifdef CONFIG_PM 94#ifdef CONFIG_PM
@@ -365,7 +366,8 @@ static struct irq_chip pxa_ext_wakeup_chip = {
365 .irq_set_type = pxa_set_ext_wakeup_type, 366 .irq_set_type = pxa_set_ext_wakeup_type,
366}; 367};
367 368
368static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) 369static void __init pxa_init_ext_wakeup_irq(int (*fn)(struct irq_data *,
370 unsigned int))
369{ 371{
370 int irq; 372 int irq;
371 373
@@ -388,7 +390,6 @@ void __init pxa3xx_init_irq(void)
388 390
389 pxa_init_irq(56, pxa3xx_set_wake); 391 pxa_init_irq(56, pxa3xx_set_wake);
390 pxa_init_ext_wakeup_irq(pxa3xx_set_wake); 392 pxa_init_ext_wakeup_irq(pxa3xx_set_wake);
391 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
392} 393}
393 394
394static struct map_desc pxa3xx_io_desc[] __initdata = { 395static struct map_desc pxa3xx_io_desc[] __initdata = {
@@ -417,6 +418,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
417} 418}
418 419
419static struct platform_device *devices[] __initdata = { 420static struct platform_device *devices[] __initdata = {
421 &pxa_device_gpio,
420 &pxa27x_device_udc, 422 &pxa27x_device_udc,
421 &pxa_device_pmu, 423 &pxa_device_pmu,
422 &pxa_device_i2s, 424 &pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 51371b39d2a3..d082a583df78 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -20,7 +20,6 @@
20#include <linux/syscore_ops.h> 20#include <linux/syscore_ops.h>
21 21
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <mach/gpio-pxa.h>
24#include <mach/pxa3xx-regs.h> 23#include <mach/pxa3xx-regs.h>
25#include <mach/pxa930.h> 24#include <mach/pxa930.h>
26#include <mach/reset.h> 25#include <mach/reset.h>
@@ -212,6 +211,7 @@ static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
212static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0); 211static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
213static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0); 212static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
214static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0); 213static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
214static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0);
215 215
216static struct clk_lookup pxa95x_clkregs[] = { 216static struct clk_lookup pxa95x_clkregs[] = {
217 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"), 217 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
@@ -230,12 +230,12 @@ static struct clk_lookup pxa95x_clkregs[] = {
230 INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL), 230 INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
231 INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL), 231 INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
232 INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL), 232 INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
233 INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL),
233}; 234};
234 235
235void __init pxa95x_init_irq(void) 236void __init pxa95x_init_irq(void)
236{ 237{
237 pxa_init_irq(96, NULL); 238 pxa_init_irq(96, NULL);
238 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
239} 239}
240 240
241/* 241/*
@@ -248,6 +248,7 @@ void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
248} 248}
249 249
250static struct platform_device *devices[] __initdata = { 250static struct platform_device *devices[] __initdata = {
251 &pxa_device_gpio,
251 &sa1100_device_rtc, 252 &sa1100_device_rtc,
252 &pxa_device_rtc, 253 &pxa_device_rtc,
253 &pxa27x_device_ssp1, 254 &pxa27x_device_ssp1,
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index f0c05f4d12ed..78d643783f99 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -292,8 +292,8 @@ static struct resource smc91x_resources[] = {
292 .flags = IORESOURCE_MEM, 292 .flags = IORESOURCE_MEM,
293 }, 293 },
294 { 294 {
295 .start = gpio_to_irq(GPIO_ETH_IRQ), 295 .start = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ),
296 .end = gpio_to_irq(GPIO_ETH_IRQ), 296 .end = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ),
297 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, 297 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
298 } 298 }
299}; 299};
@@ -672,7 +672,7 @@ static struct lis3lv02d_platform_data lis3_pdata = {
672 .chip_select = 1, \ 672 .chip_select = 1, \
673 .controller_data = (void *) GPIO_ACCEL_CS, \ 673 .controller_data = (void *) GPIO_ACCEL_CS, \
674 .platform_data = &lis3_pdata, \ 674 .platform_data = &lis3_pdata, \
675 .irq = gpio_to_irq(GPIO_ACCEL_IRQ), \ 675 .irq = PXA_GPIO_TO_IRQ(GPIO_ACCEL_IRQ), \
676} 676}
677 677
678#define SPI_DAC7512 \ 678#define SPI_DAC7512 \
@@ -956,7 +956,7 @@ static struct eeti_ts_platform_data eeti_ts_pdata = {
956static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = { 956static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
957 .type = "eeti_ts", 957 .type = "eeti_ts",
958 .addr = 0x0a, 958 .addr = 0x0a,
959 .irq = gpio_to_irq(GPIO_TOUCH_IRQ), 959 .irq = PXA_GPIO_TO_IRQ(GPIO_TOUCH_IRQ),
960 .platform_data = &eeti_ts_pdata, 960 .platform_data = &eeti_ts_pdata,
961}; 961};
962 962
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index fc2c1e05af9c..423ec899a8a8 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -96,8 +96,8 @@ static struct resource smc91x_resources[] = {
96 .flags = IORESOURCE_MEM, 96 .flags = IORESOURCE_MEM,
97 }, 97 },
98 [1] = { 98 [1] = {
99 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)), 99 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
100 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)), 100 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
101 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 101 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
102 } 102 }
103}; 103};
@@ -502,7 +502,7 @@ static struct i2c_board_info saar_i2c_info[] = {
502 .type = "da9034", 502 .type = "da9034",
503 .addr = 0x34, 503 .addr = 0x34,
504 .platform_data = &saar_da9034_info, 504 .platform_data = &saar_da9034_info,
505 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), 505 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
506 }, 506 },
507}; 507};
508 508
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index 3e999e308a2d..d1cdd6a081ed 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -92,7 +92,7 @@ static struct i2c_board_info saarb_i2c_info[] = {
92 .type = "88PM860x", 92 .type = "88PM860x",
93 .addr = 0x34, 93 .addr = 0x34,
94 .platform_data = &saarb_pm8607_info, 94 .platform_data = &saarb_pm8607_info,
95 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), 95 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
96 }, 96 },
97}; 97};
98 98
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 785880f67b60..8d5168d253a9 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -907,24 +907,24 @@ static int __devinit sharpsl_pm_probe(struct platform_device *pdev)
907 gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock); 907 gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock);
908 908
909 /* Register interrupt handlers */ 909 /* Register interrupt handlers */
910 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) { 910 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
911 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin)); 911 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin));
912 } 912 }
913 913
914 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) { 914 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
915 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock)); 915 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock));
916 } 916 }
917 917
918 if (sharpsl_pm.machinfo->gpio_fatal) { 918 if (sharpsl_pm.machinfo->gpio_fatal) {
919 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) { 919 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
920 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal)); 920 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal));
921 } 921 }
922 } 922 }
923 923
924 if (sharpsl_pm.machinfo->batfull_irq) { 924 if (sharpsl_pm.machinfo->batfull_irq) {
925 /* Register interrupt handler. */ 925 /* Register interrupt handler. */
926 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) { 926 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
927 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull)); 927 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull));
928 } 928 }
929 } 929 }
930 930
@@ -953,14 +953,14 @@ static int sharpsl_pm_remove(struct platform_device *pdev)
953 953
954 led_trigger_unregister_simple(sharpsl_charge_led_trigger); 954 led_trigger_unregister_simple(sharpsl_charge_led_trigger);
955 955
956 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr); 956 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
957 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr); 957 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
958 958
959 if (sharpsl_pm.machinfo->gpio_fatal) 959 if (sharpsl_pm.machinfo->gpio_fatal)
960 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr); 960 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
961 961
962 if (sharpsl_pm.machinfo->batfull_irq) 962 if (sharpsl_pm.machinfo->batfull_irq)
963 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); 963 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
964 964
965 gpio_free(sharpsl_pm.machinfo->gpio_batlock); 965 gpio_free(sharpsl_pm.machinfo->gpio_batlock);
966 gpio_free(sharpsl_pm.machinfo->gpio_batfull); 966 gpio_free(sharpsl_pm.machinfo->gpio_batfull);
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 953a9195f9e5..1b39cec03cce 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -552,7 +552,7 @@ static struct spi_board_info spitz_spi_devices[] = {
552 .chip_select = 0, 552 .chip_select = 0,
553 .platform_data = &spitz_ads7846_info, 553 .platform_data = &spitz_ads7846_info,
554 .controller_data = &spitz_ads7846_chip, 554 .controller_data = &spitz_ads7846_chip,
555 .irq = gpio_to_irq(SPITZ_GPIO_TP_INT), 555 .irq = PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT),
556 }, { 556 }, {
557 .modalias = "corgi-lcd", 557 .modalias = "corgi-lcd",
558 .max_speed_hz = 50000, 558 .max_speed_hz = 50000,
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 094279aefe9c..5cc05d122d0c 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -41,6 +41,7 @@ static int spitz_last_ac_status;
41static struct gpio spitz_charger_gpios[] = { 41static struct gpio spitz_charger_gpios[] = {
42 { SPITZ_GPIO_KEY_INT, GPIOF_IN, "Keyboard Interrupt" }, 42 { SPITZ_GPIO_KEY_INT, GPIOF_IN, "Keyboard Interrupt" },
43 { SPITZ_GPIO_SYNC, GPIOF_IN, "Sync" }, 43 { SPITZ_GPIO_SYNC, GPIOF_IN, "Sync" },
44 { SPITZ_GPIO_AC_IN, GPIOF_IN, "Charger Detection" },
44 { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, 45 { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
45 { SPITZ_GPIO_JK_B, GPIOF_OUT_INIT_LOW, "JK B" }, 46 { SPITZ_GPIO_JK_B, GPIOF_OUT_INIT_LOW, "JK B" },
46 { SPITZ_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, 47 { SPITZ_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
@@ -169,14 +170,19 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
169 170
170static unsigned long spitz_charger_wakeup(void) 171static unsigned long spitz_charger_wakeup(void)
171{ 172{
172 return (~GPLR0 & GPIO_bit(SPITZ_GPIO_KEY_INT)) | (GPLR0 & GPIO_bit(SPITZ_GPIO_SYNC)); 173 unsigned long ret;
174 ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT)
175 << GPIO_bit(SPITZ_GPIO_KEY_INT))
176 | (!gpio_get_value(SPITZ_GPIO_SYNC)
177 << GPIO_bit(SPITZ_GPIO_SYNC));
178 return ret;
173} 179}
174 180
175unsigned long spitzpm_read_devdata(int type) 181unsigned long spitzpm_read_devdata(int type)
176{ 182{
177 switch (type) { 183 switch (type) {
178 case SHARPSL_STATUS_ACIN: 184 case SHARPSL_STATUS_ACIN:
179 return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0); 185 return !gpio_get_value(SPITZ_GPIO_AC_IN);
180 case SHARPSL_STATUS_LOCK: 186 case SHARPSL_STATUS_LOCK:
181 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); 187 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
182 case SHARPSL_STATUS_CHRGFULL: 188 case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 4c9a48bef569..940ca56b37f9 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -376,7 +376,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
376 .bus_num = 1, 376 .bus_num = 1,
377 .chip_select = 0, 377 .chip_select = 0,
378 .controller_data = &staccel_chip_info, 378 .controller_data = &staccel_chip_info,
379 .irq = IRQ_GPIO(96), 379 .irq = PXA_GPIO_TO_IRQ(96),
380 }, { 380 }, {
381 .modalias = "cc2420", 381 .modalias = "cc2420",
382 .max_speed_hz = 6500000, 382 .max_speed_hz = 6500000,
@@ -546,7 +546,7 @@ static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = {
546 .type = "da9030", 546 .type = "da9030",
547 .addr = 0x49, 547 .addr = 0x49,
548 .platform_data = &imote2_da9030_pdata, 548 .platform_data = &imote2_da9030_pdata,
549 .irq = gpio_to_irq(1), 549 .irq = PXA_GPIO_TO_IRQ(1),
550 }, 550 },
551}; 551};
552 552
@@ -560,18 +560,18 @@ static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
560 /* Through a nand gate - Also beware, on V2 sensor board the 560 /* Through a nand gate - Also beware, on V2 sensor board the
561 * pull up resistors are missing. 561 * pull up resistors are missing.
562 */ 562 */
563 .irq = IRQ_GPIO(99), 563 .irq = PXA_GPIO_TO_IRQ(99),
564 }, { /* ITS400 Sensor board only */ 564 }, { /* ITS400 Sensor board only */
565 .type = "tsl2561", 565 .type = "tsl2561",
566 .addr = 0x49, 566 .addr = 0x49,
567 /* Through a nand gate - Also beware, on V2 sensor board the 567 /* Through a nand gate - Also beware, on V2 sensor board the
568 * pull up resistors are missing. 568 * pull up resistors are missing.
569 */ 569 */
570 .irq = IRQ_GPIO(99), 570 .irq = PXA_GPIO_TO_IRQ(99),
571 }, { /* ITS400 Sensor board only */ 571 }, { /* ITS400 Sensor board only */
572 .type = "tmp175", 572 .type = "tmp175",
573 .addr = 0x4A, 573 .addr = 0x4A,
574 .irq = IRQ_GPIO(96), 574 .irq = PXA_GPIO_TO_IRQ(96),
575 }, { /* IMB400 Multimedia board */ 575 }, { /* IMB400 Multimedia board */
576 .type = "wm8940", 576 .type = "wm8940",
577 .addr = 0x1A, 577 .addr = 0x1A,
@@ -661,8 +661,8 @@ static struct resource smc91x_resources[] = {
661 .flags = IORESOURCE_MEM, 661 .flags = IORESOURCE_MEM,
662 }, 662 },
663 [1] = { 663 [1] = {
664 .start = IRQ_GPIO(40), 664 .start = PXA_GPIO_TO_IRQ(40),
665 .end = IRQ_GPIO(40), 665 .end = PXA_GPIO_TO_IRQ(40),
666 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 666 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
667 } 667 }
668}; 668};
@@ -707,7 +707,7 @@ static int stargate2_mci_init(struct device *dev,
707 } 707 }
708 gpio_direction_input(SG2_GPIO_nSD_DETECT); 708 gpio_direction_input(SG2_GPIO_nSD_DETECT);
709 709
710 err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), 710 err = request_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT),
711 stargate2_detect_int, 711 stargate2_detect_int,
712 IRQ_TYPE_EDGE_BOTH, 712 IRQ_TYPE_EDGE_BOTH,
713 "MMC card detect", 713 "MMC card detect",
@@ -738,7 +738,7 @@ static void stargate2_mci_setpower(struct device *dev, unsigned int vdd)
738 738
739static void stargate2_mci_exit(struct device *dev, void *data) 739static void stargate2_mci_exit(struct device *dev, void *data)
740{ 740{
741 free_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), data); 741 free_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT), data);
742 gpio_free(SG2_SD_POWER_ENABLE); 742 gpio_free(SG2_SD_POWER_ENABLE);
743 gpio_free(SG2_GPIO_nSD_DETECT); 743 gpio_free(SG2_GPIO_nSD_DETECT);
744} 744}
@@ -913,7 +913,7 @@ static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = {
913 .type = "da9030", 913 .type = "da9030",
914 .addr = 0x49, 914 .addr = 0x49,
915 .platform_data = &stargate2_da9030_pdata, 915 .platform_data = &stargate2_da9030_pdata,
916 .irq = gpio_to_irq(1), 916 .irq = PXA_GPIO_TO_IRQ(1),
917 }, 917 },
918}; 918};
919 919
@@ -938,18 +938,18 @@ static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {
938 /* Through a nand gate - Also beware, on V2 sensor board the 938 /* Through a nand gate - Also beware, on V2 sensor board the
939 * pull up resistors are missing. 939 * pull up resistors are missing.
940 */ 940 */
941 .irq = IRQ_GPIO(99), 941 .irq = PXA_GPIO_TO_IRQ(99),
942 }, { /* ITS400 Sensor board only */ 942 }, { /* ITS400 Sensor board only */
943 .type = "tsl2561", 943 .type = "tsl2561",
944 .addr = 0x49, 944 .addr = 0x49,
945 /* Through a nand gate - Also beware, on V2 sensor board the 945 /* Through a nand gate - Also beware, on V2 sensor board the
946 * pull up resistors are missing. 946 * pull up resistors are missing.
947 */ 947 */
948 .irq = IRQ_GPIO(99), 948 .irq = PXA_GPIO_TO_IRQ(99),
949 }, { /* ITS400 Sensor board only */ 949 }, { /* ITS400 Sensor board only */
950 .type = "tmp175", 950 .type = "tmp175",
951 .addr = 0x4A, 951 .addr = 0x4A,
952 .irq = IRQ_GPIO(96), 952 .irq = PXA_GPIO_TO_IRQ(96),
953 }, 953 },
954}; 954};
955 955
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index ad47bb98f30d..43bdcb9761f2 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -85,8 +85,8 @@ static struct resource smc91x_resources[] = {
85 .flags = IORESOURCE_MEM, 85 .flags = IORESOURCE_MEM,
86 }, 86 },
87 [1] = { 87 [1] = {
88 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)), 88 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)),
89 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)), 89 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)),
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
91 } 91 }
92}; 92};
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index fd569167302a..46c60b3cbe79 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -101,7 +101,7 @@ static struct i2c_board_info evb3_i2c_info[] = {
101 .type = "88PM860x", 101 .type = "88PM860x",
102 .addr = 0x34, 102 .addr = 0x34,
103 .platform_data = &evb3_pm8607_info, 103 .platform_data = &evb3_pm8607_info,
104 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), 104 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
105 }, 105 },
106}; 106};
107 107
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 402b0c96613b..1ddb9826448a 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -404,8 +404,8 @@ static struct pda_power_pdata tosa_power_data = {
404static struct resource tosa_power_resource[] = { 404static struct resource tosa_power_resource[] = {
405 { 405 {
406 .name = "ac", 406 .name = "ac",
407 .start = gpio_to_irq(TOSA_GPIO_AC_IN), 407 .start = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN),
408 .end = gpio_to_irq(TOSA_GPIO_AC_IN), 408 .end = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN),
409 .flags = IORESOURCE_IRQ | 409 .flags = IORESOURCE_IRQ |
410 IORESOURCE_IRQ_HIGHEDGE | 410 IORESOURCE_IRQ_HIGHEDGE |
411 IORESOURCE_IRQ_LOWEDGE, 411 IORESOURCE_IRQ_LOWEDGE,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 242ddae332d3..d9a653a77176 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -422,8 +422,8 @@ static struct resource smc91x_resources[] = {
422 .flags = IORESOURCE_MEM, 422 .flags = IORESOURCE_MEM,
423 }, 423 },
424 [1] = { 424 [1] = {
425 .start = gpio_to_irq(VIPER_ETH_GPIO), 425 .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
426 .end = gpio_to_irq(VIPER_ETH_GPIO), 426 .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
427 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 427 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
428 }, 428 },
429 [2] = { 429 [2] = {
@@ -546,7 +546,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
546 /* External UARTs */ 546 /* External UARTs */
547 { 547 {
548 .mapbase = VIPER_UARTA_PHYS, 548 .mapbase = VIPER_UARTA_PHYS,
549 .irq = gpio_to_irq(VIPER_UARTA_GPIO), 549 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
550 .irqflags = IRQF_TRIGGER_RISING, 550 .irqflags = IRQF_TRIGGER_RISING,
551 .uartclk = 1843200, 551 .uartclk = 1843200,
552 .regshift = 1, 552 .regshift = 1,
@@ -556,7 +556,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
556 }, 556 },
557 { 557 {
558 .mapbase = VIPER_UARTB_PHYS, 558 .mapbase = VIPER_UARTB_PHYS,
559 .irq = gpio_to_irq(VIPER_UARTB_GPIO), 559 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
560 .irqflags = IRQF_TRIGGER_RISING, 560 .irqflags = IRQF_TRIGGER_RISING,
561 .uartclk = 1843200, 561 .uartclk = 1843200,
562 .regshift = 1, 562 .regshift = 1,
@@ -596,8 +596,8 @@ static struct resource isp116x_resources[] = {
596 .flags = IORESOURCE_MEM, 596 .flags = IORESOURCE_MEM,
597 }, 597 },
598 [2] = { 598 [2] = {
599 .start = gpio_to_irq(VIPER_USB_GPIO), 599 .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
600 .end = gpio_to_irq(VIPER_USB_GPIO), 600 .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
601 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 601 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
602 }, 602 },
603}; 603};
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index a7539a6ed1ff..bf2403c424bf 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -395,8 +395,8 @@ static struct resource vpac270_dm9000_resources[] = {
395 .flags = IORESOURCE_MEM, 395 .flags = IORESOURCE_MEM,
396 }, 396 },
397 [2] = { 397 [2] = {
398 .start = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ), 398 .start = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
399 .end = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ), 399 .end = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
400 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 400 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
401 }, 401 },
402}; 402};
@@ -433,7 +433,7 @@ static pxa2xx_audio_ops_t vpac270_ac97_pdata = {
433}; 433};
434 434
435static struct ucb1400_pdata vpac270_ucb1400_pdata = { 435static struct ucb1400_pdata vpac270_ucb1400_pdata = {
436 .irq = IRQ_GPIO(GPIO113_VPAC270_TS_IRQ), 436 .irq = PXA_GPIO_TO_IRQ(GPIO113_VPAC270_TS_IRQ),
437}; 437};
438 438
439static struct platform_device vpac270_ucb1400_device = { 439static struct platform_device vpac270_ucb1400_device = {
@@ -610,8 +610,8 @@ static struct resource vpac270_ide_resources[] = {
610 .flags = IORESOURCE_DMA 610 .flags = IORESOURCE_DMA
611 }, 611 },
612 [3] = { /* IDE IRQ pin */ 612 [3] = { /* IDE IRQ pin */
613 .start = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), 613 .start = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
614 .end = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), 614 .end = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
615 .flags = IORESOURCE_IRQ 615 .flags = IORESOURCE_IRQ
616 } 616 }
617}; 617};
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index ead32c90fec1..424661833ce2 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -573,7 +573,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
573 .modalias = "libertas_spi", 573 .modalias = "libertas_spi",
574 .platform_data = &z2_lbs_pdata, 574 .platform_data = &z2_lbs_pdata,
575 .controller_data = &z2_lbs_chip_info, 575 .controller_data = &z2_lbs_chip_info,
576 .irq = gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ), 576 .irq = PXA_GPIO_TO_IRQ(GPIO36_ZIPITZ2_WIFI_IRQ),
577 .max_speed_hz = 13000000, 577 .max_speed_hz = 13000000,
578 .bus_num = 1, 578 .bus_num = 1,
579 .chip_select = 0, 579 .chip_select = 0,
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 498b83b089f3..68de9c17e4c5 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -233,7 +233,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
233 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */ 233 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
234 { /* COM1 */ 234 { /* COM1 */
235 .mapbase = 0x10000000, 235 .mapbase = 0x10000000,
236 .irq = gpio_to_irq(ZEUS_UARTA_GPIO), 236 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO),
237 .irqflags = IRQF_TRIGGER_RISING, 237 .irqflags = IRQF_TRIGGER_RISING,
238 .uartclk = 14745600, 238 .uartclk = 14745600,
239 .regshift = 1, 239 .regshift = 1,
@@ -242,7 +242,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
242 }, 242 },
243 { /* COM2 */ 243 { /* COM2 */
244 .mapbase = 0x10800000, 244 .mapbase = 0x10800000,
245 .irq = gpio_to_irq(ZEUS_UARTB_GPIO), 245 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO),
246 .irqflags = IRQF_TRIGGER_RISING, 246 .irqflags = IRQF_TRIGGER_RISING,
247 .uartclk = 14745600, 247 .uartclk = 14745600,
248 .regshift = 1, 248 .regshift = 1,
@@ -251,7 +251,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
251 }, 251 },
252 { /* COM3 */ 252 { /* COM3 */
253 .mapbase = 0x11000000, 253 .mapbase = 0x11000000,
254 .irq = gpio_to_irq(ZEUS_UARTC_GPIO), 254 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO),
255 .irqflags = IRQF_TRIGGER_RISING, 255 .irqflags = IRQF_TRIGGER_RISING,
256 .uartclk = 14745600, 256 .uartclk = 14745600,
257 .regshift = 1, 257 .regshift = 1,
@@ -260,7 +260,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
260 }, 260 },
261 { /* COM4 */ 261 { /* COM4 */
262 .mapbase = 0x11800000, 262 .mapbase = 0x11800000,
263 .irq = gpio_to_irq(ZEUS_UARTD_GPIO), 263 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO),
264 .irqflags = IRQF_TRIGGER_RISING, 264 .irqflags = IRQF_TRIGGER_RISING,
265 .uartclk = 14745600, 265 .uartclk = 14745600,
266 .regshift = 1, 266 .regshift = 1,
@@ -321,8 +321,8 @@ static struct resource zeus_dm9k0_resource[] = {
321 .flags = IORESOURCE_MEM 321 .flags = IORESOURCE_MEM
322 }, 322 },
323 [2] = { 323 [2] = {
324 .start = gpio_to_irq(ZEUS_ETH0_GPIO), 324 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
325 .end = gpio_to_irq(ZEUS_ETH0_GPIO), 325 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
326 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 326 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
327 }, 327 },
328}; 328};
@@ -339,8 +339,8 @@ static struct resource zeus_dm9k1_resource[] = {
339 .flags = IORESOURCE_MEM, 339 .flags = IORESOURCE_MEM,
340 }, 340 },
341 [2] = { 341 [2] = {
342 .start = gpio_to_irq(ZEUS_ETH1_GPIO), 342 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
343 .end = gpio_to_irq(ZEUS_ETH1_GPIO), 343 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
344 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 344 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
345 }, 345 },
346}; 346};
@@ -423,7 +423,7 @@ static struct spi_board_info zeus_spi_board_info[] = {
423 [0] = { 423 [0] = {
424 .modalias = "mcp2515", 424 .modalias = "mcp2515",
425 .platform_data = &zeus_mcp2515_pdata, 425 .platform_data = &zeus_mcp2515_pdata,
426 .irq = gpio_to_irq(ZEUS_CAN_GPIO), 426 .irq = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO),
427 .max_speed_hz = 1*1000*1000, 427 .max_speed_hz = 1*1000*1000,
428 .bus_num = 3, 428 .bus_num = 3,
429 .mode = SPI_MODE_0, 429 .mode = SPI_MODE_0,
@@ -753,7 +753,7 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = {
753 { 753 {
754 I2C_BOARD_INFO("pca9535", 0x20), 754 I2C_BOARD_INFO("pca9535", 0x20),
755 .platform_data = &zeus_pca953x_pdata[2], 755 .platform_data = &zeus_pca953x_pdata[2],
756 .irq = gpio_to_irq(ZEUS_EXTGPIO_GPIO), 756 .irq = PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO),
757 }, 757 },
758 { I2C_BOARD_INFO("lm75a", 0x48) }, 758 { I2C_BOARD_INFO("lm75a", 0x48) },
759 { I2C_BOARD_INFO("24c01", 0x50) }, 759 { I2C_BOARD_INFO("24c01", 0x50) },
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 6c39c3328418..a4c807527095 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -408,8 +408,8 @@ static void __init zylonite_init(void)
408 * Note: We depend that the bootloader set 408 * Note: We depend that the bootloader set
409 * the correct value to MSC register for SMC91x. 409 * the correct value to MSC register for SMC91x.
410 */ 410 */
411 smc91x_resources[1].start = gpio_to_irq(gpio_eth_irq); 411 smc91x_resources[1].start = PXA_GPIO_TO_IRQ(gpio_eth_irq);
412 smc91x_resources[1].end = gpio_to_irq(gpio_eth_irq); 412 smc91x_resources[1].end = PXA_GPIO_TO_IRQ(gpio_eth_irq);
413 platform_device_register(&smc91x_device); 413 platform_device_register(&smc91x_device);
414 414
415 pxa_set_ac97_info(NULL); 415 pxa_set_ac97_info(NULL);
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 93c64d8d7de9..86e59c043de2 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -231,12 +231,12 @@ static struct i2c_board_info zylonite_i2c_board_info[] = {
231 .type = "pca9539", 231 .type = "pca9539",
232 .addr = 0x74, 232 .addr = 0x74,
233 .platform_data = &gpio_exp[0], 233 .platform_data = &gpio_exp[0],
234 .irq = IRQ_GPIO(18), 234 .irq = PXA_GPIO_TO_IRQ(18),
235 }, { 235 }, {
236 .type = "pca9539", 236 .type = "pca9539",
237 .addr = 0x75, 237 .addr = 0x75,
238 .platform_data = &gpio_exp[1], 238 .platform_data = &gpio_exp[1],
239 .irq = IRQ_GPIO(19), 239 .irq = PXA_GPIO_TO_IRQ(19),
240 }, 240 },
241}; 241};
242 242
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
deleted file mode 100644
index b6390beff323..000000000000
--- a/arch/arm/plat-pxa/include/plat/gpio-pxa.h
+++ /dev/null
@@ -1,44 +0,0 @@
1#ifndef __PLAT_PXA_GPIO_H
2#define __PLAT_PXA_GPIO_H
3
4struct irq_data;
5
6/*
7 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
8 * one set of registers. The register offsets are organized below:
9 *
10 * GPLR GPDR GPSR GPCR GRER GFER GEDR
11 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
12 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
13 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
14 *
15 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
16 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
17 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
18 *
19 * NOTE:
20 * BANK 3 is only available on PXA27x and later processors.
21 * BANK 4 and 5 are only available on PXA935
22 */
23
24#define GPIO_BANK(n) (GPIO_REGS_VIRT + BANK_OFF(n))
25
26#define GPLR_OFFSET 0x00
27#define GPDR_OFFSET 0x0C
28#define GPSR_OFFSET 0x18
29#define GPCR_OFFSET 0x24
30#define GRER_OFFSET 0x30
31#define GFER_OFFSET 0x3C
32#define GEDR_OFFSET 0x48
33
34/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
35 * Those cases currently cause holes in the GPIO number space, the
36 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
37 */
38extern int pxa_last_gpio;
39
40typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
41
42extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
43
44#endif /* __PLAT_PXA_GPIO_H */
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
deleted file mode 100644
index 258f77210b02..000000000000
--- a/arch/arm/plat-pxa/include/plat/gpio.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef __PLAT_GPIO_H
2#define __PLAT_GPIO_H
3
4#define __ARM_GPIOLIB_COMPLEX
5
6/* The individual machine provides register offsets and NR_BUILTIN_GPIO */
7#include <mach/gpio-pxa.h>
8
9static inline int gpio_get_value(unsigned gpio)
10{
11 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO))
12 return GPLR(gpio) & GPIO_bit(gpio);
13 else
14 return __gpio_get_value(gpio);
15}
16
17static inline void gpio_set_value(unsigned gpio, int value)
18{
19 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) {
20 if (value)
21 GPSR(gpio) = GPIO_bit(gpio);
22 else
23 GPCR(gpio) = GPIO_bit(gpio);
24 } else
25 __gpio_set_value(gpio, value);
26}
27
28#define gpio_cansleep __gpio_cansleep
29
30#endif /* __PLAT_GPIO_H */
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 8482a23887dc..aa0b94ff36d0 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -141,6 +141,12 @@ config GPIO_PL061
141 help 141 help
142 Say yes here to support the PrimeCell PL061 GPIO device 142 Say yes here to support the PrimeCell PL061 GPIO device
143 143
144config GPIO_PXA
145 bool "PXA GPIO support"
146 depends on ARCH_PXA || ARCH_MMP
147 help
148 Say yes here to support the PXA GPIO device
149
144config GPIO_XILINX 150config GPIO_XILINX
145 bool "Xilinx GPIO support" 151 bool "Xilinx GPIO support"
146 depends on PPC_OF || MICROBLAZE 152 depends on PPC_OF || MICROBLAZE
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index dbcb0bcfd8da..5b2b9e26f49c 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -40,7 +40,7 @@ obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o
40obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o 40obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o
41obj-$(CONFIG_GPIO_PCH) += gpio-pch.o 41obj-$(CONFIG_GPIO_PCH) += gpio-pch.o
42obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o 42obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o
43obj-$(CONFIG_PLAT_PXA) += gpio-pxa.o 43obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
44obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o 44obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o
45obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o 45obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o
46obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o 46obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index ee137712f9db..b2d3ee1d183a 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -11,14 +11,46 @@
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/clk.h>
15#include <linux/err.h>
14#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/gpio-pxa.h>
15#include <linux/init.h> 18#include <linux/init.h>
16#include <linux/irq.h> 19#include <linux/irq.h>
17#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/platform_device.h>
18#include <linux/syscore_ops.h> 22#include <linux/syscore_ops.h>
19#include <linux/slab.h> 23#include <linux/slab.h>
20 24
21#include <mach/gpio-pxa.h> 25/*
26 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
27 * one set of registers. The register offsets are organized below:
28 *
29 * GPLR GPDR GPSR GPCR GRER GFER GEDR
30 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
31 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
32 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
33 *
34 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
35 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
36 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
37 *
38 * NOTE:
39 * BANK 3 is only available on PXA27x and later processors.
40 * BANK 4 and 5 are only available on PXA935
41 */
42
43#define GPLR_OFFSET 0x00
44#define GPDR_OFFSET 0x0C
45#define GPSR_OFFSET 0x18
46#define GPCR_OFFSET 0x24
47#define GRER_OFFSET 0x30
48#define GFER_OFFSET 0x3C
49#define GEDR_OFFSET 0x48
50#define GAFR_OFFSET 0x54
51#define ED_MASK_OFFSET 0x9C /* GPIO edge detection for AP side */
52
53#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
22 54
23int pxa_last_gpio; 55int pxa_last_gpio;
24 56
@@ -39,8 +71,20 @@ struct pxa_gpio_chip {
39#endif 71#endif
40}; 72};
41 73
74enum {
75 PXA25X_GPIO = 0,
76 PXA26X_GPIO,
77 PXA27X_GPIO,
78 PXA3XX_GPIO,
79 PXA93X_GPIO,
80 MMP_GPIO = 0x10,
81 MMP2_GPIO,
82};
83
42static DEFINE_SPINLOCK(gpio_lock); 84static DEFINE_SPINLOCK(gpio_lock);
43static struct pxa_gpio_chip *pxa_gpio_chips; 85static struct pxa_gpio_chip *pxa_gpio_chips;
86static int gpio_type;
87static void __iomem *gpio_reg_base;
44 88
45#define for_each_gpio_chip(i, c) \ 89#define for_each_gpio_chip(i, c) \
46 for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++) 90 for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++)
@@ -55,6 +99,122 @@ static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
55 return &pxa_gpio_chips[gpio_to_bank(gpio)]; 99 return &pxa_gpio_chips[gpio_to_bank(gpio)];
56} 100}
57 101
102static inline int gpio_is_pxa_type(int type)
103{
104 return (type & MMP_GPIO) == 0;
105}
106
107static inline int gpio_is_mmp_type(int type)
108{
109 return (type & MMP_GPIO) != 0;
110}
111
112/* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted,
113 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
114 */
115static inline int __gpio_is_inverted(int gpio)
116{
117 if ((gpio_type == PXA26X_GPIO) && (gpio > 85))
118 return 1;
119 return 0;
120}
121
122/*
123 * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
124 * function of a GPIO, and GPDRx cannot be altered once configured. It
125 * is attributed as "occupied" here (I know this terminology isn't
126 * accurate, you are welcome to propose a better one :-)
127 */
128static inline int __gpio_is_occupied(unsigned gpio)
129{
130 struct pxa_gpio_chip *pxachip;
131 void __iomem *base;
132 unsigned long gafr = 0, gpdr = 0;
133 int ret, af = 0, dir = 0;
134
135 pxachip = gpio_to_pxachip(gpio);
136 base = gpio_chip_base(&pxachip->chip);
137 gpdr = readl_relaxed(base + GPDR_OFFSET);
138
139 switch (gpio_type) {
140 case PXA25X_GPIO:
141 case PXA26X_GPIO:
142 case PXA27X_GPIO:
143 gafr = readl_relaxed(base + GAFR_OFFSET);
144 af = (gafr >> ((gpio & 0xf) * 2)) & 0x3;
145 dir = gpdr & GPIO_bit(gpio);
146
147 if (__gpio_is_inverted(gpio))
148 ret = (af != 1) || (dir == 0);
149 else
150 ret = (af != 0) || (dir != 0);
151 break;
152 default:
153 ret = gpdr & GPIO_bit(gpio);
154 break;
155 }
156 return ret;
157}
158
159#ifdef CONFIG_ARCH_PXA
160static inline int __pxa_gpio_to_irq(int gpio)
161{
162 if (gpio_is_pxa_type(gpio_type))
163 return PXA_GPIO_TO_IRQ(gpio);
164 return -1;
165}
166
167static inline int __pxa_irq_to_gpio(int irq)
168{
169 if (gpio_is_pxa_type(gpio_type))
170 return irq - PXA_GPIO_TO_IRQ(0);
171 return -1;
172}
173#else
174static inline int __pxa_gpio_to_irq(int gpio) { return -1; }
175static inline int __pxa_irq_to_gpio(int irq) { return -1; }
176#endif
177
178#ifdef CONFIG_ARCH_MMP
179static inline int __mmp_gpio_to_irq(int gpio)
180{
181 if (gpio_is_mmp_type(gpio_type))
182 return MMP_GPIO_TO_IRQ(gpio);
183 return -1;
184}
185
186static inline int __mmp_irq_to_gpio(int irq)
187{
188 if (gpio_is_mmp_type(gpio_type))
189 return irq - MMP_GPIO_TO_IRQ(0);
190 return -1;
191}
192#else
193static inline int __mmp_gpio_to_irq(int gpio) { return -1; }
194static inline int __mmp_irq_to_gpio(int irq) { return -1; }
195#endif
196
197static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
198{
199 int gpio, ret;
200
201 gpio = chip->base + offset;
202 ret = __pxa_gpio_to_irq(gpio);
203 if (ret >= 0)
204 return ret;
205 return __mmp_gpio_to_irq(gpio);
206}
207
208int pxa_irq_to_gpio(int irq)
209{
210 int ret;
211
212 ret = __pxa_irq_to_gpio(irq);
213 if (ret >= 0)
214 return ret;
215 return __mmp_irq_to_gpio(irq);
216}
217
58static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 218static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
59{ 219{
60 void __iomem *base = gpio_chip_base(chip); 220 void __iomem *base = gpio_chip_base(chip);
@@ -63,12 +223,12 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
63 223
64 spin_lock_irqsave(&gpio_lock, flags); 224 spin_lock_irqsave(&gpio_lock, flags);
65 225
66 value = __raw_readl(base + GPDR_OFFSET); 226 value = readl_relaxed(base + GPDR_OFFSET);
67 if (__gpio_is_inverted(chip->base + offset)) 227 if (__gpio_is_inverted(chip->base + offset))
68 value |= mask; 228 value |= mask;
69 else 229 else
70 value &= ~mask; 230 value &= ~mask;
71 __raw_writel(value, base + GPDR_OFFSET); 231 writel_relaxed(value, base + GPDR_OFFSET);
72 232
73 spin_unlock_irqrestore(&gpio_lock, flags); 233 spin_unlock_irqrestore(&gpio_lock, flags);
74 return 0; 234 return 0;
@@ -81,16 +241,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
81 uint32_t tmp, mask = 1 << offset; 241 uint32_t tmp, mask = 1 << offset;
82 unsigned long flags; 242 unsigned long flags;
83 243
84 __raw_writel(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET)); 244 writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
85 245
86 spin_lock_irqsave(&gpio_lock, flags); 246 spin_lock_irqsave(&gpio_lock, flags);
87 247
88 tmp = __raw_readl(base + GPDR_OFFSET); 248 tmp = readl_relaxed(base + GPDR_OFFSET);
89 if (__gpio_is_inverted(chip->base + offset)) 249 if (__gpio_is_inverted(chip->base + offset))
90 tmp &= ~mask; 250 tmp &= ~mask;
91 else 251 else
92 tmp |= mask; 252 tmp |= mask;
93 __raw_writel(tmp, base + GPDR_OFFSET); 253 writel_relaxed(tmp, base + GPDR_OFFSET);
94 254
95 spin_unlock_irqrestore(&gpio_lock, flags); 255 spin_unlock_irqrestore(&gpio_lock, flags);
96 return 0; 256 return 0;
@@ -98,16 +258,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
98 258
99static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset) 259static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset)
100{ 260{
101 return __raw_readl(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset); 261 return readl_relaxed(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset);
102} 262}
103 263
104static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 264static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
105{ 265{
106 __raw_writel(1 << offset, gpio_chip_base(chip) + 266 writel_relaxed(1 << offset, gpio_chip_base(chip) +
107 (value ? GPSR_OFFSET : GPCR_OFFSET)); 267 (value ? GPSR_OFFSET : GPCR_OFFSET));
108} 268}
109 269
110static int __init pxa_init_gpio_chip(int gpio_end) 270static int __devinit pxa_init_gpio_chip(int gpio_end)
111{ 271{
112 int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1; 272 int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1;
113 struct pxa_gpio_chip *chips; 273 struct pxa_gpio_chip *chips;
@@ -122,7 +282,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
122 struct gpio_chip *c = &chips[i].chip; 282 struct gpio_chip *c = &chips[i].chip;
123 283
124 sprintf(chips[i].label, "gpio-%d", i); 284 sprintf(chips[i].label, "gpio-%d", i);
125 chips[i].regbase = GPIO_BANK(i); 285 chips[i].regbase = gpio_reg_base + BANK_OFF(i);
126 286
127 c->base = gpio; 287 c->base = gpio;
128 c->label = chips[i].label; 288 c->label = chips[i].label;
@@ -131,6 +291,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
131 c->direction_output = pxa_gpio_direction_output; 291 c->direction_output = pxa_gpio_direction_output;
132 c->get = pxa_gpio_get; 292 c->get = pxa_gpio_get;
133 c->set = pxa_gpio_set; 293 c->set = pxa_gpio_set;
294 c->to_irq = pxa_gpio_to_irq;
134 295
135 /* number of GPIOs on last bank may be less than 32 */ 296 /* number of GPIOs on last bank may be less than 32 */
136 c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32; 297 c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32;
@@ -147,18 +308,18 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c)
147{ 308{
148 uint32_t grer, gfer; 309 uint32_t grer, gfer;
149 310
150 grer = __raw_readl(c->regbase + GRER_OFFSET) & ~c->irq_mask; 311 grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask;
151 gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~c->irq_mask; 312 gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask;
152 grer |= c->irq_edge_rise & c->irq_mask; 313 grer |= c->irq_edge_rise & c->irq_mask;
153 gfer |= c->irq_edge_fall & c->irq_mask; 314 gfer |= c->irq_edge_fall & c->irq_mask;
154 __raw_writel(grer, c->regbase + GRER_OFFSET); 315 writel_relaxed(grer, c->regbase + GRER_OFFSET);
155 __raw_writel(gfer, c->regbase + GFER_OFFSET); 316 writel_relaxed(gfer, c->regbase + GFER_OFFSET);
156} 317}
157 318
158static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) 319static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
159{ 320{
160 struct pxa_gpio_chip *c; 321 struct pxa_gpio_chip *c;
161 int gpio = irq_to_gpio(d->irq); 322 int gpio = pxa_irq_to_gpio(d->irq);
162 unsigned long gpdr, mask = GPIO_bit(gpio); 323 unsigned long gpdr, mask = GPIO_bit(gpio);
163 324
164 c = gpio_to_pxachip(gpio); 325 c = gpio_to_pxachip(gpio);
@@ -176,12 +337,12 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
176 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; 337 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
177 } 338 }
178 339
179 gpdr = __raw_readl(c->regbase + GPDR_OFFSET); 340 gpdr = readl_relaxed(c->regbase + GPDR_OFFSET);
180 341
181 if (__gpio_is_inverted(gpio)) 342 if (__gpio_is_inverted(gpio))
182 __raw_writel(gpdr | mask, c->regbase + GPDR_OFFSET); 343 writel_relaxed(gpdr | mask, c->regbase + GPDR_OFFSET);
183 else 344 else
184 __raw_writel(gpdr & ~mask, c->regbase + GPDR_OFFSET); 345 writel_relaxed(gpdr & ~mask, c->regbase + GPDR_OFFSET);
185 346
186 if (type & IRQ_TYPE_EDGE_RISING) 347 if (type & IRQ_TYPE_EDGE_RISING)
187 c->irq_edge_rise |= mask; 348 c->irq_edge_rise |= mask;
@@ -212,9 +373,9 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
212 for_each_gpio_chip(gpio, c) { 373 for_each_gpio_chip(gpio, c) {
213 gpio_base = c->chip.base; 374 gpio_base = c->chip.base;
214 375
215 gedr = __raw_readl(c->regbase + GEDR_OFFSET); 376 gedr = readl_relaxed(c->regbase + GEDR_OFFSET);
216 gedr = gedr & c->irq_mask; 377 gedr = gedr & c->irq_mask;
217 __raw_writel(gedr, c->regbase + GEDR_OFFSET); 378 writel_relaxed(gedr, c->regbase + GEDR_OFFSET);
218 379
219 n = find_first_bit(&gedr, BITS_PER_LONG); 380 n = find_first_bit(&gedr, BITS_PER_LONG);
220 while (n < BITS_PER_LONG) { 381 while (n < BITS_PER_LONG) {
@@ -229,29 +390,29 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
229 390
230static void pxa_ack_muxed_gpio(struct irq_data *d) 391static void pxa_ack_muxed_gpio(struct irq_data *d)
231{ 392{
232 int gpio = irq_to_gpio(d->irq); 393 int gpio = pxa_irq_to_gpio(d->irq);
233 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); 394 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
234 395
235 __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET); 396 writel_relaxed(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
236} 397}
237 398
238static void pxa_mask_muxed_gpio(struct irq_data *d) 399static void pxa_mask_muxed_gpio(struct irq_data *d)
239{ 400{
240 int gpio = irq_to_gpio(d->irq); 401 int gpio = pxa_irq_to_gpio(d->irq);
241 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); 402 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
242 uint32_t grer, gfer; 403 uint32_t grer, gfer;
243 404
244 c->irq_mask &= ~GPIO_bit(gpio); 405 c->irq_mask &= ~GPIO_bit(gpio);
245 406
246 grer = __raw_readl(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio); 407 grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio);
247 gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio); 408 gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio);
248 __raw_writel(grer, c->regbase + GRER_OFFSET); 409 writel_relaxed(grer, c->regbase + GRER_OFFSET);
249 __raw_writel(gfer, c->regbase + GFER_OFFSET); 410 writel_relaxed(gfer, c->regbase + GFER_OFFSET);
250} 411}
251 412
252static void pxa_unmask_muxed_gpio(struct irq_data *d) 413static void pxa_unmask_muxed_gpio(struct irq_data *d)
253{ 414{
254 int gpio = irq_to_gpio(d->irq); 415 int gpio = pxa_irq_to_gpio(d->irq);
255 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); 416 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
256 417
257 c->irq_mask |= GPIO_bit(gpio); 418 c->irq_mask |= GPIO_bit(gpio);
@@ -266,34 +427,143 @@ static struct irq_chip pxa_muxed_gpio_chip = {
266 .irq_set_type = pxa_gpio_irq_type, 427 .irq_set_type = pxa_gpio_irq_type,
267}; 428};
268 429
269void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) 430static int pxa_gpio_nums(void)
270{ 431{
271 struct pxa_gpio_chip *c; 432 int count = 0;
272 int gpio, irq; 433
434#ifdef CONFIG_ARCH_PXA
435 if (cpu_is_pxa25x()) {
436#ifdef CONFIG_CPU_PXA26x
437 count = 89;
438 gpio_type = PXA26X_GPIO;
439#elif defined(CONFIG_PXA25x)
440 count = 84;
441 gpio_type = PXA26X_GPIO;
442#endif /* CONFIG_CPU_PXA26x */
443 } else if (cpu_is_pxa27x()) {
444 count = 120;
445 gpio_type = PXA27X_GPIO;
446 } else if (cpu_is_pxa93x() || cpu_is_pxa95x()) {
447 count = 191;
448 gpio_type = PXA93X_GPIO;
449 } else if (cpu_is_pxa3xx()) {
450 count = 127;
451 gpio_type = PXA3XX_GPIO;
452 }
453#endif /* CONFIG_ARCH_PXA */
454
455#ifdef CONFIG_ARCH_MMP
456 if (cpu_is_pxa168() || cpu_is_pxa910()) {
457 count = 127;
458 gpio_type = MMP_GPIO;
459 } else if (cpu_is_mmp2()) {
460 count = 191;
461 gpio_type = MMP2_GPIO;
462 }
463#endif /* CONFIG_ARCH_MMP */
464 return count;
465}
273 466
274 pxa_last_gpio = end; 467static int __devinit pxa_gpio_probe(struct platform_device *pdev)
468{
469 struct pxa_gpio_chip *c;
470 struct resource *res;
471 struct clk *clk;
472 int gpio, irq, ret;
473 int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0;
474
475 pxa_last_gpio = pxa_gpio_nums();
476 if (!pxa_last_gpio)
477 return -EINVAL;
478
479 irq0 = platform_get_irq_byname(pdev, "gpio0");
480 irq1 = platform_get_irq_byname(pdev, "gpio1");
481 irq_mux = platform_get_irq_byname(pdev, "gpio_mux");
482 if ((irq0 > 0 && irq1 <= 0) || (irq0 <= 0 && irq1 > 0)
483 || (irq_mux <= 0))
484 return -EINVAL;
485 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
486 if (!res)
487 return -EINVAL;
488 gpio_reg_base = ioremap(res->start, resource_size(res));
489 if (!gpio_reg_base)
490 return -EINVAL;
491
492 if (irq0 > 0)
493 gpio_offset = 2;
494
495 clk = clk_get(&pdev->dev, NULL);
496 if (IS_ERR(clk)) {
497 dev_err(&pdev->dev, "Error %ld to get gpio clock\n",
498 PTR_ERR(clk));
499 iounmap(gpio_reg_base);
500 return PTR_ERR(clk);
501 }
502 ret = clk_prepare(clk);
503 if (ret) {
504 clk_put(clk);
505 iounmap(gpio_reg_base);
506 return ret;
507 }
508 ret = clk_enable(clk);
509 if (ret) {
510 clk_unprepare(clk);
511 clk_put(clk);
512 iounmap(gpio_reg_base);
513 return ret;
514 }
275 515
276 /* Initialize GPIO chips */ 516 /* Initialize GPIO chips */
277 pxa_init_gpio_chip(end); 517 pxa_init_gpio_chip(pxa_last_gpio);
278 518
279 /* clear all GPIO edge detects */ 519 /* clear all GPIO edge detects */
280 for_each_gpio_chip(gpio, c) { 520 for_each_gpio_chip(gpio, c) {
281 __raw_writel(0, c->regbase + GFER_OFFSET); 521 writel_relaxed(0, c->regbase + GFER_OFFSET);
282 __raw_writel(0, c->regbase + GRER_OFFSET); 522 writel_relaxed(0, c->regbase + GRER_OFFSET);
283 __raw_writel(~0,c->regbase + GEDR_OFFSET); 523 writel_relaxed(~0,c->regbase + GEDR_OFFSET);
524 /* unmask GPIO edge detect for AP side */
525 if (gpio_is_mmp_type(gpio_type))
526 writel_relaxed(~0, c->regbase + ED_MASK_OFFSET);
284 } 527 }
285 528
286 for (irq = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) { 529#ifdef CONFIG_ARCH_PXA
530 irq = gpio_to_irq(0);
531 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
532 handle_edge_irq);
533 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
534 irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler);
535
536 irq = gpio_to_irq(1);
537 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
538 handle_edge_irq);
539 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
540 irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler);
541#endif
542
543 for (irq = gpio_to_irq(gpio_offset);
544 irq <= gpio_to_irq(pxa_last_gpio); irq++) {
287 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, 545 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
288 handle_edge_irq); 546 handle_edge_irq);
289 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 547 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
290 } 548 }
291 549
292 /* Install handler for GPIO>=2 edge detect interrupts */ 550 irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler);
293 irq_set_chained_handler(mux_irq, pxa_gpio_demux_handler); 551 return 0;
294 pxa_muxed_gpio_chip.irq_set_wake = fn;
295} 552}
296 553
554static struct platform_driver pxa_gpio_driver = {
555 .probe = pxa_gpio_probe,
556 .driver = {
557 .name = "pxa-gpio",
558 },
559};
560
561static int __init pxa_gpio_init(void)
562{
563 return platform_driver_register(&pxa_gpio_driver);
564}
565postcore_initcall(pxa_gpio_init);
566
297#ifdef CONFIG_PM 567#ifdef CONFIG_PM
298static int pxa_gpio_suspend(void) 568static int pxa_gpio_suspend(void)
299{ 569{
@@ -301,13 +571,13 @@ static int pxa_gpio_suspend(void)
301 int gpio; 571 int gpio;
302 572
303 for_each_gpio_chip(gpio, c) { 573 for_each_gpio_chip(gpio, c) {
304 c->saved_gplr = __raw_readl(c->regbase + GPLR_OFFSET); 574 c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET);
305 c->saved_gpdr = __raw_readl(c->regbase + GPDR_OFFSET); 575 c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET);
306 c->saved_grer = __raw_readl(c->regbase + GRER_OFFSET); 576 c->saved_grer = readl_relaxed(c->regbase + GRER_OFFSET);
307 c->saved_gfer = __raw_readl(c->regbase + GFER_OFFSET); 577 c->saved_gfer = readl_relaxed(c->regbase + GFER_OFFSET);
308 578
309 /* Clear GPIO transition detect bits */ 579 /* Clear GPIO transition detect bits */
310 __raw_writel(0xffffffff, c->regbase + GEDR_OFFSET); 580 writel_relaxed(0xffffffff, c->regbase + GEDR_OFFSET);
311 } 581 }
312 return 0; 582 return 0;
313} 583}
@@ -319,12 +589,12 @@ static void pxa_gpio_resume(void)
319 589
320 for_each_gpio_chip(gpio, c) { 590 for_each_gpio_chip(gpio, c) {
321 /* restore level with set/clear */ 591 /* restore level with set/clear */
322 __raw_writel( c->saved_gplr, c->regbase + GPSR_OFFSET); 592 writel_relaxed( c->saved_gplr, c->regbase + GPSR_OFFSET);
323 __raw_writel(~c->saved_gplr, c->regbase + GPCR_OFFSET); 593 writel_relaxed(~c->saved_gplr, c->regbase + GPCR_OFFSET);
324 594
325 __raw_writel(c->saved_grer, c->regbase + GRER_OFFSET); 595 writel_relaxed(c->saved_grer, c->regbase + GRER_OFFSET);
326 __raw_writel(c->saved_gfer, c->regbase + GFER_OFFSET); 596 writel_relaxed(c->saved_gfer, c->regbase + GFER_OFFSET);
327 __raw_writel(c->saved_gpdr, c->regbase + GPDR_OFFSET); 597 writel_relaxed(c->saved_gpdr, c->regbase + GPDR_OFFSET);
328 } 598 }
329} 599}
330#else 600#else
@@ -336,3 +606,10 @@ struct syscore_ops pxa_gpio_syscore_ops = {
336 .suspend = pxa_gpio_suspend, 606 .suspend = pxa_gpio_suspend,
337 .resume = pxa_gpio_resume, 607 .resume = pxa_gpio_resume,
338}; 608};
609
610static int __init pxa_gpio_sysinit(void)
611{
612 register_syscore_ops(&pxa_gpio_syscore_ops);
613 return 0;
614}
615postcore_initcall(pxa_gpio_sysinit);
diff --git a/drivers/pcmcia/pxa2xx_cm_x255.c b/drivers/pcmcia/pxa2xx_cm_x255.c
index 0b4f946cf13a..31ab6ddf52c9 100644
--- a/drivers/pcmcia/pxa2xx_cm_x255.c
+++ b/drivers/pcmcia/pxa2xx_cm_x255.c
@@ -16,8 +16,6 @@
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/export.h> 17#include <linux/export.h>
18 18
19#include <asm/mach-types.h>
20
21#include "soc_common.h" 19#include "soc_common.h"
22 20
23#define GPIO_PCMCIA_SKTSEL (54) 21#define GPIO_PCMCIA_SKTSEL (54)
@@ -27,15 +25,15 @@
27#define GPIO_PCMCIA_S1_RDYINT (8) 25#define GPIO_PCMCIA_S1_RDYINT (8)
28#define GPIO_PCMCIA_RESET (9) 26#define GPIO_PCMCIA_RESET (9)
29 27
30#define PCMCIA_S0_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID) 28#define PCMCIA_S0_CD_VALID gpio_to_irq(GPIO_PCMCIA_S0_CD_VALID)
31#define PCMCIA_S1_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S1_CD_VALID) 29#define PCMCIA_S1_CD_VALID gpio_to_irq(GPIO_PCMCIA_S1_CD_VALID)
32#define PCMCIA_S0_RDYINT IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT) 30#define PCMCIA_S0_RDYINT gpio_to_irq(GPIO_PCMCIA_S0_RDYINT)
33#define PCMCIA_S1_RDYINT IRQ_GPIO(GPIO_PCMCIA_S1_RDYINT) 31#define PCMCIA_S1_RDYINT gpio_to_irq(GPIO_PCMCIA_S1_RDYINT)
34 32
35 33
36static struct pcmcia_irqs irqs[] = { 34static struct pcmcia_irqs irqs[] = {
37 { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" }, 35 { .sock = 0, .str = "PCMCIA0 CD" },
38 { 1, PCMCIA_S1_CD_VALID, "PCMCIA1 CD" }, 36 { .sock = 1, .str = "PCMCIA1 CD" },
39}; 37};
40 38
41static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt) 39static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
@@ -46,6 +44,8 @@ static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
46 gpio_direction_output(GPIO_PCMCIA_RESET, 0); 44 gpio_direction_output(GPIO_PCMCIA_RESET, 0);
47 45
48 skt->socket.pci_irq = skt->nr == 0 ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT; 46 skt->socket.pci_irq = skt->nr == 0 ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT;
47 irqs[0].irq = PCMCIA_S0_CD_VALID;
48 irqs[1].irq = PCMCIA_S1_CD_VALID;
49 ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); 49 ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
50 if (!ret) 50 if (!ret)
51 gpio_free(GPIO_PCMCIA_RESET); 51 gpio_free(GPIO_PCMCIA_RESET);
diff --git a/drivers/pcmcia/pxa2xx_cm_x270.c b/drivers/pcmcia/pxa2xx_cm_x270.c
index 923f315926ef..3dc7621a0767 100644
--- a/drivers/pcmcia/pxa2xx_cm_x270.c
+++ b/drivers/pcmcia/pxa2xx_cm_x270.c
@@ -16,20 +16,18 @@
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/export.h> 17#include <linux/export.h>
18 18
19#include <asm/mach-types.h>
20
21#include "soc_common.h" 19#include "soc_common.h"
22 20
23#define GPIO_PCMCIA_S0_CD_VALID (84) 21#define GPIO_PCMCIA_S0_CD_VALID (84)
24#define GPIO_PCMCIA_S0_RDYINT (82) 22#define GPIO_PCMCIA_S0_RDYINT (82)
25#define GPIO_PCMCIA_RESET (53) 23#define GPIO_PCMCIA_RESET (53)
26 24
27#define PCMCIA_S0_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID) 25#define PCMCIA_S0_CD_VALID gpio_to_irq(GPIO_PCMCIA_S0_CD_VALID)
28#define PCMCIA_S0_RDYINT IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT) 26#define PCMCIA_S0_RDYINT gpio_to_irq(GPIO_PCMCIA_S0_RDYINT)
29 27
30 28
31static struct pcmcia_irqs irqs[] = { 29static struct pcmcia_irqs irqs[] = {
32 { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" }, 30 { .sock = 0, .str = "PCMCIA0 CD" },
33}; 31};
34 32
35static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) 33static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
@@ -40,6 +38,7 @@ static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
40 gpio_direction_output(GPIO_PCMCIA_RESET, 0); 38 gpio_direction_output(GPIO_PCMCIA_RESET, 0);
41 39
42 skt->socket.pci_irq = PCMCIA_S0_RDYINT; 40 skt->socket.pci_irq = PCMCIA_S0_RDYINT;
41 irqs[0].irq = PCMCIA_S0_CD_VALID;
43 ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); 42 ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
44 if (!ret) 43 if (!ret)
45 gpio_free(GPIO_PCMCIA_RESET); 44 gpio_free(GPIO_PCMCIA_RESET);
diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h
new file mode 100644
index 000000000000..05071ee34c3f
--- /dev/null
+++ b/include/linux/gpio-pxa.h
@@ -0,0 +1,16 @@
1#ifndef __GPIO_PXA_H
2#define __GPIO_PXA_H
3
4#define GPIO_bit(x) (1 << ((x) & 0x1f))
5
6#define gpio_to_bank(gpio) ((gpio) >> 5)
7
8/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
9 * Those cases currently cause holes in the GPIO number space, the
10 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
11 */
12extern int pxa_last_gpio;
13
14extern int pxa_irq_to_gpio(int irq);
15
16#endif /* __GPIO_PXA_H */