aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/mips/math-emu/cp1emu.c298
-rw-r--r--arch/mips/math-emu/dp_add.c52
-rw-r--r--arch/mips/math-emu/dp_cmp.c14
-rw-r--r--arch/mips/math-emu/dp_div.c74
-rw-r--r--arch/mips/math-emu/dp_fint.c7
-rw-r--r--arch/mips/math-emu/dp_flong.c7
-rw-r--r--arch/mips/math-emu/dp_fsp.c14
-rw-r--r--arch/mips/math-emu/dp_mul.c132
-rw-r--r--arch/mips/math-emu/dp_simple.c8
-rw-r--r--arch/mips/math-emu/dp_sqrt.c12
-rw-r--r--arch/mips/math-emu/dp_sub.c34
-rw-r--r--arch/mips/math-emu/dp_tint.c19
-rw-r--r--arch/mips/math-emu/dp_tlong.c19
-rw-r--r--arch/mips/math-emu/ieee754.c11
-rw-r--r--arch/mips/math-emu/ieee754.h2
-rw-r--r--arch/mips/math-emu/ieee754d.c2
-rw-r--r--arch/mips/math-emu/ieee754dp.c6
-rw-r--r--arch/mips/math-emu/ieee754dp.h6
-rw-r--r--arch/mips/math-emu/ieee754int.h6
-rw-r--r--arch/mips/math-emu/ieee754sp.c6
-rw-r--r--arch/mips/math-emu/ieee754sp.h6
-rw-r--r--arch/mips/math-emu/kernel_linkage.c2
-rw-r--r--arch/mips/math-emu/sp_add.c53
-rw-r--r--arch/mips/math-emu/sp_cmp.c14
-rw-r--r--arch/mips/math-emu/sp_div.c73
-rw-r--r--arch/mips/math-emu/sp_fdp.c29
-rw-r--r--arch/mips/math-emu/sp_fint.c7
-rw-r--r--arch/mips/math-emu/sp_flong.c7
-rw-r--r--arch/mips/math-emu/sp_mul.c127
-rw-r--r--arch/mips/math-emu/sp_simple.c8
-rw-r--r--arch/mips/math-emu/sp_sqrt.c11
-rw-r--r--arch/mips/math-emu/sp_sub.c34
-rw-r--r--arch/mips/math-emu/sp_tint.c19
-rw-r--r--arch/mips/math-emu/sp_tlong.c19
34 files changed, 497 insertions, 641 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 3a0dfa4feadd..6258291354eb 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * cp1emu.c: a MIPS coprocessor 1 (fpu) instruction emulator 2 * cp1emu.c: a MIPS coprocessor 1 (FPU) instruction emulator
3 * 3 *
4 * MIPS floating point support 4 * MIPS floating point support
5 * Copyright (C) 1994-2000 Algorithmics Ltd. 5 * Copyright (C) 1994-2000 Algorithmics Ltd.
@@ -18,19 +18,19 @@
18 * 18 *
19 * You should have received a copy of the GNU General Public License along 19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 21 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 * 22 *
23 * A complete emulator for MIPS coprocessor 1 instructions. This is 23 * A complete emulator for MIPS coprocessor 1 instructions. This is
24 * required for #float(switch) or #float(trap), where it catches all 24 * required for #float(switch) or #float(trap), where it catches all
25 * COP1 instructions via the "CoProcessor Unusable" exception. 25 * COP1 instructions via the "CoProcessor Unusable" exception.
26 * 26 *
27 * More surprisingly it is also required for #float(ieee), to help out 27 * More surprisingly it is also required for #float(ieee), to help out
28 * the hardware fpu at the boundaries of the IEEE-754 representation 28 * the hardware FPU at the boundaries of the IEEE-754 representation
29 * (denormalised values, infinities, underflow, etc). It is made 29 * (denormalised values, infinities, underflow, etc). It is made
30 * quite nasty because emulation of some non-COP1 instructions is 30 * quite nasty because emulation of some non-COP1 instructions is
31 * required, e.g. in branch delay slots. 31 * required, e.g. in branch delay slots.
32 * 32 *
33 * Note if you know that you won't have an fpu, then you'll get much 33 * Note if you know that you won't have an FPU, then you'll get much
34 * better performance by compiling with -msoft-float! 34 * better performance by compiling with -msoft-float!
35 */ 35 */
36#include <linux/sched.h> 36#include <linux/sched.h>
@@ -72,14 +72,14 @@ static int fpux_emu(struct pt_regs *,
72#define MM_POOL32A_MINOR_SHIFT 0x6 72#define MM_POOL32A_MINOR_SHIFT 0x6
73#define MM_MIPS32_COND_FC 0x30 73#define MM_MIPS32_COND_FC 0x30
74 74
75/* Convert Mips rounding mode (0..3) to IEEE library modes. */ 75/* Convert MIPS rounding mode (0..3) to IEEE library modes. */
76static const unsigned char ieee_rm[4] = { 76static const unsigned char ieee_rm[4] = {
77 [FPU_CSR_RN] = IEEE754_RN, 77 [FPU_CSR_RN] = IEEE754_RN,
78 [FPU_CSR_RZ] = IEEE754_RZ, 78 [FPU_CSR_RZ] = IEEE754_RZ,
79 [FPU_CSR_RU] = IEEE754_RU, 79 [FPU_CSR_RU] = IEEE754_RU,
80 [FPU_CSR_RD] = IEEE754_RD, 80 [FPU_CSR_RD] = IEEE754_RD,
81}; 81};
82/* Convert IEEE library modes to Mips rounding mode (0..3). */ 82/* Convert IEEE library modes to MIPS rounding mode (0..3). */
83static const unsigned char mips_rm[4] = { 83static const unsigned char mips_rm[4] = {
84 [IEEE754_RN] = FPU_CSR_RN, 84 [IEEE754_RN] = FPU_CSR_RN,
85 [IEEE754_RZ] = FPU_CSR_RZ, 85 [IEEE754_RZ] = FPU_CSR_RZ,
@@ -914,10 +914,16 @@ do { \
914static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 914static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
915 struct mm_decoded_insn dec_insn, void *__user *fault_addr) 915 struct mm_decoded_insn dec_insn, void *__user *fault_addr)
916{ 916{
917 mips_instruction ir;
918 unsigned long contpc = xcp->cp0_epc + dec_insn.pc_inc; 917 unsigned long contpc = xcp->cp0_epc + dec_insn.pc_inc;
919 unsigned int cond; 918 unsigned int cond, cbit;
920 int pc_inc; 919 mips_instruction ir;
920 int likely, pc_inc;
921 u32 __user *wva;
922 u64 __user *dva;
923 u32 value;
924 u32 wval;
925 u64 dval;
926 int sig;
921 927
922 /* XXX NEC Vr54xx bug workaround */ 928 /* XXX NEC Vr54xx bug workaround */
923 if (delay_slot(xcp)) { 929 if (delay_slot(xcp)) {
@@ -972,94 +978,81 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
972 return SIGILL; 978 return SIGILL;
973 } 979 }
974 980
975 emul: 981emul:
976 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, xcp, 0); 982 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, xcp, 0);
977 MIPS_FPU_EMU_INC_STATS(emulated); 983 MIPS_FPU_EMU_INC_STATS(emulated);
978 switch (MIPSInst_OPCODE(ir)) { 984 switch (MIPSInst_OPCODE(ir)) {
979 case ldc1_op:{ 985 case ldc1_op:
980 u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + 986 dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
981 MIPSInst_SIMM(ir)); 987 MIPSInst_SIMM(ir));
982 u64 val;
983
984 MIPS_FPU_EMU_INC_STATS(loads); 988 MIPS_FPU_EMU_INC_STATS(loads);
985 989
986 if (!access_ok(VERIFY_READ, va, sizeof(u64))) { 990 if (!access_ok(VERIFY_READ, dva, sizeof(u64))) {
987 MIPS_FPU_EMU_INC_STATS(errors); 991 MIPS_FPU_EMU_INC_STATS(errors);
988 *fault_addr = va; 992 *fault_addr = dva;
989 return SIGBUS; 993 return SIGBUS;
990 } 994 }
991 if (__get_user(val, va)) { 995 if (__get_user(dval, dva)) {
992 MIPS_FPU_EMU_INC_STATS(errors); 996 MIPS_FPU_EMU_INC_STATS(errors);
993 *fault_addr = va; 997 *fault_addr = dva;
994 return SIGSEGV; 998 return SIGSEGV;
995 } 999 }
996 DITOREG(val, MIPSInst_RT(ir)); 1000 DITOREG(dval, MIPSInst_RT(ir));
997 break; 1001 break;
998 }
999
1000 case sdc1_op:{
1001 u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
1002 MIPSInst_SIMM(ir));
1003 u64 val;
1004 1002
1003 case sdc1_op:
1004 dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
1005 MIPSInst_SIMM(ir));
1005 MIPS_FPU_EMU_INC_STATS(stores); 1006 MIPS_FPU_EMU_INC_STATS(stores);
1006 DIFROMREG(val, MIPSInst_RT(ir)); 1007 DIFROMREG(dval, MIPSInst_RT(ir));
1007 if (!access_ok(VERIFY_WRITE, va, sizeof(u64))) { 1008 if (!access_ok(VERIFY_WRITE, dva, sizeof(u64))) {
1008 MIPS_FPU_EMU_INC_STATS(errors); 1009 MIPS_FPU_EMU_INC_STATS(errors);
1009 *fault_addr = va; 1010 *fault_addr = dva;
1010 return SIGBUS; 1011 return SIGBUS;
1011 } 1012 }
1012 if (__put_user(val, va)) { 1013 if (__put_user(dval, dva)) {
1013 MIPS_FPU_EMU_INC_STATS(errors); 1014 MIPS_FPU_EMU_INC_STATS(errors);
1014 *fault_addr = va; 1015 *fault_addr = dva;
1015 return SIGSEGV; 1016 return SIGSEGV;
1016 } 1017 }
1017 break; 1018 break;
1018 }
1019
1020 case lwc1_op:{
1021 u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
1022 MIPSInst_SIMM(ir));
1023 u32 val;
1024 1019
1020 case lwc1_op:
1021 wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
1022 MIPSInst_SIMM(ir));
1025 MIPS_FPU_EMU_INC_STATS(loads); 1023 MIPS_FPU_EMU_INC_STATS(loads);
1026 if (!access_ok(VERIFY_READ, va, sizeof(u32))) { 1024 if (!access_ok(VERIFY_READ, wva, sizeof(u32))) {
1027 MIPS_FPU_EMU_INC_STATS(errors); 1025 MIPS_FPU_EMU_INC_STATS(errors);
1028 *fault_addr = va; 1026 *fault_addr = wva;
1029 return SIGBUS; 1027 return SIGBUS;
1030 } 1028 }
1031 if (__get_user(val, va)) { 1029 if (__get_user(wval, wva)) {
1032 MIPS_FPU_EMU_INC_STATS(errors); 1030 MIPS_FPU_EMU_INC_STATS(errors);
1033 *fault_addr = va; 1031 *fault_addr = wva;
1034 return SIGSEGV; 1032 return SIGSEGV;
1035 } 1033 }
1036 SITOREG(val, MIPSInst_RT(ir)); 1034 SITOREG(wval, MIPSInst_RT(ir));
1037 break; 1035 break;
1038 }
1039
1040 case swc1_op:{
1041 u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
1042 MIPSInst_SIMM(ir));
1043 u32 val;
1044 1036
1037 case swc1_op:
1038 wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
1039 MIPSInst_SIMM(ir));
1045 MIPS_FPU_EMU_INC_STATS(stores); 1040 MIPS_FPU_EMU_INC_STATS(stores);
1046 SIFROMREG(val, MIPSInst_RT(ir)); 1041 SIFROMREG(wval, MIPSInst_RT(ir));
1047 if (!access_ok(VERIFY_WRITE, va, sizeof(u32))) { 1042 if (!access_ok(VERIFY_WRITE, wva, sizeof(u32))) {
1048 MIPS_FPU_EMU_INC_STATS(errors); 1043 MIPS_FPU_EMU_INC_STATS(errors);
1049 *fault_addr = va; 1044 *fault_addr = wva;
1050 return SIGBUS; 1045 return SIGBUS;
1051 } 1046 }
1052 if (__put_user(val, va)) { 1047 if (__put_user(wval, wva)) {
1053 MIPS_FPU_EMU_INC_STATS(errors); 1048 MIPS_FPU_EMU_INC_STATS(errors);
1054 *fault_addr = va; 1049 *fault_addr = wva;
1055 return SIGSEGV; 1050 return SIGSEGV;
1056 } 1051 }
1057 break; 1052 break;
1058 }
1059 1053
1060 case cop1_op: 1054 case cop1_op:
1061 switch (MIPSInst_RS(ir)) { 1055 switch (MIPSInst_RS(ir)) {
1062
1063 case dmfc_op: 1056 case dmfc_op:
1064 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 1057 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64)
1065 return SIGILL; 1058 return SIGILL;
@@ -1111,10 +1104,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1111 SITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir)); 1104 SITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
1112 break; 1105 break;
1113 1106
1114 case cfc_op:{ 1107 case cfc_op:
1115 /* cop control register rd -> gpr[rt] */ 1108 /* cop control register rd -> gpr[rt] */
1116 u32 value;
1117
1118 if (MIPSInst_RD(ir) == FPCREG_CSR) { 1109 if (MIPSInst_RD(ir) == FPCREG_CSR) {
1119 value = ctx->fcr31; 1110 value = ctx->fcr31;
1120 value = (value & ~FPU_CSR_RM) | 1111 value = (value & ~FPU_CSR_RM) |
@@ -1130,12 +1121,9 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1130 if (MIPSInst_RT(ir)) 1121 if (MIPSInst_RT(ir))
1131 xcp->regs[MIPSInst_RT(ir)] = value; 1122 xcp->regs[MIPSInst_RT(ir)] = value;
1132 break; 1123 break;
1133 }
1134 1124
1135 case ctc_op:{ 1125 case ctc_op:
1136 /* copregister rd <- rt */ 1126 /* copregister rd <- rt */
1137 u32 value;
1138
1139 if (MIPSInst_RT(ir) == 0) 1127 if (MIPSInst_RT(ir) == 0)
1140 value = 0; 1128 value = 0;
1141 else 1129 else
@@ -1160,12 +1148,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1160 return SIGFPE; 1148 return SIGFPE;
1161 } 1149 }
1162 break; 1150 break;
1163 }
1164
1165 case bc_op:{
1166 unsigned int cbit;
1167 int likely = 0;
1168 1151
1152 case bc_op:
1169 if (delay_slot(xcp)) 1153 if (delay_slot(xcp))
1170 return SIGILL; 1154 return SIGILL;
1171 1155
@@ -1175,6 +1159,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1175 cbit = FPU_CSR_COND; 1159 cbit = FPU_CSR_COND;
1176 cond = ctx->fcr31 & cbit; 1160 cond = ctx->fcr31 & cbit;
1177 1161
1162 likely = 0;
1178 switch (MIPSInst_RT(ir) & 3) { 1163 switch (MIPSInst_RT(ir) & 3) {
1179 case bcfl_op: 1164 case bcfl_op:
1180 likely = 1; 1165 likely = 1;
@@ -1192,8 +1177,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1192 1177
1193 set_delay_slot(xcp); 1178 set_delay_slot(xcp);
1194 if (cond) { 1179 if (cond) {
1195 /* branch taken: emulate dslot 1180 /*
1196 * instruction 1181 * Branch taken: emulate dslot instruction
1197 */ 1182 */
1198 xcp->cp0_epc += dec_insn.pc_inc; 1183 xcp->cp0_epc += dec_insn.pc_inc;
1199 1184
@@ -1228,8 +1213,10 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1228 switch (MIPSInst_OPCODE(ir)) { 1213 switch (MIPSInst_OPCODE(ir)) {
1229 case lwc1_op: 1214 case lwc1_op:
1230 goto emul; 1215 goto emul;
1216
1231 case swc1_op: 1217 case swc1_op:
1232 goto emul; 1218 goto emul;
1219
1233 case ldc1_op: 1220 case ldc1_op:
1234 case sdc1_op: 1221 case sdc1_op:
1235 if (cpu_has_mips_2_3_4_5 || 1222 if (cpu_has_mips_2_3_4_5 ||
@@ -1238,14 +1225,17 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1238 1225
1239 return SIGILL; 1226 return SIGILL;
1240 goto emul; 1227 goto emul;
1228
1241 case cop1_op: 1229 case cop1_op:
1242 goto emul; 1230 goto emul;
1231
1243 case cop1x_op: 1232 case cop1x_op:
1244 if (cpu_has_mips_4_5 || cpu_has_mips64) 1233 if (cpu_has_mips_4_5 || cpu_has_mips64)
1245 /* its one of ours */ 1234 /* its one of ours */
1246 goto emul; 1235 goto emul;
1247 1236
1248 return SIGILL; 1237 return SIGILL;
1238
1249 case spec_op: 1239 case spec_op:
1250 if (!cpu_has_mips_4_5_r) 1240 if (!cpu_has_mips_4_5_r)
1251 return SIGILL; 1241 return SIGILL;
@@ -1260,10 +1250,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1260 * instruction in the dslot 1250 * instruction in the dslot
1261 */ 1251 */
1262 return mips_dsemul(xcp, ir, contpc); 1252 return mips_dsemul(xcp, ir, contpc);
1263 } 1253 } else if (likely) { /* branch not taken */
1264 else {
1265 /* branch not taken */
1266 if (likely) {
1267 /* 1254 /*
1268 * branch likely nullifies 1255 * branch likely nullifies
1269 * dslot if not taken 1256 * dslot if not taken
@@ -1275,26 +1262,19 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1275 * dslot as normal insn 1262 * dslot as normal insn
1276 */ 1263 */
1277 } 1264 }
1278 }
1279 break; 1265 break;
1280 }
1281 1266
1282 default: 1267 default:
1283 if (!(MIPSInst_RS(ir) & 0x10)) 1268 if (!(MIPSInst_RS(ir) & 0x10))
1284 return SIGILL; 1269 return SIGILL;
1285 {
1286 int sig;
1287 1270
1288 /* a real fpu computation instruction */ 1271 /* a real fpu computation instruction */
1289 if ((sig = fpu_emu(xcp, ctx, ir))) 1272 if ((sig = fpu_emu(xcp, ctx, ir)))
1290 return sig; 1273 return sig;
1291 }
1292 } 1274 }
1293 break; 1275 break;
1294 1276
1295 case cop1x_op:{ 1277 case cop1x_op:
1296 int sig;
1297
1298 if (!cpu_has_mips_4_5 && !cpu_has_mips64) 1278 if (!cpu_has_mips_4_5 && !cpu_has_mips64)
1299 return SIGILL; 1279 return SIGILL;
1300 1280
@@ -1302,7 +1282,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1302 if (sig) 1282 if (sig)
1303 return sig; 1283 return sig;
1304 break; 1284 break;
1305 }
1306 1285
1307 case spec_op: 1286 case spec_op:
1308 if (!cpu_has_mips_4_5_r) 1287 if (!cpu_has_mips_4_5_r)
@@ -1477,7 +1456,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1477 1456
1478 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr; 1457 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
1479 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { 1458 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
1480 /*printk ("SIGFPE: fpu csr = %08x\n", 1459 /*printk ("SIGFPE: FPU csr = %08x\n",
1481 ctx->fcr31); */ 1460 ctx->fcr31); */
1482 return SIGFPE; 1461 return SIGFPE;
1483 } 1462 }
@@ -1584,6 +1563,8 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1584{ 1563{
1585 int rfmt; /* resulting format */ 1564 int rfmt; /* resulting format */
1586 unsigned rcsr = 0; /* resulting csr */ 1565 unsigned rcsr = 0; /* resulting csr */
1566 unsigned int oldrm;
1567 unsigned int cbit;
1587 unsigned cond; 1568 unsigned cond;
1588 union { 1569 union {
1589 union ieee754dp d; 1570 union ieee754dp d;
@@ -1591,14 +1572,16 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1591 int w; 1572 int w;
1592 s64 l; 1573 s64 l;
1593 } rv; /* resulting value */ 1574 } rv; /* resulting value */
1575 u64 bits;
1594 1576
1595 MIPS_FPU_EMU_INC_STATS(cp1ops); 1577 MIPS_FPU_EMU_INC_STATS(cp1ops);
1596 switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) { 1578 switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) {
1597 case s_fmt:{ /* 0 */ 1579 case s_fmt: { /* 0 */
1598 union { 1580 union {
1599 union ieee754sp(*b) (union ieee754sp, union ieee754sp); 1581 union ieee754sp(*b) (union ieee754sp, union ieee754sp);
1600 union ieee754sp(*u) (union ieee754sp); 1582 union ieee754sp(*u) (union ieee754sp);
1601 } handler; 1583 } handler;
1584 union ieee754sp fs, ft;
1602 1585
1603 switch (MIPSInst_FUNC(ir)) { 1586 switch (MIPSInst_FUNC(ir)) {
1604 /* binary ops */ 1587 /* binary ops */
@@ -1622,6 +1605,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1622 1605
1623 handler.u = ieee754sp_sqrt; 1606 handler.u = ieee754sp_sqrt;
1624 goto scopuop; 1607 goto scopuop;
1608
1625 /* 1609 /*
1626 * Note that on some MIPS IV implementations such as the 1610 * Note that on some MIPS IV implementations such as the
1627 * R5000 and R8000 the FSQRT and FRECIP instructions do not 1611 * R5000 and R8000 the FSQRT and FRECIP instructions do not
@@ -1633,6 +1617,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1633 1617
1634 handler.u = fpemu_sp_rsqrt; 1618 handler.u = fpemu_sp_rsqrt;
1635 goto scopuop; 1619 goto scopuop;
1620
1636 case frecip_op: 1621 case frecip_op:
1637 if (!cpu_has_mips_4_5_r2) 1622 if (!cpu_has_mips_4_5_r2)
1638 return SIGILL; 1623 return SIGILL;
@@ -1650,6 +1635,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1650 return 0; 1635 return 0;
1651 SPFROMREG(rv.s, MIPSInst_FS(ir)); 1636 SPFROMREG(rv.s, MIPSInst_FS(ir));
1652 break; 1637 break;
1638
1653 case fmovz_op: 1639 case fmovz_op:
1654 if (!cpu_has_mips_4_5_r) 1640 if (!cpu_has_mips_4_5_r)
1655 return SIGILL; 1641 return SIGILL;
@@ -1658,6 +1644,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1658 return 0; 1644 return 0;
1659 SPFROMREG(rv.s, MIPSInst_FS(ir)); 1645 SPFROMREG(rv.s, MIPSInst_FS(ir));
1660 break; 1646 break;
1647
1661 case fmovn_op: 1648 case fmovn_op:
1662 if (!cpu_has_mips_4_5_r) 1649 if (!cpu_has_mips_4_5_r)
1663 return SIGILL; 1650 return SIGILL;
@@ -1666,37 +1653,32 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1666 return 0; 1653 return 0;
1667 SPFROMREG(rv.s, MIPSInst_FS(ir)); 1654 SPFROMREG(rv.s, MIPSInst_FS(ir));
1668 break; 1655 break;
1656
1669 case fabs_op: 1657 case fabs_op:
1670 handler.u = ieee754sp_abs; 1658 handler.u = ieee754sp_abs;
1671 goto scopuop; 1659 goto scopuop;
1660
1672 case fneg_op: 1661 case fneg_op:
1673 handler.u = ieee754sp_neg; 1662 handler.u = ieee754sp_neg;
1674 goto scopuop; 1663 goto scopuop;
1664
1675 case fmov_op: 1665 case fmov_op:
1676 /* an easy one */ 1666 /* an easy one */
1677 SPFROMREG(rv.s, MIPSInst_FS(ir)); 1667 SPFROMREG(rv.s, MIPSInst_FS(ir));
1678 goto copcsr; 1668 goto copcsr;
1679 1669
1680 /* binary op on handler */ 1670 /* binary op on handler */
1681 scopbop: 1671scopbop:
1682 { 1672 SPFROMREG(fs, MIPSInst_FS(ir));
1683 union ieee754sp fs, ft; 1673 SPFROMREG(ft, MIPSInst_FT(ir));
1684
1685 SPFROMREG(fs, MIPSInst_FS(ir));
1686 SPFROMREG(ft, MIPSInst_FT(ir));
1687
1688 rv.s = (*handler.b) (fs, ft);
1689 goto copcsr;
1690 }
1691 scopuop:
1692 {
1693 union ieee754sp fs;
1694 1674
1695 SPFROMREG(fs, MIPSInst_FS(ir)); 1675 rv.s = (*handler.b) (fs, ft);
1696 rv.s = (*handler.u) (fs); 1676 goto copcsr;
1697 goto copcsr; 1677scopuop:
1698 } 1678 SPFROMREG(fs, MIPSInst_FS(ir));
1699 copcsr: 1679 rv.s = (*handler.u) (fs);
1680 goto copcsr;
1681copcsr:
1700 if (ieee754_cxtest(IEEE754_INEXACT)) 1682 if (ieee754_cxtest(IEEE754_INEXACT))
1701 rcsr |= FPU_CSR_INE_X | FPU_CSR_INE_S; 1683 rcsr |= FPU_CSR_INE_X | FPU_CSR_INE_S;
1702 if (ieee754_cxtest(IEEE754_UNDERFLOW)) 1684 if (ieee754_cxtest(IEEE754_UNDERFLOW))
@@ -1712,44 +1694,35 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1712 /* unary conv ops */ 1694 /* unary conv ops */
1713 case fcvts_op: 1695 case fcvts_op:
1714 return SIGILL; /* not defined */ 1696 return SIGILL; /* not defined */
1715 case fcvtd_op:{
1716 union ieee754sp fs;
1717 1697
1698 case fcvtd_op:
1718 SPFROMREG(fs, MIPSInst_FS(ir)); 1699 SPFROMREG(fs, MIPSInst_FS(ir));
1719 rv.d = ieee754dp_fsp(fs); 1700 rv.d = ieee754dp_fsp(fs);
1720 rfmt = d_fmt; 1701 rfmt = d_fmt;
1721 goto copcsr; 1702 goto copcsr;
1722 }
1723 case fcvtw_op:{
1724 union ieee754sp fs;
1725 1703
1704 case fcvtw_op:
1726 SPFROMREG(fs, MIPSInst_FS(ir)); 1705 SPFROMREG(fs, MIPSInst_FS(ir));
1727 rv.w = ieee754sp_tint(fs); 1706 rv.w = ieee754sp_tint(fs);
1728 rfmt = w_fmt; 1707 rfmt = w_fmt;
1729 goto copcsr; 1708 goto copcsr;
1730 }
1731 1709
1732 case fround_op: 1710 case fround_op:
1733 case ftrunc_op: 1711 case ftrunc_op:
1734 case fceil_op: 1712 case fceil_op:
1735 case ffloor_op:{ 1713 case ffloor_op:
1736 unsigned int oldrm = ieee754_csr.rm;
1737 union ieee754sp fs;
1738
1739 if (!cpu_has_mips_2_3_4_5 && !cpu_has_mips64) 1714 if (!cpu_has_mips_2_3_4_5 && !cpu_has_mips64)
1740 return SIGILL; 1715 return SIGILL;
1741 1716
1717 oldrm = ieee754_csr.rm;
1742 SPFROMREG(fs, MIPSInst_FS(ir)); 1718 SPFROMREG(fs, MIPSInst_FS(ir));
1743 ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; 1719 ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
1744 rv.w = ieee754sp_tint(fs); 1720 rv.w = ieee754sp_tint(fs);
1745 ieee754_csr.rm = oldrm; 1721 ieee754_csr.rm = oldrm;
1746 rfmt = w_fmt; 1722 rfmt = w_fmt;
1747 goto copcsr; 1723 goto copcsr;
1748 }
1749
1750 case fcvtl_op:{
1751 union ieee754sp fs;
1752 1724
1725 case fcvtl_op:
1753 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 1726 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64)
1754 return SIGILL; 1727 return SIGILL;
1755 1728
@@ -1757,25 +1730,21 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1757 rv.l = ieee754sp_tlong(fs); 1730 rv.l = ieee754sp_tlong(fs);
1758 rfmt = l_fmt; 1731 rfmt = l_fmt;
1759 goto copcsr; 1732 goto copcsr;
1760 }
1761 1733
1762 case froundl_op: 1734 case froundl_op:
1763 case ftruncl_op: 1735 case ftruncl_op:
1764 case fceill_op: 1736 case fceill_op:
1765 case ffloorl_op:{ 1737 case ffloorl_op:
1766 unsigned int oldrm = ieee754_csr.rm;
1767 union ieee754sp fs;
1768
1769 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 1738 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64)
1770 return SIGILL; 1739 return SIGILL;
1771 1740
1741 oldrm = ieee754_csr.rm;
1772 SPFROMREG(fs, MIPSInst_FS(ir)); 1742 SPFROMREG(fs, MIPSInst_FS(ir));
1773 ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; 1743 ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
1774 rv.l = ieee754sp_tlong(fs); 1744 rv.l = ieee754sp_tlong(fs);
1775 ieee754_csr.rm = oldrm; 1745 ieee754_csr.rm = oldrm;
1776 rfmt = l_fmt; 1746 rfmt = l_fmt;
1777 goto copcsr; 1747 goto copcsr;
1778 }
1779 1748
1780 default: 1749 default:
1781 if (MIPSInst_FUNC(ir) >= fcmp_op) { 1750 if (MIPSInst_FUNC(ir) >= fcmp_op) {
@@ -1793,16 +1762,15 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1793 else 1762 else
1794 goto copcsr; 1763 goto copcsr;
1795 1764
1796 } 1765 } else
1797 else {
1798 return SIGILL; 1766 return SIGILL;
1799 }
1800 break; 1767 break;
1801 } 1768 }
1802 break; 1769 break;
1803 } 1770 }
1804 1771
1805 case d_fmt:{ 1772 case d_fmt: {
1773 union ieee754dp fs, ft;
1806 union { 1774 union {
1807 union ieee754dp(*b) (union ieee754dp, union ieee754dp); 1775 union ieee754dp(*b) (union ieee754dp, union ieee754dp);
1808 union ieee754dp(*u) (union ieee754dp); 1776 union ieee754dp(*u) (union ieee754dp);
@@ -1887,65 +1855,51 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1887 goto copcsr; 1855 goto copcsr;
1888 1856
1889 /* binary op on handler */ 1857 /* binary op on handler */
1890 dcopbop:{ 1858dcopbop:
1891 union ieee754dp fs, ft; 1859 DPFROMREG(fs, MIPSInst_FS(ir));
1892 1860 DPFROMREG(ft, MIPSInst_FT(ir));
1893 DPFROMREG(fs, MIPSInst_FS(ir));
1894 DPFROMREG(ft, MIPSInst_FT(ir));
1895
1896 rv.d = (*handler.b) (fs, ft);
1897 goto copcsr;
1898 }
1899 dcopuop:{
1900 union ieee754dp fs;
1901
1902 DPFROMREG(fs, MIPSInst_FS(ir));
1903 rv.d = (*handler.u) (fs);
1904 goto copcsr;
1905 }
1906 1861
1907 /* unary conv ops */ 1862 rv.d = (*handler.b) (fs, ft);
1908 case fcvts_op:{ 1863 goto copcsr;
1909 union ieee754dp fs; 1864dcopuop:
1865 DPFROMREG(fs, MIPSInst_FS(ir));
1866 rv.d = (*handler.u) (fs);
1867 goto copcsr;
1910 1868
1869 /*
1870 * unary conv ops
1871 */
1872 case fcvts_op:
1911 DPFROMREG(fs, MIPSInst_FS(ir)); 1873 DPFROMREG(fs, MIPSInst_FS(ir));
1912 rv.s = ieee754sp_fdp(fs); 1874 rv.s = ieee754sp_fdp(fs);
1913 rfmt = s_fmt; 1875 rfmt = s_fmt;
1914 goto copcsr; 1876 goto copcsr;
1915 } 1877
1916 case fcvtd_op: 1878 case fcvtd_op:
1917 return SIGILL; /* not defined */ 1879 return SIGILL; /* not defined */
1918 1880
1919 case fcvtw_op:{ 1881 case fcvtw_op:
1920 union ieee754dp fs;
1921
1922 DPFROMREG(fs, MIPSInst_FS(ir)); 1882 DPFROMREG(fs, MIPSInst_FS(ir));
1923 rv.w = ieee754dp_tint(fs); /* wrong */ 1883 rv.w = ieee754dp_tint(fs); /* wrong */
1924 rfmt = w_fmt; 1884 rfmt = w_fmt;
1925 goto copcsr; 1885 goto copcsr;
1926 }
1927 1886
1928 case fround_op: 1887 case fround_op:
1929 case ftrunc_op: 1888 case ftrunc_op:
1930 case fceil_op: 1889 case fceil_op:
1931 case ffloor_op:{ 1890 case ffloor_op:
1932 unsigned int oldrm = ieee754_csr.rm;
1933 union ieee754dp fs;
1934
1935 if (!cpu_has_mips_2_3_4_5_r) 1891 if (!cpu_has_mips_2_3_4_5_r)
1936 return SIGILL; 1892 return SIGILL;
1937 1893
1894 oldrm = ieee754_csr.rm;
1938 DPFROMREG(fs, MIPSInst_FS(ir)); 1895 DPFROMREG(fs, MIPSInst_FS(ir));
1939 ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; 1896 ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
1940 rv.w = ieee754dp_tint(fs); 1897 rv.w = ieee754dp_tint(fs);
1941 ieee754_csr.rm = oldrm; 1898 ieee754_csr.rm = oldrm;
1942 rfmt = w_fmt; 1899 rfmt = w_fmt;
1943 goto copcsr; 1900 goto copcsr;
1944 }
1945
1946 case fcvtl_op:{
1947 union ieee754dp fs;
1948 1901
1902 case fcvtl_op:
1949 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 1903 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64)
1950 return SIGILL; 1904 return SIGILL;
1951 1905
@@ -1953,25 +1907,21 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1953 rv.l = ieee754dp_tlong(fs); 1907 rv.l = ieee754dp_tlong(fs);
1954 rfmt = l_fmt; 1908 rfmt = l_fmt;
1955 goto copcsr; 1909 goto copcsr;
1956 }
1957 1910
1958 case froundl_op: 1911 case froundl_op:
1959 case ftruncl_op: 1912 case ftruncl_op:
1960 case fceill_op: 1913 case fceill_op:
1961 case ffloorl_op:{ 1914 case ffloorl_op:
1962 unsigned int oldrm = ieee754_csr.rm;
1963 union ieee754dp fs;
1964
1965 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 1915 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64)
1966 return SIGILL; 1916 return SIGILL;
1967 1917
1918 oldrm = ieee754_csr.rm;
1968 DPFROMREG(fs, MIPSInst_FS(ir)); 1919 DPFROMREG(fs, MIPSInst_FS(ir));
1969 ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; 1920 ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
1970 rv.l = ieee754dp_tlong(fs); 1921 rv.l = ieee754dp_tlong(fs);
1971 ieee754_csr.rm = oldrm; 1922 ieee754_csr.rm = oldrm;
1972 rfmt = l_fmt; 1923 rfmt = l_fmt;
1973 goto copcsr; 1924 goto copcsr;
1974 }
1975 1925
1976 default: 1926 default:
1977 if (MIPSInst_FUNC(ir) >= fcmp_op) { 1927 if (MIPSInst_FUNC(ir) >= fcmp_op) {
@@ -1998,11 +1948,8 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1998 break; 1948 break;
1999 } 1949 }
2000 break; 1950 break;
2001 }
2002
2003 case w_fmt:{
2004 union ieee754sp fs;
2005 1951
1952 case w_fmt:
2006 switch (MIPSInst_FUNC(ir)) { 1953 switch (MIPSInst_FUNC(ir)) {
2007 case fcvts_op: 1954 case fcvts_op:
2008 /* convert word to single precision real */ 1955 /* convert word to single precision real */
@@ -2022,8 +1969,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
2022 break; 1969 break;
2023 } 1970 }
2024 1971
2025 case l_fmt:{ 1972 case l_fmt:
2026 u64 bits;
2027 1973
2028 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64) 1974 if (!cpu_has_mips_3_4_5 && !cpu_has_mips64)
2029 return SIGILL; 1975 return SIGILL;
@@ -2045,7 +1991,6 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
2045 return SIGILL; 1991 return SIGILL;
2046 } 1992 }
2047 break; 1993 break;
2048 }
2049 1994
2050 default: 1995 default:
2051 return SIGILL; 1996 return SIGILL;
@@ -2060,7 +2005,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
2060 */ 2005 */
2061 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr; 2006 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
2062 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { 2007 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
2063 /*printk ("SIGFPE: fpu csr = %08x\n",ctx->fcr31); */ 2008 /*printk ("SIGFPE: FPU csr = %08x\n",ctx->fcr31); */
2064 return SIGFPE; 2009 return SIGFPE;
2065 } 2010 }
2066 2011
@@ -2068,7 +2013,6 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
2068 * Now we can safely write the result back to the register file. 2013 * Now we can safely write the result back to the register file.
2069 */ 2014 */
2070 switch (rfmt) { 2015 switch (rfmt) {
2071 unsigned int cbit;
2072 case -1: 2016 case -1:
2073 2017
2074 if (cpu_has_mips_4_5_r) 2018 if (cpu_has_mips_4_5_r)
@@ -2200,7 +2144,7 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
2200 2144
2201 /* SIGILL indicates a non-fpu instruction */ 2145 /* SIGILL indicates a non-fpu instruction */
2202 if (sig == SIGILL && xcp->cp0_epc != oldepc) 2146 if (sig == SIGILL && xcp->cp0_epc != oldepc)
2203 /* but if epc has advanced, then ignore it */ 2147 /* but if EPC has advanced, then ignore it */
2204 sig = 0; 2148 sig = 0;
2205 2149
2206 return sig; 2150 return sig;
diff --git a/arch/mips/math-emu/dp_add.c b/arch/mips/math-emu/dp_add.c
index 48b9ef6f8a0d..9c98b96f7287 100644
--- a/arch/mips/math-emu/dp_add.c
+++ b/arch/mips/math-emu/dp_add.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,17 +16,15 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 *
25 */ 20 */
26 21
27
28#include "ieee754dp.h" 22#include "ieee754dp.h"
29 23
30union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y) 24union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
31{ 25{
26 int s;
27
32 COMPXDP; 28 COMPXDP;
33 COMPYDP; 29 COMPYDP;
34 30
@@ -69,9 +65,9 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
69 return x; 65 return x;
70 66
71 67
72 /* Infinity handling 68 /*
73 */ 69 * Infinity handling
74 70 */
75 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): 71 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
76 if (xs == ys) 72 if (xs == ys)
77 return x; 73 return x;
@@ -88,15 +84,14 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
88 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): 84 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
89 return x; 85 return x;
90 86
91 /* Zero handling 87 /*
92 */ 88 * Zero handling
93 89 */
94 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): 90 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
95 if (xs == ys) 91 if (xs == ys)
96 return x; 92 return x;
97 else 93 else
98 return ieee754dp_zero(ieee754_csr.rm == 94 return ieee754dp_zero(ieee754_csr.rm == IEEE754_RD);
99 IEEE754_RD);
100 95
101 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO): 96 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
102 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): 97 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
@@ -125,20 +120,24 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
125 assert(xm & DP_HIDDEN_BIT); 120 assert(xm & DP_HIDDEN_BIT);
126 assert(ym & DP_HIDDEN_BIT); 121 assert(ym & DP_HIDDEN_BIT);
127 122
128 /* provide guard,round and stick bit space */ 123 /*
124 * Provide guard,round and stick bit space.
125 */
129 xm <<= 3; 126 xm <<= 3;
130 ym <<= 3; 127 ym <<= 3;
131 128
132 if (xe > ye) { 129 if (xe > ye) {
133 /* have to shift y fraction right to align 130 /*
131 * Have to shift y fraction right to align.
134 */ 132 */
135 int s = xe - ye; 133 s = xe - ye;
136 ym = XDPSRS(ym, s); 134 ym = XDPSRS(ym, s);
137 ye += s; 135 ye += s;
138 } else if (ye > xe) { 136 } else if (ye > xe) {
139 /* have to shift x fraction right to align 137 /*
138 * Have to shift x fraction right to align.
140 */ 139 */
141 int s = ye - xe; 140 s = ye - xe;
142 xm = XDPSRS(xm, s); 141 xm = XDPSRS(xm, s);
143 xe += s; 142 xe += s;
144 } 143 }
@@ -146,8 +145,9 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
146 assert(xe <= DP_EMAX); 145 assert(xe <= DP_EMAX);
147 146
148 if (xs == ys) { 147 if (xs == ys) {
149 /* generate 28 bit result of adding two 27 bit numbers 148 /*
150 * leaving result in xm,xs,xe 149 * Generate 28 bit result of adding two 27 bit numbers
150 * leaving result in xm, xs and xe.
151 */ 151 */
152 xm = xm + ym; 152 xm = xm + ym;
153 xe = xe; 153 xe = xe;
@@ -168,15 +168,15 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
168 xs = ys; 168 xs = ys;
169 } 169 }
170 if (xm == 0) 170 if (xm == 0)
171 return ieee754dp_zero(ieee754_csr.rm == 171 return ieee754dp_zero(ieee754_csr.rm == IEEE754_RD);
172 IEEE754_RD);
173 172
174 /* normalize to rounding precision */ 173 /*
174 * Normalize to rounding precision.
175 */
175 while ((xm >> (DP_FBITS + 3)) == 0) { 176 while ((xm >> (DP_FBITS + 3)) == 0) {
176 xm <<= 1; 177 xm <<= 1;
177 xe--; 178 xe--;
178 } 179 }
179
180 } 180 }
181 181
182 return ieee754dp_format(xs, xe, xm); 182 return ieee754dp_format(xs, xe, xm);
diff --git a/arch/mips/math-emu/dp_cmp.c b/arch/mips/math-emu/dp_cmp.c
index fe573cb6f77f..30f95f6e9ac4 100644
--- a/arch/mips/math-emu/dp_cmp.c
+++ b/arch/mips/math-emu/dp_cmp.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,16 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754dp.h" 22#include "ieee754dp.h"
28 23
29int ieee754dp_cmp(union ieee754dp x, union ieee754dp y, int cmp, int sig) 24int ieee754dp_cmp(union ieee754dp x, union ieee754dp y, int cmp, int sig)
30{ 25{
26 s64 vx;
27 s64 vy;
28
31 COMPXDP; 29 COMPXDP;
32 COMPYDP; 30 COMPYDP;
33 31
@@ -48,8 +46,8 @@ int ieee754dp_cmp(union ieee754dp x, union ieee754dp y, int cmp, int sig)
48 } 46 }
49 return 0; 47 return 0;
50 } else { 48 } else {
51 s64 vx = x.bits; 49 vx = x.bits;
52 s64 vy = y.bits; 50 vy = y.bits;
53 51
54 if (vx < 0) 52 if (vx < 0)
55 vx = -vx ^ DP_SIGN_BIT; 53 vx = -vx ^ DP_SIGN_BIT;
diff --git a/arch/mips/math-emu/dp_div.c b/arch/mips/math-emu/dp_div.c
index 377e11470e3f..bef0e55e5938 100644
--- a/arch/mips/math-emu/dp_div.c
+++ b/arch/mips/math-emu/dp_div.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,17 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754dp.h" 22#include "ieee754dp.h"
28 23
29union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y) 24union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
30{ 25{
26 u64 rm;
27 int re;
28 u64 bm;
29
31 COMPXDP; 30 COMPXDP;
32 COMPYDP; 31 COMPYDP;
33 32
@@ -68,9 +67,9 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
68 return x; 67 return x;
69 68
70 69
71 /* Infinity handling 70 /*
72 */ 71 * Infinity handling
73 72 */
74 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): 73 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
75 ieee754_setcx(IEEE754_INVALID_OPERATION); 74 ieee754_setcx(IEEE754_INVALID_OPERATION);
76 return ieee754dp_indef(); 75 return ieee754dp_indef();
@@ -85,9 +84,9 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
85 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): 84 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
86 return ieee754dp_inf(xs ^ ys); 85 return ieee754dp_inf(xs ^ ys);
87 86
88 /* Zero handling 87 /*
89 */ 88 * Zero handling
90 89 */
91 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): 90 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
92 ieee754_setcx(IEEE754_INVALID_OPERATION); 91 ieee754_setcx(IEEE754_INVALID_OPERATION);
93 return ieee754dp_indef(); 92 return ieee754dp_indef();
@@ -122,35 +121,34 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
122 xm <<= 3; 121 xm <<= 3;
123 ym <<= 3; 122 ym <<= 3;
124 123
125 { 124 /* now the dirty work */
126 /* now the dirty work */
127
128 u64 rm = 0;
129 int re = xe - ye;
130 u64 bm;
131
132 for (bm = DP_MBIT(DP_FBITS + 2); bm; bm >>= 1) {
133 if (xm >= ym) {
134 xm -= ym;
135 rm |= bm;
136 if (xm == 0)
137 break;
138 }
139 xm <<= 1;
140 }
141 rm <<= 1;
142 if (xm)
143 rm |= 1; /* have remainder, set sticky */
144 125
145 assert(rm); 126 rm = 0;
127 re = xe - ye;
146 128
147 /* normalise rm to rounding precision ? 129 for (bm = DP_MBIT(DP_FBITS + 2); bm; bm >>= 1) {
148 */ 130 if (xm >= ym) {
149 while ((rm >> (DP_FBITS + 3)) == 0) { 131 xm -= ym;
150 rm <<= 1; 132 rm |= bm;
151 re--; 133 if (xm == 0)
134 break;
152 } 135 }
136 xm <<= 1;
137 }
138
139 rm <<= 1;
140 if (xm)
141 rm |= 1; /* have remainder, set sticky */
153 142
154 return ieee754dp_format(xs == ys ? 0 : 1, re, rm); 143 assert(rm);
144
145 /*
146 * Normalise rm to rounding precision ?
147 */
148 while ((rm >> (DP_FBITS + 3)) == 0) {
149 rm <<= 1;
150 re--;
155 } 151 }
152
153 return ieee754dp_format(xs == ys ? 0 : 1, re, rm);
156} 154}
diff --git a/arch/mips/math-emu/dp_fint.c b/arch/mips/math-emu/dp_fint.c
index 98b9d6a14027..10258f0afd69 100644
--- a/arch/mips/math-emu/dp_fint.c
+++ b/arch/mips/math-emu/dp_fint.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,12 +16,9 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754dp.h" 22#include "ieee754dp.h"
28 23
29union ieee754dp ieee754dp_fint(int x) 24union ieee754dp ieee754dp_fint(int x)
diff --git a/arch/mips/math-emu/dp_flong.c b/arch/mips/math-emu/dp_flong.c
index 54c8f005acb2..a267c2e39d78 100644
--- a/arch/mips/math-emu/dp_flong.c
+++ b/arch/mips/math-emu/dp_flong.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,12 +16,9 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754dp.h" 22#include "ieee754dp.h"
28 23
29union ieee754dp ieee754dp_flong(s64 x) 24union ieee754dp ieee754dp_flong(s64 x)
diff --git a/arch/mips/math-emu/dp_fsp.c b/arch/mips/math-emu/dp_fsp.c
index ba600be69454..ffb69c5830b0 100644
--- a/arch/mips/math-emu/dp_fsp.c
+++ b/arch/mips/math-emu/dp_fsp.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,12 +16,9 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28#include "ieee754dp.h" 23#include "ieee754dp.h"
29 24
@@ -41,6 +36,7 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
41 case IEEE754_CLASS_SNAN: 36 case IEEE754_CLASS_SNAN:
42 ieee754_setcx(IEEE754_INVALID_OPERATION); 37 ieee754_setcx(IEEE754_INVALID_OPERATION);
43 return ieee754dp_nanxcpt(ieee754dp_indef()); 38 return ieee754dp_nanxcpt(ieee754dp_indef());
39
44 case IEEE754_CLASS_QNAN: 40 case IEEE754_CLASS_QNAN:
45 return ieee754dp_nanxcpt(builddp(xs, 41 return ieee754dp_nanxcpt(builddp(xs,
46 DP_EMAX + 1 + DP_EBIAS, 42 DP_EMAX + 1 + DP_EBIAS,
@@ -49,8 +45,10 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
49 SP_FBITS)))); 45 SP_FBITS))));
50 case IEEE754_CLASS_INF: 46 case IEEE754_CLASS_INF:
51 return ieee754dp_inf(xs); 47 return ieee754dp_inf(xs);
48
52 case IEEE754_CLASS_ZERO: 49 case IEEE754_CLASS_ZERO:
53 return ieee754dp_zero(xs); 50 return ieee754dp_zero(xs);
51
54 case IEEE754_CLASS_DNORM: 52 case IEEE754_CLASS_DNORM:
55 /* normalize */ 53 /* normalize */
56 while ((xm >> SP_FBITS) == 0) { 54 while ((xm >> SP_FBITS) == 0) {
@@ -58,11 +56,13 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
58 xe--; 56 xe--;
59 } 57 }
60 break; 58 break;
59
61 case IEEE754_CLASS_NORM: 60 case IEEE754_CLASS_NORM:
62 break; 61 break;
63 } 62 }
64 63
65 /* CAN'T possibly overflow,underflow, or need rounding 64 /*
65 * Can't possibly overflow,underflow, or need rounding
66 */ 66 */
67 67
68 /* drop the hidden bit */ 68 /* drop the hidden bit */
diff --git a/arch/mips/math-emu/dp_mul.c b/arch/mips/math-emu/dp_mul.c
index 74bc81017497..d3acdedb5b9d 100644
--- a/arch/mips/math-emu/dp_mul.c
+++ b/arch/mips/math-emu/dp_mul.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,25 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754dp.h" 22#include "ieee754dp.h"
28 23
29union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y) 24union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
30{ 25{
26 int re;
27 int rs;
28 u64 rm;
29 unsigned lxm;
30 unsigned hxm;
31 unsigned lym;
32 unsigned hym;
33 u64 lrm;
34 u64 hrm;
35 u64 t;
36 u64 at;
37
31 COMPXDP; 38 COMPXDP;
32 COMPYDP; 39 COMPYDP;
33 40
@@ -68,8 +75,9 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
68 return x; 75 return x;
69 76
70 77
71 /* Infinity handling */ 78 /*
72 79 * Infinity handling
80 */
73 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO): 81 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
74 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF): 82 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
75 ieee754_setcx(IEEE754_INVALID_OPERATION); 83 ieee754_setcx(IEEE754_INVALID_OPERATION);
@@ -107,71 +115,59 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
107 /* rm = xm * ym, re = xe+ye basically */ 115 /* rm = xm * ym, re = xe+ye basically */
108 assert(xm & DP_HIDDEN_BIT); 116 assert(xm & DP_HIDDEN_BIT);
109 assert(ym & DP_HIDDEN_BIT); 117 assert(ym & DP_HIDDEN_BIT);
110 {
111 int re = xe + ye;
112 int rs = xs ^ ys;
113 u64 rm;
114 118
115 /* shunt to top of word */ 119 re = xe + ye;
116 xm <<= 64 - (DP_FBITS + 1); 120 rs = xs ^ ys;
117 ym <<= 64 - (DP_FBITS + 1); 121
122 /* shunt to top of word */
123 xm <<= 64 - (DP_FBITS + 1);
124 ym <<= 64 - (DP_FBITS + 1);
118 125
119 /* multiply 32bits xm,ym to give high 32bits rm with stickness 126 /*
120 */ 127 * Multiply 32 bits xm, ym to give high 32 bits rm with stickness.
128 */
121 129
122 /* 32 * 32 => 64 */ 130 /* 32 * 32 => 64 */
123#define DPXMULT(x, y) ((u64)(x) * (u64)y) 131#define DPXMULT(x, y) ((u64)(x) * (u64)y)
124 132
125 { 133 lxm = xm;
126 unsigned lxm = xm; 134 hxm = xm >> 32;
127 unsigned hxm = xm >> 32; 135 lym = ym;
128 unsigned lym = ym; 136 hym = ym >> 32;
129 unsigned hym = ym >> 32; 137
130 u64 lrm; 138 lrm = DPXMULT(lxm, lym);
131 u64 hrm; 139 hrm = DPXMULT(hxm, hym);
132 140
133 lrm = DPXMULT(lxm, lym); 141 t = DPXMULT(lxm, hym);
134 hrm = DPXMULT(hxm, hym); 142
135 143 at = lrm + (t << 32);
136 { 144 hrm += at < lrm;
137 u64 t = DPXMULT(lxm, hym); 145 lrm = at;
138 { 146
139 u64 at = 147 hrm = hrm + (t >> 32);
140 lrm + (t << 32); 148
141 hrm += at < lrm; 149 t = DPXMULT(hxm, lym);
142 lrm = at; 150
143 } 151 at = lrm + (t << 32);
144 hrm = hrm + (t >> 32); 152 hrm += at < lrm;
145 } 153 lrm = at;
146 154
147 { 155 hrm = hrm + (t >> 32);
148 u64 t = DPXMULT(hxm, lym); 156
149 { 157 rm = hrm | (lrm != 0);
150 u64 at = 158
151 lrm + (t << 32); 159 /*
152 hrm += at < lrm; 160 * Sticky shift down to normal rounding precision.
153 lrm = at; 161 */
154 } 162 if ((s64) rm < 0) {
155 hrm = hrm + (t >> 32); 163 rm = (rm >> (64 - (DP_FBITS + 1 + 3))) |
156 } 164 ((rm << (DP_FBITS + 1 + 3)) != 0);
157 rm = hrm | (lrm != 0);
158 }
159
160 /*
161 * sticky shift down to normal rounding precision
162 */
163 if ((s64) rm < 0) {
164 rm =
165 (rm >> (64 - (DP_FBITS + 1 + 3))) |
166 ((rm << (DP_FBITS + 1 + 3)) != 0);
167 re++; 165 re++;
168 } else { 166 } else {
169 rm = 167 rm = (rm >> (64 - (DP_FBITS + 1 + 3 + 1))) |
170 (rm >> (64 - (DP_FBITS + 1 + 3 + 1))) | 168 ((rm << (DP_FBITS + 1 + 3 + 1)) != 0);
171 ((rm << (DP_FBITS + 1 + 3 + 1)) != 0);
172 }
173 assert(rm & (DP_HIDDEN_BIT << 3));
174
175 return ieee754dp_format(rs, re, rm);
176 } 169 }
170 assert(rm & (DP_HIDDEN_BIT << 3));
171
172 return ieee754dp_format(rs, re, rm);
177} 173}
diff --git a/arch/mips/math-emu/dp_simple.c b/arch/mips/math-emu/dp_simple.c
index 4eda7595b151..bccbe90efceb 100644
--- a/arch/mips/math-emu/dp_simple.c
+++ b/arch/mips/math-emu/dp_simple.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,12 +16,9 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754dp.h" 22#include "ieee754dp.h"
28 23
29union ieee754dp ieee754dp_neg(union ieee754dp x) 24union ieee754dp ieee754dp_neg(union ieee754dp x)
@@ -51,7 +46,6 @@ union ieee754dp ieee754dp_neg(union ieee754dp x)
51 return x; 46 return x;
52} 47}
53 48
54
55union ieee754dp ieee754dp_abs(union ieee754dp x) 49union ieee754dp ieee754dp_abs(union ieee754dp x)
56{ 50{
57 COMPXDP; 51 COMPXDP;
diff --git a/arch/mips/math-emu/dp_sqrt.c b/arch/mips/math-emu/dp_sqrt.c
index 8e88bde51f71..109878a57f12 100644
--- a/arch/mips/math-emu/dp_sqrt.c
+++ b/arch/mips/math-emu/dp_sqrt.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,12 +16,9 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754dp.h" 22#include "ieee754dp.h"
28 23
29static const unsigned table[] = { 24static const unsigned table[] = {
@@ -50,12 +45,15 @@ union ieee754dp ieee754dp_sqrt(union ieee754dp x)
50 case IEEE754_CLASS_QNAN: 45 case IEEE754_CLASS_QNAN:
51 /* sqrt(Nan) = Nan */ 46 /* sqrt(Nan) = Nan */
52 return ieee754dp_nanxcpt(x); 47 return ieee754dp_nanxcpt(x);
48
53 case IEEE754_CLASS_SNAN: 49 case IEEE754_CLASS_SNAN:
54 ieee754_setcx(IEEE754_INVALID_OPERATION); 50 ieee754_setcx(IEEE754_INVALID_OPERATION);
55 return ieee754dp_nanxcpt(ieee754dp_indef()); 51 return ieee754dp_nanxcpt(ieee754dp_indef());
52
56 case IEEE754_CLASS_ZERO: 53 case IEEE754_CLASS_ZERO:
57 /* sqrt(0) = 0 */ 54 /* sqrt(0) = 0 */
58 return x; 55 return x;
56
59 case IEEE754_CLASS_INF: 57 case IEEE754_CLASS_INF:
60 if (xs) { 58 if (xs) {
61 /* sqrt(-Inf) = Nan */ 59 /* sqrt(-Inf) = Nan */
@@ -64,9 +62,11 @@ union ieee754dp ieee754dp_sqrt(union ieee754dp x)
64 } 62 }
65 /* sqrt(+Inf) = Inf */ 63 /* sqrt(+Inf) = Inf */
66 return x; 64 return x;
65
67 case IEEE754_CLASS_DNORM: 66 case IEEE754_CLASS_DNORM:
68 DPDNORMX; 67 DPDNORMX;
69 /* fall through */ 68 /* fall through */
69
70 case IEEE754_CLASS_NORM: 70 case IEEE754_CLASS_NORM:
71 if (xs) { 71 if (xs) {
72 /* sqrt(-x) = Nan */ 72 /* sqrt(-x) = Nan */
diff --git a/arch/mips/math-emu/dp_sub.c b/arch/mips/math-emu/dp_sub.c
index 3dd62c186767..d502984df7cc 100644
--- a/arch/mips/math-emu/dp_sub.c
+++ b/arch/mips/math-emu/dp_sub.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,15 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754dp.h" 22#include "ieee754dp.h"
28 23
29union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y) 24union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
30{ 25{
26 int s;
27
31 COMPXDP; 28 COMPXDP;
32 COMPYDP; 29 COMPYDP;
33 30
@@ -68,9 +65,9 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
68 return x; 65 return x;
69 66
70 67
71 /* Infinity handling 68 /*
72 */ 69 * Infinity handling
73 70 */
74 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): 71 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
75 if (xs != ys) 72 if (xs != ys)
76 return x; 73 return x;
@@ -87,15 +84,14 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
87 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): 84 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
88 return x; 85 return x;
89 86
90 /* Zero handling 87 /*
91 */ 88 * Zero handling
92 89 */
93 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): 90 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
94 if (xs != ys) 91 if (xs != ys)
95 return x; 92 return x;
96 else 93 else
97 return ieee754dp_zero(ieee754_csr.rm == 94 return ieee754dp_zero(ieee754_csr.rm == IEEE754_RD);
98 IEEE754_RD);
99 95
100 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO): 96 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
101 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): 97 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
@@ -136,15 +132,17 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
136 ym <<= 3; 132 ym <<= 3;
137 133
138 if (xe > ye) { 134 if (xe > ye) {
139 /* have to shift y fraction right to align 135 /*
136 * Have to shift y fraction right to align
140 */ 137 */
141 int s = xe - ye; 138 s = xe - ye;
142 ym = XDPSRS(ym, s); 139 ym = XDPSRS(ym, s);
143 ye += s; 140 ye += s;
144 } else if (ye > xe) { 141 } else if (ye > xe) {
145 /* have to shift x fraction right to align 142 /*
143 * Have to shift x fraction right to align
146 */ 144 */
147 int s = ye - xe; 145 s = ye - xe;
148 xm = XDPSRS(xm, s); 146 xm = XDPSRS(xm, s);
149 xe += s; 147 xe += s;
150 } 148 }
diff --git a/arch/mips/math-emu/dp_tint.c b/arch/mips/math-emu/dp_tint.c
index 3a23c6409275..972dba0baca0 100644
--- a/arch/mips/math-emu/dp_tint.c
+++ b/arch/mips/math-emu/dp_tint.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,18 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754dp.h" 22#include "ieee754dp.h"
28 23
29int ieee754dp_tint(union ieee754dp x) 24int ieee754dp_tint(union ieee754dp x)
30{ 25{
26 u64 residue;
27 int round;
28 int sticky;
29 int odd;
30
31 COMPXDP; 31 COMPXDP;
32 32
33 ieee754_clearcx(); 33 ieee754_clearcx();
@@ -41,8 +41,10 @@ int ieee754dp_tint(union ieee754dp x)
41 case IEEE754_CLASS_INF: 41 case IEEE754_CLASS_INF:
42 ieee754_setcx(IEEE754_INVALID_OPERATION); 42 ieee754_setcx(IEEE754_INVALID_OPERATION);
43 return ieee754si_indef(); 43 return ieee754si_indef();
44
44 case IEEE754_CLASS_ZERO: 45 case IEEE754_CLASS_ZERO:
45 return 0; 46 return 0;
47
46 case IEEE754_CLASS_DNORM: 48 case IEEE754_CLASS_DNORM:
47 case IEEE754_CLASS_NORM: 49 case IEEE754_CLASS_NORM:
48 break; 50 break;
@@ -57,11 +59,6 @@ int ieee754dp_tint(union ieee754dp x)
57 if (xe > DP_FBITS) { 59 if (xe > DP_FBITS) {
58 xm <<= xe - DP_FBITS; 60 xm <<= xe - DP_FBITS;
59 } else if (xe < DP_FBITS) { 61 } else if (xe < DP_FBITS) {
60 u64 residue;
61 int round;
62 int sticky;
63 int odd;
64
65 if (xe < -1) { 62 if (xe < -1) {
66 residue = xm; 63 residue = xm;
67 round = 0; 64 round = 0;
diff --git a/arch/mips/math-emu/dp_tlong.c b/arch/mips/math-emu/dp_tlong.c
index cbeef6098e76..afaf953e576d 100644
--- a/arch/mips/math-emu/dp_tlong.c
+++ b/arch/mips/math-emu/dp_tlong.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,18 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754dp.h" 22#include "ieee754dp.h"
28 23
29s64 ieee754dp_tlong(union ieee754dp x) 24s64 ieee754dp_tlong(union ieee754dp x)
30{ 25{
26 u64 residue;
27 int round;
28 int sticky;
29 int odd;
30
31 COMPXDP; 31 COMPXDP;
32 32
33 ieee754_clearcx(); 33 ieee754_clearcx();
@@ -41,8 +41,10 @@ s64 ieee754dp_tlong(union ieee754dp x)
41 case IEEE754_CLASS_INF: 41 case IEEE754_CLASS_INF:
42 ieee754_setcx(IEEE754_INVALID_OPERATION); 42 ieee754_setcx(IEEE754_INVALID_OPERATION);
43 return ieee754di_indef(); 43 return ieee754di_indef();
44
44 case IEEE754_CLASS_ZERO: 45 case IEEE754_CLASS_ZERO:
45 return 0; 46 return 0;
47
46 case IEEE754_CLASS_DNORM: 48 case IEEE754_CLASS_DNORM:
47 case IEEE754_CLASS_NORM: 49 case IEEE754_CLASS_NORM:
48 break; 50 break;
@@ -60,11 +62,6 @@ s64 ieee754dp_tlong(union ieee754dp x)
60 if (xe > DP_FBITS) { 62 if (xe > DP_FBITS) {
61 xm <<= xe - DP_FBITS; 63 xm <<= xe - DP_FBITS;
62 } else if (xe < DP_FBITS) { 64 } else if (xe < DP_FBITS) {
63 u64 residue;
64 int round;
65 int sticky;
66 int odd;
67
68 if (xe < -1) { 65 if (xe < -1) {
69 residue = xm; 66 residue = xm;
70 round = 0; 67 round = 0;
diff --git a/arch/mips/math-emu/ieee754.c b/arch/mips/math-emu/ieee754.c
index 670d19b29f99..53f1d2287084 100644
--- a/arch/mips/math-emu/ieee754.c
+++ b/arch/mips/math-emu/ieee754.c
@@ -10,8 +10,6 @@
10 * MIPS floating point support 10 * MIPS floating point support
11 * Copyright (C) 1994-2000 Algorithmics Ltd. 11 * Copyright (C) 1994-2000 Algorithmics Ltd.
12 * 12 *
13 * ########################################################################
14 *
15 * This program is free software; you can distribute it and/or modify it 13 * This program is free software; you can distribute it and/or modify it
16 * under the terms of the GNU General Public License (Version 2) as 14 * under the terms of the GNU General Public License (Version 2) as
17 * published by the Free Software Foundation. 15 * published by the Free Software Foundation.
@@ -23,9 +21,7 @@
23 * 21 *
24 * You should have received a copy of the GNU General Public License along 22 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc., 23 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 24 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
27 *
28 * ########################################################################
29 */ 25 */
30 26
31#include <linux/compiler.h> 27#include <linux/compiler.h>
@@ -34,8 +30,9 @@
34#include "ieee754sp.h" 30#include "ieee754sp.h"
35#include "ieee754dp.h" 31#include "ieee754dp.h"
36 32
37/* special constants 33/*
38*/ 34 * Special constants
35 */
39 36
40#define DPCNST(s, b, m) \ 37#define DPCNST(s, b, m) \
41{ \ 38{ \
diff --git a/arch/mips/math-emu/ieee754.h b/arch/mips/math-emu/ieee754.h
index 4f89f854bb45..fb2fb6b89273 100644
--- a/arch/mips/math-emu/ieee754.h
+++ b/arch/mips/math-emu/ieee754.h
@@ -13,7 +13,7 @@
13 * 13 *
14 * You should have received a copy of the GNU General Public License along 14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc., 15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 16 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
17 * 17 *
18 * Nov 7, 2000 18 * Nov 7, 2000
19 * Modification to allow integration with Linux kernel 19 * Modification to allow integration with Linux kernel
diff --git a/arch/mips/math-emu/ieee754d.c b/arch/mips/math-emu/ieee754d.c
index ebe34e970b61..a04e8a7e5ac3 100644
--- a/arch/mips/math-emu/ieee754d.c
+++ b/arch/mips/math-emu/ieee754d.c
@@ -16,7 +16,7 @@
16 * 16 *
17 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 * 20 *
21 * Nov 7, 2000 21 * Nov 7, 2000
22 * Modified to build and operate in Linux kernel environment. 22 * Modified to build and operate in Linux kernel environment.
diff --git a/arch/mips/math-emu/ieee754dp.c b/arch/mips/math-emu/ieee754dp.c
index 3b123f5db400..087a6f38b149 100644
--- a/arch/mips/math-emu/ieee754dp.c
+++ b/arch/mips/math-emu/ieee754dp.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,9 +16,7 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26#include <linux/compiler.h> 22#include <linux/compiler.h>
diff --git a/arch/mips/math-emu/ieee754dp.h b/arch/mips/math-emu/ieee754dp.h
index 231bd761c5b1..61fd6fd31350 100644
--- a/arch/mips/math-emu/ieee754dp.h
+++ b/arch/mips/math-emu/ieee754dp.h
@@ -6,8 +6,6 @@
6 * MIPS floating point support 6 * MIPS floating point support
7 * Copyright (C) 1994-2000 Algorithmics Ltd. 7 * Copyright (C) 1994-2000 Algorithmics Ltd.
8 * 8 *
9 * ########################################################################
10 *
11 * This program is free software; you can distribute it and/or modify it 9 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as 10 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
@@ -19,9 +17,7 @@
19 * 17 *
20 * You should have received a copy of the GNU General Public License along 18 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc., 19 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 20 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 *
24 * ########################################################################
25 */ 21 */
26 22
27#include <linux/compiler.h> 23#include <linux/compiler.h>
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h
index 58b90874a7fe..f0365bb86747 100644
--- a/arch/mips/math-emu/ieee754int.h
+++ b/arch/mips/math-emu/ieee754int.h
@@ -6,8 +6,6 @@
6 * MIPS floating point support 6 * MIPS floating point support
7 * Copyright (C) 1994-2000 Algorithmics Ltd. 7 * Copyright (C) 1994-2000 Algorithmics Ltd.
8 * 8 *
9 * ########################################################################
10 *
11 * This program is free software; you can distribute it and/or modify it 9 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as 10 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
@@ -19,9 +17,7 @@
19 * 17 *
20 * You should have received a copy of the GNU General Public License along 18 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc., 19 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 20 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 *
24 * ########################################################################
25 */ 21 */
26#ifndef __IEEE754INT_H 22#ifndef __IEEE754INT_H
27#define __IEEE754INT_H 23#define __IEEE754INT_H
diff --git a/arch/mips/math-emu/ieee754sp.c b/arch/mips/math-emu/ieee754sp.c
index d07bec3dd1c0..e4cec15845b9 100644
--- a/arch/mips/math-emu/ieee754sp.c
+++ b/arch/mips/math-emu/ieee754sp.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,9 +16,7 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26#include <linux/compiler.h> 22#include <linux/compiler.h>
diff --git a/arch/mips/math-emu/ieee754sp.h b/arch/mips/math-emu/ieee754sp.h
index 35da62f791c9..ad268e332318 100644
--- a/arch/mips/math-emu/ieee754sp.h
+++ b/arch/mips/math-emu/ieee754sp.h
@@ -6,8 +6,6 @@
6 * MIPS floating point support 6 * MIPS floating point support
7 * Copyright (C) 1994-2000 Algorithmics Ltd. 7 * Copyright (C) 1994-2000 Algorithmics Ltd.
8 * 8 *
9 * ########################################################################
10 *
11 * This program is free software; you can distribute it and/or modify it 9 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as 10 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
@@ -19,9 +17,7 @@
19 * 17 *
20 * You should have received a copy of the GNU General Public License along 18 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc., 19 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 20 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 *
24 * ########################################################################
25 */ 21 */
26 22
27#include <linux/compiler.h> 23#include <linux/compiler.h>
diff --git a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c
index a7959005700b..bee94196a569 100644
--- a/arch/mips/math-emu/kernel_linkage.c
+++ b/arch/mips/math-emu/kernel_linkage.c
@@ -13,7 +13,7 @@
13 * 13 *
14 * You should have received a copy of the GNU General Public License along 14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc., 15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 16 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
17 * 17 *
18 * Routines corresponding to Linux kernel FP context 18 * Routines corresponding to Linux kernel FP context
19 * manipulation primitives for the Algorithmics MIPS 19 * manipulation primitives for the Algorithmics MIPS
diff --git a/arch/mips/math-emu/sp_add.c b/arch/mips/math-emu/sp_add.c
index db4d89beada6..a0bc95cea1cc 100644
--- a/arch/mips/math-emu/sp_add.c
+++ b/arch/mips/math-emu/sp_add.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,15 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28 23
29union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y) 24union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
30{ 25{
26 int s;
27
31 COMPXSP; 28 COMPXSP;
32 COMPYSP; 29 COMPYSP;
33 30
@@ -68,9 +65,9 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
68 return x; 65 return x;
69 66
70 67
71 /* Infinity handling 68 /*
72 */ 69 * Infinity handling
73 70 */
74 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): 71 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
75 if (xs == ys) 72 if (xs == ys)
76 return x; 73 return x;
@@ -87,15 +84,14 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
87 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): 84 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
88 return x; 85 return x;
89 86
90 /* Zero handling 87 /*
91 */ 88 * Zero handling
92 89 */
93 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): 90 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
94 if (xs == ys) 91 if (xs == ys)
95 return x; 92 return x;
96 else 93 else
97 return ieee754sp_zero(ieee754_csr.rm == 94 return ieee754sp_zero(ieee754_csr.rm == IEEE754_RD);
98 IEEE754_RD);
99 95
100 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO): 96 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
101 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): 97 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
@@ -108,6 +104,8 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
108 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): 104 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
109 SPDNORMX; 105 SPDNORMX;
110 106
107 /* FALL THROUGH */
108
111 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM): 109 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
112 SPDNORMY; 110 SPDNORMY;
113 break; 111 break;
@@ -122,27 +120,32 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
122 assert(xm & SP_HIDDEN_BIT); 120 assert(xm & SP_HIDDEN_BIT);
123 assert(ym & SP_HIDDEN_BIT); 121 assert(ym & SP_HIDDEN_BIT);
124 122
125 /* provide guard,round and stick bit space */ 123 /*
124 * Provide guard, round and stick bit space.
125 */
126 xm <<= 3; 126 xm <<= 3;
127 ym <<= 3; 127 ym <<= 3;
128 128
129 if (xe > ye) { 129 if (xe > ye) {
130 /* have to shift y fraction right to align 130 /*
131 * Have to shift y fraction right to align.
131 */ 132 */
132 int s = xe - ye; 133 s = xe - ye;
133 SPXSRSYn(s); 134 SPXSRSYn(s);
134 } else if (ye > xe) { 135 } else if (ye > xe) {
135 /* have to shift x fraction right to align 136 /*
137 * Have to shift x fraction right to align.
136 */ 138 */
137 int s = ye - xe; 139 s = ye - xe;
138 SPXSRSXn(s); 140 SPXSRSXn(s);
139 } 141 }
140 assert(xe == ye); 142 assert(xe == ye);
141 assert(xe <= SP_EMAX); 143 assert(xe <= SP_EMAX);
142 144
143 if (xs == ys) { 145 if (xs == ys) {
144 /* generate 28 bit result of adding two 27 bit numbers 146 /*
145 * leaving result in xm,xs,xe 147 * Generate 28 bit result of adding two 27 bit numbers
148 * leaving result in xm, xs and xe.
146 */ 149 */
147 xm = xm + ym; 150 xm = xm + ym;
148 xe = xe; 151 xe = xe;
@@ -162,15 +165,15 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
162 xs = ys; 165 xs = ys;
163 } 166 }
164 if (xm == 0) 167 if (xm == 0)
165 return ieee754sp_zero(ieee754_csr.rm == 168 return ieee754sp_zero(ieee754_csr.rm == IEEE754_RD);
166 IEEE754_RD);
167 169
168 /* normalize in extended single precision */ 170 /*
171 * Normalize in extended single precision
172 */
169 while ((xm >> (SP_FBITS + 3)) == 0) { 173 while ((xm >> (SP_FBITS + 3)) == 0) {
170 xm <<= 1; 174 xm <<= 1;
171 xe--; 175 xe--;
172 } 176 }
173
174 } 177 }
175 178
176 return ieee754sp_format(xs, xe, xm); 179 return ieee754sp_format(xs, xe, xm);
diff --git a/arch/mips/math-emu/sp_cmp.c b/arch/mips/math-emu/sp_cmp.c
index fab49887a1b8..addbccb2f556 100644
--- a/arch/mips/math-emu/sp_cmp.c
+++ b/arch/mips/math-emu/sp_cmp.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,16 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28 23
29int ieee754sp_cmp(union ieee754sp x, union ieee754sp y, int cmp, int sig) 24int ieee754sp_cmp(union ieee754sp x, union ieee754sp y, int cmp, int sig)
30{ 25{
26 int vx;
27 int vy;
28
31 COMPXSP; 29 COMPXSP;
32 COMPYSP; 30 COMPYSP;
33 31
@@ -48,8 +46,8 @@ int ieee754sp_cmp(union ieee754sp x, union ieee754sp y, int cmp, int sig)
48 } 46 }
49 return 0; 47 return 0;
50 } else { 48 } else {
51 int vx = x.bits; 49 vx = x.bits;
52 int vy = y.bits; 50 vy = y.bits;
53 51
54 if (vx < 0) 52 if (vx < 0)
55 vx = -vx ^ SP_SIGN_BIT; 53 vx = -vx ^ SP_SIGN_BIT;
diff --git a/arch/mips/math-emu/sp_div.c b/arch/mips/math-emu/sp_div.c
index 0d847a4fbc13..721f317aa877 100644
--- a/arch/mips/math-emu/sp_div.c
+++ b/arch/mips/math-emu/sp_div.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,17 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28 23
29union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y) 24union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y)
30{ 25{
26 unsigned rm;
27 int re;
28 unsigned bm;
29
31 COMPXSP; 30 COMPXSP;
32 COMPYSP; 31 COMPYSP;
33 32
@@ -68,9 +67,9 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y)
68 return x; 67 return x;
69 68
70 69
71 /* Infinity handling 70 /*
72 */ 71 * Infinity handling
73 72 */
74 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): 73 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
75 ieee754_setcx(IEEE754_INVALID_OPERATION); 74 ieee754_setcx(IEEE754_INVALID_OPERATION);
76 return ieee754sp_indef(); 75 return ieee754sp_indef();
@@ -85,9 +84,9 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y)
85 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): 84 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
86 return ieee754sp_inf(xs ^ ys); 85 return ieee754sp_inf(xs ^ ys);
87 86
88 /* Zero handling 87 /*
89 */ 88 * Zero handling
90 89 */
91 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): 90 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
92 ieee754_setcx(IEEE754_INVALID_OPERATION); 91 ieee754_setcx(IEEE754_INVALID_OPERATION);
93 return ieee754sp_indef(); 92 return ieee754sp_indef();
@@ -122,35 +121,33 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y)
122 xm <<= 3; 121 xm <<= 3;
123 ym <<= 3; 122 ym <<= 3;
124 123
125 { 124 /* now the dirty work */
126 /* now the dirty work */
127
128 unsigned rm = 0;
129 int re = xe - ye;
130 unsigned bm;
131
132 for (bm = SP_MBIT(SP_FBITS + 2); bm; bm >>= 1) {
133 if (xm >= ym) {
134 xm -= ym;
135 rm |= bm;
136 if (xm == 0)
137 break;
138 }
139 xm <<= 1;
140 }
141 rm <<= 1;
142 if (xm)
143 rm |= 1; /* have remainder, set sticky */
144 125
145 assert(rm); 126 rm = 0;
127 re = xe - ye;
146 128
147 /* normalise rm to rounding precision ? 129 for (bm = SP_MBIT(SP_FBITS + 2); bm; bm >>= 1) {
148 */ 130 if (xm >= ym) {
149 while ((rm >> (SP_FBITS + 3)) == 0) { 131 xm -= ym;
150 rm <<= 1; 132 rm |= bm;
151 re--; 133 if (xm == 0)
134 break;
152 } 135 }
136 xm <<= 1;
137 }
138
139 rm <<= 1;
140 if (xm)
141 rm |= 1; /* have remainder, set sticky */
153 142
154 return ieee754sp_format(xs == ys ? 0 : 1, re, rm); 143 assert(rm);
144
145 /* normalise rm to rounding precision ?
146 */
147 while ((rm >> (SP_FBITS + 3)) == 0) {
148 rm <<= 1;
149 re--;
155 } 150 }
151
152 return ieee754sp_format(xs == ys ? 0 : 1, re, rm);
156} 153}
diff --git a/arch/mips/math-emu/sp_fdp.c b/arch/mips/math-emu/sp_fdp.c
index 5c1d8aa6bfd5..90b9ec45e984 100644
--- a/arch/mips/math-emu/sp_fdp.c
+++ b/arch/mips/math-emu/sp_fdp.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,17 +16,16 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28#include "ieee754dp.h" 23#include "ieee754dp.h"
29 24
30union ieee754sp ieee754sp_fdp(union ieee754dp x) 25union ieee754sp ieee754sp_fdp(union ieee754dp x)
31{ 26{
27 u32 rm;
28
32 COMPXDP; 29 COMPXDP;
33 union ieee754sp nan; 30 union ieee754sp nan;
34 31
@@ -42,16 +39,20 @@ union ieee754sp ieee754sp_fdp(union ieee754dp x)
42 case IEEE754_CLASS_SNAN: 39 case IEEE754_CLASS_SNAN:
43 ieee754_setcx(IEEE754_INVALID_OPERATION); 40 ieee754_setcx(IEEE754_INVALID_OPERATION);
44 return ieee754sp_nanxcpt(ieee754sp_indef()); 41 return ieee754sp_nanxcpt(ieee754sp_indef());
42
45 case IEEE754_CLASS_QNAN: 43 case IEEE754_CLASS_QNAN:
46 nan = buildsp(xs, SP_EMAX + 1 + SP_EBIAS, (u32) 44 nan = buildsp(xs, SP_EMAX + 1 + SP_EBIAS, (u32)
47 (xm >> (DP_FBITS - SP_FBITS))); 45 (xm >> (DP_FBITS - SP_FBITS)));
48 if (!ieee754sp_isnan(nan)) 46 if (!ieee754sp_isnan(nan))
49 nan = ieee754sp_indef(); 47 nan = ieee754sp_indef();
50 return ieee754sp_nanxcpt(nan); 48 return ieee754sp_nanxcpt(nan);
49
51 case IEEE754_CLASS_INF: 50 case IEEE754_CLASS_INF:
52 return ieee754sp_inf(xs); 51 return ieee754sp_inf(xs);
52
53 case IEEE754_CLASS_ZERO: 53 case IEEE754_CLASS_ZERO:
54 return ieee754sp_zero(xs); 54 return ieee754sp_zero(xs);
55
55 case IEEE754_CLASS_DNORM: 56 case IEEE754_CLASS_DNORM:
56 /* can't possibly be sp representable */ 57 /* can't possibly be sp representable */
57 ieee754_setcx(IEEE754_UNDERFLOW); 58 ieee754_setcx(IEEE754_UNDERFLOW);
@@ -60,18 +61,16 @@ union ieee754sp ieee754sp_fdp(union ieee754dp x)
60 (ieee754_csr.rm == IEEE754_RD && xs)) 61 (ieee754_csr.rm == IEEE754_RD && xs))
61 return ieee754sp_mind(xs); 62 return ieee754sp_mind(xs);
62 return ieee754sp_zero(xs); 63 return ieee754sp_zero(xs);
64
63 case IEEE754_CLASS_NORM: 65 case IEEE754_CLASS_NORM:
64 break; 66 break;
65 } 67 }
66 68
67 { 69 /*
68 u32 rm; 70 * Convert from DP_FBITS to SP_FBITS+3 with sticky right shift.
71 */
72 rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
73 ((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
69 74
70 /* convert from DP_FBITS to SP_FBITS+3 with sticky right shift 75 return ieee754sp_format(xs, xe, rm);
71 */
72 rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
73 ((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
74
75 return ieee754sp_format(xs, xe, rm);
76 }
77} 76}
diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c
index 8e8687bf955d..d5d8495b2cc4 100644
--- a/arch/mips/math-emu/sp_fint.c
+++ b/arch/mips/math-emu/sp_fint.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,12 +16,9 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28 23
29union ieee754sp ieee754sp_fint(int x) 24union ieee754sp ieee754sp_fint(int x)
diff --git a/arch/mips/math-emu/sp_flong.c b/arch/mips/math-emu/sp_flong.c
index e56e87603feb..012e30ce7589 100644
--- a/arch/mips/math-emu/sp_flong.c
+++ b/arch/mips/math-emu/sp_flong.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,12 +16,9 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28 23
29union ieee754sp ieee754sp_flong(s64 x) 24union ieee754sp ieee754sp_flong(s64 x)
diff --git a/arch/mips/math-emu/sp_mul.c b/arch/mips/math-emu/sp_mul.c
index 0e19d0edd3f9..890c13a2965e 100644
--- a/arch/mips/math-emu/sp_mul.c
+++ b/arch/mips/math-emu/sp_mul.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,25 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28 23
29union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y) 24union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y)
30{ 25{
26 int re;
27 int rs;
28 unsigned rm;
29 unsigned short lxm;
30 unsigned short hxm;
31 unsigned short lym;
32 unsigned short hym;
33 unsigned lrm;
34 unsigned hrm;
35 unsigned t;
36 unsigned at;
37
31 COMPXSP; 38 COMPXSP;
32 COMPYSP; 39 COMPYSP;
33 40
@@ -68,8 +75,9 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y)
68 return x; 75 return x;
69 76
70 77
71 /* Infinity handling */ 78 /*
72 79 * Infinity handling
80 */
73 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO): 81 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
74 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF): 82 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
75 ieee754_setcx(IEEE754_INVALID_OPERATION); 83 ieee754_setcx(IEEE754_INVALID_OPERATION);
@@ -108,63 +116,50 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y)
108 assert(xm & SP_HIDDEN_BIT); 116 assert(xm & SP_HIDDEN_BIT);
109 assert(ym & SP_HIDDEN_BIT); 117 assert(ym & SP_HIDDEN_BIT);
110 118
111 { 119 re = xe + ye;
112 int re = xe + ye; 120 rs = xs ^ ys;
113 int rs = xs ^ ys; 121
114 unsigned rm; 122 /* shunt to top of word */
115 123 xm <<= 32 - (SP_FBITS + 1);
116 /* shunt to top of word */ 124 ym <<= 32 - (SP_FBITS + 1);
117 xm <<= 32 - (SP_FBITS + 1); 125
118 ym <<= 32 - (SP_FBITS + 1); 126 /*
119 127 * Multiply 32 bits xm, ym to give high 32 bits rm with stickness.
120 /* multiply 32bits xm,ym to give high 32bits rm with stickness 128 */
121 */ 129 lxm = xm & 0xffff;
122 { 130 hxm = xm >> 16;
123 unsigned short lxm = xm & 0xffff; 131 lym = ym & 0xffff;
124 unsigned short hxm = xm >> 16; 132 hym = ym >> 16;
125 unsigned short lym = ym & 0xffff; 133
126 unsigned short hym = ym >> 16; 134 lrm = lxm * lym; /* 16 * 16 => 32 */
127 unsigned lrm; 135 hrm = hxm * hym; /* 16 * 16 => 32 */
128 unsigned hrm; 136
129 137 t = lxm * hym; /* 16 * 16 => 32 */
130 lrm = lxm * lym; /* 16 * 16 => 32 */ 138 at = lrm + (t << 16);
131 hrm = hxm * hym; /* 16 * 16 => 32 */ 139 hrm += at < lrm;
132 140 lrm = at;
133 { 141 hrm = hrm + (t >> 16);
134 unsigned t = lxm * hym; /* 16 * 16 => 32 */ 142
135 { 143 t = hxm * lym; /* 16 * 16 => 32 */
136 unsigned at = lrm + (t << 16); 144 at = lrm + (t << 16);
137 hrm += at < lrm; 145 hrm += at < lrm;
138 lrm = at; 146 lrm = at;
139 } 147 hrm = hrm + (t >> 16);
140 hrm = hrm + (t >> 16); 148
141 } 149 rm = hrm | (lrm != 0);
142 150
143 { 151 /*
144 unsigned t = hxm * lym; /* 16 * 16 => 32 */ 152 * Sticky shift down to normal rounding precision.
145 { 153 */
146 unsigned at = lrm + (t << 16); 154 if ((int) rm < 0) {
147 hrm += at < lrm; 155 rm = (rm >> (32 - (SP_FBITS + 1 + 3))) |
148 lrm = at; 156 ((rm << (SP_FBITS + 1 + 3)) != 0);
149 } 157 re++;
150 hrm = hrm + (t >> 16); 158 } else {
151 } 159 rm = (rm >> (32 - (SP_FBITS + 1 + 3 + 1))) |
152 rm = hrm | (lrm != 0); 160 ((rm << (SP_FBITS + 1 + 3 + 1)) != 0);
153 }
154
155 /*
156 * sticky shift down to normal rounding precision
157 */
158 if ((int) rm < 0) {
159 rm = (rm >> (32 - (SP_FBITS + 1 + 3))) |
160 ((rm << (SP_FBITS + 1 + 3)) != 0);
161 re++;
162 } else {
163 rm = (rm >> (32 - (SP_FBITS + 1 + 3 + 1))) |
164 ((rm << (SP_FBITS + 1 + 3 + 1)) != 0);
165 }
166 assert(rm & (SP_HIDDEN_BIT << 3));
167
168 return ieee754sp_format(rs, re, rm);
169 } 161 }
162 assert(rm & (SP_HIDDEN_BIT << 3));
163
164 return ieee754sp_format(rs, re, rm);
170} 165}
diff --git a/arch/mips/math-emu/sp_simple.c b/arch/mips/math-emu/sp_simple.c
index 8f0202d73019..f1ffaa9a17e0 100644
--- a/arch/mips/math-emu/sp_simple.c
+++ b/arch/mips/math-emu/sp_simple.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,12 +16,9 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28 23
29union ieee754sp ieee754sp_neg(union ieee754sp x) 24union ieee754sp ieee754sp_neg(union ieee754sp x)
@@ -51,7 +46,6 @@ union ieee754sp ieee754sp_neg(union ieee754sp x)
51 return x; 46 return x;
52} 47}
53 48
54
55union ieee754sp ieee754sp_abs(union ieee754sp x) 49union ieee754sp ieee754sp_abs(union ieee754sp x)
56{ 50{
57 COMPXSP; 51 COMPXSP;
diff --git a/arch/mips/math-emu/sp_sqrt.c b/arch/mips/math-emu/sp_sqrt.c
index f4da2cc8ebe0..33b3e0001e9e 100644
--- a/arch/mips/math-emu/sp_sqrt.c
+++ b/arch/mips/math-emu/sp_sqrt.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,12 +16,9 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28 23
29union ieee754sp ieee754sp_sqrt(union ieee754sp x) 24union ieee754sp ieee754sp_sqrt(union ieee754sp x)
@@ -43,12 +38,15 @@ union ieee754sp ieee754sp_sqrt(union ieee754sp x)
43 case IEEE754_CLASS_QNAN: 38 case IEEE754_CLASS_QNAN:
44 /* sqrt(Nan) = Nan */ 39 /* sqrt(Nan) = Nan */
45 return ieee754sp_nanxcpt(x); 40 return ieee754sp_nanxcpt(x);
41
46 case IEEE754_CLASS_SNAN: 42 case IEEE754_CLASS_SNAN:
47 ieee754_setcx(IEEE754_INVALID_OPERATION); 43 ieee754_setcx(IEEE754_INVALID_OPERATION);
48 return ieee754sp_nanxcpt(ieee754sp_indef()); 44 return ieee754sp_nanxcpt(ieee754sp_indef());
45
49 case IEEE754_CLASS_ZERO: 46 case IEEE754_CLASS_ZERO:
50 /* sqrt(0) = 0 */ 47 /* sqrt(0) = 0 */
51 return x; 48 return x;
49
52 case IEEE754_CLASS_INF: 50 case IEEE754_CLASS_INF:
53 if (xs) { 51 if (xs) {
54 /* sqrt(-Inf) = Nan */ 52 /* sqrt(-Inf) = Nan */
@@ -57,6 +55,7 @@ union ieee754sp ieee754sp_sqrt(union ieee754sp x)
57 } 55 }
58 /* sqrt(+Inf) = Inf */ 56 /* sqrt(+Inf) = Inf */
59 return x; 57 return x;
58
60 case IEEE754_CLASS_DNORM: 59 case IEEE754_CLASS_DNORM:
61 case IEEE754_CLASS_NORM: 60 case IEEE754_CLASS_NORM:
62 if (xs) { 61 if (xs) {
diff --git a/arch/mips/math-emu/sp_sub.c b/arch/mips/math-emu/sp_sub.c
index 67a1f9e6bbfe..e813f4fee784 100644
--- a/arch/mips/math-emu/sp_sub.c
+++ b/arch/mips/math-emu/sp_sub.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,15 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28 23
29union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y) 24union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
30{ 25{
26 int s;
27
31 COMPXSP; 28 COMPXSP;
32 COMPYSP; 29 COMPYSP;
33 30
@@ -68,9 +65,9 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
68 return x; 65 return x;
69 66
70 67
71 /* Infinity handling 68 /*
72 */ 69 * Infinity handling
73 70 */
74 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): 71 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
75 if (xs != ys) 72 if (xs != ys)
76 return x; 73 return x;
@@ -87,15 +84,14 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
87 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): 84 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
88 return x; 85 return x;
89 86
90 /* Zero handling 87 /*
91 */ 88 * Zero handling
92 89 */
93 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): 90 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
94 if (xs != ys) 91 if (xs != ys)
95 return x; 92 return x;
96 else 93 else
97 return ieee754sp_zero(ieee754_csr.rm == 94 return ieee754sp_zero(ieee754_csr.rm == IEEE754_RD);
98 IEEE754_RD);
99 95
100 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO): 96 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
101 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): 97 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
@@ -133,14 +129,16 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
133 ym <<= 3; 129 ym <<= 3;
134 130
135 if (xe > ye) { 131 if (xe > ye) {
136 /* have to shift y fraction right to align 132 /*
133 * have to shift y fraction right to align
137 */ 134 */
138 int s = xe - ye; 135 s = xe - ye;
139 SPXSRSYn(s); 136 SPXSRSYn(s);
140 } else if (ye > xe) { 137 } else if (ye > xe) {
141 /* have to shift x fraction right to align 138 /*
139 * have to shift x fraction right to align
142 */ 140 */
143 int s = ye - xe; 141 s = ye - xe;
144 SPXSRSXn(s); 142 SPXSRSXn(s);
145 } 143 }
146 assert(xe == ye); 144 assert(xe == ye);
diff --git a/arch/mips/math-emu/sp_tint.c b/arch/mips/math-emu/sp_tint.c
index 53f04dc2991e..e1dee56ebc54 100644
--- a/arch/mips/math-emu/sp_tint.c
+++ b/arch/mips/math-emu/sp_tint.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,16 +16,18 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28 23
29int ieee754sp_tint(union ieee754sp x) 24int ieee754sp_tint(union ieee754sp x)
30{ 25{
26 u32 residue;
27 int round;
28 int sticky;
29 int odd;
30
31 COMPXSP; 31 COMPXSP;
32 32
33 ieee754_clearcx(); 33 ieee754_clearcx();
@@ -41,8 +41,10 @@ int ieee754sp_tint(union ieee754sp x)
41 case IEEE754_CLASS_INF: 41 case IEEE754_CLASS_INF:
42 ieee754_setcx(IEEE754_INVALID_OPERATION); 42 ieee754_setcx(IEEE754_INVALID_OPERATION);
43 return ieee754si_indef(); 43 return ieee754si_indef();
44
44 case IEEE754_CLASS_ZERO: 45 case IEEE754_CLASS_ZERO:
45 return 0; 46 return 0;
47
46 case IEEE754_CLASS_DNORM: 48 case IEEE754_CLASS_DNORM:
47 case IEEE754_CLASS_NORM: 49 case IEEE754_CLASS_NORM:
48 break; 50 break;
@@ -60,11 +62,6 @@ int ieee754sp_tint(union ieee754sp x)
60 if (xe > SP_FBITS) { 62 if (xe > SP_FBITS) {
61 xm <<= xe - SP_FBITS; 63 xm <<= xe - SP_FBITS;
62 } else { 64 } else {
63 u32 residue;
64 int round;
65 int sticky;
66 int odd;
67
68 if (xe < -1) { 65 if (xe < -1) {
69 residue = xm; 66 residue = xm;
70 round = 0; 67 round = 0;
diff --git a/arch/mips/math-emu/sp_tlong.c b/arch/mips/math-emu/sp_tlong.c
index df117923adaa..67eff6ba9e18 100644
--- a/arch/mips/math-emu/sp_tlong.c
+++ b/arch/mips/math-emu/sp_tlong.c
@@ -5,8 +5,6 @@
5 * MIPS floating point support 5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * 7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it 8 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as 9 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
@@ -18,17 +16,19 @@
18 * 16 *
19 * You should have received a copy of the GNU General Public License along 17 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc., 18 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * ########################################################################
24 */ 20 */
25 21
26
27#include "ieee754sp.h" 22#include "ieee754sp.h"
28#include "ieee754dp.h" 23#include "ieee754dp.h"
29 24
30s64 ieee754sp_tlong(union ieee754sp x) 25s64 ieee754sp_tlong(union ieee754sp x)
31{ 26{
27 u32 residue;
28 int round;
29 int sticky;
30 int odd;
31
32 COMPXDP; /* <-- need 64-bit mantissa tmp */ 32 COMPXDP; /* <-- need 64-bit mantissa tmp */
33 33
34 ieee754_clearcx(); 34 ieee754_clearcx();
@@ -42,8 +42,10 @@ s64 ieee754sp_tlong(union ieee754sp x)
42 case IEEE754_CLASS_INF: 42 case IEEE754_CLASS_INF:
43 ieee754_setcx(IEEE754_INVALID_OPERATION); 43 ieee754_setcx(IEEE754_INVALID_OPERATION);
44 return ieee754di_indef(); 44 return ieee754di_indef();
45
45 case IEEE754_CLASS_ZERO: 46 case IEEE754_CLASS_ZERO:
46 return 0; 47 return 0;
48
47 case IEEE754_CLASS_DNORM: 49 case IEEE754_CLASS_DNORM:
48 case IEEE754_CLASS_NORM: 50 case IEEE754_CLASS_NORM:
49 break; 51 break;
@@ -61,11 +63,6 @@ s64 ieee754sp_tlong(union ieee754sp x)
61 if (xe > SP_FBITS) { 63 if (xe > SP_FBITS) {
62 xm <<= xe - SP_FBITS; 64 xm <<= xe - SP_FBITS;
63 } else if (xe < SP_FBITS) { 65 } else if (xe < SP_FBITS) {
64 u32 residue;
65 int round;
66 int sticky;
67 int odd;
68
69 if (xe < -1) { 66 if (xe < -1) {
70 residue = xm; 67 residue = xm;
71 round = 0; 68 round = 0;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 11:18:46 -0500