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-rw-r--r--arch/blackfin/Kconfig18
-rw-r--r--arch/blackfin/kernel/asm-offsets.c3
-rw-r--r--arch/blackfin/kernel/fixed_code.S2
-rw-r--r--arch/blackfin/kernel/module.c37
-rw-r--r--arch/blackfin/kernel/process.c2
-rw-r--r--arch/blackfin/kernel/ptrace.c4
-rw-r--r--arch/blackfin/kernel/signal.c13
-rw-r--r--arch/blackfin/kernel/time-ts.c10
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c104
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c33
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c31
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c31
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c33
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c31
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c34
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c32
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c32
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c31
-rw-r--r--arch/blackfin/mach-common/Makefile5
-rw-r--r--arch/blackfin/mach-common/cpufreq.c26
-rw-r--r--arch/blackfin/mach-common/dpmc.c137
-rw-r--r--arch/blackfin/mach-common/dpmc_modes.S (renamed from arch/blackfin/mach-common/dpmc.S)27
-rw-r--r--arch/blackfin/mach-common/entry.S113
-rw-r--r--drivers/serial/bfin_5xx.c98
-rw-r--r--include/asm-blackfin/dpmc.h10
-rw-r--r--include/asm-blackfin/entry.h5
-rw-r--r--include/asm-blackfin/mach-bf527/bfin_serial_5xx.h5
-rw-r--r--include/asm-blackfin/mach-bf533/bfin_serial_5xx.h5
-rw-r--r--include/asm-blackfin/mach-bf533/defBF532.h2
-rw-r--r--include/asm-blackfin/mach-bf533/irq.h14
-rw-r--r--include/asm-blackfin/mach-bf537/bfin_serial_5xx.h5
-rw-r--r--include/asm-blackfin/mach-bf537/irq.h35
-rw-r--r--include/asm-blackfin/mach-bf548/bfin_serial_5xx.h3
-rw-r--r--include/asm-blackfin/mach-bf548/defBF54x_base.h20
-rw-r--r--include/asm-blackfin/mach-bf561/bfin_serial_5xx.h5
-rw-r--r--include/asm-blackfin/mach-bf561/defBF561.h28
-rw-r--r--include/asm-blackfin/mach-bf561/irq.h13
-rw-r--r--include/asm-blackfin/mach-common/context.S5
-rw-r--r--include/asm-blackfin/time.h4
39 files changed, 817 insertions, 229 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 795d0ac67c21..fd5708523f2e 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -832,6 +832,7 @@ config BANK_0
832config BANK_1 832config BANK_1
833 hex "Bank 1" 833 hex "Bank 1"
834 default 0x7BB0 834 default 0x7BB0
835 default 0x5558 if BF54x
835 836
836config BANK_2 837config BANK_2
837 hex "Bank 2" 838 hex "Bank 2"
@@ -963,21 +964,22 @@ endchoice
963 964
964endmenu 965endmenu
965 966
966if (BF537 || BF533 || BF54x)
967
968menu "CPU Frequency scaling" 967menu "CPU Frequency scaling"
969 968
970source "drivers/cpufreq/Kconfig" 969source "drivers/cpufreq/Kconfig"
971 970
972config CPU_FREQ 971config CPU_VOLTAGE
973 bool 972 bool "CPU Voltage scaling"
973 depends on EXPERIMENTAL
974 depends on CPU_FREQ
974 default n 975 default n
975 help 976 help
976 If you want to enable this option, you should select the 977 Say Y here if you want CPU voltage scaling according to the CPU frequency.
977 DPMC driver from Character Devices. 978 This option violates the PLL BYPASS recommendation in the Blackfin Processor
978endmenu 979 manuals. There is a theoretical risk that during VDDINT transitions
980 the PLL may unlock.
979 981
980endif 982endmenu
981 983
982source "net/Kconfig" 984source "net/Kconfig"
983 985
diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c
index 721f15f3cebf..881afe9082c7 100644
--- a/arch/blackfin/kernel/asm-offsets.c
+++ b/arch/blackfin/kernel/asm-offsets.c
@@ -56,9 +56,6 @@ int main(void)
56 /* offsets into the thread struct */ 56 /* offsets into the thread struct */
57 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); 57 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
58 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp)); 58 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
59 DEFINE(THREAD_SR, offsetof(struct thread_struct, seqstat));
60 DEFINE(PT_SR, offsetof(struct thread_struct, seqstat));
61 DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
62 DEFINE(THREAD_PC, offsetof(struct thread_struct, pc)); 59 DEFINE(THREAD_PC, offsetof(struct thread_struct, pc));
63 DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE); 60 DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
64 61
diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S
index 5ed47228a390..4b03ba025488 100644
--- a/arch/blackfin/kernel/fixed_code.S
+++ b/arch/blackfin/kernel/fixed_code.S
@@ -1,6 +1,6 @@
1/* 1/*
2 * This file contains sequences of code that will be copied to a 2 * This file contains sequences of code that will be copied to a
3 * fixed location, defined in <asm/atomic_seq.h>. The interrupt 3 * fixed location, defined in <asm/fixed_code.h>. The interrupt
4 * handlers ensure that these sequences appear to be atomic when 4 * handlers ensure that these sequences appear to be atomic when
5 * executed from userspace. 5 * executed from userspace.
6 * These are aligned to 16 bytes, so that we have some space to replace 6 * These are aligned to 16 bytes, so that we have some space to replace
diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c
index 8b9fe29d03f4..14a42848f37f 100644
--- a/arch/blackfin/kernel/module.c
+++ b/arch/blackfin/kernel/module.c
@@ -160,6 +160,13 @@ int
160module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs, 160module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
161 char *secstrings, struct module *mod) 161 char *secstrings, struct module *mod)
162{ 162{
163 /*
164 * XXX: sechdrs are vmalloced in kernel/module.c
165 * and would be vfreed just after module is loaded,
166 * so we hack to keep the only information we needed
167 * in mod->arch to correctly free L1 I/D sram later.
168 * NOTE: this breaks the semantic of mod->arch structure.
169 */
163 Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; 170 Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
164 void *dest = NULL; 171 void *dest = NULL;
165 172
@@ -167,8 +174,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
167 if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) || 174 if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
168 ((strcmp(".text", secstrings + s->sh_name) == 0) && 175 ((strcmp(".text", secstrings + s->sh_name) == 0) &&
169 (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) { 176 (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
170 mod->arch.text_l1 = s;
171 dest = l1_inst_sram_alloc(s->sh_size); 177 dest = l1_inst_sram_alloc(s->sh_size);
178 mod->arch.text_l1 = dest;
172 if (dest == NULL) { 179 if (dest == NULL) {
173 printk(KERN_ERR 180 printk(KERN_ERR
174 "module %s: L1 instruction memory allocation failed\n", 181 "module %s: L1 instruction memory allocation failed\n",
@@ -182,8 +189,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
182 if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) || 189 if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
183 ((strcmp(".data", secstrings + s->sh_name) == 0) && 190 ((strcmp(".data", secstrings + s->sh_name) == 0) &&
184 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { 191 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
185 mod->arch.data_a_l1 = s;
186 dest = l1_data_sram_alloc(s->sh_size); 192 dest = l1_data_sram_alloc(s->sh_size);
193 mod->arch.data_a_l1 = dest;
187 if (dest == NULL) { 194 if (dest == NULL) {
188 printk(KERN_ERR 195 printk(KERN_ERR
189 "module %s: L1 data memory allocation failed\n", 196 "module %s: L1 data memory allocation failed\n",
@@ -197,8 +204,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
197 if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 || 204 if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
198 ((strcmp(".bss", secstrings + s->sh_name) == 0) && 205 ((strcmp(".bss", secstrings + s->sh_name) == 0) &&
199 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { 206 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
200 mod->arch.bss_a_l1 = s;
201 dest = l1_data_sram_alloc(s->sh_size); 207 dest = l1_data_sram_alloc(s->sh_size);
208 mod->arch.bss_a_l1 = dest;
202 if (dest == NULL) { 209 if (dest == NULL) {
203 printk(KERN_ERR 210 printk(KERN_ERR
204 "module %s: L1 data memory allocation failed\n", 211 "module %s: L1 data memory allocation failed\n",
@@ -210,8 +217,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
210 s->sh_addr = (unsigned long)dest; 217 s->sh_addr = (unsigned long)dest;
211 } 218 }
212 if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) { 219 if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) {
213 mod->arch.data_b_l1 = s;
214 dest = l1_data_B_sram_alloc(s->sh_size); 220 dest = l1_data_B_sram_alloc(s->sh_size);
221 mod->arch.data_b_l1 = dest;
215 if (dest == NULL) { 222 if (dest == NULL) {
216 printk(KERN_ERR 223 printk(KERN_ERR
217 "module %s: L1 data memory allocation failed\n", 224 "module %s: L1 data memory allocation failed\n",
@@ -223,8 +230,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
223 s->sh_addr = (unsigned long)dest; 230 s->sh_addr = (unsigned long)dest;
224 } 231 }
225 if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) { 232 if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) {
226 mod->arch.bss_b_l1 = s;
227 dest = l1_data_B_sram_alloc(s->sh_size); 233 dest = l1_data_B_sram_alloc(s->sh_size);
234 mod->arch.bss_b_l1 = dest;
228 if (dest == NULL) { 235 if (dest == NULL) {
229 printk(KERN_ERR 236 printk(KERN_ERR
230 "module %s: L1 data memory allocation failed\n", 237 "module %s: L1 data memory allocation failed\n",
@@ -416,14 +423,14 @@ module_finalize(const Elf_Ehdr * hdr,
416 423
417void module_arch_cleanup(struct module *mod) 424void module_arch_cleanup(struct module *mod)
418{ 425{
419 if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr)) 426 if (mod->arch.text_l1)
420 l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr); 427 l1_inst_sram_free((void *)mod->arch.text_l1);
421 if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr)) 428 if (mod->arch.data_a_l1)
422 l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr); 429 l1_data_sram_free((void *)mod->arch.data_a_l1);
423 if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr)) 430 if (mod->arch.bss_a_l1)
424 l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr); 431 l1_data_sram_free((void *)mod->arch.bss_a_l1);
425 if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr)) 432 if (mod->arch.data_b_l1)
426 l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr); 433 l1_data_B_sram_free((void *)mod->arch.data_b_l1);
427 if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr)) 434 if (mod->arch.bss_b_l1)
428 l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr); 435 l1_data_B_sram_free((void *)mod->arch.bss_b_l1);
429} 436}
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index be9fdd00d7cb..53c2cd255441 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -245,7 +245,7 @@ unsigned long get_wchan(struct task_struct *p)
245 245
246void finish_atomic_sections (struct pt_regs *regs) 246void finish_atomic_sections (struct pt_regs *regs)
247{ 247{
248 int __user *up0 = (int __user *)&regs->p0; 248 int __user *up0 = (int __user *)regs->p0;
249 249
250 if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END) 250 if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
251 return; 251 return;
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index b4f062c172c6..f51ab088098e 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -185,8 +185,8 @@ void ptrace_disable(struct task_struct *child)
185{ 185{
186 unsigned long tmp; 186 unsigned long tmp;
187 /* make sure the single step bit is not set. */ 187 /* make sure the single step bit is not set. */
188 tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16); 188 tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS;
189 put_reg(child, PT_SR, tmp); 189 put_reg(child, PT_SYSCFG, tmp);
190} 190}
191 191
192long arch_ptrace(struct task_struct *child, long request, long addr, long data) 192long arch_ptrace(struct task_struct *child, long request, long addr, long data)
diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c
index cb9d883d493c..dbc3bbf846be 100644
--- a/arch/blackfin/kernel/signal.c
+++ b/arch/blackfin/kernel/signal.c
@@ -42,6 +42,9 @@
42 42
43#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 43#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
44 44
45/* Location of the trace bit in SYSCFG. */
46#define TRACE_BITS 0x0001
47
45struct fdpic_func_descriptor { 48struct fdpic_func_descriptor {
46 unsigned long text; 49 unsigned long text;
47 unsigned long GOT; 50 unsigned long GOT;
@@ -225,6 +228,16 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
225 regs->r1 = (unsigned long)(&frame->info); 228 regs->r1 = (unsigned long)(&frame->info);
226 regs->r2 = (unsigned long)(&frame->uc); 229 regs->r2 = (unsigned long)(&frame->uc);
227 230
231 /*
232 * Clear the trace flag when entering the signal handler, but
233 * notify any tracer that was single-stepping it. The tracer
234 * may want to single-step inside the handler too.
235 */
236 if (regs->syscfg & TRACE_BITS) {
237 regs->syscfg &= ~TRACE_BITS;
238 ptrace_notify(SIGTRAP);
239 }
240
228 return 0; 241 return 0;
229 242
230 give_sigsegv: 243 give_sigsegv:
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 4482c47c09e5..e887efc86c29 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -60,7 +60,7 @@ static inline unsigned long long cycles_2_ns(cycle_t cyc)
60 60
61static cycle_t read_cycles(void) 61static cycle_t read_cycles(void)
62{ 62{
63 return get_cycles(); 63 return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
64} 64}
65 65
66unsigned long long sched_clock(void) 66unsigned long long sched_clock(void)
@@ -117,7 +117,7 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
117 break; 117 break;
118 } 118 }
119 case CLOCK_EVT_MODE_ONESHOT: 119 case CLOCK_EVT_MODE_ONESHOT:
120 bfin_write_TSCALE(0); 120 bfin_write_TSCALE(TIME_SCALE - 1);
121 bfin_write_TCOUNT(0); 121 bfin_write_TCOUNT(0);
122 bfin_write_TCNTL(TMPWR | TMREN); 122 bfin_write_TCNTL(TMPWR | TMREN);
123 CSYNC(); 123 CSYNC();
@@ -183,10 +183,14 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
183 183
184static int __init bfin_clockevent_init(void) 184static int __init bfin_clockevent_init(void)
185{ 185{
186 unsigned long timer_clk;
187
188 timer_clk = get_cclk() / TIME_SCALE;
189
186 setup_irq(IRQ_CORETMR, &bfin_timer_irq); 190 setup_irq(IRQ_CORETMR, &bfin_timer_irq);
187 bfin_timer_init(); 191 bfin_timer_init();
188 192
189 clockevent_bfin.mult = div_sc(get_cclk(), NSEC_PER_SEC, clockevent_bfin.shift); 193 clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
190 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin); 194 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
191 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin); 195 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
192 clockevents_register_device(&clockevent_bfin); 196 clockevents_register_device(&clockevent_bfin);
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 583d53811f03..8aa49f804228 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -32,12 +32,14 @@
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h> 33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h> 34#include <linux/mtd/partitions.h>
35#include <linux/mtd/physmap.h>
35#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
36#include <linux/spi/flash.h> 37#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
39#endif 40#endif
40#include <linux/ata_platform.h> 41#include <linux/ata_platform.h>
42#include <linux/i2c.h>
41#include <linux/irq.h> 43#include <linux/irq.h>
42#include <linux/interrupt.h> 44#include <linux/interrupt.h>
43#include <linux/usb/sl811.h> 45#include <linux/usb/sl811.h>
@@ -50,6 +52,7 @@
50#include <asm/reboot.h> 52#include <asm/reboot.h>
51#include <asm/nand.h> 53#include <asm/nand.h>
52#include <asm/portmux.h> 54#include <asm/portmux.h>
55#include <asm/dpmc.h>
53#include <linux/spi/ad7877.h> 56#include <linux/spi/ad7877.h>
54 57
55/* 58/*
@@ -171,6 +174,46 @@ static struct platform_device bf52x_t350mcqb_device = {
171}; 174};
172#endif 175#endif
173 176
177#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
178static struct mtd_partition ezkit_partitions[] = {
179 {
180 .name = "Bootloader",
181 .size = 0x40000,
182 .offset = 0,
183 }, {
184 .name = "Kernel",
185 .size = 0x1C0000,
186 .offset = MTDPART_OFS_APPEND,
187 }, {
188 .name = "RootFS",
189 .size = MTDPART_SIZ_FULL,
190 .offset = MTDPART_OFS_APPEND,
191 }
192};
193
194static struct physmap_flash_data ezkit_flash_data = {
195 .width = 2,
196 .parts = ezkit_partitions,
197 .nr_parts = ARRAY_SIZE(ezkit_partitions),
198};
199
200static struct resource ezkit_flash_resource = {
201 .start = 0x20000000,
202 .end = 0x203fffff,
203 .flags = IORESOURCE_MEM,
204};
205
206static struct platform_device ezkit_flash_device = {
207 .name = "physmap-flash",
208 .id = 0,
209 .dev = {
210 .platform_data = &ezkit_flash_data,
211 },
212 .num_resources = 1,
213 .resource = &ezkit_flash_resource,
214};
215#endif
216
174#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 217#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
175static struct mtd_partition partition_info[] = { 218static struct mtd_partition partition_info[] = {
176 { 219 {
@@ -420,11 +463,7 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
420 .offset = 0, 463 .offset = 0,
421 .mask_flags = MTD_CAP_ROM 464 .mask_flags = MTD_CAP_ROM
422 }, { 465 }, {
423 .name = "kernel", 466 .name = "linux kernel",
424 .size = 0xe0000,
425 .offset = MTDPART_OFS_APPEND,
426 }, {
427 .name = "file system",
428 .size = MTDPART_SIZ_FULL, 467 .size = MTDPART_SIZ_FULL,
429 .offset = MTDPART_OFS_APPEND, 468 .offset = MTDPART_OFS_APPEND,
430 } 469 }
@@ -434,7 +473,7 @@ static struct flash_platform_data bfin_spi_flash_data = {
434 .name = "m25p80", 473 .name = "m25p80",
435 .parts = bfin_spi_flash_partitions, 474 .parts = bfin_spi_flash_partitions,
436 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 475 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
437 .type = "m25p64", 476 .type = "m25p16",
438}; 477};
439 478
440/* SPI flash chip (m25p64) */ 479/* SPI flash chip (m25p64) */
@@ -755,6 +794,24 @@ static struct platform_device i2c_bfin_twi_device = {
755}; 794};
756#endif 795#endif
757 796
797#ifdef CONFIG_I2C_BOARDINFO
798static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
799#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
800 {
801 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
802 .type = "pcf8574_lcd",
803 },
804#endif
805#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
806 {
807 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
808 .type = "pcf8574_keypad",
809 .irq = IRQ_PF8,
810 },
811#endif
812};
813#endif
814
758#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 815#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
759static struct platform_device bfin_sport0_uart_device = { 816static struct platform_device bfin_sport0_uart_device = {
760 .name = "bfin-sport-uart", 817 .name = "bfin-sport-uart",
@@ -839,7 +896,32 @@ static struct platform_device bfin_gpios_device = {
839 .resource = &bfin_gpios_resources, 896 .resource = &bfin_gpios_resources,
840}; 897};
841 898
899static const unsigned int cclk_vlev_datasheet[] =
900{
901 VRPAIR(VLEV_100, 400000000),
902 VRPAIR(VLEV_105, 426000000),
903 VRPAIR(VLEV_110, 500000000),
904 VRPAIR(VLEV_115, 533000000),
905 VRPAIR(VLEV_120, 600000000),
906};
907
908static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
909 .tuple_tab = cclk_vlev_datasheet,
910 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
911 .vr_settling_time = 25 /* us */,
912};
913
914static struct platform_device bfin_dpmc = {
915 .name = "bfin dpmc",
916 .dev = {
917 .platform_data = &bfin_dmpc_vreg_data,
918 },
919};
920
842static struct platform_device *stamp_devices[] __initdata = { 921static struct platform_device *stamp_devices[] __initdata = {
922
923 &bfin_dpmc,
924
843#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 925#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
844 &bf5xx_nand_device, 926 &bf5xx_nand_device,
845#endif 927#endif
@@ -921,12 +1003,22 @@ static struct platform_device *stamp_devices[] __initdata = {
921 &bfin_device_gpiokeys, 1003 &bfin_device_gpiokeys,
922#endif 1004#endif
923 1005
1006#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1007 &ezkit_flash_device,
1008#endif
1009
924 &bfin_gpios_device, 1010 &bfin_gpios_device,
925}; 1011};
926 1012
927static int __init stamp_init(void) 1013static int __init stamp_init(void)
928{ 1014{
929 printk(KERN_INFO "%s(): registering device resources\n", __func__); 1015 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1016
1017#ifdef CONFIG_I2C_BOARDINFO
1018 i2c_register_board_info(0, bfin_i2c_board_info,
1019 ARRAY_SIZE(bfin_i2c_board_info));
1020#endif
1021
930 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 1022 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
931#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 1023#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
932 spi_register_board_info(bfin_spi_board_info, 1024 spi_register_board_info(bfin_spi_board_info,
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index a03149c72681..ed2b0b8f5dc9 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -33,12 +33,15 @@
33#include <linux/mtd/partitions.h> 33#include <linux/mtd/partitions.h>
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
36#include <linux/usb/isp1362.h> 37#include <linux/usb/isp1362.h>
38#endif
37#include <linux/ata_platform.h> 39#include <linux/ata_platform.h>
38#include <linux/irq.h> 40#include <linux/irq.h>
39#include <asm/dma.h> 41#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 43#include <asm/portmux.h>
44#include <asm/dpmc.h>
42 45
43/* 46/*
44 * Name the Board for the /proc/cpuinfo 47 * Name the Board for the /proc/cpuinfo
@@ -341,7 +344,37 @@ static struct platform_device bfin_pata_device = {
341}; 344};
342#endif 345#endif
343 346
347static const unsigned int cclk_vlev_datasheet[] =
348{
349 VRPAIR(VLEV_085, 250000000),
350 VRPAIR(VLEV_090, 376000000),
351 VRPAIR(VLEV_095, 426000000),
352 VRPAIR(VLEV_100, 426000000),
353 VRPAIR(VLEV_105, 476000000),
354 VRPAIR(VLEV_110, 476000000),
355 VRPAIR(VLEV_115, 476000000),
356 VRPAIR(VLEV_120, 600000000),
357 VRPAIR(VLEV_125, 600000000),
358 VRPAIR(VLEV_130, 600000000),
359};
360
361static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
362 .tuple_tab = cclk_vlev_datasheet,
363 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
364 .vr_settling_time = 25 /* us */,
365};
366
367static struct platform_device bfin_dpmc = {
368 .name = "bfin dpmc",
369 .dev = {
370 .platform_data = &bfin_dmpc_vreg_data,
371 },
372};
373
344static struct platform_device *cm_bf533_devices[] __initdata = { 374static struct platform_device *cm_bf533_devices[] __initdata = {
375
376 &bfin_dpmc,
377
345#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 378#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
346 &bfin_uart_device, 379 &bfin_uart_device,
347#endif 380#endif
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 08a7943949ae..9d28415163ea 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -42,6 +42,7 @@
42#include <asm/dma.h> 42#include <asm/dma.h>
43#include <asm/bfin5xx_spi.h> 43#include <asm/bfin5xx_spi.h>
44#include <asm/portmux.h> 44#include <asm/portmux.h>
45#include <asm/dpmc.h>
45 46
46/* 47/*
47 * Name the Board for the /proc/cpuinfo 48 * Name the Board for the /proc/cpuinfo
@@ -350,7 +351,37 @@ static struct platform_device i2c_gpio_device = {
350}; 351};
351#endif 352#endif
352 353
354static const unsigned int cclk_vlev_datasheet[] =
355{
356 VRPAIR(VLEV_085, 250000000),
357 VRPAIR(VLEV_090, 376000000),
358 VRPAIR(VLEV_095, 426000000),
359 VRPAIR(VLEV_100, 426000000),
360 VRPAIR(VLEV_105, 476000000),
361 VRPAIR(VLEV_110, 476000000),
362 VRPAIR(VLEV_115, 476000000),
363 VRPAIR(VLEV_120, 600000000),
364 VRPAIR(VLEV_125, 600000000),
365 VRPAIR(VLEV_130, 600000000),
366};
367
368static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
369 .tuple_tab = cclk_vlev_datasheet,
370 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
371 .vr_settling_time = 25 /* us */,
372};
373
374static struct platform_device bfin_dpmc = {
375 .name = "bfin dpmc",
376 .dev = {
377 .platform_data = &bfin_dmpc_vreg_data,
378 },
379};
380
353static struct platform_device *ezkit_devices[] __initdata = { 381static struct platform_device *ezkit_devices[] __initdata = {
382
383 &bfin_dpmc,
384
354#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 385#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
355 &smc91x_device, 386 &smc91x_device,
356#endif 387#endif
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 024f418ae543..7fd35fb32fd5 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -45,6 +45,7 @@
45#include <asm/bfin5xx_spi.h> 45#include <asm/bfin5xx_spi.h>
46#include <asm/reboot.h> 46#include <asm/reboot.h>
47#include <asm/portmux.h> 47#include <asm/portmux.h>
48#include <asm/dpmc.h>
48 49
49/* 50/*
50 * Name the Board for the /proc/cpuinfo 51 * Name the Board for the /proc/cpuinfo
@@ -516,7 +517,37 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
516}; 517};
517#endif 518#endif
518 519
520static const unsigned int cclk_vlev_datasheet[] =
521{
522 VRPAIR(VLEV_085, 250000000),
523 VRPAIR(VLEV_090, 376000000),
524 VRPAIR(VLEV_095, 426000000),
525 VRPAIR(VLEV_100, 426000000),
526 VRPAIR(VLEV_105, 476000000),
527 VRPAIR(VLEV_110, 476000000),
528 VRPAIR(VLEV_115, 476000000),
529 VRPAIR(VLEV_120, 600000000),
530 VRPAIR(VLEV_125, 600000000),
531 VRPAIR(VLEV_130, 600000000),
532};
533
534static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
535 .tuple_tab = cclk_vlev_datasheet,
536 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
537 .vr_settling_time = 25 /* us */,
538};
539
540static struct platform_device bfin_dpmc = {
541 .name = "bfin dpmc",
542 .dev = {
543 .platform_data = &bfin_dmpc_vreg_data,
544 },
545};
546
519static struct platform_device *stamp_devices[] __initdata = { 547static struct platform_device *stamp_devices[] __initdata = {
548
549 &bfin_dpmc,
550
520#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 551#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
521 &rtc_device, 552 &rtc_device,
522#endif 553#endif
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index d8a23cd9b9ed..73f2142875e2 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -35,12 +35,15 @@
35#include <linux/mtd/partitions.h> 35#include <linux/mtd/partitions.h>
36#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h> 37#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
40#endif
39#include <linux/ata_platform.h> 41#include <linux/ata_platform.h>
40#include <linux/irq.h> 42#include <linux/irq.h>
41#include <asm/dma.h> 43#include <asm/dma.h>
42#include <asm/bfin5xx_spi.h> 44#include <asm/bfin5xx_spi.h>
43#include <asm/portmux.h> 45#include <asm/portmux.h>
46#include <asm/dpmc.h>
44 47
45/* 48/*
46 * Name the Board for the /proc/cpuinfo 49 * Name the Board for the /proc/cpuinfo
@@ -428,7 +431,37 @@ static struct platform_device bfin_pata_device = {
428}; 431};
429#endif 432#endif
430 433
434static const unsigned int cclk_vlev_datasheet[] =
435{
436 VRPAIR(VLEV_085, 250000000),
437 VRPAIR(VLEV_090, 376000000),
438 VRPAIR(VLEV_095, 426000000),
439 VRPAIR(VLEV_100, 426000000),
440 VRPAIR(VLEV_105, 476000000),
441 VRPAIR(VLEV_110, 476000000),
442 VRPAIR(VLEV_115, 476000000),
443 VRPAIR(VLEV_120, 500000000),
444 VRPAIR(VLEV_125, 533000000),
445 VRPAIR(VLEV_130, 600000000),
446};
447
448static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
449 .tuple_tab = cclk_vlev_datasheet,
450 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
451 .vr_settling_time = 25 /* us */,
452};
453
454static struct platform_device bfin_dpmc = {
455 .name = "bfin dpmc",
456 .dev = {
457 .platform_data = &bfin_dmpc_vreg_data,
458 },
459};
460
431static struct platform_device *cm_bf537_devices[] __initdata = { 461static struct platform_device *cm_bf537_devices[] __initdata = {
462
463 &bfin_dpmc,
464
432#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) 465#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
433 &hitachi_fb_device, 466 &hitachi_fb_device,
434#endif 467#endif
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index d3727b7c2d7d..9a756d1f3d73 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -47,6 +47,7 @@
47#include <asm/bfin5xx_spi.h> 47#include <asm/bfin5xx_spi.h>
48#include <asm/reboot.h> 48#include <asm/reboot.h>
49#include <asm/portmux.h> 49#include <asm/portmux.h>
50#include <asm/dpmc.h>
50#include <linux/spi/ad7877.h> 51#include <linux/spi/ad7877.h>
51 52
52/* 53/*
@@ -817,7 +818,37 @@ static struct platform_device bfin_pata_device = {
817}; 818};
818#endif 819#endif
819 820
821static const unsigned int cclk_vlev_datasheet[] =
822{
823 VRPAIR(VLEV_085, 250000000),
824 VRPAIR(VLEV_090, 376000000),
825 VRPAIR(VLEV_095, 426000000),
826 VRPAIR(VLEV_100, 426000000),
827 VRPAIR(VLEV_105, 476000000),
828 VRPAIR(VLEV_110, 476000000),
829 VRPAIR(VLEV_115, 476000000),
830 VRPAIR(VLEV_120, 500000000),
831 VRPAIR(VLEV_125, 533000000),
832 VRPAIR(VLEV_130, 600000000),
833};
834
835static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
836 .tuple_tab = cclk_vlev_datasheet,
837 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
838 .vr_settling_time = 25 /* us */,
839};
840
841static struct platform_device bfin_dpmc = {
842 .name = "bfin dpmc",
843 .dev = {
844 .platform_data = &bfin_dmpc_vreg_data,
845 },
846};
847
820static struct platform_device *stamp_devices[] __initdata = { 848static struct platform_device *stamp_devices[] __initdata = {
849
850 &bfin_dpmc,
851
821#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 852#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
822 &bfin_pcmcia_cf_device, 853 &bfin_pcmcia_cf_device,
823#endif 854#endif
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index e3e8479fffb5..3b74f96d3590 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -36,7 +36,9 @@
36#include <linux/spi/flash.h> 36#include <linux/spi/flash.h>
37#include <linux/irq.h> 37#include <linux/irq.h>
38#include <linux/interrupt.h> 38#include <linux/interrupt.h>
39#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
39#include <linux/usb/musb.h> 40#include <linux/usb/musb.h>
41#endif
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/cplb.h> 43#include <asm/cplb.h>
42#include <asm/dma.h> 44#include <asm/dma.h>
@@ -44,6 +46,7 @@
44#include <asm/nand.h> 46#include <asm/nand.h>
45#include <asm/portmux.h> 47#include <asm/portmux.h>
46#include <asm/mach/bf54x_keys.h> 48#include <asm/mach/bf54x_keys.h>
49#include <asm/dpmc.h>
47#include <linux/input.h> 50#include <linux/input.h>
48#include <linux/spi/ad7877.h> 51#include <linux/spi/ad7877.h>
49 52
@@ -590,7 +593,38 @@ static struct platform_device bfin_device_gpiokeys = {
590}; 593};
591#endif 594#endif
592 595
596static const unsigned int cclk_vlev_datasheet[] =
597{
598/*
599 * Internal VLEV BF54XSBBC1533
600 ****temporarily using these values until data sheet is updated
601 */
602 VRPAIR(VLEV_085, 150000000),
603 VRPAIR(VLEV_090, 250000000),
604 VRPAIR(VLEV_110, 276000000),
605 VRPAIR(VLEV_115, 301000000),
606 VRPAIR(VLEV_120, 525000000),
607 VRPAIR(VLEV_125, 550000000),
608 VRPAIR(VLEV_130, 600000000),
609};
610
611static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
612 .tuple_tab = cclk_vlev_datasheet,
613 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
614 .vr_settling_time = 25 /* us */,
615};
616
617static struct platform_device bfin_dpmc = {
618 .name = "bfin dpmc",
619 .dev = {
620 .platform_data = &bfin_dmpc_vreg_data,
621 },
622};
623
593static struct platform_device *cm_bf548_devices[] __initdata = { 624static struct platform_device *cm_bf548_devices[] __initdata = {
625
626 &bfin_dpmc,
627
594#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 628#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
595 &rtc_device, 629 &rtc_device,
596#endif 630#endif
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index b00f68ac6bc9..d1682bb37509 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -46,6 +46,7 @@
46#include <asm/dma.h> 46#include <asm/dma.h>
47#include <asm/gpio.h> 47#include <asm/gpio.h>
48#include <asm/nand.h> 48#include <asm/nand.h>
49#include <asm/dpmc.h>
49#include <asm/portmux.h> 50#include <asm/portmux.h>
50#include <asm/mach/bf54x_keys.h> 51#include <asm/mach/bf54x_keys.h>
51#include <linux/input.h> 52#include <linux/input.h>
@@ -689,7 +690,38 @@ static struct platform_device bfin_gpios_device = {
689 .resource = &bfin_gpios_resources, 690 .resource = &bfin_gpios_resources,
690}; 691};
691 692
693static const unsigned int cclk_vlev_datasheet[] =
694{
695/*
696 * Internal VLEV BF54XSBBC1533
697 ****temporarily using these values until data sheet is updated
698 */
699 VRPAIR(VLEV_085, 150000000),
700 VRPAIR(VLEV_090, 250000000),
701 VRPAIR(VLEV_110, 276000000),
702 VRPAIR(VLEV_115, 301000000),
703 VRPAIR(VLEV_120, 525000000),
704 VRPAIR(VLEV_125, 550000000),
705 VRPAIR(VLEV_130, 600000000),
706};
707
708static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
709 .tuple_tab = cclk_vlev_datasheet,
710 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
711 .vr_settling_time = 25 /* us */,
712};
713
714static struct platform_device bfin_dpmc = {
715 .name = "bfin dpmc",
716 .dev = {
717 .platform_data = &bfin_dmpc_vreg_data,
718 },
719};
720
692static struct platform_device *ezkit_devices[] __initdata = { 721static struct platform_device *ezkit_devices[] __initdata = {
722
723 &bfin_dpmc,
724
693#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 725#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
694 &rtc_device, 726 &rtc_device,
695#endif 727#endif
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 9fd580952fd8..466ef5929a25 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -33,12 +33,15 @@
33#include <linux/mtd/partitions.h> 33#include <linux/mtd/partitions.h>
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
36#include <linux/usb/isp1362.h> 37#include <linux/usb/isp1362.h>
38#endif
37#include <linux/ata_platform.h> 39#include <linux/ata_platform.h>
38#include <linux/irq.h> 40#include <linux/irq.h>
39#include <asm/dma.h> 41#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 43#include <asm/portmux.h>
44#include <asm/dpmc.h>
42 45
43/* 46/*
44 * Name the Board for the /proc/cpuinfo 47 * Name the Board for the /proc/cpuinfo
@@ -339,8 +342,37 @@ static struct platform_device bfin_pata_device = {
339}; 342};
340#endif 343#endif
341 344
345static const unsigned int cclk_vlev_datasheet[] =
346{
347 VRPAIR(VLEV_085, 250000000),
348 VRPAIR(VLEV_090, 300000000),
349 VRPAIR(VLEV_095, 313000000),
350 VRPAIR(VLEV_100, 350000000),
351 VRPAIR(VLEV_105, 400000000),
352 VRPAIR(VLEV_110, 444000000),
353 VRPAIR(VLEV_115, 450000000),
354 VRPAIR(VLEV_120, 475000000),
355 VRPAIR(VLEV_125, 500000000),
356 VRPAIR(VLEV_130, 600000000),
357};
358
359static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
360 .tuple_tab = cclk_vlev_datasheet,
361 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
362 .vr_settling_time = 25 /* us */,
363};
364
365static struct platform_device bfin_dpmc = {
366 .name = "bfin dpmc",
367 .dev = {
368 .platform_data = &bfin_dmpc_vreg_data,
369 },
370};
371
342static struct platform_device *cm_bf561_devices[] __initdata = { 372static struct platform_device *cm_bf561_devices[] __initdata = {
343 373
374 &bfin_dpmc,
375
344#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) 376#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
345 &hitachi_fb_device, 377 &hitachi_fb_device,
346#endif 378#endif
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 0d74b7d99209..61d8f7648b24 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -39,6 +39,7 @@
39#include <asm/dma.h> 39#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 40#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 41#include <asm/portmux.h>
42#include <asm/dpmc.h>
42 43
43/* 44/*
44 * Name the Board for the /proc/cpuinfo 45 * Name the Board for the /proc/cpuinfo
@@ -443,7 +444,37 @@ static struct platform_device i2c_gpio_device = {
443}; 444};
444#endif 445#endif
445 446
447static const unsigned int cclk_vlev_datasheet[] =
448{
449 VRPAIR(VLEV_085, 250000000),
450 VRPAIR(VLEV_090, 300000000),
451 VRPAIR(VLEV_095, 313000000),
452 VRPAIR(VLEV_100, 350000000),
453 VRPAIR(VLEV_105, 400000000),
454 VRPAIR(VLEV_110, 444000000),
455 VRPAIR(VLEV_115, 450000000),
456 VRPAIR(VLEV_120, 475000000),
457 VRPAIR(VLEV_125, 500000000),
458 VRPAIR(VLEV_130, 600000000),
459};
460
461static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
462 .tuple_tab = cclk_vlev_datasheet,
463 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
464 .vr_settling_time = 25 /* us */,
465};
466
467static struct platform_device bfin_dpmc = {
468 .name = "bfin dpmc",
469 .dev = {
470 .platform_data = &bfin_dmpc_vreg_data,
471 },
472};
473
446static struct platform_device *ezkit_devices[] __initdata = { 474static struct platform_device *ezkit_devices[] __initdata = {
475
476 &bfin_dpmc,
477
447#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 478#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
448 &smc91x_device, 479 &smc91x_device,
449#endif 480#endif
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 393081e9b680..422bfee34adc 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -6,5 +6,6 @@ obj-y := \
6 cache.o cacheinit.o entry.o \ 6 cache.o cacheinit.o entry.o \
7 interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o 7 interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o
8 8
9obj-$(CONFIG_PM) += pm.o dpmc.o 9obj-$(CONFIG_PM) += pm.o dpmc_modes.o
10obj-$(CONFIG_CPU_FREQ) += cpufreq.o 10obj-$(CONFIG_CPU_FREQ) += cpufreq.o
11obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index ed81e00d20e1..75cdad291e88 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -62,6 +62,14 @@ static struct bfin_dpm_state {
62 unsigned int tscale; /* change the divider on the core timer interrupt */ 62 unsigned int tscale; /* change the divider on the core timer interrupt */
63} dpm_state_table[3]; 63} dpm_state_table[3];
64 64
65/*
66 normalized to maximum frequncy offset for CYCLES,
67 used in time-ts cycles clock source, but could be used
68 somewhere also.
69 */
70unsigned long long __bfin_cycles_off;
71unsigned int __bfin_cycles_mod;
72
65/**************************************************************************/ 73/**************************************************************************/
66 74
67static unsigned int bfin_getfreq(unsigned int cpu) 75static unsigned int bfin_getfreq(unsigned int cpu)
@@ -80,6 +88,7 @@ static int bfin_target(struct cpufreq_policy *policy,
80 unsigned int index, plldiv, tscale; 88 unsigned int index, plldiv, tscale;
81 unsigned long flags, cclk_hz; 89 unsigned long flags, cclk_hz;
82 struct cpufreq_freqs freqs; 90 struct cpufreq_freqs freqs;
91 cycles_t cycles;
83 92
84 if (cpufreq_frequency_table_target(policy, bfin_freq_table, 93 if (cpufreq_frequency_table_target(policy, bfin_freq_table,
85 target_freq, relation, &index)) 94 target_freq, relation, &index))
@@ -101,8 +110,14 @@ static int bfin_target(struct cpufreq_policy *policy,
101 bfin_write_PLL_DIV(plldiv); 110 bfin_write_PLL_DIV(plldiv);
102 /* we have to adjust the core timer, because it is using cclk */ 111 /* we have to adjust the core timer, because it is using cclk */
103 bfin_write_TSCALE(tscale); 112 bfin_write_TSCALE(tscale);
113 cycles = get_cycles();
104 SSYNC(); 114 SSYNC();
115 cycles += 10; /* ~10 cycles we loose after get_cycles() */
116 __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index);
117 __bfin_cycles_mod = index;
105 local_irq_restore(flags); 118 local_irq_restore(flags);
119 /* TODO: just test case for cycles clock source, remove later */
120 pr_debug("cpufreq: done\n");
106 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 121 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
107 122
108 return 0; 123 return 0;
@@ -119,22 +134,13 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
119 unsigned long cclk, sclk, csel, min_cclk; 134 unsigned long cclk, sclk, csel, min_cclk;
120 int index; 135 int index;
121 136
122#ifdef CONFIG_CYCLES_CLOCKSOURCE
123/*
124 * Clocksource CYCLES is still CONTINUOUS but not longer MONOTONIC in case we enable
125 * CPU frequency scaling, since CYCLES runs off Core Clock.
126 */
127 printk(KERN_WARNING "CPU frequency scaling not supported: Clocksource not suitable\n"
128 return -ENODEV;
129#endif
130
131 if (policy->cpu != 0) 137 if (policy->cpu != 0)
132 return -EINVAL; 138 return -EINVAL;
133 139
134 cclk = get_cclk(); 140 cclk = get_cclk();
135 sclk = get_sclk(); 141 sclk = get_sclk();
136 142
137#if ANOMALY_05000273 143#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
138 min_cclk = sclk * 2; 144 min_cclk = sclk * 2;
139#else 145#else
140 min_cclk = sclk; 146 min_cclk = sclk;
diff --git a/arch/blackfin/mach-common/dpmc.c b/arch/blackfin/mach-common/dpmc.c
new file mode 100644
index 000000000000..02c7efd1bcf4
--- /dev/null
+++ b/arch/blackfin/mach-common/dpmc.c
@@ -0,0 +1,137 @@
1/*
2 * Copyright 2008 Analog Devices Inc.
3 *
4 * Licensed under the GPL-2 or later.
5 */
6
7#include <linux/cdev.h>
8#include <linux/device.h>
9#include <linux/errno.h>
10#include <linux/fs.h>
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/platform_device.h>
14#include <linux/types.h>
15#include <linux/cpufreq.h>
16
17#include <asm/delay.h>
18#include <asm/dpmc.h>
19
20#define DRIVER_NAME "bfin dpmc"
21
22#define dprintk(msg...) \
23 cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, DRIVER_NAME, msg)
24
25struct bfin_dpmc_platform_data *pdata;
26
27/**
28 * bfin_set_vlev - Update VLEV field in VR_CTL Reg.
29 * Avoid BYPASS sequence
30 */
31static void bfin_set_vlev(unsigned int vlev)
32{
33 unsigned pll_lcnt;
34
35 pll_lcnt = bfin_read_PLL_LOCKCNT();
36
37 bfin_write_PLL_LOCKCNT(1);
38 bfin_write_VR_CTL((bfin_read_VR_CTL() & ~VLEV) | vlev);
39 bfin_write_PLL_LOCKCNT(pll_lcnt);
40}
41
42/**
43 * bfin_get_vlev - Get CPU specific VLEV from platform device data
44 */
45static unsigned int bfin_get_vlev(unsigned int freq)
46{
47 int i;
48
49 if (!pdata)
50 goto err_out;
51
52 freq >>= 16;
53
54 for (i = 0; i < pdata->tabsize; i++)
55 if (freq <= (pdata->tuple_tab[i] & 0xFFFF))
56 return pdata->tuple_tab[i] >> 16;
57
58err_out:
59 printk(KERN_WARNING "DPMC: No suitable CCLK VDDINT voltage pair found\n");
60 return VLEV_120;
61}
62
63#ifdef CONFIG_CPU_FREQ
64static int
65vreg_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
66{
67 struct cpufreq_freqs *freq = data;
68
69 if (val == CPUFREQ_PRECHANGE && freq->old < freq->new) {
70 bfin_set_vlev(bfin_get_vlev(freq->new));
71 udelay(pdata->vr_settling_time); /* Wait until Volatge settled */
72
73 } else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)
74 bfin_set_vlev(bfin_get_vlev(freq->new));
75
76 return 0;
77}
78
79static struct notifier_block vreg_cpufreq_notifier_block = {
80 .notifier_call = vreg_cpufreq_notifier
81};
82#endif /* CONFIG_CPU_FREQ */
83
84/**
85 * bfin_dpmc_probe -
86 *
87 */
88static int __devinit bfin_dpmc_probe(struct platform_device *pdev)
89{
90 if (pdev->dev.platform_data)
91 pdata = pdev->dev.platform_data;
92 else
93 return -EINVAL;
94
95 return cpufreq_register_notifier(&vreg_cpufreq_notifier_block,
96 CPUFREQ_TRANSITION_NOTIFIER);
97}
98
99/**
100 * bfin_dpmc_remove -
101 */
102static int __devexit bfin_dpmc_remove(struct platform_device *pdev)
103{
104 pdata = NULL;
105 return cpufreq_unregister_notifier(&vreg_cpufreq_notifier_block,
106 CPUFREQ_TRANSITION_NOTIFIER);
107}
108
109struct platform_driver bfin_dpmc_device_driver = {
110 .probe = bfin_dpmc_probe,
111 .remove = __devexit_p(bfin_dpmc_remove),
112 .driver = {
113 .name = DRIVER_NAME,
114 }
115};
116
117/**
118 * bfin_dpmc_init - Init driver
119 */
120static int __init bfin_dpmc_init(void)
121{
122 return platform_driver_register(&bfin_dpmc_device_driver);
123}
124module_init(bfin_dpmc_init);
125
126/**
127 * bfin_dpmc_exit - break down driver
128 */
129static void __exit bfin_dpmc_exit(void)
130{
131 platform_driver_unregister(&bfin_dpmc_device_driver);
132}
133module_exit(bfin_dpmc_exit);
134
135MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
136MODULE_DESCRIPTION("cpu power management driver for Blackfin");
137MODULE_LICENSE("GPL");
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc_modes.S
index 9d45aa3265b1..b7981d31c392 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -1,30 +1,7 @@
1/* 1/*
2 * File: arch/blackfin/mach-common/dpmc.S 2 * Copyright 2004-2008 Analog Devices Inc.
3 * Based on:
4 * Author: LG Soft India
5 * 3 *
6 * Created: ? 4 * Licensed under the GPL-2 or later.
7 * Description: Watchdog Timer APIs
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 5 */
29 6
30#include <linux/linkage.h> 7#include <linux/linkage.h>
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index f2fb87e9a46e..038f70e0be65 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -151,26 +151,62 @@ ENTRY(_ex_soft_bp)
151ENDPROC(_ex_soft_bp) 151ENDPROC(_ex_soft_bp)
152 152
153ENTRY(_ex_single_step) 153ENTRY(_ex_single_step)
154 /* If we just returned from an interrupt, the single step event is
155 for the RTI instruction. */
154 r7 = retx; 156 r7 = retx;
155 r6 = reti; 157 r6 = reti;
156 cc = r7 == r6; 158 cc = r7 == r6;
157 if cc jump _bfin_return_from_exception 159 if cc jump _bfin_return_from_exception;
158 r7 = syscfg;
159 bitclr (r7, 0);
160 syscfg = R7;
161 160
161 /* If we were in user mode, do the single step normally. */
162 p5.l = lo(IPEND); 162 p5.l = lo(IPEND);
163 p5.h = hi(IPEND); 163 p5.h = hi(IPEND);
164 r6 = [p5]; 164 r6 = [p5];
165 cc = bittst(r6, 5); 165 r7 = 0xffe0 (z);
166 if !cc jump _ex_trap_c; 166 r7 = r7 & r6;
167 p4.l = lo(EVT5); 167 cc = r7 == 0;
168 p4.h = hi(EVT5); 168 if !cc jump 1f;
169 r6.h = _exception_to_level5; 169
170 r6.l = _exception_to_level5; 170 /* Single stepping only a single instruction, so clear the trace
171 r7 = [p4]; 171 * bit here. */
172 cc = r6 == r7; 172 r7 = syscfg;
173 if !cc jump _ex_trap_c; 173 bitclr (r7, 0);
174 syscfg = R7;
175 jump _ex_trap_c;
176
1771:
178 /*
179 * We were in an interrupt handler. By convention, all of them save
180 * SYSCFG with their first instruction, so by checking whether our
181 * RETX points at the entry point, we can determine whether to allow
182 * a single step, or whether to clear SYSCFG.
183 *
184 * First, find out the interrupt level and the event vector for it.
185 */
186 p5.l = lo(EVT0);
187 p5.h = hi(EVT0);
188 p5 += -4;
1892:
190 r7 = rot r7 by -1;
191 p5 += 4;
192 if !cc jump 2b;
193
194 /* What we actually do is test for the _second_ instruction in the
195 * IRQ handler. That way, if there are insns following the restore
196 * of SYSCFG after leaving the handler, we will not turn off SYSCFG
197 * for them. */
198
199 r7 = [p5];
200 r7 += 2;
201 r6 = RETX;
202 cc = R7 == R6;
203 if !cc jump _bfin_return_from_exception;
204
205 r7 = syscfg;
206 bitclr (r7, 0);
207 syscfg = R7;
208
209 /* Fall through to _bfin_return_from_exception. */
174ENDPROC(_ex_single_step) 210ENDPROC(_ex_single_step)
175 211
176ENTRY(_bfin_return_from_exception) 212ENTRY(_bfin_return_from_exception)
@@ -234,20 +270,26 @@ ENTRY(_ex_trap_c)
234 p5.l = _saved_icplb_fault_addr; 270 p5.l = _saved_icplb_fault_addr;
235 [p5] = r7; 271 [p5] = r7;
236 272
237 p4.l = __retx; 273 p4.l = _excpt_saved_stuff;
238 p4.h = __retx; 274 p4.h = _excpt_saved_stuff;
275
239 r6 = retx; 276 r6 = retx;
240 [p4] = r6; 277 [p4] = r6;
241 p4.l = lo(SAFE_USER_INSTRUCTION); 278
242 p4.h = hi(SAFE_USER_INSTRUCTION); 279 r6 = SYSCFG;
243 retx = p4; 280 [p4 + 4] = r6;
281 BITCLR(r6, 0);
282 SYSCFG = r6;
244 283
245 /* Disable all interrupts, but make sure level 5 is enabled so 284 /* Disable all interrupts, but make sure level 5 is enabled so
246 * we can switch to that level. Save the old mask. */ 285 * we can switch to that level. Save the old mask. */
247 cli r6; 286 cli r6;
248 p4.l = _excpt_saved_imask; 287 [p4 + 8] = r6;
249 p4.h = _excpt_saved_imask; 288
250 [p4] = r6; 289 p4.l = lo(SAFE_USER_INSTRUCTION);
290 p4.h = hi(SAFE_USER_INSTRUCTION);
291 retx = p4;
292
251 r6 = 0x3f; 293 r6 = 0x3f;
252 sti r6; 294 sti r6;
253 295
@@ -295,6 +337,11 @@ ENTRY(_double_fault)
295 */ 337 */
296 SAVE_ALL_SYS 338 SAVE_ALL_SYS
297 339
340 /* The dumping functions expect the return address in the RETI
341 * slot. */
342 r6 = retx;
343 [sp + PT_PC] = r6;
344
298 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ 345 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
299 SP += -12; 346 SP += -12;
300 call _double_fault_c; 347 call _double_fault_c;
@@ -307,16 +354,17 @@ ENDPROC(_double_fault)
307ENTRY(_exception_to_level5) 354ENTRY(_exception_to_level5)
308 SAVE_ALL_SYS 355 SAVE_ALL_SYS
309 356
310 p4.l = __retx; 357 p4.l = _excpt_saved_stuff;
311 p4.h = __retx; 358 p4.h = _excpt_saved_stuff;
312 r6 = [p4]; 359 r6 = [p4];
313 [sp + PT_PC] = r6; 360 [sp + PT_PC] = r6;
314 361
362 r6 = [p4 + 4];
363 [sp + PT_SYSCFG] = r6;
364
315 /* Restore interrupt mask. We haven't pushed RETI, so this 365 /* Restore interrupt mask. We haven't pushed RETI, so this
316 * doesn't enable interrupts until we return from this handler. */ 366 * doesn't enable interrupts until we return from this handler. */
317 p4.l = _excpt_saved_imask; 367 r6 = [p4 + 8];
318 p4.h = _excpt_saved_imask;
319 r6 = [p4];
320 sti r6; 368 sti r6;
321 369
322 /* Restore the hardware error vector. */ 370 /* Restore the hardware error vector. */
@@ -1344,7 +1392,14 @@ ENTRY(_sys_call_table)
1344 .rept NR_syscalls-(.-_sys_call_table)/4 1392 .rept NR_syscalls-(.-_sys_call_table)/4
1345 .long _sys_ni_syscall 1393 .long _sys_ni_syscall
1346 .endr 1394 .endr
1347_excpt_saved_imask: 1395
1396 /*
1397 * Used to save the real RETX, IMASK and SYSCFG when temporarily
1398 * storing safe values across the transition from exception to IRQ5.
1399 */
1400_excpt_saved_stuff:
1401 .long 0;
1402 .long 0;
1348 .long 0; 1403 .long 0;
1349 1404
1350_exception_stack: 1405_exception_stack:
@@ -1358,7 +1413,3 @@ _exception_stack_top:
1358_last_cplb_fault_retx: 1413_last_cplb_fault_retx:
1359 .long 0; 1414 .long 0;
1360#endif 1415#endif
1361 /* Used to save the real RETX when temporarily storing a safe
1362 * return address. */
1363__retx:
1364 .long 0;
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index 8a2f6a1baa74..d6b4ead693b7 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -65,9 +65,6 @@ static void bfin_serial_stop_tx(struct uart_port *port)
65{ 65{
66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67 struct circ_buf *xmit = &uart->port.info->xmit; 67 struct circ_buf *xmit = &uart->port.info->xmit;
68#if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
69 unsigned short ier;
70#endif
71 68
72 while (!(UART_GET_LSR(uart) & TEMT)) 69 while (!(UART_GET_LSR(uart) & TEMT))
73 cpu_relax(); 70 cpu_relax();
@@ -82,12 +79,8 @@ static void bfin_serial_stop_tx(struct uart_port *port)
82#ifdef CONFIG_BF54x 79#ifdef CONFIG_BF54x
83 /* Clear TFI bit */ 80 /* Clear TFI bit */
84 UART_PUT_LSR(uart, TFI); 81 UART_PUT_LSR(uart, TFI);
85 UART_CLEAR_IER(uart, ETBEI);
86#else
87 ier = UART_GET_IER(uart);
88 ier &= ~ETBEI;
89 UART_PUT_IER(uart, ier);
90#endif 82#endif
83 UART_CLEAR_IER(uart, ETBEI);
91#endif 84#endif
92} 85}
93 86
@@ -102,14 +95,7 @@ static void bfin_serial_start_tx(struct uart_port *port)
102 if (uart->tx_done) 95 if (uart->tx_done)
103 bfin_serial_dma_tx_chars(uart); 96 bfin_serial_dma_tx_chars(uart);
104#else 97#else
105#ifdef CONFIG_BF54x
106 UART_SET_IER(uart, ETBEI); 98 UART_SET_IER(uart, ETBEI);
107#else
108 unsigned short ier;
109 ier = UART_GET_IER(uart);
110 ier |= ETBEI;
111 UART_PUT_IER(uart, ier);
112#endif
113 bfin_serial_tx_chars(uart); 99 bfin_serial_tx_chars(uart);
114#endif 100#endif
115} 101}
@@ -120,21 +106,10 @@ static void bfin_serial_start_tx(struct uart_port *port)
120static void bfin_serial_stop_rx(struct uart_port *port) 106static void bfin_serial_stop_rx(struct uart_port *port)
121{ 107{
122 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 108 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
123#ifdef CONFIG_KGDB_UART 109#ifdef CONFIG_KGDB_UART
124 if (uart->port.line != CONFIG_KGDB_UART_PORT) { 110 if (uart->port.line != CONFIG_KGDB_UART_PORT)
125#endif 111#endif
126#ifdef CONFIG_BF54x
127 UART_CLEAR_IER(uart, ERBFI); 112 UART_CLEAR_IER(uart, ERBFI);
128#else
129 unsigned short ier;
130
131 ier = UART_GET_IER(uart);
132 ier &= ~ERBFI;
133 UART_PUT_IER(uart, ier);
134#endif
135#ifdef CONFIG_KGDB_UART
136 }
137#endif
138} 113}
139 114
140/* 115/*
@@ -161,10 +136,7 @@ void kgdb_put_debug_char(int chr)
161 SSYNC(); 136 SSYNC();
162 } 137 }
163 138
164#ifndef CONFIG_BF54x 139 UART_CLEAR_DLAB(uart);
165 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
166 SSYNC();
167#endif
168 UART_PUT_CHAR(uart, (unsigned char)chr); 140 UART_PUT_CHAR(uart, (unsigned char)chr);
169 SSYNC(); 141 SSYNC();
170} 142}
@@ -183,10 +155,7 @@ int kgdb_get_debug_char(void)
183 while(!(UART_GET_LSR(uart) & DR)) { 155 while(!(UART_GET_LSR(uart) & DR)) {
184 SSYNC(); 156 SSYNC();
185 } 157 }
186#ifndef CONFIG_BF54x 158 UART_CLEAR_DLAB(uart);
187 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
188 SSYNC();
189#endif
190 chr = UART_GET_CHAR(uart); 159 chr = UART_GET_CHAR(uart);
191 SSYNC(); 160 SSYNC();
192 161
@@ -208,9 +177,6 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
208 struct tty_struct *tty = uart->port.info->tty; 177 struct tty_struct *tty = uart->port.info->tty;
209 unsigned int status, ch, flg; 178 unsigned int status, ch, flg;
210 static struct timeval anomaly_start = { .tv_sec = 0 }; 179 static struct timeval anomaly_start = { .tv_sec = 0 };
211#ifdef CONFIG_KGDB_UART
212 struct pt_regs *regs = get_irq_regs();
213#endif
214 180
215 status = UART_GET_LSR(uart); 181 status = UART_GET_LSR(uart);
216 UART_CLEAR_LSR(uart); 182 UART_CLEAR_LSR(uart);
@@ -220,6 +186,7 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
220 186
221#ifdef CONFIG_KGDB_UART 187#ifdef CONFIG_KGDB_UART
222 if (uart->port.line == CONFIG_KGDB_UART_PORT) { 188 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
189 struct pt_regs *regs = get_irq_regs();
223 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */ 190 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
224 kgdb_breakkey_pressed(regs); 191 kgdb_breakkey_pressed(regs);
225 return; 192 return;
@@ -391,7 +358,6 @@ static void bfin_serial_do_work(struct work_struct *work)
391static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) 358static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
392{ 359{
393 struct circ_buf *xmit = &uart->port.info->xmit; 360 struct circ_buf *xmit = &uart->port.info->xmit;
394 unsigned short ier;
395 361
396 uart->tx_done = 0; 362 uart->tx_done = 0;
397 363
@@ -429,13 +395,7 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
429 set_dma_x_modify(uart->tx_dma_channel, 1); 395 set_dma_x_modify(uart->tx_dma_channel, 1);
430 enable_dma(uart->tx_dma_channel); 396 enable_dma(uart->tx_dma_channel);
431 397
432#ifdef CONFIG_BF54x
433 UART_SET_IER(uart, ETBEI); 398 UART_SET_IER(uart, ETBEI);
434#else
435 ier = UART_GET_IER(uart);
436 ier |= ETBEI;
437 UART_PUT_IER(uart, ier);
438#endif
439} 399}
440 400
441static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart) 401static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
@@ -513,19 +473,12 @@ static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
513{ 473{
514 struct bfin_serial_port *uart = dev_id; 474 struct bfin_serial_port *uart = dev_id;
515 struct circ_buf *xmit = &uart->port.info->xmit; 475 struct circ_buf *xmit = &uart->port.info->xmit;
516 unsigned short ier;
517 476
518 spin_lock(&uart->port.lock); 477 spin_lock(&uart->port.lock);
519 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) { 478 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
520 disable_dma(uart->tx_dma_channel); 479 disable_dma(uart->tx_dma_channel);
521 clear_dma_irqstat(uart->tx_dma_channel); 480 clear_dma_irqstat(uart->tx_dma_channel);
522#ifdef CONFIG_BF54x
523 UART_CLEAR_IER(uart, ETBEI); 481 UART_CLEAR_IER(uart, ETBEI);
524#else
525 ier = UART_GET_IER(uart);
526 ier &= ~ETBEI;
527 UART_PUT_IER(uart, ier);
528#endif
529 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1); 482 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
530 uart->port.icount.tx += uart->tx_count; 483 uart->port.icount.tx += uart->tx_count;
531 484
@@ -701,7 +654,6 @@ static int bfin_serial_startup(struct uart_port *port)
701# endif 654# endif
702 } 655 }
703 656
704
705 if (request_irq 657 if (request_irq
706 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED, 658 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
707 "BFIN_UART_TX", uart)) { 659 "BFIN_UART_TX", uart)) {
@@ -710,11 +662,7 @@ static int bfin_serial_startup(struct uart_port *port)
710 return -EBUSY; 662 return -EBUSY;
711 } 663 }
712#endif 664#endif
713#ifdef CONFIG_BF54x
714 UART_SET_IER(uart, ERBFI); 665 UART_SET_IER(uart, ERBFI);
715#else
716 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
717#endif
718 return 0; 666 return 0;
719} 667}
720 668
@@ -810,26 +758,15 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
810 UART_PUT_IER(uart, 0); 758 UART_PUT_IER(uart, 0);
811#endif 759#endif
812 760
813#ifndef CONFIG_BF54x
814 /* Set DLAB in LCR to Access DLL and DLH */ 761 /* Set DLAB in LCR to Access DLL and DLH */
815 val = UART_GET_LCR(uart); 762 UART_SET_DLAB(uart);
816 val |= DLAB;
817 UART_PUT_LCR(uart, val);
818 SSYNC();
819#endif
820 763
821 UART_PUT_DLL(uart, quot & 0xFF); 764 UART_PUT_DLL(uart, quot & 0xFF);
822 SSYNC();
823 UART_PUT_DLH(uart, (quot >> 8) & 0xFF); 765 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
824 SSYNC(); 766 SSYNC();
825 767
826#ifndef CONFIG_BF54x
827 /* Clear DLAB in LCR to Access THR RBR IER */ 768 /* Clear DLAB in LCR to Access THR RBR IER */
828 val = UART_GET_LCR(uart); 769 UART_CLEAR_DLAB(uart);
829 val &= ~DLAB;
830 UART_PUT_LCR(uart, val);
831 SSYNC();
832#endif
833 770
834 UART_PUT_LCR(uart, lcr); 771 UART_PUT_LCR(uart, lcr);
835 772
@@ -992,8 +929,7 @@ bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
992 status = UART_GET_IER(uart) & (ERBFI | ETBEI); 929 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
993 if (status == (ERBFI | ETBEI)) { 930 if (status == (ERBFI | ETBEI)) {
994 /* ok, the port was enabled */ 931 /* ok, the port was enabled */
995 unsigned short lcr, val; 932 u16 lcr, dlh, dll;
996 unsigned short dlh, dll;
997 933
998 lcr = UART_GET_LCR(uart); 934 lcr = UART_GET_LCR(uart);
999 935
@@ -1010,22 +946,14 @@ bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1010 case 2: *bits = 7; break; 946 case 2: *bits = 7; break;
1011 case 3: *bits = 8; break; 947 case 3: *bits = 8; break;
1012 } 948 }
1013#ifndef CONFIG_BF54x
1014 /* Set DLAB in LCR to Access DLL and DLH */ 949 /* Set DLAB in LCR to Access DLL and DLH */
1015 val = UART_GET_LCR(uart); 950 UART_SET_DLAB(uart);
1016 val |= DLAB;
1017 UART_PUT_LCR(uart, val);
1018#endif
1019 951
1020 dll = UART_GET_DLL(uart); 952 dll = UART_GET_DLL(uart);
1021 dlh = UART_GET_DLH(uart); 953 dlh = UART_GET_DLH(uart);
1022 954
1023#ifndef CONFIG_BF54x
1024 /* Clear DLAB in LCR to Access THR RBR IER */ 955 /* Clear DLAB in LCR to Access THR RBR IER */
1025 val = UART_GET_LCR(uart); 956 UART_CLEAR_DLAB(uart);
1026 val &= ~DLAB;
1027 UART_PUT_LCR(uart, val);
1028#endif
1029 957
1030 *baud = get_sclk() / (16*(dll | dlh << 8)); 958 *baud = get_sclk() / (16*(dll | dlh << 8));
1031 } 959 }
@@ -1290,11 +1218,7 @@ static int __init bfin_serial_init(void)
1290 request_irq(uart->port.irq, bfin_serial_rx_int, 1218 request_irq(uart->port.irq, bfin_serial_rx_int,
1291 IRQF_DISABLED, "BFIN_UART_RX", uart); 1219 IRQF_DISABLED, "BFIN_UART_RX", uart);
1292 pr_info("Request irq for kgdb uart port\n"); 1220 pr_info("Request irq for kgdb uart port\n");
1293#ifdef CONFIG_BF54x
1294 UART_SET_IER(uart, ERBFI); 1221 UART_SET_IER(uart, ERBFI);
1295#else
1296 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1297#endif
1298 SSYNC(); 1222 SSYNC();
1299 t.c_cflag = CS8|B57600; 1223 t.c_cflag = CS8|B57600;
1300 t.c_iflag = 0; 1224 t.c_iflag = 0;
diff --git a/include/asm-blackfin/dpmc.h b/include/asm-blackfin/dpmc.h
index 686cf83a5269..7f34cd384f12 100644
--- a/include/asm-blackfin/dpmc.h
+++ b/include/asm-blackfin/dpmc.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * include/asm-blackfin/dpmc.h - Miscellaneous IOCTL commands for Dynamic Power 2 * include/asm-blackfin/dpmc.h - Miscellaneous IOCTL commands for Dynamic Power
3 * Management Controller Driver. 3 * Management Controller Driver.
4 * Copyright (C) 2004 Analog Device Inc. 4 * Copyright (C) 2004-2008 Analog Device Inc.
5 * 5 *
6 */ 6 */
7#ifndef _BLACKFIN_DPMC_H_ 7#ifndef _BLACKFIN_DPMC_H_
@@ -65,6 +65,14 @@ void disable_wdog_timer(void);
65extern unsigned long get_cclk(void); 65extern unsigned long get_cclk(void);
66extern unsigned long get_sclk(void); 66extern unsigned long get_sclk(void);
67 67
68struct bfin_dpmc_platform_data {
69 const unsigned int *tuple_tab;
70 unsigned short tabsize;
71 unsigned short vr_settling_time; /* in us */
72};
73
74#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))
75
68#endif /* __KERNEL__ */ 76#endif /* __KERNEL__ */
69 77
70#endif /*_BLACKFIN_DPMC_H_*/ 78#endif /*_BLACKFIN_DPMC_H_*/
diff --git a/include/asm-blackfin/entry.h b/include/asm-blackfin/entry.h
index 562c6d3a3232..c4f721e0d00d 100644
--- a/include/asm-blackfin/entry.h
+++ b/include/asm-blackfin/entry.h
@@ -17,6 +17,11 @@
17#define PF_DTRACE_OFF 1 17#define PF_DTRACE_OFF 1
18#define PF_DTRACE_BIT 5 18#define PF_DTRACE_BIT 5
19 19
20/*
21 * NOTE! The single-stepping code assumes that all interrupt handlers
22 * start by saving SYSCFG on the stack with their first instruction.
23 */
24
20/* This one is used for exceptions, emulation, and NMI. It doesn't push 25/* This one is used for exceptions, emulation, and NMI. It doesn't push
21 RETI and doesn't do cli. */ 26 RETI and doesn't do cli. */
22#define SAVE_ALL_SYS save_context_no_interrupts 27#define SAVE_ALL_SYS save_context_no_interrupts
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
index f0ab2736a680..26e3c8076b4e 100644
--- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
44#define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v) 44#define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v)
45#define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v) 45#define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v)
46#define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v) 46#define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v)
47#define UART_SET_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
48#define UART_CLEAR_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
47#define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v) 49#define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v)
48#define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v) 50#define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
49#define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v) 51#define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v)
50 52
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55
51#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 56#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
52# define CONFIG_SERIAL_BFIN_CTSRTS 57# define CONFIG_SERIAL_BFIN_CTSRTS
53 58
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
index fbe88dee3e2d..d016603b6615 100644
--- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) 46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
47#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
48#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
47#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 49#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
48#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 50#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
49#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 51#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
50 52
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55
51#ifdef CONFIG_BFIN_UART0_CTSRTS 56#ifdef CONFIG_BFIN_UART0_CTSRTS
52# define CONFIG_SERIAL_BFIN_CTSRTS 57# define CONFIG_SERIAL_BFIN_CTSRTS
53# ifndef CONFIG_UART0_CTS_PIN 58# ifndef CONFIG_UART0_CTS_PIN
diff --git a/include/asm-blackfin/mach-bf533/defBF532.h b/include/asm-blackfin/mach-bf533/defBF532.h
index 17e1548cec08..0ab4dd7494cf 100644
--- a/include/asm-blackfin/mach-bf533/defBF532.h
+++ b/include/asm-blackfin/mach-bf533/defBF532.h
@@ -468,6 +468,8 @@
468#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */ 468#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */
469#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */ 469#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
470#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */ 470#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
471#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */
472#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */
471 473
472#define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */ 474#define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */
473#define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */ 475#define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */
diff --git a/include/asm-blackfin/mach-bf533/irq.h b/include/asm-blackfin/mach-bf533/irq.h
index 832e6f6122da..5aa38e5da6b7 100644
--- a/include/asm-blackfin/mach-bf533/irq.h
+++ b/include/asm-blackfin/mach-bf533/irq.h
@@ -66,12 +66,13 @@ Core Emulation **
66 DMA8/9 Interrupt IVG13 28 66 DMA8/9 Interrupt IVG13 28
67 DMA10/11 Interrupt IVG13 29 67 DMA10/11 Interrupt IVG13 29
68 Watchdog Timer IVG13 30 68 Watchdog Timer IVG13 30
69 Software Interrupt 1 IVG14 31 69
70 Software Interrupt 2 -- 70 Softirq IVG14 31
71 System Call --
71 (lowest priority) IVG15 32 * 72 (lowest priority) IVG15 32 *
72 */ 73 */
73#define SYS_IRQS 32 74#define SYS_IRQS 31
74#define NR_PERI_INTS 24 75#define NR_PERI_INTS 24
75 76
76/* The ABSTRACT IRQ definitions */ 77/* The ABSTRACT IRQ definitions */
77/** the first seven of the following are fixed, the rest you change if you need to **/ 78/** the first seven of the following are fixed, the rest you change if you need to **/
@@ -96,7 +97,7 @@ Core Emulation **
96#define IRQ_SPORT0_TX 17 /*DMA2 Interrupt (SPORT0 TX) */ 97#define IRQ_SPORT0_TX 17 /*DMA2 Interrupt (SPORT0 TX) */
97#define IRQ_SPORT1_RX 18 /*DMA3 Interrupt (SPORT1 RX) */ 98#define IRQ_SPORT1_RX 18 /*DMA3 Interrupt (SPORT1 RX) */
98#define IRQ_SPORT1_TX 19 /*DMA4 Interrupt (SPORT1 TX) */ 99#define IRQ_SPORT1_TX 19 /*DMA4 Interrupt (SPORT1 TX) */
99#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */ 100#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */
100#define IRQ_UART_RX 21 /*DMA6 Interrupt (UART RX) */ 101#define IRQ_UART_RX 21 /*DMA6 Interrupt (UART RX) */
101#define IRQ_UART_TX 22 /*DMA7 Interrupt (UART TX) */ 102#define IRQ_UART_TX 22 /*DMA7 Interrupt (UART TX) */
102#define IRQ_TMR0 23 /*Timer 0 */ 103#define IRQ_TMR0 23 /*Timer 0 */
@@ -108,9 +109,6 @@ Core Emulation **
108#define IRQ_MEM_DMA1 29 /*DMA10/11 Interrupt (Memory DMA Stream 1) */ 109#define IRQ_MEM_DMA1 29 /*DMA10/11 Interrupt (Memory DMA Stream 1) */
109#define IRQ_WATCH 30 /*Watch Dog Timer */ 110#define IRQ_WATCH 30 /*Watch Dog Timer */
110 111
111#define IRQ_SW_INT1 31 /*Software Int 1 */
112#define IRQ_SW_INT2 32 /*Software Int 2 (reserved for SYSCALL) */
113
114#define IRQ_PF0 33 112#define IRQ_PF0 33
115#define IRQ_PF1 34 113#define IRQ_PF1 34
116#define IRQ_PF2 35 114#define IRQ_PF2 35
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
index fd100a415b98..f79d1a0e9129 100644
--- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) 46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
47#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
48#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
47#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 49#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
48#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 50#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
49#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 51#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
50 52
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55
51#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 56#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
52# define CONFIG_SERIAL_BFIN_CTSRTS 57# define CONFIG_SERIAL_BFIN_CTSRTS
53 58
diff --git a/include/asm-blackfin/mach-bf537/irq.h b/include/asm-blackfin/mach-bf537/irq.h
index be6f2ff77f31..2e68a8a1e730 100644
--- a/include/asm-blackfin/mach-bf537/irq.h
+++ b/include/asm-blackfin/mach-bf537/irq.h
@@ -34,24 +34,23 @@
34 34
35/* 35/*
36 * Interrupt source definitions 36 * Interrupt source definitions
37 Event Source Core Event Name 37 * Event Source Core Event Name
38Core Emulation ** 38 * Core Emulation **
39 Events (highest priority) EMU 0 39 * Events (highest priority) EMU 0
40 Reset RST 1 40 * Reset RST 1
41 NMI NMI 2 41 * NMI NMI 2
42 Exception EVX 3 42 * Exception EVX 3
43 Reserved -- 4 43 * Reserved -- 4
44 Hardware Error IVHW 5 44 * Hardware Error IVHW 5
45 Core Timer IVTMR 6 * 45 * Core Timer IVTMR 6
46 46 * .....
47..... 47 *
48 48 * Softirq IVG14
49 Software Interrupt 1 IVG14 31 49 * System Call --
50 Software Interrupt 2 -- 50 * (lowest priority) IVG15
51 (lowest priority) IVG15 32 *
52 */ 51 */
53 52
54#define SYS_IRQS 41 53#define SYS_IRQS 39
55#define NR_PERI_INTS 32 54#define NR_PERI_INTS 32
56 55
57/* The ABSTRACT IRQ definitions */ 56/* The ABSTRACT IRQ definitions */
@@ -95,10 +94,8 @@ Core Emulation **
95#define IRQ_PORTG_INTB 35 /* PF Port G (PF15:0) Interrupt B */ 94#define IRQ_PORTG_INTB 35 /* PF Port G (PF15:0) Interrupt B */
96#define IRQ_MEM_DMA0 36 /*(Memory DMA Stream 0) */ 95#define IRQ_MEM_DMA0 36 /*(Memory DMA Stream 0) */
97#define IRQ_MEM_DMA1 37 /*(Memory DMA Stream 1) */ 96#define IRQ_MEM_DMA1 37 /*(Memory DMA Stream 1) */
98#define IRQ_PROG_INTB 38 /* PF Ports F (PF15:0) Interrupt B */ 97#define IRQ_PROG_INTB 38 /* PF Ports F (PF15:0) Interrupt B */
99#define IRQ_WATCH 38 /*Watch Dog Timer */ 98#define IRQ_WATCH 38 /*Watch Dog Timer */
100#define IRQ_SW_INT1 40 /*Software Int 1 */
101#define IRQ_SW_INT2 41 /*Software Int 2 (reserved for SYSCALL) */
102 99
103#define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */ 100#define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */
104#define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */ 101#define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 6547027cd3e6..5eb46a77d919 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -54,6 +54,9 @@
54#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 54#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
55#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v) 55#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
56 56
57#define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */
58#define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */
59
57#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 60#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
58# define CONFIG_SERIAL_BFIN_CTSRTS 61# define CONFIG_SERIAL_BFIN_CTSRTS
59 62
diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h
index 08f90c21fe8a..e022e896cb18 100644
--- a/include/asm-blackfin/mach-bf548/defBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h
@@ -2329,6 +2329,26 @@
2329#define KPADWE 0x1000 /* Keypad Wake-Up Enable */ 2329#define KPADWE 0x1000 /* Keypad Wake-Up Enable */
2330#define ROTWE 0x2000 /* Rotary Wake-Up Enable */ 2330#define ROTWE 0x2000 /* Rotary Wake-Up Enable */
2331 2331
2332#define FREQ_333 0x0001 /* Switching Frequency Is 333 kHz */
2333#define FREQ_667 0x0002 /* Switching Frequency Is 667 kHz */
2334#define FREQ_1000 0x0003 /* Switching Frequency Is 1 MHz */
2335
2336#define GAIN_5 0x0000 /* GAIN = 5*/
2337#define GAIN_10 0x0004 /* GAIN = 1*/
2338#define GAIN_20 0x0008 /* GAIN = 2*/
2339#define GAIN_50 0x000C /* GAIN = 5*/
2340
2341#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */
2342#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */
2343#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */
2344#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */
2345#define VLEV_105 0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */
2346#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */
2347#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
2348#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
2349#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */
2350#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */
2351
2332/* Bit masks for NFC_CTL */ 2352/* Bit masks for NFC_CTL */
2333 2353
2334#define WR_DLY 0xf /* Write Strobe Delay */ 2354#define WR_DLY 0xf /* Write Strobe Delay */
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
index 8a4e66d1db37..7a9628769296 100644
--- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) 46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
47#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
48#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
47#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 49#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
48#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 50#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
49#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 51#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
50 52
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55
51#ifdef CONFIG_BFIN_UART0_CTSRTS 56#ifdef CONFIG_BFIN_UART0_CTSRTS
52# define CONFIG_SERIAL_BFIN_CTSRTS 57# define CONFIG_SERIAL_BFIN_CTSRTS
53# ifndef CONFIG_UART0_CTS_PIN 58# ifndef CONFIG_UART0_CTS_PIN
diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h
index 366c9b9a0cb7..1ab50e906fe7 100644
--- a/include/asm-blackfin/mach-bf561/defBF561.h
+++ b/include/asm-blackfin/mach-bf561/defBF561.h
@@ -868,6 +868,34 @@
868#define CHIPID_FAMILY 0x0FFFF000 868#define CHIPID_FAMILY 0x0FFFF000
869#define CHIPID_MANUFACTURE 0x00000FFE 869#define CHIPID_MANUFACTURE 0x00000FFE
870 870
871/* VR_CTL Masks */
872#define FREQ 0x0003 /* Switching Oscillator Frequency For Regulator */
873#define HIBERNATE 0x0000 /* Powerdown/Bypass On-Board Regulation */
874#define FREQ_333 0x0001 /* Switching Frequency Is 333 kHz */
875#define FREQ_667 0x0002 /* Switching Frequency Is 667 kHz */
876#define FREQ_1000 0x0003 /* Switching Frequency Is 1 MHz */
877
878#define GAIN 0x000C /* Voltage Level Gain */
879#define GAIN_5 0x0000 /* GAIN = 5*/
880#define GAIN_10 0x0004 /* GAIN = 1*/
881#define GAIN_20 0x0008 /* GAIN = 2*/
882#define GAIN_50 0x000C /* GAIN = 5*/
883
884#define VLEV 0x00F0 /* Internal Voltage Level */
885#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */
886#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */
887#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */
888#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */
889#define VLEV_105 0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */
890#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */
891#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
892#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
893#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */
894#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */
895
896#define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */
897#define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */
898
871/* PLL_DIV Masks */ 899/* PLL_DIV Masks */
872#define SCLK_DIV(x) (x) /* SCLK = VCO / x */ 900#define SCLK_DIV(x) (x) /* SCLK = VCO / x */
873 901
diff --git a/include/asm-blackfin/mach-bf561/irq.h b/include/asm-blackfin/mach-bf561/irq.h
index 83f0383957d2..6698389c5564 100644
--- a/include/asm-blackfin/mach-bf561/irq.h
+++ b/include/asm-blackfin/mach-bf561/irq.h
@@ -118,12 +118,13 @@
118 Supplemental interrupt 0 IVG7 69 118 Supplemental interrupt 0 IVG7 69
119 supplemental interrupt 1 IVG7 70 119 supplemental interrupt 1 IVG7 70
120 120
121 Software Interrupt 1 IVG14 71 121 Softirq IVG14
122 Software Interrupt 2 IVG15 72 * 122 System Call --
123 (lowest priority) 123 (lowest priority) IVG15
124
124 **********************************************************************/ 125 **********************************************************************/
125 126
126#define SYS_IRQS 72 127#define SYS_IRQS 71
127#define NR_PERI_INTS 64 128#define NR_PERI_INTS 64
128 129
129/* 130/*
@@ -237,9 +238,7 @@
237#define IRQ_RESERVED_2 (IVG_BASE + 61) /* Reserved interrupt */ 238#define IRQ_RESERVED_2 (IVG_BASE + 61) /* Reserved interrupt */
238#define IRQ_SUPPLE_0 (IVG_BASE + 62) /* Supplemental interrupt 0 */ 239#define IRQ_SUPPLE_0 (IVG_BASE + 62) /* Supplemental interrupt 0 */
239#define IRQ_SUPPLE_1 (IVG_BASE + 63) /* supplemental interrupt 1 */ 240#define IRQ_SUPPLE_1 (IVG_BASE + 63) /* supplemental interrupt 1 */
240#define IRQ_SW_INT1 71 /* Software Interrupt 1 */ 241
241#define IRQ_SW_INT2 72 /* Software Interrupt 2 */
242 /* reserved for SYSCALL */
243#define IRQ_PF0 73 242#define IRQ_PF0 73
244#define IRQ_PF1 74 243#define IRQ_PF1 74
245#define IRQ_PF2 75 244#define IRQ_PF2 75
diff --git a/include/asm-blackfin/mach-common/context.S b/include/asm-blackfin/mach-common/context.S
index fd0ebe1862b8..c0e630edfb9a 100644
--- a/include/asm-blackfin/mach-common/context.S
+++ b/include/asm-blackfin/mach-common/context.S
@@ -28,6 +28,11 @@
28 */ 28 */
29 29
30/* 30/*
31 * NOTE! The single-stepping code assumes that all interrupt handlers
32 * start by saving SYSCFG on the stack with their first instruction.
33 */
34
35/*
31 * Code to save processor context. 36 * Code to save processor context.
32 * We even save the register which are preserved by a function call 37 * We even save the register which are preserved by a function call
33 * - r4, r5, r6, r7, p3, p4, p5 38 * - r4, r5, r6, r7, p3, p4, p5
diff --git a/include/asm-blackfin/time.h b/include/asm-blackfin/time.h
index 6e5859b6ea32..ddc43ce38533 100644
--- a/include/asm-blackfin/time.h
+++ b/include/asm-blackfin/time.h
@@ -24,6 +24,8 @@
24 24
25#ifndef CONFIG_CPU_FREQ 25#ifndef CONFIG_CPU_FREQ
26#define TIME_SCALE 1 26#define TIME_SCALE 1
27#define __bfin_cycles_off (0)
28#define __bfin_cycles_mod (0)
27#else 29#else
28/* 30/*
29 * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 . 31 * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 .
@@ -31,6 +33,8 @@
31 * adjust the Core Timer Presale Register. This way we don't lose time. 33 * adjust the Core Timer Presale Register. This way we don't lose time.
32 */ 34 */
33#define TIME_SCALE 4 35#define TIME_SCALE 4
36extern unsigned long long __bfin_cycles_off;
37extern unsigned int __bfin_cycles_mod;
34#endif 38#endif
35 39
36#endif 40#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-20 07:45:18 -0500