81 files changed, 2950 insertions, 833 deletions
diff --git a/arch/i386/kernel/ioport.c b/arch/i386/kernel/ioport.c
index 79026f026b85..498e8bc197d5 100644
--- a/arch/i386/kernel/ioport.c
+++ b/arch/i386/kernel/ioport.c
@@ -79,6 +79,7 @@ asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int turn_on)
                memset(bitmap, 0xff, IO_BITMAP_BYTES);
                t->io_bitmap_ptr = bitmap;
+                set_thread_flag(TIF_IO_BITMAP);
        }
        /*
diff --git a/arch/i386/kernel/process.c b/arch/i386/kernel/process.c
index 94e2c87edeaa..923bb292f47f 100644
--- a/arch/i386/kernel/process.c
+++ b/arch/i386/kernel/process.c
@@ -359,16 +359,16 @@ EXPORT_SYMBOL(kernel_thread);
 */
 void exit_thread(void)
 {
-        struct task_struct *tsk = current;
-        struct thread_struct *t = &tsk->thread;
        /* The process may have allocated an io port bitmap... nuke it. */
-        if (unlikely(NULL != t->io_bitmap_ptr)) {
+        if (unlikely(test_thread_flag(TIF_IO_BITMAP))) {
+                struct task_struct *tsk = current;
+                struct thread_struct *t = &tsk->thread;
                int cpu = get_cpu();
                struct tss_struct *tss = &per_cpu(init_tss, cpu);
                kfree(t->io_bitmap_ptr);
                t->io_bitmap_ptr = NULL;
+                clear_thread_flag(TIF_IO_BITMAP);
                /*
                 * Careful, clear this in the TSS too:
                 */
@@ -387,6 +387,7 @@ void flush_thread(void)
        memset(tsk->thread.debugreg, 0, sizeof(unsigned long)*8);
        memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));        
+        clear_tsk_thread_flag(tsk, TIF_DEBUG);
        /*
         * Forget coprocessor state..
         */
@@ -431,7 +432,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long esp,
        savesegment(gs,p->thread.gs);
        tsk = current;
-        if (unlikely(NULL != tsk->thread.io_bitmap_ptr)) {
+        if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) {
                p->thread.io_bitmap_ptr = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL);
                if (!p->thread.io_bitmap_ptr) {
                        p->thread.io_bitmap_max = 0;
@@ -439,6 +440,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long esp,
                }
                memcpy(p->thread.io_bitmap_ptr, tsk->thread.io_bitmap_ptr,
                        IO_BITMAP_BYTES);
+                set_tsk_thread_flag(p, TIF_IO_BITMAP);
        }
        /*
@@ -533,10 +535,24 @@ int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
        return 1;
 }
-static inline void
+static noinline void __switch_to_xtra(struct task_struct *next_p,
-handle_io_bitmap(struct thread_struct *next, struct tss_struct *tss)
+                                    struct tss_struct *tss)
 {
-        if (!next->io_bitmap_ptr) {
+        struct thread_struct *next;
+        next = &next_p->thread;
+        if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
+                set_debugreg(next->debugreg[0], 0);
+                set_debugreg(next->debugreg[1], 1);
+                set_debugreg(next->debugreg[2], 2);
+                set_debugreg(next->debugreg[3], 3);
+                /* no 4 and 5 */
+                set_debugreg(next->debugreg[6], 6);
+                set_debugreg(next->debugreg[7], 7);
+        }
+        if (!test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
                /*
                 * Disable the bitmap via an invalid offset. We still cache
                 * the previous bitmap owner and the IO bitmap contents:
@@ -544,6 +560,7 @@ handle_io_bitmap(struct thread_struct *next, struct tss_struct *tss)
                tss->io_bitmap_base = INVALID_IO_BITMAP_OFFSET;
                return;
        }
        if (likely(next == tss->io_bitmap_owner)) {
                /*
                 * Previous owner of the bitmap (hence the bitmap content)
@@ -671,20 +688,11 @@ struct task_struct fastcall * __switch_to(struct task_struct *prev_p, struct tas
                set_iopl_mask(next->iopl);
        /*
-         * Now maybe reload the debug registers
+         * Now maybe handle debug registers and/or IO bitmaps
         */
-        if (unlikely(next->debugreg[7])) {
+        if (unlikely((task_thread_info(next_p)->flags & _TIF_WORK_CTXSW))
-                set_debugreg(next->debugreg[0], 0);
+            || test_tsk_thread_flag(prev_p, TIF_IO_BITMAP))
-                set_debugreg(next->debugreg[1], 1);
+                __switch_to_xtra(next_p, tss);
-                set_debugreg(next->debugreg[2], 2);
-                set_debugreg(next->debugreg[3], 3);
-                /* no 4 and 5 */
-                set_debugreg(next->debugreg[6], 6);
-                set_debugreg(next->debugreg[7], 7);
-        }
-        if (unlikely(prev->io_bitmap_ptr || next->io_bitmap_ptr))
-                handle_io_bitmap(next, tss);
        disable_tsc(prev_p, next_p);
diff --git a/arch/i386/kernel/ptrace.c b/arch/i386/kernel/ptrace.c
index fd7eaf7866e0..d3db03f4085d 100644
--- a/arch/i386/kernel/ptrace.c
+++ b/arch/i386/kernel/ptrace.c
@@ -468,8 +468,11 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                                  for(i=0; i<4; i++)
                                          if ((0x5f54 >> ((data >> (16 + 4*i)) & 0xf)) & 1)
                                                  goto out_tsk;
+                                  if (data)
+                                          set_tsk_thread_flag(child, TIF_DEBUG);
+                                  else
+                                          clear_tsk_thread_flag(child, TIF_DEBUG);
                          }
                          addr -= (long) &dummy->u_debugreg;
                          addr = addr >> 2;
                          child->thread.debugreg[addr] = data;
diff --git a/block/blktrace.c b/block/blktrace.c
index 92925e7d9e6c..b8c0702777ff 100644
--- a/block/blktrace.c
+++ b/block/blktrace.c
@@ -69,7 +69,7 @@ static u32 ddir_act[2] __read_mostly = { BLK_TC_ACT(BLK_TC_READ), BLK_TC_ACT(BLK
 /*
 * Bio action bits of interest
 */
-static u32 bio_act[3] __read_mostly = { 0, BLK_TC_ACT(BLK_TC_BARRIER), BLK_TC_ACT(BLK_TC_SYNC) };
+static u32 bio_act[5] __read_mostly = { 0, BLK_TC_ACT(BLK_TC_BARRIER), BLK_TC_ACT(BLK_TC_SYNC), 0, BLK_TC_ACT(BLK_TC_AHEAD) };
 /*
 * More could be added as needed, taking care to increment the decrementer
@@ -79,6 +79,8 @@ static u32 bio_act[3] __read_mostly = { 0, BLK_TC_ACT(BLK_TC_BARRIER), BLK_TC_AC
        (((rw) & (1 << BIO_RW_BARRIER)) >> (BIO_RW_BARRIER - 0))
 #define trace_sync_bit(rw)      \
        (((rw) & (1 << BIO_RW_SYNC)) >> (BIO_RW_SYNC - 1))
+#define trace_ahead_bit(rw)     \
+        (((rw) & (1 << BIO_RW_AHEAD)) << (BIO_RW_AHEAD - 0))
 /*
 * The worker for the various blk_add_trace*() types. Fills out a
@@ -100,6 +102,7 @@ void __blk_add_trace(struct blk_trace *bt, sector_t sector, int bytes,
        what |= ddir_act[rw & WRITE];
        what |= bio_act[trace_barrier_bit(rw)];
        what |= bio_act[trace_sync_bit(rw)];
+        what |= bio_act[trace_ahead_bit(rw)];
        pid = tsk->pid;
        if (unlikely(act_log_check(bt, what, sector, pid)))
diff --git a/block/ll_rw_blk.c b/block/ll_rw_blk.c
index ab17c7224bb6..61d6b3c65b66 100644
--- a/block/ll_rw_blk.c
+++ b/block/ll_rw_blk.c
@@ -3491,8 +3491,8 @@ EXPORT_SYMBOL(end_request);
 void blk_rq_bio_prep(request_queue_t *q, struct request *rq, struct bio *bio)
 {
-        /* first three bits are identical in rq->flags and bio->bi_rw */
+        /* first two bits are identical in rq->flags and bio->bi_rw */
-        rq->flags |= (bio->bi_rw & 7);
+        rq->flags |= (bio->bi_rw & 3);
        rq->nr_phys_segments = bio_phys_segments(q, bio);
        rq->nr_hw_segments = bio_hw_segments(q, bio);
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
index fef7bab12244..56c5ba874623 100644
--- a/drivers/acpi/Kconfig
+++ b/drivers/acpi/Kconfig
@@ -107,7 +107,6 @@ config ACPI_BUTTON
 config ACPI_VIDEO
        tristate "Video"
        depends on X86
-        default y
        help
          This driver implement the ACPI Extensions For Display Adapters
          for integrated graphics devices on motherboard, as specified in
@@ -135,8 +134,7 @@ config ACPI_FAN
 config ACPI_DOCK
        tristate "Dock"
-        depends on !ACPI_IBM_DOCK
+        depends on EXPERIMENTAL
-        default y
        help
          This driver adds support for ACPI controlled docking stations
@@ -214,6 +212,7 @@ config ACPI_IBM
 config ACPI_IBM_DOCK
        bool "Legacy Docking Station Support"
        depends on ACPI_IBM
+        depends on ACPI_DOCK=n
        default n
        ---help---
          Allows the ibm_acpi driver to handle docking station events.
@@ -357,7 +356,6 @@ config ACPI_SBS
        tristate "Smart Battery System (EXPERIMENTAL)"
        depends on X86 && I2C
        depends on EXPERIMENTAL
-        default y
        help
          This driver adds support for the Smart Battery System.
          Depends on I2C (Device Drivers ---> I2C support)
diff --git a/drivers/acpi/ac.c b/drivers/acpi/ac.c
index 24ccf81d135f..96309b9660da 100644
--- a/drivers/acpi/ac.c
+++ b/drivers/acpi/ac.c
@@ -72,7 +72,7 @@ struct acpi_ac {
        unsigned long state;
 };
-static struct file_operations acpi_ac_fops = {
+static const struct file_operations acpi_ac_fops = {
        .open = acpi_ac_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index 24bf4dca88cc..6e5221707d97 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c
@@ -557,7 +557,7 @@ static int acpi_battery_alarm_open_fs(struct inode *inode, struct file *file)
        return single_open(file, acpi_battery_read_alarm, PDE(inode)->data);
 }
-static struct file_operations acpi_battery_info_ops = {
+static const struct file_operations acpi_battery_info_ops = {
        .open = acpi_battery_info_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
@@ -565,7 +565,7 @@ static struct file_operations acpi_battery_info_ops = {
        .owner = THIS_MODULE,
 };
-static struct file_operations acpi_battery_state_ops = {
+static const struct file_operations acpi_battery_state_ops = {
        .open = acpi_battery_state_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
@@ -573,7 +573,7 @@ static struct file_operations acpi_battery_state_ops = {
        .owner = THIS_MODULE,
 };
-static struct file_operations acpi_battery_alarm_ops = {
+static const struct file_operations acpi_battery_alarm_ops = {
        .open = acpi_battery_alarm_open_fs,
        .read = seq_read,
        .write = acpi_battery_write_alarm,
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index ea5a0496a4fd..b2977695e120 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -192,8 +192,8 @@ int acpi_bus_set_power(acpi_handle handle, int state)
        /* Make sure this is a valid target state */
        if (!device->flags.power_manageable) {
-                printk(KERN_DEBUG "Device `[%s]' is not power manageable",
+                ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Device `[%s]' is not power manageable",
-                                device->kobj.name);
+                                device->kobj.name));
                return -ENODEV;
        }
        /*
diff --git a/drivers/acpi/button.c b/drivers/acpi/button.c
index fd1ba05eab68..5ef885e82c78 100644
--- a/drivers/acpi/button.c
+++ b/drivers/acpi/button.c
@@ -87,14 +87,14 @@ struct acpi_button {
        unsigned long pushed;
 };
-static struct file_operations acpi_button_info_fops = {
+static const struct file_operations acpi_button_info_fops = {
        .open = acpi_button_info_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
        .release = single_release,
 };
-static struct file_operations acpi_button_state_fops = {
+static const struct file_operations acpi_button_state_fops = {
        .open = acpi_button_state_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
diff --git a/drivers/acpi/cm_sbs.c b/drivers/acpi/cm_sbs.c
index 574a75a166c5..a01ce6700bfe 100644
--- a/drivers/acpi/cm_sbs.c
+++ b/drivers/acpi/cm_sbs.c
@@ -39,50 +39,43 @@ ACPI_MODULE_NAME("cm_sbs")
 static struct proc_dir_entry *acpi_ac_dir;
 static struct proc_dir_entry *acpi_battery_dir;
-static struct semaphore cm_sbs_sem;
+static DEFINE_MUTEX(cm_sbs_mutex);
-static int lock_ac_dir_cnt = 0;
+static int lock_ac_dir_cnt;
-static int lock_battery_dir_cnt = 0;
+static int lock_battery_dir_cnt;
 struct proc_dir_entry *acpi_lock_ac_dir(void)
 {
+        mutex_lock(&cm_sbs_mutex);
-        down(&cm_sbs_sem);
+        if (!acpi_ac_dir)
-        if (!acpi_ac_dir) {
                acpi_ac_dir = proc_mkdir(ACPI_AC_CLASS, acpi_root_dir);
-        }
        if (acpi_ac_dir) {
                lock_ac_dir_cnt++;
        } else {
                ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
                                  "Cannot create %s\n", ACPI_AC_CLASS));
        }
-        up(&cm_sbs_sem);
+        mutex_unlock(&cm_sbs_mutex);
        return acpi_ac_dir;
 }
 EXPORT_SYMBOL(acpi_lock_ac_dir);
 void acpi_unlock_ac_dir(struct proc_dir_entry *acpi_ac_dir_param)
 {
+        mutex_lock(&cm_sbs_mutex);
-        down(&cm_sbs_sem);
+        if (acpi_ac_dir_param)
-        if (acpi_ac_dir_param) {
                lock_ac_dir_cnt--;
-        }
        if (lock_ac_dir_cnt == 0 && acpi_ac_dir_param && acpi_ac_dir) {
                remove_proc_entry(ACPI_AC_CLASS, acpi_root_dir);
                acpi_ac_dir = 0;
        }
-        up(&cm_sbs_sem);
+        mutex_unlock(&cm_sbs_mutex);
 }
 EXPORT_SYMBOL(acpi_unlock_ac_dir);
 struct proc_dir_entry *acpi_lock_battery_dir(void)
 {
+        mutex_lock(&cm_sbs_mutex);
-        down(&cm_sbs_sem);
        if (!acpi_battery_dir) {
                acpi_battery_dir =
                    proc_mkdir(ACPI_BATTERY_CLASS, acpi_root_dir);
@@ -93,39 +86,28 @@ struct proc_dir_entry *acpi_lock_battery_dir(void)
                ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
                                  "Cannot create %s\n", ACPI_BATTERY_CLASS));
        }
-        up(&cm_sbs_sem);
+        mutex_unlock(&cm_sbs_mutex);
        return acpi_battery_dir;
 }
 EXPORT_SYMBOL(acpi_lock_battery_dir);
 void acpi_unlock_battery_dir(struct proc_dir_entry *acpi_battery_dir_param)
 {
+        mutex_lock(&cm_sbs_mutex);
-        down(&cm_sbs_sem);
+        if (acpi_battery_dir_param)
-        if (acpi_battery_dir_param) {
                lock_battery_dir_cnt--;
-        }
        if (lock_battery_dir_cnt == 0 && acpi_battery_dir_param
            && acpi_battery_dir) {
                remove_proc_entry(ACPI_BATTERY_CLASS, acpi_root_dir);
                acpi_battery_dir = 0;
        }
-        up(&cm_sbs_sem);
+        mutex_unlock(&cm_sbs_mutex);
        return;
 }
 EXPORT_SYMBOL(acpi_unlock_battery_dir);
 static int __init acpi_cm_sbs_init(void)
 {
-        if (acpi_disabled)
-                return 0;
-        init_MUTEX(&cm_sbs_sem);
        return 0;
 }
 subsys_initcall(acpi_cm_sbs_init);
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index 8c5d7df7d343..e5d796362854 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -929,7 +929,7 @@ static int acpi_ec_info_open_fs(struct inode *inode, struct file *file)
        return single_open(file, acpi_ec_read_info, PDE(inode)->data);
 }
-static struct file_operations acpi_ec_info_ops = {
+static const struct file_operations acpi_ec_info_ops = {
        .open = acpi_ec_info_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
diff --git a/drivers/acpi/event.c b/drivers/acpi/event.c
index a901b23e95e7..959a893c8d1f 100644
--- a/drivers/acpi/event.c
+++ b/drivers/acpi/event.c
@@ -99,7 +99,7 @@ static unsigned int acpi_system_poll_event(struct file *file, poll_table * wait)
        return 0;
 }
-static struct file_operations acpi_system_event_ops = {
+static const struct file_operations acpi_system_event_ops = {
        .open = acpi_system_open_event,
        .read = acpi_system_read_event,
        .release = acpi_system_close_event,
diff --git a/drivers/acpi/fan.c b/drivers/acpi/fan.c
index daed2460924d..045c89477e59 100644
--- a/drivers/acpi/fan.c
+++ b/drivers/acpi/fan.c
@@ -120,7 +120,7 @@ acpi_fan_write_state(struct file *file, const char __user * buffer,
        return count;
 }
-static struct file_operations acpi_fan_state_ops = {
+static const struct file_operations acpi_fan_state_ops = {
        .open = acpi_fan_state_open_fs,
        .read = seq_read,
        .write = acpi_fan_write_state,
diff --git a/drivers/acpi/hotkey.c b/drivers/acpi/hotkey.c
index fd81a0f5222f..32c9d88fd196 100644
--- a/drivers/acpi/hotkey.c
+++ b/drivers/acpi/hotkey.c
@@ -184,7 +184,7 @@ static union acpi_hotkey *get_hotkey_by_event(struct
                                              *hotkey_list, int event);
 /* event based config */
-static struct file_operations hotkey_config_fops = {
+static const struct file_operations hotkey_config_fops = {
        .open = hotkey_open_config,
        .read = seq_read,
        .write = hotkey_write_config,
@@ -193,7 +193,7 @@ static struct file_operations hotkey_config_fops = {
 };
 /* polling based config */
-static struct file_operations hotkey_poll_config_fops = {
+static const struct file_operations hotkey_poll_config_fops = {
        .open = hotkey_poll_open_config,
        .read = seq_read,
        .write = hotkey_write_config,
@@ -202,7 +202,7 @@ static struct file_operations hotkey_poll_config_fops = {
 };
 /* hotkey driver info */
-static struct file_operations hotkey_info_fops = {
+static const struct file_operations hotkey_info_fops = {
        .open = hotkey_info_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
@@ -210,7 +210,7 @@ static struct file_operations hotkey_info_fops = {
 };
 /* action */
-static struct file_operations hotkey_action_fops = {
+static const struct file_operations hotkey_action_fops = {
        .open = hotkey_action_open_fs,
        .read = seq_read,
        .write = hotkey_execute_aml_method,
@@ -219,7 +219,7 @@ static struct file_operations hotkey_action_fops = {
 };
 /* polling results */
-static struct file_operations hotkey_polling_fops = {
+static const struct file_operations hotkey_polling_fops = {
        .open = hotkey_polling_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
diff --git a/drivers/acpi/power.c b/drivers/acpi/power.c
index 5d3447f4582c..fec225d1b6b7 100644
--- a/drivers/acpi/power.c
+++ b/drivers/acpi/power.c
@@ -80,7 +80,7 @@ struct acpi_power_resource {
 static struct list_head acpi_power_resource_list;
-static struct file_operations acpi_power_fops = {
+static const struct file_operations acpi_power_fops = {
        .open = acpi_power_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index 52674323b14d..b13d64415b7a 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -102,7 +102,7 @@ static struct acpi_driver acpi_processor_driver = {
 #define INSTALL_NOTIFY_HANDLER          1
 #define UNINSTALL_NOTIFY_HANDLER        2
-static struct file_operations acpi_processor_info_fops = {
+static const struct file_operations acpi_processor_info_fops = {
        .open = acpi_processor_info_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 8e9c26aae8fe..71066066d626 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -1070,7 +1070,7 @@ static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
                           PDE(inode)->data);
 }
-static struct file_operations acpi_processor_power_fops = {
+static const struct file_operations acpi_processor_power_fops = {
        .open = acpi_processor_power_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
diff --git a/drivers/acpi/sleep/proc.c b/drivers/acpi/sleep/proc.c
index 4696a85a98b9..34962578039d 100644
--- a/drivers/acpi/sleep/proc.c
+++ b/drivers/acpi/sleep/proc.c
@@ -434,7 +434,7 @@ acpi_system_wakeup_device_open_fs(struct inode *inode, struct file *file)
                           PDE(inode)->data);
 }
-static struct file_operations acpi_system_wakeup_device_fops = {
+static const struct file_operations acpi_system_wakeup_device_fops = {
        .open = acpi_system_wakeup_device_open_fs,
        .read = seq_read,
        .write = acpi_system_write_wakeup_device,
@@ -443,7 +443,7 @@ static struct file_operations acpi_system_wakeup_device_fops = {
 };
 #ifdef  CONFIG_ACPI_SLEEP_PROC_SLEEP
-static struct file_operations acpi_system_sleep_fops = {
+static const struct file_operations acpi_system_sleep_fops = {
        .open = acpi_system_sleep_open_fs,
        .read = seq_read,
        .write = acpi_system_write_sleep,
@@ -452,7 +452,7 @@ static struct file_operations acpi_system_sleep_fops = {
 };
 #endif                          /* CONFIG_ACPI_SLEEP_PROC_SLEEP */
-static struct file_operations acpi_system_alarm_fops = {
+static const struct file_operations acpi_system_alarm_fops = {
        .open = acpi_system_alarm_open_fs,
        .read = seq_read,
        .write = acpi_system_write_alarm,
diff --git a/drivers/acpi/system.c b/drivers/acpi/system.c
index c3bb7faad75e..d86dcb3c2366 100644
--- a/drivers/acpi/system.c
+++ b/drivers/acpi/system.c
@@ -57,7 +57,7 @@ static int acpi_system_info_open_fs(struct inode *inode, struct file *file)
        return single_open(file, acpi_system_read_info, PDE(inode)->data);
 }
-static struct file_operations acpi_system_info_ops = {
+static const struct file_operations acpi_system_info_ops = {
        .open = acpi_system_info_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
@@ -67,7 +67,7 @@ static struct file_operations acpi_system_info_ops = {
 static ssize_t acpi_system_read_dsdt(struct file *, char __user *, size_t,
                                     loff_t *);
-static struct file_operations acpi_system_dsdt_ops = {
+static const struct file_operations acpi_system_dsdt_ops = {
        .read = acpi_system_read_dsdt,
 };
@@ -94,7 +94,7 @@ acpi_system_read_dsdt(struct file *file,
 static ssize_t acpi_system_read_fadt(struct file *, char __user *, size_t,
                                     loff_t *);
-static struct file_operations acpi_system_fadt_ops = {
+static const struct file_operations acpi_system_fadt_ops = {
        .read = acpi_system_read_fadt,
 };
diff --git a/drivers/acpi/thermal.c b/drivers/acpi/thermal.c
index 503c0b99db12..480a31796886 100644
--- a/drivers/acpi/thermal.c
+++ b/drivers/acpi/thermal.c
@@ -176,21 +176,21 @@ struct acpi_thermal {
        struct timer_list timer;
 };
-static struct file_operations acpi_thermal_state_fops = {
+static const struct file_operations acpi_thermal_state_fops = {
        .open = acpi_thermal_state_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
        .release = single_release,
 };
-static struct file_operations acpi_thermal_temp_fops = {
+static const struct file_operations acpi_thermal_temp_fops = {
        .open = acpi_thermal_temp_open_fs,
        .read = seq_read,
        .llseek = seq_lseek,
        .release = single_release,
 };
-static struct file_operations acpi_thermal_trip_fops = {
+static const struct file_operations acpi_thermal_trip_fops = {
        .open = acpi_thermal_trip_open_fs,
        .read = seq_read,
        .write = acpi_thermal_write_trip_points,
@@ -198,7 +198,7 @@ static struct file_operations acpi_thermal_trip_fops = {
        .release = single_release,
 };
-static struct file_operations acpi_thermal_cooling_fops = {
+static const struct file_operations acpi_thermal_cooling_fops = {
        .open = acpi_thermal_cooling_open_fs,
        .read = seq_read,
        .write = acpi_thermal_write_cooling_mode,
@@ -206,7 +206,7 @@ static struct file_operations acpi_thermal_cooling_fops = {
        .release = single_release,
 };
-static struct file_operations acpi_thermal_polling_fops = {
+static const struct file_operations acpi_thermal_polling_fops = {
        .open = acpi_thermal_polling_open_fs,
        .read = seq_read,
        .write = acpi_thermal_write_polling,
diff --git a/drivers/atm/Kconfig b/drivers/atm/Kconfig
index 01a9f1cb7743..cfa5af883e13 100644
--- a/drivers/atm/Kconfig
+++ b/drivers/atm/Kconfig
@@ -398,7 +398,7 @@ config ATM_FORE200E_USE_TASKLET
        default n
        help
          This defers work to be done by the interrupt handler to a
-          tasklet instead of hanlding everything at interrupt time.  This
+          tasklet instead of handling everything at interrupt time.  This
          may improve the responsive of the host.
 config ATM_FORE200E_TX_RETRY
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 1ba4039777e8..8d328186f774 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -423,6 +423,8 @@ static ssize_t store_scaling_governor (struct cpufreq_policy * policy,
        if (cpufreq_parse_governor(str_governor, &new_policy.policy, &new_policy.governor))
                return -EINVAL;
+        lock_cpu_hotplug();
        /* Do not use cpufreq_set_policy here or the user_policy.max
           will be wrongly overridden */
        mutex_lock(&policy->lock);
@@ -432,6 +434,8 @@ static ssize_t store_scaling_governor (struct cpufreq_policy * policy,
        policy->user_policy.governor = policy->governor;
        mutex_unlock(&policy->lock);
+        unlock_cpu_hotplug();
        return ret ? ret : count;
 }
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c
index 2819de79442c..80e8ca013e44 100644
--- a/drivers/net/3c59x.c
+++ b/drivers/net/3c59x.c
@@ -17,172 +17,6 @@
        410 Severn Ave., Suite 210
        Annapolis MD 21403
-        Linux Kernel Additions:
-        
-        0.99H+lk0.9 - David S. Miller - softnet, PCI DMA updates
-        0.99H+lk1.0 - Jeff Garzik <jgarzik@pobox.com>
-                Remove compatibility defines for kernel versions < 2.2.x.
-                Update for new 2.3.x module interface
-        LK1.1.2 (March 19, 2000)
-        * New PCI interface (jgarzik)
-    LK1.1.3 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
-    - Merged with 3c575_cb.c
-    - Don't set RxComplete in boomerang interrupt enable reg
-    - spinlock in vortex_timer to protect mdio functions
-    - disable local interrupts around call to vortex_interrupt in
-      vortex_tx_timeout() (So vortex_interrupt can use spin_lock())
-    - Select window 3 in vortex_timer()'s write to Wn3_MAC_Ctrl
-    - In vortex_start_xmit(), move the lock to _after_ we've altered
-      vp->cur_tx and vp->tx_full.  This defeats the race between
-      vortex_start_xmit() and vortex_interrupt which was identified
-      by Bogdan Costescu.
-    - Merged back support for six new cards from various sources
-    - Set vortex_have_pci if pci_module_init returns zero (fixes cardbus
-      insertion oops)
-    - Tell it that 3c905C has NWAY for 100bT autoneg
-    - Fix handling of SetStatusEnd in 'Too much work..' code, as
-      per 2.3.99's 3c575_cb (Dave Hinds).
-    - Split ISR into two for vortex & boomerang
-    - Fix MOD_INC/DEC races
-    - Handle resource allocation failures.
-    - Fix 3CCFE575CT LED polarity
-    - Make tx_interrupt_mitigation the default
-    LK1.1.4 25 April 2000, Andrew Morton <andrewm@uow.edu.au>    
-    - Add extra TxReset to vortex_up() to fix 575_cb hotplug initialisation probs.
-    - Put vortex_info_tbl into __devinitdata
-    - In the vortex_error StatsFull HACK, disable stats in vp->intr_enable as well
-      as in the hardware.
-    - Increased the loop counter in issue_and_wait from 2,000 to 4,000.
-    LK1.1.5 28 April 2000, andrewm
-    - Added powerpc defines (John Daniel <jdaniel@etresoft.com> said these work...)
-    - Some extra diagnostics
-    - In vortex_error(), reset the Tx on maxCollisions.  Otherwise most
-      chips usually get a Tx timeout.
-    - Added extra_reset module parm
-    - Replaced some inline timer manip with mod_timer
-      (Franois romieu <Francois.Romieu@nic.fr>)
-    - In vortex_up(), don't make Wn3_config initialisation dependent upon has_nway
-      (this came across from 3c575_cb).
-    LK1.1.6 06 Jun 2000, andrewm
-    - Backed out the PPC defines.
-    - Use del_timer_sync(), mod_timer().
-    - Fix wrapped ulong comparison in boomerang_rx()
-    - Add IS_TORNADO, use it to suppress 3c905C checksum error msg
-      (Donald Becker, I Lee Hetherington <ilh@sls.lcs.mit.edu>)
-    - Replace union wn3_config with BFINS/BFEXT manipulation for
-      sparc64 (Pete Zaitcev, Peter Jones)
-    - In vortex_error, do_tx_reset and vortex_tx_timeout(Vortex):
-      do a netif_wake_queue() to better recover from errors. (Anders Pedersen,
-      Donald Becker)
-    - Print a warning on out-of-memory (rate limited to 1 per 10 secs)
-    - Added two more Cardbus 575 NICs: 5b57 and 6564 (Paul Wagland)
-    LK1.1.7 2 Jul 2000 andrewm
-    - Better handling of shared IRQs
-    - Reset the transmitter on a Tx reclaim error
-    - Fixed crash under OOM during vortex_open() (Mark Hemment)
-    - Fix Rx cessation problem during OOM (help from Mark Hemment)
-    - The spinlocks around the mdio access were blocking interrupts for 300uS.
-      Fix all this to use spin_lock_bh() within mdio_read/write
-    - Only write to TxFreeThreshold if it's a boomerang - other NICs don't
-      have one.
-    - Added 802.3x MAC-layer flow control support
-   LK1.1.8 13 Aug 2000 andrewm
-    - Ignore request_region() return value - already reserved if Cardbus.
-    - Merged some additional Cardbus flags from Don's 0.99Qk
-    - Some fixes for 3c556 (Fred Maciel)
-    - Fix for EISA initialisation (Jan Rekorajski)
-    - Renamed MII_XCVR_PWR and EEPROM_230 to align with 3c575_cb and D. Becker's drivers
-    - Fixed MII_XCVR_PWR for 3CCFE575CT
-    - Added INVERT_LED_PWR, used it.
-    - Backed out the extra_reset stuff
-   LK1.1.9 12 Sep 2000 andrewm
-    - Backed out the tx_reset_resume flags.  It was a no-op.
-    - In vortex_error, don't reset the Tx on txReclaim errors
-    - In vortex_error, don't reset the Tx on maxCollisions errors.
-      Hence backed out all the DownListPtr logic here.
-    - In vortex_error, give Tornado cards a partial TxReset on
-      maxCollisions (David Hinds).  Defined MAX_COLLISION_RESET for this.
-    - Redid some driver flags and device names based on pcmcia_cs-3.1.20.
-    - Fixed a bug where, if vp->tx_full is set when the interface
-      is downed, it remains set when the interface is upped.  Bad
-      things happen.
-   LK1.1.10 17 Sep 2000 andrewm
-    - Added EEPROM_8BIT for 3c555 (Fred Maciel)
-    - Added experimental support for the 3c556B Laptop Hurricane (Louis Gerbarg)
-    - Add HAS_NWAY to "3c900 Cyclone 10Mbps TPO"
-   LK1.1.11 13 Nov 2000 andrewm
-    - Dump MOD_INC/DEC_USE_COUNT, use SET_MODULE_OWNER
-   LK1.1.12 1 Jan 2001 andrewm (2.4.0-pre1)
-    - Call pci_enable_device before we request our IRQ (Tobias Ringstrom)
-    - Add 3c590 PCI latency timer hack to vortex_probe1 (from 0.99Ra)
-    - Added extended issue_and_wait for the 3c905CX.
-    - Look for an MII on PHY index 24 first (3c905CX oddity).
-    - Add HAS_NWAY to 3cSOHO100-TX (Brett Frankenberger)
-    - Don't free skbs we don't own on oom path in vortex_open().
-   LK1.1.13 27 Jan 2001
-    - Added explicit `medialock' flag so we can truly
-      lock the media type down with `options'.
-    - "check ioremap return and some tidbits" (Arnaldo Carvalho de Melo <acme@conectiva.com.br>)
-    - Added and used EEPROM_NORESET for 3c556B PM resumes.
-    - Fixed leakage of vp->rx_ring.
-    - Break out separate HAS_HWCKSM device capability flag.
-    - Kill vp->tx_full (ANK)
-    - Merge zerocopy fragment handling (ANK?)
-   LK1.1.14 15 Feb 2001
-    - Enable WOL.  Can be turned on with `enable_wol' module option.
-    - EISA and PCI initialisation fixes (jgarzik, Manfred Spraul)
-    - If a device's internalconfig register reports it has NWAY,
-      use it, even if autoselect is enabled.
-   LK1.1.15 6 June 2001 akpm
-    - Prevent double counting of received bytes (Lars Christensen)
-    - Add ethtool support (jgarzik)
-    - Add module parm descriptions (Andrzej M. Krzysztofowicz)
-    - Implemented alloc_etherdev() API
-    - Special-case the 'Tx error 82' message.
-   LK1.1.16 18 July 2001 akpm
-    - Make NETIF_F_SG dependent upon nr_free_highpages(), not on CONFIG_HIGHMEM
-    - Lessen verbosity of bootup messages
-    - Fix WOL - use new PM API functions.
-    - Use netif_running() instead of vp->open in suspend/resume.
-    - Don't reset the interface logic on open/close/rmmod.  It upsets
-      autonegotiation, and hence DHCP (from 0.99T).
-    - Back out EEPROM_NORESET flag because of the above (we do it for all
-      NICs).
-    - Correct 3c982 identification string
-    - Rename wait_for_completion() to issue_and_wait() to avoid completion.h
-      clash.
-   LK1.1.17 18Dec01 akpm
-    - PCI ID 9805 is a Python-T, not a dual-port Cyclone.  Apparently.
-      And it has NWAY.
-    - Mask our advertised modes (vp->advertising) with our capabilities
-          (MII reg5) when deciding which duplex mode to use.
-    - Add `global_options' as default for options[].  Ditto global_enable_wol,
-      global_full_duplex.
-   LK1.1.18 01Jul02 akpm
-    - Fix for undocumented transceiver power-up bit on some 3c566B's
-      (Donald Becker, Rahul Karnik)
-    - See http://www.zip.com.au/~akpm/linux/#3c59x-2.3 for more details.
-    - Also see Documentation/networking/vortex.txt
-   LK1.1.19 10Nov02 Marc Zyngier <maz@wild-wind.fr.eu.org>
-    - EISA sysfs integration.
 */
 /*
diff --git a/drivers/net/8139too.c b/drivers/net/8139too.c
index cd9718512d1c..e4f4eaff7679 100644
--- a/drivers/net/8139too.c
+++ b/drivers/net/8139too.c
@@ -1709,6 +1709,7 @@ static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
        void __iomem *ioaddr = tp->mmio_addr;
        unsigned int entry;
        unsigned int len = skb->len;
+        unsigned long flags;
        /* Calculate the next Tx descriptor entry. */
        entry = tp->cur_tx % NUM_TX_DESC;
@@ -1725,7 +1726,7 @@ static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
                return 0;
        }
-        spin_lock_irq(&tp->lock);
+        spin_lock_irqsave(&tp->lock, flags);
        RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
                   tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
@@ -1736,7 +1737,7 @@ static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
        if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
                netif_stop_queue (dev);
-        spin_unlock_irq(&tp->lock);
+        spin_unlock_irqrestore(&tp->lock, flags);
        if (netif_msg_tx_queued(tp))
                printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n",
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 64b6a72b4f6a..db73de0d2511 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -1639,7 +1639,7 @@ bnx2_tx_int(struct bnx2 *bp)
                skb = tx_buf->skb;
 #ifdef BCM_TSO 
                /* partial BD completions possible with TSO packets */
-                if (skb_shinfo(skb)->gso_size) {
+                if (skb_is_gso(skb)) {
                        u16 last_idx, last_ring_idx;
                        last_idx = sw_cons +
diff --git a/drivers/net/chelsio/sge.c b/drivers/net/chelsio/sge.c
index 87f94d939ff8..61b3754f50ff 100644
--- a/drivers/net/chelsio/sge.c
+++ b/drivers/net/chelsio/sge.c
@@ -1417,7 +1417,7 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev)
        struct cpl_tx_pkt *cpl;
 #ifdef NETIF_F_TSO
-        if (skb_shinfo(skb)->gso_size) {
+        if (skb_is_gso(skb)) {
                int eth_type;
                struct cpl_tx_pkt_lso *hdr;
diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h
index 3042d33e2d4d..f411bbb44f86 100644
--- a/drivers/net/e1000/e1000.h
+++ b/drivers/net/e1000/e1000.h
@@ -68,7 +68,6 @@
 #ifdef NETIF_F_TSO
 #include <net/checksum.h>
 #endif
-#include <linux/workqueue.h>
 #include <linux/mii.h>
 #include <linux/ethtool.h>
 #include <linux/if_vlan.h>
@@ -143,6 +142,7 @@ struct e1000_adapter;
 #define AUTO_ALL_MODES            0
 #define E1000_EEPROM_82544_APM    0x0004
+#define E1000_EEPROM_ICH8_APME    0x0004
 #define E1000_EEPROM_APME         0x0400
 #ifndef E1000_MASTER_SLAVE
@@ -254,7 +254,6 @@ struct e1000_adapter {
        spinlock_t tx_queue_lock;
 #endif
        atomic_t irq_sem;
-        struct work_struct watchdog_task;
        struct work_struct reset_task;
        uint8_t fc_autoneg;
@@ -339,8 +338,14 @@ struct e1000_adapter {
 #ifdef NETIF_F_TSO
        boolean_t tso_force;
 #endif
+        boolean_t smart_power_down;     /* phy smart power down */
+        unsigned long flags;
 };
+enum e1000_state_t {
+        __E1000_DRIVER_TESTING,
+        __E1000_RESETTING,
+};
 /*  e1000_main.c  */
 extern char e1000_driver_name[];
@@ -348,6 +353,7 @@ extern char e1000_driver_version[];
 int e1000_up(struct e1000_adapter *adapter);
 void e1000_down(struct e1000_adapter *adapter);
 void e1000_reset(struct e1000_adapter *adapter);
+void e1000_reinit_locked(struct e1000_adapter *adapter);
 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c
index d19664891768..88a82ba88f57 100644
--- a/drivers/net/e1000/e1000_ethtool.c
+++ b/drivers/net/e1000/e1000_ethtool.c
@@ -109,7 +109,8 @@ e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
                                   SUPPORTED_1000baseT_Full|
                                   SUPPORTED_Autoneg |
                                   SUPPORTED_TP);
+                if (hw->phy_type == e1000_phy_ife)
+                        ecmd->supported &= ~SUPPORTED_1000baseT_Full;
                ecmd->advertising = ADVERTISED_TP;
                if (hw->autoneg == 1) {
@@ -203,11 +204,9 @@ e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
        /* reset the link */
-        if (netif_running(adapter->netdev)) {
+        if (netif_running(adapter->netdev))
-                e1000_down(adapter);
+                e1000_reinit_locked(adapter);
-                e1000_reset(adapter);
+        else
-                e1000_up(adapter);
-        } else
                e1000_reset(adapter);
        return 0;
@@ -254,10 +253,9 @@ e1000_set_pauseparam(struct net_device *netdev,
        hw->original_fc = hw->fc;
        if (adapter->fc_autoneg == AUTONEG_ENABLE) {
-                if (netif_running(adapter->netdev)) {
+                if (netif_running(adapter->netdev))
-                        e1000_down(adapter);
+                        e1000_reinit_locked(adapter);
-                        e1000_up(adapter);
+                else
-                } else
                        e1000_reset(adapter);
        } else
                return ((hw->media_type == e1000_media_type_fiber) ?
@@ -279,10 +277,9 @@ e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
        struct e1000_adapter *adapter = netdev_priv(netdev);
        adapter->rx_csum = data;
-        if (netif_running(netdev)) {
+        if (netif_running(netdev))
-                e1000_down(adapter);
+                e1000_reinit_locked(adapter);
-                e1000_up(adapter);
+        else
-        } else
                e1000_reset(adapter);
        return 0;
 }
@@ -577,6 +574,7 @@ e1000_get_drvinfo(struct net_device *netdev,
        case e1000_82572:
        case e1000_82573:
        case e1000_80003es2lan:
+        case e1000_ich8lan:
                sprintf(firmware_version, "%d.%d-%d",
                        (eeprom_data & 0xF000) >> 12,
                        (eeprom_data & 0x0FF0) >> 4,
@@ -631,6 +629,9 @@ e1000_set_ringparam(struct net_device *netdev,
        tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
        rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
+        while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
+                msleep(1);
        if (netif_running(adapter->netdev))
                e1000_down(adapter);
@@ -691,9 +692,11 @@ e1000_set_ringparam(struct net_device *netdev,
                adapter->rx_ring = rx_new;
                adapter->tx_ring = tx_new;
                if ((err = e1000_up(adapter)))
-                        return err;
+                        goto err_setup;
        }
+        clear_bit(__E1000_RESETTING, &adapter->flags);
        return 0;
 err_setup_tx:
        e1000_free_all_rx_resources(adapter);
@@ -701,6 +704,8 @@ err_setup_rx:
        adapter->rx_ring = rx_old;
        adapter->tx_ring = tx_old;
        e1000_up(adapter);
+err_setup:
+        clear_bit(__E1000_RESETTING, &adapter->flags);
        return err;
 }
@@ -754,6 +759,7 @@ e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
                toggle = 0x7FFFF3FF;
                break;
        case e1000_82573:
+        case e1000_ich8lan:
                toggle = 0x7FFFF033;
                break;
        default:
@@ -773,11 +779,12 @@ e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
        }
        /* restore previous status */
        E1000_WRITE_REG(&adapter->hw, STATUS, before);
+        if (adapter->hw.mac_type != e1000_ich8lan) {
-        REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
+                REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
-        REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
+                REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
-        REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
+                REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
-        REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
+                REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
+        }
        REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
        REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
        REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
@@ -790,20 +797,22 @@ e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
        REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
        REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
-        REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
+        before = (adapter->hw.mac_type == e1000_ich8lan ?
+                        0x06C3B33E : 0x06DFB3FE);
+        REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
        REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
        if (adapter->hw.mac_type >= e1000_82543) {
-                REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
+                REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
                REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
-                REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
+                if (adapter->hw.mac_type != e1000_ich8lan)
+                        REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
                REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
                REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
+                value = (adapter->hw.mac_type == e1000_ich8lan ?
-                for (i = 0; i < E1000_RAR_ENTRIES; i++) {
+                                E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
-                        REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
+                for (i = 0; i < value; i++) {
-                                         0xFFFFFFFF);
                        REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
                                         0xFFFFFFFF);
                }
@@ -817,7 +826,9 @@ e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
        }
-        for (i = 0; i < E1000_MC_TBL_SIZE; i++)
+        value = (adapter->hw.mac_type == e1000_ich8lan ?
+                        E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
+        for (i = 0; i < value; i++)
                REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
        *data = 0;
@@ -889,6 +900,8 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
        /* Test each interrupt */
        for (; i < 10; i++) {
+                if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
+                        continue;
                /* Interrupt to test */
                mask = 1 << i;
@@ -1246,18 +1259,33 @@ e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
        } else if (adapter->hw.phy_type == e1000_phy_gg82563) {
                e1000_write_phy_reg(&adapter->hw,
                                    GG82563_PHY_KMRN_MODE_CTRL,
-                                    0x1CE);
+                                    0x1CC);
        }
-        /* force 1000, set loopback */
-        e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
-        /* Now set up the MAC to the same speed/duplex as the PHY. */
        ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
-        ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
-        ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
+        if (adapter->hw.phy_type == e1000_phy_ife) {
-                     E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
+                /* force 100, set loopback */
-                     E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
+                e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
-                     E1000_CTRL_FD);     /* Force Duplex to FULL */
+                /* Now set up the MAC to the same speed/duplex as the PHY. */
+                ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
+                ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
+                             E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
+                             E1000_CTRL_SPD_100 |/* Force Speed to 100 */
+                             E1000_CTRL_FD);     /* Force Duplex to FULL */
+        } else {
+                /* force 1000, set loopback */
+                e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
+                /* Now set up the MAC to the same speed/duplex as the PHY. */
+                ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
+                ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
+                ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
+                             E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
+                             E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
+                             E1000_CTRL_FD);     /* Force Duplex to FULL */
+        }
        if (adapter->hw.media_type == e1000_media_type_copper &&
           adapter->hw.phy_type == e1000_phy_m88) {
@@ -1317,6 +1345,7 @@ e1000_set_phy_loopback(struct e1000_adapter *adapter)
        case e1000_82572:
        case e1000_82573:
        case e1000_80003es2lan:
+        case e1000_ich8lan:
                return e1000_integrated_phy_loopback(adapter);
                break;
@@ -1568,6 +1597,7 @@ e1000_diag_test(struct net_device *netdev,
        struct e1000_adapter *adapter = netdev_priv(netdev);
        boolean_t if_running = netif_running(netdev);
+        set_bit(__E1000_DRIVER_TESTING, &adapter->flags);
        if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
                /* Offline tests */
@@ -1582,7 +1612,8 @@ e1000_diag_test(struct net_device *netdev,
                        eth_test->flags |= ETH_TEST_FL_FAILED;
                if (if_running)
-                        e1000_down(adapter);
+                        /* indicate we're in test mode */
+                        dev_close(netdev);
                else
                        e1000_reset(adapter);
@@ -1607,8 +1638,9 @@ e1000_diag_test(struct net_device *netdev,
                adapter->hw.autoneg = autoneg;
                e1000_reset(adapter);
+                clear_bit(__E1000_DRIVER_TESTING, &adapter->flags);
                if (if_running)
-                        e1000_up(adapter);
+                        dev_open(netdev);
        } else {
                /* Online tests */
                if (e1000_link_test(adapter, &data[4]))
@@ -1619,6 +1651,8 @@ e1000_diag_test(struct net_device *netdev,
                data[1] = 0;
                data[2] = 0;
                data[3] = 0;
+                clear_bit(__E1000_DRIVER_TESTING, &adapter->flags);
        }
        msleep_interruptible(4 * 1000);
 }
@@ -1778,21 +1812,18 @@ e1000_phys_id(struct net_device *netdev, uint32_t data)
                mod_timer(&adapter->blink_timer, jiffies);
                msleep_interruptible(data * 1000);
                del_timer_sync(&adapter->blink_timer);
-        } else if (adapter->hw.mac_type < e1000_82573) {
+        } else if (adapter->hw.phy_type == e1000_phy_ife) {
-                E1000_WRITE_REG(&adapter->hw, LEDCTL,
+                if (!adapter->blink_timer.function) {
-                        (E1000_LEDCTL_LED2_BLINK_RATE |
+                        init_timer(&adapter->blink_timer);
-                         E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
+                        adapter->blink_timer.function = e1000_led_blink_callback;
-                         (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
+                        adapter->blink_timer.data = (unsigned long) adapter;
-                         (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
+                }
-                         (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
+                mod_timer(&adapter->blink_timer, jiffies);
                msleep_interruptible(data * 1000);
+                del_timer_sync(&adapter->blink_timer);
+                e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
        } else {
-                E1000_WRITE_REG(&adapter->hw, LEDCTL,
+                e1000_blink_led_start(&adapter->hw);
-                        (E1000_LEDCTL_LED2_BLINK_RATE |
-                         E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
-                         (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
-                         (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
-                         (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
                msleep_interruptible(data * 1000);
        }
@@ -1807,10 +1838,8 @@ static int
 e1000_nway_reset(struct net_device *netdev)
 {
        struct e1000_adapter *adapter = netdev_priv(netdev);
-        if (netif_running(netdev)) {
+        if (netif_running(netdev))
-                e1000_down(adapter);
+                e1000_reinit_locked(adapter);
-                e1000_up(adapter);
-        }
        return 0;
 }
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c
index 3959039b16ec..583518ae49ce 100644
--- a/drivers/net/e1000/e1000_hw.c
+++ b/drivers/net/e1000/e1000_hw.c
@@ -101,7 +101,8 @@ static void e1000_write_reg_io(struct e1000_hw *hw, uint32_t offset,
 #define E1000_WRITE_REG_IO(a, reg, val) \
            e1000_write_reg_io((a), E1000_##reg, val)
-static int32_t e1000_configure_kmrn_for_10_100(struct e1000_hw *hw);
+static int32_t e1000_configure_kmrn_for_10_100(struct e1000_hw *hw,
+                                               uint16_t duplex);
 static int32_t e1000_configure_kmrn_for_1000(struct e1000_hw *hw);
 /* IGP cable length table */
@@ -156,6 +157,14 @@ e1000_set_phy_type(struct e1000_hw *hw)
            hw->phy_type = e1000_phy_igp;
            break;
        }
+    case IGP03E1000_E_PHY_ID:
+        hw->phy_type = e1000_phy_igp_3;
+        break;
+    case IFE_E_PHY_ID:
+    case IFE_PLUS_E_PHY_ID:
+    case IFE_C_E_PHY_ID:
+        hw->phy_type = e1000_phy_ife;
+        break;
    case GG82563_E_PHY_ID:
        if (hw->mac_type == e1000_80003es2lan) {
            hw->phy_type = e1000_phy_gg82563;
@@ -332,6 +341,7 @@ e1000_set_mac_type(struct e1000_hw *hw)
        break;
    case E1000_DEV_ID_82541EI:
    case E1000_DEV_ID_82541EI_MOBILE:
+    case E1000_DEV_ID_82541ER_LOM:
        hw->mac_type = e1000_82541;
        break;
    case E1000_DEV_ID_82541ER:
@@ -341,6 +351,7 @@ e1000_set_mac_type(struct e1000_hw *hw)
        hw->mac_type = e1000_82541_rev_2;
        break;
    case E1000_DEV_ID_82547EI:
+    case E1000_DEV_ID_82547EI_MOBILE:
        hw->mac_type = e1000_82547;
        break;
    case E1000_DEV_ID_82547GI:
@@ -354,6 +365,7 @@ e1000_set_mac_type(struct e1000_hw *hw)
    case E1000_DEV_ID_82572EI_COPPER:
    case E1000_DEV_ID_82572EI_FIBER:
    case E1000_DEV_ID_82572EI_SERDES:
+    case E1000_DEV_ID_82572EI:
        hw->mac_type = e1000_82572;
        break;
    case E1000_DEV_ID_82573E:
@@ -361,16 +373,29 @@ e1000_set_mac_type(struct e1000_hw *hw)
    case E1000_DEV_ID_82573L:
        hw->mac_type = e1000_82573;
        break;
+    case E1000_DEV_ID_80003ES2LAN_COPPER_SPT:
+    case E1000_DEV_ID_80003ES2LAN_SERDES_SPT:
    case E1000_DEV_ID_80003ES2LAN_COPPER_DPT:
    case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:
        hw->mac_type = e1000_80003es2lan;
        break;
+    case E1000_DEV_ID_ICH8_IGP_M_AMT:
+    case E1000_DEV_ID_ICH8_IGP_AMT:
+    case E1000_DEV_ID_ICH8_IGP_C:
+    case E1000_DEV_ID_ICH8_IFE:
+    case E1000_DEV_ID_ICH8_IGP_M:
+        hw->mac_type = e1000_ich8lan;
+        break;
    default:
        /* Should never have loaded on this device */
        return -E1000_ERR_MAC_TYPE;
    }
    switch(hw->mac_type) {
+    case e1000_ich8lan:
+        hw->swfwhw_semaphore_present = TRUE;
+        hw->asf_firmware_present = TRUE;
+        break;
    case e1000_80003es2lan:
        hw->swfw_sync_present = TRUE;
        /* fall through */
@@ -423,6 +448,7 @@ e1000_set_media_type(struct e1000_hw *hw)
        case e1000_82542_rev2_1:
            hw->media_type = e1000_media_type_fiber;
            break;
+        case e1000_ich8lan:
        case e1000_82573:
            /* The STATUS_TBIMODE bit is reserved or reused for the this
             * device.
@@ -527,6 +553,14 @@ e1000_reset_hw(struct e1000_hw *hw)
        } while(timeout);
    }
+    /* Workaround for ICH8 bit corruption issue in FIFO memory */
+    if (hw->mac_type == e1000_ich8lan) {
+        /* Set Tx and Rx buffer allocation to 8k apiece. */
+        E1000_WRITE_REG(hw, PBA, E1000_PBA_8K);
+        /* Set Packet Buffer Size to 16k. */
+        E1000_WRITE_REG(hw, PBS, E1000_PBS_16K);
+    }
    /* Issue a global reset to the MAC.  This will reset the chip's
     * transmit, receive, DMA, and link units.  It will not effect
     * the current PCI configuration.  The global reset bit is self-
@@ -550,6 +584,20 @@ e1000_reset_hw(struct e1000_hw *hw)
            /* Reset is performed on a shadow of the control register */
            E1000_WRITE_REG(hw, CTRL_DUP, (ctrl | E1000_CTRL_RST));
            break;
+        case e1000_ich8lan:
+            if (!hw->phy_reset_disable &&
+                e1000_check_phy_reset_block(hw) == E1000_SUCCESS) {
+                /* e1000_ich8lan PHY HW reset requires MAC CORE reset
+                 * at the same time to make sure the interface between
+                 * MAC and the external PHY is reset.
+                 */
+                ctrl |= E1000_CTRL_PHY_RST;
+            }
+            e1000_get_software_flag(hw);
+            E1000_WRITE_REG(hw, CTRL, (ctrl | E1000_CTRL_RST));
+            msec_delay(5);
+            break;
        default:
            E1000_WRITE_REG(hw, CTRL, (ctrl | E1000_CTRL_RST));
            break;
@@ -591,6 +639,7 @@ e1000_reset_hw(struct e1000_hw *hw)
            /* fall through */
        case e1000_82571:
        case e1000_82572:
+        case e1000_ich8lan:
        case e1000_80003es2lan:
            ret_val = e1000_get_auto_rd_done(hw);
            if(ret_val)
@@ -633,6 +682,12 @@ e1000_reset_hw(struct e1000_hw *hw)
            e1000_pci_set_mwi(hw);
    }
+    if (hw->mac_type == e1000_ich8lan) {
+        uint32_t kab = E1000_READ_REG(hw, KABGTXD);
+        kab |= E1000_KABGTXD_BGSQLBIAS;
+        E1000_WRITE_REG(hw, KABGTXD, kab);
+    }
    return E1000_SUCCESS;
 }
@@ -675,9 +730,12 @@ e1000_init_hw(struct e1000_hw *hw)
    /* Disabling VLAN filtering. */
    DEBUGOUT("Initializing the IEEE VLAN\n");
-    if (hw->mac_type < e1000_82545_rev_3)
+    /* VET hardcoded to standard value and VFTA removed in ICH8 LAN */
-        E1000_WRITE_REG(hw, VET, 0);
+    if (hw->mac_type != e1000_ich8lan) {
-    e1000_clear_vfta(hw);
+        if (hw->mac_type < e1000_82545_rev_3)
+            E1000_WRITE_REG(hw, VET, 0);
+        e1000_clear_vfta(hw);
+    }
    /* For 82542 (rev 2.0), disable MWI and put the receiver into reset */
    if(hw->mac_type == e1000_82542_rev2_0) {
@@ -705,8 +763,14 @@ e1000_init_hw(struct e1000_hw *hw)
    /* Zero out the Multicast HASH table */
    DEBUGOUT("Zeroing the MTA\n");
    mta_size = E1000_MC_TBL_SIZE;
-    for(i = 0; i < mta_size; i++)
+    if (hw->mac_type == e1000_ich8lan)
+        mta_size = E1000_MC_TBL_SIZE_ICH8LAN;
+    for(i = 0; i < mta_size; i++) {
        E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
+        /* use write flush to prevent Memory Write Block (MWB) from
+         * occuring when accessing our register space */
+        E1000_WRITE_FLUSH(hw);
+    }
    /* Set the PCI priority bit correctly in the CTRL register.  This
     * determines if the adapter gives priority to receives, or if it
@@ -744,6 +808,10 @@ e1000_init_hw(struct e1000_hw *hw)
        break;
    }
+    /* More time needed for PHY to initialize */
+    if (hw->mac_type == e1000_ich8lan)
+        msec_delay(15);
    /* Call a subroutine to configure the link and setup flow control. */
    ret_val = e1000_setup_link(hw);
@@ -757,6 +825,7 @@ e1000_init_hw(struct e1000_hw *hw)
        case e1000_82571:
        case e1000_82572:
        case e1000_82573:
+        case e1000_ich8lan:
        case e1000_80003es2lan:
            ctrl |= E1000_TXDCTL_COUNT_DESC;
            break;
@@ -795,6 +864,7 @@ e1000_init_hw(struct e1000_hw *hw)
        /* Fall through */
    case e1000_82571:
    case e1000_82572:
+    case e1000_ich8lan:
        ctrl = E1000_READ_REG(hw, TXDCTL1);
        ctrl = (ctrl & ~E1000_TXDCTL_WTHRESH) | E1000_TXDCTL_FULL_TX_DESC_WB;
        if(hw->mac_type >= e1000_82571)
@@ -818,6 +888,11 @@ e1000_init_hw(struct e1000_hw *hw)
     */
    e1000_clear_hw_cntrs(hw);
+    /* ICH8 No-snoop bits are opposite polarity.
+     * Set to snoop by default after reset. */
+    if (hw->mac_type == e1000_ich8lan)
+        e1000_set_pci_ex_no_snoop(hw, PCI_EX_82566_SNOOP_ALL);
    if (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER ||
        hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3) {
        ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
@@ -905,6 +980,7 @@ e1000_setup_link(struct e1000_hw *hw)
     */
    if (hw->fc == e1000_fc_default) {
        switch (hw->mac_type) {
+        case e1000_ich8lan:
        case e1000_82573:
            hw->fc = e1000_fc_full;
            break;
@@ -971,9 +1047,12 @@ e1000_setup_link(struct e1000_hw *hw)
     */
    DEBUGOUT("Initializing the Flow Control address, type and timer regs\n");
-    E1000_WRITE_REG(hw, FCAL, FLOW_CONTROL_ADDRESS_LOW);
+    /* FCAL/H and FCT are hardcoded to standard values in e1000_ich8lan. */
-    E1000_WRITE_REG(hw, FCAH, FLOW_CONTROL_ADDRESS_HIGH);
+    if (hw->mac_type != e1000_ich8lan) {
-    E1000_WRITE_REG(hw, FCT, FLOW_CONTROL_TYPE);
+        E1000_WRITE_REG(hw, FCT, FLOW_CONTROL_TYPE);
+        E1000_WRITE_REG(hw, FCAH, FLOW_CONTROL_ADDRESS_HIGH);
+        E1000_WRITE_REG(hw, FCAL, FLOW_CONTROL_ADDRESS_LOW);
+    }
    E1000_WRITE_REG(hw, FCTTV, hw->fc_pause_time);
@@ -1237,12 +1316,13 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
    /* Wait 10ms for MAC to configure PHY from eeprom settings */
    msec_delay(15);
+    if (hw->mac_type != e1000_ich8lan) {
    /* Configure activity LED after PHY reset */
    led_ctrl = E1000_READ_REG(hw, LEDCTL);
    led_ctrl &= IGP_ACTIVITY_LED_MASK;
    led_ctrl |= (IGP_ACTIVITY_LED_ENABLE | IGP_LED3_MODE);
    E1000_WRITE_REG(hw, LEDCTL, led_ctrl);
+    }
    /* disable lplu d3 during driver init */
    ret_val = e1000_set_d3_lplu_state(hw, FALSE);
@@ -1478,8 +1558,7 @@ e1000_copper_link_ggp_setup(struct e1000_hw *hw)
            if (ret_val)
                return ret_val;
-            /* Enable Pass False Carrier on the PHY */
+            phy_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
-            phy_data |= GG82563_KMCR_PASS_FALSE_CARRIER;
            ret_val = e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
                                          phy_data);
@@ -1561,28 +1640,40 @@ e1000_copper_link_mgp_setup(struct e1000_hw *hw)
    phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL;
    if(hw->disable_polarity_correction == 1)
        phy_data |= M88E1000_PSCR_POLARITY_REVERSAL;
-        ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+    ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
-        if(ret_val)
+    if (ret_val)
-            return ret_val;
-    /* Force TX_CLK in the Extended PHY Specific Control Register
-     * to 25MHz clock.
-     */
-    ret_val = e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data);
-    if(ret_val)
        return ret_val;
-    phy_data |= M88E1000_EPSCR_TX_CLK_25;
    if (hw->phy_revision < M88E1011_I_REV_4) {
-        /* Configure Master and Slave downshift values */
+        /* Force TX_CLK in the Extended PHY Specific Control Register
-        phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK |
+         * to 25MHz clock.
+         */
+        ret_val = e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data);
+        if (ret_val)
+            return ret_val;
+        phy_data |= M88E1000_EPSCR_TX_CLK_25;
+        if ((hw->phy_revision == E1000_REVISION_2) &&
+            (hw->phy_id == M88E1111_I_PHY_ID)) {
+            /* Vidalia Phy, set the downshift counter to 5x */
+            phy_data &= ~(M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK);
+            phy_data |= M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X;
+            ret_val = e1000_write_phy_reg(hw,
+                                        M88E1000_EXT_PHY_SPEC_CTRL, phy_data);
+            if (ret_val)
+                return ret_val;
+        } else {
+            /* Configure Master and Slave downshift values */
+            phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK |
                              M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK);
-        phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X |
+            phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X |
                             M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X);
-        ret_val = e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_data);
+            ret_val = e1000_write_phy_reg(hw,
-        if(ret_val)
+                                        M88E1000_EXT_PHY_SPEC_CTRL, phy_data);
-            return ret_val;
+            if (ret_val)
+               return ret_val;
+        }
    }
    /* SW Reset the PHY so all changes take effect */
@@ -1620,6 +1711,10 @@ e1000_copper_link_autoneg(struct e1000_hw *hw)
    if(hw->autoneg_advertised == 0)
        hw->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+    /* IFE phy only supports 10/100 */
+    if (hw->phy_type == e1000_phy_ife)
+        hw->autoneg_advertised &= AUTONEG_ADVERTISE_10_100_ALL;
    DEBUGOUT("Reconfiguring auto-neg advertisement params\n");
    ret_val = e1000_phy_setup_autoneg(hw);
    if(ret_val) {
@@ -1717,6 +1812,26 @@ e1000_setup_copper_link(struct e1000_hw *hw)
    DEBUGFUNC("e1000_setup_copper_link");
+    switch (hw->mac_type) {
+    case e1000_80003es2lan:
+    case e1000_ich8lan:
+        /* Set the mac to wait the maximum time between each
+         * iteration and increase the max iterations when
+         * polling the phy; this fixes erroneous timeouts at 10Mbps. */
+        ret_val = e1000_write_kmrn_reg(hw, GG82563_REG(0x34, 4), 0xFFFF);
+        if (ret_val)
+            return ret_val;
+        ret_val = e1000_read_kmrn_reg(hw, GG82563_REG(0x34, 9), &reg_data);
+        if (ret_val)
+            return ret_val;
+        reg_data |= 0x3F;
+        ret_val = e1000_write_kmrn_reg(hw, GG82563_REG(0x34, 9), reg_data);
+        if (ret_val)
+            return ret_val;
+    default:
+        break;
+    }
    /* Check if it is a valid PHY and set PHY mode if necessary. */
    ret_val = e1000_copper_link_preconfig(hw);
    if(ret_val)
@@ -1724,10 +1839,8 @@ e1000_setup_copper_link(struct e1000_hw *hw)
    switch (hw->mac_type) {
    case e1000_80003es2lan:
-        ret_val = e1000_read_kmrn_reg(hw, E1000_KUMCTRLSTA_OFFSET_INB_CTRL,
+        /* Kumeran registers are written-only */
-                                      &reg_data);
+        reg_data = E1000_KUMCTRLSTA_INB_CTRL_LINK_STATUS_TX_TIMEOUT_DEFAULT;
-        if (ret_val)
-            return ret_val;
        reg_data |= E1000_KUMCTRLSTA_INB_CTRL_DIS_PADDING;
        ret_val = e1000_write_kmrn_reg(hw, E1000_KUMCTRLSTA_OFFSET_INB_CTRL,
                                       reg_data);
@@ -1739,6 +1852,7 @@ e1000_setup_copper_link(struct e1000_hw *hw)
    }
    if (hw->phy_type == e1000_phy_igp ||
+        hw->phy_type == e1000_phy_igp_3 ||
        hw->phy_type == e1000_phy_igp_2) {
        ret_val = e1000_copper_link_igp_setup(hw);
        if(ret_val)
@@ -1803,7 +1917,7 @@ e1000_setup_copper_link(struct e1000_hw *hw)
 * hw - Struct containing variables accessed by shared code
 ******************************************************************************/
 static int32_t
-e1000_configure_kmrn_for_10_100(struct e1000_hw *hw)
+e1000_configure_kmrn_for_10_100(struct e1000_hw *hw, uint16_t duplex)
 {
    int32_t ret_val = E1000_SUCCESS;
    uint32_t tipg;
@@ -1823,6 +1937,18 @@ e1000_configure_kmrn_for_10_100(struct e1000_hw *hw)
    tipg |= DEFAULT_80003ES2LAN_TIPG_IPGT_10_100;
    E1000_WRITE_REG(hw, TIPG, tipg);
+    ret_val = e1000_read_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, &reg_data);
+    if (ret_val)
+        return ret_val;
+    if (duplex == HALF_DUPLEX)
+        reg_data |= GG82563_KMCR_PASS_FALSE_CARRIER;
+    else
+        reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
+    ret_val = e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
    return ret_val;
 }
@@ -1847,6 +1973,14 @@ e1000_configure_kmrn_for_1000(struct e1000_hw *hw)
    tipg |= DEFAULT_80003ES2LAN_TIPG_IPGT_1000;
    E1000_WRITE_REG(hw, TIPG, tipg);
+    ret_val = e1000_read_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, &reg_data);
+    if (ret_val)
+        return ret_val;
+    reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
+    ret_val = e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
    return ret_val;
 }
@@ -1869,10 +2003,13 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw)
    if(ret_val)
        return ret_val;
-    /* Read the MII 1000Base-T Control Register (Address 9). */
+    if (hw->phy_type != e1000_phy_ife) {
-    ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg);
+        /* Read the MII 1000Base-T Control Register (Address 9). */
-    if(ret_val)
+        ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg);
-        return ret_val;
+        if (ret_val)
+            return ret_val;
+    } else
+        mii_1000t_ctrl_reg=0;
    /* Need to parse both autoneg_advertised and fc and set up
     * the appropriate PHY registers.  First we will parse for
@@ -1923,6 +2060,9 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw)
    if(hw->autoneg_advertised & ADVERTISE_1000_FULL) {
        DEBUGOUT("Advertise 1000mb Full duplex\n");
        mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS;
+        if (hw->phy_type == e1000_phy_ife) {
+            DEBUGOUT("e1000_phy_ife is a 10/100 PHY. Gigabit speed is not supported.\n");
+        }
    }
    /* Check for a software override of the flow control settings, and
@@ -1984,9 +2124,11 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw)
    DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
-    ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg);
+    if (hw->phy_type != e1000_phy_ife) {
-    if(ret_val)
+        ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg);
-        return ret_val;
+        if (ret_val)
+            return ret_val;
+    }
    return E1000_SUCCESS;
 }
@@ -2089,6 +2231,18 @@ e1000_phy_force_speed_duplex(struct e1000_hw *hw)
        /* Need to reset the PHY or these changes will be ignored */
        mii_ctrl_reg |= MII_CR_RESET;
+    /* Disable MDI-X support for 10/100 */
+    } else if (hw->phy_type == e1000_phy_ife) {
+        ret_val = e1000_read_phy_reg(hw, IFE_PHY_MDIX_CONTROL, &phy_data);
+        if (ret_val)
+            return ret_val;
+        phy_data &= ~IFE_PMC_AUTO_MDIX;
+        phy_data &= ~IFE_PMC_FORCE_MDIX;
+        ret_val = e1000_write_phy_reg(hw, IFE_PHY_MDIX_CONTROL, phy_data);
+        if (ret_val)
+            return ret_val;
    } else {
        /* Clear Auto-Crossover to force MDI manually.  IGP requires MDI
         * forced whenever speed or duplex are forced.
@@ -2721,8 +2875,12 @@ e1000_check_for_link(struct e1000_hw *hw)
         */
        if(hw->tbi_compatibility_en) {
            uint16_t speed, duplex;
-            e1000_get_speed_and_duplex(hw, &speed, &duplex);
+            ret_val = e1000_get_speed_and_duplex(hw, &speed, &duplex);
-            if(speed != SPEED_1000) {
+            if (ret_val) {
+                DEBUGOUT("Error getting link speed and duplex\n");
+                return ret_val;
+            }
+            if (speed != SPEED_1000) {
                /* If link speed is not set to gigabit speed, we do not need
                 * to enable TBI compatibility.
                 */
@@ -2889,7 +3047,13 @@ e1000_get_speed_and_duplex(struct e1000_hw *hw,
        if (*speed == SPEED_1000)
            ret_val = e1000_configure_kmrn_for_1000(hw);
        else
-            ret_val = e1000_configure_kmrn_for_10_100(hw);
+            ret_val = e1000_configure_kmrn_for_10_100(hw, *duplex);
+        if (ret_val)
+            return ret_val;
+    }
+    if ((hw->phy_type == e1000_phy_igp_3) && (*speed == SPEED_1000)) {
+        ret_val = e1000_kumeran_lock_loss_workaround(hw);
        if (ret_val)
            return ret_val;
    }
@@ -3079,6 +3243,9 @@ e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask)
    DEBUGFUNC("e1000_swfw_sync_acquire");
+    if (hw->swfwhw_semaphore_present)
+        return e1000_get_software_flag(hw);
    if (!hw->swfw_sync_present)
        return e1000_get_hw_eeprom_semaphore(hw);
@@ -3118,6 +3285,11 @@ e1000_swfw_sync_release(struct e1000_hw *hw, uint16_t mask)
    DEBUGFUNC("e1000_swfw_sync_release");
+    if (hw->swfwhw_semaphore_present) {
+        e1000_release_software_flag(hw);
+        return;
+    }
    if (!hw->swfw_sync_present) {
        e1000_put_hw_eeprom_semaphore(hw);
        return;
@@ -3160,7 +3332,8 @@ e1000_read_phy_reg(struct e1000_hw *hw,
    if (e1000_swfw_sync_acquire(hw, swfw))
        return -E1000_ERR_SWFW_SYNC;
-    if((hw->phy_type == e1000_phy_igp ||
+    if ((hw->phy_type == e1000_phy_igp ||
+        hw->phy_type == e1000_phy_igp_3 ||
        hw->phy_type == e1000_phy_igp_2) &&
       (reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
        ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
@@ -3299,7 +3472,8 @@ e1000_write_phy_reg(struct e1000_hw *hw,
    if (e1000_swfw_sync_acquire(hw, swfw))
        return -E1000_ERR_SWFW_SYNC;
-    if((hw->phy_type == e1000_phy_igp ||
+    if ((hw->phy_type == e1000_phy_igp ||
+        hw->phy_type == e1000_phy_igp_3 ||
        hw->phy_type == e1000_phy_igp_2) &&
       (reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
        ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
@@ -3514,7 +3688,7 @@ e1000_phy_hw_reset(struct e1000_hw *hw)
        E1000_WRITE_FLUSH(hw);
        if (hw->mac_type >= e1000_82571)
-            msec_delay(10);
+            msec_delay_irq(10);
        e1000_swfw_sync_release(hw, swfw);
    } else {
        /* Read the Extended Device Control Register, assert the PHY_RESET_DIR
@@ -3544,6 +3718,12 @@ e1000_phy_hw_reset(struct e1000_hw *hw)
    ret_val = e1000_get_phy_cfg_done(hw);
    e1000_release_software_semaphore(hw);
+        if ((hw->mac_type == e1000_ich8lan) &&
+            (hw->phy_type == e1000_phy_igp_3)) {
+            ret_val = e1000_init_lcd_from_nvm(hw);
+            if (ret_val)
+                return ret_val;
+        }
    return ret_val;
 }
@@ -3572,9 +3752,11 @@ e1000_phy_reset(struct e1000_hw *hw)
    case e1000_82541_rev_2:
    case e1000_82571:
    case e1000_82572:
+    case e1000_ich8lan:
        ret_val = e1000_phy_hw_reset(hw);
        if(ret_val)
            return ret_val;
        break;
    default:
        ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
@@ -3597,11 +3779,120 @@ e1000_phy_reset(struct e1000_hw *hw)
 }
 /******************************************************************************
+* Work-around for 82566 power-down: on D3 entry-
+* 1) disable gigabit link
+* 2) write VR power-down enable
+* 3) read it back
+* if successful continue, else issue LCD reset and repeat
+*
+* hw - struct containing variables accessed by shared code
+******************************************************************************/
+void
+e1000_phy_powerdown_workaround(struct e1000_hw *hw)
+{
+    int32_t reg;
+    uint16_t phy_data;
+    int32_t retry = 0;
+    DEBUGFUNC("e1000_phy_powerdown_workaround");
+    if (hw->phy_type != e1000_phy_igp_3)
+        return;
+    do {
+        /* Disable link */
+        reg = E1000_READ_REG(hw, PHY_CTRL);
+        E1000_WRITE_REG(hw, PHY_CTRL, reg | E1000_PHY_CTRL_GBE_DISABLE |
+                        E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
+        /* Write VR power-down enable */
+        e1000_read_phy_reg(hw, IGP3_VR_CTRL, &phy_data);
+        e1000_write_phy_reg(hw, IGP3_VR_CTRL, phy_data |
+                            IGP3_VR_CTRL_MODE_SHUT);
+        /* Read it back and test */
+        e1000_read_phy_reg(hw, IGP3_VR_CTRL, &phy_data);
+        if ((phy_data & IGP3_VR_CTRL_MODE_SHUT) || retry)
+            break;
+        /* Issue PHY reset and repeat at most one more time */
+        reg = E1000_READ_REG(hw, CTRL);
+        E1000_WRITE_REG(hw, CTRL, reg | E1000_CTRL_PHY_RST);
+        retry++;
+    } while (retry);
+    return;
+}
+/******************************************************************************
+* Work-around for 82566 Kumeran PCS lock loss:
+* On link status change (i.e. PCI reset, speed change) and link is up and
+* speed is gigabit-
+* 0) if workaround is optionally disabled do nothing
+* 1) wait 1ms for Kumeran link to come up
+* 2) check Kumeran Diagnostic register PCS lock loss bit
+* 3) if not set the link is locked (all is good), otherwise...
+* 4) reset the PHY
+* 5) repeat up to 10 times
+* Note: this is only called for IGP3 copper when speed is 1gb.
+*
+* hw - struct containing variables accessed by shared code
+******************************************************************************/
+int32_t
+e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw)
+{
+    int32_t ret_val;
+    int32_t reg;
+    int32_t cnt;
+    uint16_t phy_data;
+    if (hw->kmrn_lock_loss_workaround_disabled)
+        return E1000_SUCCESS;
+    /* Make sure link is up before proceeding. If not just return.
+     * Attempting this while link is negotiating fouls up link
+     * stability */
+    ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
+    ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
+    if (phy_data & MII_SR_LINK_STATUS) {
+        for (cnt = 0; cnt < 10; cnt++) {
+            /* read once to clear */
+            ret_val = e1000_read_phy_reg(hw, IGP3_KMRN_DIAG, &phy_data);
+            if (ret_val)
+                return ret_val;
+            /* and again to get new status */
+            ret_val = e1000_read_phy_reg(hw, IGP3_KMRN_DIAG, &phy_data);
+            if (ret_val)
+                return ret_val;
+            /* check for PCS lock */
+            if (!(phy_data & IGP3_KMRN_DIAG_PCS_LOCK_LOSS))
+                return E1000_SUCCESS;
+            /* Issue PHY reset */
+            e1000_phy_hw_reset(hw);
+            msec_delay_irq(5);
+        }
+        /* Disable GigE link negotiation */
+        reg = E1000_READ_REG(hw, PHY_CTRL);
+        E1000_WRITE_REG(hw, PHY_CTRL, reg | E1000_PHY_CTRL_GBE_DISABLE |
+                        E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
+        /* unable to acquire PCS lock */
+        return E1000_ERR_PHY;
+    }
+    return E1000_SUCCESS;
+}
+/******************************************************************************
 * Probes the expected PHY address for known PHY IDs
 *
 * hw - Struct containing variables accessed by shared code
 ******************************************************************************/
-static int32_t
+int32_t
 e1000_detect_gig_phy(struct e1000_hw *hw)
 {
    int32_t phy_init_status, ret_val;
@@ -3613,8 +3904,8 @@ e1000_detect_gig_phy(struct e1000_hw *hw)
    /* The 82571 firmware may still be configuring the PHY.  In this
     * case, we cannot access the PHY until the configuration is done.  So
     * we explicitly set the PHY values. */
-    if(hw->mac_type == e1000_82571 ||
+    if (hw->mac_type == e1000_82571 ||
-       hw->mac_type == e1000_82572) {
+        hw->mac_type == e1000_82572) {
        hw->phy_id = IGP01E1000_I_PHY_ID;
        hw->phy_type = e1000_phy_igp_2;
        return E1000_SUCCESS;
@@ -3631,7 +3922,7 @@ e1000_detect_gig_phy(struct e1000_hw *hw)
    /* Read the PHY ID Registers to identify which PHY is onboard. */
    ret_val = e1000_read_phy_reg(hw, PHY_ID1, &phy_id_high);
-    if(ret_val)
+    if (ret_val)
        return ret_val;
    hw->phy_id = (uint32_t) (phy_id_high << 16);
@@ -3669,6 +3960,12 @@ e1000_detect_gig_phy(struct e1000_hw *hw)
    case e1000_80003es2lan:
        if (hw->phy_id == GG82563_E_PHY_ID) match = TRUE;
        break;
+    case e1000_ich8lan:
+        if (hw->phy_id == IGP03E1000_E_PHY_ID) match = TRUE;
+        if (hw->phy_id == IFE_E_PHY_ID) match = TRUE;
+        if (hw->phy_id == IFE_PLUS_E_PHY_ID) match = TRUE;
+        if (hw->phy_id == IFE_C_E_PHY_ID) match = TRUE;
+        break;
    default:
        DEBUGOUT1("Invalid MAC type %d\n", hw->mac_type);
        return -E1000_ERR_CONFIG;
@@ -3784,6 +4081,53 @@ e1000_phy_igp_get_info(struct e1000_hw *hw,
 }
 /******************************************************************************
+* Get PHY information from various PHY registers for ife PHY only.
+*
+* hw - Struct containing variables accessed by shared code
+* phy_info - PHY information structure
+******************************************************************************/
+int32_t
+e1000_phy_ife_get_info(struct e1000_hw *hw,
+                       struct e1000_phy_info *phy_info)
+{
+    int32_t ret_val;
+    uint16_t phy_data, polarity;
+    DEBUGFUNC("e1000_phy_ife_get_info");
+    phy_info->downshift = (e1000_downshift)hw->speed_downgraded;
+    phy_info->extended_10bt_distance = e1000_10bt_ext_dist_enable_normal;
+    ret_val = e1000_read_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL, &phy_data);
+    if (ret_val)
+        return ret_val;
+    phy_info->polarity_correction =
+                        (phy_data & IFE_PSC_AUTO_POLARITY_DISABLE) >>
+                        IFE_PSC_AUTO_POLARITY_DISABLE_SHIFT;
+    if (phy_info->polarity_correction == e1000_polarity_reversal_enabled) {
+        ret_val = e1000_check_polarity(hw, &polarity);
+        if (ret_val)
+            return ret_val;
+    } else {
+        /* Polarity is forced. */
+        polarity = (phy_data & IFE_PSC_FORCE_POLARITY) >>
+                       IFE_PSC_FORCE_POLARITY_SHIFT;
+    }
+    phy_info->cable_polarity = polarity;
+    ret_val = e1000_read_phy_reg(hw, IFE_PHY_MDIX_CONTROL, &phy_data);
+    if (ret_val)
+        return ret_val;
+    phy_info->mdix_mode =
+                     (phy_data & (IFE_PMC_AUTO_MDIX | IFE_PMC_FORCE_MDIX)) >>
+                     IFE_PMC_MDIX_MODE_SHIFT;
+    return E1000_SUCCESS;
+}
+/******************************************************************************
 * Get PHY information from various PHY registers fot m88 PHY only.
 *
 * hw - Struct containing variables accessed by shared code
@@ -3898,9 +4242,12 @@ e1000_phy_get_info(struct e1000_hw *hw,
        return -E1000_ERR_CONFIG;
    }
-    if(hw->phy_type == e1000_phy_igp ||
+    if (hw->phy_type == e1000_phy_igp ||
+        hw->phy_type == e1000_phy_igp_3 ||
        hw->phy_type == e1000_phy_igp_2)
        return e1000_phy_igp_get_info(hw, phy_info);
+    else if (hw->phy_type == e1000_phy_ife)
+        return e1000_phy_ife_get_info(hw, phy_info);
    else
        return e1000_phy_m88_get_info(hw, phy_info);
 }
@@ -4049,6 +4396,35 @@ e1000_init_eeprom_params(struct e1000_hw *hw)
        eeprom->use_eerd = TRUE;
        eeprom->use_eewr = FALSE;
        break;
+    case e1000_ich8lan:
+    {
+        int32_t  i = 0;
+        uint32_t flash_size = E1000_READ_ICH8_REG(hw, ICH8_FLASH_GFPREG);
+        eeprom->type = e1000_eeprom_ich8;
+        eeprom->use_eerd = FALSE;
+        eeprom->use_eewr = FALSE;
+        eeprom->word_size = E1000_SHADOW_RAM_WORDS;
+        /* Zero the shadow RAM structure. But don't load it from NVM
+         * so as to save time for driver init */
+        if (hw->eeprom_shadow_ram != NULL) {
+            for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) {
+                hw->eeprom_shadow_ram[i].modified = FALSE;
+                hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF;
+            }
+        }
+        hw->flash_base_addr = (flash_size & ICH8_GFPREG_BASE_MASK) *
+                              ICH8_FLASH_SECTOR_SIZE;
+        hw->flash_bank_size = ((flash_size >> 16) & ICH8_GFPREG_BASE_MASK) + 1;
+        hw->flash_bank_size -= (flash_size & ICH8_GFPREG_BASE_MASK);
+        hw->flash_bank_size *= ICH8_FLASH_SECTOR_SIZE;
+        hw->flash_bank_size /= 2 * sizeof(uint16_t);
+        break;
+    }
    default:
        break;
    }
@@ -4469,7 +4845,10 @@ e1000_read_eeprom(struct e1000_hw *hw,
        return ret_val;
    }
-    if(eeprom->type == e1000_eeprom_spi) {
+    if (eeprom->type == e1000_eeprom_ich8)
+        return e1000_read_eeprom_ich8(hw, offset, words, data);
+    if (eeprom->type == e1000_eeprom_spi) {
        uint16_t word_in;
        uint8_t read_opcode = EEPROM_READ_OPCODE_SPI;
@@ -4636,7 +5015,10 @@ e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw)
    DEBUGFUNC("e1000_is_onboard_nvm_eeprom");
-    if(hw->mac_type == e1000_82573) {
+    if (hw->mac_type == e1000_ich8lan)
+        return FALSE;
+    if (hw->mac_type == e1000_82573) {
        eecd = E1000_READ_REG(hw, EECD);
        /* Isolate bits 15 & 16 */
@@ -4686,8 +5068,22 @@ e1000_validate_eeprom_checksum(struct e1000_hw *hw)
        }
    }
-    for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
+    if (hw->mac_type == e1000_ich8lan) {
-        if(e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) {
+        /* Drivers must allocate the shadow ram structure for the
+         * EEPROM checksum to be updated.  Otherwise, this bit as well
+         * as the checksum must both be set correctly for this
+         * validation to pass.
+         */
+        e1000_read_eeprom(hw, 0x19, 1, &eeprom_data);
+        if ((eeprom_data & 0x40) == 0) {
+            eeprom_data |= 0x40;
+            e1000_write_eeprom(hw, 0x19, 1, &eeprom_data);
+            e1000_update_eeprom_checksum(hw);
+        }
+    }
+    for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
+        if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) {
            DEBUGOUT("EEPROM Read Error\n");
            return -E1000_ERR_EEPROM;
        }
@@ -4713,6 +5109,7 @@ e1000_validate_eeprom_checksum(struct e1000_hw *hw)
 int32_t
 e1000_update_eeprom_checksum(struct e1000_hw *hw)
 {
+    uint32_t ctrl_ext;
    uint16_t checksum = 0;
    uint16_t i, eeprom_data;
@@ -4731,6 +5128,14 @@ e1000_update_eeprom_checksum(struct e1000_hw *hw)
        return -E1000_ERR_EEPROM;
    } else if (hw->eeprom.type == e1000_eeprom_flash) {
        e1000_commit_shadow_ram(hw);
+    } else if (hw->eeprom.type == e1000_eeprom_ich8) {
+        e1000_commit_shadow_ram(hw);
+        /* Reload the EEPROM, or else modifications will not appear
+         * until after next adapter reset. */
+        ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
+        ctrl_ext |= E1000_CTRL_EXT_EE_RST;
+        E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
+        msec_delay(10);
    }
    return E1000_SUCCESS;
 }
@@ -4770,6 +5175,9 @@ e1000_write_eeprom(struct e1000_hw *hw,
    if(eeprom->use_eewr == TRUE)
        return e1000_write_eeprom_eewr(hw, offset, words, data);
+    if (eeprom->type == e1000_eeprom_ich8)
+        return e1000_write_eeprom_ich8(hw, offset, words, data);
    /* Prepare the EEPROM for writing  */
    if (e1000_acquire_eeprom(hw) != E1000_SUCCESS)
        return -E1000_ERR_EEPROM;
@@ -4957,11 +5365,17 @@ e1000_commit_shadow_ram(struct e1000_hw *hw)
    uint32_t flop = 0;
    uint32_t i = 0;
    int32_t error = E1000_SUCCESS;
+    uint32_t old_bank_offset = 0;
-    /* The flop register will be used to determine if flash type is STM */
+    uint32_t new_bank_offset = 0;
-    flop = E1000_READ_REG(hw, FLOP);
+    uint32_t sector_retries = 0;
+    uint8_t low_byte = 0;
+    uint8_t high_byte = 0;
+    uint8_t temp_byte = 0;
+    boolean_t sector_write_failed = FALSE;
    if (hw->mac_type == e1000_82573) {
+        /* The flop register will be used to determine if flash type is STM */
+        flop = E1000_READ_REG(hw, FLOP);
        for (i=0; i < attempts; i++) {
            eecd = E1000_READ_REG(hw, EECD);
            if ((eecd & E1000_EECD_FLUPD) == 0) {
@@ -4995,6 +5409,106 @@ e1000_commit_shadow_ram(struct e1000_hw *hw)
        }
    }
+    if (hw->mac_type == e1000_ich8lan && hw->eeprom_shadow_ram != NULL) {
+        /* We're writing to the opposite bank so if we're on bank 1,
+         * write to bank 0 etc.  We also need to erase the segment that
+         * is going to be written */
+        if (!(E1000_READ_REG(hw, EECD) & E1000_EECD_SEC1VAL)) {
+            new_bank_offset = hw->flash_bank_size * 2;
+            old_bank_offset = 0;
+            e1000_erase_ich8_4k_segment(hw, 1);
+        } else {
+            old_bank_offset = hw->flash_bank_size * 2;
+            new_bank_offset = 0;
+            e1000_erase_ich8_4k_segment(hw, 0);
+        }
+        do {
+            sector_write_failed = FALSE;
+            /* Loop for every byte in the shadow RAM,
+             * which is in units of words. */
+            for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) {
+                /* Determine whether to write the value stored
+                 * in the other NVM bank or a modified value stored
+                 * in the shadow RAM */
+                if (hw->eeprom_shadow_ram[i].modified == TRUE) {
+                    low_byte = (uint8_t)hw->eeprom_shadow_ram[i].eeprom_word;
+                    e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset,
+                                         &temp_byte);
+                    udelay(100);
+                    error = e1000_verify_write_ich8_byte(hw,
+                                                 (i << 1) + new_bank_offset,
+                                                 low_byte);
+                    if (error != E1000_SUCCESS)
+                        sector_write_failed = TRUE;
+                    high_byte =
+                        (uint8_t)(hw->eeprom_shadow_ram[i].eeprom_word >> 8);
+                    e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset + 1,
+                                         &temp_byte);
+                    udelay(100);
+                } else {
+                    e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset,
+                                         &low_byte);
+                    udelay(100);
+                    error = e1000_verify_write_ich8_byte(hw,
+                                 (i << 1) + new_bank_offset, low_byte);
+                    if (error != E1000_SUCCESS)
+                        sector_write_failed = TRUE;
+                    e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset + 1,
+                                         &high_byte);
+                }
+                /* If the word is 0x13, then make sure the signature bits
+                 * (15:14) are 11b until the commit has completed.
+                 * This will allow us to write 10b which indicates the
+                 * signature is valid.  We want to do this after the write
+                 * has completed so that we don't mark the segment valid
+                 * while the write is still in progress */
+                if (i == E1000_ICH8_NVM_SIG_WORD)
+                    high_byte = E1000_ICH8_NVM_SIG_MASK | high_byte;
+                error = e1000_verify_write_ich8_byte(hw,
+                             (i << 1) + new_bank_offset + 1, high_byte);
+                if (error != E1000_SUCCESS)
+                    sector_write_failed = TRUE;
+                if (sector_write_failed == FALSE) {
+                    /* Clear the now not used entry in the cache */
+                    hw->eeprom_shadow_ram[i].modified = FALSE;
+                    hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF;
+                }
+            }
+            /* Don't bother writing the segment valid bits if sector
+             * programming failed. */
+            if (sector_write_failed == FALSE) {
+                /* Finally validate the new segment by setting bit 15:14
+                 * to 10b in word 0x13 , this can be done without an
+                 * erase as well since these bits are 11 to start with
+                 * and we need to change bit 14 to 0b */
+                e1000_read_ich8_byte(hw,
+                    E1000_ICH8_NVM_SIG_WORD * 2 + 1 + new_bank_offset,
+                    &high_byte);
+                high_byte &= 0xBF;
+                error = e1000_verify_write_ich8_byte(hw,
+                            E1000_ICH8_NVM_SIG_WORD * 2 + 1 + new_bank_offset,
+                            high_byte);
+                if (error != E1000_SUCCESS)
+                    sector_write_failed = TRUE;
+                /* And invalidate the previously valid segment by setting
+                 * its signature word (0x13) high_byte to 0b. This can be
+                 * done without an erase because flash erase sets all bits
+                 * to 1's. We can write 1's to 0's without an erase */
+                error = e1000_verify_write_ich8_byte(hw,
+                            E1000_ICH8_NVM_SIG_WORD * 2 + 1 + old_bank_offset,
+                            0);
+                if (error != E1000_SUCCESS)
+                    sector_write_failed = TRUE;
+            }
+        } while (++sector_retries < 10 && sector_write_failed == TRUE);
+    }
    return error;
 }
@@ -5102,15 +5616,19 @@ e1000_init_rx_addrs(struct e1000_hw *hw)
     * the other port. */
    if ((hw->mac_type == e1000_82571) && (hw->laa_is_present == TRUE))
        rar_num -= 1;
+    if (hw->mac_type == e1000_ich8lan)
+        rar_num = E1000_RAR_ENTRIES_ICH8LAN;
    /* Zero out the other 15 receive addresses. */
    DEBUGOUT("Clearing RAR[1-15]\n");
    for(i = 1; i < rar_num; i++) {
        E1000_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
+        E1000_WRITE_FLUSH(hw);
        E1000_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
+        E1000_WRITE_FLUSH(hw);
    }
 }
-#if 0
 /******************************************************************************
 * Updates the MAC's list of multicast addresses.
 *
@@ -5145,6 +5663,8 @@ e1000_mc_addr_list_update(struct e1000_hw *hw,
    /* Clear RAR[1-15] */
    DEBUGOUT(" Clearing RAR[1-15]\n");
    num_rar_entry = E1000_RAR_ENTRIES;
+    if (hw->mac_type == e1000_ich8lan)
+        num_rar_entry = E1000_RAR_ENTRIES_ICH8LAN;
    /* Reserve a spot for the Locally Administered Address to work around
     * an 82571 issue in which a reset on one port will reload the MAC on
     * the other port. */
@@ -5153,14 +5673,19 @@ e1000_mc_addr_list_update(struct e1000_hw *hw,
    for(i = rar_used_count; i < num_rar_entry; i++) {
        E1000_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
+        E1000_WRITE_FLUSH(hw);
        E1000_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
+        E1000_WRITE_FLUSH(hw);
    }
    /* Clear the MTA */
    DEBUGOUT(" Clearing MTA\n");
    num_mta_entry = E1000_NUM_MTA_REGISTERS;
+    if (hw->mac_type == e1000_ich8lan)
+        num_mta_entry = E1000_NUM_MTA_REGISTERS_ICH8LAN;
    for(i = 0; i < num_mta_entry; i++) {
        E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
+        E1000_WRITE_FLUSH(hw);
    }
    /* Add the new addresses */
@@ -5194,7 +5719,6 @@ e1000_mc_addr_list_update(struct e1000_hw *hw,
    }
    DEBUGOUT("MC Update Complete\n");
 }
-#endif  /*  0  */
 /******************************************************************************
 * Hashes an address to determine its location in the multicast table
@@ -5217,24 +5741,46 @@ e1000_hash_mc_addr(struct e1000_hw *hw,
     * LSB                 MSB
     */
    case 0:
-        /* [47:36] i.e. 0x563 for above example address */
+        if (hw->mac_type == e1000_ich8lan) {
-        hash_value = ((mc_addr[4] >> 4) | (((uint16_t) mc_addr[5]) << 4));
+            /* [47:38] i.e. 0x158 for above example address */
+            hash_value = ((mc_addr[4] >> 6) | (((uint16_t) mc_addr[5]) << 2));
+        } else {
+            /* [47:36] i.e. 0x563 for above example address */
+            hash_value = ((mc_addr[4] >> 4) | (((uint16_t) mc_addr[5]) << 4));
+        }
        break;
    case 1:
-        /* [46:35] i.e. 0xAC6 for above example address */
+        if (hw->mac_type == e1000_ich8lan) {
-        hash_value = ((mc_addr[4] >> 3) | (((uint16_t) mc_addr[5]) << 5));
+            /* [46:37] i.e. 0x2B1 for above example address */
+            hash_value = ((mc_addr[4] >> 5) | (((uint16_t) mc_addr[5]) << 3));
+        } else {
+            /* [46:35] i.e. 0xAC6 for above example address */
+            hash_value = ((mc_addr[4] >> 3) | (((uint16_t) mc_addr[5]) << 5));
+        }
        break;
    case 2:
-        /* [45:34] i.e. 0x5D8 for above example address */
+        if (hw->mac_type == e1000_ich8lan) {
-        hash_value = ((mc_addr[4] >> 2) | (((uint16_t) mc_addr[5]) << 6));
+            /*[45:36] i.e. 0x163 for above example address */
+            hash_value = ((mc_addr[4] >> 4) | (((uint16_t) mc_addr[5]) << 4));
+        } else {
+            /* [45:34] i.e. 0x5D8 for above example address */
+            hash_value = ((mc_addr[4] >> 2) | (((uint16_t) mc_addr[5]) << 6));
+        }
        break;
    case 3:
-        /* [43:32] i.e. 0x634 for above example address */
+        if (hw->mac_type == e1000_ich8lan) {
-        hash_value = ((mc_addr[4]) | (((uint16_t) mc_addr[5]) << 8));
+            /* [43:34] i.e. 0x18D for above example address */
+            hash_value = ((mc_addr[4] >> 2) | (((uint16_t) mc_addr[5]) << 6));
+        } else {
+            /* [43:32] i.e. 0x634 for above example address */
+            hash_value = ((mc_addr[4]) | (((uint16_t) mc_addr[5]) << 8));
+        }
        break;
    }
    hash_value &= 0xFFF;
+    if (hw->mac_type == e1000_ich8lan)
+        hash_value &= 0x3FF;
    return hash_value;
 }
@@ -5262,6 +5808,8 @@ e1000_mta_set(struct e1000_hw *hw,
     * register are determined by the lower 5 bits of the value.
     */
    hash_reg = (hash_value >> 5) & 0x7F;
+    if (hw->mac_type == e1000_ich8lan)
+        hash_reg &= 0x1F;
    hash_bit = hash_value & 0x1F;
    mta = E1000_READ_REG_ARRAY(hw, MTA, hash_reg);
@@ -5275,9 +5823,12 @@ e1000_mta_set(struct e1000_hw *hw,
    if((hw->mac_type == e1000_82544) && ((hash_reg & 0x1) == 1)) {
        temp = E1000_READ_REG_ARRAY(hw, MTA, (hash_reg - 1));
        E1000_WRITE_REG_ARRAY(hw, MTA, hash_reg, mta);
+        E1000_WRITE_FLUSH(hw);
        E1000_WRITE_REG_ARRAY(hw, MTA, (hash_reg - 1), temp);
+        E1000_WRITE_FLUSH(hw);
    } else {
        E1000_WRITE_REG_ARRAY(hw, MTA, hash_reg, mta);
+        E1000_WRITE_FLUSH(hw);
    }
 }
@@ -5334,7 +5885,9 @@ e1000_rar_set(struct e1000_hw *hw,
    }
    E1000_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low);
+    E1000_WRITE_FLUSH(hw);
    E1000_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high);
+    E1000_WRITE_FLUSH(hw);
 }
 /******************************************************************************
@@ -5351,12 +5904,18 @@ e1000_write_vfta(struct e1000_hw *hw,
 {
    uint32_t temp;
-    if((hw->mac_type == e1000_82544) && ((offset & 0x1) == 1)) {
+    if (hw->mac_type == e1000_ich8lan)
+        return;
+    if ((hw->mac_type == e1000_82544) && ((offset & 0x1) == 1)) {
        temp = E1000_READ_REG_ARRAY(hw, VFTA, (offset - 1));
        E1000_WRITE_REG_ARRAY(hw, VFTA, offset, value);
+        E1000_WRITE_FLUSH(hw);
        E1000_WRITE_REG_ARRAY(hw, VFTA, (offset - 1), temp);
+        E1000_WRITE_FLUSH(hw);
    } else {
        E1000_WRITE_REG_ARRAY(hw, VFTA, offset, value);
+        E1000_WRITE_FLUSH(hw);
    }
 }
@@ -5373,6 +5932,9 @@ e1000_clear_vfta(struct e1000_hw *hw)
    uint32_t vfta_offset = 0;
    uint32_t vfta_bit_in_reg = 0;
+    if (hw->mac_type == e1000_ich8lan)
+        return;
    if (hw->mac_type == e1000_82573) {
        if (hw->mng_cookie.vlan_id != 0) {
            /* The VFTA is a 4096b bit-field, each identifying a single VLAN
@@ -5392,6 +5954,7 @@ e1000_clear_vfta(struct e1000_hw *hw)
         * manageability unit */
        vfta_value = (offset == vfta_offset) ? vfta_bit_in_reg : 0;
        E1000_WRITE_REG_ARRAY(hw, VFTA, offset, vfta_value);
+        E1000_WRITE_FLUSH(hw);
    }
 }
@@ -5421,9 +5984,18 @@ e1000_id_led_init(struct e1000_hw * hw)
        DEBUGOUT("EEPROM Read Error\n");
        return -E1000_ERR_EEPROM;
    }
-    if((eeprom_data== ID_LED_RESERVED_0000) ||
-       (eeprom_data == ID_LED_RESERVED_FFFF)) eeprom_data = ID_LED_DEFAULT;
+    if ((hw->mac_type == e1000_82573) &&
-    for(i = 0; i < 4; i++) {
+        (eeprom_data == ID_LED_RESERVED_82573))
+        eeprom_data = ID_LED_DEFAULT_82573;
+    else if ((eeprom_data == ID_LED_RESERVED_0000) ||
+            (eeprom_data == ID_LED_RESERVED_FFFF)) {
+        if (hw->mac_type == e1000_ich8lan)
+            eeprom_data = ID_LED_DEFAULT_ICH8LAN;
+        else
+            eeprom_data = ID_LED_DEFAULT;
+    }
+    for (i = 0; i < 4; i++) {
        temp = (eeprom_data >> (i << 2)) & led_mask;
        switch(temp) {
        case ID_LED_ON1_DEF2:
@@ -5519,6 +6091,44 @@ e1000_setup_led(struct e1000_hw *hw)
 }
 /******************************************************************************
+ * Used on 82571 and later Si that has LED blink bits.
+ * Callers must use their own timer and should have already called
+ * e1000_id_led_init()
+ * Call e1000_cleanup led() to stop blinking
+ *
+ * hw - Struct containing variables accessed by shared code
+ *****************************************************************************/
+int32_t
+e1000_blink_led_start(struct e1000_hw *hw)
+{
+    int16_t  i;
+    uint32_t ledctl_blink = 0;
+    DEBUGFUNC("e1000_id_led_blink_on");
+    if (hw->mac_type < e1000_82571) {
+        /* Nothing to do */
+        return E1000_SUCCESS;
+    }
+    if (hw->media_type == e1000_media_type_fiber) {
+        /* always blink LED0 for PCI-E fiber */
+        ledctl_blink = E1000_LEDCTL_LED0_BLINK |
+                     (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT);
+    } else {
+        /* set the blink bit for each LED that's "on" (0x0E) in ledctl_mode2 */
+        ledctl_blink = hw->ledctl_mode2;
+        for (i=0; i < 4; i++)
+            if (((hw->ledctl_mode2 >> (i * 8)) & 0xFF) ==
+                E1000_LEDCTL_MODE_LED_ON)
+                ledctl_blink |= (E1000_LEDCTL_LED0_BLINK << (i * 8));
+    }
+    E1000_WRITE_REG(hw, LEDCTL, ledctl_blink);
+    return E1000_SUCCESS;
+}
+/******************************************************************************
 * Restores the saved state of the SW controlable LED.
 *
 * hw - Struct containing variables accessed by shared code
@@ -5548,6 +6158,10 @@ e1000_cleanup_led(struct e1000_hw *hw)
            return ret_val;
        /* Fall Through */
    default:
+        if (hw->phy_type == e1000_phy_ife) {
+            e1000_write_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);
+            break;
+        }
        /* Restore LEDCTL settings */
        E1000_WRITE_REG(hw, LEDCTL, hw->ledctl_default);
        break;
@@ -5592,7 +6206,10 @@ e1000_led_on(struct e1000_hw *hw)
            /* Clear SW Defineable Pin 0 to turn on the LED */
            ctrl &= ~E1000_CTRL_SWDPIN0;
            ctrl |= E1000_CTRL_SWDPIO0;
-        } else if(hw->media_type == e1000_media_type_copper) {
+        } else if (hw->phy_type == e1000_phy_ife) {
+            e1000_write_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED,
+                 (IFE_PSCL_PROBE_MODE | IFE_PSCL_PROBE_LEDS_ON));
+        } else if (hw->media_type == e1000_media_type_copper) {
            E1000_WRITE_REG(hw, LEDCTL, hw->ledctl_mode2);
            return E1000_SUCCESS;
        }
@@ -5640,7 +6257,10 @@ e1000_led_off(struct e1000_hw *hw)
            /* Set SW Defineable Pin 0 to turn off the LED */
            ctrl |= E1000_CTRL_SWDPIN0;
            ctrl |= E1000_CTRL_SWDPIO0;
-        } else if(hw->media_type == e1000_media_type_copper) {
+        } else if (hw->phy_type == e1000_phy_ife) {
+            e1000_write_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED,
+                 (IFE_PSCL_PROBE_MODE | IFE_PSCL_PROBE_LEDS_OFF));
+        } else if (hw->media_type == e1000_media_type_copper) {
            E1000_WRITE_REG(hw, LEDCTL, hw->ledctl_mode1);
            return E1000_SUCCESS;
        }
@@ -5678,12 +6298,16 @@ e1000_clear_hw_cntrs(struct e1000_hw *hw)
    temp = E1000_READ_REG(hw, XOFFRXC);
    temp = E1000_READ_REG(hw, XOFFTXC);
    temp = E1000_READ_REG(hw, FCRUC);
+    if (hw->mac_type != e1000_ich8lan) {
    temp = E1000_READ_REG(hw, PRC64);
    temp = E1000_READ_REG(hw, PRC127);
    temp = E1000_READ_REG(hw, PRC255);
    temp = E1000_READ_REG(hw, PRC511);
    temp = E1000_READ_REG(hw, PRC1023);
    temp = E1000_READ_REG(hw, PRC1522);
+    }
    temp = E1000_READ_REG(hw, GPRC);
    temp = E1000_READ_REG(hw, BPRC);
    temp = E1000_READ_REG(hw, MPRC);
@@ -5703,12 +6327,16 @@ e1000_clear_hw_cntrs(struct e1000_hw *hw)
    temp = E1000_READ_REG(hw, TOTH);
    temp = E1000_READ_REG(hw, TPR);
    temp = E1000_READ_REG(hw, TPT);
+    if (hw->mac_type != e1000_ich8lan) {
    temp = E1000_READ_REG(hw, PTC64);
    temp = E1000_READ_REG(hw, PTC127);
    temp = E1000_READ_REG(hw, PTC255);
    temp = E1000_READ_REG(hw, PTC511);
    temp = E1000_READ_REG(hw, PTC1023);
    temp = E1000_READ_REG(hw, PTC1522);
+    }
    temp = E1000_READ_REG(hw, MPTC);
    temp = E1000_READ_REG(hw, BPTC);
@@ -5731,6 +6359,9 @@ e1000_clear_hw_cntrs(struct e1000_hw *hw)
    temp = E1000_READ_REG(hw, IAC);
    temp = E1000_READ_REG(hw, ICRXOC);
+    if (hw->mac_type == e1000_ich8lan) return;
    temp = E1000_READ_REG(hw, ICRXPTC);
    temp = E1000_READ_REG(hw, ICRXATC);
    temp = E1000_READ_REG(hw, ICTXPTC);
@@ -5911,6 +6542,7 @@ e1000_get_bus_info(struct e1000_hw *hw)
        hw->bus_width = e1000_bus_width_pciex_1;
        break;
    case e1000_82571:
+    case e1000_ich8lan:
    case e1000_80003es2lan:
        hw->bus_type = e1000_bus_type_pci_express;
        hw->bus_speed = e1000_bus_speed_2500;
@@ -5948,8 +6580,6 @@ e1000_get_bus_info(struct e1000_hw *hw)
        break;
    }
 }
-#if 0
 /******************************************************************************
 * Reads a value from one of the devices registers using port I/O (as opposed
 * memory mapped I/O). Only 82544 and newer devices support port I/O.
@@ -5967,7 +6597,6 @@ e1000_read_reg_io(struct e1000_hw *hw,
    e1000_io_write(hw, io_addr, offset);
    return e1000_io_read(hw, io_data);
 }
-#endif  /*  0  */
 /******************************************************************************
 * Writes a value to one of the devices registers using port I/O (as opposed to
@@ -6012,8 +6641,6 @@ e1000_get_cable_length(struct e1000_hw *hw,
 {
    int32_t ret_val;
    uint16_t agc_value = 0;
-    uint16_t cur_agc, min_agc = IGP01E1000_AGC_LENGTH_TABLE_SIZE;
-    uint16_t max_agc = 0;
    uint16_t i, phy_data;
    uint16_t cable_length;
@@ -6086,6 +6713,8 @@ e1000_get_cable_length(struct e1000_hw *hw,
            break;
        }
    } else if(hw->phy_type == e1000_phy_igp) { /* For IGP PHY */
+        uint16_t cur_agc_value;
+        uint16_t min_agc_value = IGP01E1000_AGC_LENGTH_TABLE_SIZE;
        uint16_t agc_reg_array[IGP01E1000_PHY_CHANNEL_NUM] =
                                                         {IGP01E1000_PHY_AGC_A,
                                                          IGP01E1000_PHY_AGC_B,
@@ -6098,23 +6727,23 @@ e1000_get_cable_length(struct e1000_hw *hw,
            if(ret_val)
                return ret_val;
-            cur_agc = phy_data >> IGP01E1000_AGC_LENGTH_SHIFT;
+            cur_agc_value = phy_data >> IGP01E1000_AGC_LENGTH_SHIFT;
-            /* Array bound check. */
+            /* Value bound check. */
-            if((cur_agc >= IGP01E1000_AGC_LENGTH_TABLE_SIZE - 1) ||
+            if ((cur_agc_value >= IGP01E1000_AGC_LENGTH_TABLE_SIZE - 1) ||
-               (cur_agc == 0))
+                (cur_agc_value == 0))
                return -E1000_ERR_PHY;
-            agc_value += cur_agc;
+            agc_value += cur_agc_value;
            /* Update minimal AGC value. */
-            if(min_agc > cur_agc)
+            if (min_agc_value > cur_agc_value)
-                min_agc = cur_agc;
+                min_agc_value = cur_agc_value;
        }
        /* Remove the minimal AGC result for length < 50m */
-        if(agc_value < IGP01E1000_PHY_CHANNEL_NUM * e1000_igp_cable_length_50) {
+        if (agc_value < IGP01E1000_PHY_CHANNEL_NUM * e1000_igp_cable_length_50) {
-            agc_value -= min_agc;
+            agc_value -= min_agc_value;
            /* Get the average length of the remaining 3 channels */
            agc_value /= (IGP01E1000_PHY_CHANNEL_NUM - 1);
@@ -6130,7 +6759,10 @@ e1000_get_cable_length(struct e1000_hw *hw,
                       IGP01E1000_AGC_RANGE) : 0;
        *max_length = e1000_igp_cable_length_table[agc_value] +
                      IGP01E1000_AGC_RANGE;
-    } else if (hw->phy_type == e1000_phy_igp_2) {
+    } else if (hw->phy_type == e1000_phy_igp_2 ||
+               hw->phy_type == e1000_phy_igp_3) {
+        uint16_t cur_agc_index, max_agc_index = 0;
+        uint16_t min_agc_index = IGP02E1000_AGC_LENGTH_TABLE_SIZE - 1;
        uint16_t agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] =
                                                         {IGP02E1000_PHY_AGC_A,
                                                          IGP02E1000_PHY_AGC_B,
@@ -6145,19 +6777,27 @@ e1000_get_cable_length(struct e1000_hw *hw,
            /* Getting bits 15:9, which represent the combination of course and
             * fine gain values.  The result is a number that can be put into
             * the lookup table to obtain the approximate cable length. */
-            cur_agc = (phy_data >> IGP02E1000_AGC_LENGTH_SHIFT) &
+            cur_agc_index = (phy_data >> IGP02E1000_AGC_LENGTH_SHIFT) &
-                      IGP02E1000_AGC_LENGTH_MASK;
+                            IGP02E1000_AGC_LENGTH_MASK;
-            /* Remove min & max AGC values from calculation. */
+            /* Array index bound check. */
-            if (e1000_igp_2_cable_length_table[min_agc] > e1000_igp_2_cable_length_table[cur_agc])
+            if ((cur_agc_index >= IGP02E1000_AGC_LENGTH_TABLE_SIZE) ||
-                min_agc = cur_agc;
+                (cur_agc_index == 0))
-            if (e1000_igp_2_cable_length_table[max_agc] < e1000_igp_2_cable_length_table[cur_agc])
+                return -E1000_ERR_PHY;
-                max_agc = cur_agc;
-            agc_value += e1000_igp_2_cable_length_table[cur_agc];
+            /* Remove min & max AGC values from calculation. */
+            if (e1000_igp_2_cable_length_table[min_agc_index] >
+                e1000_igp_2_cable_length_table[cur_agc_index])
+                min_agc_index = cur_agc_index;
+            if (e1000_igp_2_cable_length_table[max_agc_index] <
+                e1000_igp_2_cable_length_table[cur_agc_index])
+                max_agc_index = cur_agc_index;
+            agc_value += e1000_igp_2_cable_length_table[cur_agc_index];
        }
-        agc_value -= (e1000_igp_2_cable_length_table[min_agc] + e1000_igp_2_cable_length_table[max_agc]);
+        agc_value -= (e1000_igp_2_cable_length_table[min_agc_index] +
+                      e1000_igp_2_cable_length_table[max_agc_index]);
        agc_value /= (IGP02E1000_PHY_CHANNEL_NUM - 2);
        /* Calculate cable length with the error range of +/- 10 meters. */
@@ -6203,7 +6843,8 @@ e1000_check_polarity(struct e1000_hw *hw,
            return ret_val;
        *polarity = (phy_data & M88E1000_PSSR_REV_POLARITY) >>
                    M88E1000_PSSR_REV_POLARITY_SHIFT;
-    } else if(hw->phy_type == e1000_phy_igp ||
+    } else if (hw->phy_type == e1000_phy_igp ||
+              hw->phy_type == e1000_phy_igp_3 ||
              hw->phy_type == e1000_phy_igp_2) {
        /* Read the Status register to check the speed */
        ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS,
@@ -6229,6 +6870,13 @@ e1000_check_polarity(struct e1000_hw *hw,
             * 100 Mbps this bit is always 0) */
            *polarity = phy_data & IGP01E1000_PSSR_POLARITY_REVERSED;
        }
+    } else if (hw->phy_type == e1000_phy_ife) {
+        ret_val = e1000_read_phy_reg(hw, IFE_PHY_EXTENDED_STATUS_CONTROL,
+                                     &phy_data);
+        if (ret_val)
+            return ret_val;
+        *polarity = (phy_data & IFE_PESC_POLARITY_REVERSED) >>
+                           IFE_PESC_POLARITY_REVERSED_SHIFT;
    }
    return E1000_SUCCESS;
 }
@@ -6256,7 +6904,8 @@ e1000_check_downshift(struct e1000_hw *hw)
    DEBUGFUNC("e1000_check_downshift");
-    if(hw->phy_type == e1000_phy_igp ||
+    if (hw->phy_type == e1000_phy_igp ||
+        hw->phy_type == e1000_phy_igp_3 ||
        hw->phy_type == e1000_phy_igp_2) {
        ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH,
                                     &phy_data);
@@ -6273,6 +6922,9 @@ e1000_check_downshift(struct e1000_hw *hw)
        hw->speed_downgraded = (phy_data & M88E1000_PSSR_DOWNSHIFT) >>
                               M88E1000_PSSR_DOWNSHIFT_SHIFT;
+    } else if (hw->phy_type == e1000_phy_ife) {
+        /* e1000_phy_ife supports 10/100 speed only */
+        hw->speed_downgraded = FALSE;
    }
    return E1000_SUCCESS;
@@ -6317,7 +6969,9 @@ e1000_config_dsp_after_link_change(struct e1000_hw *hw,
        if(speed == SPEED_1000) {
-            e1000_get_cable_length(hw, &min_length, &max_length);
+            ret_val = e1000_get_cable_length(hw, &min_length, &max_length);
+            if (ret_val)
+                return ret_val;
            if((hw->dsp_config_state == e1000_dsp_config_enabled) &&
                min_length >= e1000_igp_cable_length_50) {
@@ -6525,20 +7179,27 @@ static int32_t
 e1000_set_d3_lplu_state(struct e1000_hw *hw,
                        boolean_t active)
 {
+    uint32_t phy_ctrl = 0;
    int32_t ret_val;
    uint16_t phy_data;
    DEBUGFUNC("e1000_set_d3_lplu_state");
-    if(hw->phy_type != e1000_phy_igp && hw->phy_type != e1000_phy_igp_2)
+    if (hw->phy_type != e1000_phy_igp && hw->phy_type != e1000_phy_igp_2
+        && hw->phy_type != e1000_phy_igp_3)
        return E1000_SUCCESS;
    /* During driver activity LPLU should not be used or it will attain link
     * from the lowest speeds starting from 10Mbps. The capability is used for
     * Dx transitions and states */
-    if(hw->mac_type == e1000_82541_rev_2 || hw->mac_type == e1000_82547_rev_2) {
+    if (hw->mac_type == e1000_82541_rev_2 || hw->mac_type == e1000_82547_rev_2) {
        ret_val = e1000_read_phy_reg(hw, IGP01E1000_GMII_FIFO, &phy_data);
-        if(ret_val)
+        if (ret_val)
            return ret_val;
+    } else if (hw->mac_type == e1000_ich8lan) {
+        /* MAC writes into PHY register based on the state transition
+         * and start auto-negotiation. SW driver can overwrite the settings
+         * in CSR PHY power control E1000_PHY_CTRL register. */
+        phy_ctrl = E1000_READ_REG(hw, PHY_CTRL);
    } else {
        ret_val = e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
        if(ret_val)
@@ -6553,11 +7214,16 @@ e1000_set_d3_lplu_state(struct e1000_hw *hw,
            if(ret_val)
                return ret_val;
        } else {
+            if (hw->mac_type == e1000_ich8lan) {
+                phy_ctrl &= ~E1000_PHY_CTRL_NOND0A_LPLU;
+                E1000_WRITE_REG(hw, PHY_CTRL, phy_ctrl);
+            } else {
                phy_data &= ~IGP02E1000_PM_D3_LPLU;
                ret_val = e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
                                              phy_data);
                if (ret_val)
                    return ret_val;
+            }
        }
        /* LPLU and SmartSpeed are mutually exclusive.  LPLU is used during
@@ -6593,17 +7259,22 @@ e1000_set_d3_lplu_state(struct e1000_hw *hw,
              (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_100_ALL)) {
        if(hw->mac_type == e1000_82541_rev_2 ||
-           hw->mac_type == e1000_82547_rev_2) {
+            hw->mac_type == e1000_82547_rev_2) {
            phy_data |= IGP01E1000_GMII_FLEX_SPD;
            ret_val = e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO, phy_data);
            if(ret_val)
                return ret_val;
        } else {
+            if (hw->mac_type == e1000_ich8lan) {
+                phy_ctrl |= E1000_PHY_CTRL_NOND0A_LPLU;
+                E1000_WRITE_REG(hw, PHY_CTRL, phy_ctrl);
+            } else {
                phy_data |= IGP02E1000_PM_D3_LPLU;
                ret_val = e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
                                              phy_data);
                if (ret_val)
                    return ret_val;
+            }
        }
        /* When LPLU is enabled we should disable SmartSpeed */
@@ -6638,6 +7309,7 @@ static int32_t
 e1000_set_d0_lplu_state(struct e1000_hw *hw,
                        boolean_t active)
 {
+    uint32_t phy_ctrl = 0;
    int32_t ret_val;
    uint16_t phy_data;
    DEBUGFUNC("e1000_set_d0_lplu_state");
@@ -6645,15 +7317,24 @@ e1000_set_d0_lplu_state(struct e1000_hw *hw,
    if(hw->mac_type <= e1000_82547_rev_2)
        return E1000_SUCCESS;
+    if (hw->mac_type == e1000_ich8lan) {
+        phy_ctrl = E1000_READ_REG(hw, PHY_CTRL);
+    } else {
        ret_val = e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
        if(ret_val)
            return ret_val;
+    }
    if (!active) {
+        if (hw->mac_type == e1000_ich8lan) {
+            phy_ctrl &= ~E1000_PHY_CTRL_D0A_LPLU;
+            E1000_WRITE_REG(hw, PHY_CTRL, phy_ctrl);
+        } else {
            phy_data &= ~IGP02E1000_PM_D0_LPLU;
            ret_val = e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
            if (ret_val)
                return ret_val;
+        }
        /* LPLU and SmartSpeed are mutually exclusive.  LPLU is used during
         * Dx states where the power conservation is most important.  During
@@ -6686,10 +7367,15 @@ e1000_set_d0_lplu_state(struct e1000_hw *hw,
    } else {
+        if (hw->mac_type == e1000_ich8lan) {
+            phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU;
+            E1000_WRITE_REG(hw, PHY_CTRL, phy_ctrl);
+        } else {
            phy_data |= IGP02E1000_PM_D0_LPLU;
            ret_val = e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
            if (ret_val)
                return ret_val;
+        }
        /* When LPLU is enabled we should disable SmartSpeed */
        ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, &phy_data);
@@ -6928,8 +7614,10 @@ e1000_mng_write_cmd_header(struct e1000_hw * hw,
    length >>= 2;
    /* The device driver writes the relevant command block into the ram area. */
-    for (i = 0; i < length; i++)
+    for (i = 0; i < length; i++) {
        E1000_WRITE_REG_ARRAY_DWORD(hw, HOST_IF, i, *((uint32_t *) hdr + i));
+        E1000_WRITE_FLUSH(hw);
+    }
    return E1000_SUCCESS;
 }
@@ -6961,15 +7649,18 @@ e1000_mng_write_commit(
 * returns  - TRUE when the mode is IAMT or FALSE.
 ****************************************************************************/
 boolean_t
-e1000_check_mng_mode(
+e1000_check_mng_mode(struct e1000_hw *hw)
-    struct e1000_hw *hw)
 {
    uint32_t fwsm;
    fwsm = E1000_READ_REG(hw, FWSM);
-    if((fwsm & E1000_FWSM_MODE_MASK) ==
+    if (hw->mac_type == e1000_ich8lan) {
-        (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT))
+        if ((fwsm & E1000_FWSM_MODE_MASK) ==
+            (E1000_MNG_ICH_IAMT_MODE << E1000_FWSM_MODE_SHIFT))
+            return TRUE;
+    } else if ((fwsm & E1000_FWSM_MODE_MASK) ==
+               (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT))
        return TRUE;
    return FALSE;
@@ -7209,7 +7900,6 @@ e1000_set_pci_express_master_disable(struct e1000_hw *hw)
    E1000_WRITE_REG(hw, CTRL, ctrl);
 }
-#if 0
 /***************************************************************************
 *
 * Enables PCI-Express master access.
@@ -7233,7 +7923,6 @@ e1000_enable_pciex_master(struct e1000_hw *hw)
    ctrl &= ~E1000_CTRL_GIO_MASTER_DISABLE;
    E1000_WRITE_REG(hw, CTRL, ctrl);
 }
-#endif  /*  0  */
 /*******************************************************************************
 *
@@ -7299,8 +7988,10 @@ e1000_get_auto_rd_done(struct e1000_hw *hw)
    case e1000_82572:
    case e1000_82573:
    case e1000_80003es2lan:
-        while(timeout) {
+    case e1000_ich8lan:
-            if (E1000_READ_REG(hw, EECD) & E1000_EECD_AUTO_RD) break;
+        while (timeout) {
+            if (E1000_READ_REG(hw, EECD) & E1000_EECD_AUTO_RD)
+                break;
            else msec_delay(1);
            timeout--;
        }
@@ -7340,7 +8031,7 @@ e1000_get_phy_cfg_done(struct e1000_hw *hw)
    switch (hw->mac_type) {
    default:
-        msec_delay(10);
+        msec_delay_irq(10);
        break;
    case e1000_80003es2lan:
        /* Separate *_CFG_DONE_* bit for each port */
@@ -7523,6 +8214,13 @@ int32_t
 e1000_check_phy_reset_block(struct e1000_hw *hw)
 {
    uint32_t manc = 0;
+    uint32_t fwsm = 0;
+    if (hw->mac_type == e1000_ich8lan) {
+        fwsm = E1000_READ_REG(hw, FWSM);
+        return (fwsm & E1000_FWSM_RSPCIPHY) ? E1000_SUCCESS
+                                            : E1000_BLK_PHY_RESET;
+    }
    if (hw->mac_type > e1000_82547_rev_2)
        manc = E1000_READ_REG(hw, MANC);
@@ -7549,6 +8247,8 @@ e1000_arc_subsystem_valid(struct e1000_hw *hw)
        if((fwsm & E1000_FWSM_MODE_MASK) != 0)
            return TRUE;
        break;
+    case e1000_ich8lan:
+        return TRUE;
    default:
        break;
    }
@@ -7556,4 +8256,846 @@ e1000_arc_subsystem_valid(struct e1000_hw *hw)
 }
+/******************************************************************************
+ * Configure PCI-Ex no-snoop
+ *
+ * hw - Struct containing variables accessed by shared code.
+ * no_snoop - Bitmap of no-snoop events.
+ *
+ * returns: E1000_SUCCESS
+ *
+ *****************************************************************************/
+int32_t
+e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, uint32_t no_snoop)
+{
+    uint32_t gcr_reg = 0;
+    DEBUGFUNC("e1000_set_pci_ex_no_snoop");
+    if (hw->bus_type == e1000_bus_type_unknown)
+        e1000_get_bus_info(hw);
+    if (hw->bus_type != e1000_bus_type_pci_express)
+        return E1000_SUCCESS;
+    if (no_snoop) {
+        gcr_reg = E1000_READ_REG(hw, GCR);
+        gcr_reg &= ~(PCI_EX_NO_SNOOP_ALL);
+        gcr_reg |= no_snoop;
+        E1000_WRITE_REG(hw, GCR, gcr_reg);
+    }
+    if (hw->mac_type == e1000_ich8lan) {
+        uint32_t ctrl_ext;
+        E1000_WRITE_REG(hw, GCR, PCI_EX_82566_SNOOP_ALL);
+        ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
+        ctrl_ext |= E1000_CTRL_EXT_RO_DIS;
+        E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
+    }
+    return E1000_SUCCESS;
+}
+/***************************************************************************
+ *
+ * Get software semaphore FLAG bit (SWFLAG).
+ * SWFLAG is used to synchronize the access to all shared resource between
+ * SW, FW and HW.
+ *
+ * hw: Struct containing variables accessed by shared code
+ *
+ ***************************************************************************/
+int32_t
+e1000_get_software_flag(struct e1000_hw *hw)
+{
+    int32_t timeout = PHY_CFG_TIMEOUT;
+    uint32_t extcnf_ctrl;
+    DEBUGFUNC("e1000_get_software_flag");
+    if (hw->mac_type == e1000_ich8lan) {
+        while (timeout) {
+            extcnf_ctrl = E1000_READ_REG(hw, EXTCNF_CTRL);
+            extcnf_ctrl |= E1000_EXTCNF_CTRL_SWFLAG;
+            E1000_WRITE_REG(hw, EXTCNF_CTRL, extcnf_ctrl);
+            extcnf_ctrl = E1000_READ_REG(hw, EXTCNF_CTRL);
+            if (extcnf_ctrl & E1000_EXTCNF_CTRL_SWFLAG)
+                break;
+            msec_delay_irq(1);
+            timeout--;
+        }
+        if (!timeout) {
+            DEBUGOUT("FW or HW locks the resource too long.\n");
+            return -E1000_ERR_CONFIG;
+        }
+    }
+    return E1000_SUCCESS;
+}
+/***************************************************************************
+ *
+ * Release software semaphore FLAG bit (SWFLAG).
+ * SWFLAG is used to synchronize the access to all shared resource between
+ * SW, FW and HW.
+ *
+ * hw: Struct containing variables accessed by shared code
+ *
+ ***************************************************************************/
+void
+e1000_release_software_flag(struct e1000_hw *hw)
+{
+    uint32_t extcnf_ctrl;
+    DEBUGFUNC("e1000_release_software_flag");
+    if (hw->mac_type == e1000_ich8lan) {
+        extcnf_ctrl= E1000_READ_REG(hw, EXTCNF_CTRL);
+        extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG;
+        E1000_WRITE_REG(hw, EXTCNF_CTRL, extcnf_ctrl);
+    }
+    return;
+}
+/***************************************************************************
+ *
+ * Disable dynamic power down mode in ife PHY.
+ * It can be used to workaround band-gap problem.
+ *
+ * hw: Struct containing variables accessed by shared code
+ *
+ ***************************************************************************/
+int32_t
+e1000_ife_disable_dynamic_power_down(struct e1000_hw *hw)
+{
+    uint16_t phy_data;
+    int32_t ret_val = E1000_SUCCESS;
+    DEBUGFUNC("e1000_ife_disable_dynamic_power_down");
+    if (hw->phy_type == e1000_phy_ife) {
+        ret_val = e1000_read_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL, &phy_data);
+        if (ret_val)
+            return ret_val;
+        phy_data |=  IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN;
+        ret_val = e1000_write_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL, phy_data);
+    }
+    return ret_val;
+}
+/***************************************************************************
+ *
+ * Enable dynamic power down mode in ife PHY.
+ * It can be used to workaround band-gap problem.
+ *
+ * hw: Struct containing variables accessed by shared code
+ *
+ ***************************************************************************/
+int32_t
+e1000_ife_enable_dynamic_power_down(struct e1000_hw *hw)
+{
+    uint16_t phy_data;
+    int32_t ret_val = E1000_SUCCESS;
+    DEBUGFUNC("e1000_ife_enable_dynamic_power_down");
+    if (hw->phy_type == e1000_phy_ife) {
+        ret_val = e1000_read_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL, &phy_data);
+        if (ret_val)
+            return ret_val;
+        phy_data &=  ~IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN;
+        ret_val = e1000_write_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL, phy_data);
+    }
+    return ret_val;
+}
+/******************************************************************************
+ * Reads a 16 bit word or words from the EEPROM using the ICH8's flash access
+ * register.
+ *
+ * hw - Struct containing variables accessed by shared code
+ * offset - offset of word in the EEPROM to read
+ * data - word read from the EEPROM
+ * words - number of words to read
+ *****************************************************************************/
+int32_t
+e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words,
+                       uint16_t *data)
+{
+    int32_t  error = E1000_SUCCESS;
+    uint32_t flash_bank = 0;
+    uint32_t act_offset = 0;
+    uint32_t bank_offset = 0;
+    uint16_t word = 0;
+    uint16_t i = 0;
+    /* We need to know which is the valid flash bank.  In the event
+     * that we didn't allocate eeprom_shadow_ram, we may not be
+     * managing flash_bank.  So it cannot be trusted and needs
+     * to be updated with each read.
+     */
+    /* Value of bit 22 corresponds to the flash bank we're on. */
+    flash_bank = (E1000_READ_REG(hw, EECD) & E1000_EECD_SEC1VAL) ? 1 : 0;
+    /* Adjust offset appropriately if we're on bank 1 - adjust for word size */
+    bank_offset = flash_bank * (hw->flash_bank_size * 2);
+    error = e1000_get_software_flag(hw);
+    if (error != E1000_SUCCESS)
+        return error;
+    for (i = 0; i < words; i++) {
+        if (hw->eeprom_shadow_ram != NULL &&
+            hw->eeprom_shadow_ram[offset+i].modified == TRUE) {
+            data[i] = hw->eeprom_shadow_ram[offset+i].eeprom_word;
+        } else {
+            /* The NVM part needs a byte offset, hence * 2 */
+            act_offset = bank_offset + ((offset + i) * 2);
+            error = e1000_read_ich8_word(hw, act_offset, &word);
+            if (error != E1000_SUCCESS)
+                break;
+            data[i] = word;
+        }
+    }
+    e1000_release_software_flag(hw);
+    return error;
+}
+/******************************************************************************
+ * Writes a 16 bit word or words to the EEPROM using the ICH8's flash access
+ * register.  Actually, writes are written to the shadow ram cache in the hw
+ * structure hw->e1000_shadow_ram.  e1000_commit_shadow_ram flushes this to
+ * the NVM, which occurs when the NVM checksum is updated.
+ *
+ * hw - Struct containing variables accessed by shared code
+ * offset - offset of word in the EEPROM to write
+ * words - number of words to write
+ * data - words to write to the EEPROM
+ *****************************************************************************/
+int32_t
+e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words,
+                        uint16_t *data)
+{
+    uint32_t i = 0;
+    int32_t error = E1000_SUCCESS;
+    error = e1000_get_software_flag(hw);
+    if (error != E1000_SUCCESS)
+        return error;
+    /* A driver can write to the NVM only if it has eeprom_shadow_ram
+     * allocated.  Subsequent reads to the modified words are read from
+     * this cached structure as well.  Writes will only go into this
+     * cached structure unless it's followed by a call to
+     * e1000_update_eeprom_checksum() where it will commit the changes
+     * and clear the "modified" field.
+     */
+    if (hw->eeprom_shadow_ram != NULL) {
+        for (i = 0; i < words; i++) {
+            if ((offset + i) < E1000_SHADOW_RAM_WORDS) {
+                hw->eeprom_shadow_ram[offset+i].modified = TRUE;
+                hw->eeprom_shadow_ram[offset+i].eeprom_word = data[i];
+            } else {
+                error = -E1000_ERR_EEPROM;
+                break;
+            }
+        }
+    } else {
+        /* Drivers have the option to not allocate eeprom_shadow_ram as long
+         * as they don't perform any NVM writes.  An attempt in doing so
+         * will result in this error.
+         */
+        error = -E1000_ERR_EEPROM;
+    }
+    e1000_release_software_flag(hw);
+    return error;
+}
+/******************************************************************************
+ * This function does initial flash setup so that a new read/write/erase cycle
+ * can be started.
+ *
+ * hw - The pointer to the hw structure
+ ****************************************************************************/
+int32_t
+e1000_ich8_cycle_init(struct e1000_hw *hw)
+{
+    union ich8_hws_flash_status hsfsts;
+    int32_t error = E1000_ERR_EEPROM;
+    int32_t i     = 0;
+    DEBUGFUNC("e1000_ich8_cycle_init");
+    hsfsts.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFSTS);
+    /* May be check the Flash Des Valid bit in Hw status */
+    if (hsfsts.hsf_status.fldesvalid == 0) {
+        DEBUGOUT("Flash descriptor invalid.  SW Sequencing must be used.");
+        return error;
+    }
+    /* Clear FCERR in Hw status by writing 1 */
+    /* Clear DAEL in Hw status by writing a 1 */
+    hsfsts.hsf_status.flcerr = 1;
+    hsfsts.hsf_status.dael = 1;
+    E1000_WRITE_ICH8_REG16(hw, ICH8_FLASH_HSFSTS, hsfsts.regval);
+    /* Either we should have a hardware SPI cycle in progress bit to check
+     * against, in order to start a new cycle or FDONE bit should be changed
+     * in the hardware so that it is 1 after harware reset, which can then be
+     * used as an indication whether a cycle is in progress or has been
+     * completed .. we should also have some software semaphore mechanism to
+     * guard FDONE or the cycle in progress bit so that two threads access to
+     * those bits can be sequentiallized or a way so that 2 threads dont
+     * start the cycle at the same time */
+    if (hsfsts.hsf_status.flcinprog == 0) {
+        /* There is no cycle running at present, so we can start a cycle */
+        /* Begin by setting Flash Cycle Done. */
+        hsfsts.hsf_status.flcdone = 1;
+        E1000_WRITE_ICH8_REG16(hw, ICH8_FLASH_HSFSTS, hsfsts.regval);
+        error = E1000_SUCCESS;
+    } else {
+        /* otherwise poll for sometime so the current cycle has a chance
+         * to end before giving up. */
+        for (i = 0; i < ICH8_FLASH_COMMAND_TIMEOUT; i++) {
+            hsfsts.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFSTS);
+            if (hsfsts.hsf_status.flcinprog == 0) {
+                error = E1000_SUCCESS;
+                break;
+            }
+            udelay(1);
+        }
+        if (error == E1000_SUCCESS) {
+            /* Successful in waiting for previous cycle to timeout,
+             * now set the Flash Cycle Done. */
+            hsfsts.hsf_status.flcdone = 1;
+            E1000_WRITE_ICH8_REG16(hw, ICH8_FLASH_HSFSTS, hsfsts.regval);
+        } else {
+            DEBUGOUT("Flash controller busy, cannot get access");
+        }
+    }
+    return error;
+}
+/******************************************************************************
+ * This function starts a flash cycle and waits for its completion
+ *
+ * hw - The pointer to the hw structure
+ ****************************************************************************/
+int32_t
+e1000_ich8_flash_cycle(struct e1000_hw *hw, uint32_t timeout)
+{
+    union ich8_hws_flash_ctrl hsflctl;
+    union ich8_hws_flash_status hsfsts;
+    int32_t error = E1000_ERR_EEPROM;
+    uint32_t i = 0;
+    /* Start a cycle by writing 1 in Flash Cycle Go in Hw Flash Control */
+    hsflctl.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFCTL);
+    hsflctl.hsf_ctrl.flcgo = 1;
+    E1000_WRITE_ICH8_REG16(hw, ICH8_FLASH_HSFCTL, hsflctl.regval);
+    /* wait till FDONE bit is set to 1 */
+    do {
+        hsfsts.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFSTS);
+        if (hsfsts.hsf_status.flcdone == 1)
+            break;
+        udelay(1);
+        i++;
+    } while (i < timeout);
+    if (hsfsts.hsf_status.flcdone == 1 && hsfsts.hsf_status.flcerr == 0) {
+        error = E1000_SUCCESS;
+    }
+    return error;
+}
+/******************************************************************************
+ * Reads a byte or word from the NVM using the ICH8 flash access registers.
+ *
+ * hw - The pointer to the hw structure
+ * index - The index of the byte or word to read.
+ * size - Size of data to read, 1=byte 2=word
+ * data - Pointer to the word to store the value read.
+ *****************************************************************************/
+int32_t
+e1000_read_ich8_data(struct e1000_hw *hw, uint32_t index,
+                     uint32_t size, uint16_t* data)
+{
+    union ich8_hws_flash_status hsfsts;
+    union ich8_hws_flash_ctrl hsflctl;
+    uint32_t flash_linear_address;
+    uint32_t flash_data = 0;
+    int32_t error = -E1000_ERR_EEPROM;
+    int32_t count = 0;
+    DEBUGFUNC("e1000_read_ich8_data");
+    if (size < 1  || size > 2 || data == 0x0 ||
+        index > ICH8_FLASH_LINEAR_ADDR_MASK)
+        return error;
+    flash_linear_address = (ICH8_FLASH_LINEAR_ADDR_MASK & index) +
+                           hw->flash_base_addr;
+    do {
+        udelay(1);
+        /* Steps */
+        error = e1000_ich8_cycle_init(hw);
+        if (error != E1000_SUCCESS)
+            break;
+        hsflctl.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFCTL);
+        /* 0b/1b corresponds to 1 or 2 byte size, respectively. */
+        hsflctl.hsf_ctrl.fldbcount = size - 1;
+        hsflctl.hsf_ctrl.flcycle = ICH8_CYCLE_READ;
+        E1000_WRITE_ICH8_REG16(hw, ICH8_FLASH_HSFCTL, hsflctl.regval);
+        /* Write the last 24 bits of index into Flash Linear address field in
+         * Flash Address */
+        /* TODO: TBD maybe check the index against the size of flash */
+        E1000_WRITE_ICH8_REG(hw, ICH8_FLASH_FADDR, flash_linear_address);
+        error = e1000_ich8_flash_cycle(hw, ICH8_FLASH_COMMAND_TIMEOUT);
+        /* Check if FCERR is set to 1, if set to 1, clear it and try the whole
+         * sequence a few more times, else read in (shift in) the Flash Data0,
+         * the order is least significant byte first msb to lsb */
+        if (error == E1000_SUCCESS) {
+            flash_data = E1000_READ_ICH8_REG(hw, ICH8_FLASH_FDATA0);
+            if (size == 1) {
+                *data = (uint8_t)(flash_data & 0x000000FF);
+            } else if (size == 2) {
+                *data = (uint16_t)(flash_data & 0x0000FFFF);
+            }
+            break;
+        } else {
+            /* If we've gotten here, then things are probably completely hosed,
+             * but if the error condition is detected, it won't hurt to give
+             * it another try...ICH8_FLASH_CYCLE_REPEAT_COUNT times.
+             */
+            hsfsts.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFSTS);
+            if (hsfsts.hsf_status.flcerr == 1) {
+                /* Repeat for some time before giving up. */
+                continue;
+            } else if (hsfsts.hsf_status.flcdone == 0) {
+                DEBUGOUT("Timeout error - flash cycle did not complete.");
+                break;
+            }
+        }
+    } while (count++ < ICH8_FLASH_CYCLE_REPEAT_COUNT);
+    return error;
+}
+/******************************************************************************
+ * Writes One /two bytes to the NVM using the ICH8 flash access registers.
+ *
+ * hw - The pointer to the hw structure
+ * index - The index of the byte/word to read.
+ * size - Size of data to read, 1=byte 2=word
+ * data - The byte(s) to write to the NVM.
+ *****************************************************************************/
+int32_t
+e1000_write_ich8_data(struct e1000_hw *hw, uint32_t index, uint32_t size,
+                      uint16_t data)
+{
+    union ich8_hws_flash_status hsfsts;
+    union ich8_hws_flash_ctrl hsflctl;
+    uint32_t flash_linear_address;
+    uint32_t flash_data = 0;
+    int32_t error = -E1000_ERR_EEPROM;
+    int32_t count = 0;
+    DEBUGFUNC("e1000_write_ich8_data");
+    if (size < 1  || size > 2 || data > size * 0xff ||
+        index > ICH8_FLASH_LINEAR_ADDR_MASK)
+        return error;
+    flash_linear_address = (ICH8_FLASH_LINEAR_ADDR_MASK & index) +
+                           hw->flash_base_addr;
+    do {
+        udelay(1);
+        /* Steps */
+        error = e1000_ich8_cycle_init(hw);
+        if (error != E1000_SUCCESS)
+            break;
+        hsflctl.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFCTL);
+        /* 0b/1b corresponds to 1 or 2 byte size, respectively. */
+        hsflctl.hsf_ctrl.fldbcount = size -1;
+        hsflctl.hsf_ctrl.flcycle = ICH8_CYCLE_WRITE;
+        E1000_WRITE_ICH8_REG16(hw, ICH8_FLASH_HSFCTL, hsflctl.regval);
+        /* Write the last 24 bits of index into Flash Linear address field in
+         * Flash Address */
+        E1000_WRITE_ICH8_REG(hw, ICH8_FLASH_FADDR, flash_linear_address);
+        if (size == 1)
+            flash_data = (uint32_t)data & 0x00FF;
+        else
+            flash_data = (uint32_t)data;
+        E1000_WRITE_ICH8_REG(hw, ICH8_FLASH_FDATA0, flash_data);
+        /* check if FCERR is set to 1 , if set to 1, clear it and try the whole
+         * sequence a few more times else done */
+        error = e1000_ich8_flash_cycle(hw, ICH8_FLASH_COMMAND_TIMEOUT);
+        if (error == E1000_SUCCESS) {
+            break;
+        } else {
+            /* If we're here, then things are most likely completely hosed,
+             * but if the error condition is detected, it won't hurt to give
+             * it another try...ICH8_FLASH_CYCLE_REPEAT_COUNT times.
+             */
+            hsfsts.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFSTS);
+            if (hsfsts.hsf_status.flcerr == 1) {
+                /* Repeat for some time before giving up. */
+                continue;
+            } else if (hsfsts.hsf_status.flcdone == 0) {
+                DEBUGOUT("Timeout error - flash cycle did not complete.");
+                break;
+            }
+        }
+    } while (count++ < ICH8_FLASH_CYCLE_REPEAT_COUNT);
+    return error;
+}
+/******************************************************************************
+ * Reads a single byte from the NVM using the ICH8 flash access registers.
+ *
+ * hw - pointer to e1000_hw structure
+ * index - The index of the byte to read.
+ * data - Pointer to a byte to store the value read.
+ *****************************************************************************/
+int32_t
+e1000_read_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t* data)
+{
+    int32_t status = E1000_SUCCESS;
+    uint16_t word = 0;
+    status = e1000_read_ich8_data(hw, index, 1, &word);
+    if (status == E1000_SUCCESS) {
+        *data = (uint8_t)word;
+    }
+    return status;
+}
+/******************************************************************************
+ * Writes a single byte to the NVM using the ICH8 flash access registers.
+ * Performs verification by reading back the value and then going through
+ * a retry algorithm before giving up.
+ *
+ * hw - pointer to e1000_hw structure
+ * index - The index of the byte to write.
+ * byte - The byte to write to the NVM.
+ *****************************************************************************/
+int32_t
+e1000_verify_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte)
+{
+    int32_t error = E1000_SUCCESS;
+    int32_t program_retries;
+    uint8_t temp_byte;
+    e1000_write_ich8_byte(hw, index, byte);
+    udelay(100);
+    for (program_retries = 0; program_retries < 100; program_retries++) {
+        e1000_read_ich8_byte(hw, index, &temp_byte);
+        if (temp_byte == byte)
+            break;
+        udelay(10);
+        e1000_write_ich8_byte(hw, index, byte);
+        udelay(100);
+    }
+    if (program_retries == 100)
+        error = E1000_ERR_EEPROM;
+    return error;
+}
+/******************************************************************************
+ * Writes a single byte to the NVM using the ICH8 flash access registers.
+ *
+ * hw - pointer to e1000_hw structure
+ * index - The index of the byte to read.
+ * data - The byte to write to the NVM.
+ *****************************************************************************/
+int32_t
+e1000_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t data)
+{
+    int32_t status = E1000_SUCCESS;
+    uint16_t word = (uint16_t)data;
+    status = e1000_write_ich8_data(hw, index, 1, word);
+    return status;
+}
+/******************************************************************************
+ * Reads a word from the NVM using the ICH8 flash access registers.
+ *
+ * hw - pointer to e1000_hw structure
+ * index - The starting byte index of the word to read.
+ * data - Pointer to a word to store the value read.
+ *****************************************************************************/
+int32_t
+e1000_read_ich8_word(struct e1000_hw *hw, uint32_t index, uint16_t *data)
+{
+    int32_t status = E1000_SUCCESS;
+    status = e1000_read_ich8_data(hw, index, 2, data);
+    return status;
+}
+/******************************************************************************
+ * Writes a word to the NVM using the ICH8 flash access registers.
+ *
+ * hw - pointer to e1000_hw structure
+ * index - The starting byte index of the word to read.
+ * data - The word to write to the NVM.
+ *****************************************************************************/
+int32_t
+e1000_write_ich8_word(struct e1000_hw *hw, uint32_t index, uint16_t data)
+{
+    int32_t status = E1000_SUCCESS;
+    status = e1000_write_ich8_data(hw, index, 2, data);
+    return status;
+}
+/******************************************************************************
+ * Erases the bank specified. Each bank is a 4k block. Segments are 0 based.
+ * segment N is 4096 * N + flash_reg_addr.
+ *
+ * hw - pointer to e1000_hw structure
+ * segment - 0 for first segment, 1 for second segment, etc.
+ *****************************************************************************/
+int32_t
+e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t segment)
+{
+    union ich8_hws_flash_status hsfsts;
+    union ich8_hws_flash_ctrl hsflctl;
+    uint32_t flash_linear_address;
+    int32_t  count = 0;
+    int32_t  error = E1000_ERR_EEPROM;
+    int32_t  iteration, seg_size;
+    int32_t  sector_size;
+    int32_t  j = 0;
+    int32_t  error_flag = 0;
+    hsfsts.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFSTS);
+    /* Determine HW Sector size: Read BERASE bits of Hw flash Status register */
+    /* 00: The Hw sector is 256 bytes, hence we need to erase 16
+     *     consecutive sectors.  The start index for the nth Hw sector can be
+     *     calculated as = segment * 4096 + n * 256
+     * 01: The Hw sector is 4K bytes, hence we need to erase 1 sector.
+     *     The start index for the nth Hw sector can be calculated
+     *     as = segment * 4096
+     * 10: Error condition
+     * 11: The Hw sector size is much bigger than the size asked to
+     *     erase...error condition */
+    if (hsfsts.hsf_status.berasesz == 0x0) {
+        /* Hw sector size 256 */
+        sector_size = seg_size = ICH8_FLASH_SEG_SIZE_256;
+        iteration = ICH8_FLASH_SECTOR_SIZE / ICH8_FLASH_SEG_SIZE_256;
+    } else if (hsfsts.hsf_status.berasesz == 0x1) {
+        sector_size = seg_size = ICH8_FLASH_SEG_SIZE_4K;
+        iteration = 1;
+    } else if (hsfsts.hsf_status.berasesz == 0x3) {
+        sector_size = seg_size = ICH8_FLASH_SEG_SIZE_64K;
+        iteration = 1;
+    } else {
+        return error;
+    }
+    for (j = 0; j < iteration ; j++) {
+        do {
+            count++;
+            /* Steps */
+            error = e1000_ich8_cycle_init(hw);
+            if (error != E1000_SUCCESS) {
+                error_flag = 1;
+                break;
+            }
+            /* Write a value 11 (block Erase) in Flash Cycle field in Hw flash
+             * Control */
+            hsflctl.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFCTL);
+            hsflctl.hsf_ctrl.flcycle = ICH8_CYCLE_ERASE;
+            E1000_WRITE_ICH8_REG16(hw, ICH8_FLASH_HSFCTL, hsflctl.regval);
+            /* Write the last 24 bits of an index within the block into Flash
+             * Linear address field in Flash Address.  This probably needs to
+             * be calculated here based off the on-chip segment size and the
+             * software segment size assumed (4K) */
+            /* TBD */
+            flash_linear_address = segment * sector_size + j * seg_size;
+            flash_linear_address &= ICH8_FLASH_LINEAR_ADDR_MASK;
+            flash_linear_address += hw->flash_base_addr;
+            E1000_WRITE_ICH8_REG(hw, ICH8_FLASH_FADDR, flash_linear_address);
+            error = e1000_ich8_flash_cycle(hw, 1000000);
+            /* Check if FCERR is set to 1.  If 1, clear it and try the whole
+             * sequence a few more times else Done */
+            if (error == E1000_SUCCESS) {
+                break;
+            } else {
+                hsfsts.regval = E1000_READ_ICH8_REG16(hw, ICH8_FLASH_HSFSTS);
+                if (hsfsts.hsf_status.flcerr == 1) {
+                    /* repeat for some time before giving up */
+                    continue;
+                } else if (hsfsts.hsf_status.flcdone == 0) {
+                    error_flag = 1;
+                    break;
+                }
+            }
+        } while ((count < ICH8_FLASH_CYCLE_REPEAT_COUNT) && !error_flag);
+        if (error_flag == 1)
+            break;
+    }
+    if (error_flag != 1)
+        error = E1000_SUCCESS;
+    return error;
+}
+/******************************************************************************
+ *
+ * Reverse duplex setting without breaking the link.
+ *
+ * hw: Struct containing variables accessed by shared code
+ *
+ *****************************************************************************/
+int32_t
+e1000_duplex_reversal(struct e1000_hw *hw)
+{
+    int32_t ret_val;
+    uint16_t phy_data;
+    if (hw->phy_type != e1000_phy_igp_3)
+        return E1000_SUCCESS;
+    ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
+    if (ret_val)
+        return ret_val;
+    phy_data ^= MII_CR_FULL_DUPLEX;
+    ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data);
+    if (ret_val)
+        return ret_val;
+    ret_val = e1000_read_phy_reg(hw, IGP3E1000_PHY_MISC_CTRL, &phy_data);
+    if (ret_val)
+        return ret_val;
+    phy_data |= IGP3_PHY_MISC_DUPLEX_MANUAL_SET;
+    ret_val = e1000_write_phy_reg(hw, IGP3E1000_PHY_MISC_CTRL, phy_data);
+    return ret_val;
+}
+int32_t
+e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw,
+                                      uint32_t cnf_base_addr, uint32_t cnf_size)
+{
+    uint32_t ret_val = E1000_SUCCESS;
+    uint16_t word_addr, reg_data, reg_addr;
+    uint16_t i;
+    /* cnf_base_addr is in DWORD */
+    word_addr = (uint16_t)(cnf_base_addr << 1);
+    /* cnf_size is returned in size of dwords */
+    for (i = 0; i < cnf_size; i++) {
+        ret_val = e1000_read_eeprom(hw, (word_addr + i*2), 1, &reg_data);
+        if (ret_val)
+            return ret_val;
+        ret_val = e1000_read_eeprom(hw, (word_addr + i*2 + 1), 1, &reg_addr);
+        if (ret_val)
+            return ret_val;
+        ret_val = e1000_get_software_flag(hw);
+        if (ret_val != E1000_SUCCESS)
+            return ret_val;
+        ret_val = e1000_write_phy_reg_ex(hw, (uint32_t)reg_addr, reg_data);
+        e1000_release_software_flag(hw);
+    }
+    return ret_val;
+}
+int32_t
+e1000_init_lcd_from_nvm(struct e1000_hw *hw)
+{
+    uint32_t reg_data, cnf_base_addr, cnf_size, ret_val, loop;
+    if (hw->phy_type != e1000_phy_igp_3)
+          return E1000_SUCCESS;
+    /* Check if SW needs configure the PHY */
+    reg_data = E1000_READ_REG(hw, FEXTNVM);
+    if (!(reg_data & FEXTNVM_SW_CONFIG))
+        return E1000_SUCCESS;
+    /* Wait for basic configuration completes before proceeding*/
+    loop = 0;
+    do {
+        reg_data = E1000_READ_REG(hw, STATUS) & E1000_STATUS_LAN_INIT_DONE;
+        udelay(100);
+        loop++;
+    } while ((!reg_data) && (loop < 50));
+    /* Clear the Init Done bit for the next init event */
+    reg_data = E1000_READ_REG(hw, STATUS);
+    reg_data &= ~E1000_STATUS_LAN_INIT_DONE;
+    E1000_WRITE_REG(hw, STATUS, reg_data);
+    /* Make sure HW does not configure LCD from PHY extended configuration
+       before SW configuration */
+    reg_data = E1000_READ_REG(hw, EXTCNF_CTRL);
+    if ((reg_data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE) == 0x0000) {
+        reg_data = E1000_READ_REG(hw, EXTCNF_SIZE);
+        cnf_size = reg_data & E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH;
+        cnf_size >>= 16;
+        if (cnf_size) {
+            reg_data = E1000_READ_REG(hw, EXTCNF_CTRL);
+            cnf_base_addr = reg_data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER;
+            /* cnf_base_addr is in DWORD */
+            cnf_base_addr >>= 16;
+            /* Configure LCD from extended configuration region. */
+            ret_val = e1000_init_lcd_from_nvm_config_region(hw, cnf_base_addr,
+                                                            cnf_size);
+            if (ret_val)
+                return ret_val;
+        }
+    }
+    return E1000_SUCCESS;
+}
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index 467c9ed944f8..f9341e3276b3 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -62,6 +62,7 @@ typedef enum {
    e1000_82572,
    e1000_82573,
    e1000_80003es2lan,
+    e1000_ich8lan,
    e1000_num_macs
 } e1000_mac_type;
@@ -70,6 +71,7 @@ typedef enum {
    e1000_eeprom_spi,
    e1000_eeprom_microwire,
    e1000_eeprom_flash,
+    e1000_eeprom_ich8,
    e1000_eeprom_none, /* No NVM support */
    e1000_num_eeprom_types
 } e1000_eeprom_type;
@@ -98,6 +100,11 @@ typedef enum {
    e1000_fc_default = 0xFF
 } e1000_fc_type;
+struct e1000_shadow_ram {
+    uint16_t    eeprom_word;
+    boolean_t   modified;
+};
 /* PCI bus types */
 typedef enum {
    e1000_bus_type_unknown = 0,
@@ -218,6 +225,8 @@ typedef enum {
    e1000_phy_igp,
    e1000_phy_igp_2,
    e1000_phy_gg82563,
+    e1000_phy_igp_3,
+    e1000_phy_ife,
    e1000_phy_undefined = 0xFF
 } e1000_phy_type;
@@ -313,6 +322,10 @@ int32_t e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy
 int32_t e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data);
 int32_t e1000_phy_hw_reset(struct e1000_hw *hw);
 int32_t e1000_phy_reset(struct e1000_hw *hw);
+void e1000_phy_powerdown_workaround(struct e1000_hw *hw);
+int32_t e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw);
+int32_t e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw, uint32_t cnf_base_addr, uint32_t cnf_size);
+int32_t e1000_init_lcd_from_nvm(struct e1000_hw *hw);
 int32_t e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
 int32_t e1000_validate_mdi_setting(struct e1000_hw *hw);
 int32_t e1000_read_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *data);
@@ -331,6 +344,7 @@ uint32_t e1000_enable_mng_pass_thru(struct e1000_hw *hw);
 #define E1000_MNG_DHCP_COOKIE_OFFSET    0x6F0   /* Cookie offset */
 #define E1000_MNG_DHCP_COOKIE_LENGTH    0x10    /* Cookie length */
 #define E1000_MNG_IAMT_MODE             0x3
+#define E1000_MNG_ICH_IAMT_MODE         0x2
 #define E1000_IAMT_SIGNATURE            0x544D4149 /* Intel(R) Active Management Technology signature */
 #define E1000_MNG_DHCP_COOKIE_STATUS_PARSING_SUPPORT 0x1 /* DHCP parsing enabled */
@@ -388,6 +402,8 @@ int32_t e1000_read_part_num(struct e1000_hw *hw, uint32_t * part_num);
 int32_t e1000_read_mac_addr(struct e1000_hw * hw);
 int32_t e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask);
 void e1000_swfw_sync_release(struct e1000_hw *hw, uint16_t mask);
+void e1000_release_software_flag(struct e1000_hw *hw);
+int32_t e1000_get_software_flag(struct e1000_hw *hw);
 /* Filters (multicast, vlan, receive) */
 void e1000_mc_addr_list_update(struct e1000_hw *hw, uint8_t * mc_addr_list, uint32_t mc_addr_count, uint32_t pad, uint32_t rar_used_count);
@@ -401,6 +417,7 @@ int32_t e1000_setup_led(struct e1000_hw *hw);
 int32_t e1000_cleanup_led(struct e1000_hw *hw);
 int32_t e1000_led_on(struct e1000_hw *hw);
 int32_t e1000_led_off(struct e1000_hw *hw);
+int32_t e1000_blink_led_start(struct e1000_hw *hw);
 /* Adaptive IFS Functions */
@@ -422,6 +439,29 @@ int32_t e1000_disable_pciex_master(struct e1000_hw *hw);
 int32_t e1000_get_software_semaphore(struct e1000_hw *hw);
 void e1000_release_software_semaphore(struct e1000_hw *hw);
 int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
+int32_t e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, uint32_t no_snoop);
+int32_t e1000_read_ich8_byte(struct e1000_hw *hw, uint32_t index,
+                             uint8_t *data);
+int32_t e1000_verify_write_ich8_byte(struct e1000_hw *hw, uint32_t index,
+                                     uint8_t byte);
+int32_t e1000_write_ich8_byte(struct e1000_hw *hw, uint32_t index,
+                              uint8_t byte);
+int32_t e1000_read_ich8_word(struct e1000_hw *hw, uint32_t index,
+                             uint16_t *data);
+int32_t e1000_read_ich8_data(struct e1000_hw *hw, uint32_t index,
+                             uint32_t size, uint16_t *data);
+int32_t e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset,
+                               uint16_t words, uint16_t *data);
+int32_t e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset,
+                                uint16_t words, uint16_t *data);
+int32_t e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t segment);
+#define E1000_READ_REG_IO(a, reg) \
+    e1000_read_reg_io((a), E1000_##reg)
+#define E1000_WRITE_REG_IO(a, reg, val) \
+    e1000_write_reg_io((a), E1000_##reg, val)
 /* PCI Device IDs */
 #define E1000_DEV_ID_82542               0x1000
@@ -446,6 +486,7 @@ int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
 #define E1000_DEV_ID_82546EB_QUAD_COPPER 0x101D
 #define E1000_DEV_ID_82541EI             0x1013
 #define E1000_DEV_ID_82541EI_MOBILE      0x1018
+#define E1000_DEV_ID_82541ER_LOM         0x1014
 #define E1000_DEV_ID_82541ER             0x1078
 #define E1000_DEV_ID_82547GI             0x1075
 #define E1000_DEV_ID_82541GI             0x1076
@@ -457,18 +498,28 @@ int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
 #define E1000_DEV_ID_82546GB_PCIE        0x108A
 #define E1000_DEV_ID_82546GB_QUAD_COPPER 0x1099
 #define E1000_DEV_ID_82547EI             0x1019
+#define E1000_DEV_ID_82547EI_MOBILE      0x101A
 #define E1000_DEV_ID_82571EB_COPPER      0x105E
 #define E1000_DEV_ID_82571EB_FIBER       0x105F
 #define E1000_DEV_ID_82571EB_SERDES      0x1060
 #define E1000_DEV_ID_82572EI_COPPER      0x107D
 #define E1000_DEV_ID_82572EI_FIBER       0x107E
 #define E1000_DEV_ID_82572EI_SERDES      0x107F
+#define E1000_DEV_ID_82572EI             0x10B9
 #define E1000_DEV_ID_82573E              0x108B
 #define E1000_DEV_ID_82573E_IAMT         0x108C
 #define E1000_DEV_ID_82573L              0x109A
 #define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5
 #define E1000_DEV_ID_80003ES2LAN_COPPER_DPT     0x1096
 #define E1000_DEV_ID_80003ES2LAN_SERDES_DPT     0x1098
+#define E1000_DEV_ID_80003ES2LAN_COPPER_SPT     0x10BA
+#define E1000_DEV_ID_80003ES2LAN_SERDES_SPT     0x10BB
+#define E1000_DEV_ID_ICH8_IGP_M_AMT      0x1049
+#define E1000_DEV_ID_ICH8_IGP_AMT        0x104A
+#define E1000_DEV_ID_ICH8_IGP_C          0x104B
+#define E1000_DEV_ID_ICH8_IFE            0x104C
+#define E1000_DEV_ID_ICH8_IGP_M          0x104D
 #define NODE_ADDRESS_SIZE 6
@@ -539,6 +590,14 @@ int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
    E1000_IMS_RXSEQ  |    \
    E1000_IMS_LSC)
+/* Additional interrupts need to be handled for e1000_ich8lan:
+    DSW = The FW changed the status of the DISSW bit in FWSM
+    PHYINT = The LAN connected device generates an interrupt
+    EPRST = Manageability reset event */
+#define IMS_ICH8LAN_ENABLE_MASK (\
+    E1000_IMS_DSW   | \
+    E1000_IMS_PHYINT | \
+    E1000_IMS_EPRST)
 /* Number of high/low register pairs in the RAR. The RAR (Receive Address
 * Registers) holds the directed and multicast addresses that we monitor. We
@@ -546,6 +605,7 @@ int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
 * E1000_RAR_ENTRIES - 1 multicast addresses.
 */
 #define E1000_RAR_ENTRIES 15
+#define E1000_RAR_ENTRIES_ICH8LAN  7
 #define MIN_NUMBER_OF_DESCRIPTORS 8
 #define MAX_NUMBER_OF_DESCRIPTORS 0xFFF8
@@ -767,6 +827,9 @@ struct e1000_data_desc {
 #define E1000_MC_TBL_SIZE          128  /* Multicast Filter Table (4096 bits) */
 #define E1000_VLAN_FILTER_TBL_SIZE 128  /* VLAN Filter Table (4096 bits) */
+#define E1000_NUM_UNICAST_ICH8LAN  7
+#define E1000_MC_TBL_SIZE_ICH8LAN  32
 /* Receive Address Register */
 struct e1000_rar {
@@ -776,6 +839,7 @@ struct e1000_rar {
 /* Number of entries in the Multicast Table Array (MTA). */
 #define E1000_NUM_MTA_REGISTERS 128
+#define E1000_NUM_MTA_REGISTERS_ICH8LAN 32
 /* IPv4 Address Table Entry */
 struct e1000_ipv4_at_entry {
@@ -786,6 +850,7 @@ struct e1000_ipv4_at_entry {
 /* Four wakeup IP addresses are supported */
 #define E1000_WAKEUP_IP_ADDRESS_COUNT_MAX 4
 #define E1000_IP4AT_SIZE                  E1000_WAKEUP_IP_ADDRESS_COUNT_MAX
+#define E1000_IP4AT_SIZE_ICH8LAN          3
 #define E1000_IP6AT_SIZE                  1
 /* IPv6 Address Table Entry */
@@ -844,6 +909,7 @@ struct e1000_ffvt_entry {
 #define E1000_FLA      0x0001C  /* Flash Access - RW */
 #define E1000_MDIC     0x00020  /* MDI Control - RW */
 #define E1000_SCTL     0x00024  /* SerDes Control - RW */
+#define E1000_FEXTNVM  0x00028  /* Future Extended NVM register */
 #define E1000_FCAL     0x00028  /* Flow Control Address Low - RW */
 #define E1000_FCAH     0x0002C  /* Flow Control Address High -RW */
 #define E1000_FCT      0x00030  /* Flow Control Type - RW */
@@ -872,6 +938,8 @@ struct e1000_ffvt_entry {
 #define E1000_LEDCTL   0x00E00  /* LED Control - RW */
 #define E1000_EXTCNF_CTRL  0x00F00  /* Extended Configuration Control */
 #define E1000_EXTCNF_SIZE  0x00F08  /* Extended Configuration Size */
+#define E1000_PHY_CTRL     0x00F10  /* PHY Control Register in CSR */
+#define FEXTNVM_SW_CONFIG  0x0001
 #define E1000_PBA      0x01000  /* Packet Buffer Allocation - RW */
 #define E1000_PBS      0x01008  /* Packet Buffer Size */
 #define E1000_EEMNGCTL 0x01010  /* MNG EEprom Control */
@@ -899,11 +967,13 @@ struct e1000_ffvt_entry {
 #define E1000_RDH0     E1000_RDH   /* RX Desc Head (0) - RW */
 #define E1000_RDT0     E1000_RDT   /* RX Desc Tail (0) - RW */
 #define E1000_RDTR0    E1000_RDTR  /* RX Delay Timer (0) - RW */
-#define E1000_RXDCTL   0x02828  /* RX Descriptor Control - RW */
+#define E1000_RXDCTL   0x02828  /* RX Descriptor Control queue 0 - RW */
+#define E1000_RXDCTL1  0x02928  /* RX Descriptor Control queue 1 - RW */
 #define E1000_RADV     0x0282C  /* RX Interrupt Absolute Delay Timer - RW */
 #define E1000_RSRPD    0x02C00  /* RX Small Packet Detect - RW */
 #define E1000_RAID     0x02C08  /* Receive Ack Interrupt Delay - RW */
 #define E1000_TXDMAC   0x03000  /* TX DMA Control - RW */
+#define E1000_KABGTXD  0x03004  /* AFE Band Gap Transmit Ref Data */
 #define E1000_TDFH     0x03410  /* TX Data FIFO Head - RW */
 #define E1000_TDFT     0x03418  /* TX Data FIFO Tail - RW */
 #define E1000_TDFHS    0x03420  /* TX Data FIFO Head Saved - RW */
@@ -1050,6 +1120,7 @@ struct e1000_ffvt_entry {
 #define E1000_82542_FLA      E1000_FLA
 #define E1000_82542_MDIC     E1000_MDIC
 #define E1000_82542_SCTL     E1000_SCTL
+#define E1000_82542_FEXTNVM  E1000_FEXTNVM
 #define E1000_82542_FCAL     E1000_FCAL
 #define E1000_82542_FCAH     E1000_FCAH
 #define E1000_82542_FCT      E1000_FCT
@@ -1073,6 +1144,19 @@ struct e1000_ffvt_entry {
 #define E1000_82542_RDLEN0   E1000_82542_RDLEN
 #define E1000_82542_RDH0     E1000_82542_RDH
 #define E1000_82542_RDT0     E1000_82542_RDT
+#define E1000_82542_SRRCTL(_n) (0x280C + ((_n) << 8)) /* Split and Replication
+                                                       * RX Control - RW */
+#define E1000_82542_DCA_RXCTRL(_n) (0x02814 + ((_n) << 8))
+#define E1000_82542_RDBAH3   0x02B04 /* RX Desc Base High Queue 3 - RW */
+#define E1000_82542_RDBAL3   0x02B00 /* RX Desc Low Queue 3 - RW */
+#define E1000_82542_RDLEN3   0x02B08 /* RX Desc Length Queue 3 - RW */
+#define E1000_82542_RDH3     0x02B10 /* RX Desc Head Queue 3 - RW */
+#define E1000_82542_RDT3     0x02B18 /* RX Desc Tail Queue 3 - RW */
+#define E1000_82542_RDBAL2   0x02A00 /* RX Desc Base Low Queue 2 - RW */
+#define E1000_82542_RDBAH2   0x02A04 /* RX Desc Base High Queue 2 - RW */
+#define E1000_82542_RDLEN2   0x02A08 /* RX Desc Length Queue 2 - RW */
+#define E1000_82542_RDH2     0x02A10 /* RX Desc Head Queue 2 - RW */
+#define E1000_82542_RDT2     0x02A18 /* RX Desc Tail Queue 2 - RW */
 #define E1000_82542_RDTR1    0x00130
 #define E1000_82542_RDBAL1   0x00138
 #define E1000_82542_RDBAH1   0x0013C
@@ -1110,11 +1194,14 @@ struct e1000_ffvt_entry {
 #define E1000_82542_FLOP     E1000_FLOP
 #define E1000_82542_EXTCNF_CTRL  E1000_EXTCNF_CTRL
 #define E1000_82542_EXTCNF_SIZE  E1000_EXTCNF_SIZE
+#define E1000_82542_PHY_CTRL E1000_PHY_CTRL
 #define E1000_82542_ERT      E1000_ERT
 #define E1000_82542_RXDCTL   E1000_RXDCTL
+#define E1000_82542_RXDCTL1  E1000_RXDCTL1
 #define E1000_82542_RADV     E1000_RADV
 #define E1000_82542_RSRPD    E1000_RSRPD
 #define E1000_82542_TXDMAC   E1000_TXDMAC
+#define E1000_82542_KABGTXD  E1000_KABGTXD
 #define E1000_82542_TDFHS    E1000_TDFHS
 #define E1000_82542_TDFTS    E1000_TDFTS
 #define E1000_82542_TDFPC    E1000_TDFPC
@@ -1310,13 +1397,16 @@ struct e1000_hw_stats {
 /* Structure containing variables used by the shared code (e1000_hw.c) */
 struct e1000_hw {
-    uint8_t __iomem *hw_addr;
+    uint8_t *hw_addr;
    uint8_t *flash_address;
    e1000_mac_type mac_type;
    e1000_phy_type phy_type;
    uint32_t phy_init_script;
    e1000_media_type media_type;
    void *back;
+    struct e1000_shadow_ram *eeprom_shadow_ram;
+    uint32_t flash_bank_size;
+    uint32_t flash_base_addr;
    e1000_fc_type fc;
    e1000_bus_speed bus_speed;
    e1000_bus_width bus_width;
@@ -1328,6 +1418,7 @@ struct e1000_hw {
    uint32_t asf_firmware_present;
    uint32_t eeprom_semaphore_present;
    uint32_t swfw_sync_present;
+    uint32_t swfwhw_semaphore_present;
    unsigned long io_base;
    uint32_t phy_id;
    uint32_t phy_revision;
@@ -1387,6 +1478,7 @@ struct e1000_hw {
    boolean_t in_ifs_mode;
    boolean_t mng_reg_access_disabled;
    boolean_t leave_av_bit_off;
+    boolean_t kmrn_lock_loss_workaround_disabled;
 };
@@ -1435,6 +1527,7 @@ struct e1000_hw {
 #define E1000_CTRL_RTE      0x20000000  /* Routing tag enable */
 #define E1000_CTRL_VME      0x40000000  /* IEEE VLAN mode enable */
 #define E1000_CTRL_PHY_RST  0x80000000  /* PHY Reset */
+#define E1000_CTRL_SW2FW_INT 0x02000000  /* Initiate an interrupt to manageability engine */
 /* Device Status */
 #define E1000_STATUS_FD         0x00000001      /* Full duplex.0=half,1=full */
@@ -1449,6 +1542,8 @@ struct e1000_hw {
 #define E1000_STATUS_SPEED_10   0x00000000      /* Speed 10Mb/s */
 #define E1000_STATUS_SPEED_100  0x00000040      /* Speed 100Mb/s */
 #define E1000_STATUS_SPEED_1000 0x00000080      /* Speed 1000Mb/s */
+#define E1000_STATUS_LAN_INIT_DONE 0x00000200   /* Lan Init Completion
+                                                   by EEPROM/Flash */
 #define E1000_STATUS_ASDV       0x00000300      /* Auto speed detect value */
 #define E1000_STATUS_DOCK_CI    0x00000800      /* Change in Dock/Undock state. Clear on write '0'. */
 #define E1000_STATUS_GIO_MASTER_ENABLE 0x00080000 /* Status of Master requests. */
@@ -1506,6 +1601,10 @@ struct e1000_hw {
 #define E1000_STM_OPCODE     0xDB00
 #define E1000_HICR_FW_RESET  0xC0
+#define E1000_SHADOW_RAM_WORDS     2048
+#define E1000_ICH8_NVM_SIG_WORD    0x13
+#define E1000_ICH8_NVM_SIG_MASK    0xC0
 /* EEPROM Read */
 #define E1000_EERD_START      0x00000001 /* Start Read */
 #define E1000_EERD_DONE       0x00000010 /* Read Done */
@@ -1551,7 +1650,6 @@ struct e1000_hw {
 #define E1000_CTRL_EXT_WR_WMARK_320   0x01000000
 #define E1000_CTRL_EXT_WR_WMARK_384   0x02000000
 #define E1000_CTRL_EXT_WR_WMARK_448   0x03000000
-#define E1000_CTRL_EXT_CANC           0x04000000  /* Interrupt delay cancellation */
 #define E1000_CTRL_EXT_DRV_LOAD       0x10000000  /* Driver loaded bit for FW */
 #define E1000_CTRL_EXT_IAME           0x08000000  /* Interrupt acknowledge Auto-mask */
 #define E1000_CTRL_EXT_INT_TIMER_CLR  0x20000000  /* Clear Interrupt timers after IMS clear */
@@ -1591,12 +1689,31 @@ struct e1000_hw {
 #define E1000_KUMCTRLSTA_FIFO_CTRL_TX_BYPASS   0x00000800
 /* In-Band Control */
+#define E1000_KUMCTRLSTA_INB_CTRL_LINK_STATUS_TX_TIMEOUT_DEFAULT    0x00000500
 #define E1000_KUMCTRLSTA_INB_CTRL_DIS_PADDING  0x00000010
 /* Half-Duplex Control */
 #define E1000_KUMCTRLSTA_HD_CTRL_10_100_DEFAULT 0x00000004
 #define E1000_KUMCTRLSTA_HD_CTRL_1000_DEFAULT  0x00000000
+#define E1000_KUMCTRLSTA_OFFSET_K0S_CTRL       0x0000001E
+#define E1000_KUMCTRLSTA_DIAG_FELPBK           0x2000
+#define E1000_KUMCTRLSTA_DIAG_NELPBK           0x1000
+#define E1000_KUMCTRLSTA_K0S_100_EN            0x2000
+#define E1000_KUMCTRLSTA_K0S_GBE_EN            0x1000
+#define E1000_KUMCTRLSTA_K0S_ENTRY_LATENCY_MASK   0x0003
+#define E1000_KABGTXD_BGSQLBIAS                0x00050000
+#define E1000_PHY_CTRL_SPD_EN                  0x00000001
+#define E1000_PHY_CTRL_D0A_LPLU                0x00000002
+#define E1000_PHY_CTRL_NOND0A_LPLU             0x00000004
+#define E1000_PHY_CTRL_NOND0A_GBE_DISABLE      0x00000008
+#define E1000_PHY_CTRL_GBE_DISABLE             0x00000040
+#define E1000_PHY_CTRL_B2B_EN                  0x00000080
 /* LED Control */
 #define E1000_LEDCTL_LED0_MODE_MASK       0x0000000F
 #define E1000_LEDCTL_LED0_MODE_SHIFT      0
@@ -1666,6 +1783,9 @@ struct e1000_hw {
 #define E1000_ICR_RXD_FIFO_PAR1 0x01000000 /* queue 1 Rx descriptor FIFO parity error */
 #define E1000_ICR_TXD_FIFO_PAR1 0x02000000 /* queue 1 Tx descriptor FIFO parity error */
 #define E1000_ICR_ALL_PARITY    0x03F00000 /* all parity error bits */
+#define E1000_ICR_DSW           0x00000020 /* FW changed the status of DISSW bit in the FWSM */
+#define E1000_ICR_PHYINT        0x00001000 /* LAN connected device generates an interrupt */
+#define E1000_ICR_EPRST         0x00100000 /* ME handware reset occurs */
 /* Interrupt Cause Set */
 #define E1000_ICS_TXDW      E1000_ICR_TXDW      /* Transmit desc written back */
@@ -1692,6 +1812,9 @@ struct e1000_hw {
 #define E1000_ICS_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity error */
 #define E1000_ICS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* queue 1 Rx descriptor FIFO parity error */
 #define E1000_ICS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* queue 1 Tx descriptor FIFO parity error */
+#define E1000_ICS_DSW       E1000_ICR_DSW
+#define E1000_ICS_PHYINT    E1000_ICR_PHYINT
+#define E1000_ICS_EPRST     E1000_ICR_EPRST
 /* Interrupt Mask Set */
 #define E1000_IMS_TXDW      E1000_ICR_TXDW      /* Transmit desc written back */
@@ -1718,6 +1841,9 @@ struct e1000_hw {
 #define E1000_IMS_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity error */
 #define E1000_IMS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* queue 1 Rx descriptor FIFO parity error */
 #define E1000_IMS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* queue 1 Tx descriptor FIFO parity error */
+#define E1000_IMS_DSW       E1000_ICR_DSW
+#define E1000_IMS_PHYINT    E1000_ICR_PHYINT
+#define E1000_IMS_EPRST     E1000_ICR_EPRST
 /* Interrupt Mask Clear */
 #define E1000_IMC_TXDW      E1000_ICR_TXDW      /* Transmit desc written back */
@@ -1744,6 +1870,9 @@ struct e1000_hw {
 #define E1000_IMC_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity error */
 #define E1000_IMC_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* queue 1 Rx descriptor FIFO parity error */
 #define E1000_IMC_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* queue 1 Tx descriptor FIFO parity error */
+#define E1000_IMC_DSW       E1000_ICR_DSW
+#define E1000_IMC_PHYINT    E1000_ICR_PHYINT
+#define E1000_IMC_EPRST     E1000_ICR_EPRST
 /* Receive Control */
 #define E1000_RCTL_RST            0x00000001    /* Software reset */
@@ -1918,9 +2047,10 @@ struct e1000_hw {
 #define E1000_MRQC_RSS_FIELD_MASK           0xFFFF0000
 #define E1000_MRQC_RSS_FIELD_IPV4_TCP       0x00010000
 #define E1000_MRQC_RSS_FIELD_IPV4           0x00020000
-#define E1000_MRQC_RSS_FIELD_IPV6_TCP       0x00040000
+#define E1000_MRQC_RSS_FIELD_IPV6_TCP_EX    0x00040000
 #define E1000_MRQC_RSS_FIELD_IPV6_EX        0x00080000
 #define E1000_MRQC_RSS_FIELD_IPV6           0x00100000
+#define E1000_MRQC_RSS_FIELD_IPV6_TCP       0x00200000
 /* Definitions for power management and wakeup registers */
 /* Wake Up Control */
@@ -2010,6 +2140,15 @@ struct e1000_hw {
 #define E1000_FWSM_MODE_SHIFT            1
 #define E1000_FWSM_FW_VALID     0x00008000 /* FW established a valid mode */
+#define E1000_FWSM_RSPCIPHY        0x00000040 /* Reset PHY on PCI reset */
+#define E1000_FWSM_DISSW           0x10000000 /* FW disable SW Write Access */
+#define E1000_FWSM_SKUSEL_MASK     0x60000000 /* LAN SKU select */
+#define E1000_FWSM_SKUEL_SHIFT     29
+#define E1000_FWSM_SKUSEL_EMB      0x0 /* Embedded SKU */
+#define E1000_FWSM_SKUSEL_CONS     0x1 /* Consumer SKU */
+#define E1000_FWSM_SKUSEL_PERF_100 0x2 /* Perf & Corp 10/100 SKU */
+#define E1000_FWSM_SKUSEL_PERF_GBE 0x3 /* Perf & Copr GbE SKU */
 /* FFLT Debug Register */
 #define E1000_FFLT_DBG_INVC     0x00100000 /* Invalid /C/ code handling */
@@ -2082,6 +2221,8 @@ struct e1000_host_command_info {
                             E1000_GCR_TXDSCW_NO_SNOOP      | \
                             E1000_GCR_TXDSCR_NO_SNOOP)
+#define PCI_EX_82566_SNOOP_ALL PCI_EX_NO_SNOOP_ALL
 #define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
 /* Function Active and Power State to MNG */
 #define E1000_FACTPS_FUNC0_POWER_STATE_MASK         0x00000003
@@ -2140,8 +2281,10 @@ struct e1000_host_command_info {
 #define EEPROM_PHY_CLASS_WORD         0x0007
 #define EEPROM_INIT_CONTROL1_REG      0x000A
 #define EEPROM_INIT_CONTROL2_REG      0x000F
+#define EEPROM_SWDEF_PINS_CTRL_PORT_1 0x0010
 #define EEPROM_INIT_CONTROL3_PORT_B   0x0014
 #define EEPROM_INIT_3GIO_3            0x001A
+#define EEPROM_SWDEF_PINS_CTRL_PORT_0 0x0020
 #define EEPROM_INIT_CONTROL3_PORT_A   0x0024
 #define EEPROM_CFG                    0x0012
 #define EEPROM_FLASH_VERSION          0x0032
@@ -2153,10 +2296,16 @@ struct e1000_host_command_info {
 /* Word definitions for ID LED Settings */
 #define ID_LED_RESERVED_0000 0x0000
 #define ID_LED_RESERVED_FFFF 0xFFFF
+#define ID_LED_RESERVED_82573  0xF746
+#define ID_LED_DEFAULT_82573   0x1811
 #define ID_LED_DEFAULT       ((ID_LED_OFF1_ON2 << 12) | \
                              (ID_LED_OFF1_OFF2 << 8) | \
                              (ID_LED_DEF1_DEF2 << 4) | \
                              (ID_LED_DEF1_DEF2))
+#define ID_LED_DEFAULT_ICH8LAN  ((ID_LED_DEF1_DEF2 << 12) | \
+                                 (ID_LED_DEF1_OFF2 <<  8) | \
+                                 (ID_LED_DEF1_ON2  <<  4) | \
+                                 (ID_LED_DEF1_DEF2))
 #define ID_LED_DEF1_DEF2     0x1
 #define ID_LED_DEF1_ON2      0x2
 #define ID_LED_DEF1_OFF2     0x3
@@ -2191,6 +2340,11 @@ struct e1000_host_command_info {
 #define EEPROM_WORD0F_ASM_DIR    0x2000
 #define EEPROM_WORD0F_ANE        0x0800
 #define EEPROM_WORD0F_SWPDIO_EXT 0x00F0
+#define EEPROM_WORD0F_LPLU       0x0001
+/* Mask bits for fields in Word 0x10/0x20 of the EEPROM */
+#define EEPROM_WORD1020_GIGA_DISABLE         0x0010
+#define EEPROM_WORD1020_GIGA_DISABLE_NON_D0A 0x0008
 /* Mask bits for fields in Word 0x1a of the EEPROM */
 #define EEPROM_WORD1A_ASPM_MASK  0x000C
@@ -2265,23 +2419,29 @@ struct e1000_host_command_info {
 #define E1000_EXTCNF_CTRL_D_UD_OWNER        0x00000010
 #define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP 0x00000020
 #define E1000_EXTCNF_CTRL_MDIO_HW_OWNERSHIP 0x00000040
-#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER   0x1FFF0000
+#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER   0x0FFF0000
 #define E1000_EXTCNF_SIZE_EXT_PHY_LENGTH    0x000000FF
 #define E1000_EXTCNF_SIZE_EXT_DOCK_LENGTH   0x0000FF00
 #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH   0x00FF0000
+#define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE  0x00000001
+#define E1000_EXTCNF_CTRL_SWFLAG            0x00000020
 /* PBA constants */
+#define E1000_PBA_8K 0x0008    /* 8KB, default Rx allocation */
 #define E1000_PBA_12K 0x000C    /* 12KB, default Rx allocation */
 #define E1000_PBA_16K 0x0010    /* 16KB, default TX allocation */
 #define E1000_PBA_22K 0x0016
 #define E1000_PBA_24K 0x0018
 #define E1000_PBA_30K 0x001E
 #define E1000_PBA_32K 0x0020
+#define E1000_PBA_34K 0x0022
 #define E1000_PBA_38K 0x0026
 #define E1000_PBA_40K 0x0028
 #define E1000_PBA_48K 0x0030    /* 48KB, default RX allocation */
+#define E1000_PBS_16K E1000_PBA_16K
 /* Flow Control Constants */
 #define FLOW_CONTROL_ADDRESS_LOW  0x00C28001
 #define FLOW_CONTROL_ADDRESS_HIGH 0x00000100
@@ -2336,7 +2496,7 @@ struct e1000_host_command_info {
 /* Number of milliseconds we wait for Eeprom auto read bit done after MAC reset */
 #define AUTO_READ_DONE_TIMEOUT      10
 /* Number of milliseconds we wait for PHY configuration done after MAC reset */
-#define PHY_CFG_TIMEOUT             40
+#define PHY_CFG_TIMEOUT             100
 #define E1000_TX_BUFFER_SIZE ((uint32_t)1514)
@@ -2764,6 +2924,17 @@ struct e1000_host_command_info {
 #define M88E1000_EPSCR_TX_CLK_25      0x0070 /* 25  MHz TX_CLK */
 #define M88E1000_EPSCR_TX_CLK_0       0x0000 /* NO  TX_CLK */
+/* M88EC018 Rev 2 specific DownShift settings */
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK  0x0E00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X    0x0000
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X    0x0200
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X    0x0400
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X    0x0600
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X    0x0800
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X    0x0A00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X    0x0C00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X    0x0E00
 /* IGP01E1000 Specific Port Config Register - R/W */
 #define IGP01E1000_PSCFR_AUTO_MDIX_PAR_DETECT  0x0010
 #define IGP01E1000_PSCFR_PRE_EN                0x0020
@@ -2990,6 +3161,221 @@ struct e1000_host_command_info {
 #define L1LXT971A_PHY_ID   0x001378E0
 #define GG82563_E_PHY_ID   0x01410CA0
+/* Bits...
+ * 15-5: page
+ * 4-0: register offset
+ */
+#define PHY_PAGE_SHIFT        5
+#define PHY_REG(page, reg)    \
+        (((page) << PHY_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
+#define IGP3_PHY_PORT_CTRL           \
+        PHY_REG(769, 17) /* Port General Configuration */
+#define IGP3_PHY_RATE_ADAPT_CTRL \
+        PHY_REG(769, 25) /* Rate Adapter Control Register */
+#define IGP3_KMRN_FIFO_CTRL_STATS \
+        PHY_REG(770, 16) /* KMRN FIFO's control/status register */
+#define IGP3_KMRN_POWER_MNG_CTRL \
+        PHY_REG(770, 17) /* KMRN Power Management Control Register */
+#define IGP3_KMRN_INBAND_CTRL \
+        PHY_REG(770, 18) /* KMRN Inband Control Register */
+#define IGP3_KMRN_DIAG \
+        PHY_REG(770, 19) /* KMRN Diagnostic register */
+#define IGP3_KMRN_DIAG_PCS_LOCK_LOSS 0x0002 /* RX PCS is not synced */
+#define IGP3_KMRN_ACK_TIMEOUT \
+        PHY_REG(770, 20) /* KMRN Acknowledge Timeouts register */
+#define IGP3_VR_CTRL \
+        PHY_REG(776, 18) /* Voltage regulator control register */
+#define IGP3_VR_CTRL_MODE_SHUT       0x0200 /* Enter powerdown, shutdown VRs */
+#define IGP3_CAPABILITY \
+        PHY_REG(776, 19) /* IGP3 Capability Register */
+/* Capabilities for SKU Control  */
+#define IGP3_CAP_INITIATE_TEAM       0x0001 /* Able to initiate a team */
+#define IGP3_CAP_WFM                 0x0002 /* Support WoL and PXE */
+#define IGP3_CAP_ASF                 0x0004 /* Support ASF */
+#define IGP3_CAP_LPLU                0x0008 /* Support Low Power Link Up */
+#define IGP3_CAP_DC_AUTO_SPEED       0x0010 /* Support AC/DC Auto Link Speed */
+#define IGP3_CAP_SPD                 0x0020 /* Support Smart Power Down */
+#define IGP3_CAP_MULT_QUEUE          0x0040 /* Support 2 tx & 2 rx queues */
+#define IGP3_CAP_RSS                 0x0080 /* Support RSS */
+#define IGP3_CAP_8021PQ              0x0100 /* Support 802.1Q & 802.1p */
+#define IGP3_CAP_AMT_CB              0x0200 /* Support active manageability and circuit breaker */
+#define IGP3_PPC_JORDAN_EN           0x0001
+#define IGP3_PPC_JORDAN_GIGA_SPEED   0x0002
+#define IGP3_KMRN_PMC_EE_IDLE_LINK_DIS         0x0001
+#define IGP3_KMRN_PMC_K0S_ENTRY_LATENCY_MASK   0x001E
+#define IGP3_KMRN_PMC_K0S_MODE1_EN_GIGA        0x0020
+#define IGP3_KMRN_PMC_K0S_MODE1_EN_100         0x0040
+#define IGP3E1000_PHY_MISC_CTRL                0x1B   /* Misc. Ctrl register */
+#define IGP3_PHY_MISC_DUPLEX_MANUAL_SET        0x1000 /* Duplex Manual Set */
+#define IGP3_KMRN_EXT_CTRL  PHY_REG(770, 18)
+#define IGP3_KMRN_EC_DIS_INBAND    0x0080
+#define IGP03E1000_E_PHY_ID  0x02A80390
+#define IFE_E_PHY_ID         0x02A80330 /* 10/100 PHY */
+#define IFE_PLUS_E_PHY_ID    0x02A80320
+#define IFE_C_E_PHY_ID       0x02A80310
+#define IFE_PHY_EXTENDED_STATUS_CONTROL   0x10  /* 100BaseTx Extended Status, Control and Address */
+#define IFE_PHY_SPECIAL_CONTROL           0x11  /* 100BaseTx PHY special control register */
+#define IFE_PHY_RCV_FALSE_CARRIER         0x13  /* 100BaseTx Receive False Carrier Counter */
+#define IFE_PHY_RCV_DISCONNECT            0x14  /* 100BaseTx Receive Disconnet Counter */
+#define IFE_PHY_RCV_ERROT_FRAME           0x15  /* 100BaseTx Receive Error Frame Counter */
+#define IFE_PHY_RCV_SYMBOL_ERR            0x16  /* Receive Symbol Error Counter */
+#define IFE_PHY_PREM_EOF_ERR              0x17  /* 100BaseTx Receive Premature End Of Frame Error Counter */
+#define IFE_PHY_RCV_EOF_ERR               0x18  /* 10BaseT Receive End Of Frame Error Counter */
+#define IFE_PHY_TX_JABBER_DETECT          0x19  /* 10BaseT Transmit Jabber Detect Counter */
+#define IFE_PHY_EQUALIZER                 0x1A  /* PHY Equalizer Control and Status */
+#define IFE_PHY_SPECIAL_CONTROL_LED       0x1B  /* PHY special control and LED configuration */
+#define IFE_PHY_MDIX_CONTROL              0x1C  /* MDI/MDI-X Control register */
+#define IFE_PHY_HWI_CONTROL               0x1D  /* Hardware Integrity Control (HWI) */
+#define IFE_PESC_REDUCED_POWER_DOWN_DISABLE  0x2000  /* Defaut 1 = Disable auto reduced power down */
+#define IFE_PESC_100BTX_POWER_DOWN           0x0400  /* Indicates the power state of 100BASE-TX */
+#define IFE_PESC_10BTX_POWER_DOWN            0x0200  /* Indicates the power state of 10BASE-T */
+#define IFE_PESC_POLARITY_REVERSED           0x0100  /* Indicates 10BASE-T polarity */
+#define IFE_PESC_PHY_ADDR_MASK               0x007C  /* Bit 6:2 for sampled PHY address */
+#define IFE_PESC_SPEED                       0x0002  /* Auto-negotiation speed result 1=100Mbs, 0=10Mbs */
+#define IFE_PESC_DUPLEX                      0x0001  /* Auto-negotiation duplex result 1=Full, 0=Half */
+#define IFE_PESC_POLARITY_REVERSED_SHIFT     8
+#define IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN   0x0100  /* 1 = Dyanmic Power Down disabled */
+#define IFE_PSC_FORCE_POLARITY               0x0020  /* 1=Reversed Polarity, 0=Normal */
+#define IFE_PSC_AUTO_POLARITY_DISABLE        0x0010  /* 1=Auto Polarity Disabled, 0=Enabled */
+#define IFE_PSC_JABBER_FUNC_DISABLE          0x0001  /* 1=Jabber Disabled, 0=Normal Jabber Operation */
+#define IFE_PSC_FORCE_POLARITY_SHIFT         5
+#define IFE_PSC_AUTO_POLARITY_DISABLE_SHIFT  4
+#define IFE_PMC_AUTO_MDIX                    0x0080  /* 1=enable MDI/MDI-X feature, default 0=disabled */
+#define IFE_PMC_FORCE_MDIX                   0x0040  /* 1=force MDIX-X, 0=force MDI */
+#define IFE_PMC_MDIX_STATUS                  0x0020  /* 1=MDI-X, 0=MDI */
+#define IFE_PMC_AUTO_MDIX_COMPLETE           0x0010  /* Resolution algorthm is completed */
+#define IFE_PMC_MDIX_MODE_SHIFT              6
+#define IFE_PHC_MDIX_RESET_ALL_MASK          0x0000  /* Disable auto MDI-X */
+#define IFE_PHC_HWI_ENABLE                   0x8000  /* Enable the HWI feature */
+#define IFE_PHC_ABILITY_CHECK                0x4000  /* 1= Test Passed, 0=failed */
+#define IFE_PHC_TEST_EXEC                    0x2000  /* PHY launch test pulses on the wire */
+#define IFE_PHC_HIGHZ                        0x0200  /* 1 = Open Circuit */
+#define IFE_PHC_LOWZ                         0x0400  /* 1 = Short Circuit */
+#define IFE_PHC_LOW_HIGH_Z_MASK              0x0600  /* Mask for indication type of problem on the line */
+#define IFE_PHC_DISTANCE_MASK                0x01FF  /* Mask for distance to the cable problem, in 80cm granularity */
+#define IFE_PHC_RESET_ALL_MASK               0x0000  /* Disable HWI */
+#define IFE_PSCL_PROBE_MODE                  0x0020  /* LED Probe mode */
+#define IFE_PSCL_PROBE_LEDS_OFF              0x0006  /* Force LEDs 0 and 2 off */
+#define IFE_PSCL_PROBE_LEDS_ON               0x0007  /* Force LEDs 0 and 2 on */
+#define ICH8_FLASH_COMMAND_TIMEOUT           500   /* 500 ms , should be adjusted */
+#define ICH8_FLASH_CYCLE_REPEAT_COUNT        10    /* 10 cycles , should be adjusted */
+#define ICH8_FLASH_SEG_SIZE_256              256
+#define ICH8_FLASH_SEG_SIZE_4K               4096
+#define ICH8_FLASH_SEG_SIZE_64K              65536
+#define ICH8_CYCLE_READ                      0x0
+#define ICH8_CYCLE_RESERVED                  0x1
+#define ICH8_CYCLE_WRITE                     0x2
+#define ICH8_CYCLE_ERASE                     0x3
+#define ICH8_FLASH_GFPREG   0x0000
+#define ICH8_FLASH_HSFSTS   0x0004
+#define ICH8_FLASH_HSFCTL   0x0006
+#define ICH8_FLASH_FADDR    0x0008
+#define ICH8_FLASH_FDATA0   0x0010
+#define ICH8_FLASH_FRACC    0x0050
+#define ICH8_FLASH_FREG0    0x0054
+#define ICH8_FLASH_FREG1    0x0058
+#define ICH8_FLASH_FREG2    0x005C
+#define ICH8_FLASH_FREG3    0x0060
+#define ICH8_FLASH_FPR0     0x0074
+#define ICH8_FLASH_FPR1     0x0078
+#define ICH8_FLASH_SSFSTS   0x0090
+#define ICH8_FLASH_SSFCTL   0x0092
+#define ICH8_FLASH_PREOP    0x0094
+#define ICH8_FLASH_OPTYPE   0x0096
+#define ICH8_FLASH_OPMENU   0x0098
+#define ICH8_FLASH_REG_MAPSIZE      0x00A0
+#define ICH8_FLASH_SECTOR_SIZE      4096
+#define ICH8_GFPREG_BASE_MASK       0x1FFF
+#define ICH8_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF
+/* ICH8 GbE Flash Hardware Sequencing Flash Status Register bit breakdown */
+/* Offset 04h HSFSTS */
+union ich8_hws_flash_status {
+    struct ich8_hsfsts {
+#ifdef E1000_BIG_ENDIAN
+        uint16_t reserved2      :6;
+        uint16_t fldesvalid     :1;
+        uint16_t flockdn        :1;
+        uint16_t flcdone        :1;
+        uint16_t flcerr         :1;
+        uint16_t dael           :1;
+        uint16_t berasesz       :2;
+        uint16_t flcinprog      :1;
+        uint16_t reserved1      :2;
+#else
+        uint16_t flcdone        :1;   /* bit 0 Flash Cycle Done */
+        uint16_t flcerr         :1;   /* bit 1 Flash Cycle Error */
+        uint16_t dael           :1;   /* bit 2 Direct Access error Log */
+        uint16_t berasesz       :2;   /* bit 4:3 Block/Sector Erase Size */
+        uint16_t flcinprog      :1;   /* bit 5 flash SPI cycle in Progress */
+        uint16_t reserved1      :2;   /* bit 13:6 Reserved */
+        uint16_t reserved2      :6;   /* bit 13:6 Reserved */
+        uint16_t fldesvalid     :1;   /* bit 14 Flash Descriptor Valid */
+        uint16_t flockdn        :1;   /* bit 15 Flash Configuration Lock-Down */
+#endif
+    } hsf_status;
+    uint16_t regval;
+};
+/* ICH8 GbE Flash Hardware Sequencing Flash control Register bit breakdown */
+/* Offset 06h FLCTL */
+union ich8_hws_flash_ctrl {
+    struct ich8_hsflctl {
+#ifdef E1000_BIG_ENDIAN
+        uint16_t fldbcount      :2;
+        uint16_t flockdn        :6;
+        uint16_t flcgo          :1;
+        uint16_t flcycle        :2;
+        uint16_t reserved       :5;
+#else
+        uint16_t flcgo          :1;   /* 0 Flash Cycle Go */
+        uint16_t flcycle        :2;   /* 2:1 Flash Cycle */
+        uint16_t reserved       :5;   /* 7:3 Reserved  */
+        uint16_t fldbcount      :2;   /* 9:8 Flash Data Byte Count */
+        uint16_t flockdn        :6;   /* 15:10 Reserved */
+#endif
+    } hsf_ctrl;
+    uint16_t regval;
+};
+/* ICH8 Flash Region Access Permissions */
+union ich8_hws_flash_regacc {
+    struct ich8_flracc {
+#ifdef E1000_BIG_ENDIAN
+        uint32_t gmwag          :8;
+        uint32_t gmrag          :8;
+        uint32_t grwa           :8;
+        uint32_t grra           :8;
+#else
+        uint32_t grra           :8;   /* 0:7 GbE region Read Access */
+        uint32_t grwa           :8;   /* 8:15 GbE region Write Access */
+        uint32_t gmrag          :8;   /* 23:16 GbE Master Read Access Grant  */
+        uint32_t gmwag          :8;   /* 31:24 GbE Master Write Access Grant */
+#endif
+    } hsf_flregacc;
+    uint16_t regval;
+};
 /* Miscellaneous PHY bit definitions. */
 #define PHY_PREAMBLE        0xFFFFFFFF
 #define PHY_SOF             0x01
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index f77624f5f17b..6e7d31bacf4d 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -36,7 +36,7 @@ static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
 #else
 #define DRIVERNAPI "-NAPI"
 #endif
-#define DRV_VERSION "7.0.38-k4"DRIVERNAPI
+#define DRV_VERSION "7.1.9-k2"DRIVERNAPI
 char e1000_driver_version[] = DRV_VERSION;
 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
@@ -73,6 +73,11 @@ static struct pci_device_id e1000_pci_tbl[] = {
        INTEL_E1000_ETHERNET_DEVICE(0x1026),
        INTEL_E1000_ETHERNET_DEVICE(0x1027),
        INTEL_E1000_ETHERNET_DEVICE(0x1028),
+        INTEL_E1000_ETHERNET_DEVICE(0x1049),
+        INTEL_E1000_ETHERNET_DEVICE(0x104A),
+        INTEL_E1000_ETHERNET_DEVICE(0x104B),
+        INTEL_E1000_ETHERNET_DEVICE(0x104C),
+        INTEL_E1000_ETHERNET_DEVICE(0x104D),
        INTEL_E1000_ETHERNET_DEVICE(0x105E),
        INTEL_E1000_ETHERNET_DEVICE(0x105F),
        INTEL_E1000_ETHERNET_DEVICE(0x1060),
@@ -96,6 +101,8 @@ static struct pci_device_id e1000_pci_tbl[] = {
        INTEL_E1000_ETHERNET_DEVICE(0x109A),
        INTEL_E1000_ETHERNET_DEVICE(0x10B5),
        INTEL_E1000_ETHERNET_DEVICE(0x10B9),
+        INTEL_E1000_ETHERNET_DEVICE(0x10BA),
+        INTEL_E1000_ETHERNET_DEVICE(0x10BB),
        /* required last entry */
        {0,}
 };
@@ -133,7 +140,6 @@ static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
 static void e1000_set_multi(struct net_device *netdev);
 static void e1000_update_phy_info(unsigned long data);
 static void e1000_watchdog(unsigned long data);
-static void e1000_watchdog_task(struct e1000_adapter *adapter);
 static void e1000_82547_tx_fifo_stall(unsigned long data);
 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
@@ -178,8 +184,8 @@ static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
 static void e1000_restore_vlan(struct e1000_adapter *adapter);
-#ifdef CONFIG_PM
 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
+#ifdef CONFIG_PM
 static int e1000_resume(struct pci_dev *pdev);
 #endif
 static void e1000_shutdown(struct pci_dev *pdev);
@@ -206,8 +212,8 @@ static struct pci_driver e1000_driver = {
        .probe    = e1000_probe,
        .remove   = __devexit_p(e1000_remove),
        /* Power Managment Hooks */
-#ifdef CONFIG_PM
        .suspend  = e1000_suspend,
+#ifdef CONFIG_PM
        .resume   = e1000_resume,
 #endif
        .shutdown = e1000_shutdown,
@@ -261,6 +267,44 @@ e1000_exit_module(void)
 module_exit(e1000_exit_module);
+static int e1000_request_irq(struct e1000_adapter *adapter)
+{
+        struct net_device *netdev = adapter->netdev;
+        int flags, err = 0;
+        flags = IRQF_SHARED;
+#ifdef CONFIG_PCI_MSI
+        if (adapter->hw.mac_type > e1000_82547_rev_2) {
+                adapter->have_msi = TRUE;
+                if ((err = pci_enable_msi(adapter->pdev))) {
+                        DPRINTK(PROBE, ERR,
+                         "Unable to allocate MSI interrupt Error: %d\n", err);
+                        adapter->have_msi = FALSE;
+                }
+        }
+        if (adapter->have_msi)
+                flags &= ~SA_SHIRQ;
+#endif
+        if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
+                               netdev->name, netdev)))
+                DPRINTK(PROBE, ERR,
+                        "Unable to allocate interrupt Error: %d\n", err);
+        return err;
+}
+static void e1000_free_irq(struct e1000_adapter *adapter)
+{
+        struct net_device *netdev = adapter->netdev;
+        free_irq(adapter->pdev->irq, netdev);
+#ifdef CONFIG_PCI_MSI
+        if (adapter->have_msi)
+                pci_disable_msi(adapter->pdev);
+#endif
+}
 /**
 * e1000_irq_disable - Mask off interrupt generation on the NIC
 * @adapter: board private structure
@@ -329,6 +373,7 @@ e1000_release_hw_control(struct e1000_adapter *adapter)
 {
        uint32_t ctrl_ext;
        uint32_t swsm;
+        uint32_t extcnf;
        /* Let firmware taken over control of h/w */
        switch (adapter->hw.mac_type) {
@@ -343,6 +388,11 @@ e1000_release_hw_control(struct e1000_adapter *adapter)
                swsm = E1000_READ_REG(&adapter->hw, SWSM);
                E1000_WRITE_REG(&adapter->hw, SWSM,
                                swsm & ~E1000_SWSM_DRV_LOAD);
+        case e1000_ich8lan:
+                extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
+                E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
+                                extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
+                break;
        default:
                break;
        }
@@ -364,6 +414,7 @@ e1000_get_hw_control(struct e1000_adapter *adapter)
 {
        uint32_t ctrl_ext;
        uint32_t swsm;
+        uint32_t extcnf;
        /* Let firmware know the driver has taken over */
        switch (adapter->hw.mac_type) {
        case e1000_82571:
@@ -378,6 +429,11 @@ e1000_get_hw_control(struct e1000_adapter *adapter)
                E1000_WRITE_REG(&adapter->hw, SWSM,
                                swsm | E1000_SWSM_DRV_LOAD);
                break;
+        case e1000_ich8lan:
+                extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
+                E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
+                                extcnf | E1000_EXTCNF_CTRL_SWFLAG);
+                break;
        default:
                break;
        }
@@ -387,18 +443,10 @@ int
 e1000_up(struct e1000_adapter *adapter)
 {
        struct net_device *netdev = adapter->netdev;
-        int i, err;
+        int i;
        /* hardware has been reset, we need to reload some things */
-        /* Reset the PHY if it was previously powered down */
-        if (adapter->hw.media_type == e1000_media_type_copper) {
-                uint16_t mii_reg;
-                e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
-                if (mii_reg & MII_CR_POWER_DOWN)
-                        e1000_phy_hw_reset(&adapter->hw);
-        }
        e1000_set_multi(netdev);
        e1000_restore_vlan(adapter);
@@ -415,24 +463,6 @@ e1000_up(struct e1000_adapter *adapter)
                                      E1000_DESC_UNUSED(ring));
        }
-#ifdef CONFIG_PCI_MSI
-        if (adapter->hw.mac_type > e1000_82547_rev_2) {
-                adapter->have_msi = TRUE;
-                if ((err = pci_enable_msi(adapter->pdev))) {
-                        DPRINTK(PROBE, ERR,
-                         "Unable to allocate MSI interrupt Error: %d\n", err);
-                        adapter->have_msi = FALSE;
-                }
-        }
-#endif
-        if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
-                              IRQF_SHARED | IRQF_SAMPLE_RANDOM,
-                              netdev->name, netdev))) {
-                DPRINTK(PROBE, ERR,
-                    "Unable to allocate interrupt Error: %d\n", err);
-                return err;
-        }
        adapter->tx_queue_len = netdev->tx_queue_len;
        mod_timer(&adapter->watchdog_timer, jiffies);
@@ -445,21 +475,60 @@ e1000_up(struct e1000_adapter *adapter)
        return 0;
 }
+/**
+ * e1000_power_up_phy - restore link in case the phy was powered down
+ * @adapter: address of board private structure
+ *
+ * The phy may be powered down to save power and turn off link when the
+ * driver is unloaded and wake on lan is not enabled (among others)
+ * *** this routine MUST be followed by a call to e1000_reset ***
+ *
+ **/
+static void e1000_power_up_phy(struct e1000_adapter *adapter)
+{
+        uint16_t mii_reg = 0;
+        /* Just clear the power down bit to wake the phy back up */
+        if (adapter->hw.media_type == e1000_media_type_copper) {
+                /* according to the manual, the phy will retain its
+                 * settings across a power-down/up cycle */
+                e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
+                mii_reg &= ~MII_CR_POWER_DOWN;
+                e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
+        }
+}
+static void e1000_power_down_phy(struct e1000_adapter *adapter)
+{
+        boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
+                                      e1000_check_mng_mode(&adapter->hw);
+        /* Power down the PHY so no link is implied when interface is down
+         * The PHY cannot be powered down if any of the following is TRUE
+         * (a) WoL is enabled
+         * (b) AMT is active
+         * (c) SoL/IDER session is active */
+        if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
+            adapter->hw.mac_type != e1000_ich8lan &&
+            adapter->hw.media_type == e1000_media_type_copper &&
+            !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
+            !mng_mode_enabled &&
+            !e1000_check_phy_reset_block(&adapter->hw)) {
+                uint16_t mii_reg = 0;
+                e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
+                mii_reg |= MII_CR_POWER_DOWN;
+                e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
+                mdelay(1);
+        }
+}
 void
 e1000_down(struct e1000_adapter *adapter)
 {
        struct net_device *netdev = adapter->netdev;
-        boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
-                                     e1000_check_mng_mode(&adapter->hw);
        e1000_irq_disable(adapter);
-        free_irq(adapter->pdev->irq, netdev);
-#ifdef CONFIG_PCI_MSI
-        if (adapter->hw.mac_type > e1000_82547_rev_2 &&
-           adapter->have_msi == TRUE)
-                pci_disable_msi(adapter->pdev);
-#endif
        del_timer_sync(&adapter->tx_fifo_stall_timer);
        del_timer_sync(&adapter->watchdog_timer);
        del_timer_sync(&adapter->phy_info_timer);
@@ -476,23 +545,17 @@ e1000_down(struct e1000_adapter *adapter)
        e1000_reset(adapter);
        e1000_clean_all_tx_rings(adapter);
        e1000_clean_all_rx_rings(adapter);
+}
-        /* Power down the PHY so no link is implied when interface is down *
+void
-         * The PHY cannot be powered down if any of the following is TRUE *
+e1000_reinit_locked(struct e1000_adapter *adapter)
-         * (a) WoL is enabled
+{
-         * (b) AMT is active
+        WARN_ON(in_interrupt());
-         * (c) SoL/IDER session is active */
+        while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
-        if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
+                msleep(1);
-           adapter->hw.media_type == e1000_media_type_copper &&
+        e1000_down(adapter);
-           !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
+        e1000_up(adapter);
-           !mng_mode_enabled &&
+        clear_bit(__E1000_RESETTING, &adapter->flags);
-           !e1000_check_phy_reset_block(&adapter->hw)) {
-                uint16_t mii_reg;
-                e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
-                mii_reg |= MII_CR_POWER_DOWN;
-                e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
-                mdelay(1);
-        }
 }
 void
@@ -518,6 +581,9 @@ e1000_reset(struct e1000_adapter *adapter)
        case e1000_82573:
                pba = E1000_PBA_12K;
                break;
+        case e1000_ich8lan:
+                pba = E1000_PBA_8K;
+                break;
        default:
                pba = E1000_PBA_48K;
                break;
@@ -542,6 +608,12 @@ e1000_reset(struct e1000_adapter *adapter)
        /* Set the FC high water mark to 90% of the FIFO size.
         * Required to clear last 3 LSB */
        fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
+        /* We can't use 90% on small FIFOs because the remainder
+         * would be less than 1 full frame.  In this case, we size
+         * it to allow at least a full frame above the high water
+         *  mark. */
+        if (pba < E1000_PBA_16K)
+                fc_high_water_mark = (pba * 1024) - 1600;
        adapter->hw.fc_high_water = fc_high_water_mark;
        adapter->hw.fc_low_water = fc_high_water_mark - 8;
@@ -564,6 +636,23 @@ e1000_reset(struct e1000_adapter *adapter)
        e1000_reset_adaptive(&adapter->hw);
        e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
+        if (!adapter->smart_power_down &&
+            (adapter->hw.mac_type == e1000_82571 ||
+             adapter->hw.mac_type == e1000_82572)) {
+                uint16_t phy_data = 0;
+                /* speed up time to link by disabling smart power down, ignore
+                 * the return value of this function because there is nothing
+                 * different we would do if it failed */
+                e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
+                                   &phy_data);
+                phy_data &= ~IGP02E1000_PM_SPD;
+                e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
+                                    phy_data);
+        }
+        if (adapter->hw.mac_type < e1000_ich8lan)
+        /* FIXME: this code is duplicate and wrong for PCI Express */
        if (adapter->en_mng_pt) {
                manc = E1000_READ_REG(&adapter->hw, MANC);
                manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
@@ -590,6 +679,7 @@ e1000_probe(struct pci_dev *pdev,
        struct net_device *netdev;
        struct e1000_adapter *adapter;
        unsigned long mmio_start, mmio_len;
+        unsigned long flash_start, flash_len;
        static int cards_found = 0;
        static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
@@ -599,10 +689,12 @@ e1000_probe(struct pci_dev *pdev,
        if ((err = pci_enable_device(pdev)))
                return err;
-        if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
+        if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
+            !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
                pci_using_dac = 1;
        } else {
-                if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
+                if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
+                    (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
                        E1000_ERR("No usable DMA configuration, aborting\n");
                        return err;
                }
@@ -682,6 +774,19 @@ e1000_probe(struct pci_dev *pdev,
        if ((err = e1000_sw_init(adapter)))
                goto err_sw_init;
+        /* Flash BAR mapping must happen after e1000_sw_init
+         * because it depends on mac_type */
+        if ((adapter->hw.mac_type == e1000_ich8lan) &&
+           (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
+                flash_start = pci_resource_start(pdev, 1);
+                flash_len = pci_resource_len(pdev, 1);
+                adapter->hw.flash_address = ioremap(flash_start, flash_len);
+                if (!adapter->hw.flash_address) {
+                        err = -EIO;
+                        goto err_flashmap;
+                }
+        }
        if ((err = e1000_check_phy_reset_block(&adapter->hw)))
                DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
@@ -700,6 +805,8 @@ e1000_probe(struct pci_dev *pdev,
                                   NETIF_F_HW_VLAN_TX |
                                   NETIF_F_HW_VLAN_RX |
                                   NETIF_F_HW_VLAN_FILTER;
+                if (adapter->hw.mac_type == e1000_ich8lan)
+                        netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
        }
 #ifdef NETIF_F_TSO
@@ -715,11 +822,17 @@ e1000_probe(struct pci_dev *pdev,
        if (pci_using_dac)
                netdev->features |= NETIF_F_HIGHDMA;
-        /* hard_start_xmit is safe against parallel locking */
        netdev->features |= NETIF_F_LLTX;
        adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
+        /* initialize eeprom parameters */
+        if (e1000_init_eeprom_params(&adapter->hw)) {
+                E1000_ERR("EEPROM initialization failed\n");
+                return -EIO;
+        }
        /* before reading the EEPROM, reset the controller to
         * put the device in a known good starting state */
@@ -758,9 +871,6 @@ e1000_probe(struct pci_dev *pdev,
        adapter->watchdog_timer.function = &e1000_watchdog;
        adapter->watchdog_timer.data = (unsigned long) adapter;
-        INIT_WORK(&adapter->watchdog_task,
-                (void (*)(void *))e1000_watchdog_task, adapter);
        init_timer(&adapter->phy_info_timer);
        adapter->phy_info_timer.function = &e1000_update_phy_info;
        adapter->phy_info_timer.data = (unsigned long) adapter;
@@ -790,6 +900,11 @@ e1000_probe(struct pci_dev *pdev,
                        EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
                eeprom_apme_mask = E1000_EEPROM_82544_APM;
                break;
+        case e1000_ich8lan:
+                e1000_read_eeprom(&adapter->hw,
+                        EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
+                eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
+                break;
        case e1000_82546:
        case e1000_82546_rev_3:
        case e1000_82571:
@@ -849,6 +964,9 @@ e1000_probe(struct pci_dev *pdev,
        return 0;
 err_register:
+        if (adapter->hw.flash_address)
+                iounmap(adapter->hw.flash_address);
+err_flashmap:
 err_sw_init:
 err_eeprom:
        iounmap(adapter->hw.hw_addr);
@@ -882,6 +1000,7 @@ e1000_remove(struct pci_dev *pdev)
        flush_scheduled_work();
        if (adapter->hw.mac_type >= e1000_82540 &&
+           adapter->hw.mac_type != e1000_ich8lan &&
           adapter->hw.media_type == e1000_media_type_copper) {
                manc = E1000_READ_REG(&adapter->hw, MANC);
                if (manc & E1000_MANC_SMBUS_EN) {
@@ -910,6 +1029,8 @@ e1000_remove(struct pci_dev *pdev)
 #endif
        iounmap(adapter->hw.hw_addr);
+        if (adapter->hw.flash_address)
+                iounmap(adapter->hw.flash_address);
        pci_release_regions(pdev);
        free_netdev(netdev);
@@ -960,13 +1081,6 @@ e1000_sw_init(struct e1000_adapter *adapter)
                return -EIO;
        }
-        /* initialize eeprom parameters */
-        if (e1000_init_eeprom_params(hw)) {
-                E1000_ERR("EEPROM initialization failed\n");
-                return -EIO;
-        }
        switch (hw->mac_type) {
        default:
                break;
@@ -1078,6 +1192,10 @@ e1000_open(struct net_device *netdev)
        struct e1000_adapter *adapter = netdev_priv(netdev);
        int err;
+        /* disallow open during test */
+        if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
+                return -EBUSY;
        /* allocate transmit descriptors */
        if ((err = e1000_setup_all_tx_resources(adapter)))
@@ -1088,6 +1206,12 @@ e1000_open(struct net_device *netdev)
        if ((err = e1000_setup_all_rx_resources(adapter)))
                goto err_setup_rx;
+        err = e1000_request_irq(adapter);
+        if (err)
+                goto err_up;
+        e1000_power_up_phy(adapter);
        if ((err = e1000_up(adapter)))
                goto err_up;
        adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
@@ -1131,7 +1255,10 @@ e1000_close(struct net_device *netdev)
 {
        struct e1000_adapter *adapter = netdev_priv(netdev);
+        WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
        e1000_down(adapter);
+        e1000_power_down_phy(adapter);
+        e1000_free_irq(adapter);
        e1000_free_all_tx_resources(adapter);
        e1000_free_all_rx_resources(adapter);
@@ -1189,8 +1316,7 @@ e1000_setup_tx_resources(struct e1000_adapter *adapter,
        int size;
        size = sizeof(struct e1000_buffer) * txdr->count;
+        txdr->buffer_info = vmalloc(size);
-        txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
        if (!txdr->buffer_info) {
                DPRINTK(PROBE, ERR,
                "Unable to allocate memory for the transmit descriptor ring\n");
@@ -1302,11 +1428,11 @@ e1000_configure_tx(struct e1000_adapter *adapter)
                tdba = adapter->tx_ring[0].dma;
                tdlen = adapter->tx_ring[0].count *
                        sizeof(struct e1000_tx_desc);
-                E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
-                E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
                E1000_WRITE_REG(hw, TDLEN, tdlen);
-                E1000_WRITE_REG(hw, TDH, 0);
+                E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
+                E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
                E1000_WRITE_REG(hw, TDT, 0);
+                E1000_WRITE_REG(hw, TDH, 0);
                adapter->tx_ring[0].tdh = E1000_TDH;
                adapter->tx_ring[0].tdt = E1000_TDT;
                break;
@@ -1418,7 +1544,7 @@ e1000_setup_rx_resources(struct e1000_adapter *adapter,
        int size, desc_len;
        size = sizeof(struct e1000_buffer) * rxdr->count;
-        rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
+        rxdr->buffer_info = vmalloc(size);
        if (!rxdr->buffer_info) {
                DPRINTK(PROBE, ERR,
                "Unable to allocate memory for the receive descriptor ring\n");
@@ -1560,9 +1686,6 @@ e1000_setup_rctl(struct e1000_adapter *adapter)
                E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
                (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
-        if (adapter->hw.mac_type > e1000_82543)
-                rctl |= E1000_RCTL_SECRC;
        if (adapter->hw.tbi_compatibility_on == 1)
                rctl |= E1000_RCTL_SBP;
        else
@@ -1628,7 +1751,7 @@ e1000_setup_rctl(struct e1000_adapter *adapter)
                rfctl |= E1000_RFCTL_IPV6_DIS;
                E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
-                rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
+                rctl |= E1000_RCTL_DTYP_PS;
                psrctl |= adapter->rx_ps_bsize0 >>
                        E1000_PSRCTL_BSIZE0_SHIFT;
@@ -1712,11 +1835,11 @@ e1000_configure_rx(struct e1000_adapter *adapter)
        case 1:
        default:
                rdba = adapter->rx_ring[0].dma;
-                E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
-                E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
                E1000_WRITE_REG(hw, RDLEN, rdlen);
-                E1000_WRITE_REG(hw, RDH, 0);
+                E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
+                E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
                E1000_WRITE_REG(hw, RDT, 0);
+                E1000_WRITE_REG(hw, RDH, 0);
                adapter->rx_ring[0].rdh = E1000_RDH;
                adapter->rx_ring[0].rdt = E1000_RDT;
                break;
@@ -1741,9 +1864,6 @@ e1000_configure_rx(struct e1000_adapter *adapter)
                E1000_WRITE_REG(hw, RXCSUM, rxcsum);
        }
-        if (hw->mac_type == e1000_82573)
-                E1000_WRITE_REG(hw, ERT, 0x0100);
        /* Enable Receives */
        E1000_WRITE_REG(hw, RCTL, rctl);
 }
@@ -2083,6 +2203,12 @@ e1000_set_multi(struct net_device *netdev)
        uint32_t rctl;
        uint32_t hash_value;
        int i, rar_entries = E1000_RAR_ENTRIES;
+        int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
+                                E1000_NUM_MTA_REGISTERS_ICH8LAN :
+                                E1000_NUM_MTA_REGISTERS;
+        if (adapter->hw.mac_type == e1000_ich8lan)
+                rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
        /* reserve RAR[14] for LAA over-write work-around */
        if (adapter->hw.mac_type == e1000_82571)
@@ -2121,14 +2247,18 @@ e1000_set_multi(struct net_device *netdev)
                        mc_ptr = mc_ptr->next;
                } else {
                        E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
+                        E1000_WRITE_FLUSH(hw);
                        E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
+                        E1000_WRITE_FLUSH(hw);
                }
        }
        /* clear the old settings from the multicast hash table */
-        for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
+        for (i = 0; i < mta_reg_count; i++) {
                E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
+                E1000_WRITE_FLUSH(hw);
+        }
        /* load any remaining addresses into the hash table */
@@ -2201,19 +2331,19 @@ static void
 e1000_watchdog(unsigned long data)
 {
        struct e1000_adapter *adapter = (struct e1000_adapter *) data;
-        /* Do the rest outside of interrupt context */
-        schedule_work(&adapter->watchdog_task);
-}
-static void
-e1000_watchdog_task(struct e1000_adapter *adapter)
-{
        struct net_device *netdev = adapter->netdev;
        struct e1000_tx_ring *txdr = adapter->tx_ring;
        uint32_t link, tctl;
+        int32_t ret_val;
-        e1000_check_for_link(&adapter->hw);
+        ret_val = e1000_check_for_link(&adapter->hw);
+        if ((ret_val == E1000_ERR_PHY) &&
+            (adapter->hw.phy_type == e1000_phy_igp_3) &&
+            (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
+                /* See e1000_kumeran_lock_loss_workaround() */
+                DPRINTK(LINK, INFO,
+                        "Gigabit has been disabled, downgrading speed\n");
+        }
        if (adapter->hw.mac_type == e1000_82573) {
                e1000_enable_tx_pkt_filtering(&adapter->hw);
                if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
@@ -2394,7 +2524,7 @@ e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
        uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
        int err;
-        if (skb_shinfo(skb)->gso_size) {
+        if (skb_is_gso(skb)) {
                if (skb_header_cloned(skb)) {
                        err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
                        if (err)
@@ -2519,7 +2649,7 @@ e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
                 * tso gets written back prematurely before the data is fully
                 * DMA'd to the controller */
                if (!skb->data_len && tx_ring->last_tx_tso &&
-                    !skb_shinfo(skb)->gso_size) {
+                    !skb_is_gso(skb)) {
                        tx_ring->last_tx_tso = 0;
                        size -= 4;
                }
@@ -2779,9 +2909,10 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
                        case e1000_82571:
                        case e1000_82572:
                        case e1000_82573:
+                        case e1000_ich8lan:
                                pull_size = min((unsigned int)4, skb->data_len);
                                if (!__pskb_pull_tail(skb, pull_size)) {
-                                        printk(KERN_ERR
+                                        DPRINTK(DRV, ERR,
                                                "__pskb_pull_tail failed.\n");
                                        dev_kfree_skb_any(skb);
                                        return NETDEV_TX_OK;
@@ -2806,8 +2937,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
 #ifdef NETIF_F_TSO
        /* Controller Erratum workaround */
-        if (!skb->data_len && tx_ring->last_tx_tso &&
+        if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
-            !skb_shinfo(skb)->gso_size)
                count++;
 #endif
@@ -2919,8 +3049,7 @@ e1000_reset_task(struct net_device *netdev)
 {
        struct e1000_adapter *adapter = netdev_priv(netdev);
-        e1000_down(adapter);
+        e1000_reinit_locked(adapter);
-        e1000_up(adapter);
 }
 /**
@@ -2964,6 +3093,7 @@ e1000_change_mtu(struct net_device *netdev, int new_mtu)
        /* Adapter-specific max frame size limits. */
        switch (adapter->hw.mac_type) {
        case e1000_undefined ... e1000_82542_rev2_1:
+        case e1000_ich8lan:
                if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
                        DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
                        return -EINVAL;
@@ -3026,10 +3156,8 @@ e1000_change_mtu(struct net_device *netdev, int new_mtu)
        netdev->mtu = new_mtu;
-        if (netif_running(netdev)) {
+        if (netif_running(netdev))
-                e1000_down(adapter);
+                e1000_reinit_locked(adapter);
-                e1000_up(adapter);
-        }
        adapter->hw.max_frame_size = max_frame;
@@ -3074,12 +3202,15 @@ e1000_update_stats(struct e1000_adapter *adapter)
        adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
        adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
        adapter->stats.roc += E1000_READ_REG(hw, ROC);
+        if (adapter->hw.mac_type != e1000_ich8lan) {
        adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
        adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
        adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
        adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
        adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
        adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
+        }
        adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
        adapter->stats.mpc += E1000_READ_REG(hw, MPC);
@@ -3107,12 +3238,16 @@ e1000_update_stats(struct e1000_adapter *adapter)
        adapter->stats.totl += E1000_READ_REG(hw, TOTL);
        adapter->stats.toth += E1000_READ_REG(hw, TOTH);
        adapter->stats.tpr += E1000_READ_REG(hw, TPR);
+        if (adapter->hw.mac_type != e1000_ich8lan) {
        adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
        adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
        adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
        adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
        adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
        adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
+        }
        adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
        adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
@@ -3134,6 +3269,8 @@ e1000_update_stats(struct e1000_adapter *adapter)
        if (hw->mac_type > e1000_82547_rev_2) {
                adapter->stats.iac += E1000_READ_REG(hw, IAC);
                adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
+                if (adapter->hw.mac_type != e1000_ich8lan) {
                adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
                adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
                adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
@@ -3141,6 +3278,7 @@ e1000_update_stats(struct e1000_adapter *adapter)
                adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
                adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
                adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
+                }
        }
        /* Fill out the OS statistics structure */
@@ -3547,7 +3685,8 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter,
                        /* All receives must fit into a single buffer */
                        E1000_DBG("%s: Receive packet consumed multiple"
                                  " buffers\n", netdev->name);
-                        dev_kfree_skb_irq(skb);
+                        /* recycle */
+                        buffer_info-> skb = skb;
                        goto next_desc;
                }
@@ -3675,7 +3814,6 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
        buffer_info = &rx_ring->buffer_info[i];
        while (staterr & E1000_RXD_STAT_DD) {
-                buffer_info = &rx_ring->buffer_info[i];
                ps_page = &rx_ring->ps_page[i];
                ps_page_dma = &rx_ring->ps_page_dma[i];
 #ifdef CONFIG_E1000_NAPI
@@ -4180,10 +4318,9 @@ e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
                                                return retval;
                                        }
                                }
-                                if (netif_running(adapter->netdev)) {
+                                if (netif_running(adapter->netdev))
-                                        e1000_down(adapter);
+                                        e1000_reinit_locked(adapter);
-                                        e1000_up(adapter);
+                                else
-                                } else
                                        e1000_reset(adapter);
                                break;
                        case M88E1000_PHY_SPEC_CTRL:
@@ -4200,10 +4337,9 @@ e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
                        case PHY_CTRL:
                                if (mii_reg & MII_CR_POWER_DOWN)
                                        break;
-                                if (netif_running(adapter->netdev)) {
+                                if (netif_running(adapter->netdev))
-                                        e1000_down(adapter);
+                                        e1000_reinit_locked(adapter);
-                                        e1000_up(adapter);
+                                else
-                                } else
                                        e1000_reset(adapter);
                                break;
                        }
@@ -4277,18 +4413,21 @@ e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
                ctrl |= E1000_CTRL_VME;
                E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
+                if (adapter->hw.mac_type != e1000_ich8lan) {
                /* enable VLAN receive filtering */
                rctl = E1000_READ_REG(&adapter->hw, RCTL);
                rctl |= E1000_RCTL_VFE;
                rctl &= ~E1000_RCTL_CFIEN;
                E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
                e1000_update_mng_vlan(adapter);
+                }
        } else {
                /* disable VLAN tag insert/strip */
                ctrl = E1000_READ_REG(&adapter->hw, CTRL);
                ctrl &= ~E1000_CTRL_VME;
                E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
+                if (adapter->hw.mac_type != e1000_ich8lan) {
                /* disable VLAN filtering */
                rctl = E1000_READ_REG(&adapter->hw, RCTL);
                rctl &= ~E1000_RCTL_VFE;
@@ -4297,6 +4436,7 @@ e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
                        e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
                        adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
                }
+                }
        }
        e1000_irq_enable(adapter);
@@ -4458,12 +4598,16 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state)
        struct e1000_adapter *adapter = netdev_priv(netdev);
        uint32_t ctrl, ctrl_ext, rctl, manc, status;
        uint32_t wufc = adapter->wol;
+#ifdef CONFIG_PM
        int retval = 0;
+#endif
        netif_device_detach(netdev);
-        if (netif_running(netdev))
+        if (netif_running(netdev)) {
+                WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
                e1000_down(adapter);
+        }
 #ifdef CONFIG_PM
        /* Implement our own version of pci_save_state(pdev) because pci-
@@ -4521,7 +4665,9 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state)
                pci_enable_wake(pdev, PCI_D3cold, 0);
        }
+        /* FIXME: this code is incorrect for PCI Express */
        if (adapter->hw.mac_type >= e1000_82540 &&
+           adapter->hw.mac_type != e1000_ich8lan &&
           adapter->hw.media_type == e1000_media_type_copper) {
                manc = E1000_READ_REG(&adapter->hw, MANC);
                if (manc & E1000_MANC_SMBUS_EN) {
@@ -4532,6 +4678,9 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state)
                }
        }
+        if (adapter->hw.phy_type == e1000_phy_igp_3)
+                e1000_phy_powerdown_workaround(&adapter->hw);
        /* Release control of h/w to f/w.  If f/w is AMT enabled, this
         * would have already happened in close and is redundant. */
        e1000_release_hw_control(adapter);
@@ -4567,7 +4716,9 @@ e1000_resume(struct pci_dev *pdev)
        netif_device_attach(netdev);
+        /* FIXME: this code is incorrect for PCI Express */
        if (adapter->hw.mac_type >= e1000_82540 &&
+           adapter->hw.mac_type != e1000_ich8lan &&
           adapter->hw.media_type == e1000_media_type_copper) {
                manc = E1000_READ_REG(&adapter->hw, MANC);
                manc &= ~(E1000_MANC_ARP_EN);
diff --git a/drivers/net/e1000/e1000_osdep.h b/drivers/net/e1000/e1000_osdep.h
index 048d052be29d..2d3e8b06cab0 100644
--- a/drivers/net/e1000/e1000_osdep.h
+++ b/drivers/net/e1000/e1000_osdep.h
@@ -127,4 +127,17 @@ typedef enum {
 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, STATUS)
+#define E1000_WRITE_ICH8_REG(a, reg, value) ( \
+    writel((value), ((a)->flash_address + reg)))
+#define E1000_READ_ICH8_REG(a, reg) ( \
+    readl((a)->flash_address + reg))
+#define E1000_WRITE_ICH8_REG16(a, reg, value) ( \
+    writew((value), ((a)->flash_address + reg)))
+#define E1000_READ_ICH8_REG16(a, reg) ( \
+    readw((a)->flash_address + reg))
 #endif /* _E1000_OSDEP_H_ */
diff --git a/drivers/net/e1000/e1000_param.c b/drivers/net/e1000/e1000_param.c
index e55f8969a0fb..0ef413172c68 100644
--- a/drivers/net/e1000/e1000_param.c
+++ b/drivers/net/e1000/e1000_param.c
@@ -45,6 +45,16 @@
 */
 #define E1000_PARAM_INIT { [0 ... E1000_MAX_NIC] = OPTION_UNSET }
+/* Module Parameters are always initialized to -1, so that the driver
+ * can tell the difference between no user specified value or the
+ * user asking for the default value.
+ * The true default values are loaded in when e1000_check_options is called.
+ *
+ * This is a GCC extension to ANSI C.
+ * See the item "Labeled Elements in Initializers" in the section
+ * "Extensions to the C Language Family" of the GCC documentation.
+ */
 #define E1000_PARAM(X, desc) \
        static int __devinitdata X[E1000_MAX_NIC+1] = E1000_PARAM_INIT; \
        static int num_##X = 0; \
@@ -183,6 +193,24 @@ E1000_PARAM(RxAbsIntDelay, "Receive Absolute Interrupt Delay");
 E1000_PARAM(InterruptThrottleRate, "Interrupt Throttling Rate");
+/* Enable Smart Power Down of the PHY
+ *
+ * Valid Range: 0, 1
+ *
+ * Default Value: 0 (disabled)
+ */
+E1000_PARAM(SmartPowerDownEnable, "Enable PHY smart power down");
+/* Enable Kumeran Lock Loss workaround
+ *
+ * Valid Range: 0, 1
+ *
+ * Default Value: 1 (enabled)
+ */
+E1000_PARAM(KumeranLockLoss, "Enable Kumeran lock loss workaround");
 #define AUTONEG_ADV_DEFAULT  0x2F
 #define AUTONEG_ADV_MASK     0x2F
 #define FLOW_CONTROL_DEFAULT FLOW_CONTROL_FULL
@@ -296,6 +324,7 @@ e1000_check_options(struct e1000_adapter *adapter)
                DPRINTK(PROBE, NOTICE,
                       "Warning: no configuration for board #%i\n", bd);
                DPRINTK(PROBE, NOTICE, "Using defaults for all values\n");
+                bd = E1000_MAX_NIC;
        }
        { /* Transmit Descriptor Count */
@@ -313,14 +342,9 @@ e1000_check_options(struct e1000_adapter *adapter)
                opt.arg.r.max = mac_type < e1000_82544 ?
                        E1000_MAX_TXD : E1000_MAX_82544_TXD;
-                if (num_TxDescriptors > bd) {
+                tx_ring->count = TxDescriptors[bd];
-                        tx_ring->count = TxDescriptors[bd];
+                e1000_validate_option(&tx_ring->count, &opt, adapter);
-                        e1000_validate_option(&tx_ring->count, &opt, adapter);
+                E1000_ROUNDUP(tx_ring->count, REQ_TX_DESCRIPTOR_MULTIPLE);
-                        E1000_ROUNDUP(tx_ring->count,
-                                                REQ_TX_DESCRIPTOR_MULTIPLE);
-                } else {
-                        tx_ring->count = opt.def;
-                }
                for (i = 0; i < adapter->num_tx_queues; i++)
                        tx_ring[i].count = tx_ring->count;
        }
@@ -339,14 +363,9 @@ e1000_check_options(struct e1000_adapter *adapter)
                opt.arg.r.max = mac_type < e1000_82544 ? E1000_MAX_RXD :
                        E1000_MAX_82544_RXD;
-                if (num_RxDescriptors > bd) {
+                rx_ring->count = RxDescriptors[bd];
-                        rx_ring->count = RxDescriptors[bd];
+                e1000_validate_option(&rx_ring->count, &opt, adapter);
-                        e1000_validate_option(&rx_ring->count, &opt, adapter);
+                E1000_ROUNDUP(rx_ring->count, REQ_RX_DESCRIPTOR_MULTIPLE);
-                        E1000_ROUNDUP(rx_ring->count,
-                                                REQ_RX_DESCRIPTOR_MULTIPLE);
-                } else {
-                        rx_ring->count = opt.def;
-                }
                for (i = 0; i < adapter->num_rx_queues; i++)
                        rx_ring[i].count = rx_ring->count;
        }
@@ -358,13 +377,9 @@ e1000_check_options(struct e1000_adapter *adapter)
                        .def  = OPTION_ENABLED
                };
-                if (num_XsumRX > bd) {
+                int rx_csum = XsumRX[bd];
-                        int rx_csum = XsumRX[bd];
+                e1000_validate_option(&rx_csum, &opt, adapter);
-                        e1000_validate_option(&rx_csum, &opt, adapter);
+                adapter->rx_csum = rx_csum;
-                        adapter->rx_csum = rx_csum;
-                } else {
-                        adapter->rx_csum = opt.def;
-                }
        }
        { /* Flow Control */
@@ -384,13 +399,9 @@ e1000_check_options(struct e1000_adapter *adapter)
                                         .p = fc_list }}
                };
-                if (num_FlowControl > bd) {
+                int fc = FlowControl[bd];
-                        int fc = FlowControl[bd];
+                e1000_validate_option(&fc, &opt, adapter);
-                        e1000_validate_option(&fc, &opt, adapter);
+                adapter->hw.fc = adapter->hw.original_fc = fc;
-                        adapter->hw.fc = adapter->hw.original_fc = fc;
-                } else {
-                        adapter->hw.fc = adapter->hw.original_fc = opt.def;
-                }
        }
        { /* Transmit Interrupt Delay */
                struct e1000_option opt = {
@@ -402,13 +413,8 @@ e1000_check_options(struct e1000_adapter *adapter)
                                         .max = MAX_TXDELAY }}
                };
-                if (num_TxIntDelay > bd) {
+                adapter->tx_int_delay = TxIntDelay[bd];
-                        adapter->tx_int_delay = TxIntDelay[bd];
+                e1000_validate_option(&adapter->tx_int_delay, &opt, adapter);
-                        e1000_validate_option(&adapter->tx_int_delay, &opt,
-                                                                adapter);
-                } else {
-                        adapter->tx_int_delay = opt.def;
-                }
        }
        { /* Transmit Absolute Interrupt Delay */
                struct e1000_option opt = {
@@ -420,13 +426,9 @@ e1000_check_options(struct e1000_adapter *adapter)
                                         .max = MAX_TXABSDELAY }}
                };
-                if (num_TxAbsIntDelay > bd) {
+                adapter->tx_abs_int_delay = TxAbsIntDelay[bd];
-                        adapter->tx_abs_int_delay = TxAbsIntDelay[bd];
+                e1000_validate_option(&adapter->tx_abs_int_delay, &opt,
-                        e1000_validate_option(&adapter->tx_abs_int_delay, &opt,
+                                      adapter);
-                                                                adapter);
-                } else {
-                        adapter->tx_abs_int_delay = opt.def;
-                }
        }
        { /* Receive Interrupt Delay */
                struct e1000_option opt = {
@@ -438,13 +440,8 @@ e1000_check_options(struct e1000_adapter *adapter)
                                         .max = MAX_RXDELAY }}
                };
-                if (num_RxIntDelay > bd) {
+                adapter->rx_int_delay = RxIntDelay[bd];
-                        adapter->rx_int_delay = RxIntDelay[bd];
+                e1000_validate_option(&adapter->rx_int_delay, &opt, adapter);
-                        e1000_validate_option(&adapter->rx_int_delay, &opt,
-                                                                adapter);
-                } else {
-                        adapter->rx_int_delay = opt.def;
-                }
        }
        { /* Receive Absolute Interrupt Delay */
                struct e1000_option opt = {
@@ -456,13 +453,9 @@ e1000_check_options(struct e1000_adapter *adapter)
                                         .max = MAX_RXABSDELAY }}
                };
-                if (num_RxAbsIntDelay > bd) {
+                adapter->rx_abs_int_delay = RxAbsIntDelay[bd];
-                        adapter->rx_abs_int_delay = RxAbsIntDelay[bd];
+                e1000_validate_option(&adapter->rx_abs_int_delay, &opt,
-                        e1000_validate_option(&adapter->rx_abs_int_delay, &opt,
+                                      adapter);
-                                                                adapter);
-                } else {
-                        adapter->rx_abs_int_delay = opt.def;
-                }
        }
        { /* Interrupt Throttling Rate */
                struct e1000_option opt = {
@@ -474,26 +467,44 @@ e1000_check_options(struct e1000_adapter *adapter)
                                         .max = MAX_ITR }}
                };
-                if (num_InterruptThrottleRate > bd) {
+                adapter->itr = InterruptThrottleRate[bd];
-                        adapter->itr = InterruptThrottleRate[bd];
+                switch (adapter->itr) {
-                        switch (adapter->itr) {
+                case 0:
-                        case 0:
+                        DPRINTK(PROBE, INFO, "%s turned off\n", opt.name);
-                                DPRINTK(PROBE, INFO, "%s turned off\n",
+                        break;
-                                        opt.name);
+                case 1:
-                                break;
+                        DPRINTK(PROBE, INFO, "%s set to dynamic mode\n",
-                        case 1:
+                                opt.name);
-                                DPRINTK(PROBE, INFO, "%s set to dynamic mode\n",
+                        break;
-                                        opt.name);
+                default:
-                                break;
+                        e1000_validate_option(&adapter->itr, &opt, adapter);
-                        default:
+                        break;
-                                e1000_validate_option(&adapter->itr, &opt,
-                                        adapter);
-                                break;
-                        }
-                } else {
-                        adapter->itr = opt.def;
                }
        }
+        { /* Smart Power Down */
+                struct e1000_option opt = {
+                        .type = enable_option,
+                        .name = "PHY Smart Power Down",
+                        .err  = "defaulting to Disabled",
+                        .def  = OPTION_DISABLED
+                };
+                int spd = SmartPowerDownEnable[bd];
+                e1000_validate_option(&spd, &opt, adapter);
+                adapter->smart_power_down = spd;
+        }
+        { /* Kumeran Lock Loss Workaround */
+                struct e1000_option opt = {
+                        .type = enable_option,
+                        .name = "Kumeran Lock Loss Workaround",
+                        .err  = "defaulting to Enabled",
+                        .def  = OPTION_ENABLED
+                };
+                        int kmrn_lock_loss = KumeranLockLoss[bd];
+                        e1000_validate_option(&kmrn_lock_loss, &opt, adapter);
+                        adapter->hw.kmrn_lock_loss_workaround_disabled = !kmrn_lock_loss;
+        }
        switch (adapter->hw.media_type) {
        case e1000_media_type_fiber:
@@ -519,17 +530,18 @@ static void __devinit
 e1000_check_fiber_options(struct e1000_adapter *adapter)
 {
        int bd = adapter->bd_number;
-        if (num_Speed > bd) {
+        bd = bd > E1000_MAX_NIC ? E1000_MAX_NIC : bd;
+        if ((Speed[bd] != OPTION_UNSET)) {
                DPRINTK(PROBE, INFO, "Speed not valid for fiber adapters, "
                       "parameter ignored\n");
        }
-        if (num_Duplex > bd) {
+        if ((Duplex[bd] != OPTION_UNSET)) {
                DPRINTK(PROBE, INFO, "Duplex not valid for fiber adapters, "
                       "parameter ignored\n");
        }
-        if ((num_AutoNeg > bd) && (AutoNeg[bd] != 0x20)) {
+        if ((AutoNeg[bd] != OPTION_UNSET) && (AutoNeg[bd] != 0x20)) {
                DPRINTK(PROBE, INFO, "AutoNeg other than 1000/Full is "
                                 "not valid for fiber adapters, "
                                 "parameter ignored\n");
@@ -548,6 +560,7 @@ e1000_check_copper_options(struct e1000_adapter *adapter)
 {
        int speed, dplx, an;
        int bd = adapter->bd_number;
+        bd = bd > E1000_MAX_NIC ? E1000_MAX_NIC : bd;
        { /* Speed */
                struct e1000_opt_list speed_list[] = {{          0, "" },
@@ -564,12 +577,8 @@ e1000_check_copper_options(struct e1000_adapter *adapter)
                                         .p = speed_list }}
                };
-                if (num_Speed > bd) {
+                speed = Speed[bd];
-                        speed = Speed[bd];
+                e1000_validate_option(&speed, &opt, adapter);
-                        e1000_validate_option(&speed, &opt, adapter);
-                } else {
-                        speed = opt.def;
-                }
        }
        { /* Duplex */
                struct e1000_opt_list dplx_list[] = {{           0, "" },
@@ -591,15 +600,11 @@ e1000_check_copper_options(struct e1000_adapter *adapter)
                                "Speed/Duplex/AutoNeg parameter ignored.\n");
                        return;
                }
-                if (num_Duplex > bd) {
+                dplx = Duplex[bd];
-                        dplx = Duplex[bd];
+                e1000_validate_option(&dplx, &opt, adapter);
-                        e1000_validate_option(&dplx, &opt, adapter);
-                } else {
-                        dplx = opt.def;
-                }
        }
-        if ((num_AutoNeg > bd) && (speed != 0 || dplx != 0)) {
+        if (AutoNeg[bd] != OPTION_UNSET && (speed != 0 || dplx != 0)) {
                DPRINTK(PROBE, INFO,
                       "AutoNeg specified along with Speed or Duplex, "
                       "parameter ignored\n");
@@ -648,19 +653,15 @@ e1000_check_copper_options(struct e1000_adapter *adapter)
                                         .p = an_list }}
                };
-                if (num_AutoNeg > bd) {
+                an = AutoNeg[bd];
-                        an = AutoNeg[bd];
+                e1000_validate_option(&an, &opt, adapter);
-                        e1000_validate_option(&an, &opt, adapter);
-                } else {
-                        an = opt.def;
-                }
                adapter->hw.autoneg_advertised = an;
        }
        switch (speed + dplx) {
        case 0:
                adapter->hw.autoneg = adapter->fc_autoneg = 1;
-                if ((num_Speed > bd) && (speed != 0 || dplx != 0))
+                if (Speed[bd] != OPTION_UNSET || Duplex[bd] != OPTION_UNSET)
                        DPRINTK(PROBE, INFO,
                               "Speed and duplex autonegotiation enabled\n");
                break;
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 037d870712ff..ad81ec68f887 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -1495,7 +1495,7 @@ static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev)
        np->tx_skbuff[nr] = skb;
 #ifdef NETIF_F_TSO
-        if (skb_shinfo(skb)->gso_size)
+        if (skb_is_gso(skb))
                tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT);
        else
 #endif
diff --git a/drivers/net/irda/ali-ircc.c b/drivers/net/irda/ali-ircc.c
index bf1fca5a3fa0..e3c8cd5eca67 100644
--- a/drivers/net/irda/ali-ircc.c
+++ b/drivers/net/irda/ali-ircc.c
@@ -146,7 +146,7 @@ static int __init ali_ircc_init(void)
 {
        ali_chip_t *chip;
        chipio_t info;
-        int ret = -ENODEV;
+        int ret;
        int cfg, cfg_base;
        int reg, revision;
        int i = 0;
@@ -160,6 +160,7 @@ static int __init ali_ircc_init(void)
                return ret;
        }
+        ret = -ENODEV;
        
        /* Probe for all the ALi chipsets we know about */
        for (chip= chips; chip->name; chip++, i++) 
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c
index b91e082483f6..7eb08d929139 100644
--- a/drivers/net/ixgb/ixgb_main.c
+++ b/drivers/net/ixgb/ixgb_main.c
@@ -1173,7 +1173,7 @@ ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
        uint16_t ipcse, tucse, mss;
        int err;
-        if(likely(skb_shinfo(skb)->gso_size)) {
+        if (likely(skb_is_gso(skb))) {
                if (skb_header_cloned(skb)) {
                        err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
                        if (err)
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c
index 43fef7de8cb9..997cbce9af6e 100644
--- a/drivers/net/loopback.c
+++ b/drivers/net/loopback.c
@@ -139,7 +139,7 @@ static int loopback_xmit(struct sk_buff *skb, struct net_device *dev)
 #endif
 #ifdef LOOPBACK_TSO
-        if (skb_shinfo(skb)->gso_size) {
+        if (skb_is_gso(skb)) {
                BUG_ON(skb->protocol != htons(ETH_P_IP));
                BUG_ON(skb->nh.iph->protocol != IPPROTO_TCP);
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index f4c8fd373b9b..ee1de971a712 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -2116,7 +2116,7 @@ abort_linearize:
                }
                idx = (idx + 1) & tx->mask;
        } while (idx != last_idx);
-        if (skb_shinfo(skb)->gso_size) {
+        if (skb_is_gso(skb)) {
                printk(KERN_ERR
                       "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
                       mgp->dev->name);
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 418f169a6a31..31093760aa1e 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -1159,7 +1159,7 @@ static unsigned tx_le_req(const struct sk_buff *skb)
        count = sizeof(dma_addr_t) / sizeof(u32);
        count += skb_shinfo(skb)->nr_frags * count;
-        if (skb_shinfo(skb)->gso_size)
+        if (skb_is_gso(skb))
                ++count;
        if (skb->ip_summed == CHECKSUM_HW)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index f645921aff8b..ce6f3be86da0 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -10078,6 +10078,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
        static struct pci_device_id write_reorder_chipsets[] = {
                { PCI_DEVICE(PCI_VENDOR_ID_AMD,
                             PCI_DEVICE_ID_AMD_FE_GATE_700C) },
+                { PCI_DEVICE(PCI_VENDOR_ID_AMD,
+                             PCI_DEVICE_ID_AMD_8131_BRIDGE) },
                { PCI_DEVICE(PCI_VENDOR_ID_VIA,
                             PCI_DEVICE_ID_VIA_8385_0) },
                { },
diff --git a/drivers/net/typhoon.c b/drivers/net/typhoon.c
index 063816f2b11e..4103c37172f9 100644
--- a/drivers/net/typhoon.c
+++ b/drivers/net/typhoon.c
@@ -805,7 +805,7 @@ typhoon_start_tx(struct sk_buff *skb, struct net_device *dev)
         * If problems develop with TSO, check this first.
         */
        numDesc = skb_shinfo(skb)->nr_frags + 1;
-        if(skb_tso_size(skb))
+        if (skb_is_gso(skb))
                numDesc++;
        /* When checking for free space in the ring, we need to also
@@ -845,7 +845,7 @@ typhoon_start_tx(struct sk_buff *skb, struct net_device *dev)
                                TYPHOON_TX_PF_VLAN_TAG_SHIFT);
        }
-        if(skb_tso_size(skb)) {
+        if (skb_is_gso(skb)) {
                first_txd->processFlags |= TYPHOON_TX_PF_TCP_SEGMENT;
                first_txd->numDesc++;
diff --git a/drivers/pci/hotplug/Kconfig b/drivers/pci/hotplug/Kconfig
index 222a1cc4aa28..d305d212ad6c 100644
--- a/drivers/pci/hotplug/Kconfig
+++ b/drivers/pci/hotplug/Kconfig
@@ -77,7 +77,7 @@ config HOTPLUG_PCI_IBM
 config HOTPLUG_PCI_ACPI
        tristate "ACPI PCI Hotplug driver"
-        depends on ACPI && HOTPLUG_PCI
+        depends on ACPI_DOCK && HOTPLUG_PCI
        help
          Say Y here if you have a system that supports PCI Hotplug using
          ACPI.
diff --git a/drivers/s390/net/qeth_main.c b/drivers/s390/net/qeth_main.c
index 8e8963f15731..329e12c1fae4 100644
--- a/drivers/s390/net/qeth_main.c
+++ b/drivers/s390/net/qeth_main.c
@@ -4457,7 +4457,7 @@ qeth_send_packet(struct qeth_card *card, struct sk_buff *skb)
        queue = card->qdio.out_qs
                [qeth_get_priority_queue(card, skb, ipv, cast_type)];
-        if (skb_shinfo(skb)->gso_size)
+        if (skb_is_gso(skb))
                large_send = card->options.large_send;
        /*are we able to do TSO ? If so ,prepare and send it from here */
diff --git a/include/asm-i386/atomic.h b/include/asm-i386/atomic.h
index 4f061fa73794..51a166242522 100644
--- a/include/asm-i386/atomic.h
+++ b/include/asm-i386/atomic.h
@@ -46,8 +46,8 @@ static __inline__ void atomic_add(int i, atomic_t *v)
 {
        __asm__ __volatile__(
                LOCK_PREFIX "addl %1,%0"
-                :"=m" (v->counter)
+                :"+m" (v->counter)
-                :"ir" (i), "m" (v->counter));
+                :"ir" (i));
 }
 /**
@@ -61,8 +61,8 @@ static __inline__ void atomic_sub(int i, atomic_t *v)
 {
        __asm__ __volatile__(
                LOCK_PREFIX "subl %1,%0"
-                :"=m" (v->counter)
+                :"+m" (v->counter)
-                :"ir" (i), "m" (v->counter));
+                :"ir" (i));
 }
 /**
@@ -80,8 +80,8 @@ static __inline__ int atomic_sub_and_test(int i, atomic_t *v)
        __asm__ __volatile__(
                LOCK_PREFIX "subl %2,%0; sete %1"
-                :"=m" (v->counter), "=qm" (c)
+                :"+m" (v->counter), "=qm" (c)
-                :"ir" (i), "m" (v->counter) : "memory");
+                :"ir" (i) : "memory");
        return c;
 }
@@ -95,8 +95,7 @@ static __inline__ void atomic_inc(atomic_t *v)
 {
        __asm__ __volatile__(
                LOCK_PREFIX "incl %0"
-                :"=m" (v->counter)
+                :"+m" (v->counter));
-                :"m" (v->counter));
 }
 /**
@@ -109,8 +108,7 @@ static __inline__ void atomic_dec(atomic_t *v)
 {
        __asm__ __volatile__(
                LOCK_PREFIX "decl %0"
-                :"=m" (v->counter)
+                :"+m" (v->counter));
-                :"m" (v->counter));
 }
 /**
@@ -127,8 +125,8 @@ static __inline__ int atomic_dec_and_test(atomic_t *v)
        __asm__ __volatile__(
                LOCK_PREFIX "decl %0; sete %1"
-                :"=m" (v->counter), "=qm" (c)
+                :"+m" (v->counter), "=qm" (c)
-                :"m" (v->counter) : "memory");
+                : : "memory");
        return c != 0;
 }
@@ -146,8 +144,8 @@ static __inline__ int atomic_inc_and_test(atomic_t *v)
        __asm__ __volatile__(
                LOCK_PREFIX "incl %0; sete %1"
-                :"=m" (v->counter), "=qm" (c)
+                :"+m" (v->counter), "=qm" (c)
-                :"m" (v->counter) : "memory");
+                : : "memory");
        return c != 0;
 }
@@ -166,8 +164,8 @@ static __inline__ int atomic_add_negative(int i, atomic_t *v)
        __asm__ __volatile__(
                LOCK_PREFIX "addl %2,%0; sets %1"
-                :"=m" (v->counter), "=qm" (c)
+                :"+m" (v->counter), "=qm" (c)
-                :"ir" (i), "m" (v->counter) : "memory");
+                :"ir" (i) : "memory");
        return c;
 }
diff --git a/include/asm-i386/futex.h b/include/asm-i386/futex.h
index 7b8ceefd010f..946d97cfea23 100644
--- a/include/asm-i386/futex.h
+++ b/include/asm-i386/futex.h
@@ -20,8 +20,8 @@
        .align  8\n\
        .long   1b,3b\n\
        .previous"                                              \
-        : "=r" (oldval), "=r" (ret), "=m" (*uaddr)              \
+        : "=r" (oldval), "=r" (ret), "+m" (*uaddr)              \
-        : "i" (-EFAULT), "m" (*uaddr), "0" (oparg), "1" (0))
+        : "i" (-EFAULT), "0" (oparg), "1" (0))
 #define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
  __asm__ __volatile (                                          \
@@ -38,9 +38,9 @@
        .align  8\n\
        .long   1b,4b,2b,4b\n\
        .previous"                                              \
-        : "=&a" (oldval), "=&r" (ret), "=m" (*uaddr),           \
+        : "=&a" (oldval), "=&r" (ret), "+m" (*uaddr),           \
          "=&r" (tem)                                           \
-        : "r" (oparg), "i" (-EFAULT), "m" (*uaddr), "1" (0))
+        : "r" (oparg), "i" (-EFAULT), "1" (0))
 static inline int
 futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
@@ -123,7 +123,7 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
                "       .long   1b,3b                           \n"
                "       .previous                               \n"
-                : "=a" (oldval), "=m" (*uaddr)
+                : "=a" (oldval), "+m" (*uaddr)
                : "i" (-EFAULT), "r" (newval), "0" (oldval)
                : "memory"
        );
diff --git a/include/asm-i386/local.h b/include/asm-i386/local.h
index 3b4998c51d08..12060e22f7e2 100644
--- a/include/asm-i386/local.h
+++ b/include/asm-i386/local.h
@@ -17,32 +17,30 @@ static __inline__ void local_inc(local_t *v)
 {
        __asm__ __volatile__(
                "incl %0"
-                :"=m" (v->counter)
+                :"+m" (v->counter));
-                :"m" (v->counter));
 }
 static __inline__ void local_dec(local_t *v)
 {
        __asm__ __volatile__(
                "decl %0"
-                :"=m" (v->counter)
+                :"+m" (v->counter));
-                :"m" (v->counter));
 }
 static __inline__ void local_add(long i, local_t *v)
 {
        __asm__ __volatile__(
                "addl %1,%0"
-                :"=m" (v->counter)
+                :"+m" (v->counter)
-                :"ir" (i), "m" (v->counter));
+                :"ir" (i));
 }
 static __inline__ void local_sub(long i, local_t *v)
 {
        __asm__ __volatile__(
                "subl %1,%0"
-                :"=m" (v->counter)
+                :"+m" (v->counter)
-                :"ir" (i), "m" (v->counter));
+                :"ir" (i));
 }
 /* On x86, these are no better than the atomic variants. */
diff --git a/include/asm-i386/posix_types.h b/include/asm-i386/posix_types.h
index 4e47ed059ad6..133e31e7dfde 100644
--- a/include/asm-i386/posix_types.h
+++ b/include/asm-i386/posix_types.h
@@ -51,12 +51,12 @@ typedef struct {
 #undef  __FD_SET
 #define __FD_SET(fd,fdsetp) \
                __asm__ __volatile__("btsl %1,%0": \
-                        "=m" (*(__kernel_fd_set *) (fdsetp)):"r" ((int) (fd)))
+                        "+m" (*(__kernel_fd_set *) (fdsetp)):"r" ((int) (fd)))
 #undef  __FD_CLR
 #define __FD_CLR(fd,fdsetp) \
                __asm__ __volatile__("btrl %1,%0": \
-                        "=m" (*(__kernel_fd_set *) (fdsetp)):"r" ((int) (fd)))
+                        "+m" (*(__kernel_fd_set *) (fdsetp)):"r" ((int) (fd)))
 #undef  __FD_ISSET
 #define __FD_ISSET(fd,fdsetp) (__extension__ ({ \
diff --git a/include/asm-i386/rwlock.h b/include/asm-i386/rwlock.h
index 94f00195d543..96b0bef2ea56 100644
--- a/include/asm-i386/rwlock.h
+++ b/include/asm-i386/rwlock.h
@@ -37,7 +37,7 @@
                        "popl %%eax\n\t" \
                        "1:\n", \
                        "subl $1,%0\n\t", \
-                        "=m" (*(volatile int *)rw) : : "memory")
+                        "+m" (*(volatile int *)rw) : : "memory")
 #define __build_read_lock(rw, helper)   do { \
                                                if (__builtin_constant_p(rw)) \
@@ -63,7 +63,7 @@
                        "popl %%eax\n\t" \
                        "1:\n", \
                        "subl $" RW_LOCK_BIAS_STR ",%0\n\t", \
-                        "=m" (*(volatile int *)rw) : : "memory")
+                        "+m" (*(volatile int *)rw) : : "memory")
 #define __build_write_lock(rw, helper)  do { \
                                                if (__builtin_constant_p(rw)) \
diff --git a/include/asm-i386/rwsem.h b/include/asm-i386/rwsem.h
index 2f07601562e7..43113f5608eb 100644
--- a/include/asm-i386/rwsem.h
+++ b/include/asm-i386/rwsem.h
@@ -111,8 +111,8 @@ LOCK_PREFIX	"  incl      (%%eax)\n\t" /* adds 0x00000001, returns the old value
                "  jmp       1b\n"
                LOCK_SECTION_END
                "# ending down_read\n\t"
-                : "=m"(sem->count)
+                : "+m" (sem->count)
-                : "a"(sem), "m"(sem->count)
+                : "a" (sem)
                : "memory", "cc");
 }
@@ -133,8 +133,8 @@ LOCK_PREFIX	"  cmpxchgl  %2,%0\n\t"
                "  jnz       1b\n\t"
                "2:\n\t"
                "# ending __down_read_trylock\n\t"
-                : "+m"(sem->count), "=&a"(result), "=&r"(tmp)
+                : "+m" (sem->count), "=&a" (result), "=&r" (tmp)
-                : "i"(RWSEM_ACTIVE_READ_BIAS)
+                : "i" (RWSEM_ACTIVE_READ_BIAS)
                : "memory", "cc");
        return result>=0 ? 1 : 0;
 }
@@ -161,8 +161,8 @@ LOCK_PREFIX	"  xadd      %%edx,(%%eax)\n\t" /* subtract 0x0000ffff, returns the
                "  jmp       1b\n"
                LOCK_SECTION_END
                "# ending down_write"
-                : "=m"(sem->count), "=d"(tmp)
+                : "+m" (sem->count), "=d" (tmp)
-                : "a"(sem), "1"(tmp), "m"(sem->count)
+                : "a" (sem), "1" (tmp)
                : "memory", "cc");
 }
@@ -205,8 +205,8 @@ LOCK_PREFIX	"  xadd      %%edx,(%%eax)\n\t" /* subtracts 1, returns the old valu
                "  jmp       1b\n"
                LOCK_SECTION_END
                "# ending __up_read\n"
-                : "=m"(sem->count), "=d"(tmp)
+                : "+m" (sem->count), "=d" (tmp)
-                : "a"(sem), "1"(tmp), "m"(sem->count)
+                : "a" (sem), "1" (tmp)
                : "memory", "cc");
 }
@@ -231,8 +231,8 @@ LOCK_PREFIX	"  xaddl     %%edx,(%%eax)\n\t" /* tries to transition 0xffff0001 ->
                "  jmp       1b\n"
                LOCK_SECTION_END
                "# ending __up_write\n"
-                : "=m"(sem->count)
+                : "+m" (sem->count)
-                : "a"(sem), "i"(-RWSEM_ACTIVE_WRITE_BIAS), "m"(sem->count)
+                : "a" (sem), "i" (-RWSEM_ACTIVE_WRITE_BIAS)
                : "memory", "cc", "edx");
 }
@@ -256,8 +256,8 @@ LOCK_PREFIX	"  addl      %2,(%%eax)\n\t" /* transitions 0xZZZZ0001 -> 0xYYYY0001
                "  jmp       1b\n"
                LOCK_SECTION_END
                "# ending __downgrade_write\n"
-                : "=m"(sem->count)
+                : "+m" (sem->count)
-                : "a"(sem), "i"(-RWSEM_WAITING_BIAS), "m"(sem->count)
+                : "a" (sem), "i" (-RWSEM_WAITING_BIAS)
                : "memory", "cc");
 }
@@ -268,8 +268,8 @@ static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
 {
        __asm__ __volatile__(
 LOCK_PREFIX     "addl %1,%0"
-                : "=m"(sem->count)
+                : "+m" (sem->count)
-                : "ir"(delta), "m"(sem->count));
+                : "ir" (delta));
 }
 /*
@@ -280,10 +280,9 @@ static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
        int tmp = delta;
        __asm__ __volatile__(
-LOCK_PREFIX     "xadd %0,(%2)"
+LOCK_PREFIX     "xadd %0,%1"
-                : "+r"(tmp), "=m"(sem->count)
+                : "+r" (tmp), "+m" (sem->count)
-                : "r"(sem), "m"(sem->count)
+                : : "memory");
-                : "memory");
        return tmp+delta;
 }
diff --git a/include/asm-i386/semaphore.h b/include/asm-i386/semaphore.h
index f7a0f310c524..d51e800acf29 100644
--- a/include/asm-i386/semaphore.h
+++ b/include/asm-i386/semaphore.h
@@ -107,7 +107,7 @@ static inline void down(struct semaphore * sem)
                "call __down_failed\n\t"
                "jmp 1b\n"
                LOCK_SECTION_END
-                :"=m" (sem->count)
+                :"+m" (sem->count)
                :
                :"memory","ax");
 }
@@ -132,7 +132,7 @@ static inline int down_interruptible(struct semaphore * sem)
                "call __down_failed_interruptible\n\t"
                "jmp 1b\n"
                LOCK_SECTION_END
-                :"=a" (result), "=m" (sem->count)
+                :"=a" (result), "+m" (sem->count)
                :
                :"memory");
        return result;
@@ -157,7 +157,7 @@ static inline int down_trylock(struct semaphore * sem)
                "call __down_failed_trylock\n\t"
                "jmp 1b\n"
                LOCK_SECTION_END
-                :"=a" (result), "=m" (sem->count)
+                :"=a" (result), "+m" (sem->count)
                :
                :"memory");
        return result;
@@ -182,7 +182,7 @@ static inline void up(struct semaphore * sem)
                "jmp 1b\n"
                LOCK_SECTION_END
                ".subsection 0\n"
-                :"=m" (sem->count)
+                :"+m" (sem->count)
                :
                :"memory","ax");
 }
diff --git a/include/asm-i386/spinlock.h b/include/asm-i386/spinlock.h
index 87c40f830653..d816c62a7a1d 100644
--- a/include/asm-i386/spinlock.h
+++ b/include/asm-i386/spinlock.h
@@ -65,7 +65,7 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
        alternative_smp(
                __raw_spin_lock_string,
                __raw_spin_lock_string_up,
-                "=m" (lock->slock) : : "memory");
+                "+m" (lock->slock) : : "memory");
 }
 /*
@@ -79,7 +79,7 @@ static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long fla
        alternative_smp(
                __raw_spin_lock_string_flags,
                __raw_spin_lock_string_up,
-                "=m" (lock->slock) : "r" (flags) : "memory");
+                "+m" (lock->slock) : "r" (flags) : "memory");
 }
 #endif
@@ -88,7 +88,7 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock)
        char oldval;
        __asm__ __volatile__(
                "xchgb %b0,%1"
-                :"=q" (oldval), "=m" (lock->slock)
+                :"=q" (oldval), "+m" (lock->slock)
                :"0" (0) : "memory");
        return oldval > 0;
 }
@@ -104,7 +104,7 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock)
 #define __raw_spin_unlock_string \
        "movb $1,%0" \
-                :"=m" (lock->slock) : : "memory"
+                :"+m" (lock->slock) : : "memory"
 static inline void __raw_spin_unlock(raw_spinlock_t *lock)
@@ -118,7 +118,7 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
 #define __raw_spin_unlock_string \
        "xchgb %b0, %1" \
-                :"=q" (oldval), "=m" (lock->slock) \
+                :"=q" (oldval), "+m" (lock->slock) \
                :"0" (oldval) : "memory"
 static inline void __raw_spin_unlock(raw_spinlock_t *lock)
@@ -199,13 +199,13 @@ static inline int __raw_write_trylock(raw_rwlock_t *lock)
 static inline void __raw_read_unlock(raw_rwlock_t *rw)
 {
-        asm volatile(LOCK_PREFIX "incl %0" :"=m" (rw->lock) : : "memory");
+        asm volatile(LOCK_PREFIX "incl %0" :"+m" (rw->lock) : : "memory");
 }
 static inline void __raw_write_unlock(raw_rwlock_t *rw)
 {
        asm volatile(LOCK_PREFIX "addl $" RW_LOCK_BIAS_STR ", %0"
-                                 : "=m" (rw->lock) : : "memory");
+                                 : "+m" (rw->lock) : : "memory");
 }
 #endif /* __ASM_SPINLOCK_H */
diff --git a/include/asm-i386/thread_info.h b/include/asm-i386/thread_info.h
index 2833fa2c0dd0..54d6d7aea938 100644
--- a/include/asm-i386/thread_info.h
+++ b/include/asm-i386/thread_info.h
@@ -140,6 +140,8 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SECCOMP             8       /* secure computing */
 #define TIF_RESTORE_SIGMASK     9       /* restore signal mask in do_signal() */
 #define TIF_MEMDIE              16
+#define TIF_DEBUG               17      /* uses debug registers */
+#define TIF_IO_BITMAP           18      /* uses I/O bitmap */
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
@@ -151,6 +153,8 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP            (1<<TIF_SECCOMP)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
+#define _TIF_DEBUG              (1<<TIF_DEBUG)
+#define _TIF_IO_BITMAP          (1<<TIF_IO_BITMAP)
 /* work to do on interrupt/exception return */
 #define _TIF_WORK_MASK \
@@ -159,6 +163,9 @@ static inline struct thread_info *current_thread_info(void)
 /* work to do on any return to u-space */
 #define _TIF_ALLWORK_MASK       (0x0000FFFF & ~_TIF_SECCOMP)
+/* flags to check in __switch_to() */
+#define _TIF_WORK_CTXSW (_TIF_DEBUG|_TIF_IO_BITMAP)
 /*
 * Thread-synchronous status.
 *
diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h
index bb3c0ab7e667..53283e2540b3 100644
--- a/include/asm-powerpc/atomic.h
+++ b/include/asm-powerpc/atomic.h
@@ -27,8 +27,8 @@ static __inline__ void atomic_add(int a, atomic_t *v)
        PPC405_ERR77(0,%3)
 "       stwcx.  %0,0,%3 \n\
        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
+        : "=&r" (t), "+m" (v->counter)
-        : "r" (a), "r" (&v->counter), "m" (v->counter)
+        : "r" (a), "r" (&v->counter)
        : "cc");
 }
@@ -63,8 +63,8 @@ static __inline__ void atomic_sub(int a, atomic_t *v)
        PPC405_ERR77(0,%3)
 "       stwcx.  %0,0,%3 \n\
        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
+        : "=&r" (t), "+m" (v->counter)
-        : "r" (a), "r" (&v->counter), "m" (v->counter)
+        : "r" (a), "r" (&v->counter)
        : "cc");
 }
@@ -97,8 +97,8 @@ static __inline__ void atomic_inc(atomic_t *v)
        PPC405_ERR77(0,%2)
 "       stwcx.  %0,0,%2 \n\
        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
+        : "=&r" (t), "+m" (v->counter)
-        : "r" (&v->counter), "m" (v->counter)
+        : "r" (&v->counter)
        : "cc");
 }
@@ -141,8 +141,8 @@ static __inline__ void atomic_dec(atomic_t *v)
        PPC405_ERR77(0,%2)\
 "       stwcx.  %0,0,%2\n\
        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
+        : "=&r" (t), "+m" (v->counter)
-        : "r" (&v->counter), "m" (v->counter)
+        : "r" (&v->counter)
        : "cc");
 }
@@ -253,8 +253,8 @@ static __inline__ void atomic64_add(long a, atomic64_t *v)
        add     %0,%2,%0\n\
        stdcx.  %0,0,%3 \n\
        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
+        : "=&r" (t), "+m" (v->counter)
-        : "r" (a), "r" (&v->counter), "m" (v->counter)
+        : "r" (a), "r" (&v->counter)
        : "cc");
 }
@@ -287,8 +287,8 @@ static __inline__ void atomic64_sub(long a, atomic64_t *v)
        subf    %0,%2,%0\n\
        stdcx.  %0,0,%3 \n\
        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
+        : "=&r" (t), "+m" (v->counter)
-        : "r" (a), "r" (&v->counter), "m" (v->counter)
+        : "r" (a), "r" (&v->counter)
        : "cc");
 }
@@ -319,8 +319,8 @@ static __inline__ void atomic64_inc(atomic64_t *v)
        addic   %0,%0,1\n\
        stdcx.  %0,0,%2 \n\
        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
+        : "=&r" (t), "+m" (v->counter)
-        : "r" (&v->counter), "m" (v->counter)
+        : "r" (&v->counter)
        : "cc");
 }
@@ -361,8 +361,8 @@ static __inline__ void atomic64_dec(atomic64_t *v)
        addic   %0,%0,-1\n\
        stdcx.  %0,0,%2\n\
        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
+        : "=&r" (t), "+m" (v->counter)
-        : "r" (&v->counter), "m" (v->counter)
+        : "r" (&v->counter)
        : "cc");
 }
diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h
index 76e2f08c3c83..c341063d0804 100644
--- a/include/asm-powerpc/bitops.h
+++ b/include/asm-powerpc/bitops.h
@@ -65,8 +65,8 @@ static __inline__ void set_bit(int nr, volatile unsigned long *addr)
        PPC405_ERR77(0,%3)
        PPC_STLCX "%0,0,%3\n"
        "bne-   1b"
-        : "=&r"(old), "=m"(*p)
+        : "=&r" (old), "+m" (*p)
-        : "r"(mask), "r"(p), "m"(*p)
+        : "r" (mask), "r" (p)
        : "cc" );
 }
@@ -82,8 +82,8 @@ static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
        PPC405_ERR77(0,%3)
        PPC_STLCX "%0,0,%3\n"
        "bne-   1b"
-        : "=&r"(old), "=m"(*p)
+        : "=&r" (old), "+m" (*p)
-        : "r"(mask), "r"(p), "m"(*p)
+        : "r" (mask), "r" (p)
        : "cc" );
 }
@@ -99,8 +99,8 @@ static __inline__ void change_bit(int nr, volatile unsigned long *addr)
        PPC405_ERR77(0,%3)
        PPC_STLCX "%0,0,%3\n"
        "bne-   1b"
-        : "=&r"(old), "=m"(*p)
+        : "=&r" (old), "+m" (*p)
-        : "r"(mask), "r"(p), "m"(*p)
+        : "r" (mask), "r" (p)
        : "cc" );
 }
@@ -179,8 +179,8 @@ static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
        "or     %0,%0,%2\n"
        PPC_STLCX "%0,0,%3\n"
        "bne-   1b"
-        : "=&r" (old), "=m" (*addr)
+        : "=&r" (old), "+m" (*addr)
-        : "r" (mask), "r" (addr), "m" (*addr)
+        : "r" (mask), "r" (addr)
        : "cc");
 }
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index d075725bf444..c6569516ba35 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -220,8 +220,8 @@ __xchg_u32(volatile void *p, unsigned long val)
 "       stwcx.  %3,0,%2 \n\
        bne-    1b"
        ISYNC_ON_SMP
-        : "=&r" (prev), "=m" (*(volatile unsigned int *)p)
+        : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
-        : "r" (p), "r" (val), "m" (*(volatile unsigned int *)p)
+        : "r" (p), "r" (val)
        : "cc", "memory");
        return prev;
@@ -240,8 +240,8 @@ __xchg_u64(volatile void *p, unsigned long val)
 "       stdcx.  %3,0,%2 \n\
        bne-    1b"
        ISYNC_ON_SMP
-        : "=&r" (prev), "=m" (*(volatile unsigned long *)p)
+        : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
-        : "r" (p), "r" (val), "m" (*(volatile unsigned long *)p)
+        : "r" (p), "r" (val)
        : "cc", "memory");
        return prev;
@@ -299,8 +299,8 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
        ISYNC_ON_SMP
        "\n\
 2:"
-        : "=&r" (prev), "=m" (*p)
+        : "=&r" (prev), "+m" (*p)
-        : "r" (p), "r" (old), "r" (new), "m" (*p)
+        : "r" (p), "r" (old), "r" (new)
        : "cc", "memory");
        return prev;
@@ -322,8 +322,8 @@ __cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
        ISYNC_ON_SMP
        "\n\
 2:"
-        : "=&r" (prev), "=m" (*p)
+        : "=&r" (prev), "+m" (*p)
-        : "r" (p), "r" (old), "r" (new), "m" (*p)
+        : "r" (p), "r" (old), "r" (new)
        : "cc", "memory");
        return prev;
diff --git a/include/linux/blktrace_api.h b/include/linux/blktrace_api.h
index a7e8cef73d15..7520cc1ff9e2 100644
--- a/include/linux/blktrace_api.h
+++ b/include/linux/blktrace_api.h
@@ -11,7 +11,7 @@ enum blktrace_cat {
        BLK_TC_READ     = 1 << 0,       /* reads */
        BLK_TC_WRITE    = 1 << 1,       /* writes */
        BLK_TC_BARRIER  = 1 << 2,       /* barrier */
-        BLK_TC_SYNC     = 1 << 3,       /* barrier */
+        BLK_TC_SYNC     = 1 << 3,       /* sync IO */
        BLK_TC_QUEUE    = 1 << 4,       /* queueing/merging */
        BLK_TC_REQUEUE  = 1 << 5,       /* requeueing */
        BLK_TC_ISSUE    = 1 << 6,       /* issue */
@@ -19,6 +19,7 @@ enum blktrace_cat {
        BLK_TC_FS       = 1 << 8,       /* fs requests */
        BLK_TC_PC       = 1 << 9,       /* pc requests */
        BLK_TC_NOTIFY   = 1 << 10,      /* special message */
+        BLK_TC_AHEAD    = 1 << 11,      /* readahead */
        BLK_TC_END      = 1 << 15,      /* only 16-bits, reminder */
 };
@@ -147,7 +148,7 @@ static inline void blk_add_trace_rq(struct request_queue *q, struct request *rq,
                                    u32 what)
 {
        struct blk_trace *bt = q->blk_trace;
-        int rw = rq->flags & 0x07;
+        int rw = rq->flags & 0x03;
        if (likely(!bt))
                return;
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 85f99f60deea..76cc099c8580 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -549,6 +549,7 @@ struct packet_type {
                                         struct net_device *);
        struct sk_buff          *(*gso_segment)(struct sk_buff *skb,
                                                int features);
+        int                     (*gso_send_check)(struct sk_buff *skb);
        void                    *af_packet_priv;
        struct list_head        list;
 };
@@ -1001,13 +1002,14 @@ static inline int net_gso_ok(int features, int gso_type)
 static inline int skb_gso_ok(struct sk_buff *skb, int features)
 {
-        return net_gso_ok(features, skb_shinfo(skb)->gso_size ?
+        return net_gso_ok(features, skb_shinfo(skb)->gso_type);
-                                    skb_shinfo(skb)->gso_type : 0);
 }
 static inline int netif_needs_gso(struct net_device *dev, struct sk_buff *skb)
 {
-        return !skb_gso_ok(skb, dev->features);
+        return skb_is_gso(skb) &&
+               (!skb_gso_ok(skb, dev->features) ||
+                unlikely(skb->ip_summed != CHECKSUM_HW));
 }
 #endif /* __KERNEL__ */
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 3597b4f14389..0bf31b83578c 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -1455,5 +1455,10 @@ static inline void skb_init_secmark(struct sk_buff *skb)
 { }
 #endif
+static inline int skb_is_gso(const struct sk_buff *skb)
+{
+        return skb_shinfo(skb)->gso_size;
+}
 #endif  /* __KERNEL__ */
 #endif  /* _LINUX_SKBUFF_H */
diff --git a/include/net/protocol.h b/include/net/protocol.h
index a225d6371cb1..c643bce64e55 100644
--- a/include/net/protocol.h
+++ b/include/net/protocol.h
@@ -36,6 +36,7 @@
 struct net_protocol {
        int                     (*handler)(struct sk_buff *skb);
        void                    (*err_handler)(struct sk_buff *skb, u32 info);
+        int                     (*gso_send_check)(struct sk_buff *skb);
        struct sk_buff         *(*gso_segment)(struct sk_buff *skb,
                                               int features);
        int                     no_policy;
@@ -51,6 +52,7 @@ struct inet6_protocol
                               int type, int code, int offset,
                               __u32 info);
+        int     (*gso_send_check)(struct sk_buff *skb);
        struct sk_buff *(*gso_segment)(struct sk_buff *skb,
                                       int features);
diff --git a/include/net/tcp.h b/include/net/tcp.h
index 3cd803b0d7a5..0720bddff1e9 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -1086,6 +1086,7 @@ extern struct request_sock_ops tcp_request_sock_ops;
 extern int tcp_v4_destroy_sock(struct sock *sk);
+extern int tcp_v4_gso_send_check(struct sk_buff *skb);
 extern struct sk_buff *tcp_tso_segment(struct sk_buff *skb, int features);
 #ifdef CONFIG_PROC_FS
diff --git a/net/atm/clip.c b/net/atm/clip.c
index 121bf6f49148..2e62105d91bd 100644
--- a/net/atm/clip.c
+++ b/net/atm/clip.c
@@ -962,7 +962,6 @@ static struct file_operations arp_seq_fops = {
 static int __init atm_clip_init(void)
 {
-        struct proc_dir_entry *p;
        neigh_table_init_no_netlink(&clip_tbl);
        clip_tbl_hook = &clip_tbl;
@@ -972,9 +971,15 @@ static int __init atm_clip_init(void)
        setup_timer(&idle_timer, idle_timer_check, 0);
-        p = create_proc_entry("arp", S_IRUGO, atm_proc_root);
+#ifdef CONFIG_PROC_FS
-        if (p)
+        {
-                p->proc_fops = &arp_seq_fops;
+                struct proc_dir_entry *p;
+                p = create_proc_entry("arp", S_IRUGO, atm_proc_root);
+                if (p)
+                        p->proc_fops = &arp_seq_fops;
+        }
+#endif
        return 0;
 }
diff --git a/net/atm/ipcommon.c b/net/atm/ipcommon.c
index 4b1faca5013f..1d3de42fada0 100644
--- a/net/atm/ipcommon.c
+++ b/net/atm/ipcommon.c
@@ -25,22 +25,27 @@
 /*
 * skb_migrate appends the list at "from" to "to", emptying "from" in the
 * process. skb_migrate is atomic with respect to all other skb operations on
- * "from" and "to". Note that it locks both lists at the same time, so beware
+ * "from" and "to". Note that it locks both lists at the same time, so to deal
- * of potential deadlocks.
+ * with the lock ordering, the locks are taken in address order.
 *
 * This function should live in skbuff.c or skbuff.h.
 */
-void skb_migrate(struct sk_buff_head *from,struct sk_buff_head *to)
+void skb_migrate(struct sk_buff_head *from, struct sk_buff_head *to)
 {
        unsigned long flags;
        struct sk_buff *skb_from = (struct sk_buff *) from;
        struct sk_buff *skb_to = (struct sk_buff *) to;
        struct sk_buff *prev;
-        spin_lock_irqsave(&from->lock,flags);
+        if ((unsigned long) from < (unsigned long) to) {
-        spin_lock(&to->lock);
+                spin_lock_irqsave(&from->lock, flags);
+                spin_lock_nested(&to->lock, SINGLE_DEPTH_NESTING);
+        } else {
+                spin_lock_irqsave(&to->lock, flags);
+                spin_lock_nested(&from->lock, SINGLE_DEPTH_NESTING);
+        }
        prev = from->prev;
        from->next->prev = to->prev;
        prev->next = skb_to;
@@ -51,7 +56,7 @@ void skb_migrate(struct sk_buff_head *from,struct sk_buff_head *to)
        from->prev = skb_from;
        from->next = skb_from;
        from->qlen = 0;
-        spin_unlock_irqrestore(&from->lock,flags);
+        spin_unlock_irqrestore(&from->lock, flags);
 }
diff --git a/net/ax25/af_ax25.c b/net/ax25/af_ax25.c
index 10a3c0aa8398..f12be2acf9bc 100644
--- a/net/ax25/af_ax25.c
+++ b/net/ax25/af_ax25.c
@@ -486,10 +486,9 @@ ax25_cb *ax25_create_cb(void)
 {
        ax25_cb *ax25;
-        if ((ax25 = kmalloc(sizeof(*ax25), GFP_ATOMIC)) == NULL)
+        if ((ax25 = kzalloc(sizeof(*ax25), GFP_ATOMIC)) == NULL)
                return NULL;
-        memset(ax25, 0x00, sizeof(*ax25));
        atomic_set(&ax25->refcount, 1);
        skb_queue_head_init(&ax25->write_queue);
diff --git a/net/ax25/ax25_dev.c b/net/ax25/ax25_dev.c
index 47e6e790bd67..b787678220ff 100644
--- a/net/ax25/ax25_dev.c
+++ b/net/ax25/ax25_dev.c
@@ -55,15 +55,13 @@ void ax25_dev_device_up(struct net_device *dev)
 {
        ax25_dev *ax25_dev;
-        if ((ax25_dev = kmalloc(sizeof(*ax25_dev), GFP_ATOMIC)) == NULL) {
+        if ((ax25_dev = kzalloc(sizeof(*ax25_dev), GFP_ATOMIC)) == NULL) {
                printk(KERN_ERR "AX.25: ax25_dev_device_up - out of memory\n");
                return;
        }
        ax25_unregister_sysctl();
-        memset(ax25_dev, 0x00, sizeof(*ax25_dev));
        dev->ax25_ptr     = ax25_dev;
        ax25_dev->dev     = dev;
        dev_hold(dev);
diff --git a/net/bridge/br_forward.c b/net/bridge/br_forward.c
index 8be9f2123e54..6ccd32b30809 100644
--- a/net/bridge/br_forward.c
+++ b/net/bridge/br_forward.c
@@ -35,7 +35,7 @@ static inline unsigned packet_length(const struct sk_buff *skb)
 int br_dev_queue_push_xmit(struct sk_buff *skb)
 {
        /* drop mtu oversized packets except gso */
-        if (packet_length(skb) > skb->dev->mtu && !skb_shinfo(skb)->gso_size)
+        if (packet_length(skb) > skb->dev->mtu && !skb_is_gso(skb))
                kfree_skb(skb);
        else {
 #ifdef CONFIG_BRIDGE_NETFILTER
diff --git a/net/bridge/br_netfilter.c b/net/bridge/br_netfilter.c
index 8298a5179aef..cbc8a389a0a8 100644
--- a/net/bridge/br_netfilter.c
+++ b/net/bridge/br_netfilter.c
@@ -761,7 +761,7 @@ static int br_nf_dev_queue_xmit(struct sk_buff *skb)
 {
        if (skb->protocol == htons(ETH_P_IP) &&
            skb->len > skb->dev->mtu &&
-            !skb_shinfo(skb)->gso_size)
+            !skb_is_gso(skb))
                return ip_fragment(skb, br_dev_queue_push_xmit);
        else
                return br_dev_queue_push_xmit(skb);
diff --git a/net/core/dev.c b/net/core/dev.c
index 066a60a75280..4d2b5167d7f5 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -1162,9 +1162,17 @@ int skb_checksum_help(struct sk_buff *skb, int inward)
        unsigned int csum;
        int ret = 0, offset = skb->h.raw - skb->data;
-        if (inward) {
+        if (inward)
-                skb->ip_summed = CHECKSUM_NONE;
+                goto out_set_summed;
-                goto out;
+        if (unlikely(skb_shinfo(skb)->gso_size)) {
+                static int warned;
+                WARN_ON(!warned);
+                warned = 1;
+                /* Let GSO fix up the checksum. */
+                goto out_set_summed;
        }
        if (skb_cloned(skb)) {
@@ -1181,6 +1189,8 @@ int skb_checksum_help(struct sk_buff *skb, int inward)
        BUG_ON(skb->csum + 2 > offset);
        *(u16*)(skb->h.raw + skb->csum) = csum_fold(csum);
+out_set_summed:
        skb->ip_summed = CHECKSUM_NONE;
 out:    
        return ret;
@@ -1201,17 +1211,35 @@ struct sk_buff *skb_gso_segment(struct sk_buff *skb, int features)
        struct sk_buff *segs = ERR_PTR(-EPROTONOSUPPORT);
        struct packet_type *ptype;
        int type = skb->protocol;
+        int err;
        BUG_ON(skb_shinfo(skb)->frag_list);
-        BUG_ON(skb->ip_summed != CHECKSUM_HW);
        skb->mac.raw = skb->data;
        skb->mac_len = skb->nh.raw - skb->data;
        __skb_pull(skb, skb->mac_len);
+        if (unlikely(skb->ip_summed != CHECKSUM_HW)) {
+                static int warned;
+                WARN_ON(!warned);
+                warned = 1;
+                if (skb_header_cloned(skb) &&
+                    (err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC)))
+                        return ERR_PTR(err);
+        }
        rcu_read_lock();
        list_for_each_entry_rcu(ptype, &ptype_base[ntohs(type) & 15], list) {
                if (ptype->type == type && !ptype->dev && ptype->gso_segment) {
+                        if (unlikely(skb->ip_summed != CHECKSUM_HW)) {
+                                err = ptype->gso_send_check(skb);
+                                segs = ERR_PTR(err);
+                                if (err || skb_gso_ok(skb, features))
+                                        break;
+                                __skb_push(skb, skb->data - skb->nh.raw);
+                        }
                        segs = ptype->gso_segment(skb, features);
                        break;
                }
@@ -1727,7 +1755,7 @@ static int ing_filter(struct sk_buff *skb)
        if (dev->qdisc_ingress) {
                __u32 ttl = (__u32) G_TC_RTTL(skb->tc_verd);
                if (MAX_RED_LOOP < ttl++) {
-                        printk("Redir loop detected Dropping packet (%s->%s)\n",
+                        printk(KERN_WARNING "Redir loop detected Dropping packet (%s->%s)\n",
                                skb->input_dev->name, skb->dev->name);
                        return TC_ACT_SHOT;
                }
@@ -2922,7 +2950,7 @@ int register_netdevice(struct net_device *dev)
        /* Fix illegal SG+CSUM combinations. */
        if ((dev->features & NETIF_F_SG) &&
            !(dev->features & NETIF_F_ALL_CSUM)) {
-                printk("%s: Dropping NETIF_F_SG since no checksum feature.\n",
+                printk(KERN_NOTICE "%s: Dropping NETIF_F_SG since no checksum feature.\n",
                       dev->name);
                dev->features &= ~NETIF_F_SG;
        }
@@ -2930,7 +2958,7 @@ int register_netdevice(struct net_device *dev)
        /* TSO requires that SG is present as well. */
        if ((dev->features & NETIF_F_TSO) &&
            !(dev->features & NETIF_F_SG)) {
-                printk("%s: Dropping NETIF_F_TSO since no SG feature.\n",
+                printk(KERN_NOTICE "%s: Dropping NETIF_F_TSO since no SG feature.\n",
                       dev->name);
                dev->features &= ~NETIF_F_TSO;
        }
diff --git a/net/decnet/dn_rules.c b/net/decnet/dn_rules.c
index 06e785fe5757..22f321d9bf9d 100644
--- a/net/decnet/dn_rules.c
+++ b/net/decnet/dn_rules.c
@@ -399,9 +399,10 @@ int dn_fib_dump_rules(struct sk_buff *skb, struct netlink_callback *cb)
        rcu_read_lock();
        hlist_for_each_entry(r, node, &dn_fib_rules, r_hlist) {
                if (idx < s_idx)
-                        continue;
+                        goto next;
                if (dn_fib_fill_rule(skb, r, cb, NLM_F_MULTI) < 0)
                        break;
+next:
                idx++;
        }
        rcu_read_unlock();
diff --git a/net/ipv4/af_inet.c b/net/ipv4/af_inet.c
index 318d4674faa1..c84a32070f8d 100644
--- a/net/ipv4/af_inet.c
+++ b/net/ipv4/af_inet.c
@@ -1097,6 +1097,40 @@ int inet_sk_rebuild_header(struct sock *sk)
 EXPORT_SYMBOL(inet_sk_rebuild_header);
+static int inet_gso_send_check(struct sk_buff *skb)
+{
+        struct iphdr *iph;
+        struct net_protocol *ops;
+        int proto;
+        int ihl;
+        int err = -EINVAL;
+        if (unlikely(!pskb_may_pull(skb, sizeof(*iph))))
+                goto out;
+        iph = skb->nh.iph;
+        ihl = iph->ihl * 4;
+        if (ihl < sizeof(*iph))
+                goto out;
+        if (unlikely(!pskb_may_pull(skb, ihl)))
+                goto out;
+        skb->h.raw = __skb_pull(skb, ihl);
+        iph = skb->nh.iph;
+        proto = iph->protocol & (MAX_INET_PROTOS - 1);
+        err = -EPROTONOSUPPORT;
+        rcu_read_lock();
+        ops = rcu_dereference(inet_protos[proto]);
+        if (likely(ops && ops->gso_send_check))
+                err = ops->gso_send_check(skb);
+        rcu_read_unlock();
+out:
+        return err;
+}
 static struct sk_buff *inet_gso_segment(struct sk_buff *skb, int features)
 {
        struct sk_buff *segs = ERR_PTR(-EINVAL);
@@ -1162,6 +1196,7 @@ static struct net_protocol igmp_protocol = {
 static struct net_protocol tcp_protocol = {
        .handler =      tcp_v4_rcv,
        .err_handler =  tcp_v4_err,
+        .gso_send_check = tcp_v4_gso_send_check,
        .gso_segment =  tcp_tso_segment,
        .no_policy =    1,
 };
@@ -1208,6 +1243,7 @@ static int ipv4_proc_init(void);
 static struct packet_type ip_packet_type = {
        .type = __constant_htons(ETH_P_IP),
        .func = ip_rcv,
+        .gso_send_check = inet_gso_send_check,
        .gso_segment = inet_gso_segment,
 };
diff --git a/net/ipv4/fib_rules.c b/net/ipv4/fib_rules.c
index 6c642d11d4ca..773b12ba4e3c 100644
--- a/net/ipv4/fib_rules.c
+++ b/net/ipv4/fib_rules.c
@@ -457,13 +457,13 @@ int inet_dump_rules(struct sk_buff *skb, struct netlink_callback *cb)
        rcu_read_lock();
        hlist_for_each_entry(r, node, &fib_rules, hlist) {
                if (idx < s_idx)
-                        continue;
+                        goto next;
                if (inet_fill_rule(skb, r, NETLINK_CB(cb->skb).pid,
                                   cb->nlh->nlmsg_seq,
                                   RTM_NEWRULE, NLM_F_MULTI) < 0)
                        break;
+next:
                idx++;
        }
        rcu_read_unlock();
diff --git a/net/ipv4/ip_output.c b/net/ipv4/ip_output.c
index ca0e714613fb..7c9f9a6421b8 100644
--- a/net/ipv4/ip_output.c
+++ b/net/ipv4/ip_output.c
@@ -209,7 +209,7 @@ static inline int ip_finish_output(struct sk_buff *skb)
                return dst_output(skb);
        }
 #endif
-        if (skb->len > dst_mtu(skb->dst) && !skb_shinfo(skb)->gso_size)
+        if (skb->len > dst_mtu(skb->dst) && !skb_is_gso(skb))
                return ip_fragment(skb, ip_finish_output2);
        else
                return ip_finish_output2(skb);
@@ -1095,7 +1095,7 @@ ssize_t	ip_append_page(struct sock *sk, struct page *page,
        while (size > 0) {
                int i;
-                if (skb_shinfo(skb)->gso_size)
+                if (skb_is_gso(skb))
                        len = size;
                else {
diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c
index 5a886e6efbbe..a891133f00e4 100644
--- a/net/ipv4/tcp_ipv4.c
+++ b/net/ipv4/tcp_ipv4.c
@@ -496,6 +496,24 @@ void tcp_v4_send_check(struct sock *sk, int len, struct sk_buff *skb)
        }
 }
+int tcp_v4_gso_send_check(struct sk_buff *skb)
+{
+        struct iphdr *iph;
+        struct tcphdr *th;
+        if (!pskb_may_pull(skb, sizeof(*th)))
+                return -EINVAL;
+        iph = skb->nh.iph;
+        th = skb->h.th;
+        th->check = 0;
+        th->check = ~tcp_v4_check(th, skb->len, iph->saddr, iph->daddr, 0);
+        skb->csum = offsetof(struct tcphdr, check);
+        skb->ip_summed = CHECKSUM_HW;
+        return 0;
+}
 /*
 *      This routine will send an RST to the other tcp.
 *
diff --git a/net/ipv4/xfrm4_output.c b/net/ipv4/xfrm4_output.c
index 193363e22932..d16f863cf687 100644
--- a/net/ipv4/xfrm4_output.c
+++ b/net/ipv4/xfrm4_output.c
@@ -134,7 +134,7 @@ static int xfrm4_output_finish(struct sk_buff *skb)
        }
 #endif
-        if (!skb_shinfo(skb)->gso_size)
+        if (!skb_is_gso(skb))
                return xfrm4_output_finish2(skb);
        skb->protocol = htons(ETH_P_IP);
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
index 2c5b44575af0..3bc74ce78800 100644
--- a/net/ipv6/ip6_output.c
+++ b/net/ipv6/ip6_output.c
@@ -147,7 +147,7 @@ static int ip6_output2(struct sk_buff *skb)
 int ip6_output(struct sk_buff *skb)
 {
-        if ((skb->len > dst_mtu(skb->dst) && !skb_shinfo(skb)->gso_size) ||
+        if ((skb->len > dst_mtu(skb->dst) && !skb_is_gso(skb)) ||
                                dst_allfrag(skb->dst))
                return ip6_fragment(skb, ip6_output2);
        else
@@ -229,7 +229,7 @@ int ip6_xmit(struct sock *sk, struct sk_buff *skb, struct flowi *fl,
        skb->priority = sk->sk_priority;
        mtu = dst_mtu(dst);
-        if ((skb->len <= mtu) || ipfragok || skb_shinfo(skb)->gso_size) {
+        if ((skb->len <= mtu) || ipfragok || skb_is_gso(skb)) {
                IP6_INC_STATS(IPSTATS_MIB_OUTREQUESTS);
                return NF_HOOK(PF_INET6, NF_IP6_LOCAL_OUT, skb, NULL, dst->dev,
                                dst_output);
diff --git a/net/ipv6/ipv6_sockglue.c b/net/ipv6/ipv6_sockglue.c
index 0c17dec11c8d..43327264e69c 100644
--- a/net/ipv6/ipv6_sockglue.c
+++ b/net/ipv6/ipv6_sockglue.c
@@ -57,29 +57,11 @@
 DEFINE_SNMP_STAT(struct ipstats_mib, ipv6_statistics) __read_mostly;
-static struct sk_buff *ipv6_gso_segment(struct sk_buff *skb, int features)
+static struct inet6_protocol *ipv6_gso_pull_exthdrs(struct sk_buff *skb,
+                                                    int proto)
 {
-        struct sk_buff *segs = ERR_PTR(-EINVAL);
+        struct inet6_protocol *ops = NULL;
-        struct ipv6hdr *ipv6h;
-        struct inet6_protocol *ops;
-        int proto;
-        if (unlikely(skb_shinfo(skb)->gso_type &
-                     ~(SKB_GSO_UDP |
-                       SKB_GSO_DODGY |
-                       SKB_GSO_TCP_ECN |
-                       SKB_GSO_TCPV6 |
-                       0)))
-                goto out;
-        if (unlikely(!pskb_may_pull(skb, sizeof(*ipv6h))))
-                goto out;
-        ipv6h = skb->nh.ipv6h;
-        proto = ipv6h->nexthdr;
-        __skb_pull(skb, sizeof(*ipv6h));
-        rcu_read_lock();
        for (;;) {
                struct ipv6_opt_hdr *opth;
                int len;
@@ -88,30 +70,80 @@ static struct sk_buff *ipv6_gso_segment(struct sk_buff *skb, int features)
                        ops = rcu_dereference(inet6_protos[proto]);
                        if (unlikely(!ops))
-                                goto unlock;
+                                break;
                        if (!(ops->flags & INET6_PROTO_GSO_EXTHDR))
                                break;
                }
                if (unlikely(!pskb_may_pull(skb, 8)))
-                        goto unlock;
+                        break;
                opth = (void *)skb->data;
                len = opth->hdrlen * 8 + 8;
                if (unlikely(!pskb_may_pull(skb, len)))
-                        goto unlock;
+                        break;
                proto = opth->nexthdr;
                __skb_pull(skb, len);
        }
-        skb->h.raw = skb->data;
+        return ops;
-        if (likely(ops->gso_segment))
+}
-                segs = ops->gso_segment(skb, features);
+static int ipv6_gso_send_check(struct sk_buff *skb)
+{
+        struct ipv6hdr *ipv6h;
+        struct inet6_protocol *ops;
+        int err = -EINVAL;
+        if (unlikely(!pskb_may_pull(skb, sizeof(*ipv6h))))
+                goto out;
-unlock:
+        ipv6h = skb->nh.ipv6h;
+        __skb_pull(skb, sizeof(*ipv6h));
+        err = -EPROTONOSUPPORT;
+        rcu_read_lock();
+        ops = ipv6_gso_pull_exthdrs(skb, ipv6h->nexthdr);
+        if (likely(ops && ops->gso_send_check)) {
+                skb->h.raw = skb->data;
+                err = ops->gso_send_check(skb);
+        }
+        rcu_read_unlock();
+out:
+        return err;
+}
+static struct sk_buff *ipv6_gso_segment(struct sk_buff *skb, int features)
+{
+        struct sk_buff *segs = ERR_PTR(-EINVAL);
+        struct ipv6hdr *ipv6h;
+        struct inet6_protocol *ops;
+        if (unlikely(skb_shinfo(skb)->gso_type &
+                     ~(SKB_GSO_UDP |
+                       SKB_GSO_DODGY |
+                       SKB_GSO_TCP_ECN |
+                       SKB_GSO_TCPV6 |
+                       0)))
+                goto out;
+        if (unlikely(!pskb_may_pull(skb, sizeof(*ipv6h))))
+                goto out;
+        ipv6h = skb->nh.ipv6h;
+        __skb_pull(skb, sizeof(*ipv6h));
+        segs = ERR_PTR(-EPROTONOSUPPORT);
+        rcu_read_lock();
+        ops = ipv6_gso_pull_exthdrs(skb, ipv6h->nexthdr);
+        if (likely(ops && ops->gso_segment)) {
+                skb->h.raw = skb->data;
+                segs = ops->gso_segment(skb, features);
+        }
        rcu_read_unlock();
        if (unlikely(IS_ERR(segs)))
@@ -130,6 +162,7 @@ out:
 static struct packet_type ipv6_packet_type = {
        .type = __constant_htons(ETH_P_IPV6), 
        .func = ipv6_rcv,
+        .gso_send_check = ipv6_gso_send_check,
        .gso_segment = ipv6_gso_segment,
 };
diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c
index 5bdcb9002cf7..923989d0520d 100644
--- a/net/ipv6/tcp_ipv6.c
+++ b/net/ipv6/tcp_ipv6.c
@@ -552,6 +552,24 @@ static void tcp_v6_send_check(struct sock *sk, int len, struct sk_buff *skb)
        }
 }
+static int tcp_v6_gso_send_check(struct sk_buff *skb)
+{
+        struct ipv6hdr *ipv6h;
+        struct tcphdr *th;
+        if (!pskb_may_pull(skb, sizeof(*th)))
+                return -EINVAL;
+        ipv6h = skb->nh.ipv6h;
+        th = skb->h.th;
+        th->check = 0;
+        th->check = ~csum_ipv6_magic(&ipv6h->saddr, &ipv6h->daddr, skb->len,
+                                     IPPROTO_TCP, 0);
+        skb->csum = offsetof(struct tcphdr, check);
+        skb->ip_summed = CHECKSUM_HW;
+        return 0;
+}
 static void tcp_v6_send_reset(struct sk_buff *skb)
 {
@@ -1603,6 +1621,7 @@ struct proto tcpv6_prot = {
 static struct inet6_protocol tcpv6_protocol = {
        .handler        =       tcp_v6_rcv,
        .err_handler    =       tcp_v6_err,
+        .gso_send_check =       tcp_v6_gso_send_check,
        .gso_segment    =       tcp_tso_segment,
        .flags          =       INET6_PROTO_NOPOLICY|INET6_PROTO_FINAL,
 };
diff --git a/net/ipv6/xfrm6_output.c b/net/ipv6/xfrm6_output.c
index 48fccb1eca08..0eea60ea9ebc 100644
--- a/net/ipv6/xfrm6_output.c
+++ b/net/ipv6/xfrm6_output.c
@@ -122,7 +122,7 @@ static int xfrm6_output_finish(struct sk_buff *skb)
 {
        struct sk_buff *segs;
-        if (!skb_shinfo(skb)->gso_size)
+        if (!skb_is_gso(skb))
                return xfrm6_output_finish2(skb);
        skb->protocol = htons(ETH_P_IP);
diff --git a/net/netrom/af_netrom.c b/net/netrom/af_netrom.c
index 389a4119e1b4..ecc796878f38 100644
--- a/net/netrom/af_netrom.c
+++ b/net/netrom/af_netrom.c
@@ -1382,14 +1382,12 @@ static int __init nr_proto_init(void)
                return -1;
        }
-        dev_nr = kmalloc(nr_ndevs * sizeof(struct net_device *), GFP_KERNEL);
+        dev_nr = kzalloc(nr_ndevs * sizeof(struct net_device *), GFP_KERNEL);
        if (dev_nr == NULL) {
                printk(KERN_ERR "NET/ROM: nr_proto_init - unable to allocate device array\n");
                return -1;
        }
-        memset(dev_nr, 0x00, nr_ndevs * sizeof(struct net_device *));
        for (i = 0; i < nr_ndevs; i++) {
                char name[IFNAMSIZ];
                struct net_device *dev;
diff --git a/net/rose/af_rose.c b/net/rose/af_rose.c
index d0a67bb31363..c115295ab431 100644
--- a/net/rose/af_rose.c
+++ b/net/rose/af_rose.c
@@ -1490,14 +1490,13 @@ static int __init rose_proto_init(void)
        rose_callsign = null_ax25_address;
-        dev_rose = kmalloc(rose_ndevs * sizeof(struct net_device *), GFP_KERNEL);
+        dev_rose = kzalloc(rose_ndevs * sizeof(struct net_device *), GFP_KERNEL);
        if (dev_rose == NULL) {
                printk(KERN_ERR "ROSE: rose_proto_init - unable to allocate device structure\n");
                rc = -ENOMEM;
                goto out_proto_unregister;
        }
-        memset(dev_rose, 0x00, rose_ndevs * sizeof(struct net_device*));
        for (i = 0; i < rose_ndevs; i++) {
                struct net_device *dev;
                char name[IFNAMSIZ];
diff --git a/net/sched/act_api.c b/net/sched/act_api.c
index 599423cc9d0d..0972247a839c 100644
--- a/net/sched/act_api.c
+++ b/net/sched/act_api.c
@@ -602,8 +602,8 @@ static int tca_action_flush(struct rtattr *rta, struct nlmsghdr *n, u32 pid)
        return err;
 rtattr_failure:
-        module_put(a->ops->owner);
 nlmsg_failure:
+        module_put(a->ops->owner);
 err_out:
        kfree_skb(skb);
        kfree(a);