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-rw-r--r--drivers/dma/ste_dma40.c22
-rw-r--r--drivers/dma/ste_dma40_ll.c26
-rw-r--r--drivers/dma/ste_dma40_ll.h5
3 files changed, 18 insertions, 35 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 4e9d6c5a7134..6a7a00d5d682 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -504,15 +504,29 @@ static void d40_desc_submit(struct d40_chan *d40c, struct d40_desc *desc)
504 list_add_tail(&desc->node, &d40c->active); 504 list_add_tail(&desc->node, &d40c->active);
505} 505}
506 506
507static void d40_phy_lli_load(struct d40_chan *chan, struct d40_desc *desc)
508{
509 struct d40_phy_lli *lli_dst = desc->lli_phy.dst;
510 struct d40_phy_lli *lli_src = desc->lli_phy.src;
511 void __iomem *base = chan_base(chan);
512
513 writel(lli_src->reg_cfg, base + D40_CHAN_REG_SSCFG);
514 writel(lli_src->reg_elt, base + D40_CHAN_REG_SSELT);
515 writel(lli_src->reg_ptr, base + D40_CHAN_REG_SSPTR);
516 writel(lli_src->reg_lnk, base + D40_CHAN_REG_SSLNK);
517
518 writel(lli_dst->reg_cfg, base + D40_CHAN_REG_SDCFG);
519 writel(lli_dst->reg_elt, base + D40_CHAN_REG_SDELT);
520 writel(lli_dst->reg_ptr, base + D40_CHAN_REG_SDPTR);
521 writel(lli_dst->reg_lnk, base + D40_CHAN_REG_SDLNK);
522}
523
507static void d40_desc_load(struct d40_chan *d40c, struct d40_desc *d40d) 524static void d40_desc_load(struct d40_chan *d40c, struct d40_desc *d40d)
508{ 525{
509 int curr_lcla = -EINVAL, next_lcla; 526 int curr_lcla = -EINVAL, next_lcla;
510 527
511 if (chan_is_physical(d40c)) { 528 if (chan_is_physical(d40c)) {
512 d40_phy_lli_write(d40c->base->virtbase, 529 d40_phy_lli_load(d40c, d40d);
513 d40c->phy_chan->num,
514 d40d->lli_phy.dst,
515 d40d->lli_phy.src);
516 d40d->lli_current = d40d->lli_len; 530 d40d->lli_current = d40d->lli_len;
517 } else { 531 } else {
518 532
diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c
index 552c5972c75e..fd7525162596 100644
--- a/drivers/dma/ste_dma40_ll.c
+++ b/drivers/dma/ste_dma40_ll.c
@@ -295,32 +295,6 @@ int d40_phy_sg_to_lli(struct scatterlist *sg,
295} 295}
296 296
297 297
298void d40_phy_lli_write(void __iomem *virtbase,
299 u32 phy_chan_num,
300 struct d40_phy_lli *lli_dst,
301 struct d40_phy_lli *lli_src)
302{
303
304 writel(lli_src->reg_cfg, virtbase + D40_DREG_PCBASE +
305 phy_chan_num * D40_DREG_PCDELTA + D40_CHAN_REG_SSCFG);
306 writel(lli_src->reg_elt, virtbase + D40_DREG_PCBASE +
307 phy_chan_num * D40_DREG_PCDELTA + D40_CHAN_REG_SSELT);
308 writel(lli_src->reg_ptr, virtbase + D40_DREG_PCBASE +
309 phy_chan_num * D40_DREG_PCDELTA + D40_CHAN_REG_SSPTR);
310 writel(lli_src->reg_lnk, virtbase + D40_DREG_PCBASE +
311 phy_chan_num * D40_DREG_PCDELTA + D40_CHAN_REG_SSLNK);
312
313 writel(lli_dst->reg_cfg, virtbase + D40_DREG_PCBASE +
314 phy_chan_num * D40_DREG_PCDELTA + D40_CHAN_REG_SDCFG);
315 writel(lli_dst->reg_elt, virtbase + D40_DREG_PCBASE +
316 phy_chan_num * D40_DREG_PCDELTA + D40_CHAN_REG_SDELT);
317 writel(lli_dst->reg_ptr, virtbase + D40_DREG_PCBASE +
318 phy_chan_num * D40_DREG_PCDELTA + D40_CHAN_REG_SDPTR);
319 writel(lli_dst->reg_lnk, virtbase + D40_DREG_PCBASE +
320 phy_chan_num * D40_DREG_PCDELTA + D40_CHAN_REG_SDLNK);
321
322}
323
324/* DMA logical lli operations */ 298/* DMA logical lli operations */
325 299
326static void d40_log_lli_link(struct d40_log_lli *lli_dst, 300static void d40_log_lli_link(struct d40_log_lli *lli_dst,
diff --git a/drivers/dma/ste_dma40_ll.h b/drivers/dma/ste_dma40_ll.h
index a5d71714ebf7..46578a661b28 100644
--- a/drivers/dma/ste_dma40_ll.h
+++ b/drivers/dma/ste_dma40_ll.h
@@ -312,11 +312,6 @@ int d40_phy_sg_to_lli(struct scatterlist *sg,
312 u32 data_width2, 312 u32 data_width2,
313 int psize); 313 int psize);
314 314
315void d40_phy_lli_write(void __iomem *virtbase,
316 u32 phy_chan_num,
317 struct d40_phy_lli *lli_dst,
318 struct d40_phy_lli *lli_src);
319
320/* Logical channels */ 315/* Logical channels */
321 316
322struct d40_log_lli *d40_log_buf_to_lli(struct d40_log_lli *lli_sg, 317struct d40_log_lli *d40_log_buf_to_lli(struct d40_log_lli *lli_sg,