3 files changed, 9 insertions, 9 deletions

diff --git a/arch/x86_64/kernel/genapic_cluster.c b/arch/x86_64/kernel/genapic_cluster.c
index f6523dd1bc09..a472d62f899a 100644
--- a/arch/x86_64/kernel/genapic_cluster.c
+++ b/arch/x86_64/kernel/genapic_cluster.c
@@ -51,10 +51,10 @@ static void cluster_init_apic_ldr(void)
                 count = 3;
         id = my_cluster | (1UL << count);
         x86_cpu_to_log_apicid[smp_processor_id()] = id;
-        apic_write_around(APIC_DFR, APIC_DFR_CLUSTER);
+        apic_write(APIC_DFR, APIC_DFR_CLUSTER);
         val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
         val |= SET_APIC_LOGICAL_ID(id);
-        apic_write_around(APIC_LDR, val);
+        apic_write(APIC_LDR, val);
 }
 
 /* Start with all IRQs pointing to boot CPU.  IRQ balancing will shift them. */
diff --git a/arch/x86_64/kernel/genapic_flat.c b/arch/x86_64/kernel/genapic_flat.c
index 6d57da96bf8c..8c6028a0f322 100644
--- a/arch/x86_64/kernel/genapic_flat.c
+++ b/arch/x86_64/kernel/genapic_flat.c
@@ -38,10 +38,10 @@ static void flat_init_apic_ldr(void)
         num = smp_processor_id();
         id = 1UL << num;
         x86_cpu_to_log_apicid[num] = id;
-        apic_write_around(APIC_DFR, APIC_DFR_FLAT);
+        apic_write(APIC_DFR, APIC_DFR_FLAT);
         val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
         val |= SET_APIC_LOGICAL_ID(id);
-        apic_write_around(APIC_LDR, val);
+        apic_write(APIC_LDR, val);
 }
 
 static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
@@ -62,7 +62,7 @@ static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
          * prepare target chip field
          */
         cfg = __prepare_ICR2(mask);
-        apic_write_around(APIC_ICR2, cfg);
+        apic_write(APIC_ICR2, cfg);
 
         /*
          * program the ICR
@@ -72,7 +72,7 @@ static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
         /*
          * Send the IPI. The write to APIC_ICR fires this off.
          */
-        apic_write_around(APIC_ICR, cfg);
+        apic_write(APIC_ICR, cfg);
         local_irq_restore(flags);
 }
 
diff --git a/include/asm-x86_64/ipi.h b/include/asm-x86_64/ipi.h
index 5e166b9d3bde..7ba668f43c59 100644
--- a/include/asm-x86_64/ipi.h
+++ b/include/asm-x86_64/ipi.h
@@ -66,7 +66,7 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, unsign
         /*
          * Send the IPI. The write to APIC_ICR fires this off.
          */
-        apic_write_around(APIC_ICR, cfg);
+        apic_write(APIC_ICR, cfg);
 }
 
 
@@ -92,7 +92,7 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
                  * prepare target chip field
                  */
                 cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]);
-                apic_write_around(APIC_ICR2, cfg);
+                apic_write(APIC_ICR2, cfg);
 
                 /*
                  * program the ICR
@@ -102,7 +102,7 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
                 /*
                  * Send the IPI. The write to APIC_ICR fires this off.
                  */
-                apic_write_around(APIC_ICR, cfg);
+                apic_write(APIC_ICR, cfg);
         }
         local_irq_restore(flags);
 }