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-rw-r--r--arch/mips/jazz/setup.c1
-rw-r--r--arch/mips/kernel/setup.c7
-rw-r--r--arch/mips/pci/pci-bcm1480.c2
-rw-r--r--arch/mips/pci/pci-sb1250.c3
-rw-r--r--arch/mips/sni/setup.c1
-rw-r--r--include/asm-mips/io.h17
6 files changed, 0 insertions, 31 deletions
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index a7947199c99b..f136c8a8591c 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -79,7 +79,6 @@ void __init plat_mem_setup(void)
79 if (mips_machtype == MACH_MIPS_MAGNUM_4000) 79 if (mips_machtype == MACH_MIPS_MAGNUM_4000)
80 EISA_bus = 1; 80 EISA_bus = 1;
81#endif 81#endif
82 isa_slot_offset = 0xe3000000;
83 82
84 /* request I/O space for devices used on all i[345]86 PCs */ 83 /* request I/O space for devices used on all i[345]86 PCs */
85 for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++) 84 for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++)
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index c6a063b2a0d9..c04e4e3afede 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -68,13 +68,6 @@ static char command_line[CL_SIZE];
68const unsigned long mips_io_port_base __read_mostly = -1; 68const unsigned long mips_io_port_base __read_mostly = -1;
69EXPORT_SYMBOL(mips_io_port_base); 69EXPORT_SYMBOL(mips_io_port_base);
70 70
71/*
72 * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
73 * for the processor.
74 */
75unsigned long isa_slot_offset;
76EXPORT_SYMBOL(isa_slot_offset);
77
78static struct resource code_resource = { .name = "Kernel code", }; 71static struct resource code_resource = { .name = "Kernel code", };
79static struct resource data_resource = { .name = "Kernel data", }; 72static struct resource data_resource = { .name = "Kernel data", };
80 73
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index 87e2c8f54e2d..d19d262157f2 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -254,8 +254,6 @@ static int __init bcm1480_pcibios_init(void)
254 ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536); 254 ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536);
255 bcm1480_controller.io_map_base -= bcm1480_controller.io_offset; 255 bcm1480_controller.io_map_base -= bcm1480_controller.io_offset;
256 set_io_port_base(bcm1480_controller.io_map_base); 256 set_io_port_base(bcm1480_controller.io_map_base);
257 isa_slot_offset = (unsigned long)
258 ioremap(A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, 1024*1024);
259 257
260 register_pci_controller(&bcm1480_controller); 258 register_pci_controller(&bcm1480_controller);
261 259
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index 2a09ad91ec8c..9bc102a1380e 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -254,9 +254,6 @@ static int __init sb1250_pcibios_init(void)
254 * works correctly with most of Linux's drivers. 254 * works correctly with most of Linux's drivers.
255 * XXX ehs: Should this happen in PCI Device mode? 255 * XXX ehs: Should this happen in PCI Device mode?
256 */ 256 */
257 isa_slot_offset = (unsigned long)
258 ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES_32, 1024 * 1024);
259
260 io_map_base = ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 1024 * 1024); 257 io_map_base = ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 1024 * 1024);
261 sb1250_controller.io_map_base = io_map_base; 258 sb1250_controller.io_map_base = io_map_base;
262 set_io_port_base((unsigned long)io_map_base); 259 set_io_port_base((unsigned long)io_map_base);
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 5484e1c62054..a49272ce7ef5 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -116,7 +116,6 @@ void __init plat_mem_setup(void)
116 /* 116 /*
117 * Setup (E)ISA I/O memory access stuff 117 * Setup (E)ISA I/O memory access stuff
118 */ 118 */
119 isa_slot_offset = CKSEG1ADDR(0xb0000000);
120#ifdef CONFIG_EISA 119#ifdef CONFIG_EISA
121 EISA_bus = 1; 120 EISA_bus = 1;
122#endif 121#endif
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index f18d2816cbec..501a40b9f18d 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -161,13 +161,6 @@ static inline void * isa_bus_to_virt(unsigned long address)
161#define bus_to_virt phys_to_virt 161#define bus_to_virt phys_to_virt
162 162
163/* 163/*
164 * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
165 * for the processor. This implies the assumption that there is only
166 * one of these busses.
167 */
168extern unsigned long isa_slot_offset;
169
170/*
171 * Change "struct page" to physical address. 164 * Change "struct page" to physical address.
172 */ 165 */
173#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) 166#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
@@ -528,16 +521,6 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int
528} 521}
529 522
530/* 523/*
531 * ISA space is 'always mapped' on currently supported MIPS systems, no need
532 * to explicitly ioremap() it. The fact that the ISA IO space is mapped
533 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
534 * are physical addresses. The following constant pointer can be
535 * used as the IO-area pointer (it can be iounmapped as well, so the
536 * analogy with PCI is quite large):
537 */
538#define __ISA_IO_base ((char *)(isa_slot_offset))
539
540/*
541 * The caches on some architectures aren't dma-coherent and have need to 524 * The caches on some architectures aren't dma-coherent and have need to
542 * handle this in software. There are three types of operations that 525 * handle this in software. There are three types of operations that
543 * can be applied to dma buffers. 526 * can be applied to dma buffers.