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-rw-r--r--arch/sparc64/kernel/pci_common.c94
-rw-r--r--arch/sparc64/kernel/pci_impl.h8
-rw-r--r--arch/sparc64/kernel/pci_psycho.c29
-rw-r--r--arch/sparc64/kernel/pci_sabre.c38
-rw-r--r--arch/sparc64/kernel/pci_schizo.c81
-rw-r--r--arch/sparc64/kernel/pci_sun4v.c71
6 files changed, 103 insertions, 218 deletions
diff --git a/arch/sparc64/kernel/pci_common.c b/arch/sparc64/kernel/pci_common.c
index 0d3c95df0d95..4945d700a769 100644
--- a/arch/sparc64/kernel/pci_common.c
+++ b/arch/sparc64/kernel/pci_common.c
@@ -1,7 +1,6 @@
1/* $Id: pci_common.c,v 1.29 2002/02/01 00:56:03 davem Exp $ 1/* pci_common.c: PCI controller common support.
2 * pci_common.c: PCI controller common support.
3 * 2 *
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com) 3 * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)
5 */ 4 */
6 5
7#include <linux/string.h> 6#include <linux/string.h>
@@ -16,8 +15,8 @@
16 15
17#include "pci_impl.h" 16#include "pci_impl.h"
18 17
19void pci_register_legacy_regions(struct resource *io_res, 18static void pci_register_legacy_regions(struct resource *io_res,
20 struct resource *mem_res) 19 struct resource *mem_res)
21{ 20{
22 struct resource *p; 21 struct resource *p;
23 22
@@ -53,6 +52,91 @@ void pci_register_legacy_regions(struct resource *io_res,
53 request_resource(mem_res, p); 52 request_resource(mem_res, p);
54} 53}
55 54
55static void pci_register_iommu_region(struct pci_pbm_info *pbm)
56{
57 u32 *vdma = of_get_property(pbm->prom_node, "virtual-dma", NULL);
58
59 if (vdma) {
60 struct resource *rp = kmalloc(sizeof(*rp), GFP_KERNEL);
61
62 if (!rp) {
63 prom_printf("Cannot allocate IOMMU resource.\n");
64 prom_halt();
65 }
66 rp->name = "IOMMU";
67 rp->start = pbm->mem_space.start + (unsigned long) vdma[0];
68 rp->end = rp->start + (unsigned long) vdma[1] - 1UL;
69 rp->flags = IORESOURCE_BUSY;
70 request_resource(&pbm->mem_space, rp);
71 }
72}
73
74void pci_determine_mem_io_space(struct pci_pbm_info *pbm)
75{
76 int i, saw_mem, saw_io;
77
78 saw_mem = saw_io = 0;
79 for (i = 0; i < pbm->num_pbm_ranges; i++) {
80 struct linux_prom_pci_ranges *pr = &pbm->pbm_ranges[i];
81 unsigned long a;
82 int type;
83
84 type = (pr->child_phys_hi >> 24) & 0x3;
85 a = (((unsigned long)pr->parent_phys_hi << 32UL) |
86 ((unsigned long)pr->parent_phys_lo << 0UL));
87
88 switch (type) {
89 case 0:
90 /* PCI config space, 16MB */
91 pbm->config_space = a;
92 break;
93
94 case 1:
95 /* 16-bit IO space, 16MB */
96 pbm->io_space.start = a;
97 pbm->io_space.end = a + ((16UL*1024UL*1024UL) - 1UL);
98 pbm->io_space.flags = IORESOURCE_IO;
99 saw_io = 1;
100 break;
101
102 case 2:
103 /* 32-bit MEM space, 2GB */
104 pbm->mem_space.start = a;
105 pbm->mem_space.end = a + (0x80000000UL - 1UL);
106 pbm->mem_space.flags = IORESOURCE_MEM;
107 saw_mem = 1;
108 break;
109
110 case 3:
111 /* XXX 64-bit MEM handling XXX */
112
113 default:
114 break;
115 };
116 }
117
118 if (!saw_io || !saw_mem) {
119 prom_printf("%s: Fatal error, missing %s PBM range.\n",
120 pbm->name,
121 (!saw_io ? "IO" : "MEM"));
122 prom_halt();
123 }
124
125 printk("%s: PCI IO[%lx] MEM[%lx]\n",
126 pbm->name,
127 pbm->io_space.start,
128 pbm->mem_space.start);
129
130 pbm->io_space.name = pbm->mem_space.name = pbm->name;
131
132 request_resource(&ioport_resource, &pbm->io_space);
133 request_resource(&iomem_resource, &pbm->mem_space);
134
135 pci_register_legacy_regions(&pbm->io_space,
136 &pbm->mem_space);
137 pci_register_iommu_region(pbm);
138}
139
56/* Generic helper routines for PCI error reporting. */ 140/* Generic helper routines for PCI error reporting. */
57void pci_scan_for_target_abort(struct pci_controller_info *p, 141void pci_scan_for_target_abort(struct pci_controller_info *p,
58 struct pci_pbm_info *pbm, 142 struct pci_pbm_info *pbm,
diff --git a/arch/sparc64/kernel/pci_impl.h b/arch/sparc64/kernel/pci_impl.h
index c4ba702e1fd9..c6714548d823 100644
--- a/arch/sparc64/kernel/pci_impl.h
+++ b/arch/sparc64/kernel/pci_impl.h
@@ -1,7 +1,6 @@
1/* $Id: pci_impl.h,v 1.9 2001/06/13 06:34:30 davem Exp $ 1/* pci_impl.h: Helper definitions for PCI controller support.
2 * pci_impl.h: Helper definitions for PCI controller support.
3 * 2 *
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com) 3 * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)
5 */ 4 */
6 5
7#ifndef PCI_IMPL_H 6#ifndef PCI_IMPL_H
@@ -19,8 +18,7 @@ extern int pci_num_controllers;
19 18
20/* PCI bus scanning and fixup support. */ 19/* PCI bus scanning and fixup support. */
21extern struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm); 20extern struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm);
22extern void pci_register_legacy_regions(struct resource *io_res, 21extern void pci_determine_mem_io_space(struct pci_pbm_info *pbm);
23 struct resource *mem_res);
24 22
25/* Error reporting support. */ 23/* Error reporting support. */
26extern void pci_scan_for_target_abort(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *); 24extern void pci_scan_for_target_abort(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *);
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index 12ea30d30b2f..c08681b7a44e 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -1,7 +1,6 @@
1/* $Id: pci_psycho.c,v 1.33 2002/02/01 00:58:33 davem Exp $ 1/* pci_psycho.c: PSYCHO/U2P specific PCI controller support.
2 * pci_psycho.c: PSYCHO/U2P specific PCI controller support.
3 * 2 *
4 * Copyright (C) 1997, 1998, 1999 David S. Miller (davem@caipfs.rutgers.edu) 3 * Copyright (C) 1997, 1998, 1999, 2007 David S. Miller (davem@davemloft.net)
5 * Copyright (C) 1998, 1999 Eddie C. Dost (ecd@skynet.be) 4 * Copyright (C) 1998, 1999 Eddie C. Dost (ecd@skynet.be)
6 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com) 5 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com)
7 */ 6 */
@@ -1072,19 +1071,6 @@ static void psycho_controller_hwinit(struct pci_controller_info *p)
1072 psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIB_DIAG, tmp); 1071 psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIB_DIAG, tmp);
1073} 1072}
1074 1073
1075static void pbm_register_toplevel_resources(struct pci_controller_info *p,
1076 struct pci_pbm_info *pbm)
1077{
1078 char *name = pbm->name;
1079
1080 pbm->io_space.name = pbm->mem_space.name = name;
1081
1082 request_resource(&ioport_resource, &pbm->io_space);
1083 request_resource(&iomem_resource, &pbm->mem_space);
1084 pci_register_legacy_regions(&pbm->io_space,
1085 &pbm->mem_space);
1086}
1087
1088static void psycho_pbm_strbuf_init(struct pci_controller_info *p, 1074static void psycho_pbm_strbuf_init(struct pci_controller_info *p,
1089 struct pci_pbm_info *pbm, 1075 struct pci_pbm_info *pbm,
1090 int is_pbm_a) 1076 int is_pbm_a)
@@ -1155,13 +1141,9 @@ static void psycho_pbm_init(struct pci_controller_info *p,
1155 if (is_pbm_a) { 1141 if (is_pbm_a) {
1156 pbm = &p->pbm_A; 1142 pbm = &p->pbm_A;
1157 pbm->pci_first_slot = 1; 1143 pbm->pci_first_slot = 1;
1158 pbm->io_space.start = pbm->controller_regs + PSYCHO_IOSPACE_A;
1159 pbm->mem_space.start = pbm->controller_regs + PSYCHO_MEMSPACE_A;
1160 } else { 1144 } else {
1161 pbm = &p->pbm_B; 1145 pbm = &p->pbm_B;
1162 pbm->pci_first_slot = 2; 1146 pbm->pci_first_slot = 2;
1163 pbm->io_space.start = pbm->controller_regs + PSYCHO_IOSPACE_B;
1164 pbm->mem_space.start = pbm->controller_regs + PSYCHO_MEMSPACE_B;
1165 } 1147 }
1166 1148
1167 pbm->chip_type = PBM_CHIP_TYPE_PSYCHO; 1149 pbm->chip_type = PBM_CHIP_TYPE_PSYCHO;
@@ -1174,17 +1156,12 @@ static void psycho_pbm_init(struct pci_controller_info *p,
1174 if (prop) 1156 if (prop)
1175 pbm->chip_revision = *(int *) prop->value; 1157 pbm->chip_revision = *(int *) prop->value;
1176 1158
1177 pbm->io_space.end = pbm->io_space.start + PSYCHO_IOSPACE_SIZE; 1159 pci_determine_mem_io_space(pbm);
1178 pbm->io_space.flags = IORESOURCE_IO;
1179 pbm->mem_space.end = pbm->mem_space.start + PSYCHO_MEMSPACE_SIZE;
1180 pbm->mem_space.flags = IORESOURCE_MEM;
1181 1160
1182 pbm->parent = p; 1161 pbm->parent = p;
1183 pbm->prom_node = dp; 1162 pbm->prom_node = dp;
1184 pbm->name = dp->full_name; 1163 pbm->name = dp->full_name;
1185 1164
1186 pbm_register_toplevel_resources(p, pbm);
1187
1188 printk("%s: PSYCHO PCI Bus Module ver[%x:%x]\n", 1165 printk("%s: PSYCHO PCI Bus Module ver[%x:%x]\n",
1189 pbm->name, 1166 pbm->name,
1190 pbm->chip_version, pbm->chip_revision); 1167 pbm->chip_version, pbm->chip_revision);
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index f4e346092a53..2dad171b54e2 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -1045,10 +1045,9 @@ static void sabre_iommu_init(struct pci_controller_info *p,
1045 sabre_write(p->pbm_A.controller_regs + SABRE_IOMMU_CONTROL, control); 1045 sabre_write(p->pbm_A.controller_regs + SABRE_IOMMU_CONTROL, control);
1046} 1046}
1047 1047
1048static void sabre_pbm_init(struct pci_controller_info *p, struct device_node *dp, u32 dma_start, u32 dma_end) 1048static void sabre_pbm_init(struct pci_controller_info *p, struct device_node *dp)
1049{ 1049{
1050 struct pci_pbm_info *pbm; 1050 struct pci_pbm_info *pbm;
1051 struct resource *rp;
1052 1051
1053 pbm = &p->pbm_A; 1052 pbm = &p->pbm_A;
1054 pbm->name = dp->full_name; 1053 pbm->name = dp->full_name;
@@ -1061,38 +1060,7 @@ static void sabre_pbm_init(struct pci_controller_info *p, struct device_node *dp
1061 pbm->pci_first_busno = p->pci_first_busno; 1060 pbm->pci_first_busno = p->pci_first_busno;
1062 pbm->pci_last_busno = p->pci_last_busno; 1061 pbm->pci_last_busno = p->pci_last_busno;
1063 1062
1064 pbm->io_space.name = pbm->mem_space.name = pbm->name; 1063 pci_determine_mem_io_space(pbm);
1065
1066 pbm->io_space.start = p->pbm_A.controller_regs + SABRE_IOSPACE;
1067 pbm->io_space.end = pbm->io_space.start + (1UL << 24) - 1UL;
1068 pbm->io_space.flags = IORESOURCE_IO;
1069
1070 pbm->mem_space.start = (p->pbm_A.controller_regs + SABRE_MEMSPACE);
1071 pbm->mem_space.end = (pbm->mem_space.start + ((1UL << 32UL) - 1UL));
1072 pbm->mem_space.flags = IORESOURCE_MEM;
1073
1074 if (request_resource(&ioport_resource, &pbm->io_space) < 0) {
1075 prom_printf("Cannot register Sabre's IO space.\n");
1076 prom_halt();
1077 }
1078 if (request_resource(&iomem_resource, &pbm->mem_space) < 0) {
1079 prom_printf("Cannot register Sabre's MEM space.\n");
1080 prom_halt();
1081 }
1082
1083 rp = kmalloc(sizeof(*rp), GFP_KERNEL);
1084 if (!rp) {
1085 prom_printf("Cannot allocate IOMMU resource.\n");
1086 prom_halt();
1087 }
1088 rp->name = "IOMMU";
1089 rp->start = pbm->mem_space.start + (unsigned long) dma_start;
1090 rp->end = pbm->mem_space.start + (unsigned long) dma_end - 1UL;
1091 rp->flags = IORESOURCE_BUSY;
1092 request_resource(&pbm->mem_space, rp);
1093
1094 pci_register_legacy_regions(&pbm->io_space,
1095 &pbm->mem_space);
1096} 1064}
1097 1065
1098void sabre_init(struct device_node *dp, char *model_name) 1066void sabre_init(struct device_node *dp, char *model_name)
@@ -1212,5 +1180,5 @@ void sabre_init(struct device_node *dp, char *model_name)
1212 /* 1180 /*
1213 * Look for APB underneath. 1181 * Look for APB underneath.
1214 */ 1182 */
1215 sabre_pbm_init(p, dp, vdma[0], vdma[0] + vdma[1]); 1183 sabre_pbm_init(p, dp);
1216} 1184}
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 332cfd9736b7..79ad2688317b 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -1,7 +1,6 @@
1/* $Id: pci_schizo.c,v 1.24 2002/01/23 11:27:32 davem Exp $ 1/* pci_schizo.c: SCHIZO/TOMATILLO specific PCI controller support.
2 * pci_schizo.c: SCHIZO/TOMATILLO specific PCI controller support.
3 * 2 *
4 * Copyright (C) 2001, 2002, 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2001, 2002, 2003, 2007 David S. Miller (davem@davemloft.net)
5 */ 4 */
6 5
7#include <linux/kernel.h> 6#include <linux/kernel.h>
@@ -1304,79 +1303,6 @@ static void schizo_resource_adjust(struct pci_dev *pdev,
1304 res->end += root->start; 1303 res->end += root->start;
1305} 1304}
1306 1305
1307/* Use ranges property to determine where PCI MEM, I/O, and Config
1308 * space are for this PCI bus module.
1309 */
1310static void schizo_determine_mem_io_space(struct pci_pbm_info *pbm)
1311{
1312 int i, saw_cfg, saw_mem, saw_io;
1313
1314 saw_cfg = saw_mem = saw_io = 0;
1315 for (i = 0; i < pbm->num_pbm_ranges; i++) {
1316 struct linux_prom_pci_ranges *pr = &pbm->pbm_ranges[i];
1317 unsigned long a;
1318 int type;
1319
1320 type = (pr->child_phys_hi >> 24) & 0x3;
1321 a = (((unsigned long)pr->parent_phys_hi << 32UL) |
1322 ((unsigned long)pr->parent_phys_lo << 0UL));
1323
1324 switch (type) {
1325 case 0:
1326 /* PCI config space, 16MB */
1327 pbm->config_space = a;
1328 saw_cfg = 1;
1329 break;
1330
1331 case 1:
1332 /* 16-bit IO space, 16MB */
1333 pbm->io_space.start = a;
1334 pbm->io_space.end = a + ((16UL*1024UL*1024UL) - 1UL);
1335 pbm->io_space.flags = IORESOURCE_IO;
1336 saw_io = 1;
1337 break;
1338
1339 case 2:
1340 /* 32-bit MEM space, 2GB */
1341 pbm->mem_space.start = a;
1342 pbm->mem_space.end = a + (0x80000000UL - 1UL);
1343 pbm->mem_space.flags = IORESOURCE_MEM;
1344 saw_mem = 1;
1345 break;
1346
1347 default:
1348 break;
1349 };
1350 }
1351
1352 if (!saw_cfg || !saw_io || !saw_mem) {
1353 prom_printf("%s: Fatal error, missing %s PBM range.\n",
1354 pbm->name,
1355 ((!saw_cfg ?
1356 "CFG" :
1357 (!saw_io ?
1358 "IO" : "MEM"))));
1359 prom_halt();
1360 }
1361
1362 printk("%s: PCI CFG[%lx] IO[%lx] MEM[%lx]\n",
1363 pbm->name,
1364 pbm->config_space,
1365 pbm->io_space.start,
1366 pbm->mem_space.start);
1367}
1368
1369static void pbm_register_toplevel_resources(struct pci_controller_info *p,
1370 struct pci_pbm_info *pbm)
1371{
1372 pbm->io_space.name = pbm->mem_space.name = pbm->name;
1373
1374 request_resource(&ioport_resource, &pbm->io_space);
1375 request_resource(&iomem_resource, &pbm->mem_space);
1376 pci_register_legacy_regions(&pbm->io_space,
1377 &pbm->mem_space);
1378}
1379
1380#define SCHIZO_STRBUF_CONTROL (0x02800UL) 1306#define SCHIZO_STRBUF_CONTROL (0x02800UL)
1381#define SCHIZO_STRBUF_FLUSH (0x02808UL) 1307#define SCHIZO_STRBUF_FLUSH (0x02808UL)
1382#define SCHIZO_STRBUF_FSYNC (0x02810UL) 1308#define SCHIZO_STRBUF_FSYNC (0x02810UL)
@@ -1679,8 +1605,7 @@ static void schizo_pbm_init(struct pci_controller_info *p,
1679 pbm->num_pbm_ranges = 1605 pbm->num_pbm_ranges =
1680 (len / sizeof(struct linux_prom_pci_ranges)); 1606 (len / sizeof(struct linux_prom_pci_ranges));
1681 1607
1682 schizo_determine_mem_io_space(pbm); 1608 pci_determine_mem_io_space(pbm);
1683 pbm_register_toplevel_resources(p, pbm);
1684 1609
1685 pbm->pbm_intmap = of_get_property(dp, "interrupt-map", &len); 1610 pbm->pbm_intmap = of_get_property(dp, "interrupt-map", &len);
1686 if (pbm->pbm_intmap) { 1611 if (pbm->pbm_intmap) {
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c
index eec7def379dc..e1af009617cf 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc64/kernel/pci_sun4v.c
@@ -1,6 +1,6 @@
1/* pci_sun4v.c: SUN4V specific PCI controller support. 1/* pci_sun4v.c: SUN4V specific PCI controller support.
2 * 2 *
3 * Copyright (C) 2006 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 2006, 2007 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#include <linux/kernel.h> 6#include <linux/kernel.h>
@@ -751,72 +751,6 @@ static void pci_sun4v_resource_adjust(struct pci_dev *pdev,
751 res->end += root->start; 751 res->end += root->start;
752} 752}
753 753
754/* Use ranges property to determine where PCI MEM, I/O, and Config
755 * space are for this PCI bus module.
756 */
757static void pci_sun4v_determine_mem_io_space(struct pci_pbm_info *pbm)
758{
759 int i, saw_mem, saw_io;
760
761 saw_mem = saw_io = 0;
762 for (i = 0; i < pbm->num_pbm_ranges; i++) {
763 struct linux_prom_pci_ranges *pr = &pbm->pbm_ranges[i];
764 unsigned long a;
765 int type;
766
767 type = (pr->child_phys_hi >> 24) & 0x3;
768 a = (((unsigned long)pr->parent_phys_hi << 32UL) |
769 ((unsigned long)pr->parent_phys_lo << 0UL));
770
771 switch (type) {
772 case 1:
773 /* 16-bit IO space, 16MB */
774 pbm->io_space.start = a;
775 pbm->io_space.end = a + ((16UL*1024UL*1024UL) - 1UL);
776 pbm->io_space.flags = IORESOURCE_IO;
777 saw_io = 1;
778 break;
779
780 case 2:
781 /* 32-bit MEM space, 2GB */
782 pbm->mem_space.start = a;
783 pbm->mem_space.end = a + (0x80000000UL - 1UL);
784 pbm->mem_space.flags = IORESOURCE_MEM;
785 saw_mem = 1;
786 break;
787
788 case 3:
789 /* XXX 64-bit MEM handling XXX */
790
791 default:
792 break;
793 };
794 }
795
796 if (!saw_io || !saw_mem) {
797 prom_printf("%s: Fatal error, missing %s PBM range.\n",
798 pbm->name,
799 (!saw_io ? "IO" : "MEM"));
800 prom_halt();
801 }
802
803 printk("%s: PCI IO[%lx] MEM[%lx]\n",
804 pbm->name,
805 pbm->io_space.start,
806 pbm->mem_space.start);
807}
808
809static void pbm_register_toplevel_resources(struct pci_controller_info *p,
810 struct pci_pbm_info *pbm)
811{
812 pbm->io_space.name = pbm->mem_space.name = pbm->name;
813
814 request_resource(&ioport_resource, &pbm->io_space);
815 request_resource(&iomem_resource, &pbm->mem_space);
816 pci_register_legacy_regions(&pbm->io_space,
817 &pbm->mem_space);
818}
819
820static unsigned long probe_existing_entries(struct pci_pbm_info *pbm, 754static unsigned long probe_existing_entries(struct pci_pbm_info *pbm,
821 struct pci_iommu *iommu) 755 struct pci_iommu *iommu)
822{ 756{
@@ -1396,8 +1330,7 @@ static void pci_sun4v_pbm_init(struct pci_controller_info *p, struct device_node
1396 for (i = 0; i < pbm->num_pbm_ranges; i++) 1330 for (i = 0; i < pbm->num_pbm_ranges; i++)
1397 pbm->pbm_ranges[i].parent_phys_hi &= 0x0fffffff; 1331 pbm->pbm_ranges[i].parent_phys_hi &= 0x0fffffff;
1398 1332
1399 pci_sun4v_determine_mem_io_space(pbm); 1333 pci_determine_mem_io_space(pbm);
1400 pbm_register_toplevel_resources(p, pbm);
1401 1334
1402 prop = of_find_property(dp, "interrupt-map", &len); 1335 prop = of_find_property(dp, "interrupt-map", &len);
1403 pbm->pbm_intmap = prop->value; 1336 pbm->pbm_intmap = prop->value;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 10:28:30 -0500