aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c59
-rw-r--r--include/asm-sh/irq-sh73180.h36
-rw-r--r--include/asm-sh/irq-sh7780.h23
-rw-r--r--include/asm-sh/irq.h10
4 files changed, 38 insertions, 90 deletions
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index fdbd718ae5c6..e55150ed0856 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -108,8 +108,7 @@ static void end_ipr_irq(unsigned int irq)
108 enable_ipr_irq(irq); 108 enable_ipr_irq(irq);
109} 109}
110 110
111void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, 111void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
112 int priority, int maskpos)
113{ 112{
114 disable_irq_nosync(irq); 113 disable_irq_nosync(irq);
115 ipr_data[irq].addr = addr; 114 ipr_data[irq].addr = addr;
@@ -123,44 +122,44 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos,
123void __init init_IRQ(void) 122void __init init_IRQ(void)
124{ 123{
125#ifndef CONFIG_CPU_SUBTYPE_SH7780 124#ifndef CONFIG_CPU_SUBTYPE_SH7780
126 make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY, 0); 125 make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
127 make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY, 0); 126 make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY);
128#if defined(CONFIG_SH_RTC) 127#if defined(CONFIG_SH_RTC)
129 make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY, 0); 128 make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
130#endif 129#endif
131 130
132#ifdef SCI_ERI_IRQ 131#ifdef SCI_ERI_IRQ
133 make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0); 132 make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
134 make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0); 133 make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
135 make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0); 134 make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
136#endif 135#endif
137 136
138#ifdef SCIF1_ERI_IRQ 137#ifdef SCIF1_ERI_IRQ
139 make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); 138 make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
140 make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); 139 make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
141 make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); 140 make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
142 make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); 141 make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
143#endif 142#endif
144 143
145#if defined(CONFIG_CPU_SUBTYPE_SH7300) 144#if defined(CONFIG_CPU_SUBTYPE_SH7300)
146 make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY, 0); 145 make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY);
147 make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY, 0); 146 make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
148 make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY, 0); 147 make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
149 make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY, 0); 148 make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
150#endif 149#endif
151 150
152#ifdef SCIF_ERI_IRQ 151#ifdef SCIF_ERI_IRQ
153 make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); 152 make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
154 make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); 153 make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
155 make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); 154 make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
156 make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); 155 make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
157#endif 156#endif
158 157
159#ifdef IRDA_ERI_IRQ 158#ifdef IRDA_ERI_IRQ
160 make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); 159 make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
161 make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); 160 make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
162 make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); 161 make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
163 make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); 162 make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
164#endif 163#endif
165 164
166#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 165#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
@@ -175,12 +174,12 @@ void __init init_IRQ(void)
175 * You should set corresponding bits of PFC to "00" 174 * You should set corresponding bits of PFC to "00"
176 * to enable these interrupts. 175 * to enable these interrupts.
177 */ 176 */
178 make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY, 0); 177 make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY);
179 make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY, 0); 178 make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY);
180 make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY, 0); 179 make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY);
181 make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY, 0); 180 make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY);
182 make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY, 0); 181 make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY);
183 make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY, 0); 182 make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY);
184#endif 183#endif
185#endif 184#endif
186 185
diff --git a/include/asm-sh/irq-sh73180.h b/include/asm-sh/irq-sh73180.h
index bf2e4310ffac..d705252be260 100644
--- a/include/asm-sh/irq-sh73180.h
+++ b/include/asm-sh/irq-sh73180.h
@@ -25,11 +25,6 @@
25#undef DMA_IPR_POS 25#undef DMA_IPR_POS
26#undef DMA_PRIORITY 26#undef DMA_PRIORITY
27 27
28#undef NR_IRQS
29
30#undef __irq_demux
31#undef irq_demux
32
33#undef INTC_IMCR0 28#undef INTC_IMCR0
34#undef INTC_IMCR1 29#undef INTC_IMCR1
35#undef INTC_IMCR2 30#undef INTC_IMCR2
@@ -229,33 +224,6 @@
229#define SIU_IPR_POS 1 224#define SIU_IPR_POS 1
230#define SIU_PRIORITY 3 225#define SIU_PRIORITY 3
231 226
232
233/* ONCHIP_NR_IRQS */
234#define NR_IRQS 109
235
236/* In a generic kernel, NR_IRQS is an upper bound, and we should use
237 * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value.
238 */
239#define ACTUAL_NR_IRQS NR_IRQS
240
241
242extern void disable_irq(unsigned int);
243extern void disable_irq_nosync(unsigned int);
244extern void enable_irq(unsigned int);
245
246/*
247 * Simple Mask Register Support
248 */
249extern void make_maskreg_irq(unsigned int irq);
250extern unsigned short *irq_mask_register;
251
252/*
253 * Function for "on chip support modules".
254 */
255extern void make_ipr_irq(unsigned int irq, unsigned int addr,
256 int pos, int priority);
257extern void make_imask_irq(unsigned int irq);
258
259#define PORT_PACR 0xA4050100UL 227#define PORT_PACR 0xA4050100UL
260#define PORT_PBCR 0xA4050102UL 228#define PORT_PBCR 0xA4050102UL
261#define PORT_PCCR 0xA4050104UL 229#define PORT_PCCR 0xA4050104UL
@@ -343,8 +311,6 @@ extern void make_imask_irq(unsigned int irq);
343#define IRQ6_PRIORITY 1 311#define IRQ6_PRIORITY 1
344#define IRQ7_PRIORITY 1 312#define IRQ7_PRIORITY 1
345 313
346extern int shmse_irq_demux(int irq); 314int shmse_irq_demux(int irq);
347#define __irq_demux(irq) shmse_irq_demux(irq)
348#define irq_demux(irq) __irq_demux(irq)
349 315
350#endif /* __ASM_SH_IRQ_SH73180_H */ 316#endif /* __ASM_SH_IRQ_SH73180_H */
diff --git a/include/asm-sh/irq-sh7780.h b/include/asm-sh/irq-sh7780.h
index 8c8ca1281084..7f90315cd830 100644
--- a/include/asm-sh/irq-sh7780.h
+++ b/include/asm-sh/irq-sh7780.h
@@ -299,29 +299,6 @@
299#define GPIO_IPR_POS 2 299#define GPIO_IPR_POS 2
300#define GPIO_PRIORITY 3 300#define GPIO_PRIORITY 3
301 301
302/* ONCHIP_NR_IRQS */
303#define NR_IRQS 150 /* 111 + 16 */
304
305/* In a generic kernel, NR_IRQS is an upper bound, and we should use
306 * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value.
307 */
308#define ACTUAL_NR_IRQS NR_IRQS
309
310extern void disable_irq(unsigned int);
311extern void disable_irq_nosync(unsigned int);
312extern void enable_irq(unsigned int);
313
314/*
315 * Simple Mask Register Support
316 */
317extern void make_maskreg_irq(unsigned int irq);
318extern unsigned short *irq_mask_register;
319
320/*
321 * Function for "on chip support modules".
322 */
323extern void make_imask_irq(unsigned int irq);
324
325#define INTC_TMU0_MSK 0 302#define INTC_TMU0_MSK 0
326#define INTC_TMU3_MSK 1 303#define INTC_TMU3_MSK 1
327#define INTC_RTC_MSK 2 304#define INTC_RTC_MSK 2
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h
index 060ec3c27207..42b8394c04ed 100644
--- a/include/asm-sh/irq.h
+++ b/include/asm-sh/irq.h
@@ -245,6 +245,7 @@
245#endif /* ST40STB1 */ 245#endif /* ST40STB1 */
246 246
247#endif /* 775x / SH4-202 / ST40STB1 */ 247#endif /* 775x / SH4-202 / ST40STB1 */
248#endif /* 7780 */
248 249
249/* NR_IRQS is made from three components: 250/* NR_IRQS is made from three components:
250 * 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules 251 * 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules
@@ -274,8 +275,11 @@
274# define ONCHIP_NR_IRQS 72 275# define ONCHIP_NR_IRQS 72
275#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) 276#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
276# define ONCHIP_NR_IRQS 144 277# define ONCHIP_NR_IRQS 144
277#elif defined(CONFIG_CPU_SUBTYPE_SH7300) 278#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \
279 defined(CONFIG_CPU_SUBTYPE_SH73180)
278# define ONCHIP_NR_IRQS 109 280# define ONCHIP_NR_IRQS 109
281#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
282# define ONCHIP_NR_IRQS 111
279#elif defined(CONFIG_SH_UNKNOWN) /* Most be last */ 283#elif defined(CONFIG_SH_UNKNOWN) /* Most be last */
280# define ONCHIP_NR_IRQS 144 284# define ONCHIP_NR_IRQS 144
281#endif 285#endif
@@ -306,6 +310,8 @@
306# define OFFCHIP_NR_IRQS 96 310# define OFFCHIP_NR_IRQS 96
307#elif defined (CONFIG_SH_TITAN) 311#elif defined (CONFIG_SH_TITAN)
308# define OFFCHIP_NR_IRQS 4 312# define OFFCHIP_NR_IRQS 4
313#elif defined(CONFIG_SH_R7780RP)
314# define OFFCHIP_NR_IRQS 16
309#elif defined(CONFIG_SH_UNKNOWN) 315#elif defined(CONFIG_SH_UNKNOWN)
310# define OFFCHIP_NR_IRQS 16 /* Must also be last */ 316# define OFFCHIP_NR_IRQS 16 /* Must also be last */
311#else 317#else
@@ -550,7 +556,7 @@ extern int ipr_irq_demux(int irq);
550#define INTC_ICR_IRLM (1<<7) 556#define INTC_ICR_IRLM (1<<7)
551#endif 557#endif
552 558
553#else 559#ifdef CONFIG_CPU_SUBTYPE_SH7780
554#include <asm/irq-sh7780.h> 560#include <asm/irq-sh7780.h>
555#endif 561#endif
556 562
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 18:24:51 -0500