diff options
-rw-r--r-- | arch/m68knommu/platform/68360/config.c | 51 |
1 files changed, 16 insertions, 35 deletions
diff --git a/arch/m68knommu/platform/68360/config.c b/arch/m68knommu/platform/68360/config.c index 155b72fe2607..2b3196af811f 100644 --- a/arch/m68knommu/platform/68360/config.c +++ b/arch/m68knommu/platform/68360/config.c | |||
@@ -14,8 +14,6 @@ | |||
14 | #include <linux/types.h> | 14 | #include <linux/types.h> |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/mm.h> | 16 | #include <linux/mm.h> |
17 | #include <linux/tty.h> | ||
18 | #include <linux/console.h> | ||
19 | #include <linux/interrupt.h> | 17 | #include <linux/interrupt.h> |
20 | #include <linux/irq.h> | 18 | #include <linux/irq.h> |
21 | 19 | ||
@@ -40,8 +38,6 @@ extern void m360_cpm_reset(void); | |||
40 | 38 | ||
41 | unsigned long int system_clock; | 39 | unsigned long int system_clock; |
42 | 40 | ||
43 | void M68360_init_IRQ(void); | ||
44 | |||
45 | extern QUICC *pquicc; | 41 | extern QUICC *pquicc; |
46 | 42 | ||
47 | /* TODO DON"T Hard Code this */ | 43 | /* TODO DON"T Hard Code this */ |
@@ -49,14 +45,24 @@ extern QUICC *pquicc; | |||
49 | // unsigned int system_clock = 33000000l; | 45 | // unsigned int system_clock = 33000000l; |
50 | extern unsigned long int system_clock; //In kernel setup.c | 46 | extern unsigned long int system_clock; //In kernel setup.c |
51 | 47 | ||
52 | extern void config_M68360_irq(void); | 48 | |
49 | static irqreturn_t hw_tick(int irq, void *dummy) | ||
50 | { | ||
51 | /* Reset Timer1 */ | ||
52 | /* TSTAT &= 0; */ | ||
53 | |||
54 | pquicc->timer_ter1 = 0x0002; /* clear timer event */ | ||
55 | |||
56 | return arch_timer_interrupt(irq, dummy); | ||
57 | } | ||
53 | 58 | ||
54 | static struct irqaction m68360_timer_irq = { | 59 | static struct irqaction m68360_timer_irq = { |
55 | .name = "timer", | 60 | .name = "timer", |
56 | .flags = IRQF_DISABLED | IRQF_TIMER, | 61 | .flags = IRQF_DISABLED | IRQF_TIMER, |
62 | .handler = hw_tick, | ||
57 | }; | 63 | }; |
58 | 64 | ||
59 | void BSP_sched_init(irq_handler_t timer_routine) | 65 | void hw_timer_init(void) |
60 | { | 66 | { |
61 | unsigned char prescaler; | 67 | unsigned char prescaler; |
62 | unsigned short tgcr_save; | 68 | unsigned short tgcr_save; |
@@ -90,7 +96,6 @@ void BSP_sched_init(irq_handler_t timer_routine) | |||
90 | pquicc->timer_ter1 = 0x0003; /* clear timer events */ | 96 | pquicc->timer_ter1 = 0x0003; /* clear timer events */ |
91 | 97 | ||
92 | /* enable timer 1 interrupt in CIMR */ | 98 | /* enable timer 1 interrupt in CIMR */ |
93 | m68360_timer_irq.handler = timer_routine; | ||
94 | setup_irq(CPMVEC_TIMER1, &m68360_timer_irq); | 99 | setup_irq(CPMVEC_TIMER1, &m68360_timer_irq); |
95 | 100 | ||
96 | /* Start timer 1: */ | 101 | /* Start timer 1: */ |
@@ -98,16 +103,7 @@ void BSP_sched_init(irq_handler_t timer_routine) | |||
98 | pquicc->timer_tgcr = tgcr_save; | 103 | pquicc->timer_tgcr = tgcr_save; |
99 | } | 104 | } |
100 | 105 | ||
101 | 106 | unsigned long hw_timer_offset(void) | |
102 | void BSP_tick(void) | ||
103 | { | ||
104 | /* Reset Timer1 */ | ||
105 | /* TSTAT &= 0; */ | ||
106 | |||
107 | pquicc->timer_ter1 = 0x0002; /* clear timer event */ | ||
108 | } | ||
109 | |||
110 | unsigned long BSP_gettimeoffset (void) | ||
111 | { | 107 | { |
112 | return 0; | 108 | return 0; |
113 | } | 109 | } |
@@ -117,17 +113,7 @@ void BSP_gettod (int *yearp, int *monp, int *dayp, | |||
117 | { | 113 | { |
118 | } | 114 | } |
119 | 115 | ||
120 | int BSP_hwclk(int op, struct rtc_time *t) | 116 | int BSP_set_clock_mmss(unsigned long nowtime) |
121 | { | ||
122 | if (!op) { | ||
123 | /* read */ | ||
124 | } else { | ||
125 | /* write */ | ||
126 | } | ||
127 | return 0; | ||
128 | } | ||
129 | |||
130 | int BSP_set_clock_mmss (unsigned long nowtime) | ||
131 | { | 117 | { |
132 | #if 0 | 118 | #if 0 |
133 | short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; | 119 | short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; |
@@ -200,11 +186,6 @@ void config_BSP(char *command, int len) | |||
200 | scc1_hwaddr = "\00\01\02\03\04\05"; | 186 | scc1_hwaddr = "\00\01\02\03\04\05"; |
201 | #endif | 187 | #endif |
202 | 188 | ||
203 | mach_sched_init = BSP_sched_init; | ||
204 | mach_tick = BSP_tick; | ||
205 | mach_gettimeoffset = BSP_gettimeoffset; | ||
206 | mach_gettod = BSP_gettod; | 189 | mach_gettod = BSP_gettod; |
207 | mach_hwclk = NULL; | ||
208 | mach_set_clock_mmss = NULL; | ||
209 | mach_reset = BSP_reset; | 190 | mach_reset = BSP_reset; |
210 | } | 191 | } |