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-rw-r--r--arch/mips/Kconfig9
-rw-r--r--arch/mips/pci/ops-sni.c12
-rw-r--r--arch/mips/sni/Makefile1
-rw-r--r--arch/mips/sni/setup.c7
-rw-r--r--arch/mips/sni/sniprom.c158
-rw-r--r--include/asm-mips/mach-rm200/cpu-feature-overrides.h2
-rw-r--r--include/asm-mips/sni.h7
7 files changed, 177 insertions, 19 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 138aac48d5d4..ecf922e3dc62 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -693,8 +693,8 @@ config SIBYTE_CRHONE
693 693
694config SNI_RM200_PCI 694config SNI_RM200_PCI
695 bool "SNI RM200 PCI" 695 bool "SNI RM200 PCI"
696 select ARC 696 select ARC if CPU_LITTLE_ENDIAN
697 select ARC32 697 select ARC32 if CPU_LITTLE_ENDIAN
698 select ARCH_MAY_HAVE_PC_FDC 698 select ARCH_MAY_HAVE_PC_FDC
699 select BOOT_ELF32 699 select BOOT_ELF32
700 select DMA_NONCOHERENT 700 select DMA_NONCOHERENT
@@ -705,10 +705,13 @@ config SNI_RM200_PCI
705 select I8253 705 select I8253
706 select I8259 706 select I8259
707 select ISA 707 select ISA
708 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
708 select SYS_HAS_CPU_R4X00 709 select SYS_HAS_CPU_R4X00
710 select SYS_HAS_CPU_R5000
711 select R5000_CPU_SCACHE
709 select SYS_SUPPORTS_32BIT_KERNEL 712 select SYS_SUPPORTS_32BIT_KERNEL
710 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 713 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
711 select SYS_SUPPORTS_BIG_ENDIAN if EXPERIMENTAL 714 select SYS_SUPPORTS_BIG_ENDIAN
712 select SYS_SUPPORTS_HIGHMEM 715 select SYS_SUPPORTS_HIGHMEM
713 select SYS_SUPPORTS_LITTLE_ENDIAN 716 select SYS_SUPPORTS_LITTLE_ENDIAN
714 help 717 help
diff --git a/arch/mips/pci/ops-sni.c b/arch/mips/pci/ops-sni.c
index 62bdd19c7f8e..2b0ccd6d9dcd 100644
--- a/arch/mips/pci/ops-sni.c
+++ b/arch/mips/pci/ops-sni.c
@@ -47,13 +47,13 @@ static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg,
47 47
48 switch (size) { 48 switch (size) {
49 case 1: 49 case 1:
50 *val = *(volatile u8 *) (PCIMT_CONFIG_DATA + (reg & 3)); 50 *val = inb(PCIMT_CONFIG_DATA + (reg & 3));
51 break; 51 break;
52 case 2: 52 case 2:
53 *val = *(volatile u16 *) (PCIMT_CONFIG_DATA + (reg & 2)); 53 *val = inw(PCIMT_CONFIG_DATA + (reg & 2));
54 break; 54 break;
55 case 4: 55 case 4:
56 *val = *(volatile u32 *) PCIMT_CONFIG_DATA; 56 *val = inl(PCIMT_CONFIG_DATA);
57 break; 57 break;
58 } 58 }
59 59
@@ -70,13 +70,13 @@ static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg,
70 70
71 switch (size) { 71 switch (size) {
72 case 1: 72 case 1:
73 *(volatile u8 *) (PCIMT_CONFIG_DATA + (reg & 3)) = val; 73 outb (val, PCIMT_CONFIG_DATA + (reg & 3));
74 break; 74 break;
75 case 2: 75 case 2:
76 *(volatile u16 *) (PCIMT_CONFIG_DATA + (reg & 2)) = val; 76 outw (val, PCIMT_CONFIG_DATA + (reg & 2));
77 break; 77 break;
78 case 4: 78 case 4:
79 *(volatile u32 *) PCIMT_CONFIG_DATA = val; 79 outl (val, PCIMT_CONFIG_DATA);
80 break; 80 break;
81 } 81 }
82 82
diff --git a/arch/mips/sni/Makefile b/arch/mips/sni/Makefile
index 9c7eaa5fb210..a5eb0adb87c7 100644
--- a/arch/mips/sni/Makefile
+++ b/arch/mips/sni/Makefile
@@ -3,5 +3,6 @@
3# 3#
4 4
5obj-y += irq.o pcimt_scache.o reset.o setup.o 5obj-y += irq.o pcimt_scache.o reset.o setup.o
6obj-$(CONFIG_CPU_BIG_ENDIAN) += sniprom.o
6 7
7EXTRA_AFLAGS := $(CFLAGS) 8EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 635b904cabd7..a050bb6ae704 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -21,8 +21,11 @@
21#include <linux/fb.h> 21#include <linux/fb.h>
22#include <linux/tty.h> 22#include <linux/tty.h>
23 23
24#ifdef CONFIG_ARC
24#include <asm/arc/types.h> 25#include <asm/arc/types.h>
25#include <asm/sgialib.h> 26#include <asm/sgialib.h>
27#endif
28
26#include <asm/bcache.h> 29#include <asm/bcache.h>
27#include <asm/bootinfo.h> 30#include <asm/bootinfo.h>
28#include <asm/io.h> 31#include <asm/io.h>
@@ -72,8 +75,7 @@ static inline void sni_pcimt_detect(void)
72 75
73static void __init sni_display_setup(void) 76static void __init sni_display_setup(void)
74{ 77{
75#ifdef CONFIG_VT 78#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) && defined(CONFIG_ARC)
76#if defined(CONFIG_VGA_CONSOLE)
77 struct screen_info *si = &screen_info; 79 struct screen_info *si = &screen_info;
78 DISPLAY_STATUS *di; 80 DISPLAY_STATUS *di;
79 81
@@ -88,7 +90,6 @@ static void __init sni_display_setup(void)
88 si->orig_video_points = 16; 90 si->orig_video_points = 16;
89 } 91 }
90#endif 92#endif
91#endif
92} 93}
93 94
94static struct resource sni_io_resource = { 95static struct resource sni_io_resource = {
diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c
new file mode 100644
index 000000000000..d1d0f1f493b4
--- /dev/null
+++ b/arch/mips/sni/sniprom.c
@@ -0,0 +1,158 @@
1/*
2 * Big Endian PROM code for SNI RM machines
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2005-2006 Florian Lohoff (flo@rfc822.org)
9 * Copyright (C) 2005-2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/string.h>
15
16#include <asm/addrspace.h>
17#include <asm/sni.h>
18#include <asm/mipsprom.h>
19#include <asm/bootinfo.h>
20
21/* special SNI prom calls */
22/*
23 * This does not exist in all proms - SINIX compares
24 * the prom env variable "version" against "2.0008"
25 * or greater. If lesser it tries to probe interesting
26 * registers
27 */
28#define PROM_GET_MEMCONF 58
29
30#define PROM_VEC (u64 *)CKSEG1ADDR(0x1fc00000)
31#define PROM_ENTRY(x) (PROM_VEC + (x))
32
33
34#undef DEBUG
35#ifdef DEBUG
36#define DBG_PRINTF(x...) prom_printf(x)
37#else
38#define DBG_PRINTF(x...)
39#endif
40
41static int *(*__prom_putchar)(int) = (int *(*)(int))PROM_ENTRY(PROM_PUTCHAR);
42static char *(*__prom_getenv)(char *) = (char *(*)(char *))PROM_ENTRY(PROM_GETENV);
43static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF);
44
45char *prom_getenv (char *s)
46{
47 return __prom_getenv(s);
48}
49
50void prom_printf(char *fmt, ...)
51{
52 va_list args;
53 char ppbuf[1024];
54 char *bptr;
55
56 va_start(args, fmt);
57 vsprintf(ppbuf, fmt, args);
58
59 bptr = ppbuf;
60
61 while (*bptr != 0) {
62 if (*bptr == '\n')
63 __prom_putchar('\r');
64
65 __prom_putchar(*bptr++);
66 }
67 va_end(args);
68}
69
70unsigned long prom_free_prom_memory(void)
71{
72 return 0;
73}
74
75/*
76 * /proc/cpuinfo system type
77 *
78 */
79static const char *systype = "Unknown";
80const char *get_system_type(void)
81{
82 return systype;
83}
84
85#define SNI_IDPROM_BASE 0xbff00000
86#define SNI_IDPROM_MEMSIZE (SNI_IDPROM_BASE+0x28) /* Memsize in 16MB quantities */
87#define SNI_IDPROM_BRDTYPE (SNI_IDPROM_BASE+0x29) /* Board Type */
88#define SNI_IDPROM_CPUTYPE (SNI_IDPROM_BASE+0x30) /* CPU Type */
89
90#define SNI_IDPROM_SIZE 0x1000
91
92#ifdef DEBUG
93static void sni_idprom_dump(void)
94{
95 int i;
96
97 prom_printf("SNI IDProm dump (first 128byte):\n");
98 for(i=0;i<128;i++) {
99 if (i%16 == 0)
100 prom_printf("%04x ", i);
101
102 prom_printf("%02x ", *(unsigned char *) (SNI_IDPROM_BASE+i));
103
104 if (i%16 == 15)
105 prom_printf("\n");
106 }
107}
108#endif
109
110static void sni_mem_init(void )
111{
112 int i, memsize;
113 struct membank {
114 u32 size;
115 u32 base;
116 u32 size2;
117 u32 pad1;
118 u32 pad2;
119 } memconf[8];
120
121 /* MemSIZE from prom in 16MByte chunks */
122 memsize=*((unsigned char *) SNI_IDPROM_MEMSIZE) * 16;
123
124 DBG_PRINTF("IDProm memsize: %lu MByte\n", memsize);
125
126 /* get memory bank layout from prom */
127 __prom_get_memconf(&memconf);
128
129 DBG_PRINTF("prom_get_mem_conf memory configuration:\n");
130 for(i=0;i<8 && memconf[i].size;i++) {
131 prom_printf("Bank%d: %08x @ %08x\n", i,
132 memconf[i].size, memconf[i].base);
133 add_memory_region(memconf[i].base, memconf[i].size, BOOT_MEM_RAM);
134 }
135}
136
137void __init prom_init(void)
138{
139 int argc = fw_arg0;
140 char **argv = (void *)fw_arg1;
141 unsigned int sni_brd_type = *(unsigned char *) SNI_IDPROM_BRDTYPE;
142 int i;
143
144 DBG_PRINTF("Found SNI brdtype %02x\n", sni_brd_type);
145
146#ifdef DEBUG
147 sni_idprom_dump();
148#endif
149 sni_mem_init();
150
151 /* copy prom cmdline parameters to kernel cmdline */
152 for (i = 1; i < argc; i++) {
153 strcat(arcs_cmdline, argv[i]);
154 if (i < (argc - 1))
155 strcat(arcs_cmdline, " ");
156 }
157}
158
diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
index 91e7cf5f2bfe..01587832bc9c 100644
--- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
@@ -35,10 +35,8 @@
35#define cpu_has_nofpuex 0 35#define cpu_has_nofpuex 0
36#define cpu_has_64bits 1 36#define cpu_has_64bits 1
37 37
38#define cpu_has_subset_pcaches 0 /* No S-cache on R5000 I think ... */
39#define cpu_dcache_line_size() 32 38#define cpu_dcache_line_size() 32
40#define cpu_icache_line_size() 32 39#define cpu_icache_line_size() 32
41#define cpu_scache_line_size() 0 /* No S-cache on R5000 I think ... */
42 40
43#define cpu_has_mips32r1 0 41#define cpu_has_mips32r1 0
44#define cpu_has_mips32r2 0 42#define cpu_has_mips32r2 0
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h
index b3bc698dfdee..b9ba54d0dd35 100644
--- a/include/asm-mips/sni.h
+++ b/include/asm-mips/sni.h
@@ -15,9 +15,6 @@
15/* 15/*
16 * ASIC PCI registers for little endian configuration. 16 * ASIC PCI registers for little endian configuration.
17 */ 17 */
18#ifndef __MIPSEL__
19#error "Fix me for big endian"
20#endif
21#define PCIMT_UCONF 0xbfff0000 18#define PCIMT_UCONF 0xbfff0000
22#define PCIMT_IOADTIMEOUT2 0xbfff0008 19#define PCIMT_IOADTIMEOUT2 0xbfff0008
23#define PCIMT_IOMEMCONF 0xbfff0010 20#define PCIMT_IOMEMCONF 0xbfff0010
@@ -51,9 +48,9 @@
51#define PCIMT_PCI_CONF 0xbfff0100 48#define PCIMT_PCI_CONF 0xbfff0100
52 49
53/* 50/*
54 * Data port for the PCI bus. 51 * Data port for the PCI bus in IO space
55 */ 52 */
56#define PCIMT_CONFIG_DATA 0xb4000cfc 53#define PCIMT_CONFIG_DATA 0x0cfc
57 54
58/* 55/*
59 * Board specific registers 56 * Board specific registers