diff options
| -rw-r--r-- | arch/mips/pci/fixup-tb0226.c | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c index 61513d5d97da..b5d42b12de10 100644 --- a/arch/mips/pci/fixup-tb0226.c +++ b/arch/mips/pci/fixup-tb0226.c | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups. | 2 | * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups. |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> | 4 | * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> |
| 5 | * | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
| @@ -20,6 +20,7 @@ | |||
| 20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
| 21 | #include <linux/pci.h> | 21 | #include <linux/pci.h> |
| 22 | 22 | ||
| 23 | #include <asm/vr41xx/giu.h> | ||
| 23 | #include <asm/vr41xx/tb0226.h> | 24 | #include <asm/vr41xx/tb0226.h> |
| 24 | 25 | ||
| 25 | int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | 26 | int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| @@ -29,42 +30,42 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | |||
| 29 | switch (slot) { | 30 | switch (slot) { |
| 30 | case 12: | 31 | case 12: |
| 31 | vr41xx_set_irq_trigger(GD82559_1_PIN, | 32 | vr41xx_set_irq_trigger(GD82559_1_PIN, |
| 32 | TRIGGER_LEVEL, | 33 | IRQ_TRIGGER_LEVEL, |
| 33 | SIGNAL_THROUGH); | 34 | IRQ_SIGNAL_THROUGH); |
| 34 | vr41xx_set_irq_level(GD82559_1_PIN, LEVEL_LOW); | 35 | vr41xx_set_irq_level(GD82559_1_PIN, IRQ_LEVEL_LOW); |
| 35 | irq = GD82559_1_IRQ; | 36 | irq = GD82559_1_IRQ; |
| 36 | break; | 37 | break; |
| 37 | case 13: | 38 | case 13: |
| 38 | vr41xx_set_irq_trigger(GD82559_2_PIN, | 39 | vr41xx_set_irq_trigger(GD82559_2_PIN, |
| 39 | TRIGGER_LEVEL, | 40 | IRQ_TRIGGER_LEVEL, |
| 40 | SIGNAL_THROUGH); | 41 | IRQ_SIGNAL_THROUGH); |
| 41 | vr41xx_set_irq_level(GD82559_2_PIN, LEVEL_LOW); | 42 | vr41xx_set_irq_level(GD82559_2_PIN, IRQ_LEVEL_LOW); |
| 42 | irq = GD82559_2_IRQ; | 43 | irq = GD82559_2_IRQ; |
| 43 | break; | 44 | break; |
| 44 | case 14: | 45 | case 14: |
| 45 | switch (pin) { | 46 | switch (pin) { |
| 46 | case 1: | 47 | case 1: |
| 47 | vr41xx_set_irq_trigger(UPD720100_INTA_PIN, | 48 | vr41xx_set_irq_trigger(UPD720100_INTA_PIN, |
| 48 | TRIGGER_LEVEL, | 49 | IRQ_TRIGGER_LEVEL, |
| 49 | SIGNAL_THROUGH); | 50 | IRQ_SIGNAL_THROUGH); |
| 50 | vr41xx_set_irq_level(UPD720100_INTA_PIN, | 51 | vr41xx_set_irq_level(UPD720100_INTA_PIN, |
| 51 | LEVEL_LOW); | 52 | IRQ_LEVEL_LOW); |
| 52 | irq = UPD720100_INTA_IRQ; | 53 | irq = UPD720100_INTA_IRQ; |
| 53 | break; | 54 | break; |
| 54 | case 2: | 55 | case 2: |
| 55 | vr41xx_set_irq_trigger(UPD720100_INTB_PIN, | 56 | vr41xx_set_irq_trigger(UPD720100_INTB_PIN, |
| 56 | TRIGGER_LEVEL, | 57 | IRQ_TRIGGER_LEVEL, |
| 57 | SIGNAL_THROUGH); | 58 | IRQ_SIGNAL_THROUGH); |
| 58 | vr41xx_set_irq_level(UPD720100_INTB_PIN, | 59 | vr41xx_set_irq_level(UPD720100_INTB_PIN, |
| 59 | LEVEL_LOW); | 60 | IRQ_LEVEL_LOW); |
| 60 | irq = UPD720100_INTB_IRQ; | 61 | irq = UPD720100_INTB_IRQ; |
| 61 | break; | 62 | break; |
| 62 | case 3: | 63 | case 3: |
| 63 | vr41xx_set_irq_trigger(UPD720100_INTC_PIN, | 64 | vr41xx_set_irq_trigger(UPD720100_INTC_PIN, |
| 64 | TRIGGER_LEVEL, | 65 | IRQ_TRIGGER_LEVEL, |
| 65 | SIGNAL_THROUGH); | 66 | IRQ_SIGNAL_THROUGH); |
| 66 | vr41xx_set_irq_level(UPD720100_INTC_PIN, | 67 | vr41xx_set_irq_level(UPD720100_INTC_PIN, |
| 67 | LEVEL_LOW); | 68 | IRQ_LEVEL_LOW); |
| 68 | irq = UPD720100_INTC_IRQ; | 69 | irq = UPD720100_INTC_IRQ; |
| 69 | break; | 70 | break; |
| 70 | default: | 71 | default: |