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-rw-r--r--drivers/media/video/mt9v011.c53
1 files changed, 51 insertions, 2 deletions
diff --git a/drivers/media/video/mt9v011.c b/drivers/media/video/mt9v011.c
index 8de1316a276d..cc85f77a5706 100644
--- a/drivers/media/video/mt9v011.c
+++ b/drivers/media/video/mt9v011.c
@@ -52,13 +52,34 @@ static struct v4l2_queryctrl mt9v011_qctrl[] = {
52 .step = 1, 52 .step = 1,
53 .default_value = 0, 53 .default_value = 0,
54 .flags = 0, 54 .flags = 0,
55 }, 55 }, {
56 .id = V4L2_CID_HFLIP,
57 .type = V4L2_CTRL_TYPE_BOOLEAN,
58 .name = "Mirror",
59 .minimum = 0,
60 .maximum = 1,
61 .step = 1,
62 .default_value = 0,
63 .flags = 0,
64 }, {
65 .id = V4L2_CID_VFLIP,
66 .type = V4L2_CTRL_TYPE_BOOLEAN,
67 .name = "Vflip",
68 .minimum = 0,
69 .maximum = 1,
70 .step = 1,
71 .default_value = 0,
72 .flags = 0,
73 }, {
74 }
56}; 75};
57 76
58struct mt9v011 { 77struct mt9v011 {
59 struct v4l2_subdev sd; 78 struct v4l2_subdev sd;
60 unsigned width, height; 79 unsigned width, height;
61 unsigned xtal; 80 unsigned xtal;
81 unsigned hflip:1;
82 unsigned vflip:1;
62 83
63 u16 global_gain, red_bal, blue_bal; 84 u16 global_gain, red_bal, blue_bal;
64}; 85};
@@ -131,7 +152,6 @@ static const struct i2c_reg_value mt9v011_init_default[] = {
131 152
132 { R0A_MT9V011_CLK_SPEED, 0x0000 }, 153 { R0A_MT9V011_CLK_SPEED, 0x0000 },
133 { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 }, 154 { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
134 { R20_MT9V011_READ_MODE, 0x1000 },
135 155
136 { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */ 156 { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
137}; 157};
@@ -255,6 +275,20 @@ static void set_res(struct v4l2_subdev *sd)
255 calc_fps(sd, NULL, NULL); 275 calc_fps(sd, NULL, NULL);
256}; 276};
257 277
278static void set_read_mode(struct v4l2_subdev *sd)
279{
280 struct mt9v011 *core = to_mt9v011(sd);
281 unsigned mode = 0x1000;
282
283 if (core->hflip)
284 mode |= 0x4000;
285
286 if (core->vflip)
287 mode |= 0x8000;
288
289 mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
290}
291
258static int mt9v011_reset(struct v4l2_subdev *sd, u32 val) 292static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
259{ 293{
260 int i; 294 int i;
@@ -265,6 +299,7 @@ static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
265 299
266 set_balance(sd); 300 set_balance(sd);
267 set_res(sd); 301 set_res(sd);
302 set_read_mode(sd);
268 303
269 return 0; 304 return 0;
270}; 305};
@@ -285,6 +320,12 @@ static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
285 case V4L2_CID_BLUE_BALANCE: 320 case V4L2_CID_BLUE_BALANCE:
286 ctrl->value = core->blue_bal; 321 ctrl->value = core->blue_bal;
287 return 0; 322 return 0;
323 case V4L2_CID_HFLIP:
324 ctrl->value = core->hflip ? 1 : 0;
325 return 0;
326 case V4L2_CID_VFLIP:
327 ctrl->value = core->vflip ? 1 : 0;
328 return 0;
288 } 329 }
289 return -EINVAL; 330 return -EINVAL;
290} 331}
@@ -333,6 +374,14 @@ static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
333 case V4L2_CID_BLUE_BALANCE: 374 case V4L2_CID_BLUE_BALANCE:
334 core->blue_bal = ctrl->value; 375 core->blue_bal = ctrl->value;
335 break; 376 break;
377 case V4L2_CID_HFLIP:
378 core->hflip = ctrl->value;
379 set_read_mode(sd);
380 return 0;
381 case V4L2_CID_VFLIP:
382 core->vflip = ctrl->value;
383 set_read_mode(sd);
384 return 0;
336 default: 385 default:
337 return -EINVAL; 386 return -EINVAL;
338 } 387 }