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-rw-r--r--drivers/gpio/tps65910-gpio.c29
-rw-r--r--include/linux/mfd/tps65910.h90
2 files changed, 33 insertions, 86 deletions
diff --git a/drivers/gpio/tps65910-gpio.c b/drivers/gpio/tps65910-gpio.c
index f3ae37652446..8d1ddfdd63eb 100644
--- a/drivers/gpio/tps65910-gpio.c
+++ b/drivers/gpio/tps65910-gpio.c
@@ -25,9 +25,9 @@ static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset)
25 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); 25 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
26 uint8_t val; 26 uint8_t val;
27 27
28 tps65910->read(tps65910, TPS65910_GPIO0, 1, &val); 28 tps65910->read(tps65910, TPS65910_GPIO0 + offset, 1, &val);
29 29
30 if (val & GPIO0_GPIO_STS_MASK) 30 if (val & GPIO_STS_MASK)
31 return 1; 31 return 1;
32 32
33 return 0; 33 return 0;
@@ -39,11 +39,11 @@ static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset,
39 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); 39 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
40 40
41 if (value) 41 if (value)
42 tps65910_set_bits(tps65910, TPS65910_GPIO0, 42 tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset,
43 GPIO0_GPIO_SET_MASK); 43 GPIO_SET_MASK);
44 else 44 else
45 tps65910_clear_bits(tps65910, TPS65910_GPIO0, 45 tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset,
46 GPIO0_GPIO_SET_MASK); 46 GPIO_SET_MASK);
47} 47}
48 48
49static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset, 49static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset,
@@ -54,15 +54,16 @@ static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset,
54 /* Set the initial value */ 54 /* Set the initial value */
55 tps65910_gpio_set(gc, 0, value); 55 tps65910_gpio_set(gc, 0, value);
56 56
57 return tps65910_set_bits(tps65910, TPS65910_GPIO0, GPIO0_GPIO_CFG_MASK); 57 return tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset,
58 GPIO_CFG_MASK);
58} 59}
59 60
60static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset) 61static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset)
61{ 62{
62 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); 63 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
63 64
64 return tps65910_clear_bits(tps65910, TPS65910_GPIO0, 65 return tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset,
65 GPIO0_GPIO_CFG_MASK); 66 GPIO_CFG_MASK);
66} 67}
67 68
68void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base) 69void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base)
@@ -76,7 +77,15 @@ void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base)
76 tps65910->gpio.label = tps65910->i2c_client->name; 77 tps65910->gpio.label = tps65910->i2c_client->name;
77 tps65910->gpio.dev = tps65910->dev; 78 tps65910->gpio.dev = tps65910->dev;
78 tps65910->gpio.base = gpio_base; 79 tps65910->gpio.base = gpio_base;
79 tps65910->gpio.ngpio = 1; 80
81 switch(tps65910_chip_id(tps65910)) {
82 case TPS65910:
83 tps65910->gpio.ngpio = 6;
84 case TPS65911:
85 tps65910->gpio.ngpio = 9;
86 default:
87 return;
88 }
80 tps65910->gpio.can_sleep = 1; 89 tps65910->gpio.can_sleep = 1;
81 90
82 tps65910->gpio.direction_input = tps65910_gpio_input; 91 tps65910->gpio.direction_input = tps65910_gpio_input;
diff --git a/include/linux/mfd/tps65910.h b/include/linux/mfd/tps65910.h
index 32bb7b81f713..5f770064e0c5 100644
--- a/include/linux/mfd/tps65910.h
+++ b/include/linux/mfd/tps65910.h
@@ -101,6 +101,9 @@
101#define TPS65910_GPIO3 0x63 101#define TPS65910_GPIO3 0x63
102#define TPS65910_GPIO4 0x64 102#define TPS65910_GPIO4 0x64
103#define TPS65910_GPIO5 0x65 103#define TPS65910_GPIO5 0x65
104#define TPS65910_GPIO6 0x66
105#define TPS65910_GPIO7 0x67
106#define TPS65910_GPIO8 0x68
104#define TPS65910_JTAGVERNUM 0x80 107#define TPS65910_JTAGVERNUM 0x80
105#define TPS65910_MAX_REGISTER 0x80 108#define TPS65910_MAX_REGISTER 0x80
106 109
@@ -650,82 +653,17 @@
650#define INT_MSK3_GPIO4_R_IT_MSK_SHIFT 0 653#define INT_MSK3_GPIO4_R_IT_MSK_SHIFT 0
651 654
652 655
653/*Register GPIO0 (0x80) register.RegisterDescription */ 656/*Register GPIO (0x80) register.RegisterDescription */
654#define GPIO0_GPIO_DEB_MASK 0x10 657#define GPIO_DEB_MASK 0x10
655#define GPIO0_GPIO_DEB_SHIFT 4 658#define GPIO_DEB_SHIFT 4
656#define GPIO0_GPIO_PUEN_MASK 0x08 659#define GPIO_PUEN_MASK 0x08
657#define GPIO0_GPIO_PUEN_SHIFT 3 660#define GPIO_PUEN_SHIFT 3
658#define GPIO0_GPIO_CFG_MASK 0x04 661#define GPIO_CFG_MASK 0x04
659#define GPIO0_GPIO_CFG_SHIFT 2 662#define GPIO_CFG_SHIFT 2
660#define GPIO0_GPIO_STS_MASK 0x02 663#define GPIO_STS_MASK 0x02
661#define GPIO0_GPIO_STS_SHIFT 1 664#define GPIO_STS_SHIFT 1
662#define GPIO0_GPIO_SET_MASK 0x01 665#define GPIO_SET_MASK 0x01
663#define GPIO0_GPIO_SET_SHIFT 0 666#define GPIO_SET_SHIFT 0
664
665
666/*Register GPIO1 (0x80) register.RegisterDescription */
667#define GPIO1_GPIO_DEB_MASK 0x10
668#define GPIO1_GPIO_DEB_SHIFT 4
669#define GPIO1_GPIO_PUEN_MASK 0x08
670#define GPIO1_GPIO_PUEN_SHIFT 3
671#define GPIO1_GPIO_CFG_MASK 0x04
672#define GPIO1_GPIO_CFG_SHIFT 2
673#define GPIO1_GPIO_STS_MASK 0x02
674#define GPIO1_GPIO_STS_SHIFT 1
675#define GPIO1_GPIO_SET_MASK 0x01
676#define GPIO1_GPIO_SET_SHIFT 0
677
678
679/*Register GPIO2 (0x80) register.RegisterDescription */
680#define GPIO2_GPIO_DEB_MASK 0x10
681#define GPIO2_GPIO_DEB_SHIFT 4
682#define GPIO2_GPIO_PUEN_MASK 0x08
683#define GPIO2_GPIO_PUEN_SHIFT 3
684#define GPIO2_GPIO_CFG_MASK 0x04
685#define GPIO2_GPIO_CFG_SHIFT 2
686#define GPIO2_GPIO_STS_MASK 0x02
687#define GPIO2_GPIO_STS_SHIFT 1
688#define GPIO2_GPIO_SET_MASK 0x01
689#define GPIO2_GPIO_SET_SHIFT 0
690
691
692/*Register GPIO3 (0x80) register.RegisterDescription */
693#define GPIO3_GPIO_DEB_MASK 0x10
694#define GPIO3_GPIO_DEB_SHIFT 4
695#define GPIO3_GPIO_PUEN_MASK 0x08
696#define GPIO3_GPIO_PUEN_SHIFT 3
697#define GPIO3_GPIO_CFG_MASK 0x04
698#define GPIO3_GPIO_CFG_SHIFT 2
699#define GPIO3_GPIO_STS_MASK 0x02
700#define GPIO3_GPIO_STS_SHIFT 1
701#define GPIO3_GPIO_SET_MASK 0x01
702#define GPIO3_GPIO_SET_SHIFT 0
703
704
705/*Register GPIO4 (0x80) register.RegisterDescription */
706#define GPIO4_GPIO_DEB_MASK 0x10
707#define GPIO4_GPIO_DEB_SHIFT 4
708#define GPIO4_GPIO_PUEN_MASK 0x08
709#define GPIO4_GPIO_PUEN_SHIFT 3
710#define GPIO4_GPIO_CFG_MASK 0x04
711#define GPIO4_GPIO_CFG_SHIFT 2
712#define GPIO4_GPIO_STS_MASK 0x02
713#define GPIO4_GPIO_STS_SHIFT 1
714#define GPIO4_GPIO_SET_MASK 0x01
715#define GPIO4_GPIO_SET_SHIFT 0
716
717
718/*Register GPIO5 (0x80) register.RegisterDescription */
719#define GPIO5_GPIO_DEB_MASK 0x10
720#define GPIO5_GPIO_DEB_SHIFT 4
721#define GPIO5_GPIO_PUEN_MASK 0x08
722#define GPIO5_GPIO_PUEN_SHIFT 3
723#define GPIO5_GPIO_CFG_MASK 0x04
724#define GPIO5_GPIO_CFG_SHIFT 2
725#define GPIO5_GPIO_STS_MASK 0x02
726#define GPIO5_GPIO_STS_SHIFT 1
727#define GPIO5_GPIO_SET_MASK 0x01
728#define GPIO5_GPIO_SET_SHIFT 0
729 667
730 668
731/*Register JTAGVERNUM (0x80) register.RegisterDescription */ 669/*Register JTAGVERNUM (0x80) register.RegisterDescription */