diff options
| -rw-r--r-- | arch/arm/mach-mx1/devices.c | 8 | ||||
| -rw-r--r-- | arch/arm/mach-mx2/devices.c | 12 | ||||
| -rw-r--r-- | arch/arm/mach-mx3/devices.c | 6 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/board-mx27ads.h | 2 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/board-mx31ads.h | 2 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/gpio.h | 4 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h | 4 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx3.h | 2 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/irqs.h | 27 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx1.h | 4 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx27.h | 6 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx31.h | 17 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/irq.c | 8 | ||||
| -rw-r--r-- | drivers/serial/imx.c | 2 |
14 files changed, 51 insertions, 53 deletions
diff --git a/arch/arm/mach-mx1/devices.c b/arch/arm/mach-mx1/devices.c index ad4679b90870..686d8d2dbb24 100644 --- a/arch/arm/mach-mx1/devices.c +++ b/arch/arm/mach-mx1/devices.c | |||
| @@ -232,25 +232,25 @@ static struct mxc_gpio_port imx_gpio_ports[] = { | |||
| 232 | .chip.label = "gpio-0", | 232 | .chip.label = "gpio-0", |
| 233 | .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR), | 233 | .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR), |
| 234 | .irq = GPIO_INT_PORTA, | 234 | .irq = GPIO_INT_PORTA, |
| 235 | .virtual_irq_start = MXC_MAX_INT_LINES | 235 | .virtual_irq_start = MXC_GPIO_IRQ_START |
| 236 | }, | 236 | }, |
| 237 | [1] = { | 237 | [1] = { |
| 238 | .chip.label = "gpio-1", | 238 | .chip.label = "gpio-1", |
| 239 | .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100), | 239 | .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100), |
| 240 | .irq = GPIO_INT_PORTB, | 240 | .irq = GPIO_INT_PORTB, |
| 241 | .virtual_irq_start = MXC_MAX_INT_LINES + 32 | 241 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 |
| 242 | }, | 242 | }, |
| 243 | [2] = { | 243 | [2] = { |
| 244 | .chip.label = "gpio-2", | 244 | .chip.label = "gpio-2", |
| 245 | .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200), | 245 | .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200), |
| 246 | .irq = GPIO_INT_PORTC, | 246 | .irq = GPIO_INT_PORTC, |
| 247 | .virtual_irq_start = MXC_MAX_INT_LINES + 64 | 247 | .virtual_irq_start = MXC_GPIO_IRQ_START + 64 |
| 248 | }, | 248 | }, |
| 249 | [3] = { | 249 | [3] = { |
| 250 | .chip.label = "gpio-3", | 250 | .chip.label = "gpio-3", |
| 251 | .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300), | 251 | .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300), |
| 252 | .irq = GPIO_INT_PORTD, | 252 | .irq = GPIO_INT_PORTD, |
| 253 | .virtual_irq_start = MXC_MAX_INT_LINES + 96 | 253 | .virtual_irq_start = MXC_GPIO_IRQ_START + 96 |
| 254 | } | 254 | } |
| 255 | }; | 255 | }; |
| 256 | 256 | ||
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c index 0bad86527743..af121f5ab710 100644 --- a/arch/arm/mach-mx2/devices.c +++ b/arch/arm/mach-mx2/devices.c | |||
| @@ -230,32 +230,32 @@ static struct mxc_gpio_port imx_gpio_ports[] = { | |||
| 230 | .chip.label = "gpio-0", | 230 | .chip.label = "gpio-0", |
| 231 | .irq = MXC_INT_GPIO, | 231 | .irq = MXC_INT_GPIO, |
| 232 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 0), | 232 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 0), |
| 233 | .virtual_irq_start = MXC_MAX_INT_LINES, | 233 | .virtual_irq_start = MXC_GPIO_IRQ_START, |
| 234 | }, | 234 | }, |
| 235 | [1] = { | 235 | [1] = { |
| 236 | .chip.label = "gpio-1", | 236 | .chip.label = "gpio-1", |
| 237 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 1), | 237 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 1), |
| 238 | .virtual_irq_start = MXC_MAX_INT_LINES + 32, | 238 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32, |
| 239 | }, | 239 | }, |
| 240 | [2] = { | 240 | [2] = { |
| 241 | .chip.label = "gpio-2", | 241 | .chip.label = "gpio-2", |
| 242 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 2), | 242 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 2), |
| 243 | .virtual_irq_start = MXC_MAX_INT_LINES + 64, | 243 | .virtual_irq_start = MXC_GPIO_IRQ_START + 64, |
| 244 | }, | 244 | }, |
| 245 | [3] = { | 245 | [3] = { |
| 246 | .chip.label = "gpio-3", | 246 | .chip.label = "gpio-3", |
| 247 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 3), | 247 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 3), |
| 248 | .virtual_irq_start = MXC_MAX_INT_LINES + 96, | 248 | .virtual_irq_start = MXC_GPIO_IRQ_START + 96, |
| 249 | }, | 249 | }, |
| 250 | [4] = { | 250 | [4] = { |
| 251 | .chip.label = "gpio-4", | 251 | .chip.label = "gpio-4", |
| 252 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 4), | 252 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 4), |
| 253 | .virtual_irq_start = MXC_MAX_INT_LINES + 128, | 253 | .virtual_irq_start = MXC_GPIO_IRQ_START + 128, |
| 254 | }, | 254 | }, |
| 255 | [5] = { | 255 | [5] = { |
| 256 | .chip.label = "gpio-5", | 256 | .chip.label = "gpio-5", |
| 257 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 5), | 257 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 5), |
| 258 | .virtual_irq_start = MXC_MAX_INT_LINES + 160, | 258 | .virtual_irq_start = MXC_GPIO_IRQ_START + 160, |
| 259 | } | 259 | } |
| 260 | }; | 260 | }; |
| 261 | 261 | ||
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index 3e61ff4646fe..1d46cb4adf96 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c | |||
| @@ -125,19 +125,19 @@ static struct mxc_gpio_port imx_gpio_ports[] = { | |||
| 125 | .chip.label = "gpio-0", | 125 | .chip.label = "gpio-0", |
| 126 | .base = IO_ADDRESS(GPIO1_BASE_ADDR), | 126 | .base = IO_ADDRESS(GPIO1_BASE_ADDR), |
| 127 | .irq = MXC_INT_GPIO1, | 127 | .irq = MXC_INT_GPIO1, |
| 128 | .virtual_irq_start = MXC_GPIO_INT_BASE | 128 | .virtual_irq_start = MXC_GPIO_IRQ_START, |
| 129 | }, | 129 | }, |
| 130 | [1] = { | 130 | [1] = { |
| 131 | .chip.label = "gpio-1", | 131 | .chip.label = "gpio-1", |
| 132 | .base = IO_ADDRESS(GPIO2_BASE_ADDR), | 132 | .base = IO_ADDRESS(GPIO2_BASE_ADDR), |
| 133 | .irq = MXC_INT_GPIO2, | 133 | .irq = MXC_INT_GPIO2, |
| 134 | .virtual_irq_start = MXC_GPIO_INT_BASE + GPIO_NUM_PIN | 134 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32, |
| 135 | }, | 135 | }, |
| 136 | [2] = { | 136 | [2] = { |
| 137 | .chip.label = "gpio-2", | 137 | .chip.label = "gpio-2", |
| 138 | .base = IO_ADDRESS(GPIO3_BASE_ADDR), | 138 | .base = IO_ADDRESS(GPIO3_BASE_ADDR), |
| 139 | .irq = MXC_INT_GPIO3, | 139 | .irq = MXC_INT_GPIO3, |
| 140 | .virtual_irq_start = MXC_GPIO_INT_BASE + GPIO_NUM_PIN * 2 | 140 | .virtual_irq_start = MXC_GPIO_IRQ_START + 64, |
| 141 | } | 141 | } |
| 142 | }; | 142 | }; |
| 143 | 143 | ||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx27ads.h b/arch/arm/plat-mxc/include/mach/board-mx27ads.h index 0c748a8e157b..8f34a05afc87 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx27ads.h +++ b/arch/arm/plat-mxc/include/mach/board-mx27ads.h | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | #define __ASM_ARCH_MXC_BOARD_MX27ADS_H__ | 15 | #define __ASM_ARCH_MXC_BOARD_MX27ADS_H__ |
| 16 | 16 | ||
| 17 | /* external interrupt multiplexer */ | 17 | /* external interrupt multiplexer */ |
| 18 | #define MXC_EXP_IO_BASE (MXC_GPIO_BASE + MXC_MAX_GPIO_LINES) | 18 | #define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) |
| 19 | 19 | ||
| 20 | #define MXC_VIRTUAL_INTS_BASE (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES) | 20 | #define MXC_VIRTUAL_INTS_BASE (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES) |
| 21 | #define MXC_SDIO1_CARD_IRQ MXC_VIRTUAL_INTS_BASE | 21 | #define MXC_SDIO1_CARD_IRQ MXC_VIRTUAL_INTS_BASE |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h index 745b48864f93..451d510d08c3 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h | |||
| @@ -90,7 +90,7 @@ | |||
| 90 | #define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS) | 90 | #define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS) |
| 91 | #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4) | 91 | #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4) |
| 92 | 92 | ||
| 93 | #define MXC_EXP_IO_BASE (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES) | 93 | #define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) |
| 94 | #define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE) | 94 | #define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE) |
| 95 | 95 | ||
| 96 | #define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 0) | 96 | #define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 0) |
diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h index 65eedc0d196f..ea509f1090fb 100644 --- a/arch/arm/plat-mxc/include/mach/gpio.h +++ b/arch/arm/plat-mxc/include/mach/gpio.h | |||
| @@ -27,8 +27,8 @@ | |||
| 27 | #define gpio_set_value __gpio_set_value | 27 | #define gpio_set_value __gpio_set_value |
| 28 | #define gpio_cansleep __gpio_cansleep | 28 | #define gpio_cansleep __gpio_cansleep |
| 29 | 29 | ||
| 30 | #define gpio_to_irq(gpio) (MXC_MAX_INT_LINES + (gpio)) | 30 | #define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio)) |
| 31 | #define irq_to_gpio(irq) ((irq) - MXC_MAX_INT_LINES) | 31 | #define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START) |
| 32 | 32 | ||
| 33 | struct mxc_gpio_port { | 33 | struct mxc_gpio_port { |
| 34 | void __iomem *base; | 34 | void __iomem *base; |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h index 60b3c9b6ef7d..95a383be628e 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h | |||
| @@ -405,9 +405,9 @@ extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); | |||
| 405 | #endif | 405 | #endif |
| 406 | 406 | ||
| 407 | /* decode irq number to use with IMR(x), ISR(x) and friends */ | 407 | /* decode irq number to use with IMR(x), ISR(x) and friends */ |
| 408 | #define IRQ_TO_REG(irq) ((irq - MXC_MAX_INT_LINES) >> 5) | 408 | #define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5) |
| 409 | 409 | ||
| 410 | #define IRQ_GPIOA(x) (MXC_MAX_INT_LINES + x) | 410 | #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) |
| 411 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) | 411 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) |
| 412 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) | 412 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) |
| 413 | #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) | 413 | #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index 20e5c4c63314..c9198c0aea18 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h | |||
| @@ -141,7 +141,7 @@ void mxc_iomux_set_gpr(enum iomux_gp_func, bool); | |||
| 141 | ((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) | 141 | ((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) |
| 142 | #define IOMUX_TO_IRQ(iomux_pin) \ | 142 | #define IOMUX_TO_IRQ(iomux_pin) \ |
| 143 | (((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) + \ | 143 | (((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) + \ |
| 144 | MXC_GPIO_INT_BASE) | 144 | MXC_GPIO_IRQ_START) |
| 145 | 145 | ||
| 146 | /* | 146 | /* |
| 147 | * This enumeration is constructed based on the Section | 147 | * This enumeration is constructed based on the Section |
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index b8ac91608a4f..e06d3cb0ee11 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h | |||
| @@ -11,7 +11,32 @@ | |||
| 11 | #ifndef __ASM_ARCH_MXC_IRQS_H__ | 11 | #ifndef __ASM_ARCH_MXC_IRQS_H__ |
| 12 | #define __ASM_ARCH_MXC_IRQS_H__ | 12 | #define __ASM_ARCH_MXC_IRQS_H__ |
| 13 | 13 | ||
| 14 | #include <mach/hardware.h> | 14 | /* |
| 15 | * So far all i.MX SoCs have 64 internal interrupts | ||
| 16 | */ | ||
| 17 | #define MXC_INTERNAL_IRQS 64 | ||
| 18 | |||
| 19 | #define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS | ||
| 20 | |||
| 21 | #if defined CONFIG_ARCH_MX1 | ||
| 22 | #define MXC_GPIO_IRQS (32 * 4) | ||
| 23 | #elif defined CONFIG_ARCH_MX2 | ||
| 24 | #define MXC_GPIO_IRQS (32 * 6) | ||
| 25 | #elif defined CONFIG_ARCH_MX3 | ||
| 26 | #define MXC_GPIO_IRQS (32 * 3) | ||
| 27 | #endif | ||
| 28 | |||
| 29 | /* | ||
| 30 | * The next 16 interrupts are for board specific purposes. Since | ||
| 31 | * the kernel can only run on one machine at a time, we can re-use | ||
| 32 | * these. If you need more, increase MXC_BOARD_IRQS, but keep it | ||
| 33 | * within sensible limits. | ||
| 34 | */ | ||
| 35 | #define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS) | ||
| 36 | #define MXC_BOARD_IRQS 16 | ||
| 37 | |||
| 38 | #define NR_IRQS (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS) | ||
| 39 | |||
| 15 | extern void imx_irq_set_priority(unsigned char irq, unsigned char prio); | 40 | extern void imx_irq_set_priority(unsigned char irq, unsigned char prio); |
| 16 | 41 | ||
| 17 | /* all normal IRQs can be FIQs */ | 42 | /* all normal IRQs can be FIQs */ |
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h index e7f6d00009a7..c45bf5f5b90c 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/plat-mxc/include/mach/mx1.h | |||
| @@ -145,10 +145,6 @@ | |||
| 145 | #define GPIO_INT_PORTD 62 | 145 | #define GPIO_INT_PORTD 62 |
| 146 | #define WDT_INT 63 | 146 | #define WDT_INT 63 |
| 147 | 147 | ||
| 148 | #define MXC_MAX_INT_LINES 64 | ||
| 149 | |||
| 150 | #define NR_IRQS 256 | ||
| 151 | |||
| 152 | /* gpio and gpio based interrupt handling */ | 148 | /* gpio and gpio based interrupt handling */ |
| 153 | #define GPIO_DR 0x1C | 149 | #define GPIO_DR 0x1C |
| 154 | #define GPIO_GDIR 0x00 | 150 | #define GPIO_GDIR 0x00 |
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index aade46d90e73..55bcbd5e073a 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h | |||
| @@ -295,10 +295,4 @@ extern int mx27_revision(void); | |||
| 295 | /* Start of RAM */ | 295 | /* Start of RAM */ |
| 296 | #define PHYS_OFFSET SDRAM_BASE_ADDR | 296 | #define PHYS_OFFSET SDRAM_BASE_ADDR |
| 297 | 297 | ||
| 298 | /* max interrupt lines count */ | ||
| 299 | #define NR_IRQS 256 | ||
| 300 | |||
| 301 | /* count of internal interrupt sources */ | ||
| 302 | #define MXC_MAX_INT_LINES 64 | ||
| 303 | |||
| 304 | #endif /* __ASM_ARCH_MXC_MX27_H__ */ | 298 | #endif /* __ASM_ARCH_MXC_MX27_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index 0536f8917bc0..65c3109b5192 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h | |||
| @@ -315,23 +315,6 @@ | |||
| 315 | #define MXC_INT_EXT_WDOG 62 | 315 | #define MXC_INT_EXT_WDOG 62 |
| 316 | #define MXC_INT_EXT_TV 63 | 316 | #define MXC_INT_EXT_TV 63 |
| 317 | 317 | ||
| 318 | #define MXC_MAX_INT_LINES 64 | ||
| 319 | |||
| 320 | #define MXC_GPIO_INT_BASE MXC_MAX_INT_LINES | ||
| 321 | #define MXC_MAX_GPIO_LINES (GPIO_NUM_PIN * GPIO_PORT_NUM) | ||
| 322 | #define MXC_MAX_VIRTUAL_INTS 16 | ||
| 323 | |||
| 324 | #define NR_IRQS (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES + MXC_MAX_VIRTUAL_INTS) | ||
| 325 | |||
| 326 | /*! | ||
| 327 | * Number of GPIO port as defined in the IC Spec | ||
| 328 | */ | ||
| 329 | #define GPIO_PORT_NUM 3 | ||
| 330 | /*! | ||
| 331 | * Number of GPIO pins per port | ||
| 332 | */ | ||
| 333 | #define GPIO_NUM_PIN 32 | ||
| 334 | |||
| 335 | #define PROD_SIGNATURE 0x1 /* For MX31 */ | 318 | #define PROD_SIGNATURE 0x1 /* For MX31 */ |
| 336 | 319 | ||
| 337 | /* silicon revisions specific to i.MX31 */ | 320 | /* silicon revisions specific to i.MX31 */ |
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c index e937c8759a97..06862654a89a 100644 --- a/arch/arm/plat-mxc/irq.c +++ b/arch/arm/plat-mxc/irq.c | |||
| @@ -72,14 +72,14 @@ int mxc_set_irq_fiq(unsigned int irq, unsigned int type) | |||
| 72 | { | 72 | { |
| 73 | unsigned int irqt; | 73 | unsigned int irqt; |
| 74 | 74 | ||
| 75 | if (irq >= MXC_MAX_INT_LINES) | 75 | if (irq >= MXC_INTERNAL_IRQS) |
| 76 | return -EINVAL; | 76 | return -EINVAL; |
| 77 | 77 | ||
| 78 | if (irq < MXC_MAX_INT_LINES / 2) { | 78 | if (irq < MXC_INTERNAL_IRQS / 2) { |
| 79 | irqt = __raw_readl(AVIC_INTTYPEL) & ~(1 << irq); | 79 | irqt = __raw_readl(AVIC_INTTYPEL) & ~(1 << irq); |
| 80 | __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEL); | 80 | __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEL); |
| 81 | } else { | 81 | } else { |
| 82 | irq -= MXC_MAX_INT_LINES / 2; | 82 | irq -= MXC_INTERNAL_IRQS / 2; |
| 83 | irqt = __raw_readl(AVIC_INTTYPEH) & ~(1 << irq); | 83 | irqt = __raw_readl(AVIC_INTTYPEH) & ~(1 << irq); |
| 84 | __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEH); | 84 | __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEH); |
| 85 | } | 85 | } |
| @@ -129,7 +129,7 @@ void __init mxc_init_irq(void) | |||
| 129 | /* all IRQ no FIQ */ | 129 | /* all IRQ no FIQ */ |
| 130 | __raw_writel(0, AVIC_INTTYPEH); | 130 | __raw_writel(0, AVIC_INTTYPEH); |
| 131 | __raw_writel(0, AVIC_INTTYPEL); | 131 | __raw_writel(0, AVIC_INTTYPEL); |
| 132 | for (i = 0; i < MXC_MAX_INT_LINES; i++) { | 132 | for (i = 0; i < MXC_INTERNAL_IRQS; i++) { |
| 133 | set_irq_chip(i, &mxc_avic_chip); | 133 | set_irq_chip(i, &mxc_avic_chip); |
| 134 | set_irq_handler(i, handle_level_irq); | 134 | set_irq_handler(i, handle_level_irq); |
| 135 | set_irq_flags(i, IRQF_VALID); | 135 | set_irq_flags(i, IRQF_VALID); |
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 73dea88cceb3..a50954612b60 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c | |||
| @@ -191,7 +191,7 @@ | |||
| 191 | #define SERIAL_IMX_MAJOR 207 | 191 | #define SERIAL_IMX_MAJOR 207 |
| 192 | #define MINOR_START 16 | 192 | #define MINOR_START 16 |
| 193 | #define DEV_NAME "ttymxc" | 193 | #define DEV_NAME "ttymxc" |
| 194 | #define MAX_INTERNAL_IRQ MXC_MAX_INT_LINES | 194 | #define MAX_INTERNAL_IRQ MXC_INTERNAL_IRQS |
| 195 | #endif | 195 | #endif |
| 196 | 196 | ||
| 197 | /* | 197 | /* |
