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-rw-r--r--arch/i386/kernel/apic.c5
-rw-r--r--arch/x86_64/kernel/apic.c20
-rw-r--r--include/asm-x86_64/hardirq.h21
3 files changed, 26 insertions, 20 deletions
diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c
index acd3f1e34ca6..98a5c23cf3df 100644
--- a/arch/i386/kernel/apic.c
+++ b/arch/i386/kernel/apic.c
@@ -75,8 +75,10 @@ void ack_bad_irq(unsigned int irq)
75 * holds up an irq slot - in excessive cases (when multiple 75 * holds up an irq slot - in excessive cases (when multiple
76 * unexpected vectors occur) that might lock up the APIC 76 * unexpected vectors occur) that might lock up the APIC
77 * completely. 77 * completely.
78 * But only ack when the APIC is enabled -AK
78 */ 79 */
79 ack_APIC_irq(); 80 if (!cpu_has_apic)
81 ack_APIC_irq();
80} 82}
81 83
82void __init apic_intr_init(void) 84void __init apic_intr_init(void)
@@ -1303,6 +1305,7 @@ int __init APIC_init_uniprocessor (void)
1303 if (!cpu_has_apic && APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { 1305 if (!cpu_has_apic && APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
1304 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n", 1306 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
1305 boot_cpu_physical_apicid); 1307 boot_cpu_physical_apicid);
1308 clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
1306 return -1; 1309 return -1;
1307 } 1310 }
1308 1311
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c
index c02218b3ae2b..6147770b4347 100644
--- a/arch/x86_64/kernel/apic.c
+++ b/arch/x86_64/kernel/apic.c
@@ -72,6 +72,26 @@ int get_maxlvt(void)
72 return maxlvt; 72 return maxlvt;
73} 73}
74 74
75/*
76 * 'what should we do if we get a hw irq event on an illegal vector'.
77 * each architecture has to answer this themselves.
78 */
79void ack_bad_irq(unsigned int irq)
80{
81 printk("unexpected IRQ trap at vector %02x\n", irq);
82 /*
83 * Currently unexpected vectors happen only on SMP and APIC.
84 * We _must_ ack these because every local APIC has only N
85 * irq slots per priority level, and a 'hanging, unacked' IRQ
86 * holds up an irq slot - in excessive cases (when multiple
87 * unexpected vectors occur) that might lock up the APIC
88 * completely.
89 * But don't ack when the APIC is disabled. -AK
90 */
91 if (!disable_apic)
92 ack_APIC_irq();
93}
94
75void clear_local_APIC(void) 95void clear_local_APIC(void)
76{ 96{
77 int maxlvt; 97 int maxlvt;
diff --git a/include/asm-x86_64/hardirq.h b/include/asm-x86_64/hardirq.h
index 8661b476fb40..8689951e3503 100644
--- a/include/asm-x86_64/hardirq.h
+++ b/include/asm-x86_64/hardirq.h
@@ -16,23 +16,6 @@
16#define set_softirq_pending(x) write_pda(__softirq_pending, (x)) 16#define set_softirq_pending(x) write_pda(__softirq_pending, (x))
17#define or_softirq_pending(x) or_pda(__softirq_pending, (x)) 17#define or_softirq_pending(x) or_pda(__softirq_pending, (x))
18 18
19/* 19extern void ack_bad_irq(unsigned int irq);
20 * 'what should we do if we get a hw irq event on an illegal vector'. 20
21 * each architecture has to answer this themselves.
22 */
23static inline void ack_bad_irq(unsigned int irq)
24{
25 printk("unexpected IRQ trap at vector %02x\n", irq);
26#ifdef CONFIG_X86_LOCAL_APIC
27 /*
28 * Currently unexpected vectors happen only on SMP and APIC.
29 * We _must_ ack these because every local APIC has only N
30 * irq slots per priority level, and a 'hanging, unacked' IRQ
31 * holds up an irq slot - in excessive cases (when multiple
32 * unexpected vectors occur) that might lock up the APIC
33 * completely.
34 */
35 ack_APIC_irq();
36#endif
37}
38#endif /* __ASM_HARDIRQ_H */ 21#endif /* __ASM_HARDIRQ_H */