2 files changed, 24 insertions, 0 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 67874b82a4ed..4e89112b57e0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -75,6 +75,27 @@ config ARM_DMA_USE_IOMMU
         select ARM_HAS_SG_CHAIN
         select NEED_SG_DMA_LENGTH
 
+if ARM_DMA_USE_IOMMU
+
+config ARM_DMA_IOMMU_ALIGNMENT
+        int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
+        range 4 9
+        default 8
+        help
+          DMA mapping framework by default aligns all buffers to the smallest
+          PAGE_SIZE order which is greater than or equal to the requested buffer
+          size. This works well for buffers up to a few hundreds kilobytes, but
+          for larger buffers it just a waste of address space. Drivers which has
+          relatively small addressing window (like 64Mib) might run out of
+          virtual space with just a few allocations.
+
+          With this parameter you can specify the maximum PAGE_SIZE order for
+          DMA IOMMU buffers. Larger buffers will be aligned only to this
+          specified order. The order is expressed as a power of two multiplied
+          by the PAGE_SIZE.
+
+endif
+
 config HAVE_PWM
         bool
 
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 2163af4b31b8..6e2511561c3e 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1029,6 +1029,9 @@ static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
         unsigned int count, start;
         unsigned long flags;
 
+        if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
+                order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
+
         count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
                  (1 << mapping->order) - 1) >> mapping->order;