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-rw-r--r--arch/s390/kernel/time.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index ee9fd7b85928..e1ad464b6f20 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -747,6 +747,7 @@ static void etr_adjust_time(unsigned long long clock, unsigned long long delay)
747 } 747 }
748} 748}
749 749
750#ifdef CONFIG_SMP
750static void etr_sync_cpu_start(void *dummy) 751static void etr_sync_cpu_start(void *dummy)
751{ 752{
752 int *in_sync = dummy; 753 int *in_sync = dummy;
@@ -758,8 +759,14 @@ static void etr_sync_cpu_start(void *dummy)
758 * __udelay will stop the cpu on an enabled wait psw until the 759 * __udelay will stop the cpu on an enabled wait psw until the
759 * TOD is running again. 760 * TOD is running again.
760 */ 761 */
761 while (*in_sync == 0) 762 while (*in_sync == 0) {
762 __udelay(1); 763 __udelay(1);
764 /*
765 * A different cpu changes *in_sync. Therefore use
766 * barrier() to force memory access.
767 */
768 barrier();
769 }
763 if (*in_sync != 1) 770 if (*in_sync != 1)
764 /* Didn't work. Clear per-cpu in sync bit again. */ 771 /* Didn't work. Clear per-cpu in sync bit again. */
765 etr_disable_sync_clock(NULL); 772 etr_disable_sync_clock(NULL);
@@ -773,6 +780,7 @@ static void etr_sync_cpu_start(void *dummy)
773static void etr_sync_cpu_end(void *dummy) 780static void etr_sync_cpu_end(void *dummy)
774{ 781{
775} 782}
783#endif /* CONFIG_SMP */
776 784
777/* 785/*
778 * Sync the TOD clock using the port refered to by aibp. This port 786 * Sync the TOD clock using the port refered to by aibp. This port