aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--Documentation/filesystems/squashfs.txt2
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c105
-rw-r--r--arch/arm/mach-at91/include/mach/board.h3
-rw-r--r--arch/blackfin/Kconfig7
-rw-r--r--arch/blackfin/Kconfig.debug6
-rw-r--r--arch/blackfin/configs/BF518F-EZBRD_defconfig63
-rw-r--r--arch/blackfin/configs/BF527-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/BF533-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/BF533-STAMP_defconfig4
-rw-r--r--arch/blackfin/configs/BF537-STAMP_defconfig14
-rw-r--r--arch/blackfin/configs/BF538-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/BF548-EZKIT_defconfig6
-rw-r--r--arch/blackfin/configs/BF561-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/BlackStamp_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF527_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF548_defconfig6
-rw-r--r--arch/blackfin/configs/IP0X_defconfig2
-rw-r--r--arch/blackfin/configs/SRV1_defconfig4
-rw-r--r--arch/blackfin/include/asm/Kbuild1
-rw-r--r--arch/blackfin/include/asm/bfin_sport.h45
-rw-r--r--arch/blackfin/include/asm/ipipe.h100
-rw-r--r--arch/blackfin/include/asm/ipipe_base.h12
-rw-r--r--arch/blackfin/include/asm/irq.h36
-rw-r--r--arch/blackfin/include/asm/percpu.h10
-rw-r--r--arch/blackfin/include/asm/thread_info.h2
-rw-r--r--arch/blackfin/kernel/Makefile8
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c4
-rw-r--r--arch/blackfin/kernel/ipipe.c176
-rw-r--r--arch/blackfin/kernel/irqchip.c14
-rw-r--r--arch/blackfin/kernel/kgdb_test.c9
-rw-r--r--arch/blackfin/kernel/ptrace.c5
-rw-r--r--arch/blackfin/kernel/setup.c10
-rw-r--r--arch/blackfin/kernel/time.c5
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c33
-rw-r--r--arch/blackfin/mach-bf518/include/mach/anomaly.h17
-rw-r--r--arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h4
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c26
-rw-r--r--arch/blackfin/mach-bf527/boards/ezbrd.c24
-rw-r--r--arch/blackfin/mach-bf527/include/mach/anomaly.h6
-rw-r--r--arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h4
-rw-r--r--arch/blackfin/mach-bf533/boards/Kconfig5
-rw-r--r--arch/blackfin/mach-bf533/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf533/boards/blackstamp.c24
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c24
-rw-r--r--arch/blackfin/mach-bf533/boards/generic_board.c126
-rw-r--r--arch/blackfin/mach-bf533/boards/ip0x.c13
-rw-r--r--arch/blackfin/mach-bf533/include/mach/anomaly.h7
-rw-r--r--arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf537/boards/Kconfig5
-rw-r--r--arch/blackfin/mach-bf537/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c26
-rw-r--r--arch/blackfin/mach-bf537/boards/generic_board.c745
-rw-r--r--arch/blackfin/mach-bf537/boards/minotaur.c24
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c24
-rw-r--r--arch/blackfin/mach-bf537/boards/tcm_bf537.c24
-rw-r--r--arch/blackfin/mach-bf537/include/mach/anomaly.h7
-rw-r--r--arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h4
-rw-r--r--arch/blackfin/mach-bf538/include/mach/anomaly.h6
-rw-r--r--arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/anomaly.h22
-rw-r--r--arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h22
-rw-r--r--arch/blackfin/mach-bf548/include/mach/irq.h8
-rw-r--r--arch/blackfin/mach-bf561/boards/Kconfig5
-rw-r--r--arch/blackfin/mach-bf561/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c15
-rw-r--r--arch/blackfin/mach-bf561/boards/generic_board.c113
-rw-r--r--arch/blackfin/mach-bf561/include/mach/anomaly.h7
-rw-r--r--arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-common/arch_checks.c9
-rw-r--r--arch/blackfin/mach-common/cache.S22
-rw-r--r--arch/blackfin/mach-common/clocks-init.c2
-rw-r--r--arch/blackfin/mach-common/dpmc_modes.S24
-rw-r--r--arch/blackfin/mach-common/entry.S61
-rw-r--r--arch/blackfin/mach-common/interrupt.S12
-rw-r--r--arch/blackfin/mach-common/ints-priority.c126
-rw-r--r--arch/blackfin/mach-common/smp.c6
-rw-r--r--arch/blackfin/mm/init.c2
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_dma.c7
-rw-r--r--arch/mips/include/asm/compat.h7
-rw-r--r--arch/x86/include/asm/linkage.h16
-rw-r--r--arch/x86/kernel/cpu/amd.c52
-rw-r--r--arch/x86/kernel/cpu/intel.c25
-rw-r--r--arch/x86/kernel/ds.c3
-rw-r--r--arch/x86/kernel/setup_percpu.c73
-rw-r--r--arch/x86/kernel/smpboot.c78
-rw-r--r--arch/x86/kernel/tlb_uv.c2
-rw-r--r--arch/x86/mm/init.c2
-rw-r--r--arch/x86/mm/init_32.c23
-rw-r--r--arch/x86/mm/init_64.c8
-rw-r--r--arch/x86/mm/ioremap.c2
-rw-r--r--arch/x86/mm/kmmio.c15
-rw-r--r--arch/x86/mm/memtest.c3
-rw-r--r--block/blk-merge.c25
-rw-r--r--drivers/ata/ahci.c24
-rw-r--r--drivers/ata/libata-core.c14
-rw-r--r--drivers/ata/libata-eh.c7
-rw-r--r--drivers/ata/sata_nv.c2
-rw-r--r--drivers/block/cciss.c8
-rw-r--r--drivers/block/loop.c3
-rw-r--r--drivers/block/xen-blkfront.c2
-rw-r--r--drivers/dca/dca-core.c2
-rw-r--r--drivers/dma/dmatest.c6
-rw-r--r--drivers/dma/fsldma.c8
-rw-r--r--drivers/dma/ioat.c2
-rw-r--r--drivers/dma/ioat_dca.c26
-rw-r--r--drivers/dma/ioat_dma.c39
-rw-r--r--drivers/dma/ioatdma.h8
-rw-r--r--drivers/dma/ioatdma_hw.h2
-rw-r--r--drivers/dma/ioatdma_registers.h2
-rw-r--r--drivers/dma/iop-adma.c16
-rw-r--r--drivers/dma/ipu/ipu_idmac.c2
-rw-r--r--drivers/dma/mv_xor.c16
-rw-r--r--drivers/ide/Kconfig5
-rw-r--r--drivers/ide/Makefile1
-rw-r--r--drivers/ide/at91_ide.c467
-rw-r--r--drivers/ide/ide-disk_proc.c2
-rw-r--r--drivers/ide/ide-floppy_proc.c2
-rw-r--r--drivers/ide/ide-io.c3
-rw-r--r--drivers/ide/ide-iops.c2
-rw-r--r--drivers/ide/ide-probe.c7
-rw-r--r--drivers/ide/ide-proc.c2
-rw-r--r--drivers/ide/ide-tape.c2
-rw-r--r--drivers/mmc/core/mmc_ops.c15
-rw-r--r--drivers/watchdog/gef_wdt.c2
-rw-r--r--drivers/watchdog/ks8695_wdt.c1
-rw-r--r--drivers/watchdog/orion5x_wdt.c1
-rw-r--r--drivers/watchdog/rc32434_wdt.c168
-rw-r--r--fs/ext4/ialloc.c8
-rw-r--r--fs/squashfs/block.c13
-rw-r--r--fs/squashfs/cache.c4
-rw-r--r--fs/squashfs/inode.c6
-rw-r--r--fs/squashfs/squashfs.h2
-rw-r--r--fs/squashfs/super.c2
-rw-r--r--include/linux/ata.h2
-rw-r--r--include/linux/dmaengine.h7
-rw-r--r--include/linux/hdreg.h1
-rw-r--r--include/linux/ide.h1
-rw-r--r--include/linux/libata.h6
-rw-r--r--include/linux/percpu.h60
-rw-r--r--include/linux/serio.h2
-rw-r--r--kernel/module.c2
-rw-r--r--kernel/softirq.c1
-rw-r--r--mm/percpu.c593
-rw-r--r--security/smack/smack_lsm.c43
-rw-r--r--security/smack/smackfs.c64
-rw-r--r--sound/pci/hda/patch_sigmatel.c6
146 files changed, 2135 insertions, 2226 deletions
diff --git a/Documentation/filesystems/squashfs.txt b/Documentation/filesystems/squashfs.txt
index 3e79e4a7a392..b324c033035a 100644
--- a/Documentation/filesystems/squashfs.txt
+++ b/Documentation/filesystems/squashfs.txt
@@ -22,7 +22,7 @@ Squashfs filesystem features versus Cramfs:
22 22
23 Squashfs Cramfs 23 Squashfs Cramfs
24 24
25Max filesystem size: 2^64 16 MiB 25Max filesystem size: 2^64 256 MiB
26Max file size: ~ 2 TiB 16 MiB 26Max file size: ~ 2 TiB 16 MiB
27Max files: unlimited unlimited 27Max files: unlimited unlimited
28Max directories: unlimited unlimited 28Max directories: unlimited unlimited
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 134af97ff340..b7f233242315 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -347,6 +347,111 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
347void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} 347void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
348#endif 348#endif
349 349
350/* --------------------------------------------------------------------
351 * Compact Flash (PCMCIA or IDE)
352 * -------------------------------------------------------------------- */
353
354#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
355 defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
356
357static struct at91_cf_data cf0_data;
358
359static struct resource cf0_resources[] = {
360 [0] = {
361 .start = AT91_CHIPSELECT_4,
362 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
363 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
364 }
365};
366
367static struct platform_device cf0_device = {
368 .id = 0,
369 .dev = {
370 .platform_data = &cf0_data,
371 },
372 .resource = cf0_resources,
373 .num_resources = ARRAY_SIZE(cf0_resources),
374};
375
376static struct at91_cf_data cf1_data;
377
378static struct resource cf1_resources[] = {
379 [0] = {
380 .start = AT91_CHIPSELECT_5,
381 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
382 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
383 }
384};
385
386static struct platform_device cf1_device = {
387 .id = 1,
388 .dev = {
389 .platform_data = &cf1_data,
390 },
391 .resource = cf1_resources,
392 .num_resources = ARRAY_SIZE(cf1_resources),
393};
394
395void __init at91_add_device_cf(struct at91_cf_data *data)
396{
397 unsigned long ebi0_csa;
398 struct platform_device *pdev;
399
400 if (!data)
401 return;
402
403 /*
404 * assign CS4 or CS5 to SMC with Compact Flash logic support,
405 * we assume SMC timings are configured by board code,
406 * except True IDE where timings are controlled by driver
407 */
408 ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
409 switch (data->chipselect) {
410 case 4:
411 at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
412 ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
413 cf0_data = *data;
414 pdev = &cf0_device;
415 break;
416 case 5:
417 at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
418 ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
419 cf1_data = *data;
420 pdev = &cf1_device;
421 break;
422 default:
423 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
424 data->chipselect);
425 return;
426 }
427 at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
428
429 if (data->det_pin) {
430 at91_set_gpio_input(data->det_pin, 1);
431 at91_set_deglitch(data->det_pin, 1);
432 }
433
434 if (data->irq_pin) {
435 at91_set_gpio_input(data->irq_pin, 1);
436 at91_set_deglitch(data->irq_pin, 1);
437 }
438
439 if (data->vcc_pin)
440 /* initially off */
441 at91_set_gpio_output(data->vcc_pin, 0);
442
443 /* enable EBI controlled pins */
444 at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
445 at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
446 at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
447 at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
448
449 pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
450 platform_device_register(pdev);
451}
452#else
453void __init at91_add_device_cf(struct at91_cf_data *data) {}
454#endif
350 455
351/* -------------------------------------------------------------------- 456/* --------------------------------------------------------------------
352 * NAND / SmartMedia 457 * NAND / SmartMedia
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 0b3ae21b4565..793fe7b25f36 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -56,6 +56,9 @@ struct at91_cf_data {
56 u8 vcc_pin; /* power switching */ 56 u8 vcc_pin; /* power switching */
57 u8 rst_pin; /* card reset */ 57 u8 rst_pin; /* card reset */
58 u8 chipselect; /* EBI Chip Select number */ 58 u8 chipselect; /* EBI Chip Select number */
59 u8 flags;
60#define AT91_CF_TRUE_IDE 0x01
61#define AT91_IDE_SWAP_A0_A2 0x02
59}; 62};
60extern void __init at91_add_device_cf(struct at91_cf_data *data); 63extern void __init at91_add_device_cf(struct at91_cf_data *data);
61 64
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 8f1f97d56e1e..0c1f86e3e44a 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -1129,6 +1129,7 @@ endchoice
1129 1129
1130config PM_WAKEUP_BY_GPIO 1130config PM_WAKEUP_BY_GPIO
1131 bool "Allow Wakeup from Standby by GPIO" 1131 bool "Allow Wakeup from Standby by GPIO"
1132 depends on PM && !BF54x
1132 1133
1133config PM_WAKEUP_GPIO_NUMBER 1134config PM_WAKEUP_GPIO_NUMBER
1134 int "GPIO number" 1135 int "GPIO number"
@@ -1168,6 +1169,12 @@ config PM_BFIN_WAKE_GP
1168 default n 1169 default n
1169 help 1170 help
1170 Enable General-Purpose Wake-Up (Voltage Regulator Power-Up) 1171 Enable General-Purpose Wake-Up (Voltage Regulator Power-Up)
1172 (all processors, except ADSP-BF549). This option sets
1173 the general-purpose wake-up enable (GPWE) control bit to enable
1174 wake-up upon detection of an active low signal on the /GPW (PH7) pin.
1175 On ADSP-BF549 this option enables the the same functionality on the
1176 /MRXON pin also PH7.
1177
1171endmenu 1178endmenu
1172 1179
1173menu "CPU Frequency scaling" 1180menu "CPU Frequency scaling"
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug
index 5f981d9ca625..79e7e63ab709 100644
--- a/arch/blackfin/Kconfig.debug
+++ b/arch/blackfin/Kconfig.debug
@@ -21,12 +21,6 @@ config DEBUG_STACK_USAGE
21config HAVE_ARCH_KGDB 21config HAVE_ARCH_KGDB
22 def_bool y 22 def_bool y
23 23
24config KGDB_TESTCASE
25 tristate "KGDB: for test case in expect"
26 default n
27 help
28 This is a kgdb test case for automated testing.
29
30config DEBUG_VERBOSE 24config DEBUG_VERBOSE
31 bool "Verbose fault messages" 25 bool "Verbose fault messages"
32 default y 26 default y
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index 4fdb9e04759f..281f4b60e603 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28
4# Fri Jan 9 17:58:41 2009 4# Fri Feb 20 10:01:44 2009
5# 5#
6# CONFIG_MMU is not set 6# CONFIG_MMU is not set
7# CONFIG_FPU is not set 7# CONFIG_FPU is not set
@@ -133,10 +133,15 @@ CONFIG_BF518=y
133# CONFIG_BF538 is not set 133# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 134# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 135# CONFIG_BF542 is not set
136# CONFIG_BF542M is not set
136# CONFIG_BF544 is not set 137# CONFIG_BF544 is not set
138# CONFIG_BF544M is not set
137# CONFIG_BF547 is not set 139# CONFIG_BF547 is not set
140# CONFIG_BF547M is not set
138# CONFIG_BF548 is not set 141# CONFIG_BF548 is not set
142# CONFIG_BF548M is not set
139# CONFIG_BF549 is not set 143# CONFIG_BF549 is not set
144# CONFIG_BF549M is not set
140# CONFIG_BF561 is not set 145# CONFIG_BF561 is not set
141CONFIG_BF_REV_MIN=0 146CONFIG_BF_REV_MIN=0
142CONFIG_BF_REV_MAX=2 147CONFIG_BF_REV_MAX=2
@@ -426,7 +431,17 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
426# CONFIG_TIPC is not set 431# CONFIG_TIPC is not set
427# CONFIG_ATM is not set 432# CONFIG_ATM is not set
428# CONFIG_BRIDGE is not set 433# CONFIG_BRIDGE is not set
429# CONFIG_NET_DSA is not set 434CONFIG_NET_DSA=y
435# CONFIG_NET_DSA_TAG_DSA is not set
436# CONFIG_NET_DSA_TAG_EDSA is not set
437# CONFIG_NET_DSA_TAG_TRAILER is not set
438CONFIG_NET_DSA_TAG_STPID=y
439# CONFIG_NET_DSA_MV88E6XXX is not set
440# CONFIG_NET_DSA_MV88E6060 is not set
441# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
442# CONFIG_NET_DSA_MV88E6131 is not set
443# CONFIG_NET_DSA_MV88E6123_61_65 is not set
444CONFIG_NET_DSA_KSZ8893M=y
430# CONFIG_VLAN_8021Q is not set 445# CONFIG_VLAN_8021Q is not set
431# CONFIG_DECNET is not set 446# CONFIG_DECNET is not set
432# CONFIG_LLC2 is not set 447# CONFIG_LLC2 is not set
@@ -529,6 +544,8 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
529# 544#
530# Self-contained MTD device drivers 545# Self-contained MTD device drivers
531# 546#
547# CONFIG_MTD_DATAFLASH is not set
548# CONFIG_MTD_M25P80 is not set
532# CONFIG_MTD_SLRAM is not set 549# CONFIG_MTD_SLRAM is not set
533# CONFIG_MTD_PHRAM is not set 550# CONFIG_MTD_PHRAM is not set
534# CONFIG_MTD_MTDRAM is not set 551# CONFIG_MTD_MTDRAM is not set
@@ -561,7 +578,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
561# CONFIG_BLK_DEV_HD is not set 578# CONFIG_BLK_DEV_HD is not set
562CONFIG_MISC_DEVICES=y 579CONFIG_MISC_DEVICES=y
563# CONFIG_EEPROM_93CX6 is not set 580# CONFIG_EEPROM_93CX6 is not set
581# CONFIG_ICS932S401 is not set
564# CONFIG_ENCLOSURE_SERVICES is not set 582# CONFIG_ENCLOSURE_SERVICES is not set
583# CONFIG_C2PORT is not set
565CONFIG_HAVE_IDE=y 584CONFIG_HAVE_IDE=y
566# CONFIG_IDE is not set 585# CONFIG_IDE is not set
567 586
@@ -607,6 +626,7 @@ CONFIG_BFIN_RX_DESC_NUM=20
607# CONFIG_SMC91X is not set 626# CONFIG_SMC91X is not set
608# CONFIG_SMSC911X is not set 627# CONFIG_SMSC911X is not set
609# CONFIG_DM9000 is not set 628# CONFIG_DM9000 is not set
629# CONFIG_ENC28J60 is not set
610# CONFIG_IBM_NEW_EMAC_ZMII is not set 630# CONFIG_IBM_NEW_EMAC_ZMII is not set
611# CONFIG_IBM_NEW_EMAC_RGMII is not set 631# CONFIG_IBM_NEW_EMAC_RGMII is not set
612# CONFIG_IBM_NEW_EMAC_TAH is not set 632# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -764,7 +784,23 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
764# CONFIG_I2C_DEBUG_ALGO is not set 784# CONFIG_I2C_DEBUG_ALGO is not set
765# CONFIG_I2C_DEBUG_BUS is not set 785# CONFIG_I2C_DEBUG_BUS is not set
766# CONFIG_I2C_DEBUG_CHIP is not set 786# CONFIG_I2C_DEBUG_CHIP is not set
767# CONFIG_SPI is not set 787CONFIG_SPI=y
788# CONFIG_SPI_DEBUG is not set
789CONFIG_SPI_MASTER=y
790
791#
792# SPI Master Controller Drivers
793#
794CONFIG_SPI_BFIN=y
795# CONFIG_SPI_BFIN_LOCK is not set
796# CONFIG_SPI_BITBANG is not set
797
798#
799# SPI Protocol Masters
800#
801# CONFIG_SPI_AT25 is not set
802# CONFIG_SPI_SPIDEV is not set
803# CONFIG_SPI_TLE62X0 is not set
768CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 804CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
769# CONFIG_GPIOLIB is not set 805# CONFIG_GPIOLIB is not set
770# CONFIG_W1 is not set 806# CONFIG_W1 is not set
@@ -788,8 +824,10 @@ CONFIG_BFIN_WDT=y
788# CONFIG_MFD_SM501 is not set 824# CONFIG_MFD_SM501 is not set
789# CONFIG_HTC_PASIC3 is not set 825# CONFIG_HTC_PASIC3 is not set
790# CONFIG_MFD_TMIO is not set 826# CONFIG_MFD_TMIO is not set
827# CONFIG_PMIC_DA903X is not set
791# CONFIG_MFD_WM8400 is not set 828# CONFIG_MFD_WM8400 is not set
792# CONFIG_MFD_WM8350_I2C is not set 829# CONFIG_MFD_WM8350_I2C is not set
830# CONFIG_REGULATOR is not set
793 831
794# 832#
795# Multimedia devices 833# Multimedia devices
@@ -861,10 +899,18 @@ CONFIG_RTC_INTF_DEV=y
861# CONFIG_RTC_DRV_M41T80 is not set 899# CONFIG_RTC_DRV_M41T80 is not set
862# CONFIG_RTC_DRV_S35390A is not set 900# CONFIG_RTC_DRV_S35390A is not set
863# CONFIG_RTC_DRV_FM3130 is not set 901# CONFIG_RTC_DRV_FM3130 is not set
902# CONFIG_RTC_DRV_RX8581 is not set
864 903
865# 904#
866# SPI RTC drivers 905# SPI RTC drivers
867# 906#
907# CONFIG_RTC_DRV_M41T94 is not set
908# CONFIG_RTC_DRV_DS1305 is not set
909# CONFIG_RTC_DRV_DS1390 is not set
910# CONFIG_RTC_DRV_MAX6902 is not set
911# CONFIG_RTC_DRV_R9701 is not set
912# CONFIG_RTC_DRV_RS5C348 is not set
913# CONFIG_RTC_DRV_DS3234 is not set
868 914
869# 915#
870# Platform RTC drivers 916# Platform RTC drivers
@@ -1062,12 +1108,20 @@ CONFIG_DEBUG_INFO=y
1062# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1108# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1063# CONFIG_FAULT_INJECTION is not set 1109# CONFIG_FAULT_INJECTION is not set
1064CONFIG_SYSCTL_SYSCALL_CHECK=y 1110CONFIG_SYSCTL_SYSCALL_CHECK=y
1111
1112#
1113# Tracers
1114#
1115# CONFIG_SCHED_TRACER is not set
1116# CONFIG_CONTEXT_SWITCH_TRACER is not set
1117# CONFIG_BOOT_TRACER is not set
1065# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1118# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1066# CONFIG_SAMPLES is not set 1119# CONFIG_SAMPLES is not set
1067CONFIG_HAVE_ARCH_KGDB=y 1120CONFIG_HAVE_ARCH_KGDB=y
1068# CONFIG_KGDB is not set 1121# CONFIG_KGDB is not set
1069# CONFIG_DEBUG_STACKOVERFLOW is not set 1122# CONFIG_DEBUG_STACKOVERFLOW is not set
1070# CONFIG_DEBUG_STACK_USAGE is not set 1123# CONFIG_DEBUG_STACK_USAGE is not set
1124# CONFIG_KGDB_TESTCASE is not set
1071CONFIG_DEBUG_VERBOSE=y 1125CONFIG_DEBUG_VERBOSE=y
1072CONFIG_DEBUG_MMRS=y 1126CONFIG_DEBUG_MMRS=y
1073# CONFIG_DEBUG_HWERR is not set 1127# CONFIG_DEBUG_HWERR is not set
@@ -1100,6 +1154,7 @@ CONFIG_CRYPTO=y
1100# 1154#
1101# CONFIG_CRYPTO_FIPS is not set 1155# CONFIG_CRYPTO_FIPS is not set
1102# CONFIG_CRYPTO_MANAGER is not set 1156# CONFIG_CRYPTO_MANAGER is not set
1157# CONFIG_CRYPTO_MANAGER2 is not set
1103# CONFIG_CRYPTO_GF128MUL is not set 1158# CONFIG_CRYPTO_GF128MUL is not set
1104# CONFIG_CRYPTO_NULL is not set 1159# CONFIG_CRYPTO_NULL is not set
1105# CONFIG_CRYPTO_CRYPTD is not set 1160# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 833128b39724..a50050f17706 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -327,8 +327,8 @@ CONFIG_BFIN_ICACHE=y
327CONFIG_BFIN_DCACHE=y 327CONFIG_BFIN_DCACHE=y
328# CONFIG_BFIN_DCACHE_BANKA is not set 328# CONFIG_BFIN_DCACHE_BANKA is not set
329# CONFIG_BFIN_ICACHE_LOCK is not set 329# CONFIG_BFIN_ICACHE_LOCK is not set
330# CONFIG_BFIN_WB is not set 330CONFIG_BFIN_WB=y
331CONFIG_BFIN_WT=y 331# CONFIG_BFIN_WT is not set
332# CONFIG_MPU is not set 332# CONFIG_MPU is not set
333 333
334# 334#
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 334c94b51c40..0a2a00d63887 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y
290CONFIG_BFIN_DCACHE=y 290CONFIG_BFIN_DCACHE=y
291# CONFIG_BFIN_DCACHE_BANKA is not set 291# CONFIG_BFIN_DCACHE_BANKA is not set
292# CONFIG_BFIN_ICACHE_LOCK is not set 292# CONFIG_BFIN_ICACHE_LOCK is not set
293# CONFIG_BFIN_WB is not set 293CONFIG_BFIN_WB=y
294CONFIG_BFIN_WT=y 294# CONFIG_BFIN_WT is not set
295# CONFIG_MPU is not set 295# CONFIG_MPU is not set
296 296
297# 297#
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index 9d733436e300..eb027587a355 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y
290CONFIG_BFIN_DCACHE=y 290CONFIG_BFIN_DCACHE=y
291# CONFIG_BFIN_DCACHE_BANKA is not set 291# CONFIG_BFIN_DCACHE_BANKA is not set
292# CONFIG_BFIN_ICACHE_LOCK is not set 292# CONFIG_BFIN_ICACHE_LOCK is not set
293# CONFIG_BFIN_WB is not set 293CONFIG_BFIN_WB=y
294CONFIG_BFIN_WT=y 294# CONFIG_BFIN_WT is not set
295# CONFIG_MPU is not set 295# CONFIG_MPU is not set
296 296
297# 297#
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 4fb4108d3103..9e62b9f40eb1 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -298,8 +298,8 @@ CONFIG_BFIN_ICACHE=y
298CONFIG_BFIN_DCACHE=y 298CONFIG_BFIN_DCACHE=y
299# CONFIG_BFIN_DCACHE_BANKA is not set 299# CONFIG_BFIN_DCACHE_BANKA is not set
300# CONFIG_BFIN_ICACHE_LOCK is not set 300# CONFIG_BFIN_ICACHE_LOCK is not set
301# CONFIG_BFIN_WB is not set 301CONFIG_BFIN_WB=y
302CONFIG_BFIN_WT=y 302# CONFIG_BFIN_WT is not set
303# CONFIG_MPU is not set 303# CONFIG_MPU is not set
304 304
305# 305#
@@ -568,15 +568,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
568# CONFIG_MTD_DOC2000 is not set 568# CONFIG_MTD_DOC2000 is not set
569# CONFIG_MTD_DOC2001 is not set 569# CONFIG_MTD_DOC2001 is not set
570# CONFIG_MTD_DOC2001PLUS is not set 570# CONFIG_MTD_DOC2001PLUS is not set
571CONFIG_MTD_NAND=m 571# CONFIG_MTD_NAND is not set
572# CONFIG_MTD_NAND_VERIFY_WRITE is not set
573# CONFIG_MTD_NAND_ECC_SMC is not set
574# CONFIG_MTD_NAND_MUSEUM_IDS is not set
575# CONFIG_MTD_NAND_BFIN is not set
576CONFIG_MTD_NAND_IDS=m
577# CONFIG_MTD_NAND_DISKONCHIP is not set
578# CONFIG_MTD_NAND_NANDSIM is not set
579CONFIG_MTD_NAND_PLATFORM=m
580# CONFIG_MTD_ONENAND is not set 572# CONFIG_MTD_ONENAND is not set
581 573
582# 574#
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig
index cb32f5624a1b..dd6ad6be1c87 100644
--- a/arch/blackfin/configs/BF538-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF538-EZKIT_defconfig
@@ -306,8 +306,8 @@ CONFIG_BFIN_ICACHE=y
306CONFIG_BFIN_DCACHE=y 306CONFIG_BFIN_DCACHE=y
307# CONFIG_BFIN_DCACHE_BANKA is not set 307# CONFIG_BFIN_DCACHE_BANKA is not set
308# CONFIG_BFIN_ICACHE_LOCK is not set 308# CONFIG_BFIN_ICACHE_LOCK is not set
309# CONFIG_BFIN_WB is not set 309CONFIG_BFIN_WB=y
310CONFIG_BFIN_WT=y 310# CONFIG_BFIN_WT is not set
311# CONFIG_MPU is not set 311# CONFIG_MPU is not set
312 312
313# 313#
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index 0f8697618aa5..6bc2fb1b2a70 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -361,8 +361,8 @@ CONFIG_BFIN_ICACHE=y
361CONFIG_BFIN_DCACHE=y 361CONFIG_BFIN_DCACHE=y
362# CONFIG_BFIN_DCACHE_BANKA is not set 362# CONFIG_BFIN_DCACHE_BANKA is not set
363# CONFIG_BFIN_ICACHE_LOCK is not set 363# CONFIG_BFIN_ICACHE_LOCK is not set
364# CONFIG_BFIN_WB is not set 364CONFIG_BFIN_WB=y
365CONFIG_BFIN_WT=y 365# CONFIG_BFIN_WT is not set
366# CONFIG_BFIN_L2_CACHEABLE is not set 366# CONFIG_BFIN_L2_CACHEABLE is not set
367# CONFIG_MPU is not set 367# CONFIG_MPU is not set
368 368
@@ -680,7 +680,7 @@ CONFIG_SCSI=y
680CONFIG_SCSI_DMA=y 680CONFIG_SCSI_DMA=y
681# CONFIG_SCSI_TGT is not set 681# CONFIG_SCSI_TGT is not set
682# CONFIG_SCSI_NETLINK is not set 682# CONFIG_SCSI_NETLINK is not set
683CONFIG_SCSI_PROC_FS=y 683# CONFIG_SCSI_PROC_FS is not set
684 684
685# 685#
686# SCSI support type (disk, tape, CD-ROM) 686# SCSI support type (disk, tape, CD-ROM)
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index 042c7adfccfa..69714fb3e608 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -329,8 +329,8 @@ CONFIG_BFIN_ICACHE=y
329CONFIG_BFIN_DCACHE=y 329CONFIG_BFIN_DCACHE=y
330# CONFIG_BFIN_DCACHE_BANKA is not set 330# CONFIG_BFIN_DCACHE_BANKA is not set
331# CONFIG_BFIN_ICACHE_LOCK is not set 331# CONFIG_BFIN_ICACHE_LOCK is not set
332# CONFIG_BFIN_WB is not set 332CONFIG_BFIN_WB=y
333CONFIG_BFIN_WT=y 333# CONFIG_BFIN_WT is not set
334# CONFIG_BFIN_L2_CACHEABLE is not set 334# CONFIG_BFIN_L2_CACHEABLE is not set
335# CONFIG_MPU is not set 335# CONFIG_MPU is not set
336 336
diff --git a/arch/blackfin/configs/BlackStamp_defconfig b/arch/blackfin/configs/BlackStamp_defconfig
index 3a20e281d23c..017c6ea071b5 100644
--- a/arch/blackfin/configs/BlackStamp_defconfig
+++ b/arch/blackfin/configs/BlackStamp_defconfig
@@ -288,8 +288,8 @@ CONFIG_BFIN_ICACHE=y
288CONFIG_BFIN_DCACHE=y 288CONFIG_BFIN_DCACHE=y
289# CONFIG_BFIN_DCACHE_BANKA is not set 289# CONFIG_BFIN_DCACHE_BANKA is not set
290# CONFIG_BFIN_ICACHE_LOCK is not set 290# CONFIG_BFIN_ICACHE_LOCK is not set
291# CONFIG_BFIN_WB is not set 291CONFIG_BFIN_WB=y
292CONFIG_BFIN_WT=y 292# CONFIG_BFIN_WT is not set
293# CONFIG_MPU is not set 293# CONFIG_MPU is not set
294 294
295# 295#
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig
index 865ed85a5760..d880ef786770 100644
--- a/arch/blackfin/configs/CM-BF527_defconfig
+++ b/arch/blackfin/configs/CM-BF527_defconfig
@@ -332,8 +332,8 @@ CONFIG_BFIN_ICACHE=y
332CONFIG_BFIN_DCACHE=y 332CONFIG_BFIN_DCACHE=y
333# CONFIG_BFIN_DCACHE_BANKA is not set 333# CONFIG_BFIN_DCACHE_BANKA is not set
334# CONFIG_BFIN_ICACHE_LOCK is not set 334# CONFIG_BFIN_ICACHE_LOCK is not set
335# CONFIG_BFIN_WB is not set 335CONFIG_BFIN_WB=y
336CONFIG_BFIN_WT=y 336# CONFIG_BFIN_WT is not set
337# CONFIG_MPU is not set 337# CONFIG_MPU is not set
338 338
339# 339#
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig
index efe9741b1f14..f410430b4e3d 100644
--- a/arch/blackfin/configs/CM-BF548_defconfig
+++ b/arch/blackfin/configs/CM-BF548_defconfig
@@ -336,8 +336,8 @@ CONFIG_BFIN_ICACHE=y
336CONFIG_BFIN_DCACHE=y 336CONFIG_BFIN_DCACHE=y
337# CONFIG_BFIN_DCACHE_BANKA is not set 337# CONFIG_BFIN_DCACHE_BANKA is not set
338# CONFIG_BFIN_ICACHE_LOCK is not set 338# CONFIG_BFIN_ICACHE_LOCK is not set
339# CONFIG_BFIN_WB is not set 339CONFIG_BFIN_WB=y
340CONFIG_BFIN_WT=y 340# CONFIG_BFIN_WT is not set
341CONFIG_L1_MAX_PIECE=16 341CONFIG_L1_MAX_PIECE=16
342# CONFIG_MPU is not set 342# CONFIG_MPU is not set
343 343
@@ -595,7 +595,7 @@ CONFIG_SCSI=y
595CONFIG_SCSI_DMA=y 595CONFIG_SCSI_DMA=y
596# CONFIG_SCSI_TGT is not set 596# CONFIG_SCSI_TGT is not set
597# CONFIG_SCSI_NETLINK is not set 597# CONFIG_SCSI_NETLINK is not set
598CONFIG_SCSI_PROC_FS=y 598# CONFIG_SCSI_PROC_FS is not set
599 599
600# 600#
601# SCSI support type (disk, tape, CD-ROM) 601# SCSI support type (disk, tape, CD-ROM)
diff --git a/arch/blackfin/configs/IP0X_defconfig b/arch/blackfin/configs/IP0X_defconfig
index eae83b5de92f..7db93874c987 100644
--- a/arch/blackfin/configs/IP0X_defconfig
+++ b/arch/blackfin/configs/IP0X_defconfig
@@ -612,7 +612,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
612CONFIG_SCSI=y 612CONFIG_SCSI=y
613# CONFIG_SCSI_TGT is not set 613# CONFIG_SCSI_TGT is not set
614# CONFIG_SCSI_NETLINK is not set 614# CONFIG_SCSI_NETLINK is not set
615CONFIG_SCSI_PROC_FS=y 615# CONFIG_SCSI_PROC_FS is not set
616 616
617# 617#
618# SCSI support type (disk, tape, CD-ROM) 618# SCSI support type (disk, tape, CD-ROM)
diff --git a/arch/blackfin/configs/SRV1_defconfig b/arch/blackfin/configs/SRV1_defconfig
index fa580affc9d6..a46529c6ade3 100644
--- a/arch/blackfin/configs/SRV1_defconfig
+++ b/arch/blackfin/configs/SRV1_defconfig
@@ -282,8 +282,8 @@ CONFIG_BFIN_ICACHE=y
282CONFIG_BFIN_DCACHE=y 282CONFIG_BFIN_DCACHE=y
283# CONFIG_BFIN_DCACHE_BANKA is not set 283# CONFIG_BFIN_DCACHE_BANKA is not set
284# CONFIG_BFIN_ICACHE_LOCK is not set 284# CONFIG_BFIN_ICACHE_LOCK is not set
285# CONFIG_BFIN_WB is not set 285CONFIG_BFIN_WB=y
286CONFIG_BFIN_WT=y 286# CONFIG_BFIN_WT is not set
287CONFIG_L1_MAX_PIECE=16 287CONFIG_L1_MAX_PIECE=16
288 288
289# 289#
diff --git a/arch/blackfin/include/asm/Kbuild b/arch/blackfin/include/asm/Kbuild
index 606ecfdcc962..09c31418cc08 100644
--- a/arch/blackfin/include/asm/Kbuild
+++ b/arch/blackfin/include/asm/Kbuild
@@ -1,3 +1,4 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3unifdef-y += bfin_sport.h
3unifdef-y += fixed_code.h 4unifdef-y += fixed_code.h
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h
index fe88a2c19213..65a651db5b07 100644
--- a/arch/blackfin/include/asm/bfin_sport.h
+++ b/arch/blackfin/include/asm/bfin_sport.h
@@ -1,30 +1,9 @@
1/* 1/*
2 * File: include/asm-blackfin/bfin_sport.h 2 * bfin_sport.h - userspace header for bfin sport driver
3 * Based on:
4 * Author: Roy Huang (roy.huang@analog.com)
5 * 3 *
6 * Created: Thu Aug. 24 2006 4 * Copyright 2004-2008 Analog Devices Inc.
7 * Description:
8 * 5 *
9 * Modified: 6 * Licensed under the GPL-2 or later.
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 7 */
29 8
30#ifndef __BFIN_SPORT_H__ 9#ifndef __BFIN_SPORT_H__
@@ -42,11 +21,10 @@
42#define NORM_FORMAT 0x0 21#define NORM_FORMAT 0x0
43#define ALAW_FORMAT 0x2 22#define ALAW_FORMAT 0x2
44#define ULAW_FORMAT 0x3 23#define ULAW_FORMAT 0x3
45struct sport_register;
46 24
47/* Function driver which use sport must initialize the structure */ 25/* Function driver which use sport must initialize the structure */
48struct sport_config { 26struct sport_config {
49 /*TDM (multichannels), I2S or other mode */ 27 /* TDM (multichannels), I2S or other mode */
50 unsigned int mode:3; 28 unsigned int mode:3;
51 29
52 /* if TDM mode is selected, channels must be set */ 30 /* if TDM mode is selected, channels must be set */
@@ -72,12 +50,18 @@ struct sport_config {
72 int serial_clk; 50 int serial_clk;
73 int fsync_clk; 51 int fsync_clk;
74 52
75 unsigned int data_format:2; /*Normal, u-law or a-law */ 53 unsigned int data_format:2; /* Normal, u-law or a-law */
76 54
77 int word_len; /* How length of the word in bits, 3-32 bits */ 55 int word_len; /* How length of the word in bits, 3-32 bits */
78 int dma_enabled; 56 int dma_enabled;
79}; 57};
80 58
59/* Userspace interface */
60#define SPORT_IOC_MAGIC 'P'
61#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
62
63#ifdef __KERNEL__
64
81struct sport_register { 65struct sport_register {
82 unsigned short tcr1; 66 unsigned short tcr1;
83 unsigned short reserved0; 67 unsigned short reserved0;
@@ -117,9 +101,6 @@ struct sport_register {
117 unsigned long mrcs3; 101 unsigned long mrcs3;
118}; 102};
119 103
120#define SPORT_IOC_MAGIC 'P'
121#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
122
123struct sport_dev { 104struct sport_dev {
124 struct cdev cdev; /* Char device structure */ 105 struct cdev cdev; /* Char device structure */
125 106
@@ -149,6 +130,8 @@ struct sport_dev {
149 struct sport_config config; 130 struct sport_config config;
150}; 131};
151 132
133#endif
134
152#define SPORT_TCR1 0 135#define SPORT_TCR1 0
153#define SPORT_TCR2 1 136#define SPORT_TCR2 1
154#define SPORT_TCLKDIV 2 137#define SPORT_TCLKDIV 2
@@ -169,4 +152,4 @@ struct sport_dev {
169#define SPORT_MRCS2 22 152#define SPORT_MRCS2 22
170#define SPORT_MRCS3 23 153#define SPORT_MRCS3 23
171 154
172#endif /*__BFIN_SPORT_H__*/ 155#endif
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h
index 76f53d8b9a0d..343b56361ec9 100644
--- a/arch/blackfin/include/asm/ipipe.h
+++ b/arch/blackfin/include/asm/ipipe.h
@@ -35,9 +35,9 @@
35#include <asm/atomic.h> 35#include <asm/atomic.h>
36#include <asm/traps.h> 36#include <asm/traps.h>
37 37
38#define IPIPE_ARCH_STRING "1.8-00" 38#define IPIPE_ARCH_STRING "1.9-00"
39#define IPIPE_MAJOR_NUMBER 1 39#define IPIPE_MAJOR_NUMBER 1
40#define IPIPE_MINOR_NUMBER 8 40#define IPIPE_MINOR_NUMBER 9
41#define IPIPE_PATCH_NUMBER 0 41#define IPIPE_PATCH_NUMBER 0
42 42
43#ifdef CONFIG_SMP 43#ifdef CONFIG_SMP
@@ -83,9 +83,9 @@ struct ipipe_sysinfo {
83 "%2 = CYCLES2\n" \ 83 "%2 = CYCLES2\n" \
84 "CC = %2 == %0\n" \ 84 "CC = %2 == %0\n" \
85 "if ! CC jump 1b\n" \ 85 "if ! CC jump 1b\n" \
86 : "=r" (((unsigned long *)&t)[1]), \ 86 : "=d,a" (((unsigned long *)&t)[1]), \
87 "=r" (((unsigned long *)&t)[0]), \ 87 "=d,a" (((unsigned long *)&t)[0]), \
88 "=r" (__cy2) \ 88 "=d,a" (__cy2) \
89 : /*no input*/ : "CC"); \ 89 : /*no input*/ : "CC"); \
90 t; \ 90 t; \
91 }) 91 })
@@ -118,35 +118,40 @@ void __ipipe_disable_irqdesc(struct ipipe_domain *ipd,
118 118
119#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq)) 119#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq))
120 120
121#define __ipipe_lock_root() \ 121static inline int __ipipe_check_tickdev(const char *devname)
122 set_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) 122{
123 return 1;
124}
123 125
124#define __ipipe_unlock_root() \ 126static inline void __ipipe_lock_root(void)
125 clear_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) 127{
128 set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
129}
130
131static inline void __ipipe_unlock_root(void)
132{
133 clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
134}
126 135
127void __ipipe_enable_pipeline(void); 136void __ipipe_enable_pipeline(void);
128 137
129#define __ipipe_hook_critical_ipi(ipd) do { } while (0) 138#define __ipipe_hook_critical_ipi(ipd) do { } while (0)
130 139
131#define __ipipe_sync_pipeline(syncmask) \ 140#define __ipipe_sync_pipeline ___ipipe_sync_pipeline
132 do { \ 141void ___ipipe_sync_pipeline(unsigned long syncmask);
133 struct ipipe_domain *ipd = ipipe_current_domain; \
134 if (likely(ipd != ipipe_root_domain || !test_bit(IPIPE_ROOTLOCK_FLAG, &ipd->flags))) \
135 __ipipe_sync_stage(syncmask); \
136 } while (0)
137 142
138void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs); 143void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs);
139 144
140int __ipipe_get_irq_priority(unsigned irq); 145int __ipipe_get_irq_priority(unsigned irq);
141 146
142int __ipipe_get_irqthread_priority(unsigned irq);
143
144void __ipipe_stall_root_raw(void); 147void __ipipe_stall_root_raw(void);
145 148
146void __ipipe_unstall_root_raw(void); 149void __ipipe_unstall_root_raw(void);
147 150
148void __ipipe_serial_debug(const char *fmt, ...); 151void __ipipe_serial_debug(const char *fmt, ...);
149 152
153asmlinkage void __ipipe_call_irqtail(unsigned long addr);
154
150DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs); 155DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
151 156
152extern unsigned long __ipipe_core_clock; 157extern unsigned long __ipipe_core_clock;
@@ -162,42 +167,25 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul)
162 167
163#define __ipipe_run_irqtail() /* Must be a macro */ \ 168#define __ipipe_run_irqtail() /* Must be a macro */ \
164 do { \ 169 do { \
165 asmlinkage void __ipipe_call_irqtail(void); \
166 unsigned long __pending; \ 170 unsigned long __pending; \
167 CSYNC(); \ 171 CSYNC(); \
168 __pending = bfin_read_IPEND(); \ 172 __pending = bfin_read_IPEND(); \
169 if (__pending & 0x8000) { \ 173 if (__pending & 0x8000) { \
170 __pending &= ~0x8010; \ 174 __pending &= ~0x8010; \
171 if (__pending && (__pending & (__pending - 1)) == 0) \ 175 if (__pending && (__pending & (__pending - 1)) == 0) \
172 __ipipe_call_irqtail(); \ 176 __ipipe_call_irqtail(__ipipe_irq_tail_hook); \
173 } \ 177 } \
174 } while (0) 178 } while (0)
175 179
176#define __ipipe_run_isr(ipd, irq) \ 180#define __ipipe_run_isr(ipd, irq) \
177 do { \ 181 do { \
178 if (ipd == ipipe_root_domain) { \ 182 if (ipd == ipipe_root_domain) { \
179 /* \ 183 local_irq_enable_hw(); \
180 * Note: the I-pipe implements a threaded interrupt model on \ 184 if (ipipe_virtual_irq_p(irq)) \
181 * this arch for Linux external IRQs. The interrupt handler we \
182 * call here only wakes up the associated IRQ thread. \
183 */ \
184 if (ipipe_virtual_irq_p(irq)) { \
185 /* No irqtail here; virtual interrupts have no effect \
186 on IPEND so there is no need for processing \
187 deferral. */ \
188 local_irq_enable_nohead(ipd); \
189 ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ 185 ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
190 local_irq_disable_nohead(ipd); \ 186 else \
191 } else \
192 /* \
193 * No need to run the irqtail here either; \
194 * we can't be preempted by hw IRQs, so \
195 * non-Linux IRQs cannot stack over the short \
196 * thread wakeup code. Which in turn means \
197 * that no irqtail condition could be pending \
198 * for domains above Linux in the pipeline. \
199 */ \
200 ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \ 187 ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \
188 local_irq_disable_hw(); \
201 } else { \ 189 } else { \
202 __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ 190 __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
203 local_irq_enable_nohead(ipd); \ 191 local_irq_enable_nohead(ipd); \
@@ -217,42 +205,24 @@ void ipipe_init_irq_threads(void);
217 205
218int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); 206int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
219 207
220#define IS_SYSIRQ(irq) ((irq) > IRQ_CORETMR && (irq) <= SYS_IRQS) 208#ifdef CONFIG_GENERIC_CLOCKEVENTS
221#define IS_GPIOIRQ(irq) ((irq) >= GPIO_IRQ_BASE && (irq) < NR_IRQS) 209#define IRQ_SYSTMR IRQ_CORETMR
222 210#define IRQ_PRIOTMR IRQ_CORETMR
211#else
223#define IRQ_SYSTMR IRQ_TIMER0 212#define IRQ_SYSTMR IRQ_TIMER0
224#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0 213#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0
214#endif
225 215
226#if defined(CONFIG_BF531) || defined(CONFIG_BF532) || defined(CONFIG_BF533) 216#ifdef CONFIG_BF561
227#define PRIO_GPIODEMUX(irq) CONFIG_PFA
228#elif defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537)
229#define PRIO_GPIODEMUX(irq) CONFIG_IRQ_PROG_INTA
230#elif defined(CONFIG_BF52x)
231#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PORTF_INTA ? CONFIG_IRQ_PORTF_INTA : \
232 (irq) == IRQ_PORTG_INTA ? CONFIG_IRQ_PORTG_INTA : \
233 (irq) == IRQ_PORTH_INTA ? CONFIG_IRQ_PORTH_INTA : \
234 -1)
235#elif defined(CONFIG_BF561)
236#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PROG0_INTA ? CONFIG_IRQ_PROG0_INTA : \
237 (irq) == IRQ_PROG1_INTA ? CONFIG_IRQ_PROG1_INTA : \
238 (irq) == IRQ_PROG2_INTA ? CONFIG_IRQ_PROG2_INTA : \
239 -1)
240#define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val) 217#define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val)
241#define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val) 218#define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val)
242#define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val) 219#define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val)
243#define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS() 220#define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS()
244#elif defined(CONFIG_BF54x) 221#elif defined(CONFIG_BF54x)
245#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PINT0 ? CONFIG_IRQ_PINT0 : \
246 (irq) == IRQ_PINT1 ? CONFIG_IRQ_PINT1 : \
247 (irq) == IRQ_PINT2 ? CONFIG_IRQ_PINT2 : \
248 (irq) == IRQ_PINT3 ? CONFIG_IRQ_PINT3 : \
249 -1)
250#define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val) 222#define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val)
251#define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val) 223#define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val)
252#define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val) 224#define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val)
253#define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val) 225#define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val)
254#else
255# error "no PRIO_GPIODEMUX() for this part"
256#endif 226#endif
257 227
258#define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0) 228#define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0)
@@ -275,4 +245,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
275 245
276#endif /* !CONFIG_IPIPE */ 246#endif /* !CONFIG_IPIPE */
277 247
248#define ipipe_update_tick_evtdev(evtdev) do { } while (0)
249
278#endif /* !__ASM_BLACKFIN_IPIPE_H */ 250#endif /* !__ASM_BLACKFIN_IPIPE_H */
diff --git a/arch/blackfin/include/asm/ipipe_base.h b/arch/blackfin/include/asm/ipipe_base.h
index cb1025aeabcf..3e8acbd1a3be 100644
--- a/arch/blackfin/include/asm/ipipe_base.h
+++ b/arch/blackfin/include/asm/ipipe_base.h
@@ -1,5 +1,5 @@
1/* -*- linux-c -*- 1/* -*- linux-c -*-
2 * include/asm-blackfin/_baseipipe.h 2 * include/asm-blackfin/ipipe_base.h
3 * 3 *
4 * Copyright (C) 2007 Philippe Gerum. 4 * Copyright (C) 2007 Philippe Gerum.
5 * 5 *
@@ -27,8 +27,9 @@
27#define IPIPE_NR_XIRQS NR_IRQS 27#define IPIPE_NR_XIRQS NR_IRQS
28#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */ 28#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */
29 29
30/* Blackfin-specific, global domain flags */ 30/* Blackfin-specific, per-cpu pipeline status */
31#define IPIPE_ROOTLOCK_FLAG 1 /* Lock pipeline for root */ 31#define IPIPE_SYNCDEFER_FLAG 15
32#define IPIPE_SYNCDEFER_MASK (1L << IPIPE_SYNCDEFER_MASK)
32 33
33 /* Blackfin traps -- i.e. exception vector numbers */ 34 /* Blackfin traps -- i.e. exception vector numbers */
34#define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */ 35#define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */
@@ -48,11 +49,6 @@
48 49
49#ifndef __ASSEMBLY__ 50#ifndef __ASSEMBLY__
50 51
51#include <linux/bitops.h>
52
53extern int test_bit(int nr, const void *addr);
54
55
56extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ 52extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */
57 53
58static inline void __ipipe_stall_root(void) 54static inline void __ipipe_stall_root(void)
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index 3d977909ce7d..7645e85a5f6f 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -61,20 +61,38 @@ void __ipipe_restore_root(unsigned long flags);
61#define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags)) 61#define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags))
62#define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x) 62#define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x)
63 63
64#define local_save_flags(x) \ 64#define local_save_flags(x) \
65 do { \ 65 do { \
66 (x) = __ipipe_test_root() ? \ 66 (x) = __ipipe_test_root() ? \
67 __all_masked_irq_flags : bfin_irq_flags; \ 67 __all_masked_irq_flags : bfin_irq_flags; \
68 barrier(); \
68 } while (0) 69 } while (0)
69 70
70#define local_irq_save(x) \ 71#define local_irq_save(x) \
71 do { \ 72 do { \
72 (x) = __ipipe_test_and_stall_root(); \ 73 (x) = __ipipe_test_and_stall_root() ? \
74 __all_masked_irq_flags : bfin_irq_flags; \
75 barrier(); \
76 } while (0)
77
78static inline void local_irq_restore(unsigned long x)
79{
80 barrier();
81 __ipipe_restore_root(x == __all_masked_irq_flags);
82}
83
84#define local_irq_disable() \
85 do { \
86 __ipipe_stall_root(); \
87 barrier(); \
73 } while (0) 88 } while (0)
74 89
75#define local_irq_restore(x) __ipipe_restore_root(x) 90static inline void local_irq_enable(void)
76#define local_irq_disable() __ipipe_stall_root() 91{
77#define local_irq_enable() __ipipe_unstall_root() 92 barrier();
93 __ipipe_unstall_root();
94}
95
78#define irqs_disabled() __ipipe_test_root() 96#define irqs_disabled() __ipipe_test_root()
79 97
80#define local_save_flags_hw(x) \ 98#define local_save_flags_hw(x) \
diff --git a/arch/blackfin/include/asm/percpu.h b/arch/blackfin/include/asm/percpu.h
index 797c0c165069..c94c7bc88c71 100644
--- a/arch/blackfin/include/asm/percpu.h
+++ b/arch/blackfin/include/asm/percpu.h
@@ -3,14 +3,4 @@
3 3
4#include <asm-generic/percpu.h> 4#include <asm-generic/percpu.h>
5 5
6#ifdef CONFIG_MODULES
7#define PERCPU_MODULE_RESERVE 8192
8#else
9#define PERCPU_MODULE_RESERVE 0
10#endif
11
12#define PERCPU_ENOUGH_ROOM \
13 (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
14 PERCPU_MODULE_RESERVE)
15
16#endif /* __ARCH_BLACKFIN_PERCPU__ */ 6#endif /* __ARCH_BLACKFIN_PERCPU__ */
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h
index e721ce55956c..2920087516f2 100644
--- a/arch/blackfin/include/asm/thread_info.h
+++ b/arch/blackfin/include/asm/thread_info.h
@@ -122,6 +122,7 @@ static inline struct thread_info *current_thread_info(void)
122#define TIF_MEMDIE 4 122#define TIF_MEMDIE 4
123#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ 123#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
124#define TIF_FREEZE 6 /* is freezing for suspend */ 124#define TIF_FREEZE 6 /* is freezing for suspend */
125#define TIF_IRQ_SYNC 7 /* sync pipeline stage */
125 126
126/* as above, but as bit values */ 127/* as above, but as bit values */
127#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 128#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
@@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void)
130#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 131#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
131#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 132#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
132#define _TIF_FREEZE (1<<TIF_FREEZE) 133#define _TIF_FREEZE (1<<TIF_FREEZE)
134#define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC)
133 135
134#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ 136#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
135 137
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index 4a92a86824b7..fd4d4328a0f2 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -15,13 +15,15 @@ else
15 obj-y += time.o 15 obj-y += time.o
16endif 16endif
17 17
18CFLAGS_kgdb_test.o := -mlong-calls -O0
19
20obj-$(CONFIG_IPIPE) += ipipe.o 18obj-$(CONFIG_IPIPE) += ipipe.o
21obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o 19obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o
22obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o 20obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
23obj-$(CONFIG_CPLB_INFO) += cplbinfo.o 21obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
24obj-$(CONFIG_MODULES) += module.o 22obj-$(CONFIG_MODULES) += module.o
25obj-$(CONFIG_KGDB) += kgdb.o 23obj-$(CONFIG_KGDB) += kgdb.o
26obj-$(CONFIG_KGDB_TESTCASE) += kgdb_test.o 24obj-$(CONFIG_KGDB_TESTS) += kgdb_test.o
27obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 25obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
26
27# the kgdb test puts code into L2 and without linker
28# relaxation, we need to force long calls to/from it
29CFLAGS_kgdb_test.o := -mlong-calls -O0
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index 0e28f7595733..d6c067782e63 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -53,9 +53,13 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
53 53
54 i_d = i_i = 0; 54 i_d = i_i = 0;
55 55
56#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO
56 /* Set up the zero page. */ 57 /* Set up the zero page. */
57 d_tbl[i_d].addr = 0; 58 d_tbl[i_d].addr = 0;
58 d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; 59 d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
60 i_tbl[i_i].addr = 0;
61 i_tbl[i_i++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
62#endif
59 63
60 /* Cover kernel memory with 4M pages. */ 64 /* Cover kernel memory with 4M pages. */
61 addr = 0; 65 addr = 0;
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c
index 339be5a3ae6a..a5de8d45424c 100644
--- a/arch/blackfin/kernel/ipipe.c
+++ b/arch/blackfin/kernel/ipipe.c
@@ -35,14 +35,8 @@
35#include <asm/atomic.h> 35#include <asm/atomic.h>
36#include <asm/io.h> 36#include <asm/io.h>
37 37
38static int create_irq_threads;
39
40DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); 38DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
41 39
42static DEFINE_PER_CPU(unsigned long, pending_irqthread_mask);
43
44static DEFINE_PER_CPU(int [IVG13 + 1], pending_irq_count);
45
46asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); 40asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs);
47 41
48static void __ipipe_no_irqtail(void); 42static void __ipipe_no_irqtail(void);
@@ -93,6 +87,7 @@ void __ipipe_enable_pipeline(void)
93 */ 87 */
94void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) 88void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
95{ 89{
90 struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
96 struct ipipe_domain *this_domain, *next_domain; 91 struct ipipe_domain *this_domain, *next_domain;
97 struct list_head *head, *pos; 92 struct list_head *head, *pos;
98 int m_ack, s = -1; 93 int m_ack, s = -1;
@@ -104,7 +99,6 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
104 * interrupt. 99 * interrupt.
105 */ 100 */
106 m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); 101 m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR);
107
108 this_domain = ipipe_current_domain; 102 this_domain = ipipe_current_domain;
109 103
110 if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))) 104 if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control)))
@@ -114,49 +108,28 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
114 next_domain = list_entry(head, struct ipipe_domain, p_link); 108 next_domain = list_entry(head, struct ipipe_domain, p_link);
115 if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) { 109 if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) {
116 if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) 110 if (!m_ack && next_domain->irqs[irq].acknowledge != NULL)
117 next_domain->irqs[irq].acknowledge(irq, irq_desc + irq); 111 next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq));
118 if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)) 112 if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
119 s = __test_and_set_bit(IPIPE_STALL_FLAG, 113 s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
120 &ipipe_root_cpudom_var(status));
121 __ipipe_dispatch_wired(next_domain, irq); 114 __ipipe_dispatch_wired(next_domain, irq);
122 goto finalize; 115 goto out;
123 return;
124 } 116 }
125 } 117 }
126 118
127 /* Ack the interrupt. */ 119 /* Ack the interrupt. */
128 120
129 pos = head; 121 pos = head;
130
131 while (pos != &__ipipe_pipeline) { 122 while (pos != &__ipipe_pipeline) {
132 next_domain = list_entry(pos, struct ipipe_domain, p_link); 123 next_domain = list_entry(pos, struct ipipe_domain, p_link);
133 /*
134 * For each domain handling the incoming IRQ, mark it
135 * as pending in its log.
136 */
137 if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) { 124 if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) {
138 /*
139 * Domains that handle this IRQ are polled for
140 * acknowledging it by decreasing priority
141 * order. The interrupt must be made pending
142 * _first_ in the domain's status flags before
143 * the PIC is unlocked.
144 */
145 __ipipe_set_irq_pending(next_domain, irq); 125 __ipipe_set_irq_pending(next_domain, irq);
146
147 if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) { 126 if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) {
148 next_domain->irqs[irq].acknowledge(irq, irq_desc + irq); 127 next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq));
149 m_ack = 1; 128 m_ack = 1;
150 } 129 }
151 } 130 }
152
153 /*
154 * If the domain does not want the IRQ to be passed
155 * down the interrupt pipe, exit the loop now.
156 */
157 if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control)) 131 if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control))
158 break; 132 break;
159
160 pos = next_domain->p_link.next; 133 pos = next_domain->p_link.next;
161 } 134 }
162 135
@@ -166,18 +139,24 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
166 * immediately to the current domain if the interrupt has been 139 * immediately to the current domain if the interrupt has been
167 * marked as 'sticky'. This search does not go beyond the 140 * marked as 'sticky'. This search does not go beyond the
168 * current domain in the pipeline. We also enforce the 141 * current domain in the pipeline. We also enforce the
169 * additional root stage lock (blackfin-specific). */ 142 * additional root stage lock (blackfin-specific).
143 */
144 if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
145 s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
170 146
171 if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)) 147 /*
172 s = __test_and_set_bit(IPIPE_STALL_FLAG, 148 * If the interrupt preempted the head domain, then do not
173 &ipipe_root_cpudom_var(status)); 149 * even try to walk the pipeline, unless an interrupt is
174finalize: 150 * pending for it.
151 */
152 if (test_bit(IPIPE_AHEAD_FLAG, &this_domain->flags) &&
153 ipipe_head_cpudom_var(irqpend_himask) == 0)
154 goto out;
175 155
176 __ipipe_walk_pipeline(head); 156 __ipipe_walk_pipeline(head);
177 157out:
178 if (!s) 158 if (!s)
179 __clear_bit(IPIPE_STALL_FLAG, 159 __clear_bit(IPIPE_STALL_FLAG, &p->status);
180 &ipipe_root_cpudom_var(status));
181} 160}
182 161
183int __ipipe_check_root(void) 162int __ipipe_check_root(void)
@@ -187,7 +166,7 @@ int __ipipe_check_root(void)
187 166
188void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) 167void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
189{ 168{
190 struct irq_desc *desc = irq_desc + irq; 169 struct irq_desc *desc = irq_to_desc(irq);
191 int prio = desc->ic_prio; 170 int prio = desc->ic_prio;
192 171
193 desc->depth = 0; 172 desc->depth = 0;
@@ -199,7 +178,7 @@ EXPORT_SYMBOL(__ipipe_enable_irqdesc);
199 178
200void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) 179void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
201{ 180{
202 struct irq_desc *desc = irq_desc + irq; 181 struct irq_desc *desc = irq_to_desc(irq);
203 int prio = desc->ic_prio; 182 int prio = desc->ic_prio;
204 183
205 if (ipd != &ipipe_root && 184 if (ipd != &ipipe_root &&
@@ -236,15 +215,18 @@ int __ipipe_syscall_root(struct pt_regs *regs)
236{ 215{
237 unsigned long flags; 216 unsigned long flags;
238 217
239 /* We need to run the IRQ tail hook whenever we don't 218 /*
219 * We need to run the IRQ tail hook whenever we don't
240 * propagate a syscall to higher domains, because we know that 220 * propagate a syscall to higher domains, because we know that
241 * important operations might be pending there (e.g. Xenomai 221 * important operations might be pending there (e.g. Xenomai
242 * deferred rescheduling). */ 222 * deferred rescheduling).
223 */
243 224
244 if (!__ipipe_syscall_watched_p(current, regs->orig_p0)) { 225 if (regs->orig_p0 < NR_syscalls) {
245 void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; 226 void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
246 hook(); 227 hook();
247 return 0; 228 if ((current->flags & PF_EVNOTIFY) == 0)
229 return 0;
248 } 230 }
249 231
250 /* 232 /*
@@ -312,112 +294,46 @@ int ipipe_trigger_irq(unsigned irq)
312{ 294{
313 unsigned long flags; 295 unsigned long flags;
314 296
297#ifdef CONFIG_IPIPE_DEBUG
315 if (irq >= IPIPE_NR_IRQS || 298 if (irq >= IPIPE_NR_IRQS ||
316 (ipipe_virtual_irq_p(irq) 299 (ipipe_virtual_irq_p(irq)
317 && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map))) 300 && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map)))
318 return -EINVAL; 301 return -EINVAL;
302#endif
319 303
320 local_irq_save_hw(flags); 304 local_irq_save_hw(flags);
321
322 __ipipe_handle_irq(irq, NULL); 305 __ipipe_handle_irq(irq, NULL);
323
324 local_irq_restore_hw(flags); 306 local_irq_restore_hw(flags);
325 307
326 return 1; 308 return 1;
327} 309}
328 310
329/* Move Linux IRQ to threads. */ 311asmlinkage void __ipipe_sync_root(void)
330
331static int do_irqd(void *__desc)
332{ 312{
333 struct irq_desc *desc = __desc; 313 unsigned long flags;
334 unsigned irq = desc - irq_desc;
335 int thrprio = desc->thr_prio;
336 int thrmask = 1 << thrprio;
337 int cpu = smp_processor_id();
338 cpumask_t cpumask;
339
340 sigfillset(&current->blocked);
341 current->flags |= PF_NOFREEZE;
342 cpumask = cpumask_of_cpu(cpu);
343 set_cpus_allowed(current, cpumask);
344 ipipe_setscheduler_root(current, SCHED_FIFO, 50 + thrprio);
345
346 while (!kthread_should_stop()) {
347 local_irq_disable();
348 if (!(desc->status & IRQ_SCHEDULED)) {
349 set_current_state(TASK_INTERRUPTIBLE);
350resched:
351 local_irq_enable();
352 schedule();
353 local_irq_disable();
354 }
355 __set_current_state(TASK_RUNNING);
356 /*
357 * If higher priority interrupt servers are ready to
358 * run, reschedule immediately. We need this for the
359 * GPIO demux IRQ handler to unmask the interrupt line
360 * _last_, after all GPIO IRQs have run.
361 */
362 if (per_cpu(pending_irqthread_mask, cpu) & ~(thrmask|(thrmask-1)))
363 goto resched;
364 if (--per_cpu(pending_irq_count[thrprio], cpu) == 0)
365 per_cpu(pending_irqthread_mask, cpu) &= ~thrmask;
366 desc->status &= ~IRQ_SCHEDULED;
367 desc->thr_handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs));
368 local_irq_enable();
369 }
370 __set_current_state(TASK_RUNNING);
371 return 0;
372}
373 314
374static void kick_irqd(unsigned irq, void *cookie) 315 BUG_ON(irqs_disabled());
375{
376 struct irq_desc *desc = irq_desc + irq;
377 int thrprio = desc->thr_prio;
378 int thrmask = 1 << thrprio;
379 int cpu = smp_processor_id();
380
381 if (!(desc->status & IRQ_SCHEDULED)) {
382 desc->status |= IRQ_SCHEDULED;
383 per_cpu(pending_irqthread_mask, cpu) |= thrmask;
384 ++per_cpu(pending_irq_count[thrprio], cpu);
385 wake_up_process(desc->thread);
386 }
387}
388 316
389int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc) 317 local_irq_save_hw(flags);
390{
391 if (desc->thread || !create_irq_threads)
392 return 0;
393
394 desc->thread = kthread_create(do_irqd, desc, "IRQ %d", irq);
395 if (desc->thread == NULL) {
396 printk(KERN_ERR "irqd: could not create IRQ thread %d!\n", irq);
397 return -ENOMEM;
398 }
399 318
400 wake_up_process(desc->thread); 319 clear_thread_flag(TIF_IRQ_SYNC);
401 320
402 desc->thr_handler = ipipe_root_domain->irqs[irq].handler; 321 if (ipipe_root_cpudom_var(irqpend_himask) != 0)
403 ipipe_root_domain->irqs[irq].handler = &kick_irqd; 322 __ipipe_sync_pipeline(IPIPE_IRQMASK_ANY);
404 323
405 return 0; 324 local_irq_restore_hw(flags);
406} 325}
407 326
408void __init ipipe_init_irq_threads(void) 327void ___ipipe_sync_pipeline(unsigned long syncmask)
409{ 328{
410 unsigned irq; 329 struct ipipe_domain *ipd = ipipe_current_domain;
411 struct irq_desc *desc;
412
413 create_irq_threads = 1;
414 330
415 for (irq = 0; irq < NR_IRQS; irq++) { 331 if (ipd == ipipe_root_domain) {
416 desc = irq_desc + irq; 332 if (test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)))
417 if (desc->action != NULL || 333 return;
418 (desc->status & IRQ_NOREQUEST) != 0)
419 ipipe_start_irq_thread(irq, desc);
420 } 334 }
335
336 __ipipe_sync_stage(syncmask);
421} 337}
422 338
423EXPORT_SYMBOL(show_stack); 339EXPORT_SYMBOL(show_stack);
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c
index 23e9aa080710..1ab5b532ec72 100644
--- a/arch/blackfin/kernel/irqchip.c
+++ b/arch/blackfin/kernel/irqchip.c
@@ -149,11 +149,15 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
149#endif 149#endif
150 generic_handle_irq(irq); 150 generic_handle_irq(irq);
151 151
152#ifndef CONFIG_IPIPE /* Useless and bugous over the I-pipe: IRQs are threaded. */ 152#ifndef CONFIG_IPIPE
153 /* If we're the only interrupt running (ignoring IRQ15 which is for 153 /*
154 syscalls), lower our priority to IRQ14 so that softirqs run at 154 * If we're the only interrupt running (ignoring IRQ15 which
155 that level. If there's another, lower-level interrupt, irq_exit 155 * is for syscalls), lower our priority to IRQ14 so that
156 will defer softirqs to that. */ 156 * softirqs run at that level. If there's another,
157 * lower-level interrupt, irq_exit will defer softirqs to
158 * that. If the interrupt pipeline is enabled, we are already
159 * running at IRQ14 priority, so we don't need this code.
160 */
157 CSYNC(); 161 CSYNC();
158 pending = bfin_read_IPEND() & ~0x8000; 162 pending = bfin_read_IPEND() & ~0x8000;
159 other_ints = pending & (pending - 1); 163 other_ints = pending & (pending - 1);
diff --git a/arch/blackfin/kernel/kgdb_test.c b/arch/blackfin/kernel/kgdb_test.c
index 3dba9c17304a..dbcf3e45cb0b 100644
--- a/arch/blackfin/kernel/kgdb_test.c
+++ b/arch/blackfin/kernel/kgdb_test.c
@@ -20,6 +20,7 @@
20static char cmdline[256]; 20static char cmdline[256];
21static unsigned long len; 21static unsigned long len;
22 22
23#ifndef CONFIG_SMP
23static int num1 __attribute__((l1_data)); 24static int num1 __attribute__((l1_data));
24 25
25void kgdb_l1_test(void) __attribute__((l1_text)); 26void kgdb_l1_test(void) __attribute__((l1_text));
@@ -32,6 +33,8 @@ void kgdb_l1_test(void)
32 printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1); 33 printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1);
33 return ; 34 return ;
34} 35}
36#endif
37
35#if L2_LENGTH 38#if L2_LENGTH
36 39
37static int num2 __attribute__((l2)); 40static int num2 __attribute__((l2));
@@ -59,10 +62,12 @@ int kgdb_test(char *name, int len, int count, int z)
59static int test_proc_output(char *buf) 62static int test_proc_output(char *buf)
60{ 63{
61 kgdb_test("hello world!", 12, 0x55, 0x10); 64 kgdb_test("hello world!", 12, 0x55, 0x10);
65#ifndef CONFIG_SMP
62 kgdb_l1_test(); 66 kgdb_l1_test();
63 #if L2_LENGTH 67#endif
68#if L2_LENGTH
64 kgdb_l2_test(); 69 kgdb_l2_test();
65 #endif 70#endif
66 71
67 return 0; 72 return 0;
68} 73}
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index 594e325b40e4..d76618db50df 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -45,6 +45,7 @@
45#include <asm/asm-offsets.h> 45#include <asm/asm-offsets.h>
46#include <asm/dma.h> 46#include <asm/dma.h>
47#include <asm/fixed_code.h> 47#include <asm/fixed_code.h>
48#include <asm/cacheflush.h>
48#include <asm/mem_map.h> 49#include <asm/mem_map.h>
49 50
50#define TEXT_OFFSET 0 51#define TEXT_OFFSET 0
@@ -240,7 +241,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
240 241
241 } else if (addr >= FIXED_CODE_START 242 } else if (addr >= FIXED_CODE_START
242 && addr + sizeof(tmp) <= FIXED_CODE_END) { 243 && addr + sizeof(tmp) <= FIXED_CODE_END) {
243 memcpy(&tmp, (const void *)(addr), sizeof(tmp)); 244 copy_from_user_page(0, 0, 0, &tmp, (const void *)(addr), sizeof(tmp));
244 copied = sizeof(tmp); 245 copied = sizeof(tmp);
245 246
246 } else 247 } else
@@ -320,7 +321,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
320 321
321 } else if (addr >= FIXED_CODE_START 322 } else if (addr >= FIXED_CODE_START
322 && addr + sizeof(data) <= FIXED_CODE_END) { 323 && addr + sizeof(data) <= FIXED_CODE_END) {
323 memcpy((void *)(addr), &data, sizeof(data)); 324 copy_to_user_page(0, 0, 0, (void *)(addr), &data, sizeof(data));
324 copied = sizeof(data); 325 copied = sizeof(data);
325 326
326 } else 327 } else
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index e5c116230800..a58687bdee6a 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -889,6 +889,10 @@ void __init setup_arch(char **cmdline_p)
889 CPU, bfin_revid()); 889 CPU, bfin_revid());
890 } 890 }
891 891
892 /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
893 if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
894 panic("You can't run on this processor due to 05000448\n");
895
892 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); 896 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
893 897
894 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", 898 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
@@ -1141,12 +1145,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
1141 icache_size = 0; 1145 icache_size = 0;
1142 1146
1143 seq_printf(m, "cache size\t: %d KB(L1 icache) " 1147 seq_printf(m, "cache size\t: %d KB(L1 icache) "
1144 "%d KB(L1 dcache-%s) %d KB(L2 cache)\n", 1148 "%d KB(L1 dcache%s) %d KB(L2 cache)\n",
1145 icache_size, dcache_size, 1149 icache_size, dcache_size,
1146#if defined CONFIG_BFIN_WB 1150#if defined CONFIG_BFIN_WB
1147 "wb" 1151 "-wb"
1148#elif defined CONFIG_BFIN_WT 1152#elif defined CONFIG_BFIN_WT
1149 "wt" 1153 "-wt"
1150#endif 1154#endif
1151 "", 0); 1155 "", 0);
1152 1156
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index 172b4c588467..1bbacfbd4c5d 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -134,7 +134,10 @@ irqreturn_t timer_interrupt(int irq, void *dummy)
134 134
135 write_seqlock(&xtime_lock); 135 write_seqlock(&xtime_lock);
136#if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE) 136#if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE)
137/* FIXME: Here TIMIL0 is not set when IPIPE enabled, why? */ 137 /*
138 * TIMIL0 is latched in __ipipe_grab_irq() when the I-Pipe is
139 * enabled.
140 */
138 if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { 141 if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) {
139#endif 142#endif
140 do_timer(1); 143 do_timer(1);
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 0e175342112e..41f2eacfef20 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -113,7 +113,6 @@ static struct platform_device bfin_mac_device = {
113 .name = "bfin_mac", 113 .name = "bfin_mac",
114 .dev.platform_data = &bfin_mii_bus, 114 .dev.platform_data = &bfin_mii_bus,
115}; 115};
116#endif
117 116
118#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) 117#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
119static struct dsa_platform_data ksz8893m_switch_data = { 118static struct dsa_platform_data ksz8893m_switch_data = {
@@ -132,6 +131,7 @@ static struct platform_device ksz8893m_switch_device = {
132 .dev.platform_data = &ksz8893m_switch_data, 131 .dev.platform_data = &ksz8893m_switch_data,
133}; 132};
134#endif 133#endif
134#endif
135 135
136#if defined(CONFIG_MTD_M25P80) \ 136#if defined(CONFIG_MTD_M25P80) \
137 || defined(CONFIG_MTD_M25P80_MODULE) 137 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -171,6 +171,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
171}; 171};
172#endif 172#endif
173 173
174#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
174#if defined(CONFIG_NET_DSA_KSZ8893M) \ 175#if defined(CONFIG_NET_DSA_KSZ8893M) \
175 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) 176 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
176/* SPI SWITCH CHIP */ 177/* SPI SWITCH CHIP */
@@ -179,10 +180,11 @@ static struct bfin5xx_spi_chip spi_switch_info = {
179 .bits_per_word = 8, 180 .bits_per_word = 8,
180}; 181};
181#endif 182#endif
183#endif
182 184
183#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 185#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
184static struct bfin5xx_spi_chip spi_mmc_chip_info = { 186static struct bfin5xx_spi_chip mmc_spi_chip_info = {
185 .enable_dma = 1, 187 .enable_dma = 0,
186 .bits_per_word = 8, 188 .bits_per_word = 8,
187}; 189};
188#endif 190#endif
@@ -259,6 +261,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
259 }, 261 },
260#endif 262#endif
261 263
264#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
262#if defined(CONFIG_NET_DSA_KSZ8893M) \ 265#if defined(CONFIG_NET_DSA_KSZ8893M) \
263 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) 266 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
264 { 267 {
@@ -271,24 +274,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
271 .mode = SPI_MODE_3, 274 .mode = SPI_MODE_3,
272 }, 275 },
273#endif 276#endif
277#endif
274 278
275#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 279#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
276 { 280 {
277 .modalias = "spi_mmc_dummy", 281 .modalias = "mmc_spi",
278 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 282 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
279 .bus_num = 0, 283 .bus_num = 0,
280 .chip_select = 0, 284 .chip_select = 5,
281 .platform_data = NULL, 285 .controller_data = &mmc_spi_chip_info,
282 .controller_data = &spi_mmc_chip_info,
283 .mode = SPI_MODE_3,
284 },
285 {
286 .modalias = "spi_mmc",
287 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
288 .bus_num = 0,
289 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
290 .platform_data = NULL,
291 .controller_data = &spi_mmc_chip_info,
292 .mode = SPI_MODE_3, 286 .mode = SPI_MODE_3,
293 }, 287 },
294#endif 288#endif
@@ -630,11 +624,10 @@ static struct platform_device *stamp_devices[] __initdata = {
630#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 624#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
631 &bfin_mii_bus, 625 &bfin_mii_bus,
632 &bfin_mac_device, 626 &bfin_mac_device,
633#endif
634
635#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) 627#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
636 &ksz8893m_switch_device, 628 &ksz8893m_switch_device,
637#endif 629#endif
630#endif
638 631
639#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 632#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
640 &bfin_spi0_device, 633 &bfin_spi0_device,
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h
index e5b4bef0edae..c847bb101076 100644
--- a/arch/blackfin/mach-bf518/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h
@@ -2,12 +2,12 @@
2 * File: include/asm-blackfin/mach-bf518/anomaly.h 2 * File: include/asm-blackfin/mach-bf518/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
9/* This file shoule be up to date with: 9/* This file shoule be up to date with:
10 * - ???? 10 * - Revision B, 02/03/2009; ADSP-BF512/BF514/BF516/BF518 Blackfin Processor Anomaly List
11 */ 11 */
12 12
13#ifndef _MACH_ANOMALY_H_ 13#ifndef _MACH_ANOMALY_H_
@@ -19,6 +19,8 @@
19#define ANOMALY_05000122 (1) 19#define ANOMALY_05000122 (1)
20/* False Hardware Error from an Access in the Shadow of a Conditional Branch */ 20/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
21#define ANOMALY_05000245 (1) 21#define ANOMALY_05000245 (1)
22/* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */
23#define ANOMALY_05000254 (1)
22/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ 24/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
23#define ANOMALY_05000265 (1) 25#define ANOMALY_05000265 (1)
24/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ 26/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
@@ -53,6 +55,12 @@
53#define ANOMALY_05000443 (1) 55#define ANOMALY_05000443 (1)
54/* Incorrect L1 Instruction Bank B Memory Map Location */ 56/* Incorrect L1 Instruction Bank B Memory Map Location */
55#define ANOMALY_05000444 (1) 57#define ANOMALY_05000444 (1)
58/* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */
59#define ANOMALY_05000452 (1)
60/* PWM_TRIPB Signal Not Available on PG10 */
61#define ANOMALY_05000453 (1)
62/* PPI_FS3 is Driven One Half Cycle Later Than PPI Data */
63#define ANOMALY_05000455 (1)
56 64
57/* Anomalies that don't exist on this proc */ 65/* Anomalies that don't exist on this proc */
58#define ANOMALY_05000125 (0) 66#define ANOMALY_05000125 (0)
@@ -65,15 +73,20 @@
65#define ANOMALY_05000263 (0) 73#define ANOMALY_05000263 (0)
66#define ANOMALY_05000266 (0) 74#define ANOMALY_05000266 (0)
67#define ANOMALY_05000273 (0) 75#define ANOMALY_05000273 (0)
76#define ANOMALY_05000278 (0)
68#define ANOMALY_05000285 (0) 77#define ANOMALY_05000285 (0)
78#define ANOMALY_05000305 (0)
69#define ANOMALY_05000307 (0) 79#define ANOMALY_05000307 (0)
70#define ANOMALY_05000311 (0) 80#define ANOMALY_05000311 (0)
71#define ANOMALY_05000312 (0) 81#define ANOMALY_05000312 (0)
72#define ANOMALY_05000323 (0) 82#define ANOMALY_05000323 (0)
73#define ANOMALY_05000353 (0) 83#define ANOMALY_05000353 (0)
74#define ANOMALY_05000363 (0) 84#define ANOMALY_05000363 (0)
85#define ANOMALY_05000380 (0)
75#define ANOMALY_05000386 (0) 86#define ANOMALY_05000386 (0)
76#define ANOMALY_05000412 (0) 87#define ANOMALY_05000412 (0)
77#define ANOMALY_05000432 (0) 88#define ANOMALY_05000432 (0)
89#define ANOMALY_05000447 (0)
90#define ANOMALY_05000448 (0)
78 91
79#endif 92#endif
diff --git a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
index b50a63b975a2..e21c1c3e4ec7 100644
--- a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
144 CH_UART0_TX, 144 CH_UART0_TX,
145 CH_UART0_RX, 145 CH_UART0_RX,
146#endif 146#endif
147#ifdef CONFIG_BFIN_UART0_CTSRTS 147#ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 CONFIG_UART0_CTS_PIN, 148 CONFIG_UART0_CTS_PIN,
149 CONFIG_UART0_RTS_PIN, 149 CONFIG_UART0_RTS_PIN,
150#endif 150#endif
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
158 CH_UART1_TX, 158 CH_UART1_TX,
159 CH_UART1_RX, 159 CH_UART1_RX,
160#endif 160#endif
161#ifdef CONFIG_BFIN_UART1_CTSRTS 161#ifdef CONFIG_SERIAL_BFIN_CTSRTS
162 CONFIG_UART1_CTS_PIN, 162 CONFIG_UART1_CTS_PIN,
163 CONFIG_UART1_RTS_PIN, 163 CONFIG_UART1_RTS_PIN,
164#endif 164#endif
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index 856c097b5317..48e69eecdba4 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -487,9 +487,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
487}; 487};
488#endif 488#endif
489 489
490#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 490#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
491static struct bfin5xx_spi_chip spi_mmc_chip_info = { 491static struct bfin5xx_spi_chip mmc_spi_chip_info = {
492 .enable_dma = 1, 492 .enable_dma = 0,
493 .bits_per_word = 8, 493 .bits_per_word = 8,
494}; 494};
495#endif 495#endif
@@ -585,23 +585,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
585 .controller_data = &ad9960_spi_chip_info, 585 .controller_data = &ad9960_spi_chip_info,
586 }, 586 },
587#endif 587#endif
588#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 588#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
589 { 589 {
590 .modalias = "spi_mmc_dummy", 590 .modalias = "mmc_spi",
591 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 591 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
592 .bus_num = 0,
593 .chip_select = 0,
594 .platform_data = NULL,
595 .controller_data = &spi_mmc_chip_info,
596 .mode = SPI_MODE_3,
597 },
598 {
599 .modalias = "spi_mmc",
600 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
601 .bus_num = 0, 592 .bus_num = 0,
602 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 593 .chip_select = 5,
603 .platform_data = NULL, 594 .controller_data = &mmc_spi_chip_info,
604 .controller_data = &spi_mmc_chip_info,
605 .mode = SPI_MODE_3, 595 .mode = SPI_MODE_3,
606 }, 596 },
607#endif 597#endif
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index 83606fcdde27..7fe480e4ebe8 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -256,9 +256,9 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
256}; 256};
257#endif 257#endif
258 258
259#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 259#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
260static struct bfin5xx_spi_chip spi_mmc_chip_info = { 260static struct bfin5xx_spi_chip mmc_spi_chip_info = {
261 .enable_dma = 1, 261 .enable_dma = 0,
262 .bits_per_word = 8, 262 .bits_per_word = 8,
263}; 263};
264#endif 264#endif
@@ -366,23 +366,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
366 }, 366 },
367#endif 367#endif
368 368
369#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 369#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
370 { 370 {
371 .modalias = "spi_mmc_dummy", 371 .modalias = "mmc_spi",
372 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 372 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
373 .bus_num = 0, 373 .bus_num = 0,
374 .chip_select = 0, 374 .chip_select = 5,
375 .platform_data = NULL, 375 .controller_data = &mmc_spi_chip_info,
376 .controller_data = &spi_mmc_chip_info,
377 .mode = SPI_MODE_3,
378 },
379 {
380 .modalias = "spi_mmc",
381 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
382 .bus_num = 0,
383 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
384 .platform_data = NULL,
385 .controller_data = &spi_mmc_chip_info,
386 .mode = SPI_MODE_3, 376 .mode = SPI_MODE_3,
387 }, 377 },
388#endif 378#endif
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h
index 035e8d835058..df6808d8a6ef 100644
--- a/arch/blackfin/mach-bf527/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf527/anomaly.h 2 * File: include/asm-blackfin/mach-bf527/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -167,12 +167,16 @@
167#define ANOMALY_05000263 (0) 167#define ANOMALY_05000263 (0)
168#define ANOMALY_05000266 (0) 168#define ANOMALY_05000266 (0)
169#define ANOMALY_05000273 (0) 169#define ANOMALY_05000273 (0)
170#define ANOMALY_05000278 (0)
170#define ANOMALY_05000285 (0) 171#define ANOMALY_05000285 (0)
172#define ANOMALY_05000305 (0)
171#define ANOMALY_05000307 (0) 173#define ANOMALY_05000307 (0)
172#define ANOMALY_05000311 (0) 174#define ANOMALY_05000311 (0)
173#define ANOMALY_05000312 (0) 175#define ANOMALY_05000312 (0)
174#define ANOMALY_05000323 (0) 176#define ANOMALY_05000323 (0)
175#define ANOMALY_05000363 (0) 177#define ANOMALY_05000363 (0)
176#define ANOMALY_05000412 (0) 178#define ANOMALY_05000412 (0)
179#define ANOMALY_05000447 (0)
180#define ANOMALY_05000448 (0)
177 181
178#endif 182#endif
diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
index 75722d6008b0..e8c41fd842b5 100644
--- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
144 CH_UART0_TX, 144 CH_UART0_TX,
145 CH_UART0_RX, 145 CH_UART0_RX,
146#endif 146#endif
147#ifdef CONFIG_BFIN_UART0_CTSRTS 147#ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 CONFIG_UART0_CTS_PIN, 148 CONFIG_UART0_CTS_PIN,
149 CONFIG_UART0_RTS_PIN, 149 CONFIG_UART0_RTS_PIN,
150#endif 150#endif
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
158 CH_UART1_TX, 158 CH_UART1_TX,
159 CH_UART1_RX, 159 CH_UART1_RX,
160#endif 160#endif
161#ifdef CONFIG_BFIN_UART1_CTSRTS 161#ifdef CONFIG_SERIAL_BFIN_CTSRTS
162 CONFIG_UART1_CTS_PIN, 162 CONFIG_UART1_CTS_PIN,
163 CONFIG_UART1_RTS_PIN, 163 CONFIG_UART1_RTS_PIN,
164#endif 164#endif
diff --git a/arch/blackfin/mach-bf533/boards/Kconfig b/arch/blackfin/mach-bf533/boards/Kconfig
index 308c98dc5aba..8d8b3e7321e6 100644
--- a/arch/blackfin/mach-bf533/boards/Kconfig
+++ b/arch/blackfin/mach-bf533/boards/Kconfig
@@ -38,9 +38,4 @@ config BFIN532_IP0X
38 help 38 help
39 Core support for IP04/IP04 open hardware IP-PBX. 39 Core support for IP04/IP04 open hardware IP-PBX.
40 40
41config GENERIC_BF533_BOARD
42 bool "Generic"
43 help
44 Generic or Custom board support.
45
46endchoice 41endchoice
diff --git a/arch/blackfin/mach-bf533/boards/Makefile b/arch/blackfin/mach-bf533/boards/Makefile
index 9afbe72b484f..ff1e832f80d2 100644
--- a/arch/blackfin/mach-bf533/boards/Makefile
+++ b/arch/blackfin/mach-bf533/boards/Makefile
@@ -2,7 +2,6 @@
2# arch/blackfin/mach-bf533/boards/Makefile 2# arch/blackfin/mach-bf533/boards/Makefile
3# 3#
4 4
5obj-$(CONFIG_GENERIC_BF533_BOARD) += generic_board.o
6obj-$(CONFIG_BFIN533_STAMP) += stamp.o 5obj-$(CONFIG_BFIN533_STAMP) += stamp.o
7obj-$(CONFIG_BFIN532_IP0X) += ip0x.o 6obj-$(CONFIG_BFIN532_IP0X) += ip0x.o
8obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o 7obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c
index 015c18f85e7f..0765872a8ada 100644
--- a/arch/blackfin/mach-bf533/boards/blackstamp.c
+++ b/arch/blackfin/mach-bf533/boards/blackstamp.c
@@ -101,9 +101,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
101}; 101};
102#endif 102#endif
103 103
104#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 104#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
105static struct bfin5xx_spi_chip spi_mmc_chip_info = { 105static struct bfin5xx_spi_chip mmc_spi_chip_info = {
106 .enable_dma = 1, 106 .enable_dma = 0,
107 .bits_per_word = 8, 107 .bits_per_word = 8,
108}; 108};
109#endif 109#endif
@@ -129,23 +129,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
129 }, 129 },
130#endif 130#endif
131 131
132#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 132#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
133 {
134 .modalias = "spi_mmc_dummy",
135 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
136 .bus_num = 0,
137 .chip_select = 0,
138 .platform_data = NULL,
139 .controller_data = &spi_mmc_chip_info,
140 .mode = SPI_MODE_3,
141 },
142 { 133 {
143 .modalias = "spi_mmc", 134 .modalias = "mmc_spi",
144 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 135 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
145 .bus_num = 0, 136 .bus_num = 0,
146 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 137 .chip_select = 5,
147 .platform_data = NULL, 138 .controller_data = &mmc_spi_chip_info,
148 .controller_data = &spi_mmc_chip_info,
149 .mode = SPI_MODE_3, 139 .mode = SPI_MODE_3,
150 }, 140 },
151#endif 141#endif
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index e7061c7e8c42..e8974878d8c2 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -96,9 +96,9 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
96}; 96};
97#endif 97#endif
98 98
99#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 99#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
100static struct bfin5xx_spi_chip spi_mmc_chip_info = { 100static struct bfin5xx_spi_chip mmc_spi_chip_info = {
101 .enable_dma = 1, 101 .enable_dma = 0,
102 .bits_per_word = 8, 102 .bits_per_word = 8,
103}; 103};
104#endif 104#endif
@@ -138,23 +138,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
138 }, 138 },
139#endif 139#endif
140 140
141#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 141#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
142 {
143 .modalias = "spi_mmc_dummy",
144 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
145 .bus_num = 0,
146 .chip_select = 0,
147 .platform_data = NULL,
148 .controller_data = &spi_mmc_chip_info,
149 .mode = SPI_MODE_3,
150 },
151 { 142 {
152 .modalias = "spi_mmc", 143 .modalias = "mmc_spi",
153 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 144 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
154 .bus_num = 0, 145 .bus_num = 0,
155 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 146 .chip_select = 5,
156 .platform_data = NULL, 147 .controller_data = &mmc_spi_chip_info,
157 .controller_data = &spi_mmc_chip_info,
158 .mode = SPI_MODE_3, 148 .mode = SPI_MODE_3,
159 }, 149 },
160#endif 150#endif
diff --git a/arch/blackfin/mach-bf533/boards/generic_board.c b/arch/blackfin/mach-bf533/boards/generic_board.c
deleted file mode 100644
index 986eeec53b1f..000000000000
--- a/arch/blackfin/mach-bf533/boards/generic_board.c
+++ /dev/null
@@ -1,126 +0,0 @@
1/*
2 * File: arch/blackfin/mach-bf533/generic_board.c
3 * Based on: arch/blackfin/mach-bf533/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created: 2005
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/irq.h>
34
35/*
36 * Name the Board for the /proc/cpuinfo
37 */
38const char bfin_board_name[] = "UNKNOWN BOARD";
39
40#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
41static struct platform_device rtc_device = {
42 .name = "rtc-bfin",
43 .id = -1,
44};
45#endif
46
47/*
48 * Driver needs to know address, irq and flag pin.
49 */
50#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
51static struct resource smc91x_resources[] = {
52 {
53 .start = 0x20300300,
54 .end = 0x20300300 + 16,
55 .flags = IORESOURCE_MEM,
56 }, {
57 .start = IRQ_PROG_INTB,
58 .end = IRQ_PROG_INTB,
59 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
60 }, {
61 .start = IRQ_PF7,
62 .end = IRQ_PF7,
63 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
64 },
65};
66
67static struct platform_device smc91x_device = {
68 .name = "smc91x",
69 .id = 0,
70 .num_resources = ARRAY_SIZE(smc91x_resources),
71 .resource = smc91x_resources,
72};
73#endif
74
75#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
76#ifdef CONFIG_BFIN_SIR0
77static struct resource bfin_sir0_resources[] = {
78 {
79 .start = 0xFFC00400,
80 .end = 0xFFC004FF,
81 .flags = IORESOURCE_MEM,
82 },
83 {
84 .start = IRQ_UART0_RX,
85 .end = IRQ_UART0_RX+1,
86 .flags = IORESOURCE_IRQ,
87 },
88 {
89 .start = CH_UART0_RX,
90 .end = CH_UART0_RX+1,
91 .flags = IORESOURCE_DMA,
92 },
93};
94
95static struct platform_device bfin_sir0_device = {
96 .name = "bfin_sir",
97 .id = 0,
98 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
99 .resource = bfin_sir0_resources,
100};
101#endif
102#endif
103
104static struct platform_device *generic_board_devices[] __initdata = {
105#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
106 &rtc_device,
107#endif
108
109#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
110 &smc91x_device,
111#endif
112
113#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
114#ifdef CONFIG_BFIN_SIR0
115 &bfin_sir0_device,
116#endif
117#endif
118};
119
120static int __init generic_board_init(void)
121{
122 printk(KERN_INFO "%s(): registering device resources\n", __func__);
123 return platform_add_devices(generic_board_devices, ARRAY_SIZE(generic_board_devices));
124}
125
126arch_initcall(generic_board_init);
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c
index e30b1b7d1442..f19b63378b12 100644
--- a/arch/blackfin/mach-bf533/boards/ip0x.c
+++ b/arch/blackfin/mach-bf533/boards/ip0x.c
@@ -127,8 +127,8 @@ static struct platform_device dm9000_device2 = {
127#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 127#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
128/* all SPI peripherals info goes here */ 128/* all SPI peripherals info goes here */
129 129
130#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 130#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
131static struct bfin5xx_spi_chip spi_mmc_chip_info = { 131static struct bfin5xx_spi_chip mmc_spi_chip_info = {
132/* 132/*
133 * CPOL (Clock Polarity) 133 * CPOL (Clock Polarity)
134 * 0 - Active high SCK 134 * 0 - Active high SCK
@@ -152,14 +152,13 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = {
152/* Notice: for blackfin, the speed_hz is the value of register 152/* Notice: for blackfin, the speed_hz is the value of register
153 * SPI_BAUD, not the real baudrate */ 153 * SPI_BAUD, not the real baudrate */
154static struct spi_board_info bfin_spi_board_info[] __initdata = { 154static struct spi_board_info bfin_spi_board_info[] __initdata = {
155#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 155#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
156 { 156 {
157 .modalias = "spi_mmc", 157 .modalias = "mmc_spi",
158 .max_speed_hz = 2, 158 .max_speed_hz = 2,
159 .bus_num = 1, 159 .bus_num = 1,
160 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 160 .chip_select = 5,
161 .platform_data = NULL, 161 .controller_data = &mmc_spi_chip_info,
162 .controller_data = &spi_mmc_chip_info,
163 }, 162 },
164#endif 163#endif
165}; 164};
diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h
index 0d3a03429fb9..1cf893e2e55b 100644
--- a/arch/blackfin/mach-bf533/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf533/include/mach/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf533/anomaly.h 2 * File: include/asm-blackfin/mach-bf533/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -160,7 +160,7 @@
160#define ANOMALY_05000301 (__SILICON_REVISION__ < 6) 160#define ANOMALY_05000301 (__SILICON_REVISION__ < 6)
161/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ 161/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */
162#define ANOMALY_05000302 (__SILICON_REVISION__ < 5) 162#define ANOMALY_05000302 (__SILICON_REVISION__ < 5)
163/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ 163/* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */
164#define ANOMALY_05000305 (__SILICON_REVISION__ < 5) 164#define ANOMALY_05000305 (__SILICON_REVISION__ < 5)
165/* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */ 165/* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */
166#define ANOMALY_05000306 (__SILICON_REVISION__ < 5) 166#define ANOMALY_05000306 (__SILICON_REVISION__ < 5)
@@ -278,9 +278,12 @@
278#define ANOMALY_05000266 (0) 278#define ANOMALY_05000266 (0)
279#define ANOMALY_05000323 (0) 279#define ANOMALY_05000323 (0)
280#define ANOMALY_05000353 (1) 280#define ANOMALY_05000353 (1)
281#define ANOMALY_05000380 (0)
281#define ANOMALY_05000386 (1) 282#define ANOMALY_05000386 (1)
282#define ANOMALY_05000412 (0) 283#define ANOMALY_05000412 (0)
283#define ANOMALY_05000432 (0) 284#define ANOMALY_05000432 (0)
284#define ANOMALY_05000435 (0) 285#define ANOMALY_05000435 (0)
286#define ANOMALY_05000447 (0)
287#define ANOMALY_05000448 (0)
285 288
286#endif 289#endif
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
index f3d9e495230c..5f517f53b0fd 100644
--- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
134 CH_UART_TX, 134 CH_UART_TX,
135 CH_UART_RX, 135 CH_UART_RX,
136#endif 136#endif
137#ifdef CONFIG_BFIN_UART0_CTSRTS 137#ifdef CONFIG_SERIAL_BFIN_CTSRTS
138 CONFIG_UART0_CTS_PIN, 138 CONFIG_UART0_CTS_PIN,
139 CONFIG_UART0_RTS_PIN, 139 CONFIG_UART0_RTS_PIN,
140#endif 140#endif
diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig
index 42a57b0acb29..77c59da87e85 100644
--- a/arch/blackfin/mach-bf537/boards/Kconfig
+++ b/arch/blackfin/mach-bf537/boards/Kconfig
@@ -33,9 +33,4 @@ config CAMSIG_MINOTAUR
33 help 33 help
34 Board supply package for CSP Minotaur 34 Board supply package for CSP Minotaur
35 35
36config GENERIC_BF537_BOARD
37 bool "Generic"
38 help
39 Generic or Custom board support.
40
41endchoice 36endchoice
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile
index 7168cc14afd8..68b98a7af6a6 100644
--- a/arch/blackfin/mach-bf537/boards/Makefile
+++ b/arch/blackfin/mach-bf537/boards/Makefile
@@ -2,7 +2,6 @@
2# arch/blackfin/mach-bf537/boards/Makefile 2# arch/blackfin/mach-bf537/boards/Makefile
3# 3#
4 4
5obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o
6obj-$(CONFIG_BFIN537_STAMP) += stamp.o 5obj-$(CONFIG_BFIN537_STAMP) += stamp.o
7obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o 6obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o
8obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o 7obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index 9cd8fb2a30d3..41c75b9bfac0 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
108}; 108};
109#endif 109#endif
110 110
111#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 111#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
112static struct bfin5xx_spi_chip spi_mmc_chip_info = { 112static struct bfin5xx_spi_chip mmc_spi_chip_info = {
113 .enable_dma = 1, 113 .enable_dma = 0,
114 .bits_per_word = 8, 114 .bits_per_word = 8,
115}; 115};
116#endif 116#endif
@@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
160 }, 160 },
161#endif 161#endif
162 162
163#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 163#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
164 {
165 .modalias = "spi_mmc_dummy",
166 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
167 .bus_num = 0,
168 .chip_select = 7,
169 .platform_data = NULL,
170 .controller_data = &spi_mmc_chip_info,
171 .mode = SPI_MODE_3,
172 },
173 { 164 {
174 .modalias = "spi_mmc", 165 .modalias = "mmc_spi",
175 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 166 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
176 .bus_num = 0, 167 .bus_num = 0,
177 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 168 .chip_select = 1,
178 .platform_data = NULL, 169 .controller_data = &mmc_spi_chip_info,
179 .controller_data = &spi_mmc_chip_info,
180 .mode = SPI_MODE_3, 170 .mode = SPI_MODE_3,
181 }, 171 },
182#endif 172#endif
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
deleted file mode 100644
index da710fdc4569..000000000000
--- a/arch/blackfin/mach-bf537/boards/generic_board.c
+++ /dev/null
@@ -1,745 +0,0 @@
1/*
2 * File: arch/blackfin/mach-bf537/boards/generic_board.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/etherdevice.h>
33#include <linux/platform_device.h>
34#include <linux/mtd/mtd.h>
35#include <linux/mtd/partitions.h>
36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
39#include <linux/usb/isp1362.h>
40#endif
41#include <linux/irq.h>
42#include <linux/interrupt.h>
43#include <linux/usb/sl811.h>
44#include <asm/dma.h>
45#include <asm/bfin5xx_spi.h>
46#include <asm/reboot.h>
47#include <asm/portmux.h>
48#include <linux/spi/ad7877.h>
49
50/*
51 * Name the Board for the /proc/cpuinfo
52 */
53const char bfin_board_name[] = "UNKNOWN BOARD";
54
55/*
56 * Driver needs to know address, irq and flag pin.
57 */
58
59#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
60#include <linux/usb/isp1760.h>
61static struct resource bfin_isp1760_resources[] = {
62 [0] = {
63 .start = 0x203C0000,
64 .end = 0x203C0000 + 0x000fffff,
65 .flags = IORESOURCE_MEM,
66 },
67 [1] = {
68 .start = IRQ_PF7,
69 .end = IRQ_PF7,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct isp1760_platform_data isp1760_priv = {
75 .is_isp1761 = 0,
76 .port1_disable = 0,
77 .bus_width_16 = 1,
78 .port1_otg = 0,
79 .analog_oc = 0,
80 .dack_polarity_high = 0,
81 .dreq_polarity_high = 0,
82};
83
84static struct platform_device bfin_isp1760_device = {
85 .name = "isp1760-hcd",
86 .id = 0,
87 .dev = {
88 .platform_data = &isp1760_priv,
89 },
90 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
91 .resource = bfin_isp1760_resources,
92};
93#endif
94
95#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
96static struct resource bfin_pcmcia_cf_resources[] = {
97 {
98 .start = 0x20310000, /* IO PORT */
99 .end = 0x20312000,
100 .flags = IORESOURCE_MEM,
101 }, {
102 .start = 0x20311000, /* Attribute Memory */
103 .end = 0x20311FFF,
104 .flags = IORESOURCE_MEM,
105 }, {
106 .start = IRQ_PF4,
107 .end = IRQ_PF4,
108 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
109 }, {
110 .start = 6, /* Card Detect PF6 */
111 .end = 6,
112 .flags = IORESOURCE_IRQ,
113 },
114};
115
116static struct platform_device bfin_pcmcia_cf_device = {
117 .name = "bfin_cf_pcmcia",
118 .id = -1,
119 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
120 .resource = bfin_pcmcia_cf_resources,
121};
122#endif
123
124#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
125static struct platform_device rtc_device = {
126 .name = "rtc-bfin",
127 .id = -1,
128};
129#endif
130
131#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
132static struct resource smc91x_resources[] = {
133 {
134 .name = "smc91x-regs",
135 .start = 0x20300300,
136 .end = 0x20300300 + 16,
137 .flags = IORESOURCE_MEM,
138 }, {
139
140 .start = IRQ_PF7,
141 .end = IRQ_PF7,
142 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
143 },
144};
145static struct platform_device smc91x_device = {
146 .name = "smc91x",
147 .id = 0,
148 .num_resources = ARRAY_SIZE(smc91x_resources),
149 .resource = smc91x_resources,
150};
151#endif
152
153#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
154static struct resource dm9000_resources[] = {
155 [0] = {
156 .start = 0x203FB800,
157 .end = 0x203FB800 + 1,
158 .flags = IORESOURCE_MEM,
159 },
160 [1] = {
161 .start = 0x203FB800 + 4,
162 .end = 0x203FB800 + 5,
163 .flags = IORESOURCE_MEM,
164 },
165 [2] = {
166 .start = IRQ_PF9,
167 .end = IRQ_PF9,
168 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
169 },
170};
171
172static struct platform_device dm9000_device = {
173 .name = "dm9000",
174 .id = -1,
175 .num_resources = ARRAY_SIZE(dm9000_resources),
176 .resource = dm9000_resources,
177};
178#endif
179
180#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
181static struct resource sl811_hcd_resources[] = {
182 {
183 .start = 0x20340000,
184 .end = 0x20340000,
185 .flags = IORESOURCE_MEM,
186 }, {
187 .start = 0x20340004,
188 .end = 0x20340004,
189 .flags = IORESOURCE_MEM,
190 }, {
191 .start = CONFIG_USB_SL811_BFIN_IRQ,
192 .end = CONFIG_USB_SL811_BFIN_IRQ,
193 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
194 },
195};
196
197#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
198void sl811_port_power(struct device *dev, int is_on)
199{
200 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
201 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
202
203}
204#endif
205
206static struct sl811_platform_data sl811_priv = {
207 .potpg = 10,
208 .power = 250, /* == 500mA */
209#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
210 .port_power = &sl811_port_power,
211#endif
212};
213
214static struct platform_device sl811_hcd_device = {
215 .name = "sl811-hcd",
216 .id = 0,
217 .dev = {
218 .platform_data = &sl811_priv,
219 },
220 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
221 .resource = sl811_hcd_resources,
222};
223#endif
224
225#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
226static struct resource isp1362_hcd_resources[] = {
227 {
228 .start = 0x20360000,
229 .end = 0x20360000,
230 .flags = IORESOURCE_MEM,
231 }, {
232 .start = 0x20360004,
233 .end = 0x20360004,
234 .flags = IORESOURCE_MEM,
235 }, {
236 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
237 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
238 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
239 },
240};
241
242static struct isp1362_platform_data isp1362_priv = {
243 .sel15Kres = 1,
244 .clknotstop = 0,
245 .oc_enable = 0,
246 .int_act_high = 0,
247 .int_edge_triggered = 0,
248 .remote_wakeup_connected = 0,
249 .no_power_switching = 1,
250 .power_switching_mode = 0,
251};
252
253static struct platform_device isp1362_hcd_device = {
254 .name = "isp1362-hcd",
255 .id = 0,
256 .dev = {
257 .platform_data = &isp1362_priv,
258 },
259 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
260 .resource = isp1362_hcd_resources,
261};
262#endif
263
264#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
265static struct platform_device bfin_mii_bus = {
266 .name = "bfin_mii_bus",
267};
268
269static struct platform_device bfin_mac_device = {
270 .name = "bfin_mac",
271 .dev.platform_data = &bfin_mii_bus,
272};
273#endif
274
275#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
276static struct resource net2272_bfin_resources[] = {
277 {
278 .start = 0x20300000,
279 .end = 0x20300000 + 0x100,
280 .flags = IORESOURCE_MEM,
281 }, {
282 .start = IRQ_PF7,
283 .end = IRQ_PF7,
284 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
285 },
286};
287
288static struct platform_device net2272_bfin_device = {
289 .name = "net2272",
290 .id = -1,
291 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
292 .resource = net2272_bfin_resources,
293};
294#endif
295
296#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
297/* all SPI peripherals info goes here */
298
299#if defined(CONFIG_MTD_M25P80) \
300 || defined(CONFIG_MTD_M25P80_MODULE)
301static struct mtd_partition bfin_spi_flash_partitions[] = {
302 {
303 .name = "bootloader(spi)",
304 .size = 0x00020000,
305 .offset = 0,
306 .mask_flags = MTD_CAP_ROM
307 }, {
308 .name = "linux kernel(spi)",
309 .size = 0xe0000,
310 .offset = 0x20000
311 }, {
312 .name = "file system(spi)",
313 .size = 0x700000,
314 .offset = 0x00100000,
315 }
316};
317
318static struct flash_platform_data bfin_spi_flash_data = {
319 .name = "m25p80",
320 .parts = bfin_spi_flash_partitions,
321 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
322 .type = "m25p64",
323};
324
325/* SPI flash chip (m25p64) */
326static struct bfin5xx_spi_chip spi_flash_chip_info = {
327 .enable_dma = 0, /* use dma transfer with this chip*/
328 .bits_per_word = 8,
329};
330#endif
331
332#if defined(CONFIG_SPI_ADC_BF533) \
333 || defined(CONFIG_SPI_ADC_BF533_MODULE)
334/* SPI ADC chip */
335static struct bfin5xx_spi_chip spi_adc_chip_info = {
336 .enable_dma = 1, /* use dma transfer with this chip*/
337 .bits_per_word = 16,
338};
339#endif
340
341#if defined(CONFIG_SND_BLACKFIN_AD1836) \
342 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
343static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
344 .enable_dma = 0,
345 .bits_per_word = 16,
346};
347#endif
348
349#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
350static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
351 .enable_dma = 0,
352 .bits_per_word = 16,
353};
354#endif
355
356#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
357static struct bfin5xx_spi_chip spi_mmc_chip_info = {
358 .enable_dma = 1,
359 .bits_per_word = 8,
360};
361#endif
362
363#if defined(CONFIG_PBX)
364static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
365 .ctl_reg = 0x4, /* send zero */
366 .enable_dma = 0,
367 .bits_per_word = 8,
368 .cs_change_per_word = 1,
369};
370#endif
371
372#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
373static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
374 .enable_dma = 0,
375 .bits_per_word = 16,
376};
377
378static const struct ad7877_platform_data bfin_ad7877_ts_info = {
379 .model = 7877,
380 .vref_delay_usecs = 50, /* internal, no capacitor */
381 .x_plate_ohms = 419,
382 .y_plate_ohms = 486,
383 .pressure_max = 1000,
384 .pressure_min = 0,
385 .stopacq_polarity = 1,
386 .first_conversion_delay = 3,
387 .acquisition_time = 1,
388 .averaging = 1,
389 .pen_down_acc_interval = 1,
390};
391#endif
392
393static struct spi_board_info bfin_spi_board_info[] __initdata = {
394#if defined(CONFIG_MTD_M25P80) \
395 || defined(CONFIG_MTD_M25P80_MODULE)
396 {
397 /* the modalias must be the same as spi device driver name */
398 .modalias = "m25p80", /* Name of spi_driver for this device */
399 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
400 .bus_num = 0, /* Framework bus number */
401 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
402 .platform_data = &bfin_spi_flash_data,
403 .controller_data = &spi_flash_chip_info,
404 .mode = SPI_MODE_3,
405 },
406#endif
407
408#if defined(CONFIG_SPI_ADC_BF533) \
409 || defined(CONFIG_SPI_ADC_BF533_MODULE)
410 {
411 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
412 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
413 .bus_num = 0, /* Framework bus number */
414 .chip_select = 1, /* Framework chip select. */
415 .platform_data = NULL, /* No spi_driver specific config */
416 .controller_data = &spi_adc_chip_info,
417 },
418#endif
419
420#if defined(CONFIG_SND_BLACKFIN_AD1836) \
421 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
422 {
423 .modalias = "ad1836-spi",
424 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
425 .bus_num = 0,
426 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
427 .controller_data = &ad1836_spi_chip_info,
428 },
429#endif
430#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
431 {
432 .modalias = "ad9960-spi",
433 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
434 .bus_num = 0,
435 .chip_select = 1,
436 .controller_data = &ad9960_spi_chip_info,
437 },
438#endif
439#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
440 {
441 .modalias = "spi_mmc_dummy",
442 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
443 .bus_num = 0,
444 .chip_select = 0,
445 .platform_data = NULL,
446 .controller_data = &spi_mmc_chip_info,
447 .mode = SPI_MODE_3,
448 },
449 {
450 .modalias = "spi_mmc",
451 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
452 .bus_num = 0,
453 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
454 .platform_data = NULL,
455 .controller_data = &spi_mmc_chip_info,
456 .mode = SPI_MODE_3,
457 },
458#endif
459#if defined(CONFIG_PBX)
460 {
461 .modalias = "fxs-spi",
462 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
463 .bus_num = 0,
464 .chip_select = 8 - CONFIG_J11_JUMPER,
465 .controller_data = &spi_si3xxx_chip_info,
466 .mode = SPI_MODE_3,
467 },
468 {
469 .modalias = "fxo-spi",
470 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
471 .bus_num = 0,
472 .chip_select = 8 - CONFIG_J19_JUMPER,
473 .controller_data = &spi_si3xxx_chip_info,
474 .mode = SPI_MODE_3,
475 },
476#endif
477#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
478 {
479 .modalias = "ad7877",
480 .platform_data = &bfin_ad7877_ts_info,
481 .irq = IRQ_PF6,
482 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
483 .bus_num = 0,
484 .chip_select = 1,
485 .controller_data = &spi_ad7877_chip_info,
486 },
487#endif
488};
489
490/* SPI controller data */
491static struct bfin5xx_spi_master bfin_spi0_info = {
492 .num_chipselect = 8,
493 .enable_dma = 1, /* master has the ability to do dma transfer */
494 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
495};
496
497/* SPI (0) */
498static struct resource bfin_spi0_resource[] = {
499 [0] = {
500 .start = SPI0_REGBASE,
501 .end = SPI0_REGBASE + 0xFF,
502 .flags = IORESOURCE_MEM,
503 },
504 [1] = {
505 .start = CH_SPI,
506 .end = CH_SPI,
507 .flags = IORESOURCE_IRQ,
508 },
509};
510
511static struct platform_device bfin_spi0_device = {
512 .name = "bfin-spi",
513 .id = 0, /* Bus number */
514 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
515 .resource = bfin_spi0_resource,
516 .dev = {
517 .platform_data = &bfin_spi0_info, /* Passed to driver */
518 },
519};
520#endif /* spi master and devices */
521
522#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
523static struct platform_device bfin_fb_device = {
524 .name = "bf537-lq035",
525};
526#endif
527
528#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
529static struct platform_device bfin_fb_adv7393_device = {
530 .name = "bfin-adv7393",
531};
532#endif
533
534#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
535static struct resource bfin_uart_resources[] = {
536 {
537 .start = 0xFFC00400,
538 .end = 0xFFC004FF,
539 .flags = IORESOURCE_MEM,
540 }, {
541 .start = 0xFFC02000,
542 .end = 0xFFC020FF,
543 .flags = IORESOURCE_MEM,
544 },
545};
546
547static struct platform_device bfin_uart_device = {
548 .name = "bfin-uart",
549 .id = 1,
550 .num_resources = ARRAY_SIZE(bfin_uart_resources),
551 .resource = bfin_uart_resources,
552};
553#endif
554
555#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
556#ifdef CONFIG_BFIN_SIR0
557static struct resource bfin_sir0_resources[] = {
558 {
559 .start = 0xFFC00400,
560 .end = 0xFFC004FF,
561 .flags = IORESOURCE_MEM,
562 },
563 {
564 .start = IRQ_UART0_RX,
565 .end = IRQ_UART0_RX+1,
566 .flags = IORESOURCE_IRQ,
567 },
568 {
569 .start = CH_UART0_RX,
570 .end = CH_UART0_RX+1,
571 .flags = IORESOURCE_DMA,
572 },
573};
574
575static struct platform_device bfin_sir0_device = {
576 .name = "bfin_sir",
577 .id = 0,
578 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
579 .resource = bfin_sir0_resources,
580};
581#endif
582#ifdef CONFIG_BFIN_SIR1
583static struct resource bfin_sir1_resources[] = {
584 {
585 .start = 0xFFC02000,
586 .end = 0xFFC020FF,
587 .flags = IORESOURCE_MEM,
588 },
589 {
590 .start = IRQ_UART1_RX,
591 .end = IRQ_UART1_RX+1,
592 .flags = IORESOURCE_IRQ,
593 },
594 {
595 .start = CH_UART1_RX,
596 .end = CH_UART1_RX+1,
597 .flags = IORESOURCE_DMA,
598 },
599};
600
601static struct platform_device bfin_sir1_device = {
602 .name = "bfin_sir",
603 .id = 1,
604 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
605 .resource = bfin_sir1_resources,
606};
607#endif
608#endif
609
610#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
611static struct resource bfin_twi0_resource[] = {
612 [0] = {
613 .start = TWI0_REGBASE,
614 .end = TWI0_REGBASE + 0xFF,
615 .flags = IORESOURCE_MEM,
616 },
617 [1] = {
618 .start = IRQ_TWI,
619 .end = IRQ_TWI,
620 .flags = IORESOURCE_IRQ,
621 },
622};
623
624static struct platform_device i2c_bfin_twi_device = {
625 .name = "i2c-bfin-twi",
626 .id = 0,
627 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
628 .resource = bfin_twi0_resource,
629};
630#endif
631
632#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
633static struct platform_device bfin_sport0_uart_device = {
634 .name = "bfin-sport-uart",
635 .id = 0,
636};
637
638static struct platform_device bfin_sport1_uart_device = {
639 .name = "bfin-sport-uart",
640 .id = 1,
641};
642#endif
643
644static struct platform_device *stamp_devices[] __initdata = {
645#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
646 &bfin_pcmcia_cf_device,
647#endif
648
649#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
650 &rtc_device,
651#endif
652
653#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
654 &sl811_hcd_device,
655#endif
656
657#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
658 &isp1362_hcd_device,
659#endif
660
661#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
662 &smc91x_device,
663#endif
664
665#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
666 &dm9000_device,
667#endif
668
669#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
670 &bfin_mii_bus,
671 &bfin_mac_device,
672#endif
673
674#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
675 &net2272_bfin_device,
676#endif
677
678#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
679 &bfin_isp1760_device,
680#endif
681
682#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
683 &bfin_spi0_device,
684#endif
685
686#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
687 &bfin_fb_device,
688#endif
689
690#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
691 &bfin_fb_adv7393_device,
692#endif
693
694#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
695 &bfin_uart_device,
696#endif
697
698#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
699#ifdef CONFIG_BFIN_SIR0
700 &bfin_sir0_device,
701#endif
702#ifdef CONFIG_BFIN_SIR1
703 &bfin_sir1_device,
704#endif
705#endif
706
707#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
708 &i2c_bfin_twi_device,
709#endif
710
711#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
712 &bfin_sport0_uart_device,
713 &bfin_sport1_uart_device,
714#endif
715};
716
717static int __init generic_init(void)
718{
719 printk(KERN_INFO "%s(): registering device resources\n", __func__);
720 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
721#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
722 spi_register_board_info(bfin_spi_board_info,
723 ARRAY_SIZE(bfin_spi_board_info));
724#endif
725
726 return 0;
727}
728
729arch_initcall(generic_init);
730
731void native_machine_restart(char *cmd)
732{
733 /* workaround reboot hang when booting from SPI */
734 if ((bfin_read_SYSCR() & 0x7) == 0x3)
735 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
736}
737
738#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
739void bfin_get_ether_addr(char *addr)
740{
741 random_ether_addr(addr);
742 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
743}
744EXPORT_SYMBOL(bfin_get_ether_addr);
745#endif
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index db7d3a385e4b..3c159819e555 100644
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -134,9 +134,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
134}; 134};
135#endif 135#endif
136 136
137#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 137#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
138static struct bfin5xx_spi_chip spi_mmc_chip_info = { 138static struct bfin5xx_spi_chip mmc_spi_chip_info = {
139 .enable_dma = 1, 139 .enable_dma = 0,
140 .bits_per_word = 8, 140 .bits_per_word = 8,
141}; 141};
142#endif 142#endif
@@ -156,23 +156,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
156 }, 156 },
157#endif 157#endif
158 158
159#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 159#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
160 { 160 {
161 .modalias = "spi_mmc_dummy", 161 .modalias = "mmc_spi",
162 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 162 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
163 .bus_num = 0, 163 .bus_num = 0,
164 .chip_select = 0, 164 .chip_select = 5,
165 .platform_data = NULL, 165 .controller_data = &mmc_spi_chip_info,
166 .controller_data = &spi_mmc_chip_info,
167 .mode = SPI_MODE_3,
168 },
169 {
170 .modalias = "spi_mmc",
171 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
172 .bus_num = 0,
173 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
174 .platform_data = NULL,
175 .controller_data = &spi_mmc_chip_info,
176 .mode = SPI_MODE_3, 166 .mode = SPI_MODE_3,
177 }, 167 },
178#endif 168#endif
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 590eb3a139b7..4e1de1e53f89 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -289,9 +289,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
289}; 289};
290#endif 290#endif
291 291
292#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 292#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
293static struct bfin5xx_spi_chip spi_mmc_chip_info = { 293static struct bfin5xx_spi_chip mmc_spi_chip_info = {
294 .enable_dma = 1, 294 .enable_dma = 0,
295 .bits_per_word = 8, 295 .bits_per_word = 8,
296}; 296};
297#endif 297#endif
@@ -364,23 +364,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
364 .controller_data = &ad9960_spi_chip_info, 364 .controller_data = &ad9960_spi_chip_info,
365 }, 365 },
366#endif 366#endif
367#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 367#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
368 {
369 .modalias = "spi_mmc_dummy",
370 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
371 .bus_num = 0,
372 .chip_select = 7,
373 .platform_data = NULL,
374 .controller_data = &spi_mmc_chip_info,
375 .mode = SPI_MODE_3,
376 },
377 { 368 {
378 .modalias = "spi_mmc", 369 .modalias = "mmc_spi",
379 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 370 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
380 .bus_num = 0, 371 .bus_num = 0,
381 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 372 .chip_select = 5,
382 .platform_data = NULL, 373 .controller_data = &mmc_spi_chip_info,
383 .controller_data = &spi_mmc_chip_info,
384 .mode = SPI_MODE_3, 374 .mode = SPI_MODE_3,
385 }, 375 },
386#endif 376#endif
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
index 3f4f203a06ec..53ad10f3cd76 100644
--- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
108}; 108};
109#endif 109#endif
110 110
111#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 111#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
112static struct bfin5xx_spi_chip spi_mmc_chip_info = { 112static struct bfin5xx_spi_chip mmc_spi_chip_info = {
113 .enable_dma = 1, 113 .enable_dma = 0,
114 .bits_per_word = 8, 114 .bits_per_word = 8,
115}; 115};
116#endif 116#endif
@@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
160 }, 160 },
161#endif 161#endif
162 162
163#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 163#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
164 {
165 .modalias = "spi_mmc_dummy",
166 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
167 .bus_num = 0,
168 .chip_select = 7,
169 .platform_data = NULL,
170 .controller_data = &spi_mmc_chip_info,
171 .mode = SPI_MODE_3,
172 },
173 { 164 {
174 .modalias = "spi_mmc", 165 .modalias = "mmc_spi",
175 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 166 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
176 .bus_num = 0, 167 .bus_num = 0,
177 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 168 .chip_select = 5,
178 .platform_data = NULL, 169 .controller_data = &mmc_spi_chip_info,
179 .controller_data = &spi_mmc_chip_info,
180 .mode = SPI_MODE_3, 170 .mode = SPI_MODE_3,
181 }, 171 },
182#endif 172#endif
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index 9cb39121d1cb..1bfd80c26c90 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf537/anomaly.h 2 * File: include/asm-blackfin/mach-bf537/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -110,7 +110,7 @@
110#define ANOMALY_05000301 (1) 110#define ANOMALY_05000301 (1)
111/* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ 111/* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */
112#define ANOMALY_05000304 (__SILICON_REVISION__ < 3) 112#define ANOMALY_05000304 (__SILICON_REVISION__ < 3)
113/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ 113/* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */
114#define ANOMALY_05000305 (__SILICON_REVISION__ < 3) 114#define ANOMALY_05000305 (__SILICON_REVISION__ < 3)
115/* SCKELOW Bit Does Not Maintain State Through Hibernate */ 115/* SCKELOW Bit Does Not Maintain State Through Hibernate */
116#define ANOMALY_05000307 (__SILICON_REVISION__ < 3) 116#define ANOMALY_05000307 (__SILICON_REVISION__ < 3)
@@ -168,9 +168,12 @@
168#define ANOMALY_05000323 (0) 168#define ANOMALY_05000323 (0)
169#define ANOMALY_05000353 (1) 169#define ANOMALY_05000353 (1)
170#define ANOMALY_05000363 (0) 170#define ANOMALY_05000363 (0)
171#define ANOMALY_05000380 (0)
171#define ANOMALY_05000386 (1) 172#define ANOMALY_05000386 (1)
172#define ANOMALY_05000412 (0) 173#define ANOMALY_05000412 (0)
173#define ANOMALY_05000432 (0) 174#define ANOMALY_05000432 (0)
174#define ANOMALY_05000435 (0) 175#define ANOMALY_05000435 (0)
176#define ANOMALY_05000447 (0)
177#define ANOMALY_05000448 (0)
175 178
176#endif 179#endif
diff --git a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
index b3f87e1d16a2..9e34700844a2 100644
--- a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
144 CH_UART0_TX, 144 CH_UART0_TX,
145 CH_UART0_RX, 145 CH_UART0_RX,
146#endif 146#endif
147#ifdef CONFIG_BFIN_UART0_CTSRTS 147#ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 CONFIG_UART0_CTS_PIN, 148 CONFIG_UART0_CTS_PIN,
149 CONFIG_UART0_RTS_PIN, 149 CONFIG_UART0_RTS_PIN,
150#endif 150#endif
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
158 CH_UART1_TX, 158 CH_UART1_TX,
159 CH_UART1_RX, 159 CH_UART1_RX,
160#endif 160#endif
161#ifdef CONFIG_BFIN_UART1_CTSRTS 161#ifdef CONFIG_SERIAL_BFIN_CTSRTS
162 CONFIG_UART1_CTS_PIN, 162 CONFIG_UART1_CTS_PIN,
163 CONFIG_UART1_RTS_PIN, 163 CONFIG_UART1_RTS_PIN,
164#endif 164#endif
diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h
index e130b4f8a05d..3a5699827363 100644
--- a/arch/blackfin/mach-bf538/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf538/include/mach/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf538/anomaly.h 2 * File: include/asm-blackfin/mach-bf538/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -120,13 +120,17 @@
120#define ANOMALY_05000198 (0) 120#define ANOMALY_05000198 (0)
121#define ANOMALY_05000230 (0) 121#define ANOMALY_05000230 (0)
122#define ANOMALY_05000263 (0) 122#define ANOMALY_05000263 (0)
123#define ANOMALY_05000305 (0)
123#define ANOMALY_05000311 (0) 124#define ANOMALY_05000311 (0)
124#define ANOMALY_05000323 (0) 125#define ANOMALY_05000323 (0)
125#define ANOMALY_05000353 (1) 126#define ANOMALY_05000353 (1)
126#define ANOMALY_05000363 (0) 127#define ANOMALY_05000363 (0)
128#define ANOMALY_05000380 (0)
127#define ANOMALY_05000386 (1) 129#define ANOMALY_05000386 (1)
128#define ANOMALY_05000412 (0) 130#define ANOMALY_05000412 (0)
129#define ANOMALY_05000432 (0) 131#define ANOMALY_05000432 (0)
130#define ANOMALY_05000435 (0) 132#define ANOMALY_05000435 (0)
133#define ANOMALY_05000447 (0)
134#define ANOMALY_05000448 (0)
131 135
132#endif 136#endif
diff --git a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
index 40503b6b89a3..3c2811ebecdd 100644
--- a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
144 CH_UART0_TX, 144 CH_UART0_TX,
145 CH_UART0_RX, 145 CH_UART0_RX,
146#endif 146#endif
147#ifdef CONFIG_BFIN_UART0_CTSRTS 147#ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 CONFIG_UART0_CTS_PIN, 148 CONFIG_UART0_CTS_PIN,
149 CONFIG_UART0_RTS_PIN, 149 CONFIG_UART0_RTS_PIN,
150#endif 150#endif
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
158 CH_UART1_TX, 158 CH_UART1_TX,
159 CH_UART1_RX, 159 CH_UART1_RX,
160#endif 160#endif
161#ifdef CONFIG_BFIN_UART1_CTSRTS 161#ifdef CONFIG_SERIAL_BFIN_CTSRTS
162 CONFIG_UART1_CTS_PIN, 162 CONFIG_UART1_CTS_PIN,
163 CONFIG_UART1_RTS_PIN, 163 CONFIG_UART1_RTS_PIN,
164#endif 164#endif
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index 23d03c52f4b4..882e40ccf0d1 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -2,12 +2,12 @@
2 * File: include/asm-blackfin/mach-bf548/anomaly.h 2 * File: include/asm-blackfin/mach-bf548/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
9/* This file shoule be up to date with: 9/* This file shoule be up to date with:
10 * - Revision G, 08/07/2008; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List 10 * - Revision H, 01/16/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
11 */ 11 */
12 12
13#ifndef _MACH_ANOMALY_H_ 13#ifndef _MACH_ANOMALY_H_
@@ -91,8 +91,6 @@
91#define ANOMALY_05000371 (__SILICON_REVISION__ < 2) 91#define ANOMALY_05000371 (__SILICON_REVISION__ < 2)
92/* USB DP/DM Data Pins May Lose State When Entering Hibernate */ 92/* USB DP/DM Data Pins May Lose State When Entering Hibernate */
93#define ANOMALY_05000372 (__SILICON_REVISION__ < 1) 93#define ANOMALY_05000372 (__SILICON_REVISION__ < 1)
94/* Mobile DDR Operation Not Functional */
95#define ANOMALY_05000377 (1)
96/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */ 94/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */
97#define ANOMALY_05000378 (__SILICON_REVISION__ < 2) 95#define ANOMALY_05000378 (__SILICON_REVISION__ < 2)
98/* 16-Bit NAND FLASH Boot Mode Is Not Functional */ 96/* 16-Bit NAND FLASH Boot Mode Is Not Functional */
@@ -157,8 +155,22 @@
157#define ANOMALY_05000429 (__SILICON_REVISION__ < 2) 155#define ANOMALY_05000429 (__SILICON_REVISION__ < 2)
158/* Software System Reset Corrupts PLL_LOCKCNT Register */ 156/* Software System Reset Corrupts PLL_LOCKCNT Register */
159#define ANOMALY_05000430 (__SILICON_REVISION__ >= 2) 157#define ANOMALY_05000430 (__SILICON_REVISION__ >= 2)
158/* Incorrect Use of Stack in Lockbox Firmware During Authentication */
159#define ANOMALY_05000431 (__SILICON_REVISION__ < 3)
160/* OTP Write Accesses Not Supported */
161#define ANOMALY_05000442 (__SILICON_REVISION__ < 1)
160/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ 162/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
161#define ANOMALY_05000443 (1) 163#define ANOMALY_05000443 (1)
164/* CDMAPRIO and L2DMAPRIO Bits in the SYSCR Register Are Not Functional */
165#define ANOMALY_05000446 (1)
166/* UART IrDA Receiver Fails on Extended Bit Pulses */
167#define ANOMALY_05000447 (1)
168/* DDR Clock Duty Cycle Spec Violation (tCH, tCL) */
169#define ANOMALY_05000448 (__SILICON_REVISION__ == 1)
170/* Reduced Timing Margins on DDR Output Setup and Hold (tDS and tDH) */
171#define ANOMALY_05000449 (__SILICON_REVISION__ == 1)
172/* USB DMA Mode 1 Short Packet Data Corruption */
173#define ANOMALY_05000450 (1
162 174
163/* Anomalies that don't exist on this proc */ 175/* Anomalies that don't exist on this proc */
164#define ANOMALY_05000125 (0) 176#define ANOMALY_05000125 (0)
@@ -171,6 +183,8 @@
171#define ANOMALY_05000263 (0) 183#define ANOMALY_05000263 (0)
172#define ANOMALY_05000266 (0) 184#define ANOMALY_05000266 (0)
173#define ANOMALY_05000273 (0) 185#define ANOMALY_05000273 (0)
186#define ANOMALY_05000278 (0)
187#define ANOMALY_05000305 (0)
174#define ANOMALY_05000307 (0) 188#define ANOMALY_05000307 (0)
175#define ANOMALY_05000311 (0) 189#define ANOMALY_05000311 (0)
176#define ANOMALY_05000323 (0) 190#define ANOMALY_05000323 (0)
diff --git a/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
index e4cf35e7ab9f..c05e79cba257 100644
--- a/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
@@ -63,7 +63,7 @@
63#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) 63#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v)
64#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) 64#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF)
65 65
66#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 66#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART2_CTSRTS)
67# define CONFIG_SERIAL_BFIN_CTSRTS 67# define CONFIG_SERIAL_BFIN_CTSRTS
68 68
69# ifndef CONFIG_UART0_CTS_PIN 69# ifndef CONFIG_UART0_CTS_PIN
@@ -74,12 +74,12 @@
74# define CONFIG_UART0_RTS_PIN -1 74# define CONFIG_UART0_RTS_PIN -1
75# endif 75# endif
76 76
77# ifndef CONFIG_UART1_CTS_PIN 77# ifndef CONFIG_UART2_CTS_PIN
78# define CONFIG_UART1_CTS_PIN -1 78# define CONFIG_UART2_CTS_PIN -1
79# endif 79# endif
80 80
81# ifndef CONFIG_UART1_RTS_PIN 81# ifndef CONFIG_UART2_RTS_PIN
82# define CONFIG_UART1_RTS_PIN -1 82# define CONFIG_UART2_RTS_PIN -1
83# endif 83# endif
84#endif 84#endif
85 85
@@ -130,7 +130,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
130 CH_UART0_TX, 130 CH_UART0_TX,
131 CH_UART0_RX, 131 CH_UART0_RX,
132#endif 132#endif
133#ifdef CONFIG_BFIN_UART0_CTSRTS 133#ifdef CONFIG_SERIAL_BFIN_CTSRTS
134 CONFIG_UART0_CTS_PIN, 134 CONFIG_UART0_CTS_PIN,
135 CONFIG_UART0_RTS_PIN, 135 CONFIG_UART0_RTS_PIN,
136#endif 136#endif
@@ -144,6 +144,10 @@ struct bfin_serial_res bfin_serial_resource[] = {
144 CH_UART1_TX, 144 CH_UART1_TX,
145 CH_UART1_RX, 145 CH_UART1_RX,
146#endif 146#endif
147#ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 0,
149 0,
150#endif
147 }, 151 },
148#endif 152#endif
149#ifdef CONFIG_SERIAL_BFIN_UART2 153#ifdef CONFIG_SERIAL_BFIN_UART2
@@ -154,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
154 CH_UART2_TX, 158 CH_UART2_TX,
155 CH_UART2_RX, 159 CH_UART2_RX,
156#endif 160#endif
157#ifdef CONFIG_BFIN_UART2_CTSRTS 161#ifdef CONFIG_SERIAL_BFIN_CTSRTS
158 CONFIG_UART2_CTS_PIN, 162 CONFIG_UART2_CTS_PIN,
159 CONFIG_UART2_RTS_PIN, 163 CONFIG_UART2_RTS_PIN,
160#endif 164#endif
@@ -168,6 +172,10 @@ struct bfin_serial_res bfin_serial_resource[] = {
168 CH_UART3_TX, 172 CH_UART3_TX,
169 CH_UART3_RX, 173 CH_UART3_RX,
170#endif 174#endif
175#ifdef CONFIG_SERIAL_BFIN_CTSRTS
176 0,
177 0,
178#endif
171 }, 179 },
172#endif 180#endif
173}; 181};
diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h
index 60299a71e090..f194625f6821 100644
--- a/arch/blackfin/mach-bf548/include/mach/irq.h
+++ b/arch/blackfin/mach-bf548/include/mach/irq.h
@@ -123,8 +123,8 @@ Events (highest priority) EMU 0
123#define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */ 123#define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */
124#define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */ 124#define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */
125#define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */ 125#define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */
126#define IRQ_EPP1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */ 126#define IRQ_EPPI1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */
127#define IRQ_EPP2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */ 127#define IRQ_EPPI2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */
128#define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */ 128#define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */
129#define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */ 129#define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */
130#define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */ 130#define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */
@@ -361,8 +361,8 @@ Events (highest priority) EMU 0
361#define IRQ_UART2_ERR IRQ_UART2_ERROR 361#define IRQ_UART2_ERR IRQ_UART2_ERROR
362#define IRQ_CAN0_ERR IRQ_CAN0_ERROR 362#define IRQ_CAN0_ERR IRQ_CAN0_ERROR
363#define IRQ_MXVR_ERR IRQ_MXVR_ERROR 363#define IRQ_MXVR_ERR IRQ_MXVR_ERROR
364#define IRQ_EPP1_ERR IRQ_EPP1_ERROR 364#define IRQ_EPPI1_ERR IRQ_EPPI1_ERROR
365#define IRQ_EPP2_ERR IRQ_EPP2_ERROR 365#define IRQ_EPPI2_ERR IRQ_EPPI2_ERROR
366#define IRQ_UART3_ERR IRQ_UART3_ERROR 366#define IRQ_UART3_ERR IRQ_UART3_ERROR
367#define IRQ_HOST_ERR IRQ_HOST_ERROR 367#define IRQ_HOST_ERR IRQ_HOST_ERROR
368#define IRQ_PIXC_ERR IRQ_PIXC_ERROR 368#define IRQ_PIXC_ERR IRQ_PIXC_ERROR
diff --git a/arch/blackfin/mach-bf561/boards/Kconfig b/arch/blackfin/mach-bf561/boards/Kconfig
index e41a67b1fb53..e4bc6d7c5a6a 100644
--- a/arch/blackfin/mach-bf561/boards/Kconfig
+++ b/arch/blackfin/mach-bf561/boards/Kconfig
@@ -19,9 +19,4 @@ config BFIN561_BLUETECHNIX_CM
19 help 19 help
20 CM-BF561 support for EVAL- and DEV-Board. 20 CM-BF561 support for EVAL- and DEV-Board.
21 21
22config GENERIC_BF561_BOARD
23 bool "Generic"
24 help
25 Generic or Custom board support.
26
27endchoice 22endchoice
diff --git a/arch/blackfin/mach-bf561/boards/Makefile b/arch/blackfin/mach-bf561/boards/Makefile
index 04add010b568..3a152559e957 100644
--- a/arch/blackfin/mach-bf561/boards/Makefile
+++ b/arch/blackfin/mach-bf561/boards/Makefile
@@ -2,7 +2,6 @@
2# arch/blackfin/mach-bf561/boards/Makefile 2# arch/blackfin/mach-bf561/boards/Makefile
3# 3#
4 4
5obj-$(CONFIG_GENERIC_BF561_BOARD) += generic_board.o
6obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o 5obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o
7obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o 6obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o
8obj-$(CONFIG_BFIN561_TEPLA) += tepla.o 7obj-$(CONFIG_BFIN561_TEPLA) += tepla.o
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 6880d1ebfe60..f623c6b0719f 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -105,9 +105,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
105}; 105};
106#endif 106#endif
107 107
108#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 108#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
109static struct bfin5xx_spi_chip spi_mmc_chip_info = { 109static struct bfin5xx_spi_chip mmc_spi_chip_info = {
110 .enable_dma = 1, 110 .enable_dma = 0,
111 .bits_per_word = 8, 111 .bits_per_word = 8,
112}; 112};
113#endif 113#endif
@@ -155,14 +155,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
155 .controller_data = &ad9960_spi_chip_info, 155 .controller_data = &ad9960_spi_chip_info,
156 }, 156 },
157#endif 157#endif
158#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 158#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
159 { 159 {
160 .modalias = "spi_mmc", 160 .modalias = "mmc_spi",
161 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 161 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
162 .bus_num = 0, 162 .bus_num = 0,
163 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 163 .chip_select = 5,
164 .platform_data = NULL, 164 .controller_data = &mmc_spi_chip_info,
165 .controller_data = &spi_mmc_chip_info,
166 .mode = SPI_MODE_3, 165 .mode = SPI_MODE_3,
167 }, 166 },
168#endif 167#endif
diff --git a/arch/blackfin/mach-bf561/boards/generic_board.c b/arch/blackfin/mach-bf561/boards/generic_board.c
deleted file mode 100644
index 0ba366a0e696..000000000000
--- a/arch/blackfin/mach-bf561/boards/generic_board.c
+++ /dev/null
@@ -1,113 +0,0 @@
1/*
2 * File: arch/blackfin/mach-bf561/generic_board.c
3 * Based on: arch/blackfin/mach-bf533/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/irq.h>
34
35const char bfin_board_name[] = "UNKNOWN BOARD";
36
37/*
38 * Driver needs to know address, irq and flag pin.
39 */
40#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
41static struct resource smc91x_resources[] = {
42 {
43 .start = 0x2C010300,
44 .end = 0x2C010300 + 16,
45 .flags = IORESOURCE_MEM,
46 }, {
47 .start = IRQ_PROG_INTB,
48 .end = IRQ_PROG_INTB,
49 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
50 }, {
51 .start = IRQ_PF9,
52 .end = IRQ_PF9,
53 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
54 },
55};
56
57static struct platform_device smc91x_device = {
58 .name = "smc91x",
59 .id = 0,
60 .num_resources = ARRAY_SIZE(smc91x_resources),
61 .resource = smc91x_resources,
62};
63#endif
64
65#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
66#ifdef CONFIG_BFIN_SIR0
67static struct resource bfin_sir0_resources[] = {
68 {
69 .start = 0xFFC00400,
70 .end = 0xFFC004FF,
71 .flags = IORESOURCE_MEM,
72 },
73 {
74 .start = IRQ_UART0_RX,
75 .end = IRQ_UART0_RX+1,
76 .flags = IORESOURCE_IRQ,
77 },
78 {
79 .start = CH_UART0_RX,
80 .end = CH_UART0_RX+1,
81 .flags = IORESOURCE_DMA,
82 },
83};
84
85static struct platform_device bfin_sir0_device = {
86 .name = "bfin_sir",
87 .id = 0,
88 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
89 .resource = bfin_sir0_resources,
90};
91#endif
92#endif
93
94static struct platform_device *generic_board_devices[] __initdata = {
95#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
96 &smc91x_device,
97#endif
98
99#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
100#ifdef CONFIG_BFIN_SIR0
101 &bfin_sir0_device,
102#endif
103#endif
104};
105
106static int __init generic_board_init(void)
107{
108 printk(KERN_INFO "%s(): registering device resources\n", __func__);
109 return platform_add_devices(generic_board_devices,
110 ARRAY_SIZE(generic_board_devices));
111}
112
113arch_initcall(generic_board_init);
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h
index 1a9e17562821..d0b0b3506440 100644
--- a/arch/blackfin/mach-bf561/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf561/anomaly.h 2 * File: include/asm-blackfin/mach-bf561/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2008 Analog Devices Inc. 5 * Copyright (C) 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -224,7 +224,7 @@
224#define ANOMALY_05000301 (1) 224#define ANOMALY_05000301 (1)
225/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ 225/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */
226#define ANOMALY_05000302 (1) 226#define ANOMALY_05000302 (1)
227/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ 227/* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */
228#define ANOMALY_05000305 (__SILICON_REVISION__ < 5) 228#define ANOMALY_05000305 (__SILICON_REVISION__ < 5)
229/* SCKELOW Bit Does Not Maintain State Through Hibernate */ 229/* SCKELOW Bit Does Not Maintain State Through Hibernate */
230#define ANOMALY_05000307 (__SILICON_REVISION__ < 5) 230#define ANOMALY_05000307 (__SILICON_REVISION__ < 5)
@@ -283,8 +283,11 @@
283#define ANOMALY_05000273 (0) 283#define ANOMALY_05000273 (0)
284#define ANOMALY_05000311 (0) 284#define ANOMALY_05000311 (0)
285#define ANOMALY_05000353 (1) 285#define ANOMALY_05000353 (1)
286#define ANOMALY_05000380 (0)
286#define ANOMALY_05000386 (1) 287#define ANOMALY_05000386 (1)
287#define ANOMALY_05000432 (0) 288#define ANOMALY_05000432 (0)
288#define ANOMALY_05000435 (0) 289#define ANOMALY_05000435 (0)
290#define ANOMALY_05000447 (0)
291#define ANOMALY_05000448 (0)
289 292
290#endif 293#endif
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
index 043bfcf26c52..ca8c5f645209 100644
--- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
134 CH_UART_TX, 134 CH_UART_TX,
135 CH_UART_RX, 135 CH_UART_RX,
136#endif 136#endif
137#ifdef CONFIG_BFIN_UART0_CTSRTS 137#ifdef CONFIG_SERIAL_BFIN_CTSRTS
138 CONFIG_UART0_CTS_PIN, 138 CONFIG_UART0_CTS_PIN,
139 CONFIG_UART0_RTS_PIN, 139 CONFIG_UART0_RTS_PIN,
140#endif 140#endif
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c
index 98133b968f7b..80d39b2f9db2 100644
--- a/arch/blackfin/mach-common/arch_checks.c
+++ b/arch/blackfin/mach-common/arch_checks.c
@@ -62,3 +62,12 @@
62#if (CONFIG_BOOT_LOAD & 0x3) 62#if (CONFIG_BOOT_LOAD & 0x3)
63# error "The kernel load address must be 4 byte aligned" 63# error "The kernel load address must be 4 byte aligned"
64#endif 64#endif
65
66/* The entire kernel must be able to make a 24bit pcrel call to start of L1 */
67#if ((0xffffffff - L1_CODE_START + 1) + CONFIG_BOOT_LOAD) > 0x1000000
68# error "The kernel load address is too high; keep it below 10meg for safety"
69#endif
70
71#if ANOMALY_05000448
72# error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes.
73#endif
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index 3c98dacbf289..aa0648c6a9fe 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -66,11 +66,33 @@
66 66
67/* Invalidate all instruction cache lines assocoiated with this memory area */ 67/* Invalidate all instruction cache lines assocoiated with this memory area */
68ENTRY(_blackfin_icache_flush_range) 68ENTRY(_blackfin_icache_flush_range)
69/*
70 * Walkaround to avoid loading wrong instruction after invalidating icache
71 * and following sequence is met.
72 *
73 * 1) One instruction address is cached in the instruction cache.
74 * 2) This instruction in SDRAM is changed.
75 * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range().
76 * 4) This instruction is executed again, but the old one is loaded.
77 */
78 P0 = R0;
79 IFLUSH[P0];
69 do_flush IFLUSH, , nop 80 do_flush IFLUSH, , nop
70ENDPROC(_blackfin_icache_flush_range) 81ENDPROC(_blackfin_icache_flush_range)
71 82
72/* Flush all cache lines assocoiated with this area of memory. */ 83/* Flush all cache lines assocoiated with this area of memory. */
73ENTRY(_blackfin_icache_dcache_flush_range) 84ENTRY(_blackfin_icache_dcache_flush_range)
85/*
86 * Walkaround to avoid loading wrong instruction after invalidating icache
87 * and following sequence is met.
88 *
89 * 1) One instruction address is cached in the instruction cache.
90 * 2) This instruction in SDRAM is changed.
91 * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range().
92 * 4) This instruction is executed again, but the old one is loaded.
93 */
94 P0 = R0;
95 IFLUSH[P0];
74 do_flush FLUSH, IFLUSH 96 do_flush FLUSH, IFLUSH
75ENDPROC(_blackfin_icache_dcache_flush_range) 97ENDPROC(_blackfin_icache_dcache_flush_range)
76 98
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c
index 9dddb6f8cc85..35393651359b 100644
--- a/arch/blackfin/mach-common/clocks-init.c
+++ b/arch/blackfin/mach-common/clocks-init.c
@@ -17,7 +17,7 @@
17#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */ 17#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */
18#define PLL_CTL_VAL \ 18#define PLL_CTL_VAL \
19 (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \ 19 (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \
20 (PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0)) 20 (PLL_BYPASS << 8) | (ANOMALY_05000305 ? 0 : 0x8000))
21 21
22__attribute__((l1_text)) 22__attribute__((l1_text))
23static void do_sync(void) 23static void do_sync(void)
diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S
index 4da50bcd9300..8009a512fb11 100644
--- a/arch/blackfin/mach-common/dpmc_modes.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -376,10 +376,22 @@ ENTRY(_do_hibernate)
376#endif 376#endif
377 377
378#ifdef PINT0_ASSIGN 378#ifdef PINT0_ASSIGN
379 PM_SYS_PUSH(PINT0_MASK_SET)
380 PM_SYS_PUSH(PINT1_MASK_SET)
381 PM_SYS_PUSH(PINT2_MASK_SET)
382 PM_SYS_PUSH(PINT3_MASK_SET)
379 PM_SYS_PUSH(PINT0_ASSIGN) 383 PM_SYS_PUSH(PINT0_ASSIGN)
380 PM_SYS_PUSH(PINT1_ASSIGN) 384 PM_SYS_PUSH(PINT1_ASSIGN)
381 PM_SYS_PUSH(PINT2_ASSIGN) 385 PM_SYS_PUSH(PINT2_ASSIGN)
382 PM_SYS_PUSH(PINT3_ASSIGN) 386 PM_SYS_PUSH(PINT3_ASSIGN)
387 PM_SYS_PUSH(PINT0_INVERT_SET)
388 PM_SYS_PUSH(PINT1_INVERT_SET)
389 PM_SYS_PUSH(PINT2_INVERT_SET)
390 PM_SYS_PUSH(PINT3_INVERT_SET)
391 PM_SYS_PUSH(PINT0_EDGE_SET)
392 PM_SYS_PUSH(PINT1_EDGE_SET)
393 PM_SYS_PUSH(PINT2_EDGE_SET)
394 PM_SYS_PUSH(PINT3_EDGE_SET)
383#endif 395#endif
384 396
385 PM_SYS_PUSH(EBIU_AMBCTL0) 397 PM_SYS_PUSH(EBIU_AMBCTL0)
@@ -714,10 +726,22 @@ ENTRY(_do_hibernate)
714 PM_SYS_POP(EBIU_AMBCTL0) 726 PM_SYS_POP(EBIU_AMBCTL0)
715 727
716#ifdef PINT0_ASSIGN 728#ifdef PINT0_ASSIGN
729 PM_SYS_POP(PINT3_EDGE_SET)
730 PM_SYS_POP(PINT2_EDGE_SET)
731 PM_SYS_POP(PINT1_EDGE_SET)
732 PM_SYS_POP(PINT0_EDGE_SET)
733 PM_SYS_POP(PINT3_INVERT_SET)
734 PM_SYS_POP(PINT2_INVERT_SET)
735 PM_SYS_POP(PINT1_INVERT_SET)
736 PM_SYS_POP(PINT0_INVERT_SET)
717 PM_SYS_POP(PINT3_ASSIGN) 737 PM_SYS_POP(PINT3_ASSIGN)
718 PM_SYS_POP(PINT2_ASSIGN) 738 PM_SYS_POP(PINT2_ASSIGN)
719 PM_SYS_POP(PINT1_ASSIGN) 739 PM_SYS_POP(PINT1_ASSIGN)
720 PM_SYS_POP(PINT0_ASSIGN) 740 PM_SYS_POP(PINT0_ASSIGN)
741 PM_SYS_POP(PINT3_MASK_SET)
742 PM_SYS_POP(PINT2_MASK_SET)
743 PM_SYS_POP(PINT1_MASK_SET)
744 PM_SYS_POP(PINT0_MASK_SET)
721#endif 745#endif
722 746
723#ifdef SICA_IWR1 747#ifdef SICA_IWR1
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 88de053bbe8e..21e65a339a22 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -600,6 +600,19 @@ ENTRY(_system_call)
600 p2 = [p2]; 600 p2 = [p2];
601 601
602 [p2+(TASK_THREAD+THREAD_KSP)] = sp; 602 [p2+(TASK_THREAD+THREAD_KSP)] = sp;
603#ifdef CONFIG_IPIPE
604 r0 = sp;
605 SP += -12;
606 call ___ipipe_syscall_root;
607 SP += 12;
608 cc = r0 == 1;
609 if cc jump .Lsyscall_really_exit;
610 cc = r0 == -1;
611 if cc jump .Lresume_userspace;
612 r3 = [sp + PT_R3];
613 r4 = [sp + PT_R4];
614 p0 = [sp + PT_ORIG_P0];
615#endif /* CONFIG_IPIPE */
603 616
604 /* Check the System Call */ 617 /* Check the System Call */
605 r7 = __NR_syscall; 618 r7 = __NR_syscall;
@@ -654,6 +667,17 @@ ENTRY(_system_call)
654 r7 = r7 & r4; 667 r7 = r7 & r4;
655 668
656.Lsyscall_resched: 669.Lsyscall_resched:
670#ifdef CONFIG_IPIPE
671 cc = BITTST(r7, TIF_IRQ_SYNC);
672 if !cc jump .Lsyscall_no_irqsync;
673 [--sp] = reti;
674 r0 = [sp++];
675 SP += -12;
676 call ___ipipe_sync_root;
677 SP += 12;
678 jump .Lresume_userspace_1;
679.Lsyscall_no_irqsync:
680#endif
657 cc = BITTST(r7, TIF_NEED_RESCHED); 681 cc = BITTST(r7, TIF_NEED_RESCHED);
658 if !cc jump .Lsyscall_sigpending; 682 if !cc jump .Lsyscall_sigpending;
659 683
@@ -685,6 +709,10 @@ ENTRY(_system_call)
685.Lsyscall_really_exit: 709.Lsyscall_really_exit:
686 r5 = [sp + PT_RESERVED]; 710 r5 = [sp + PT_RESERVED];
687 rets = r5; 711 rets = r5;
712#ifdef CONFIG_IPIPE
713 [--sp] = reti;
714 r5 = [sp++];
715#endif /* CONFIG_IPIPE */
688 rts; 716 rts;
689ENDPROC(_system_call) 717ENDPROC(_system_call)
690 718
@@ -771,6 +799,15 @@ _new_old_task:
771ENDPROC(_resume) 799ENDPROC(_resume)
772 800
773ENTRY(_ret_from_exception) 801ENTRY(_ret_from_exception)
802#ifdef CONFIG_IPIPE
803 [--sp] = rets;
804 SP += -12;
805 call ___ipipe_check_root
806 SP += 12
807 rets = [sp++];
808 cc = r0 == 0;
809 if cc jump 4f; /* not on behalf of Linux, get out */
810#endif /* CONFIG_IPIPE */
774 p2.l = lo(IPEND); 811 p2.l = lo(IPEND);
775 p2.h = hi(IPEND); 812 p2.h = hi(IPEND);
776 813
@@ -827,6 +864,28 @@ ENTRY(_ret_from_exception)
827 rts; 864 rts;
828ENDPROC(_ret_from_exception) 865ENDPROC(_ret_from_exception)
829 866
867#ifdef CONFIG_IPIPE
868
869_sync_root_irqs:
870 [--sp] = reti; /* Reenable interrupts */
871 r0 = [sp++];
872 jump.l ___ipipe_sync_root
873
874_resume_kernel_from_int:
875 r0.l = _sync_root_irqs
876 r0.h = _sync_root_irqs
877 [--sp] = rets;
878 [--sp] = ( r7:4, p5:3 );
879 SP += -12;
880 call ___ipipe_call_irqtail
881 SP += 12;
882 ( r7:4, p5:3 ) = [sp++];
883 rets = [sp++];
884 rts
885#else
886#define _resume_kernel_from_int 2f
887#endif
888
830ENTRY(_return_from_int) 889ENTRY(_return_from_int)
831 /* If someone else already raised IRQ 15, do nothing. */ 890 /* If someone else already raised IRQ 15, do nothing. */
832 csync; 891 csync;
@@ -848,7 +907,7 @@ ENTRY(_return_from_int)
848 r1 = r0 - r1; 907 r1 = r0 - r1;
849 r2 = r0 & r1; 908 r2 = r0 & r1;
850 cc = r2 == 0; 909 cc = r2 == 0;
851 if !cc jump 2f; 910 if !cc jump _resume_kernel_from_int;
852 911
853 /* Lower the interrupt level to 15. */ 912 /* Lower the interrupt level to 15. */
854 p0.l = lo(EVT15); 913 p0.l = lo(EVT15);
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 43c4eb9acb65..0069c2dd4625 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -235,6 +235,7 @@ ENDPROC(_evt_system_call)
235 235
236#ifdef CONFIG_IPIPE 236#ifdef CONFIG_IPIPE
237ENTRY(___ipipe_call_irqtail) 237ENTRY(___ipipe_call_irqtail)
238 p0 = r0;
238 r0.l = 1f; 239 r0.l = 1f;
239 r0.h = 1f; 240 r0.h = 1f;
240 reti = r0; 241 reti = r0;
@@ -242,9 +243,6 @@ ENTRY(___ipipe_call_irqtail)
2421: 2431:
243 [--sp] = rets; 244 [--sp] = rets;
244 [--sp] = ( r7:4, p5:3 ); 245 [--sp] = ( r7:4, p5:3 );
245 p0.l = ___ipipe_irq_tail_hook;
246 p0.h = ___ipipe_irq_tail_hook;
247 p0 = [p0];
248 sp += -12; 246 sp += -12;
249 call (p0); 247 call (p0);
250 sp += 12; 248 sp += 12;
@@ -259,7 +257,7 @@ ENTRY(___ipipe_call_irqtail)
259 p0.h = hi(EVT14); 257 p0.h = hi(EVT14);
260 [p0] = r0; 258 [p0] = r0;
261 csync; 259 csync;
262 r0 = 0x401f; 260 r0 = 0x401f (z);
263 sti r0; 261 sti r0;
264 raise 14; 262 raise 14;
265 [--sp] = reti; /* IRQs on. */ 263 [--sp] = reti; /* IRQs on. */
@@ -277,11 +275,7 @@ ENTRY(___ipipe_call_irqtail)
277 p0.h = _bfin_irq_flags; 275 p0.h = _bfin_irq_flags;
278 r0 = [p0]; 276 r0 = [p0];
279 sti r0; 277 sti r0;
280#if 0 /* FIXME: this actually raises scheduling latencies */
281 /* Reenable interrupts */
282 [--sp] = reti;
283 r0 = [sp++];
284#endif
285 rts; 278 rts;
286ENDPROC(___ipipe_call_irqtail) 279ENDPROC(___ipipe_call_irqtail)
280
287#endif /* CONFIG_IPIPE */ 281#endif /* CONFIG_IPIPE */
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 202494568c6c..a7d7b2dd4059 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -161,11 +161,15 @@ static void bfin_core_unmask_irq(unsigned int irq)
161 161
162static void bfin_internal_mask_irq(unsigned int irq) 162static void bfin_internal_mask_irq(unsigned int irq)
163{ 163{
164 unsigned long flags;
165
164#ifdef CONFIG_BF53x 166#ifdef CONFIG_BF53x
167 local_irq_save_hw(flags);
165 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & 168 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
166 ~(1 << SIC_SYSIRQ(irq))); 169 ~(1 << SIC_SYSIRQ(irq)));
167#else 170#else
168 unsigned mask_bank, mask_bit; 171 unsigned mask_bank, mask_bit;
172 local_irq_save_hw(flags);
169 mask_bank = SIC_SYSIRQ(irq) / 32; 173 mask_bank = SIC_SYSIRQ(irq) / 32;
170 mask_bit = SIC_SYSIRQ(irq) % 32; 174 mask_bit = SIC_SYSIRQ(irq) % 32;
171 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) & 175 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
@@ -175,15 +179,20 @@ static void bfin_internal_mask_irq(unsigned int irq)
175 ~(1 << mask_bit)); 179 ~(1 << mask_bit));
176#endif 180#endif
177#endif 181#endif
182 local_irq_restore_hw(flags);
178} 183}
179 184
180static void bfin_internal_unmask_irq(unsigned int irq) 185static void bfin_internal_unmask_irq(unsigned int irq)
181{ 186{
187 unsigned long flags;
188
182#ifdef CONFIG_BF53x 189#ifdef CONFIG_BF53x
190 local_irq_save_hw(flags);
183 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | 191 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |
184 (1 << SIC_SYSIRQ(irq))); 192 (1 << SIC_SYSIRQ(irq)));
185#else 193#else
186 unsigned mask_bank, mask_bit; 194 unsigned mask_bank, mask_bit;
195 local_irq_save_hw(flags);
187 mask_bank = SIC_SYSIRQ(irq) / 32; 196 mask_bank = SIC_SYSIRQ(irq) / 32;
188 mask_bit = SIC_SYSIRQ(irq) % 32; 197 mask_bit = SIC_SYSIRQ(irq) % 32;
189 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) | 198 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
@@ -193,6 +202,7 @@ static void bfin_internal_unmask_irq(unsigned int irq)
193 (1 << mask_bit)); 202 (1 << mask_bit));
194#endif 203#endif
195#endif 204#endif
205 local_irq_restore_hw(flags);
196} 206}
197 207
198#ifdef CONFIG_PM 208#ifdef CONFIG_PM
@@ -390,7 +400,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
390static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) 400static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
391{ 401{
392#ifdef CONFIG_IPIPE 402#ifdef CONFIG_IPIPE
393 _set_irq_handler(irq, handle_edge_irq); 403 _set_irq_handler(irq, handle_level_irq);
394#else 404#else
395 struct irq_desc *desc = irq_desc + irq; 405 struct irq_desc *desc = irq_desc + irq;
396 /* May not call generic set_irq_handler() due to spinlock 406 /* May not call generic set_irq_handler() due to spinlock
@@ -1055,13 +1065,18 @@ int __init init_arch_irq(void)
1055#endif 1065#endif
1056 default: 1066 default:
1057#ifdef CONFIG_IPIPE 1067#ifdef CONFIG_IPIPE
1058 /* 1068 /*
1059 * We want internal interrupt sources to be masked, because 1069 * We want internal interrupt sources to be
1060 * ISRs may trigger interrupts recursively (e.g. DMA), but 1070 * masked, because ISRs may trigger interrupts
1061 * interrupts are _not_ masked at CPU level. So let's handle 1071 * recursively (e.g. DMA), but interrupts are
1062 * them as level interrupts. 1072 * _not_ masked at CPU level. So let's handle
1063 */ 1073 * most of them as level interrupts, except
1064 set_irq_handler(irq, handle_level_irq); 1074 * the timer interrupt which is special.
1075 */
1076 if (irq == IRQ_SYSTMR || irq == IRQ_CORETMR)
1077 set_irq_handler(irq, handle_simple_irq);
1078 else
1079 set_irq_handler(irq, handle_level_irq);
1065#else /* !CONFIG_IPIPE */ 1080#else /* !CONFIG_IPIPE */
1066 set_irq_handler(irq, handle_simple_irq); 1081 set_irq_handler(irq, handle_simple_irq);
1067#endif /* !CONFIG_IPIPE */ 1082#endif /* !CONFIG_IPIPE */
@@ -1123,9 +1138,8 @@ int __init init_arch_irq(void)
1123 1138
1124#ifdef CONFIG_IPIPE 1139#ifdef CONFIG_IPIPE
1125 for (irq = 0; irq < NR_IRQS; irq++) { 1140 for (irq = 0; irq < NR_IRQS; irq++) {
1126 struct irq_desc *desc = irq_desc + irq; 1141 struct irq_desc *desc = irq_to_desc(irq);
1127 desc->ic_prio = __ipipe_get_irq_priority(irq); 1142 desc->ic_prio = __ipipe_get_irq_priority(irq);
1128 desc->thr_prio = __ipipe_get_irqthread_priority(irq);
1129 } 1143 }
1130#endif /* CONFIG_IPIPE */ 1144#endif /* CONFIG_IPIPE */
1131 1145
@@ -1208,76 +1222,21 @@ int __ipipe_get_irq_priority(unsigned irq)
1208 return IVG15; 1222 return IVG15;
1209} 1223}
1210 1224
1211int __ipipe_get_irqthread_priority(unsigned irq)
1212{
1213 int ient, prio;
1214 int demux_irq;
1215
1216 /* The returned priority value is rescaled to [0..IVG13+1]
1217 * with 0 being the lowest effective priority level. */
1218
1219 if (irq <= IRQ_CORETMR)
1220 return IVG13 - irq + 1;
1221
1222 /* GPIO IRQs are given the priority of the demux
1223 * interrupt. */
1224 if (IS_GPIOIRQ(irq)) {
1225#if defined(CONFIG_BF54x)
1226 u32 bank = PINT_2_BANK(irq2pint_lut[irq - SYS_IRQS]);
1227 demux_irq = (bank == 0 ? IRQ_PINT0 :
1228 bank == 1 ? IRQ_PINT1 :
1229 bank == 2 ? IRQ_PINT2 :
1230 IRQ_PINT3);
1231#elif defined(CONFIG_BF561)
1232 demux_irq = (irq >= IRQ_PF32 ? IRQ_PROG2_INTA :
1233 irq >= IRQ_PF16 ? IRQ_PROG1_INTA :
1234 IRQ_PROG0_INTA);
1235#elif defined(CONFIG_BF52x)
1236 demux_irq = (irq >= IRQ_PH0 ? IRQ_PORTH_INTA :
1237 irq >= IRQ_PG0 ? IRQ_PORTG_INTA :
1238 IRQ_PORTF_INTA);
1239#else
1240 demux_irq = irq;
1241#endif
1242 return IVG13 - PRIO_GPIODEMUX(demux_irq) + 1;
1243 }
1244
1245 /* The GPIO demux interrupt is given a lower priority
1246 * than the GPIO IRQs, so that its threaded handler
1247 * unmasks the interrupt line after the decoded IRQs
1248 * have been processed. */
1249 prio = PRIO_GPIODEMUX(irq);
1250 /* demux irq? */
1251 if (prio != -1)
1252 return IVG13 - prio;
1253
1254 for (ient = 0; ient < NR_PERI_INTS; ient++) {
1255 struct ivgx *ivg = ivg_table + ient;
1256 if (ivg->irqno == irq) {
1257 for (prio = 0; prio <= IVG13-IVG7; prio++) {
1258 if (ivg7_13[prio].ifirst <= ivg &&
1259 ivg7_13[prio].istop > ivg)
1260 return IVG7 - prio;
1261 }
1262 }
1263 }
1264
1265 return 0;
1266}
1267
1268/* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */ 1225/* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */
1269#ifdef CONFIG_DO_IRQ_L1 1226#ifdef CONFIG_DO_IRQ_L1
1270__attribute__((l1_text)) 1227__attribute__((l1_text))
1271#endif 1228#endif
1272asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) 1229asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
1273{ 1230{
1231 struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
1232 struct ipipe_domain *this_domain = ipipe_current_domain;
1274 struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop; 1233 struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop;
1275 struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; 1234 struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst;
1276 int irq; 1235 int irq, s;
1277 1236
1278 if (likely(vec == EVT_IVTMR_P)) { 1237 if (likely(vec == EVT_IVTMR_P)) {
1279 irq = IRQ_CORETMR; 1238 irq = IRQ_CORETMR;
1280 goto handle_irq; 1239 goto core_tick;
1281 } 1240 }
1282 1241
1283 SSYNC(); 1242 SSYNC();
@@ -1319,24 +1278,39 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
1319 irq = ivg->irqno; 1278 irq = ivg->irqno;
1320 1279
1321 if (irq == IRQ_SYSTMR) { 1280 if (irq == IRQ_SYSTMR) {
1281#ifdef CONFIG_GENERIC_CLOCKEVENTS
1282core_tick:
1283#else
1322 bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */ 1284 bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */
1285#endif
1323 /* This is basically what we need from the register frame. */ 1286 /* This is basically what we need from the register frame. */
1324 __raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend; 1287 __raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend;
1325 __raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc; 1288 __raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc;
1326 if (!ipipe_root_domain_p) 1289 if (this_domain != ipipe_root_domain)
1327 __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10;
1328 else
1329 __raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10; 1290 __raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10;
1291 else
1292 __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10;
1330 } 1293 }
1331 1294
1332handle_irq: 1295#ifndef CONFIG_GENERIC_CLOCKEVENTS
1296core_tick:
1297#endif
1298 if (this_domain == ipipe_root_domain) {
1299 s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status);
1300 barrier();
1301 }
1333 1302
1334 ipipe_trace_irq_entry(irq); 1303 ipipe_trace_irq_entry(irq);
1335 __ipipe_handle_irq(irq, regs); 1304 __ipipe_handle_irq(irq, regs);
1336 ipipe_trace_irq_exit(irq); 1305 ipipe_trace_irq_exit(irq);
1337 1306
1338 if (ipipe_root_domain_p) 1307 if (this_domain == ipipe_root_domain) {
1339 return !test_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status)); 1308 set_thread_flag(TIF_IRQ_SYNC);
1309 if (!s) {
1310 __clear_bit(IPIPE_SYNCDEFER_FLAG, &p->status);
1311 return !test_bit(IPIPE_STALL_FLAG, &p->status);
1312 }
1313 }
1340 1314
1341 return 0; 1315 return 0;
1342} 1316}
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index 77c992847094..93eab6146079 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -158,10 +158,14 @@ static irqreturn_t ipi_handler(int irq, void *dev_instance)
158 kfree(msg); 158 kfree(msg);
159 break; 159 break;
160 case BFIN_IPI_CALL_FUNC: 160 case BFIN_IPI_CALL_FUNC:
161 spin_unlock(&msg_queue->lock);
161 ipi_call_function(cpu, msg); 162 ipi_call_function(cpu, msg);
163 spin_lock(&msg_queue->lock);
162 break; 164 break;
163 case BFIN_IPI_CPU_STOP: 165 case BFIN_IPI_CPU_STOP:
166 spin_unlock(&msg_queue->lock);
164 ipi_cpu_stop(cpu); 167 ipi_cpu_stop(cpu);
168 spin_lock(&msg_queue->lock);
165 kfree(msg); 169 kfree(msg);
166 break; 170 break;
167 default: 171 default:
@@ -457,7 +461,7 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end)
457 smp_flush_data.start = start; 461 smp_flush_data.start = start;
458 smp_flush_data.end = end; 462 smp_flush_data.end = end;
459 463
460 if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 1)) 464 if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0))
461 printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n"); 465 printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n");
462} 466}
463EXPORT_SYMBOL_GPL(smp_icache_flush_range_others); 467EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c
index d0532b72bba5..9c3629b9a689 100644
--- a/arch/blackfin/mm/init.c
+++ b/arch/blackfin/mm/init.c
@@ -104,7 +104,7 @@ void __init paging_init(void)
104 } 104 }
105} 105}
106 106
107asmlinkage void init_pda(void) 107asmlinkage void __init init_pda(void)
108{ 108{
109 unsigned int cpu = raw_smp_processor_id(); 109 unsigned int cpu = raw_smp_processor_id();
110 110
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
index e626e50a938a..060df4aa9916 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
@@ -135,11 +135,10 @@ pcibr_dmatrans_direct64(struct pcidev_info * info, u64 paddr,
135 if (SN_DMA_ADDRTYPE(dma_flags) == SN_DMA_ADDR_PHYS) 135 if (SN_DMA_ADDRTYPE(dma_flags) == SN_DMA_ADDR_PHYS)
136 pci_addr = IS_PIC_SOFT(pcibus_info) ? 136 pci_addr = IS_PIC_SOFT(pcibus_info) ?
137 PHYS_TO_DMA(paddr) : 137 PHYS_TO_DMA(paddr) :
138 PHYS_TO_TIODMA(paddr) | dma_attributes; 138 PHYS_TO_TIODMA(paddr);
139 else 139 else
140 pci_addr = IS_PIC_SOFT(pcibus_info) ? 140 pci_addr = paddr;
141 paddr : 141 pci_addr |= dma_attributes;
142 paddr | dma_attributes;
143 142
144 /* Handle Bus mode */ 143 /* Handle Bus mode */
145 if (IS_PCIX(pcibus_info)) 144 if (IS_PCIX(pcibus_info))
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index ac5d541368e9..6c5b40905dd6 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -3,6 +3,8 @@
3/* 3/*
4 * Architecture specific compatibility types 4 * Architecture specific compatibility types
5 */ 5 */
6#include <linux/seccomp.h>
7#include <linux/thread_info.h>
6#include <linux/types.h> 8#include <linux/types.h>
7#include <asm/page.h> 9#include <asm/page.h>
8#include <asm/ptrace.h> 10#include <asm/ptrace.h>
@@ -218,4 +220,9 @@ struct compat_shmid64_ds {
218 compat_ulong_t __unused2; 220 compat_ulong_t __unused2;
219}; 221};
220 222
223static inline int is_compat_task(void)
224{
225 return test_thread_flag(TIF_32BIT);
226}
227
221#endif /* _ASM_COMPAT_H */ 228#endif /* _ASM_COMPAT_H */
diff --git a/arch/x86/include/asm/linkage.h b/arch/x86/include/asm/linkage.h
index 9320e2a8a26a..a0d70b46c27c 100644
--- a/arch/x86/include/asm/linkage.h
+++ b/arch/x86/include/asm/linkage.h
@@ -4,11 +4,6 @@
4#undef notrace 4#undef notrace
5#define notrace __attribute__((no_instrument_function)) 5#define notrace __attribute__((no_instrument_function))
6 6
7#ifdef CONFIG_X86_64
8#define __ALIGN .p2align 4,,15
9#define __ALIGN_STR ".p2align 4,,15"
10#endif
11
12#ifdef CONFIG_X86_32 7#ifdef CONFIG_X86_32
13#define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0))) 8#define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0)))
14/* 9/*
@@ -50,16 +45,25 @@
50 __asmlinkage_protect_n(ret, "g" (arg1), "g" (arg2), "g" (arg3), \ 45 __asmlinkage_protect_n(ret, "g" (arg1), "g" (arg2), "g" (arg3), \
51 "g" (arg4), "g" (arg5), "g" (arg6)) 46 "g" (arg4), "g" (arg5), "g" (arg6))
52 47
53#endif 48#endif /* CONFIG_X86_32 */
49
50#ifdef __ASSEMBLY__
54 51
55#define GLOBAL(name) \ 52#define GLOBAL(name) \
56 .globl name; \ 53 .globl name; \
57 name: 54 name:
58 55
56#ifdef CONFIG_X86_64
57#define __ALIGN .p2align 4,,15
58#define __ALIGN_STR ".p2align 4,,15"
59#endif
60
59#ifdef CONFIG_X86_ALIGNMENT_16 61#ifdef CONFIG_X86_ALIGNMENT_16
60#define __ALIGN .align 16,0x90 62#define __ALIGN .align 16,0x90
61#define __ALIGN_STR ".align 16,0x90" 63#define __ALIGN_STR ".align 16,0x90"
62#endif 64#endif
63 65
66#endif /* __ASSEMBLY__ */
67
64#endif /* _ASM_X86_LINKAGE_H */ 68#endif /* _ASM_X86_LINKAGE_H */
65 69
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 25423a5b80ed..f47df59016c5 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -5,6 +5,7 @@
5#include <asm/io.h> 5#include <asm/io.h>
6#include <asm/processor.h> 6#include <asm/processor.h>
7#include <asm/apic.h> 7#include <asm/apic.h>
8#include <asm/cpu.h>
8 9
9#ifdef CONFIG_X86_64 10#ifdef CONFIG_X86_64
10# include <asm/numa_64.h> 11# include <asm/numa_64.h>
@@ -141,6 +142,55 @@ static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)
141 } 142 }
142} 143}
143 144
145static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
146{
147#ifdef CONFIG_SMP
148 /* calling is from identify_secondary_cpu() ? */
149 if (c->cpu_index == boot_cpu_id)
150 return;
151
152 /*
153 * Certain Athlons might work (for various values of 'work') in SMP
154 * but they are not certified as MP capable.
155 */
156 /* Athlon 660/661 is valid. */
157 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
158 (c->x86_mask == 1)))
159 goto valid_k7;
160
161 /* Duron 670 is valid */
162 if ((c->x86_model == 7) && (c->x86_mask == 0))
163 goto valid_k7;
164
165 /*
166 * Athlon 662, Duron 671, and Athlon >model 7 have capability
167 * bit. It's worth noting that the A5 stepping (662) of some
168 * Athlon XP's have the MP bit set.
169 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
170 * more.
171 */
172 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
173 ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
174 (c->x86_model > 7))
175 if (cpu_has_mp)
176 goto valid_k7;
177
178 /* If we get here, not a certified SMP capable AMD system. */
179
180 /*
181 * Don't taint if we are running SMP kernel on a single non-MP
182 * approved Athlon
183 */
184 WARN_ONCE(1, "WARNING: This combination of AMD"
185 "processors is not suitable for SMP.\n");
186 if (!test_taint(TAINT_UNSAFE_SMP))
187 add_taint(TAINT_UNSAFE_SMP);
188
189valid_k7:
190 ;
191#endif
192}
193
144static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c) 194static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
145{ 195{
146 u32 l, h; 196 u32 l, h;
@@ -175,6 +225,8 @@ static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
175 } 225 }
176 226
177 set_cpu_cap(c, X86_FEATURE_K7); 227 set_cpu_cap(c, X86_FEATURE_K7);
228
229 amd_k7_smp_check(c);
178} 230}
179#endif 231#endif
180 232
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 25c559ba8d54..191117f1ad51 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -13,6 +13,7 @@
13#include <asm/uaccess.h> 13#include <asm/uaccess.h>
14#include <asm/ds.h> 14#include <asm/ds.h>
15#include <asm/bugs.h> 15#include <asm/bugs.h>
16#include <asm/cpu.h>
16 17
17#ifdef CONFIG_X86_64 18#ifdef CONFIG_X86_64
18#include <asm/topology.h> 19#include <asm/topology.h>
@@ -110,6 +111,28 @@ static void __cpuinit trap_init_f00f_bug(void)
110} 111}
111#endif 112#endif
112 113
114static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
115{
116#ifdef CONFIG_SMP
117 /* calling is from identify_secondary_cpu() ? */
118 if (c->cpu_index == boot_cpu_id)
119 return;
120
121 /*
122 * Mask B, Pentium, but not Pentium MMX
123 */
124 if (c->x86 == 5 &&
125 c->x86_mask >= 1 && c->x86_mask <= 4 &&
126 c->x86_model <= 3) {
127 /*
128 * Remember we have B step Pentia with bugs
129 */
130 WARN_ONCE(1, "WARNING: SMP operation may be unreliable"
131 "with B stepping processors.\n");
132 }
133#endif
134}
135
113static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c) 136static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
114{ 137{
115 unsigned long lo, hi; 138 unsigned long lo, hi;
@@ -186,6 +209,8 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
186#ifdef CONFIG_X86_NUMAQ 209#ifdef CONFIG_X86_NUMAQ
187 numaq_tsc_disable(); 210 numaq_tsc_disable();
188#endif 211#endif
212
213 intel_smp_check(c);
189} 214}
190#else 215#else
191static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c) 216static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/ds.c b/arch/x86/kernel/ds.c
index 169a120587be..87b67e3a765a 100644
--- a/arch/x86/kernel/ds.c
+++ b/arch/x86/kernel/ds.c
@@ -729,7 +729,7 @@ struct pebs_tracer *ds_request_pebs(struct task_struct *task,
729 729
730 spin_unlock_irqrestore(&ds_lock, irq); 730 spin_unlock_irqrestore(&ds_lock, irq);
731 731
732 ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts); 732 ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
733 ds_resume_pebs(tracer); 733 ds_resume_pebs(tracer);
734 734
735 return tracer; 735 return tracer;
@@ -1029,5 +1029,4 @@ void ds_copy_thread(struct task_struct *tsk, struct task_struct *father)
1029 1029
1030void ds_exit_thread(struct task_struct *tsk) 1030void ds_exit_thread(struct task_struct *tsk)
1031{ 1031{
1032 WARN_ON(tsk->thread.ds_ctx);
1033} 1032}
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c
index c29f301d3885..efa615f2bf43 100644
--- a/arch/x86/kernel/setup_percpu.c
+++ b/arch/x86/kernel/setup_percpu.c
@@ -42,6 +42,19 @@ unsigned long __per_cpu_offset[NR_CPUS] __read_mostly = {
42}; 42};
43EXPORT_SYMBOL(__per_cpu_offset); 43EXPORT_SYMBOL(__per_cpu_offset);
44 44
45/*
46 * On x86_64 symbols referenced from code should be reachable using
47 * 32bit relocations. Reserve space for static percpu variables in
48 * modules so that they are always served from the first chunk which
49 * is located at the percpu segment base. On x86_32, anything can
50 * address anywhere. No need to reserve space in the first chunk.
51 */
52#ifdef CONFIG_X86_64
53#define PERCPU_FIRST_CHUNK_RESERVE PERCPU_MODULE_RESERVE
54#else
55#define PERCPU_FIRST_CHUNK_RESERVE 0
56#endif
57
45/** 58/**
46 * pcpu_need_numa - determine percpu allocation needs to consider NUMA 59 * pcpu_need_numa - determine percpu allocation needs to consider NUMA
47 * 60 *
@@ -141,7 +154,7 @@ static ssize_t __init setup_pcpu_remap(size_t static_size)
141{ 154{
142 static struct vm_struct vm; 155 static struct vm_struct vm;
143 pg_data_t *last; 156 pg_data_t *last;
144 size_t ptrs_size; 157 size_t ptrs_size, dyn_size;
145 unsigned int cpu; 158 unsigned int cpu;
146 ssize_t ret; 159 ssize_t ret;
147 160
@@ -169,12 +182,14 @@ proceed:
169 * Currently supports only single page. Supporting multiple 182 * Currently supports only single page. Supporting multiple
170 * pages won't be too difficult if it ever becomes necessary. 183 * pages won't be too difficult if it ever becomes necessary.
171 */ 184 */
172 pcpur_size = PFN_ALIGN(static_size + PERCPU_DYNAMIC_RESERVE); 185 pcpur_size = PFN_ALIGN(static_size + PERCPU_MODULE_RESERVE +
186 PERCPU_DYNAMIC_RESERVE);
173 if (pcpur_size > PMD_SIZE) { 187 if (pcpur_size > PMD_SIZE) {
174 pr_warning("PERCPU: static data is larger than large page, " 188 pr_warning("PERCPU: static data is larger than large page, "
175 "can't use large page\n"); 189 "can't use large page\n");
176 return -EINVAL; 190 return -EINVAL;
177 } 191 }
192 dyn_size = pcpur_size - static_size - PERCPU_FIRST_CHUNK_RESERVE;
178 193
179 /* allocate pointer array and alloc large pages */ 194 /* allocate pointer array and alloc large pages */
180 ptrs_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpur_ptrs[0])); 195 ptrs_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpur_ptrs[0]));
@@ -217,8 +232,9 @@ proceed:
217 pr_info("PERCPU: Remapped at %p with large pages, static data " 232 pr_info("PERCPU: Remapped at %p with large pages, static data "
218 "%zu bytes\n", vm.addr, static_size); 233 "%zu bytes\n", vm.addr, static_size);
219 234
220 ret = pcpu_setup_first_chunk(pcpur_get_page, static_size, PMD_SIZE, 235 ret = pcpu_setup_first_chunk(pcpur_get_page, static_size,
221 pcpur_size - static_size, vm.addr, NULL); 236 PERCPU_FIRST_CHUNK_RESERVE,
237 PMD_SIZE, dyn_size, vm.addr, NULL);
222 goto out_free_ar; 238 goto out_free_ar;
223 239
224enomem: 240enomem:
@@ -241,24 +257,31 @@ static ssize_t __init setup_pcpu_remap(size_t static_size)
241 * Embedding allocator 257 * Embedding allocator
242 * 258 *
243 * The first chunk is sized to just contain the static area plus 259 * The first chunk is sized to just contain the static area plus
244 * PERCPU_DYNAMIC_RESERVE and allocated as a contiguous area using 260 * module and dynamic reserves, and allocated as a contiguous area
245 * bootmem allocator and used as-is without being mapped into vmalloc 261 * using bootmem allocator and used as-is without being mapped into
246 * area. This enables the first chunk to piggy back on the linear 262 * vmalloc area. This enables the first chunk to piggy back on the
247 * physical PMD mapping and doesn't add any additional pressure to 263 * linear physical PMD mapping and doesn't add any additional pressure
248 * TLB. 264 * to TLB. Note that if the needed size is smaller than the minimum
265 * unit size, the leftover is returned to the bootmem allocator.
249 */ 266 */
250static void *pcpue_ptr __initdata; 267static void *pcpue_ptr __initdata;
268static size_t pcpue_size __initdata;
251static size_t pcpue_unit_size __initdata; 269static size_t pcpue_unit_size __initdata;
252 270
253static struct page * __init pcpue_get_page(unsigned int cpu, int pageno) 271static struct page * __init pcpue_get_page(unsigned int cpu, int pageno)
254{ 272{
255 return virt_to_page(pcpue_ptr + cpu * pcpue_unit_size 273 size_t off = (size_t)pageno << PAGE_SHIFT;
256 + ((size_t)pageno << PAGE_SHIFT)); 274
275 if (off >= pcpue_size)
276 return NULL;
277
278 return virt_to_page(pcpue_ptr + cpu * pcpue_unit_size + off);
257} 279}
258 280
259static ssize_t __init setup_pcpu_embed(size_t static_size) 281static ssize_t __init setup_pcpu_embed(size_t static_size)
260{ 282{
261 unsigned int cpu; 283 unsigned int cpu;
284 size_t dyn_size;
262 285
263 /* 286 /*
264 * If large page isn't supported, there's no benefit in doing 287 * If large page isn't supported, there's no benefit in doing
@@ -269,25 +292,32 @@ static ssize_t __init setup_pcpu_embed(size_t static_size)
269 return -EINVAL; 292 return -EINVAL;
270 293
271 /* allocate and copy */ 294 /* allocate and copy */
272 pcpue_unit_size = PFN_ALIGN(static_size + PERCPU_DYNAMIC_RESERVE); 295 pcpue_size = PFN_ALIGN(static_size + PERCPU_MODULE_RESERVE +
273 pcpue_unit_size = max_t(size_t, pcpue_unit_size, PCPU_MIN_UNIT_SIZE); 296 PERCPU_DYNAMIC_RESERVE);
297 pcpue_unit_size = max_t(size_t, pcpue_size, PCPU_MIN_UNIT_SIZE);
298 dyn_size = pcpue_size - static_size - PERCPU_FIRST_CHUNK_RESERVE;
299
274 pcpue_ptr = pcpu_alloc_bootmem(0, num_possible_cpus() * pcpue_unit_size, 300 pcpue_ptr = pcpu_alloc_bootmem(0, num_possible_cpus() * pcpue_unit_size,
275 PAGE_SIZE); 301 PAGE_SIZE);
276 if (!pcpue_ptr) 302 if (!pcpue_ptr)
277 return -ENOMEM; 303 return -ENOMEM;
278 304
279 for_each_possible_cpu(cpu) 305 for_each_possible_cpu(cpu) {
280 memcpy(pcpue_ptr + cpu * pcpue_unit_size, __per_cpu_load, 306 void *ptr = pcpue_ptr + cpu * pcpue_unit_size;
281 static_size); 307
308 free_bootmem(__pa(ptr + pcpue_size),
309 pcpue_unit_size - pcpue_size);
310 memcpy(ptr, __per_cpu_load, static_size);
311 }
282 312
283 /* we're ready, commit */ 313 /* we're ready, commit */
284 pr_info("PERCPU: Embedded %zu pages at %p, static data %zu bytes\n", 314 pr_info("PERCPU: Embedded %zu pages at %p, static data %zu bytes\n",
285 pcpue_unit_size >> PAGE_SHIFT, pcpue_ptr, static_size); 315 pcpue_size >> PAGE_SHIFT, pcpue_ptr, static_size);
286 316
287 return pcpu_setup_first_chunk(pcpue_get_page, static_size, 317 return pcpu_setup_first_chunk(pcpue_get_page, static_size,
288 pcpue_unit_size, 318 PERCPU_FIRST_CHUNK_RESERVE,
289 pcpue_unit_size - static_size, pcpue_ptr, 319 pcpue_unit_size, dyn_size,
290 NULL); 320 pcpue_ptr, NULL);
291} 321}
292 322
293/* 323/*
@@ -344,7 +374,8 @@ static ssize_t __init setup_pcpu_4k(size_t static_size)
344 pr_info("PERCPU: Allocated %d 4k pages, static data %zu bytes\n", 374 pr_info("PERCPU: Allocated %d 4k pages, static data %zu bytes\n",
345 pcpu4k_nr_static_pages, static_size); 375 pcpu4k_nr_static_pages, static_size);
346 376
347 ret = pcpu_setup_first_chunk(pcpu4k_get_page, static_size, 0, 0, NULL, 377 ret = pcpu_setup_first_chunk(pcpu4k_get_page, static_size,
378 PERCPU_FIRST_CHUNK_RESERVE, -1, -1, NULL,
348 pcpu4k_populate_pte); 379 pcpu4k_populate_pte);
349 goto out_free_ar; 380 goto out_free_ar;
350 381
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 249334f5080a..ef7d10170c30 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -114,10 +114,6 @@ EXPORT_PER_CPU_SYMBOL(cpu_info);
114 114
115atomic_t init_deasserted; 115atomic_t init_deasserted;
116 116
117
118/* Set if we find a B stepping CPU */
119static int __cpuinitdata smp_b_stepping;
120
121#if defined(CONFIG_NUMA) && defined(CONFIG_X86_32) 117#if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
122 118
123/* which logical CPUs are on which nodes */ 119/* which logical CPUs are on which nodes */
@@ -271,8 +267,6 @@ static void __cpuinit smp_callin(void)
271 cpumask_set_cpu(cpuid, cpu_callin_mask); 267 cpumask_set_cpu(cpuid, cpu_callin_mask);
272} 268}
273 269
274static int __cpuinitdata unsafe_smp;
275
276/* 270/*
277 * Activate a secondary processor. 271 * Activate a secondary processor.
278 */ 272 */
@@ -340,76 +334,6 @@ notrace static void __cpuinit start_secondary(void *unused)
340 cpu_idle(); 334 cpu_idle();
341} 335}
342 336
343static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
344{
345 /*
346 * Mask B, Pentium, but not Pentium MMX
347 */
348 if (c->x86_vendor == X86_VENDOR_INTEL &&
349 c->x86 == 5 &&
350 c->x86_mask >= 1 && c->x86_mask <= 4 &&
351 c->x86_model <= 3)
352 /*
353 * Remember we have B step Pentia with bugs
354 */
355 smp_b_stepping = 1;
356
357 /*
358 * Certain Athlons might work (for various values of 'work') in SMP
359 * but they are not certified as MP capable.
360 */
361 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
362
363 if (num_possible_cpus() == 1)
364 goto valid_k7;
365
366 /* Athlon 660/661 is valid. */
367 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
368 (c->x86_mask == 1)))
369 goto valid_k7;
370
371 /* Duron 670 is valid */
372 if ((c->x86_model == 7) && (c->x86_mask == 0))
373 goto valid_k7;
374
375 /*
376 * Athlon 662, Duron 671, and Athlon >model 7 have capability
377 * bit. It's worth noting that the A5 stepping (662) of some
378 * Athlon XP's have the MP bit set.
379 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
380 * more.
381 */
382 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
383 ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
384 (c->x86_model > 7))
385 if (cpu_has_mp)
386 goto valid_k7;
387
388 /* If we get here, not a certified SMP capable AMD system. */
389 unsafe_smp = 1;
390 }
391
392valid_k7:
393 ;
394}
395
396static void __cpuinit smp_checks(void)
397{
398 if (smp_b_stepping)
399 printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
400 "with B stepping processors.\n");
401
402 /*
403 * Don't taint if we are running SMP kernel on a single non-MP
404 * approved Athlon
405 */
406 if (unsafe_smp && num_online_cpus() > 1) {
407 printk(KERN_INFO "WARNING: This combination of AMD"
408 "processors is not suitable for SMP.\n");
409 add_taint(TAINT_UNSAFE_SMP);
410 }
411}
412
413/* 337/*
414 * The bootstrap kernel entry code has set these up. Save them for 338 * The bootstrap kernel entry code has set these up. Save them for
415 * a given CPU 339 * a given CPU
@@ -423,7 +347,6 @@ void __cpuinit smp_store_cpu_info(int id)
423 c->cpu_index = id; 347 c->cpu_index = id;
424 if (id != 0) 348 if (id != 0)
425 identify_secondary_cpu(c); 349 identify_secondary_cpu(c);
426 smp_apply_quirks(c);
427} 350}
428 351
429 352
@@ -1193,7 +1116,6 @@ void __init native_smp_cpus_done(unsigned int max_cpus)
1193 pr_debug("Boot done.\n"); 1116 pr_debug("Boot done.\n");
1194 1117
1195 impress_friends(); 1118 impress_friends();
1196 smp_checks();
1197#ifdef CONFIG_X86_IO_APIC 1119#ifdef CONFIG_X86_IO_APIC
1198 setup_ioapic_dest(); 1120 setup_ioapic_dest();
1199#endif 1121#endif
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index f04549afcfe9..d038b9c45cf8 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -314,8 +314,6 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
314 int locals = 0; 314 int locals = 0;
315 struct bau_desc *bau_desc; 315 struct bau_desc *bau_desc;
316 316
317 WARN_ON(!in_atomic());
318
319 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu)); 317 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
320 318
321 uv_cpu = uv_blade_processor_id(); 319 uv_cpu = uv_blade_processor_id();
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 6d63e3d1253d..15219e0d1243 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -134,8 +134,8 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
134{ 134{
135 unsigned long page_size_mask = 0; 135 unsigned long page_size_mask = 0;
136 unsigned long start_pfn, end_pfn; 136 unsigned long start_pfn, end_pfn;
137 unsigned long ret = 0;
137 unsigned long pos; 138 unsigned long pos;
138 unsigned long ret;
139 139
140 struct map_range mr[NR_RANGE_MR]; 140 struct map_range mr[NR_RANGE_MR];
141 int nr_range, i; 141 int nr_range, i;
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 2966c6b8d304..db81e9a8556b 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -806,11 +806,6 @@ static unsigned long __init setup_node_bootmem(int nodeid,
806{ 806{
807 unsigned long bootmap_size; 807 unsigned long bootmap_size;
808 808
809 if (start_pfn > max_low_pfn)
810 return bootmap;
811 if (end_pfn > max_low_pfn)
812 end_pfn = max_low_pfn;
813
814 /* don't touch min_low_pfn */ 809 /* don't touch min_low_pfn */
815 bootmap_size = init_bootmem_node(NODE_DATA(nodeid), 810 bootmap_size = init_bootmem_node(NODE_DATA(nodeid),
816 bootmap >> PAGE_SHIFT, 811 bootmap >> PAGE_SHIFT,
@@ -843,13 +838,23 @@ void __init setup_bootmem_allocator(void)
843 max_pfn_mapped<<PAGE_SHIFT); 838 max_pfn_mapped<<PAGE_SHIFT);
844 printk(KERN_INFO " low ram: 0 - %08lx\n", max_low_pfn<<PAGE_SHIFT); 839 printk(KERN_INFO " low ram: 0 - %08lx\n", max_low_pfn<<PAGE_SHIFT);
845 840
841 for_each_online_node(nodeid) {
842 unsigned long start_pfn, end_pfn;
843
846#ifdef CONFIG_NEED_MULTIPLE_NODES 844#ifdef CONFIG_NEED_MULTIPLE_NODES
847 for_each_online_node(nodeid) 845 start_pfn = node_start_pfn[nodeid];
848 bootmap = setup_node_bootmem(nodeid, node_start_pfn[nodeid], 846 end_pfn = node_end_pfn[nodeid];
849 node_end_pfn[nodeid], bootmap); 847 if (start_pfn > max_low_pfn)
848 continue;
849 if (end_pfn > max_low_pfn)
850 end_pfn = max_low_pfn;
850#else 851#else
851 bootmap = setup_node_bootmem(0, 0, max_low_pfn, bootmap); 852 start_pfn = 0;
853 end_pfn = max_low_pfn;
852#endif 854#endif
855 bootmap = setup_node_bootmem(nodeid, start_pfn, end_pfn,
856 bootmap);
857 }
853 858
854 after_bootmem = 1; 859 after_bootmem = 1;
855} 860}
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 8a853bc3b287..54efa57d1c03 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -85,7 +85,7 @@ early_param("gbpages", parse_direct_gbpages_on);
85pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP; 85pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP;
86EXPORT_SYMBOL_GPL(__supported_pte_mask); 86EXPORT_SYMBOL_GPL(__supported_pte_mask);
87 87
88static int do_not_nx __cpuinitdata; 88static int disable_nx __cpuinitdata;
89 89
90/* 90/*
91 * noexec=on|off 91 * noexec=on|off
@@ -100,9 +100,9 @@ static int __init nonx_setup(char *str)
100 return -EINVAL; 100 return -EINVAL;
101 if (!strncmp(str, "on", 2)) { 101 if (!strncmp(str, "on", 2)) {
102 __supported_pte_mask |= _PAGE_NX; 102 __supported_pte_mask |= _PAGE_NX;
103 do_not_nx = 0; 103 disable_nx = 0;
104 } else if (!strncmp(str, "off", 3)) { 104 } else if (!strncmp(str, "off", 3)) {
105 do_not_nx = 1; 105 disable_nx = 1;
106 __supported_pte_mask &= ~_PAGE_NX; 106 __supported_pte_mask &= ~_PAGE_NX;
107 } 107 }
108 return 0; 108 return 0;
@@ -114,7 +114,7 @@ void __cpuinit check_efer(void)
114 unsigned long efer; 114 unsigned long efer;
115 115
116 rdmsrl(MSR_EFER, efer); 116 rdmsrl(MSR_EFER, efer);
117 if (!(efer & EFER_NX) || do_not_nx) 117 if (!(efer & EFER_NX) || disable_nx)
118 __supported_pte_mask &= ~_PAGE_NX; 118 __supported_pte_mask &= ~_PAGE_NX;
119} 119}
120 120
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 96786ef2c9a9..aca924a30ee6 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -87,6 +87,8 @@ bool __virt_addr_valid(unsigned long x)
87 return false; 87 return false;
88 if (__vmalloc_start_set && is_vmalloc_addr((void *) x)) 88 if (__vmalloc_start_set && is_vmalloc_addr((void *) x))
89 return false; 89 return false;
90 if (x >= FIXADDR_START)
91 return false;
90 return pfn_valid((x - PAGE_OFFSET) >> PAGE_SHIFT); 92 return pfn_valid((x - PAGE_OFFSET) >> PAGE_SHIFT);
91} 93}
92EXPORT_SYMBOL(__virt_addr_valid); 94EXPORT_SYMBOL(__virt_addr_valid);
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c
index 9f205030d9aa..6a518dd08a36 100644
--- a/arch/x86/mm/kmmio.c
+++ b/arch/x86/mm/kmmio.c
@@ -451,23 +451,24 @@ static void rcu_free_kmmio_fault_pages(struct rcu_head *head)
451 451
452static void remove_kmmio_fault_pages(struct rcu_head *head) 452static void remove_kmmio_fault_pages(struct rcu_head *head)
453{ 453{
454 struct kmmio_delayed_release *dr = container_of( 454 struct kmmio_delayed_release *dr =
455 head, 455 container_of(head, struct kmmio_delayed_release, rcu);
456 struct kmmio_delayed_release,
457 rcu);
458 struct kmmio_fault_page *p = dr->release_list; 456 struct kmmio_fault_page *p = dr->release_list;
459 struct kmmio_fault_page **prevp = &dr->release_list; 457 struct kmmio_fault_page **prevp = &dr->release_list;
460 unsigned long flags; 458 unsigned long flags;
459
461 spin_lock_irqsave(&kmmio_lock, flags); 460 spin_lock_irqsave(&kmmio_lock, flags);
462 while (p) { 461 while (p) {
463 if (!p->count) 462 if (!p->count) {
464 list_del_rcu(&p->list); 463 list_del_rcu(&p->list);
465 else 464 prevp = &p->release_next;
465 } else {
466 *prevp = p->release_next; 466 *prevp = p->release_next;
467 prevp = &p->release_next; 467 }
468 p = p->release_next; 468 p = p->release_next;
469 } 469 }
470 spin_unlock_irqrestore(&kmmio_lock, flags); 470 spin_unlock_irqrestore(&kmmio_lock, flags);
471
471 /* This is the real RCU destroy call. */ 472 /* This is the real RCU destroy call. */
472 call_rcu(&dr->rcu, rcu_free_kmmio_fault_pages); 473 call_rcu(&dr->rcu, rcu_free_kmmio_fault_pages);
473} 474}
diff --git a/arch/x86/mm/memtest.c b/arch/x86/mm/memtest.c
index 0bcd7883d036..605c8be06217 100644
--- a/arch/x86/mm/memtest.c
+++ b/arch/x86/mm/memtest.c
@@ -100,6 +100,9 @@ static int __init parse_memtest(char *arg)
100{ 100{
101 if (arg) 101 if (arg)
102 memtest_pattern = simple_strtoul(arg, NULL, 0); 102 memtest_pattern = simple_strtoul(arg, NULL, 0);
103 else
104 memtest_pattern = ARRAY_SIZE(patterns);
105
103 return 0; 106 return 0;
104} 107}
105 108
diff --git a/block/blk-merge.c b/block/blk-merge.c
index a104593e70c3..5a244f05360f 100644
--- a/block/blk-merge.c
+++ b/block/blk-merge.c
@@ -39,14 +39,13 @@ void blk_recalc_rq_sectors(struct request *rq, int nsect)
39} 39}
40 40
41static unsigned int __blk_recalc_rq_segments(struct request_queue *q, 41static unsigned int __blk_recalc_rq_segments(struct request_queue *q,
42 struct bio *bio, 42 struct bio *bio)
43 unsigned int *seg_size_ptr)
44{ 43{
45 unsigned int phys_size; 44 unsigned int phys_size;
46 struct bio_vec *bv, *bvprv = NULL; 45 struct bio_vec *bv, *bvprv = NULL;
47 int cluster, i, high, highprv = 1; 46 int cluster, i, high, highprv = 1;
48 unsigned int seg_size, nr_phys_segs; 47 unsigned int seg_size, nr_phys_segs;
49 struct bio *fbio; 48 struct bio *fbio, *bbio;
50 49
51 if (!bio) 50 if (!bio)
52 return 0; 51 return 0;
@@ -87,26 +86,20 @@ new_segment:
87 seg_size = bv->bv_len; 86 seg_size = bv->bv_len;
88 highprv = high; 87 highprv = high;
89 } 88 }
89 bbio = bio;
90 } 90 }
91 91
92 if (seg_size_ptr) 92 if (nr_phys_segs == 1 && seg_size > fbio->bi_seg_front_size)
93 *seg_size_ptr = seg_size; 93 fbio->bi_seg_front_size = seg_size;
94 if (seg_size > bbio->bi_seg_back_size)
95 bbio->bi_seg_back_size = seg_size;
94 96
95 return nr_phys_segs; 97 return nr_phys_segs;
96} 98}
97 99
98void blk_recalc_rq_segments(struct request *rq) 100void blk_recalc_rq_segments(struct request *rq)
99{ 101{
100 unsigned int seg_size = 0, phys_segs; 102 rq->nr_phys_segments = __blk_recalc_rq_segments(rq->q, rq->bio);
101
102 phys_segs = __blk_recalc_rq_segments(rq->q, rq->bio, &seg_size);
103
104 if (phys_segs == 1 && seg_size > rq->bio->bi_seg_front_size)
105 rq->bio->bi_seg_front_size = seg_size;
106 if (seg_size > rq->biotail->bi_seg_back_size)
107 rq->biotail->bi_seg_back_size = seg_size;
108
109 rq->nr_phys_segments = phys_segs;
110} 103}
111 104
112void blk_recount_segments(struct request_queue *q, struct bio *bio) 105void blk_recount_segments(struct request_queue *q, struct bio *bio)
@@ -114,7 +107,7 @@ void blk_recount_segments(struct request_queue *q, struct bio *bio)
114 struct bio *nxt = bio->bi_next; 107 struct bio *nxt = bio->bi_next;
115 108
116 bio->bi_next = NULL; 109 bio->bi_next = NULL;
117 bio->bi_phys_segments = __blk_recalc_rq_segments(q, bio, NULL); 110 bio->bi_phys_segments = __blk_recalc_rq_segments(q, bio);
118 bio->bi_next = nxt; 111 bio->bi_next = nxt;
119 bio->bi_flags |= (1 << BIO_SEG_VALID); 112 bio->bi_flags |= (1 << BIO_SEG_VALID);
120} 113}
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a603bbf9b1b7..66e012cd3271 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -582,18 +582,18 @@ static const struct pci_device_id ahci_pci_tbl[] = {
582 { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci }, /* MCP79 */ 582 { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci }, /* MCP79 */
583 { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci }, /* MCP79 */ 583 { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci }, /* MCP79 */
584 { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci }, /* MCP79 */ 584 { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci }, /* MCP79 */
585 { PCI_VDEVICE(NVIDIA, 0x0bc8), board_ahci }, /* MCP7B */ 585 { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci }, /* MCP89 */
586 { PCI_VDEVICE(NVIDIA, 0x0bc9), board_ahci }, /* MCP7B */ 586 { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci }, /* MCP89 */
587 { PCI_VDEVICE(NVIDIA, 0x0bca), board_ahci }, /* MCP7B */ 587 { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci }, /* MCP89 */
588 { PCI_VDEVICE(NVIDIA, 0x0bcb), board_ahci }, /* MCP7B */ 588 { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci }, /* MCP89 */
589 { PCI_VDEVICE(NVIDIA, 0x0bcc), board_ahci }, /* MCP7B */ 589 { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci }, /* MCP89 */
590 { PCI_VDEVICE(NVIDIA, 0x0bcd), board_ahci }, /* MCP7B */ 590 { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci }, /* MCP89 */
591 { PCI_VDEVICE(NVIDIA, 0x0bce), board_ahci }, /* MCP7B */ 591 { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci }, /* MCP89 */
592 { PCI_VDEVICE(NVIDIA, 0x0bcf), board_ahci }, /* MCP7B */ 592 { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci }, /* MCP89 */
593 { PCI_VDEVICE(NVIDIA, 0x0bc4), board_ahci }, /* MCP7B */ 593 { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci }, /* MCP89 */
594 { PCI_VDEVICE(NVIDIA, 0x0bc5), board_ahci }, /* MCP7B */ 594 { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci }, /* MCP89 */
595 { PCI_VDEVICE(NVIDIA, 0x0bc6), board_ahci }, /* MCP7B */ 595 { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci }, /* MCP89 */
596 { PCI_VDEVICE(NVIDIA, 0x0bc7), board_ahci }, /* MCP7B */ 596 { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci }, /* MCP89 */
597 597
598 /* SiS */ 598 /* SiS */
599 { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */ 599 { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 9fbf0595f3d4..060bcd601f57 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -1322,14 +1322,16 @@ static u64 ata_id_n_sectors(const u16 *id)
1322{ 1322{
1323 if (ata_id_has_lba(id)) { 1323 if (ata_id_has_lba(id)) {
1324 if (ata_id_has_lba48(id)) 1324 if (ata_id_has_lba48(id))
1325 return ata_id_u64(id, 100); 1325 return ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
1326 else 1326 else
1327 return ata_id_u32(id, 60); 1327 return ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1328 } else { 1328 } else {
1329 if (ata_id_current_chs_valid(id)) 1329 if (ata_id_current_chs_valid(id))
1330 return ata_id_u32(id, 57); 1330 return id[ATA_ID_CUR_CYLS] * id[ATA_ID_CUR_HEADS] *
1331 id[ATA_ID_CUR_SECTORS];
1331 else 1332 else
1332 return id[1] * id[3] * id[6]; 1333 return id[ATA_ID_CYLS] * id[ATA_ID_HEADS] *
1334 id[ATA_ID_SECTORS];
1333 } 1335 }
1334} 1336}
1335 1337
@@ -4612,7 +4614,7 @@ void ata_sg_clean(struct ata_queued_cmd *qc)
4612 VPRINTK("unmapping %u sg elements\n", qc->n_elem); 4614 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
4613 4615
4614 if (qc->n_elem) 4616 if (qc->n_elem)
4615 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); 4617 dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir);
4616 4618
4617 qc->flags &= ~ATA_QCFLAG_DMAMAP; 4619 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4618 qc->sg = NULL; 4620 qc->sg = NULL;
@@ -4727,7 +4729,7 @@ static int ata_sg_setup(struct ata_queued_cmd *qc)
4727 return -1; 4729 return -1;
4728 4730
4729 DPRINTK("%d sg elements mapped\n", n_elem); 4731 DPRINTK("%d sg elements mapped\n", n_elem);
4730 4732 qc->orig_n_elem = qc->n_elem;
4731 qc->n_elem = n_elem; 4733 qc->n_elem = n_elem;
4732 qc->flags |= ATA_QCFLAG_DMAMAP; 4734 qc->flags |= ATA_QCFLAG_DMAMAP;
4733 4735
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index ce2ef0475339..ea890911d4fa 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -2423,11 +2423,14 @@ int ata_eh_reset(struct ata_link *link, int classify,
2423 } 2423 }
2424 2424
2425 /* prereset() might have cleared ATA_EH_RESET. If so, 2425 /* prereset() might have cleared ATA_EH_RESET. If so,
2426 * bang classes and return. 2426 * bang classes, thaw and return.
2427 */ 2427 */
2428 if (reset && !(ehc->i.action & ATA_EH_RESET)) { 2428 if (reset && !(ehc->i.action & ATA_EH_RESET)) {
2429 ata_for_each_dev(dev, link, ALL) 2429 ata_for_each_dev(dev, link, ALL)
2430 classes[dev->devno] = ATA_DEV_NONE; 2430 classes[dev->devno] = ATA_DEV_NONE;
2431 if ((ap->pflags & ATA_PFLAG_FROZEN) &&
2432 ata_is_host_link(link))
2433 ata_eh_thaw_port(ap);
2431 rc = 0; 2434 rc = 0;
2432 goto out; 2435 goto out;
2433 } 2436 }
@@ -2901,7 +2904,7 @@ static int atapi_eh_clear_ua(struct ata_device *dev)
2901 int i; 2904 int i;
2902 2905
2903 for (i = 0; i < ATA_EH_UA_TRIES; i++) { 2906 for (i = 0; i < ATA_EH_UA_TRIES; i++) {
2904 u8 sense_buffer[SCSI_SENSE_BUFFERSIZE]; 2907 u8 *sense_buffer = dev->link->ap->sector_buf;
2905 u8 sense_key = 0; 2908 u8 sense_key = 0;
2906 unsigned int err_mask; 2909 unsigned int err_mask;
2907 2910
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 55a8eed3f3a3..f65b53785a8f 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -2523,7 +2523,7 @@ static void __exit nv_exit(void)
2523module_init(nv_init); 2523module_init(nv_init);
2524module_exit(nv_exit); 2524module_exit(nv_exit);
2525module_param_named(adma, adma_enabled, bool, 0444); 2525module_param_named(adma, adma_enabled, bool, 0444);
2526MODULE_PARM_DESC(adma, "Enable use of ADMA (Default: true)"); 2526MODULE_PARM_DESC(adma, "Enable use of ADMA (Default: false)");
2527module_param_named(swncq, swncq_enabled, bool, 0444); 2527module_param_named(swncq, swncq_enabled, bool, 0444);
2528MODULE_PARM_DESC(swncq, "Enable use of SWNCQ (Default: true)"); 2528MODULE_PARM_DESC(swncq, "Enable use of SWNCQ (Default: true)");
2529 2529
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index b5a061114630..4f9b6d792017 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -3606,11 +3606,9 @@ static int __devinit cciss_init_one(struct pci_dev *pdev,
3606 if (cciss_hard_reset_controller(pdev) || cciss_reset_msi(pdev)) 3606 if (cciss_hard_reset_controller(pdev) || cciss_reset_msi(pdev))
3607 return -ENODEV; 3607 return -ENODEV;
3608 3608
3609 /* Some devices (notably the HP Smart Array 5i Controller) 3609 /* Now try to get the controller to respond to a no-op. Some
3610 need a little pause here */ 3610 devices (notably the HP Smart Array 5i Controller) need
3611 schedule_timeout_uninterruptible(30*HZ); 3611 up to 30 seconds to respond. */
3612
3613 /* Now try to get the controller to respond to a no-op */
3614 for (i=0; i<30; i++) { 3612 for (i=0; i<30; i++) {
3615 if (cciss_noop(pdev) == 0) 3613 if (cciss_noop(pdev) == 0)
3616 break; 3614 break;
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index edbaac6c0573..bf0345577672 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -392,8 +392,7 @@ lo_splice_actor(struct pipe_inode_info *pipe, struct pipe_buffer *buf,
392 struct loop_device *lo = p->lo; 392 struct loop_device *lo = p->lo;
393 struct page *page = buf->page; 393 struct page *page = buf->page;
394 sector_t IV; 394 sector_t IV;
395 size_t size; 395 int size, ret;
396 int ret;
397 396
398 ret = buf->ops->confirm(pipe, buf); 397 ret = buf->ops->confirm(pipe, buf);
399 if (unlikely(ret)) 398 if (unlikely(ret))
diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c
index b6c8ce254359..8f905089b72b 100644
--- a/drivers/block/xen-blkfront.c
+++ b/drivers/block/xen-blkfront.c
@@ -977,6 +977,8 @@ static void backend_changed(struct xenbus_device *dev,
977 break; 977 break;
978 978
979 case XenbusStateClosing: 979 case XenbusStateClosing:
980 if (info->gd == NULL)
981 xenbus_dev_fatal(dev, -ENODEV, "gd is NULL");
980 bd = bdget_disk(info->gd, 0); 982 bd = bdget_disk(info->gd, 0);
981 if (bd == NULL) 983 if (bd == NULL)
982 xenbus_dev_fatal(dev, -ENODEV, "bdget failed"); 984 xenbus_dev_fatal(dev, -ENODEV, "bdget failed");
diff --git a/drivers/dca/dca-core.c b/drivers/dca/dca-core.c
index 33bd75347518..25b743abfb59 100644
--- a/drivers/dca/dca-core.c
+++ b/drivers/dca/dca-core.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright(c) 2007 Intel Corporation. All rights reserved. 2 * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free 5 * under the terms of the GNU General Public License as published by the Free
diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c
index 732fa1ec36ab..e190d8b30700 100644
--- a/drivers/dma/dmatest.c
+++ b/drivers/dma/dmatest.c
@@ -430,13 +430,15 @@ late_initcall(dmatest_init);
430static void __exit dmatest_exit(void) 430static void __exit dmatest_exit(void)
431{ 431{
432 struct dmatest_chan *dtc, *_dtc; 432 struct dmatest_chan *dtc, *_dtc;
433 struct dma_chan *chan;
433 434
434 list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) { 435 list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
435 list_del(&dtc->node); 436 list_del(&dtc->node);
437 chan = dtc->chan;
436 dmatest_cleanup_channel(dtc); 438 dmatest_cleanup_channel(dtc);
437 pr_debug("dmatest: dropped channel %s\n", 439 pr_debug("dmatest: dropped channel %s\n",
438 dma_chan_name(dtc->chan)); 440 dma_chan_name(chan));
439 dma_release_channel(dtc->chan); 441 dma_release_channel(chan);
440 } 442 }
441} 443}
442module_exit(dmatest_exit); 444module_exit(dmatest_exit);
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 70126a606239..86d6da47f558 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -158,7 +158,8 @@ static void dma_start(struct fsl_dma_chan *fsl_chan)
158 158
159static void dma_halt(struct fsl_dma_chan *fsl_chan) 159static void dma_halt(struct fsl_dma_chan *fsl_chan)
160{ 160{
161 int i = 0; 161 int i;
162
162 DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr, 163 DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr,
163 DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) | FSL_DMA_MR_CA, 164 DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) | FSL_DMA_MR_CA,
164 32); 165 32);
@@ -166,8 +167,11 @@ static void dma_halt(struct fsl_dma_chan *fsl_chan)
166 DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) & ~(FSL_DMA_MR_CS 167 DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) & ~(FSL_DMA_MR_CS
167 | FSL_DMA_MR_EMS_EN | FSL_DMA_MR_CA), 32); 168 | FSL_DMA_MR_EMS_EN | FSL_DMA_MR_CA), 32);
168 169
169 while (!dma_is_idle(fsl_chan) && (i++ < 100)) 170 for (i = 0; i < 100; i++) {
171 if (dma_is_idle(fsl_chan))
172 break;
170 udelay(10); 173 udelay(10);
174 }
171 if (i >= 100 && !dma_is_idle(fsl_chan)) 175 if (i >= 100 && !dma_is_idle(fsl_chan))
172 dev_err(fsl_chan->dev, "DMA halt timeout!\n"); 176 dev_err(fsl_chan->dev, "DMA halt timeout!\n");
173} 177}
diff --git a/drivers/dma/ioat.c b/drivers/dma/ioat.c
index 4105d6575b64..ed83dd9df192 100644
--- a/drivers/dma/ioat.c
+++ b/drivers/dma/ioat.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Intel I/OAT DMA Linux driver 2 * Intel I/OAT DMA Linux driver
3 * Copyright(c) 2007 Intel Corporation. 3 * Copyright(c) 2007 - 2009 Intel Corporation.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License, 6 * under the terms and conditions of the GNU General Public License,
diff --git a/drivers/dma/ioat_dca.c b/drivers/dma/ioat_dca.c
index 6cf622da0286..c012a1e15043 100644
--- a/drivers/dma/ioat_dca.c
+++ b/drivers/dma/ioat_dca.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Intel I/OAT DMA Linux driver 2 * Intel I/OAT DMA Linux driver
3 * Copyright(c) 2007 Intel Corporation. 3 * Copyright(c) 2007 - 2009 Intel Corporation.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License, 6 * under the terms and conditions of the GNU General Public License,
@@ -49,6 +49,23 @@
49 49
50#define DCA_TAG_MAP_MASK 0xDF 50#define DCA_TAG_MAP_MASK 0xDF
51 51
52/* expected tag map bytes for I/OAT ver.2 */
53#define DCA2_TAG_MAP_BYTE0 0x80
54#define DCA2_TAG_MAP_BYTE1 0x0
55#define DCA2_TAG_MAP_BYTE2 0x81
56#define DCA2_TAG_MAP_BYTE3 0x82
57#define DCA2_TAG_MAP_BYTE4 0x82
58
59/* verify if tag map matches expected values */
60static inline int dca2_tag_map_valid(u8 *tag_map)
61{
62 return ((tag_map[0] == DCA2_TAG_MAP_BYTE0) &&
63 (tag_map[1] == DCA2_TAG_MAP_BYTE1) &&
64 (tag_map[2] == DCA2_TAG_MAP_BYTE2) &&
65 (tag_map[3] == DCA2_TAG_MAP_BYTE3) &&
66 (tag_map[4] == DCA2_TAG_MAP_BYTE4));
67}
68
52/* 69/*
53 * "Legacy" DCA systems do not implement the DCA register set in the 70 * "Legacy" DCA systems do not implement the DCA register set in the
54 * I/OAT device. Software needs direct support for their tag mappings. 71 * I/OAT device. Software needs direct support for their tag mappings.
@@ -452,6 +469,13 @@ struct dca_provider *ioat2_dca_init(struct pci_dev *pdev, void __iomem *iobase)
452 ioatdca->tag_map[i] = 0; 469 ioatdca->tag_map[i] = 0;
453 } 470 }
454 471
472 if (!dca2_tag_map_valid(ioatdca->tag_map)) {
473 dev_err(&pdev->dev, "APICID_TAG_MAP set incorrectly by BIOS, "
474 "disabling DCA\n");
475 free_dca_provider(dca);
476 return NULL;
477 }
478
455 err = register_dca_provider(dca, &pdev->dev); 479 err = register_dca_provider(dca, &pdev->dev);
456 if (err) { 480 if (err) {
457 free_dca_provider(dca); 481 free_dca_provider(dca);
diff --git a/drivers/dma/ioat_dma.c b/drivers/dma/ioat_dma.c
index b3759c4b6536..5905cd36bcd2 100644
--- a/drivers/dma/ioat_dma.c
+++ b/drivers/dma/ioat_dma.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Intel I/OAT DMA Linux driver 2 * Intel I/OAT DMA Linux driver
3 * Copyright(c) 2004 - 2007 Intel Corporation. 3 * Copyright(c) 2004 - 2009 Intel Corporation.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License, 6 * under the terms and conditions of the GNU General Public License,
@@ -189,11 +189,13 @@ static int ioat_dma_enumerate_channels(struct ioatdma_device *device)
189 ioat_chan->xfercap = xfercap; 189 ioat_chan->xfercap = xfercap;
190 ioat_chan->desccount = 0; 190 ioat_chan->desccount = 0;
191 INIT_DELAYED_WORK(&ioat_chan->work, ioat_dma_chan_reset_part2); 191 INIT_DELAYED_WORK(&ioat_chan->work, ioat_dma_chan_reset_part2);
192 if (ioat_chan->device->version != IOAT_VER_1_2) { 192 if (ioat_chan->device->version == IOAT_VER_2_0)
193 writel(IOAT_DCACTRL_CMPL_WRITE_ENABLE 193 writel(IOAT_DCACTRL_CMPL_WRITE_ENABLE |
194 | IOAT_DMA_DCA_ANY_CPU, 194 IOAT_DMA_DCA_ANY_CPU,
195 ioat_chan->reg_base + IOAT_DCACTRL_OFFSET); 195 ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
196 } 196 else if (ioat_chan->device->version == IOAT_VER_3_0)
197 writel(IOAT_DMA_DCA_ANY_CPU,
198 ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
197 spin_lock_init(&ioat_chan->cleanup_lock); 199 spin_lock_init(&ioat_chan->cleanup_lock);
198 spin_lock_init(&ioat_chan->desc_lock); 200 spin_lock_init(&ioat_chan->desc_lock);
199 INIT_LIST_HEAD(&ioat_chan->free_desc); 201 INIT_LIST_HEAD(&ioat_chan->free_desc);
@@ -1169,9 +1171,8 @@ static void ioat_dma_memcpy_cleanup(struct ioat_dma_chan *ioat_chan)
1169 * up if the client is done with the descriptor 1171 * up if the client is done with the descriptor
1170 */ 1172 */
1171 if (async_tx_test_ack(&desc->async_tx)) { 1173 if (async_tx_test_ack(&desc->async_tx)) {
1172 list_del(&desc->node); 1174 list_move_tail(&desc->node,
1173 list_add_tail(&desc->node, 1175 &ioat_chan->free_desc);
1174 &ioat_chan->free_desc);
1175 } else 1176 } else
1176 desc->async_tx.cookie = 0; 1177 desc->async_tx.cookie = 0;
1177 } else { 1178 } else {
@@ -1362,6 +1363,7 @@ static int ioat_dma_self_test(struct ioatdma_device *device)
1362 dma_cookie_t cookie; 1363 dma_cookie_t cookie;
1363 int err = 0; 1364 int err = 0;
1364 struct completion cmp; 1365 struct completion cmp;
1366 unsigned long tmo;
1365 1367
1366 src = kzalloc(sizeof(u8) * IOAT_TEST_SIZE, GFP_KERNEL); 1368 src = kzalloc(sizeof(u8) * IOAT_TEST_SIZE, GFP_KERNEL);
1367 if (!src) 1369 if (!src)
@@ -1413,9 +1415,10 @@ static int ioat_dma_self_test(struct ioatdma_device *device)
1413 } 1415 }
1414 device->common.device_issue_pending(dma_chan); 1416 device->common.device_issue_pending(dma_chan);
1415 1417
1416 wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000)); 1418 tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000));
1417 1419
1418 if (device->common.device_is_tx_complete(dma_chan, cookie, NULL, NULL) 1420 if (tmo == 0 ||
1421 device->common.device_is_tx_complete(dma_chan, cookie, NULL, NULL)
1419 != DMA_SUCCESS) { 1422 != DMA_SUCCESS) {
1420 dev_err(&device->pdev->dev, 1423 dev_err(&device->pdev->dev,
1421 "Self-test copy timed out, disabling\n"); 1424 "Self-test copy timed out, disabling\n");
@@ -1657,6 +1660,13 @@ struct ioatdma_device *ioat_dma_probe(struct pci_dev *pdev,
1657 " %d channels, device version 0x%02x, driver version %s\n", 1660 " %d channels, device version 0x%02x, driver version %s\n",
1658 device->common.chancnt, device->version, IOAT_DMA_VERSION); 1661 device->common.chancnt, device->version, IOAT_DMA_VERSION);
1659 1662
1663 if (!device->common.chancnt) {
1664 dev_err(&device->pdev->dev,
1665 "Intel(R) I/OAT DMA Engine problem found: "
1666 "zero channels detected\n");
1667 goto err_setup_interrupts;
1668 }
1669
1660 err = ioat_dma_setup_interrupts(device); 1670 err = ioat_dma_setup_interrupts(device);
1661 if (err) 1671 if (err)
1662 goto err_setup_interrupts; 1672 goto err_setup_interrupts;
@@ -1696,6 +1706,9 @@ void ioat_dma_remove(struct ioatdma_device *device)
1696 struct dma_chan *chan, *_chan; 1706 struct dma_chan *chan, *_chan;
1697 struct ioat_dma_chan *ioat_chan; 1707 struct ioat_dma_chan *ioat_chan;
1698 1708
1709 if (device->version != IOAT_VER_3_0)
1710 cancel_delayed_work(&device->work);
1711
1699 ioat_dma_remove_interrupts(device); 1712 ioat_dma_remove_interrupts(device);
1700 1713
1701 dma_async_device_unregister(&device->common); 1714 dma_async_device_unregister(&device->common);
@@ -1707,10 +1720,6 @@ void ioat_dma_remove(struct ioatdma_device *device)
1707 pci_release_regions(device->pdev); 1720 pci_release_regions(device->pdev);
1708 pci_disable_device(device->pdev); 1721 pci_disable_device(device->pdev);
1709 1722
1710 if (device->version != IOAT_VER_3_0) {
1711 cancel_delayed_work(&device->work);
1712 }
1713
1714 list_for_each_entry_safe(chan, _chan, 1723 list_for_each_entry_safe(chan, _chan,
1715 &device->common.channels, device_node) { 1724 &device->common.channels, device_node) {
1716 ioat_chan = to_ioat_chan(chan); 1725 ioat_chan = to_ioat_chan(chan);
diff --git a/drivers/dma/ioatdma.h b/drivers/dma/ioatdma.h
index a3306d0e1372..a52ff4bd4601 100644
--- a/drivers/dma/ioatdma.h
+++ b/drivers/dma/ioatdma.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright(c) 2004 - 2007 Intel Corporation. All rights reserved. 2 * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free 5 * under the terms of the GNU General Public License as published by the Free
@@ -29,7 +29,7 @@
29#include <linux/pci_ids.h> 29#include <linux/pci_ids.h>
30#include <net/tcp.h> 30#include <net/tcp.h>
31 31
32#define IOAT_DMA_VERSION "3.30" 32#define IOAT_DMA_VERSION "3.64"
33 33
34enum ioat_interrupt { 34enum ioat_interrupt {
35 none = 0, 35 none = 0,
@@ -135,12 +135,14 @@ static inline void ioat_set_tcp_copy_break(struct ioatdma_device *dev)
135 #ifdef CONFIG_NET_DMA 135 #ifdef CONFIG_NET_DMA
136 switch (dev->version) { 136 switch (dev->version) {
137 case IOAT_VER_1_2: 137 case IOAT_VER_1_2:
138 case IOAT_VER_3_0:
139 sysctl_tcp_dma_copybreak = 4096; 138 sysctl_tcp_dma_copybreak = 4096;
140 break; 139 break;
141 case IOAT_VER_2_0: 140 case IOAT_VER_2_0:
142 sysctl_tcp_dma_copybreak = 2048; 141 sysctl_tcp_dma_copybreak = 2048;
143 break; 142 break;
143 case IOAT_VER_3_0:
144 sysctl_tcp_dma_copybreak = 262144;
145 break;
144 } 146 }
145 #endif 147 #endif
146} 148}
diff --git a/drivers/dma/ioatdma_hw.h b/drivers/dma/ioatdma_hw.h
index f1ae2c776f74..afa57eef86c9 100644
--- a/drivers/dma/ioatdma_hw.h
+++ b/drivers/dma/ioatdma_hw.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright(c) 2004 - 2007 Intel Corporation. All rights reserved. 2 * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free 5 * under the terms of the GNU General Public License as published by the Free
diff --git a/drivers/dma/ioatdma_registers.h b/drivers/dma/ioatdma_registers.h
index 827cb503cac6..49bc277424f8 100644
--- a/drivers/dma/ioatdma_registers.h
+++ b/drivers/dma/ioatdma_registers.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright(c) 2004 - 2007 Intel Corporation. All rights reserved. 2 * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free 5 * under the terms of the GNU General Public License as published by the Free
diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c
index 647374acba94..16adbe61cfb2 100644
--- a/drivers/dma/iop-adma.c
+++ b/drivers/dma/iop-adma.c
@@ -928,19 +928,19 @@ iop_adma_xor_zero_sum_self_test(struct iop_adma_device *device)
928 928
929 for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) { 929 for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) {
930 xor_srcs[src_idx] = alloc_page(GFP_KERNEL); 930 xor_srcs[src_idx] = alloc_page(GFP_KERNEL);
931 if (!xor_srcs[src_idx]) 931 if (!xor_srcs[src_idx]) {
932 while (src_idx--) { 932 while (src_idx--)
933 __free_page(xor_srcs[src_idx]); 933 __free_page(xor_srcs[src_idx]);
934 return -ENOMEM; 934 return -ENOMEM;
935 } 935 }
936 } 936 }
937 937
938 dest = alloc_page(GFP_KERNEL); 938 dest = alloc_page(GFP_KERNEL);
939 if (!dest) 939 if (!dest) {
940 while (src_idx--) { 940 while (src_idx--)
941 __free_page(xor_srcs[src_idx]); 941 __free_page(xor_srcs[src_idx]);
942 return -ENOMEM; 942 return -ENOMEM;
943 } 943 }
944 944
945 /* Fill in src buffers */ 945 /* Fill in src buffers */
946 for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) { 946 for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) {
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index 1f154d08e98f..ae50a9d1a4e6 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -729,7 +729,7 @@ static int ipu_init_channel_buffer(struct idmac_channel *ichan,
729 729
730 ichan->status = IPU_CHANNEL_READY; 730 ichan->status = IPU_CHANNEL_READY;
731 731
732 spin_unlock_irqrestore(ipu->lock, flags); 732 spin_unlock_irqrestore(&ipu->lock, flags);
733 733
734 return 0; 734 return 0;
735} 735}
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index 5d5d5b31867f..cb7f26fb9f18 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -1019,19 +1019,19 @@ mv_xor_xor_self_test(struct mv_xor_device *device)
1019 1019
1020 for (src_idx = 0; src_idx < MV_XOR_NUM_SRC_TEST; src_idx++) { 1020 for (src_idx = 0; src_idx < MV_XOR_NUM_SRC_TEST; src_idx++) {
1021 xor_srcs[src_idx] = alloc_page(GFP_KERNEL); 1021 xor_srcs[src_idx] = alloc_page(GFP_KERNEL);
1022 if (!xor_srcs[src_idx]) 1022 if (!xor_srcs[src_idx]) {
1023 while (src_idx--) { 1023 while (src_idx--)
1024 __free_page(xor_srcs[src_idx]); 1024 __free_page(xor_srcs[src_idx]);
1025 return -ENOMEM; 1025 return -ENOMEM;
1026 } 1026 }
1027 } 1027 }
1028 1028
1029 dest = alloc_page(GFP_KERNEL); 1029 dest = alloc_page(GFP_KERNEL);
1030 if (!dest) 1030 if (!dest) {
1031 while (src_idx--) { 1031 while (src_idx--)
1032 __free_page(xor_srcs[src_idx]); 1032 __free_page(xor_srcs[src_idx]);
1033 return -ENOMEM; 1033 return -ENOMEM;
1034 } 1034 }
1035 1035
1036 /* Fill in src buffers */ 1036 /* Fill in src buffers */
1037 for (src_idx = 0; src_idx < MV_XOR_NUM_SRC_TEST; src_idx++) { 1037 for (src_idx = 0; src_idx < MV_XOR_NUM_SRC_TEST; src_idx++) {
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index e072903b12f0..5ea3bfad172a 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -721,6 +721,11 @@ config BLK_DEV_IDE_TX4939
721 depends on SOC_TX4939 721 depends on SOC_TX4939
722 select BLK_DEV_IDEDMA_SFF 722 select BLK_DEV_IDEDMA_SFF
723 723
724config BLK_DEV_IDE_AT91
725 tristate "Atmel AT91 (SAM9, CAP9, AT572D940HF) IDE support"
726 depends on ARM && ARCH_AT91 && !ARCH_AT91RM9200 && !ARCH_AT91X40
727 select IDE_TIMINGS
728
724config IDE_ARM 729config IDE_ARM
725 tristate "ARM IDE support" 730 tristate "ARM IDE support"
726 depends on ARM && (ARCH_RPC || ARCH_SHARK) 731 depends on ARM && (ARCH_RPC || ARCH_SHARK)
diff --git a/drivers/ide/Makefile b/drivers/ide/Makefile
index d0e3d7d5b467..1c326d94aa6d 100644
--- a/drivers/ide/Makefile
+++ b/drivers/ide/Makefile
@@ -116,3 +116,4 @@ obj-$(CONFIG_BLK_DEV_IDE_AU1XXX) += au1xxx-ide.o
116 116
117obj-$(CONFIG_BLK_DEV_IDE_TX4938) += tx4938ide.o 117obj-$(CONFIG_BLK_DEV_IDE_TX4938) += tx4938ide.o
118obj-$(CONFIG_BLK_DEV_IDE_TX4939) += tx4939ide.o 118obj-$(CONFIG_BLK_DEV_IDE_TX4939) += tx4939ide.o
119obj-$(CONFIG_BLK_DEV_IDE_AT91) += at91_ide.o
diff --git a/drivers/ide/at91_ide.c b/drivers/ide/at91_ide.c
new file mode 100644
index 000000000000..1bb50f46388d
--- /dev/null
+++ b/drivers/ide/at91_ide.c
@@ -0,0 +1,467 @@
1/*
2 * IDE host driver for AT91 (SAM9, CAP9, AT572D940HF) Static Memory Controller
3 * with Compact Flash True IDE logic
4 *
5 * Copyright (c) 2008, 2009 Kelvatek Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 */
22
23#include <linux/version.h>
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/clk.h>
27#include <linux/err.h>
28#include <linux/ide.h>
29#include <linux/platform_device.h>
30
31#include <mach/board.h>
32#include <mach/gpio.h>
33#include <mach/at91sam9263.h>
34#include <mach/at91sam9_smc.h>
35#include <mach/at91sam9263_matrix.h>
36
37#define DRV_NAME "at91_ide"
38
39#define perr(fmt, args...) pr_err(DRV_NAME ": " fmt, ##args)
40#define pdbg(fmt, args...) pr_debug("%s " fmt, __func__, ##args)
41
42/*
43 * Access to IDE device is possible through EBI Static Memory Controller
44 * with Compact Flash logic. For details see EBI and SMC datasheet sections
45 * of any microcontroller from AT91SAM9 family.
46 *
47 * Within SMC chip select address space, lines A[23:21] distinguish Compact
48 * Flash modes (I/O, common memory, attribute memory, True IDE). IDE modes are:
49 * 0x00c0000 - True IDE
50 * 0x00e0000 - Alternate True IDE (Alt Status Register)
51 *
52 * On True IDE mode Task File and Data Register are mapped at the same address.
53 * To distinguish access between these two different bus data width is used:
54 * 8Bit for Task File, 16Bit for Data I/O.
55 *
56 * After initialization we do 8/16 bit flipping (changes in SMC MODE register)
57 * only inside IDE callback routines which are serialized by IDE layer,
58 * so no additional locking needed.
59 */
60
61#define TASK_FILE 0x00c00000
62#define ALT_MODE 0x00e00000
63#define REGS_SIZE 8
64
65#define enter_16bit(cs, mode) do { \
66 mode = at91_sys_read(AT91_SMC_MODE(cs)); \
67 at91_sys_write(AT91_SMC_MODE(cs), mode | AT91_SMC_DBW_16); \
68} while (0)
69
70#define leave_16bit(cs, mode) at91_sys_write(AT91_SMC_MODE(cs), mode);
71
72static void set_smc_timings(const u8 chipselect, const u16 cycle,
73 const u16 setup, const u16 pulse,
74 const u16 data_float, int use_iordy)
75{
76 unsigned long mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
77 AT91_SMC_BAT_SELECT;
78
79 /* disable or enable waiting for IORDY signal */
80 if (use_iordy)
81 mode |= AT91_SMC_EXNWMODE_READY;
82
83 /* add data float cycles if needed */
84 if (data_float)
85 mode |= AT91_SMC_TDF_(data_float);
86
87 at91_sys_write(AT91_SMC_MODE(chipselect), mode);
88
89 /* setup timings in SMC */
90 at91_sys_write(AT91_SMC_SETUP(chipselect), AT91_SMC_NWESETUP_(setup) |
91 AT91_SMC_NCS_WRSETUP_(0) |
92 AT91_SMC_NRDSETUP_(setup) |
93 AT91_SMC_NCS_RDSETUP_(0));
94 at91_sys_write(AT91_SMC_PULSE(chipselect), AT91_SMC_NWEPULSE_(pulse) |
95 AT91_SMC_NCS_WRPULSE_(cycle) |
96 AT91_SMC_NRDPULSE_(pulse) |
97 AT91_SMC_NCS_RDPULSE_(cycle));
98 at91_sys_write(AT91_SMC_CYCLE(chipselect), AT91_SMC_NWECYCLE_(cycle) |
99 AT91_SMC_NRDCYCLE_(cycle));
100}
101
102static unsigned int calc_mck_cycles(unsigned int ns, unsigned int mck_hz)
103{
104 u64 tmp = ns;
105
106 tmp *= mck_hz;
107 tmp += 1000*1000*1000 - 1; /* round up */
108 do_div(tmp, 1000*1000*1000);
109 return (unsigned int) tmp;
110}
111
112static void apply_timings(const u8 chipselect, const u8 pio,
113 const struct ide_timing *timing, int use_iordy)
114{
115 unsigned int t0, t1, t2, t6z;
116 unsigned int cycle, setup, pulse, data_float;
117 unsigned int mck_hz;
118 struct clk *mck;
119
120 /* see table 22 of Compact Flash standard 4.1 for the meaning,
121 * we do not stretch active (t2) time, so setup (t1) + hold time (th)
122 * assure at least minimal recovery (t2i) time */
123 t0 = timing->cyc8b;
124 t1 = timing->setup;
125 t2 = timing->act8b;
126 t6z = (pio < 5) ? 30 : 20;
127
128 pdbg("t0=%u t1=%u t2=%u t6z=%u\n", t0, t1, t2, t6z);
129
130 mck = clk_get(NULL, "mck");
131 BUG_ON(IS_ERR(mck));
132 mck_hz = clk_get_rate(mck);
133 pdbg("mck_hz=%u\n", mck_hz);
134
135 cycle = calc_mck_cycles(t0, mck_hz);
136 setup = calc_mck_cycles(t1, mck_hz);
137 pulse = calc_mck_cycles(t2, mck_hz);
138 data_float = calc_mck_cycles(t6z, mck_hz);
139
140 pdbg("cycle=%u setup=%u pulse=%u data_float=%u\n",
141 cycle, setup, pulse, data_float);
142
143 set_smc_timings(chipselect, cycle, setup, pulse, data_float, use_iordy);
144}
145
146static void at91_ide_input_data(ide_drive_t *drive, struct request *rq,
147 void *buf, unsigned int len)
148{
149 ide_hwif_t *hwif = drive->hwif;
150 struct ide_io_ports *io_ports = &hwif->io_ports;
151 u8 chipselect = hwif->select_data;
152 unsigned long mode;
153
154 pdbg("cs %u buf %p len %d\n", chipselect, buf, len);
155
156 len++;
157
158 enter_16bit(chipselect, mode);
159 __ide_mm_insw((void __iomem *) io_ports->data_addr, buf, len / 2);
160 leave_16bit(chipselect, mode);
161}
162
163static void at91_ide_output_data(ide_drive_t *drive, struct request *rq,
164 void *buf, unsigned int len)
165{
166 ide_hwif_t *hwif = drive->hwif;
167 struct ide_io_ports *io_ports = &hwif->io_ports;
168 u8 chipselect = hwif->select_data;
169 unsigned long mode;
170
171 pdbg("cs %u buf %p len %d\n", chipselect, buf, len);
172
173 enter_16bit(chipselect, mode);
174 __ide_mm_outsw((void __iomem *) io_ports->data_addr, buf, len / 2);
175 leave_16bit(chipselect, mode);
176}
177
178static u8 ide_mm_inb(unsigned long port)
179{
180 return readb((void __iomem *) port);
181}
182
183static void ide_mm_outb(u8 value, unsigned long port)
184{
185 writeb(value, (void __iomem *) port);
186}
187
188static void at91_ide_tf_load(ide_drive_t *drive, ide_task_t *task)
189{
190 ide_hwif_t *hwif = drive->hwif;
191 struct ide_io_ports *io_ports = &hwif->io_ports;
192 struct ide_taskfile *tf = &task->tf;
193 u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
194
195 if (task->tf_flags & IDE_TFLAG_FLAGGED)
196 HIHI = 0xFF;
197
198 if (task->tf_flags & IDE_TFLAG_OUT_DATA) {
199 u16 data = (tf->hob_data << 8) | tf->data;
200
201 at91_ide_output_data(drive, NULL, &data, 2);
202 }
203
204 if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
205 ide_mm_outb(tf->hob_feature, io_ports->feature_addr);
206 if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
207 ide_mm_outb(tf->hob_nsect, io_ports->nsect_addr);
208 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
209 ide_mm_outb(tf->hob_lbal, io_ports->lbal_addr);
210 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
211 ide_mm_outb(tf->hob_lbam, io_ports->lbam_addr);
212 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
213 ide_mm_outb(tf->hob_lbah, io_ports->lbah_addr);
214
215 if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
216 ide_mm_outb(tf->feature, io_ports->feature_addr);
217 if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
218 ide_mm_outb(tf->nsect, io_ports->nsect_addr);
219 if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
220 ide_mm_outb(tf->lbal, io_ports->lbal_addr);
221 if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
222 ide_mm_outb(tf->lbam, io_ports->lbam_addr);
223 if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
224 ide_mm_outb(tf->lbah, io_ports->lbah_addr);
225
226 if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
227 ide_mm_outb((tf->device & HIHI) | drive->select, io_ports->device_addr);
228}
229
230static void at91_ide_tf_read(ide_drive_t *drive, ide_task_t *task)
231{
232 ide_hwif_t *hwif = drive->hwif;
233 struct ide_io_ports *io_ports = &hwif->io_ports;
234 struct ide_taskfile *tf = &task->tf;
235
236 if (task->tf_flags & IDE_TFLAG_IN_DATA) {
237 u16 data;
238
239 at91_ide_input_data(drive, NULL, &data, 2);
240 tf->data = data & 0xff;
241 tf->hob_data = (data >> 8) & 0xff;
242 }
243
244 /* be sure we're looking at the low order bits */
245 ide_mm_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
246
247 if (task->tf_flags & IDE_TFLAG_IN_FEATURE)
248 tf->feature = ide_mm_inb(io_ports->feature_addr);
249 if (task->tf_flags & IDE_TFLAG_IN_NSECT)
250 tf->nsect = ide_mm_inb(io_ports->nsect_addr);
251 if (task->tf_flags & IDE_TFLAG_IN_LBAL)
252 tf->lbal = ide_mm_inb(io_ports->lbal_addr);
253 if (task->tf_flags & IDE_TFLAG_IN_LBAM)
254 tf->lbam = ide_mm_inb(io_ports->lbam_addr);
255 if (task->tf_flags & IDE_TFLAG_IN_LBAH)
256 tf->lbah = ide_mm_inb(io_ports->lbah_addr);
257 if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
258 tf->device = ide_mm_inb(io_ports->device_addr);
259
260 if (task->tf_flags & IDE_TFLAG_LBA48) {
261 ide_mm_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
262
263 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
264 tf->hob_feature = ide_mm_inb(io_ports->feature_addr);
265 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
266 tf->hob_nsect = ide_mm_inb(io_ports->nsect_addr);
267 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
268 tf->hob_lbal = ide_mm_inb(io_ports->lbal_addr);
269 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
270 tf->hob_lbam = ide_mm_inb(io_ports->lbam_addr);
271 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
272 tf->hob_lbah = ide_mm_inb(io_ports->lbah_addr);
273 }
274}
275
276static void at91_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
277{
278 struct ide_timing *timing;
279 u8 chipselect = drive->hwif->select_data;
280 int use_iordy = 0;
281
282 pdbg("chipselect %u pio %u\n", chipselect, pio);
283
284 timing = ide_timing_find_mode(XFER_PIO_0 + pio);
285 BUG_ON(!timing);
286
287 if ((pio > 2 || ata_id_has_iordy(drive->id)) &&
288 !(ata_id_is_cfa(drive->id) && pio > 4))
289 use_iordy = 1;
290
291 apply_timings(chipselect, pio, timing, use_iordy);
292}
293
294static const struct ide_tp_ops at91_ide_tp_ops = {
295 .exec_command = ide_exec_command,
296 .read_status = ide_read_status,
297 .read_altstatus = ide_read_altstatus,
298 .set_irq = ide_set_irq,
299
300 .tf_load = at91_ide_tf_load,
301 .tf_read = at91_ide_tf_read,
302
303 .input_data = at91_ide_input_data,
304 .output_data = at91_ide_output_data,
305};
306
307static const struct ide_port_ops at91_ide_port_ops = {
308 .set_pio_mode = at91_ide_set_pio_mode,
309};
310
311static const struct ide_port_info at91_ide_port_info __initdata = {
312 .port_ops = &at91_ide_port_ops,
313 .tp_ops = &at91_ide_tp_ops,
314 .host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA | IDE_HFLAG_SINGLE |
315 IDE_HFLAG_NO_IO_32BIT | IDE_HFLAG_UNMASK_IRQS,
316 .pio_mask = ATA_PIO5,
317};
318
319/*
320 * If interrupt is delivered through GPIO, IRQ are triggered on falling
321 * and rising edge of signal. Whereas IDE device request interrupt on high
322 * level (rising edge in our case). This mean we have fake interrupts, so
323 * we need to check interrupt pin and exit instantly from ISR when line
324 * is on low level.
325 */
326
327irqreturn_t at91_irq_handler(int irq, void *dev_id)
328{
329 int ntries = 8;
330 int pin_val1, pin_val2;
331
332 /* additional deglitch, line can be noisy in badly designed PCB */
333 do {
334 pin_val1 = at91_get_gpio_value(irq);
335 pin_val2 = at91_get_gpio_value(irq);
336 } while (pin_val1 != pin_val2 && --ntries > 0);
337
338 if (pin_val1 == 0 || ntries <= 0)
339 return IRQ_HANDLED;
340
341 return ide_intr(irq, dev_id);
342}
343
344static int __init at91_ide_probe(struct platform_device *pdev)
345{
346 int ret;
347 hw_regs_t hw;
348 hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
349 struct ide_host *host;
350 struct resource *res;
351 unsigned long tf_base = 0, ctl_base = 0;
352 struct at91_cf_data *board = pdev->dev.platform_data;
353
354 if (!board)
355 return -ENODEV;
356
357 if (board->det_pin && at91_get_gpio_value(board->det_pin) != 0) {
358 perr("no device detected\n");
359 return -ENODEV;
360 }
361
362 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
363 if (!res) {
364 perr("can't get memory resource\n");
365 return -ENODEV;
366 }
367
368 if (!devm_request_mem_region(&pdev->dev, res->start + TASK_FILE,
369 REGS_SIZE, "ide") ||
370 !devm_request_mem_region(&pdev->dev, res->start + ALT_MODE,
371 REGS_SIZE, "alt")) {
372 perr("memory resources in use\n");
373 return -EBUSY;
374 }
375
376 pdbg("chipselect %u irq %u res %08lx\n", board->chipselect,
377 board->irq_pin, (unsigned long) res->start);
378
379 tf_base = (unsigned long) devm_ioremap(&pdev->dev, res->start + TASK_FILE,
380 REGS_SIZE);
381 ctl_base = (unsigned long) devm_ioremap(&pdev->dev, res->start + ALT_MODE,
382 REGS_SIZE);
383 if (!tf_base || !ctl_base) {
384 perr("can't map memory regions\n");
385 return -EBUSY;
386 }
387
388 memset(&hw, 0, sizeof(hw));
389
390 if (board->flags & AT91_IDE_SWAP_A0_A2) {
391 /* workaround for stupid hardware bug */
392 hw.io_ports.data_addr = tf_base + 0;
393 hw.io_ports.error_addr = tf_base + 4;
394 hw.io_ports.nsect_addr = tf_base + 2;
395 hw.io_ports.lbal_addr = tf_base + 6;
396 hw.io_ports.lbam_addr = tf_base + 1;
397 hw.io_ports.lbah_addr = tf_base + 5;
398 hw.io_ports.device_addr = tf_base + 3;
399 hw.io_ports.command_addr = tf_base + 7;
400 hw.io_ports.ctl_addr = ctl_base + 3;
401 } else
402 ide_std_init_ports(&hw, tf_base, ctl_base + 6);
403
404 hw.irq = board->irq_pin;
405 hw.chipset = ide_generic;
406 hw.dev = &pdev->dev;
407
408 host = ide_host_alloc(&at91_ide_port_info, hws);
409 if (!host) {
410 perr("failed to allocate ide host\n");
411 return -ENOMEM;
412 }
413
414 /* setup Static Memory Controller - PIO 0 as default */
415 apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0);
416
417 /* with GPIO interrupt we have to do quirks in handler */
418 if (board->irq_pin >= PIN_BASE)
419 host->irq_handler = at91_irq_handler;
420
421 host->ports[0]->select_data = board->chipselect;
422
423 ret = ide_host_register(host, &at91_ide_port_info, hws);
424 if (ret) {
425 perr("failed to register ide host\n");
426 goto err_free_host;
427 }
428 platform_set_drvdata(pdev, host);
429 return 0;
430
431err_free_host:
432 ide_host_free(host);
433 return ret;
434}
435
436static int __exit at91_ide_remove(struct platform_device *pdev)
437{
438 struct ide_host *host = platform_get_drvdata(pdev);
439
440 ide_host_remove(host);
441 return 0;
442}
443
444static struct platform_driver at91_ide_driver = {
445 .driver = {
446 .name = DRV_NAME,
447 .owner = THIS_MODULE,
448 },
449 .remove = __exit_p(at91_ide_remove),
450};
451
452static int __init at91_ide_init(void)
453{
454 return platform_driver_probe(&at91_ide_driver, at91_ide_probe);
455}
456
457static void __exit at91_ide_exit(void)
458{
459 platform_driver_unregister(&at91_ide_driver);
460}
461
462module_init(at91_ide_init);
463module_exit(at91_ide_exit);
464
465MODULE_LICENSE("GPL");
466MODULE_AUTHOR("Stanislaw Gruszka <stf_xl@wp.pl>");
467
diff --git a/drivers/ide/ide-disk_proc.c b/drivers/ide/ide-disk_proc.c
index 1146f4204c6e..1f86dcbd2b1c 100644
--- a/drivers/ide/ide-disk_proc.c
+++ b/drivers/ide/ide-disk_proc.c
@@ -125,5 +125,5 @@ const struct ide_proc_devset ide_disk_settings[] = {
125 IDE_PROC_DEVSET(multcount, 0, 16), 125 IDE_PROC_DEVSET(multcount, 0, 16),
126 IDE_PROC_DEVSET(nowerr, 0, 1), 126 IDE_PROC_DEVSET(nowerr, 0, 1),
127 IDE_PROC_DEVSET(wcache, 0, 1), 127 IDE_PROC_DEVSET(wcache, 0, 1),
128 { 0 }, 128 { NULL },
129}; 129};
diff --git a/drivers/ide/ide-floppy_proc.c b/drivers/ide/ide-floppy_proc.c
index 3ec762cb60ab..fcd4d8153df5 100644
--- a/drivers/ide/ide-floppy_proc.c
+++ b/drivers/ide/ide-floppy_proc.c
@@ -29,5 +29,5 @@ const struct ide_proc_devset ide_floppy_settings[] = {
29 IDE_PROC_DEVSET(bios_head, 0, 255), 29 IDE_PROC_DEVSET(bios_head, 0, 255),
30 IDE_PROC_DEVSET(bios_sect, 0, 63), 30 IDE_PROC_DEVSET(bios_sect, 0, 63),
31 IDE_PROC_DEVSET(ticks, 0, 255), 31 IDE_PROC_DEVSET(ticks, 0, 255),
32 { 0 }, 32 { NULL },
33}; 33};
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index 9ee51adf567f..a9a6c208288a 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -908,7 +908,7 @@ void ide_timer_expiry (unsigned long data)
908 ide_drive_t *uninitialized_var(drive); 908 ide_drive_t *uninitialized_var(drive);
909 ide_handler_t *handler; 909 ide_handler_t *handler;
910 unsigned long flags; 910 unsigned long flags;
911 unsigned long wait = -1; 911 int wait = -1;
912 int plug_device = 0; 912 int plug_device = 0;
913 913
914 spin_lock_irqsave(&hwif->lock, flags); 914 spin_lock_irqsave(&hwif->lock, flags);
@@ -1162,6 +1162,7 @@ out_early:
1162 1162
1163 return irq_ret; 1163 return irq_ret;
1164} 1164}
1165EXPORT_SYMBOL_GPL(ide_intr);
1165 1166
1166/** 1167/**
1167 * ide_do_drive_cmd - issue IDE special command 1168 * ide_do_drive_cmd - issue IDE special command
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c
index 753b92ebe0ae..b1892bd95c6f 100644
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -315,6 +315,8 @@ void ide_output_data(ide_drive_t *drive, struct request *rq, void *buf,
315 u8 io_32bit = drive->io_32bit; 315 u8 io_32bit = drive->io_32bit;
316 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 316 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
317 317
318 len++;
319
318 if (io_32bit) { 320 if (io_32bit) {
319 unsigned long uninitialized_var(flags); 321 unsigned long uninitialized_var(flags);
320 322
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index ce0818a993f6..ee8e3e7cad51 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -950,6 +950,7 @@ static int ide_port_setup_devices(ide_hwif_t *hwif)
950static int init_irq (ide_hwif_t *hwif) 950static int init_irq (ide_hwif_t *hwif)
951{ 951{
952 struct ide_io_ports *io_ports = &hwif->io_ports; 952 struct ide_io_ports *io_ports = &hwif->io_ports;
953 irq_handler_t irq_handler;
953 int sa = 0; 954 int sa = 0;
954 955
955 mutex_lock(&ide_cfg_mtx); 956 mutex_lock(&ide_cfg_mtx);
@@ -959,6 +960,10 @@ static int init_irq (ide_hwif_t *hwif)
959 hwif->timer.function = &ide_timer_expiry; 960 hwif->timer.function = &ide_timer_expiry;
960 hwif->timer.data = (unsigned long)hwif; 961 hwif->timer.data = (unsigned long)hwif;
961 962
963 irq_handler = hwif->host->irq_handler;
964 if (irq_handler == NULL)
965 irq_handler = ide_intr;
966
962#if defined(__mc68000__) 967#if defined(__mc68000__)
963 sa = IRQF_SHARED; 968 sa = IRQF_SHARED;
964#endif /* __mc68000__ */ 969#endif /* __mc68000__ */
@@ -969,7 +974,7 @@ static int init_irq (ide_hwif_t *hwif)
969 if (io_ports->ctl_addr) 974 if (io_ports->ctl_addr)
970 hwif->tp_ops->set_irq(hwif, 1); 975 hwif->tp_ops->set_irq(hwif, 1);
971 976
972 if (request_irq(hwif->irq, &ide_intr, sa, hwif->name, hwif)) 977 if (request_irq(hwif->irq, irq_handler, sa, hwif->name, hwif))
973 goto out_up; 978 goto out_up;
974 979
975 if (!hwif->rqsize) { 980 if (!hwif->rqsize) {
diff --git a/drivers/ide/ide-proc.c b/drivers/ide/ide-proc.c
index 1d8978b3314a..a7b9287ee0d4 100644
--- a/drivers/ide/ide-proc.c
+++ b/drivers/ide/ide-proc.c
@@ -231,7 +231,7 @@ static const struct ide_proc_devset ide_generic_settings[] = {
231 IDE_PROC_DEVSET(pio_mode, 0, 255), 231 IDE_PROC_DEVSET(pio_mode, 0, 255),
232 IDE_PROC_DEVSET(unmaskirq, 0, 1), 232 IDE_PROC_DEVSET(unmaskirq, 0, 1),
233 IDE_PROC_DEVSET(using_dma, 0, 1), 233 IDE_PROC_DEVSET(using_dma, 0, 1),
234 { 0 }, 234 { NULL },
235}; 235};
236 236
237static void proc_ide_settings_warn(void) 237static void proc_ide_settings_warn(void)
diff --git a/drivers/ide/ide-tape.c b/drivers/ide/ide-tape.c
index bb450a7608c2..4e6181c7bbda 100644
--- a/drivers/ide/ide-tape.c
+++ b/drivers/ide/ide-tape.c
@@ -2166,7 +2166,7 @@ static const struct ide_proc_devset idetape_settings[] = {
2166 __IDE_PROC_DEVSET(speed, 0, 0xffff, NULL, NULL), 2166 __IDE_PROC_DEVSET(speed, 0, 0xffff, NULL, NULL),
2167 __IDE_PROC_DEVSET(tdsc, IDETAPE_DSC_RW_MIN, IDETAPE_DSC_RW_MAX, 2167 __IDE_PROC_DEVSET(tdsc, IDETAPE_DSC_RW_MIN, IDETAPE_DSC_RW_MAX,
2168 mulf_tdsc, divf_tdsc), 2168 mulf_tdsc, divf_tdsc),
2169 { 0 }, 2169 { NULL },
2170}; 2170};
2171#endif 2171#endif
2172 2172
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c
index 9c50e6f1c236..34ce2703d29a 100644
--- a/drivers/mmc/core/mmc_ops.c
+++ b/drivers/mmc/core/mmc_ops.c
@@ -248,12 +248,15 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host,
248 248
249 sg_init_one(&sg, data_buf, len); 249 sg_init_one(&sg, data_buf, len);
250 250
251 /* 251 if (opcode == MMC_SEND_CSD || opcode == MMC_SEND_CID) {
252 * The spec states that CSR and CID accesses have a timeout 252 /*
253 * of 64 clock cycles. 253 * The spec states that CSR and CID accesses have a timeout
254 */ 254 * of 64 clock cycles.
255 data.timeout_ns = 0; 255 */
256 data.timeout_clks = 64; 256 data.timeout_ns = 0;
257 data.timeout_clks = 64;
258 } else
259 mmc_set_data_timeout(&data, card);
257 260
258 mmc_wait_for_req(host, &mrq); 261 mmc_wait_for_req(host, &mrq);
259 262
diff --git a/drivers/watchdog/gef_wdt.c b/drivers/watchdog/gef_wdt.c
index f0c2b7a1a175..734d9806a872 100644
--- a/drivers/watchdog/gef_wdt.c
+++ b/drivers/watchdog/gef_wdt.c
@@ -269,7 +269,7 @@ static int __devinit gef_wdt_probe(struct of_device *dev,
269 bus_clk = 133; /* in MHz */ 269 bus_clk = 133; /* in MHz */
270 270
271 freq = fsl_get_sys_freq(); 271 freq = fsl_get_sys_freq();
272 if (freq > 0) 272 if (freq != -1)
273 bus_clk = freq; 273 bus_clk = freq;
274 274
275 /* Map devices registers into memory */ 275 /* Map devices registers into memory */
diff --git a/drivers/watchdog/ks8695_wdt.c b/drivers/watchdog/ks8695_wdt.c
index 0b798fdaa378..74c92d384112 100644
--- a/drivers/watchdog/ks8695_wdt.c
+++ b/drivers/watchdog/ks8695_wdt.c
@@ -21,6 +21,7 @@
21#include <linux/watchdog.h> 21#include <linux/watchdog.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/uaccess.h> 23#include <linux/uaccess.h>
24#include <mach/timex.h>
24#include <mach/regs-timer.h> 25#include <mach/regs-timer.h>
25 26
26#define WDT_DEFAULT_TIME 5 /* seconds */ 27#define WDT_DEFAULT_TIME 5 /* seconds */
diff --git a/drivers/watchdog/orion5x_wdt.c b/drivers/watchdog/orion5x_wdt.c
index 14a339f58b6a..b64ae1a17832 100644
--- a/drivers/watchdog/orion5x_wdt.c
+++ b/drivers/watchdog/orion5x_wdt.c
@@ -29,6 +29,7 @@
29#define WDT_EN 0x0010 29#define WDT_EN 0x0010
30#define WDT_VAL (TIMER_VIRT_BASE + 0x0024) 30#define WDT_VAL (TIMER_VIRT_BASE + 0x0024)
31 31
32#define ORION5X_TCLK 166666667
32#define WDT_MAX_DURATION (0xffffffff / ORION5X_TCLK) 33#define WDT_MAX_DURATION (0xffffffff / ORION5X_TCLK)
33#define WDT_IN_USE 0 34#define WDT_IN_USE 0
34#define WDT_OK_TO_CLOSE 1 35#define WDT_OK_TO_CLOSE 1
diff --git a/drivers/watchdog/rc32434_wdt.c b/drivers/watchdog/rc32434_wdt.c
index 57027f4653ce..f3553fa40b17 100644
--- a/drivers/watchdog/rc32434_wdt.c
+++ b/drivers/watchdog/rc32434_wdt.c
@@ -34,104 +34,89 @@
34#include <asm/time.h> 34#include <asm/time.h>
35#include <asm/mach-rc32434/integ.h> 35#include <asm/mach-rc32434/integ.h>
36 36
37#define MAX_TIMEOUT 20 37#define VERSION "0.4"
38#define RC32434_WDT_INTERVAL (15 * HZ)
39
40#define VERSION "0.2"
41 38
42static struct { 39static struct {
43 struct completion stop;
44 int running;
45 struct timer_list timer;
46 int queue;
47 int default_ticks;
48 unsigned long inuse; 40 unsigned long inuse;
49} rc32434_wdt_device; 41} rc32434_wdt_device;
50 42
51static struct integ __iomem *wdt_reg; 43static struct integ __iomem *wdt_reg;
52static int ticks = 100 * HZ;
53 44
54static int expect_close; 45static int expect_close;
55static int timeout; 46
47/* Board internal clock speed in Hz,
48 * the watchdog timer ticks at. */
49extern unsigned int idt_cpu_freq;
50
51/* translate wtcompare value to seconds and vice versa */
52#define WTCOMP2SEC(x) (x / idt_cpu_freq)
53#define SEC2WTCOMP(x) (x * idt_cpu_freq)
54
55/* Use a default timeout of 20s. This should be
56 * safe for CPU clock speeds up to 400MHz, as
57 * ((2 ^ 32) - 1) / (400MHz / 2) = 21s. */
58#define WATCHDOG_TIMEOUT 20
59
60static int timeout = WATCHDOG_TIMEOUT;
56 61
57static int nowayout = WATCHDOG_NOWAYOUT; 62static int nowayout = WATCHDOG_NOWAYOUT;
58module_param(nowayout, int, 0); 63module_param(nowayout, int, 0);
59MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" 64MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
60 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 65 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
61 66
67/* apply or and nand masks to data read from addr and write back */
68#define SET_BITS(addr, or, nand) \
69 writel((readl(&addr) | or) & ~nand, &addr)
62 70
63static void rc32434_wdt_start(void) 71static void rc32434_wdt_start(void)
64{ 72{
65 u32 val; 73 u32 or, nand;
66
67 if (!rc32434_wdt_device.inuse) {
68 writel(0, &wdt_reg->wtcount);
69 74
70 val = RC32434_ERR_WRE; 75 /* zero the counter before enabling */
71 writel(readl(&wdt_reg->errcs) | val, &wdt_reg->errcs); 76 writel(0, &wdt_reg->wtcount);
72 77
73 val = RC32434_WTC_EN; 78 /* don't generate a non-maskable interrupt,
74 writel(readl(&wdt_reg->wtc) | val, &wdt_reg->wtc); 79 * do a warm reset instead */
75 } 80 nand = 1 << RC32434_ERR_WNE;
76 rc32434_wdt_device.running++; 81 or = 1 << RC32434_ERR_WRE;
77}
78 82
79static void rc32434_wdt_stop(void) 83 /* reset the ERRCS timeout bit in case it's set */
80{ 84 nand |= 1 << RC32434_ERR_WTO;
81 u32 val;
82 85
83 if (rc32434_wdt_device.running) { 86 SET_BITS(wdt_reg->errcs, or, nand);
84 87
85 val = ~RC32434_WTC_EN; 88 /* reset WTC timeout bit and enable WDT */
86 writel(readl(&wdt_reg->wtc) & val, &wdt_reg->wtc); 89 nand = 1 << RC32434_WTC_TO;
90 or = 1 << RC32434_WTC_EN;
87 91
88 val = ~RC32434_ERR_WRE; 92 SET_BITS(wdt_reg->wtc, or, nand);
89 writel(readl(&wdt_reg->errcs) & val, &wdt_reg->errcs); 93}
90 94
91 rc32434_wdt_device.running = 0; 95static void rc32434_wdt_stop(void)
92 } 96{
97 /* Disable WDT */
98 SET_BITS(wdt_reg->wtc, 0, 1 << RC32434_WTC_EN);
93} 99}
94 100
95static void rc32434_wdt_set(int new_timeout) 101static int rc32434_wdt_set(int new_timeout)
96{ 102{
97 u32 cmp = new_timeout * HZ; 103 int max_to = WTCOMP2SEC((u32)-1);
98 u32 state, val;
99 104
105 if (new_timeout < 0 || new_timeout > max_to) {
106 printk(KERN_ERR KBUILD_MODNAME
107 ": timeout value must be between 0 and %d",
108 max_to);
109 return -EINVAL;
110 }
100 timeout = new_timeout; 111 timeout = new_timeout;
101 /* 112 writel(SEC2WTCOMP(timeout), &wdt_reg->wtcompare);
102 * store and disable WTC
103 */
104 state = (u32)(readl(&wdt_reg->wtc) & RC32434_WTC_EN);
105 val = ~RC32434_WTC_EN;
106 writel(readl(&wdt_reg->wtc) & val, &wdt_reg->wtc);
107
108 writel(0, &wdt_reg->wtcount);
109 writel(cmp, &wdt_reg->wtcompare);
110
111 /*
112 * restore WTC
113 */
114
115 writel(readl(&wdt_reg->wtc) | state, &wdt_reg);
116}
117 113
118static void rc32434_wdt_reset(void) 114 return 0;
119{
120 ticks = rc32434_wdt_device.default_ticks;
121} 115}
122 116
123static void rc32434_wdt_update(unsigned long unused) 117static void rc32434_wdt_ping(void)
124{ 118{
125 if (rc32434_wdt_device.running)
126 ticks--;
127
128 writel(0, &wdt_reg->wtcount); 119 writel(0, &wdt_reg->wtcount);
129
130 if (rc32434_wdt_device.queue && ticks)
131 mod_timer(&rc32434_wdt_device.timer,
132 jiffies + RC32434_WDT_INTERVAL);
133 else
134 complete(&rc32434_wdt_device.stop);
135} 120}
136 121
137static int rc32434_wdt_open(struct inode *inode, struct file *file) 122static int rc32434_wdt_open(struct inode *inode, struct file *file)
@@ -142,19 +127,23 @@ static int rc32434_wdt_open(struct inode *inode, struct file *file)
142 if (nowayout) 127 if (nowayout)
143 __module_get(THIS_MODULE); 128 __module_get(THIS_MODULE);
144 129
130 rc32434_wdt_start();
131 rc32434_wdt_ping();
132
145 return nonseekable_open(inode, file); 133 return nonseekable_open(inode, file);
146} 134}
147 135
148static int rc32434_wdt_release(struct inode *inode, struct file *file) 136static int rc32434_wdt_release(struct inode *inode, struct file *file)
149{ 137{
150 if (expect_close && nowayout == 0) { 138 if (expect_close == 42) {
151 rc32434_wdt_stop(); 139 rc32434_wdt_stop();
152 printk(KERN_INFO KBUILD_MODNAME ": disabling watchdog timer\n"); 140 printk(KERN_INFO KBUILD_MODNAME ": disabling watchdog timer\n");
153 module_put(THIS_MODULE); 141 module_put(THIS_MODULE);
154 } else 142 } else {
155 printk(KERN_CRIT KBUILD_MODNAME 143 printk(KERN_CRIT KBUILD_MODNAME
156 ": device closed unexpectedly. WDT will not stop !\n"); 144 ": device closed unexpectedly. WDT will not stop !\n");
157 145 rc32434_wdt_ping();
146 }
158 clear_bit(0, &rc32434_wdt_device.inuse); 147 clear_bit(0, &rc32434_wdt_device.inuse);
159 return 0; 148 return 0;
160} 149}
@@ -174,10 +163,10 @@ static ssize_t rc32434_wdt_write(struct file *file, const char *data,
174 if (get_user(c, data + i)) 163 if (get_user(c, data + i))
175 return -EFAULT; 164 return -EFAULT;
176 if (c == 'V') 165 if (c == 'V')
177 expect_close = 1; 166 expect_close = 42;
178 } 167 }
179 } 168 }
180 rc32434_wdt_update(0); 169 rc32434_wdt_ping();
181 return len; 170 return len;
182 } 171 }
183 return 0; 172 return 0;
@@ -197,11 +186,11 @@ static long rc32434_wdt_ioctl(struct file *file, unsigned int cmd,
197 }; 186 };
198 switch (cmd) { 187 switch (cmd) {
199 case WDIOC_KEEPALIVE: 188 case WDIOC_KEEPALIVE:
200 rc32434_wdt_reset(); 189 rc32434_wdt_ping();
201 break; 190 break;
202 case WDIOC_GETSTATUS: 191 case WDIOC_GETSTATUS:
203 case WDIOC_GETBOOTSTATUS: 192 case WDIOC_GETBOOTSTATUS:
204 value = readl(&wdt_reg->wtcount); 193 value = 0;
205 if (copy_to_user(argp, &value, sizeof(int))) 194 if (copy_to_user(argp, &value, sizeof(int)))
206 return -EFAULT; 195 return -EFAULT;
207 break; 196 break;
@@ -218,6 +207,7 @@ static long rc32434_wdt_ioctl(struct file *file, unsigned int cmd,
218 break; 207 break;
219 case WDIOS_DISABLECARD: 208 case WDIOS_DISABLECARD:
220 rc32434_wdt_stop(); 209 rc32434_wdt_stop();
210 break;
221 default: 211 default:
222 return -EINVAL; 212 return -EINVAL;
223 } 213 }
@@ -225,11 +215,9 @@ static long rc32434_wdt_ioctl(struct file *file, unsigned int cmd,
225 case WDIOC_SETTIMEOUT: 215 case WDIOC_SETTIMEOUT:
226 if (copy_from_user(&new_timeout, argp, sizeof(int))) 216 if (copy_from_user(&new_timeout, argp, sizeof(int)))
227 return -EFAULT; 217 return -EFAULT;
228 if (new_timeout < 1) 218 if (rc32434_wdt_set(new_timeout))
229 return -EINVAL; 219 return -EINVAL;
230 if (new_timeout > MAX_TIMEOUT) 220 /* Fall through */
231 return -EINVAL;
232 rc32434_wdt_set(new_timeout);
233 case WDIOC_GETTIMEOUT: 221 case WDIOC_GETTIMEOUT:
234 return copy_to_user(argp, &timeout, sizeof(int)); 222 return copy_to_user(argp, &timeout, sizeof(int));
235 default: 223 default:
@@ -254,15 +242,15 @@ static struct miscdevice rc32434_wdt_miscdev = {
254 .fops = &rc32434_wdt_fops, 242 .fops = &rc32434_wdt_fops,
255}; 243};
256 244
257static char banner[] = KERN_INFO KBUILD_MODNAME 245static char banner[] __devinitdata = KERN_INFO KBUILD_MODNAME
258 ": Watchdog Timer version " VERSION ", timer margin: %d sec\n"; 246 ": Watchdog Timer version " VERSION ", timer margin: %d sec\n";
259 247
260static int rc32434_wdt_probe(struct platform_device *pdev) 248static int __devinit rc32434_wdt_probe(struct platform_device *pdev)
261{ 249{
262 int ret; 250 int ret;
263 struct resource *r; 251 struct resource *r;
264 252
265 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rb500_wdt_res"); 253 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rb532_wdt_res");
266 if (!r) { 254 if (!r) {
267 printk(KERN_ERR KBUILD_MODNAME 255 printk(KERN_ERR KBUILD_MODNAME
268 "failed to retrieve resources\n"); 256 "failed to retrieve resources\n");
@@ -277,24 +265,12 @@ static int rc32434_wdt_probe(struct platform_device *pdev)
277 } 265 }
278 266
279 ret = misc_register(&rc32434_wdt_miscdev); 267 ret = misc_register(&rc32434_wdt_miscdev);
280
281 if (ret < 0) { 268 if (ret < 0) {
282 printk(KERN_ERR KBUILD_MODNAME 269 printk(KERN_ERR KBUILD_MODNAME
283 "failed to register watchdog device\n"); 270 "failed to register watchdog device\n");
284 goto unmap; 271 goto unmap;
285 } 272 }
286 273
287 init_completion(&rc32434_wdt_device.stop);
288 rc32434_wdt_device.queue = 0;
289
290 clear_bit(0, &rc32434_wdt_device.inuse);
291
292 setup_timer(&rc32434_wdt_device.timer, rc32434_wdt_update, 0L);
293
294 rc32434_wdt_device.default_ticks = ticks;
295
296 rc32434_wdt_start();
297
298 printk(banner, timeout); 274 printk(banner, timeout);
299 275
300 return 0; 276 return 0;
@@ -304,23 +280,17 @@ unmap:
304 return ret; 280 return ret;
305} 281}
306 282
307static int rc32434_wdt_remove(struct platform_device *pdev) 283static int __devexit rc32434_wdt_remove(struct platform_device *pdev)
308{ 284{
309 if (rc32434_wdt_device.queue) {
310 rc32434_wdt_device.queue = 0;
311 wait_for_completion(&rc32434_wdt_device.stop);
312 }
313 misc_deregister(&rc32434_wdt_miscdev); 285 misc_deregister(&rc32434_wdt_miscdev);
314
315 iounmap(wdt_reg); 286 iounmap(wdt_reg);
316
317 return 0; 287 return 0;
318} 288}
319 289
320static struct platform_driver rc32434_wdt = { 290static struct platform_driver rc32434_wdt = {
321 .probe = rc32434_wdt_probe, 291 .probe = rc32434_wdt_probe,
322 .remove = rc32434_wdt_remove, 292 .remove = __devexit_p(rc32434_wdt_remove),
323 .driver = { 293 .driver = {
324 .name = "rc32434_wdt", 294 .name = "rc32434_wdt",
325 } 295 }
326}; 296};
diff --git a/fs/ext4/ialloc.c b/fs/ext4/ialloc.c
index f18a919be70b..627f8c3337a3 100644
--- a/fs/ext4/ialloc.c
+++ b/fs/ext4/ialloc.c
@@ -188,7 +188,7 @@ void ext4_free_inode(handle_t *handle, struct inode *inode)
188 struct ext4_group_desc *gdp; 188 struct ext4_group_desc *gdp;
189 struct ext4_super_block *es; 189 struct ext4_super_block *es;
190 struct ext4_sb_info *sbi; 190 struct ext4_sb_info *sbi;
191 int fatal = 0, err, count; 191 int fatal = 0, err, count, cleared;
192 ext4_group_t flex_group; 192 ext4_group_t flex_group;
193 193
194 if (atomic_read(&inode->i_count) > 1) { 194 if (atomic_read(&inode->i_count) > 1) {
@@ -248,8 +248,10 @@ void ext4_free_inode(handle_t *handle, struct inode *inode)
248 goto error_return; 248 goto error_return;
249 249
250 /* Ok, now we can actually update the inode bitmaps.. */ 250 /* Ok, now we can actually update the inode bitmaps.. */
251 if (!ext4_clear_bit_atomic(sb_bgl_lock(sbi, block_group), 251 spin_lock(sb_bgl_lock(sbi, block_group));
252 bit, bitmap_bh->b_data)) 252 cleared = ext4_clear_bit(bit, bitmap_bh->b_data);
253 spin_unlock(sb_bgl_lock(sbi, block_group));
254 if (!cleared)
253 ext4_error(sb, "ext4_free_inode", 255 ext4_error(sb, "ext4_free_inode",
254 "bit already cleared for inode %lu", ino); 256 "bit already cleared for inode %lu", ino);
255 else { 257 else {
diff --git a/fs/squashfs/block.c b/fs/squashfs/block.c
index c837dfc2b3c6..321728f48f2d 100644
--- a/fs/squashfs/block.c
+++ b/fs/squashfs/block.c
@@ -80,7 +80,7 @@ static struct buffer_head *get_block_length(struct super_block *sb,
80 * generated a larger block - this does occasionally happen with zlib). 80 * generated a larger block - this does occasionally happen with zlib).
81 */ 81 */
82int squashfs_read_data(struct super_block *sb, void **buffer, u64 index, 82int squashfs_read_data(struct super_block *sb, void **buffer, u64 index,
83 int length, u64 *next_index, int srclength) 83 int length, u64 *next_index, int srclength, int pages)
84{ 84{
85 struct squashfs_sb_info *msblk = sb->s_fs_info; 85 struct squashfs_sb_info *msblk = sb->s_fs_info;
86 struct buffer_head **bh; 86 struct buffer_head **bh;
@@ -185,6 +185,14 @@ int squashfs_read_data(struct super_block *sb, void **buffer, u64 index,
185 } 185 }
186 186
187 if (msblk->stream.avail_out == 0) { 187 if (msblk->stream.avail_out == 0) {
188 if (page == pages) {
189 ERROR("zlib_inflate tried to "
190 "decompress too much data, "
191 "expected %d bytes. Zlib "
192 "data probably corrupt\n",
193 srclength);
194 goto release_mutex;
195 }
188 msblk->stream.next_out = buffer[page++]; 196 msblk->stream.next_out = buffer[page++];
189 msblk->stream.avail_out = PAGE_CACHE_SIZE; 197 msblk->stream.avail_out = PAGE_CACHE_SIZE;
190 } 198 }
@@ -268,7 +276,8 @@ block_release:
268 put_bh(bh[k]); 276 put_bh(bh[k]);
269 277
270read_failure: 278read_failure:
271 ERROR("sb_bread failed reading block 0x%llx\n", cur_index); 279 ERROR("squashfs_read_data failed to read block 0x%llx\n",
280 (unsigned long long) index);
272 kfree(bh); 281 kfree(bh);
273 return -EIO; 282 return -EIO;
274} 283}
diff --git a/fs/squashfs/cache.c b/fs/squashfs/cache.c
index f29eda16d25e..1c4739e33af6 100644
--- a/fs/squashfs/cache.c
+++ b/fs/squashfs/cache.c
@@ -119,7 +119,7 @@ struct squashfs_cache_entry *squashfs_cache_get(struct super_block *sb,
119 119
120 entry->length = squashfs_read_data(sb, entry->data, 120 entry->length = squashfs_read_data(sb, entry->data,
121 block, length, &entry->next_index, 121 block, length, &entry->next_index,
122 cache->block_size); 122 cache->block_size, cache->pages);
123 123
124 spin_lock(&cache->lock); 124 spin_lock(&cache->lock);
125 125
@@ -406,7 +406,7 @@ int squashfs_read_table(struct super_block *sb, void *buffer, u64 block,
406 for (i = 0; i < pages; i++, buffer += PAGE_CACHE_SIZE) 406 for (i = 0; i < pages; i++, buffer += PAGE_CACHE_SIZE)
407 data[i] = buffer; 407 data[i] = buffer;
408 res = squashfs_read_data(sb, data, block, length | 408 res = squashfs_read_data(sb, data, block, length |
409 SQUASHFS_COMPRESSED_BIT_BLOCK, NULL, length); 409 SQUASHFS_COMPRESSED_BIT_BLOCK, NULL, length, pages);
410 kfree(data); 410 kfree(data);
411 return res; 411 return res;
412} 412}
diff --git a/fs/squashfs/inode.c b/fs/squashfs/inode.c
index 7a63398bb855..9101dbde39ec 100644
--- a/fs/squashfs/inode.c
+++ b/fs/squashfs/inode.c
@@ -133,7 +133,8 @@ int squashfs_read_inode(struct inode *inode, long long ino)
133 type = le16_to_cpu(sqshb_ino->inode_type); 133 type = le16_to_cpu(sqshb_ino->inode_type);
134 switch (type) { 134 switch (type) {
135 case SQUASHFS_REG_TYPE: { 135 case SQUASHFS_REG_TYPE: {
136 unsigned int frag_offset, frag_size, frag; 136 unsigned int frag_offset, frag;
137 int frag_size;
137 u64 frag_blk; 138 u64 frag_blk;
138 struct squashfs_reg_inode *sqsh_ino = &squashfs_ino.reg; 139 struct squashfs_reg_inode *sqsh_ino = &squashfs_ino.reg;
139 140
@@ -175,7 +176,8 @@ int squashfs_read_inode(struct inode *inode, long long ino)
175 break; 176 break;
176 } 177 }
177 case SQUASHFS_LREG_TYPE: { 178 case SQUASHFS_LREG_TYPE: {
178 unsigned int frag_offset, frag_size, frag; 179 unsigned int frag_offset, frag;
180 int frag_size;
179 u64 frag_blk; 181 u64 frag_blk;
180 struct squashfs_lreg_inode *sqsh_ino = &squashfs_ino.lreg; 182 struct squashfs_lreg_inode *sqsh_ino = &squashfs_ino.lreg;
181 183
diff --git a/fs/squashfs/squashfs.h b/fs/squashfs/squashfs.h
index 6b2515d027d5..0e9feb6adf7e 100644
--- a/fs/squashfs/squashfs.h
+++ b/fs/squashfs/squashfs.h
@@ -34,7 +34,7 @@ static inline struct squashfs_inode_info *squashfs_i(struct inode *inode)
34 34
35/* block.c */ 35/* block.c */
36extern int squashfs_read_data(struct super_block *, void **, u64, int, u64 *, 36extern int squashfs_read_data(struct super_block *, void **, u64, int, u64 *,
37 int); 37 int, int);
38 38
39/* cache.c */ 39/* cache.c */
40extern struct squashfs_cache *squashfs_cache_init(char *, int, int); 40extern struct squashfs_cache *squashfs_cache_init(char *, int, int);
diff --git a/fs/squashfs/super.c b/fs/squashfs/super.c
index 071df5b5b491..681ec0d83799 100644
--- a/fs/squashfs/super.c
+++ b/fs/squashfs/super.c
@@ -389,7 +389,7 @@ static int __init init_squashfs_fs(void)
389 return err; 389 return err;
390 } 390 }
391 391
392 printk(KERN_INFO "squashfs: version 4.0 (2009/01/03) " 392 printk(KERN_INFO "squashfs: version 4.0 (2009/01/31) "
393 "Phillip Lougher\n"); 393 "Phillip Lougher\n");
394 394
395 return 0; 395 return 0;
diff --git a/include/linux/ata.h b/include/linux/ata.h
index 08a86d5cdf1b..9a061accd8b8 100644
--- a/include/linux/ata.h
+++ b/include/linux/ata.h
@@ -89,6 +89,8 @@ enum {
89 ATA_ID_DLF = 128, 89 ATA_ID_DLF = 128,
90 ATA_ID_CSFO = 129, 90 ATA_ID_CSFO = 129,
91 ATA_ID_CFA_POWER = 160, 91 ATA_ID_CFA_POWER = 160,
92 ATA_ID_CFA_KEY_MGMT = 162,
93 ATA_ID_CFA_MODES = 163,
92 ATA_ID_ROT_SPEED = 217, 94 ATA_ID_ROT_SPEED = 217,
93 ATA_ID_PIO4 = (1 << 1), 95 ATA_ID_PIO4 = (1 << 1),
94 96
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index f0413845f20e..1956c8d46d32 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -97,7 +97,6 @@ typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t;
97 97
98/** 98/**
99 * struct dma_chan_percpu - the per-CPU part of struct dma_chan 99 * struct dma_chan_percpu - the per-CPU part of struct dma_chan
100 * @refcount: local_t used for open-coded "bigref" counting
101 * @memcpy_count: transaction counter 100 * @memcpy_count: transaction counter
102 * @bytes_transferred: byte counter 101 * @bytes_transferred: byte counter
103 */ 102 */
@@ -114,9 +113,6 @@ struct dma_chan_percpu {
114 * @cookie: last cookie value returned to client 113 * @cookie: last cookie value returned to client
115 * @chan_id: channel ID for sysfs 114 * @chan_id: channel ID for sysfs
116 * @dev: class device for sysfs 115 * @dev: class device for sysfs
117 * @refcount: kref, used in "bigref" slow-mode
118 * @slow_ref: indicates that the DMA channel is free
119 * @rcu: the DMA channel's RCU head
120 * @device_node: used to add this to the device chan list 116 * @device_node: used to add this to the device chan list
121 * @local: per-cpu pointer to a struct dma_chan_percpu 117 * @local: per-cpu pointer to a struct dma_chan_percpu
122 * @client-count: how many clients are using this channel 118 * @client-count: how many clients are using this channel
@@ -213,8 +209,6 @@ struct dma_async_tx_descriptor {
213 * @global_node: list_head for global dma_device_list 209 * @global_node: list_head for global dma_device_list
214 * @cap_mask: one or more dma_capability flags 210 * @cap_mask: one or more dma_capability flags
215 * @max_xor: maximum number of xor sources, 0 if no capability 211 * @max_xor: maximum number of xor sources, 0 if no capability
216 * @refcount: reference count
217 * @done: IO completion struct
218 * @dev_id: unique device ID 212 * @dev_id: unique device ID
219 * @dev: struct device reference for dma mapping api 213 * @dev: struct device reference for dma mapping api
220 * @device_alloc_chan_resources: allocate resources and return the 214 * @device_alloc_chan_resources: allocate resources and return the
@@ -227,6 +221,7 @@ struct dma_async_tx_descriptor {
227 * @device_prep_dma_interrupt: prepares an end of chain interrupt operation 221 * @device_prep_dma_interrupt: prepares an end of chain interrupt operation
228 * @device_prep_slave_sg: prepares a slave dma operation 222 * @device_prep_slave_sg: prepares a slave dma operation
229 * @device_terminate_all: terminate all pending operations 223 * @device_terminate_all: terminate all pending operations
224 * @device_is_tx_complete: poll for transaction completion
230 * @device_issue_pending: push pending transactions to hardware 225 * @device_issue_pending: push pending transactions to hardware
231 */ 226 */
232struct dma_device { 227struct dma_device {
diff --git a/include/linux/hdreg.h b/include/linux/hdreg.h
index c37e9241fae7..ed21bd3dbd25 100644
--- a/include/linux/hdreg.h
+++ b/include/linux/hdreg.h
@@ -511,7 +511,6 @@ struct hd_driveid {
511 unsigned short words69_70[2]; /* reserved words 69-70 511 unsigned short words69_70[2]; /* reserved words 69-70
512 * future command overlap and queuing 512 * future command overlap and queuing
513 */ 513 */
514 /* HDIO_GET_IDENTITY currently returns only words 0 through 70 */
515 unsigned short words71_74[4]; /* reserved words 71-74 514 unsigned short words71_74[4]; /* reserved words 71-74
516 * for IDENTIFY PACKET DEVICE command 515 * for IDENTIFY PACKET DEVICE command
517 */ 516 */
diff --git a/include/linux/ide.h b/include/linux/ide.h
index fe235b65207e..e0cedfe9fad4 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -866,6 +866,7 @@ struct ide_host {
866 unsigned int n_ports; 866 unsigned int n_ports;
867 struct device *dev[2]; 867 struct device *dev[2];
868 unsigned int (*init_chipset)(struct pci_dev *); 868 unsigned int (*init_chipset)(struct pci_dev *);
869 irq_handler_t irq_handler;
869 unsigned long host_flags; 870 unsigned long host_flags;
870 void *host_priv; 871 void *host_priv;
871 ide_hwif_t *cur_port; /* for hosts requiring serialization */ 872 ide_hwif_t *cur_port; /* for hosts requiring serialization */
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 5d87bc09a1f5..dc18b87ed722 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -275,7 +275,7 @@ enum {
275 * advised to wait only for the following duration before 275 * advised to wait only for the following duration before
276 * doing SRST. 276 * doing SRST.
277 */ 277 */
278 ATA_TMOUT_PMP_SRST_WAIT = 1000, 278 ATA_TMOUT_PMP_SRST_WAIT = 5000,
279 279
280 /* ATA bus states */ 280 /* ATA bus states */
281 BUS_UNKNOWN = 0, 281 BUS_UNKNOWN = 0,
@@ -530,6 +530,7 @@ struct ata_queued_cmd {
530 unsigned long flags; /* ATA_QCFLAG_xxx */ 530 unsigned long flags; /* ATA_QCFLAG_xxx */
531 unsigned int tag; 531 unsigned int tag;
532 unsigned int n_elem; 532 unsigned int n_elem;
533 unsigned int orig_n_elem;
533 534
534 int dma_dir; 535 int dma_dir;
535 536
@@ -750,7 +751,8 @@ struct ata_port {
750 acpi_handle acpi_handle; 751 acpi_handle acpi_handle;
751 struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */ 752 struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */
752#endif 753#endif
753 u8 sector_buf[ATA_SECT_SIZE]; /* owned by EH */ 754 /* owned by EH */
755 u8 sector_buf[ATA_SECT_SIZE] ____cacheline_aligned;
754}; 756};
755 757
756/* The following initializer overrides a method to NULL whether one of 758/* The following initializer overrides a method to NULL whether one of
diff --git a/include/linux/percpu.h b/include/linux/percpu.h
index 545b068bcb70..54a968b4b924 100644
--- a/include/linux/percpu.h
+++ b/include/linux/percpu.h
@@ -5,6 +5,7 @@
5#include <linux/slab.h> /* For kmalloc() */ 5#include <linux/slab.h> /* For kmalloc() */
6#include <linux/smp.h> 6#include <linux/smp.h>
7#include <linux/cpumask.h> 7#include <linux/cpumask.h>
8#include <linux/pfn.h>
8 9
9#include <asm/percpu.h> 10#include <asm/percpu.h>
10 11
@@ -52,17 +53,18 @@
52#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var) 53#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var)
53#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var) 54#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var)
54 55
55/* Enough to cover all DEFINE_PER_CPUs in kernel, including modules. */ 56/* enough to cover all DEFINE_PER_CPUs in modules */
56#ifndef PERCPU_ENOUGH_ROOM
57#ifdef CONFIG_MODULES 57#ifdef CONFIG_MODULES
58#define PERCPU_MODULE_RESERVE 8192 58#define PERCPU_MODULE_RESERVE (8 << 10)
59#else 59#else
60#define PERCPU_MODULE_RESERVE 0 60#define PERCPU_MODULE_RESERVE 0
61#endif 61#endif
62 62
63#ifndef PERCPU_ENOUGH_ROOM
63#define PERCPU_ENOUGH_ROOM \ 64#define PERCPU_ENOUGH_ROOM \
64 (__per_cpu_end - __per_cpu_start + PERCPU_MODULE_RESERVE) 65 (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
65#endif /* PERCPU_ENOUGH_ROOM */ 66 PERCPU_MODULE_RESERVE)
67#endif
66 68
67/* 69/*
68 * Must be an lvalue. Since @var must be a simple identifier, 70 * Must be an lvalue. Since @var must be a simple identifier,
@@ -79,35 +81,24 @@
79#ifdef CONFIG_HAVE_DYNAMIC_PER_CPU_AREA 81#ifdef CONFIG_HAVE_DYNAMIC_PER_CPU_AREA
80 82
81/* minimum unit size, also is the maximum supported allocation size */ 83/* minimum unit size, also is the maximum supported allocation size */
82#define PCPU_MIN_UNIT_SIZE (16UL << PAGE_SHIFT) 84#define PCPU_MIN_UNIT_SIZE PFN_ALIGN(64 << 10)
83 85
84/* 86/*
85 * PERCPU_DYNAMIC_RESERVE indicates the amount of free area to piggy 87 * PERCPU_DYNAMIC_RESERVE indicates the amount of free area to piggy
86 * back on the first chunk if arch is manually allocating and mapping 88 * back on the first chunk for dynamic percpu allocation if arch is
87 * it for faster access (as a part of large page mapping for example). 89 * manually allocating and mapping it for faster access (as a part of
88 * Note that dynamic percpu allocator covers both static and dynamic 90 * large page mapping for example).
89 * areas, so these values are bigger than PERCPU_MODULE_RESERVE.
90 * 91 *
91 * On typical configuration with modules, the following values leave 92 * The following values give between one and two pages of free space
92 * about 8k of free space on the first chunk after boot on both x86_32 93 * after typical minimal boot (2-way SMP, single disk and NIC) with
93 * and 64 when module support is enabled. When module support is 94 * both defconfig and a distro config on x86_64 and 32. More
94 * disabled, it's much tighter. 95 * intelligent way to determine this would be nice.
95 */ 96 */
96#ifndef PERCPU_DYNAMIC_RESERVE 97#if BITS_PER_LONG > 32
97# if BITS_PER_LONG > 32 98#define PERCPU_DYNAMIC_RESERVE (20 << 10)
98# ifdef CONFIG_MODULES 99#else
99# define PERCPU_DYNAMIC_RESERVE (6 << PAGE_SHIFT) 100#define PERCPU_DYNAMIC_RESERVE (12 << 10)
100# else 101#endif
101# define PERCPU_DYNAMIC_RESERVE (4 << PAGE_SHIFT)
102# endif
103# else
104# ifdef CONFIG_MODULES
105# define PERCPU_DYNAMIC_RESERVE (4 << PAGE_SHIFT)
106# else
107# define PERCPU_DYNAMIC_RESERVE (2 << PAGE_SHIFT)
108# endif
109# endif
110#endif /* PERCPU_DYNAMIC_RESERVE */
111 102
112extern void *pcpu_base_addr; 103extern void *pcpu_base_addr;
113 104
@@ -115,9 +106,10 @@ typedef struct page * (*pcpu_get_page_fn_t)(unsigned int cpu, int pageno);
115typedef void (*pcpu_populate_pte_fn_t)(unsigned long addr); 106typedef void (*pcpu_populate_pte_fn_t)(unsigned long addr);
116 107
117extern size_t __init pcpu_setup_first_chunk(pcpu_get_page_fn_t get_page_fn, 108extern size_t __init pcpu_setup_first_chunk(pcpu_get_page_fn_t get_page_fn,
118 size_t static_size, size_t unit_size, 109 size_t static_size, size_t reserved_size,
119 size_t free_size, void *base_addr, 110 ssize_t unit_size, ssize_t dyn_size,
120 pcpu_populate_pte_fn_t populate_pte_fn); 111 void *base_addr,
112 pcpu_populate_pte_fn_t populate_pte_fn);
121 113
122/* 114/*
123 * Use this to get to a cpu's version of the per-cpu object 115 * Use this to get to a cpu's version of the per-cpu object
@@ -126,6 +118,8 @@ extern size_t __init pcpu_setup_first_chunk(pcpu_get_page_fn_t get_page_fn,
126 */ 118 */
127#define per_cpu_ptr(ptr, cpu) SHIFT_PERCPU_PTR((ptr), per_cpu_offset((cpu))) 119#define per_cpu_ptr(ptr, cpu) SHIFT_PERCPU_PTR((ptr), per_cpu_offset((cpu)))
128 120
121extern void *__alloc_reserved_percpu(size_t size, size_t align);
122
129#else /* CONFIG_HAVE_DYNAMIC_PER_CPU_AREA */ 123#else /* CONFIG_HAVE_DYNAMIC_PER_CPU_AREA */
130 124
131struct percpu_data { 125struct percpu_data {
diff --git a/include/linux/serio.h b/include/linux/serio.h
index 1bcb357a01a1..e0417e4d3f15 100644
--- a/include/linux/serio.h
+++ b/include/linux/serio.h
@@ -212,7 +212,7 @@ static inline void serio_unpin_driver(struct serio *serio)
212#define SERIO_FUJITSU 0x35 212#define SERIO_FUJITSU 0x35
213#define SERIO_ZHENHUA 0x36 213#define SERIO_ZHENHUA 0x36
214#define SERIO_INEXIO 0x37 214#define SERIO_INEXIO 0x37
215#define SERIO_TOUCHIT213 0x37 215#define SERIO_TOUCHIT213 0x38
216#define SERIO_W8001 0x39 216#define SERIO_W8001 0x39
217 217
218#endif 218#endif
diff --git a/kernel/module.c b/kernel/module.c
index 1f0657ae555b..f0e04d6b67d8 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -381,7 +381,7 @@ static void *percpu_modalloc(unsigned long size, unsigned long align,
381 align = PAGE_SIZE; 381 align = PAGE_SIZE;
382 } 382 }
383 383
384 ptr = __alloc_percpu(size, align); 384 ptr = __alloc_reserved_percpu(size, align);
385 if (!ptr) 385 if (!ptr)
386 printk(KERN_WARNING 386 printk(KERN_WARNING
387 "Could not allocate %lu bytes percpu data\n", size); 387 "Could not allocate %lu bytes percpu data\n", size);
diff --git a/kernel/softirq.c b/kernel/softirq.c
index 0365b4899a3d..57d3f67f6f38 100644
--- a/kernel/softirq.c
+++ b/kernel/softirq.c
@@ -626,6 +626,7 @@ static int ksoftirqd(void * __bind_cpu)
626 preempt_enable_no_resched(); 626 preempt_enable_no_resched();
627 cond_resched(); 627 cond_resched();
628 preempt_disable(); 628 preempt_disable();
629 rcu_qsctr_inc((long)__bind_cpu);
629 } 630 }
630 preempt_enable(); 631 preempt_enable();
631 set_current_state(TASK_INTERRUPTIBLE); 632 set_current_state(TASK_INTERRUPTIBLE);
diff --git a/mm/percpu.c b/mm/percpu.c
index 3d0f5456827c..bfe6a3afaf45 100644
--- a/mm/percpu.c
+++ b/mm/percpu.c
@@ -62,7 +62,9 @@
62#include <linux/pfn.h> 62#include <linux/pfn.h>
63#include <linux/rbtree.h> 63#include <linux/rbtree.h>
64#include <linux/slab.h> 64#include <linux/slab.h>
65#include <linux/spinlock.h>
65#include <linux/vmalloc.h> 66#include <linux/vmalloc.h>
67#include <linux/workqueue.h>
66 68
67#include <asm/cacheflush.h> 69#include <asm/cacheflush.h>
68#include <asm/tlbflush.h> 70#include <asm/tlbflush.h>
@@ -80,7 +82,8 @@ struct pcpu_chunk {
80 int map_alloc; /* # of map entries allocated */ 82 int map_alloc; /* # of map entries allocated */
81 int *map; /* allocation map */ 83 int *map; /* allocation map */
82 bool immutable; /* no [de]population allowed */ 84 bool immutable; /* no [de]population allowed */
83 struct page *page[]; /* #cpus * UNIT_PAGES */ 85 struct page **page; /* points to page array */
86 struct page *page_ar[]; /* #cpus * UNIT_PAGES */
84}; 87};
85 88
86static int pcpu_unit_pages __read_mostly; 89static int pcpu_unit_pages __read_mostly;
@@ -93,28 +96,42 @@ static size_t pcpu_chunk_struct_size __read_mostly;
93void *pcpu_base_addr __read_mostly; 96void *pcpu_base_addr __read_mostly;
94EXPORT_SYMBOL_GPL(pcpu_base_addr); 97EXPORT_SYMBOL_GPL(pcpu_base_addr);
95 98
96/* the size of kernel static area */ 99/* optional reserved chunk, only accessible for reserved allocations */
97static int pcpu_static_size __read_mostly; 100static struct pcpu_chunk *pcpu_reserved_chunk;
101/* offset limit of the reserved chunk */
102static int pcpu_reserved_chunk_limit;
98 103
99/* 104/*
100 * One mutex to rule them all. 105 * Synchronization rules.
101 * 106 *
102 * The following mutex is grabbed in the outermost public alloc/free 107 * There are two locks - pcpu_alloc_mutex and pcpu_lock. The former
103 * interface functions and released only when the operation is 108 * protects allocation/reclaim paths, chunks and chunk->page arrays.
104 * complete. As such, every function in this file other than the 109 * The latter is a spinlock and protects the index data structures -
105 * outermost functions are called under pcpu_mutex. 110 * chunk slots, rbtree, chunks and area maps in chunks.
106 * 111 *
107 * It can easily be switched to use spinlock such that only the area 112 * During allocation, pcpu_alloc_mutex is kept locked all the time and
108 * allocation and page population commit are protected with it doing 113 * pcpu_lock is grabbed and released as necessary. All actual memory
109 * actual [de]allocation without holding any lock. However, given 114 * allocations are done using GFP_KERNEL with pcpu_lock released.
110 * what this allocator does, I think it's better to let them run 115 *
111 * sequentially. 116 * Free path accesses and alters only the index data structures, so it
117 * can be safely called from atomic context. When memory needs to be
118 * returned to the system, free path schedules reclaim_work which
119 * grabs both pcpu_alloc_mutex and pcpu_lock, unlinks chunks to be
120 * reclaimed, release both locks and frees the chunks. Note that it's
121 * necessary to grab both locks to remove a chunk from circulation as
122 * allocation path might be referencing the chunk with only
123 * pcpu_alloc_mutex locked.
112 */ 124 */
113static DEFINE_MUTEX(pcpu_mutex); 125static DEFINE_MUTEX(pcpu_alloc_mutex); /* protects whole alloc and reclaim */
126static DEFINE_SPINLOCK(pcpu_lock); /* protects index data structures */
114 127
115static struct list_head *pcpu_slot __read_mostly; /* chunk list slots */ 128static struct list_head *pcpu_slot __read_mostly; /* chunk list slots */
116static struct rb_root pcpu_addr_root = RB_ROOT; /* chunks by address */ 129static struct rb_root pcpu_addr_root = RB_ROOT; /* chunks by address */
117 130
131/* reclaim work to release fully free chunks, scheduled from free path */
132static void pcpu_reclaim(struct work_struct *work);
133static DECLARE_WORK(pcpu_reclaim_work, pcpu_reclaim);
134
118static int __pcpu_size_to_slot(int size) 135static int __pcpu_size_to_slot(int size)
119{ 136{
120 int highbit = fls(size); /* size is in bytes */ 137 int highbit = fls(size); /* size is in bytes */
@@ -161,39 +178,44 @@ static bool pcpu_chunk_page_occupied(struct pcpu_chunk *chunk,
161} 178}
162 179
163/** 180/**
164 * pcpu_realloc - versatile realloc 181 * pcpu_mem_alloc - allocate memory
165 * @p: the current pointer (can be NULL for new allocations) 182 * @size: bytes to allocate
166 * @size: the current size in bytes (can be 0 for new allocations) 183 *
167 * @new_size: the wanted new size in bytes (can be 0 for free) 184 * Allocate @size bytes. If @size is smaller than PAGE_SIZE,
185 * kzalloc() is used; otherwise, vmalloc() is used. The returned
186 * memory is always zeroed.
168 * 187 *
169 * More robust realloc which can be used to allocate, resize or free a 188 * CONTEXT:
170 * memory area of arbitrary size. If the needed size goes over 189 * Does GFP_KERNEL allocation.
171 * PAGE_SIZE, kernel VM is used.
172 * 190 *
173 * RETURNS: 191 * RETURNS:
174 * The new pointer on success, NULL on failure. 192 * Pointer to the allocated area on success, NULL on failure.
175 */ 193 */
176static void *pcpu_realloc(void *p, size_t size, size_t new_size) 194static void *pcpu_mem_alloc(size_t size)
177{ 195{
178 void *new; 196 if (size <= PAGE_SIZE)
179 197 return kzalloc(size, GFP_KERNEL);
180 if (new_size <= PAGE_SIZE) 198 else {
181 new = kmalloc(new_size, GFP_KERNEL); 199 void *ptr = vmalloc(size);
182 else 200 if (ptr)
183 new = vmalloc(new_size); 201 memset(ptr, 0, size);
184 if (new_size && !new) 202 return ptr;
185 return NULL; 203 }
186 204}
187 memcpy(new, p, min(size, new_size));
188 if (new_size > size)
189 memset(new + size, 0, new_size - size);
190 205
206/**
207 * pcpu_mem_free - free memory
208 * @ptr: memory to free
209 * @size: size of the area
210 *
211 * Free @ptr. @ptr should have been allocated using pcpu_mem_alloc().
212 */
213static void pcpu_mem_free(void *ptr, size_t size)
214{
191 if (size <= PAGE_SIZE) 215 if (size <= PAGE_SIZE)
192 kfree(p); 216 kfree(ptr);
193 else 217 else
194 vfree(p); 218 vfree(ptr);
195
196 return new;
197} 219}
198 220
199/** 221/**
@@ -203,13 +225,17 @@ static void *pcpu_realloc(void *p, size_t size, size_t new_size)
203 * 225 *
204 * This function is called after an allocation or free changed @chunk. 226 * This function is called after an allocation or free changed @chunk.
205 * New slot according to the changed state is determined and @chunk is 227 * New slot according to the changed state is determined and @chunk is
206 * moved to the slot. 228 * moved to the slot. Note that the reserved chunk is never put on
229 * chunk slots.
230 *
231 * CONTEXT:
232 * pcpu_lock.
207 */ 233 */
208static void pcpu_chunk_relocate(struct pcpu_chunk *chunk, int oslot) 234static void pcpu_chunk_relocate(struct pcpu_chunk *chunk, int oslot)
209{ 235{
210 int nslot = pcpu_chunk_slot(chunk); 236 int nslot = pcpu_chunk_slot(chunk);
211 237
212 if (oslot != nslot) { 238 if (chunk != pcpu_reserved_chunk && oslot != nslot) {
213 if (oslot < nslot) 239 if (oslot < nslot)
214 list_move(&chunk->list, &pcpu_slot[nslot]); 240 list_move(&chunk->list, &pcpu_slot[nslot]);
215 else 241 else
@@ -249,6 +275,9 @@ static struct rb_node **pcpu_chunk_rb_search(void *addr,
249 * searchs for the chunk with the highest start address which isn't 275 * searchs for the chunk with the highest start address which isn't
250 * beyond @addr. 276 * beyond @addr.
251 * 277 *
278 * CONTEXT:
279 * pcpu_lock.
280 *
252 * RETURNS: 281 * RETURNS:
253 * The address of the found chunk. 282 * The address of the found chunk.
254 */ 283 */
@@ -257,6 +286,15 @@ static struct pcpu_chunk *pcpu_chunk_addr_search(void *addr)
257 struct rb_node *n, *parent; 286 struct rb_node *n, *parent;
258 struct pcpu_chunk *chunk; 287 struct pcpu_chunk *chunk;
259 288
289 /* is it in the reserved chunk? */
290 if (pcpu_reserved_chunk) {
291 void *start = pcpu_reserved_chunk->vm->addr;
292
293 if (addr >= start && addr < start + pcpu_reserved_chunk_limit)
294 return pcpu_reserved_chunk;
295 }
296
297 /* nah... search the regular ones */
260 n = *pcpu_chunk_rb_search(addr, &parent); 298 n = *pcpu_chunk_rb_search(addr, &parent);
261 if (!n) { 299 if (!n) {
262 /* no exactly matching chunk, the parent is the closest */ 300 /* no exactly matching chunk, the parent is the closest */
@@ -280,6 +318,9 @@ static struct pcpu_chunk *pcpu_chunk_addr_search(void *addr)
280 * @new: chunk to insert 318 * @new: chunk to insert
281 * 319 *
282 * Insert @new into address rb tree. 320 * Insert @new into address rb tree.
321 *
322 * CONTEXT:
323 * pcpu_lock.
283 */ 324 */
284static void pcpu_chunk_addr_insert(struct pcpu_chunk *new) 325static void pcpu_chunk_addr_insert(struct pcpu_chunk *new)
285{ 326{
@@ -292,6 +333,66 @@ static void pcpu_chunk_addr_insert(struct pcpu_chunk *new)
292} 333}
293 334
294/** 335/**
336 * pcpu_extend_area_map - extend area map for allocation
337 * @chunk: target chunk
338 *
339 * Extend area map of @chunk so that it can accomodate an allocation.
340 * A single allocation can split an area into three areas, so this
341 * function makes sure that @chunk->map has at least two extra slots.
342 *
343 * CONTEXT:
344 * pcpu_alloc_mutex, pcpu_lock. pcpu_lock is released and reacquired
345 * if area map is extended.
346 *
347 * RETURNS:
348 * 0 if noop, 1 if successfully extended, -errno on failure.
349 */
350static int pcpu_extend_area_map(struct pcpu_chunk *chunk)
351{
352 int new_alloc;
353 int *new;
354 size_t size;
355
356 /* has enough? */
357 if (chunk->map_alloc >= chunk->map_used + 2)
358 return 0;
359
360 spin_unlock_irq(&pcpu_lock);
361
362 new_alloc = PCPU_DFL_MAP_ALLOC;
363 while (new_alloc < chunk->map_used + 2)
364 new_alloc *= 2;
365
366 new = pcpu_mem_alloc(new_alloc * sizeof(new[0]));
367 if (!new) {
368 spin_lock_irq(&pcpu_lock);
369 return -ENOMEM;
370 }
371
372 /*
373 * Acquire pcpu_lock and switch to new area map. Only free
374 * could have happened inbetween, so map_used couldn't have
375 * grown.
376 */
377 spin_lock_irq(&pcpu_lock);
378 BUG_ON(new_alloc < chunk->map_used + 2);
379
380 size = chunk->map_alloc * sizeof(chunk->map[0]);
381 memcpy(new, chunk->map, size);
382
383 /*
384 * map_alloc < PCPU_DFL_MAP_ALLOC indicates that the chunk is
385 * one of the first chunks and still using static map.
386 */
387 if (chunk->map_alloc >= PCPU_DFL_MAP_ALLOC)
388 pcpu_mem_free(chunk->map, size);
389
390 chunk->map_alloc = new_alloc;
391 chunk->map = new;
392 return 0;
393}
394
395/**
295 * pcpu_split_block - split a map block 396 * pcpu_split_block - split a map block
296 * @chunk: chunk of interest 397 * @chunk: chunk of interest
297 * @i: index of map block to split 398 * @i: index of map block to split
@@ -306,33 +407,19 @@ static void pcpu_chunk_addr_insert(struct pcpu_chunk *new)
306 * depending on @head, is reduced by @tail bytes and @tail byte block 407 * depending on @head, is reduced by @tail bytes and @tail byte block
307 * is inserted after the target block. 408 * is inserted after the target block.
308 * 409 *
309 * RETURNS: 410 * @chunk->map must have enough free slots to accomodate the split.
310 * 0 on success, -errno on failure. 411 *
412 * CONTEXT:
413 * pcpu_lock.
311 */ 414 */
312static int pcpu_split_block(struct pcpu_chunk *chunk, int i, int head, int tail) 415static void pcpu_split_block(struct pcpu_chunk *chunk, int i,
416 int head, int tail)
313{ 417{
314 int nr_extra = !!head + !!tail; 418 int nr_extra = !!head + !!tail;
315 int target = chunk->map_used + nr_extra;
316
317 /* reallocation required? */
318 if (chunk->map_alloc < target) {
319 int new_alloc = chunk->map_alloc;
320 int *new;
321 419
322 while (new_alloc < target) 420 BUG_ON(chunk->map_alloc < chunk->map_used + nr_extra);
323 new_alloc *= 2;
324 421
325 new = pcpu_realloc(chunk->map, 422 /* insert new subblocks */
326 chunk->map_alloc * sizeof(new[0]),
327 new_alloc * sizeof(new[0]));
328 if (!new)
329 return -ENOMEM;
330
331 chunk->map_alloc = new_alloc;
332 chunk->map = new;
333 }
334
335 /* insert a new subblock */
336 memmove(&chunk->map[i + nr_extra], &chunk->map[i], 423 memmove(&chunk->map[i + nr_extra], &chunk->map[i],
337 sizeof(chunk->map[0]) * (chunk->map_used - i)); 424 sizeof(chunk->map[0]) * (chunk->map_used - i));
338 chunk->map_used += nr_extra; 425 chunk->map_used += nr_extra;
@@ -345,7 +432,6 @@ static int pcpu_split_block(struct pcpu_chunk *chunk, int i, int head, int tail)
345 chunk->map[i++] -= tail; 432 chunk->map[i++] -= tail;
346 chunk->map[i] = tail; 433 chunk->map[i] = tail;
347 } 434 }
348 return 0;
349} 435}
350 436
351/** 437/**
@@ -358,8 +444,14 @@ static int pcpu_split_block(struct pcpu_chunk *chunk, int i, int head, int tail)
358 * Note that this function only allocates the offset. It doesn't 444 * Note that this function only allocates the offset. It doesn't
359 * populate or map the area. 445 * populate or map the area.
360 * 446 *
447 * @chunk->map must have at least two free slots.
448 *
449 * CONTEXT:
450 * pcpu_lock.
451 *
361 * RETURNS: 452 * RETURNS:
362 * Allocated offset in @chunk on success, -errno on failure. 453 * Allocated offset in @chunk on success, -1 if no matching area is
454 * found.
363 */ 455 */
364static int pcpu_alloc_area(struct pcpu_chunk *chunk, int size, int align) 456static int pcpu_alloc_area(struct pcpu_chunk *chunk, int size, int align)
365{ 457{
@@ -367,22 +459,6 @@ static int pcpu_alloc_area(struct pcpu_chunk *chunk, int size, int align)
367 int max_contig = 0; 459 int max_contig = 0;
368 int i, off; 460 int i, off;
369 461
370 /*
371 * The static chunk initially doesn't have map attached
372 * because kmalloc wasn't available during init. Give it one.
373 */
374 if (unlikely(!chunk->map)) {
375 chunk->map = pcpu_realloc(NULL, 0,
376 PCPU_DFL_MAP_ALLOC * sizeof(chunk->map[0]));
377 if (!chunk->map)
378 return -ENOMEM;
379
380 chunk->map_alloc = PCPU_DFL_MAP_ALLOC;
381 chunk->map[chunk->map_used++] = -pcpu_static_size;
382 if (chunk->free_size)
383 chunk->map[chunk->map_used++] = chunk->free_size;
384 }
385
386 for (i = 0, off = 0; i < chunk->map_used; off += abs(chunk->map[i++])) { 462 for (i = 0, off = 0; i < chunk->map_used; off += abs(chunk->map[i++])) {
387 bool is_last = i + 1 == chunk->map_used; 463 bool is_last = i + 1 == chunk->map_used;
388 int head, tail; 464 int head, tail;
@@ -423,8 +499,7 @@ static int pcpu_alloc_area(struct pcpu_chunk *chunk, int size, int align)
423 499
424 /* split if warranted */ 500 /* split if warranted */
425 if (head || tail) { 501 if (head || tail) {
426 if (pcpu_split_block(chunk, i, head, tail)) 502 pcpu_split_block(chunk, i, head, tail);
427 return -ENOMEM;
428 if (head) { 503 if (head) {
429 i++; 504 i++;
430 off += head; 505 off += head;
@@ -451,14 +526,8 @@ static int pcpu_alloc_area(struct pcpu_chunk *chunk, int size, int align)
451 chunk->contig_hint = max_contig; /* fully scanned */ 526 chunk->contig_hint = max_contig; /* fully scanned */
452 pcpu_chunk_relocate(chunk, oslot); 527 pcpu_chunk_relocate(chunk, oslot);
453 528
454 /* 529 /* tell the upper layer that this chunk has no matching area */
455 * Tell the upper layer that this chunk has no area left. 530 return -1;
456 * Note that this is not an error condition but a notification
457 * to upper layer that it needs to look at other chunks.
458 * -ENOSPC is chosen as it isn't used in memory subsystem and
459 * matches the meaning in a way.
460 */
461 return -ENOSPC;
462} 531}
463 532
464/** 533/**
@@ -469,6 +538,9 @@ static int pcpu_alloc_area(struct pcpu_chunk *chunk, int size, int align)
469 * Free area starting from @freeme to @chunk. Note that this function 538 * Free area starting from @freeme to @chunk. Note that this function
470 * only modifies the allocation map. It doesn't depopulate or unmap 539 * only modifies the allocation map. It doesn't depopulate or unmap
471 * the area. 540 * the area.
541 *
542 * CONTEXT:
543 * pcpu_lock.
472 */ 544 */
473static void pcpu_free_area(struct pcpu_chunk *chunk, int freeme) 545static void pcpu_free_area(struct pcpu_chunk *chunk, int freeme)
474{ 546{
@@ -554,6 +626,9 @@ static void pcpu_unmap(struct pcpu_chunk *chunk, int page_start, int page_end,
554 * For each cpu, depopulate and unmap pages [@page_start,@page_end) 626 * For each cpu, depopulate and unmap pages [@page_start,@page_end)
555 * from @chunk. If @flush is true, vcache is flushed before unmapping 627 * from @chunk. If @flush is true, vcache is flushed before unmapping
556 * and tlb after. 628 * and tlb after.
629 *
630 * CONTEXT:
631 * pcpu_alloc_mutex.
557 */ 632 */
558static void pcpu_depopulate_chunk(struct pcpu_chunk *chunk, int off, int size, 633static void pcpu_depopulate_chunk(struct pcpu_chunk *chunk, int off, int size,
559 bool flush) 634 bool flush)
@@ -632,6 +707,9 @@ static int pcpu_map(struct pcpu_chunk *chunk, int page_start, int page_end)
632 * 707 *
633 * For each cpu, populate and map pages [@page_start,@page_end) into 708 * For each cpu, populate and map pages [@page_start,@page_end) into
634 * @chunk. The area is cleared on return. 709 * @chunk. The area is cleared on return.
710 *
711 * CONTEXT:
712 * pcpu_alloc_mutex, does GFP_KERNEL allocation.
635 */ 713 */
636static int pcpu_populate_chunk(struct pcpu_chunk *chunk, int off, int size) 714static int pcpu_populate_chunk(struct pcpu_chunk *chunk, int off, int size)
637{ 715{
@@ -686,7 +764,7 @@ static void free_pcpu_chunk(struct pcpu_chunk *chunk)
686 return; 764 return;
687 if (chunk->vm) 765 if (chunk->vm)
688 free_vm_area(chunk->vm); 766 free_vm_area(chunk->vm);
689 pcpu_realloc(chunk->map, chunk->map_alloc * sizeof(chunk->map[0]), 0); 767 pcpu_mem_free(chunk->map, chunk->map_alloc * sizeof(chunk->map[0]));
690 kfree(chunk); 768 kfree(chunk);
691} 769}
692 770
@@ -698,10 +776,10 @@ static struct pcpu_chunk *alloc_pcpu_chunk(void)
698 if (!chunk) 776 if (!chunk)
699 return NULL; 777 return NULL;
700 778
701 chunk->map = pcpu_realloc(NULL, 0, 779 chunk->map = pcpu_mem_alloc(PCPU_DFL_MAP_ALLOC * sizeof(chunk->map[0]));
702 PCPU_DFL_MAP_ALLOC * sizeof(chunk->map[0]));
703 chunk->map_alloc = PCPU_DFL_MAP_ALLOC; 780 chunk->map_alloc = PCPU_DFL_MAP_ALLOC;
704 chunk->map[chunk->map_used++] = pcpu_unit_size; 781 chunk->map[chunk->map_used++] = pcpu_unit_size;
782 chunk->page = chunk->page_ar;
705 783
706 chunk->vm = get_vm_area(pcpu_chunk_size, GFP_KERNEL); 784 chunk->vm = get_vm_area(pcpu_chunk_size, GFP_KERNEL);
707 if (!chunk->vm) { 785 if (!chunk->vm) {
@@ -717,19 +795,21 @@ static struct pcpu_chunk *alloc_pcpu_chunk(void)
717} 795}
718 796
719/** 797/**
720 * __alloc_percpu - allocate percpu area 798 * pcpu_alloc - the percpu allocator
721 * @size: size of area to allocate in bytes 799 * @size: size of area to allocate in bytes
722 * @align: alignment of area (max PAGE_SIZE) 800 * @align: alignment of area (max PAGE_SIZE)
801 * @reserved: allocate from the reserved chunk if available
723 * 802 *
724 * Allocate percpu area of @size bytes aligned at @align. Might 803 * Allocate percpu area of @size bytes aligned at @align.
725 * sleep. Might trigger writeouts. 804 *
805 * CONTEXT:
806 * Does GFP_KERNEL allocation.
726 * 807 *
727 * RETURNS: 808 * RETURNS:
728 * Percpu pointer to the allocated area on success, NULL on failure. 809 * Percpu pointer to the allocated area on success, NULL on failure.
729 */ 810 */
730void *__alloc_percpu(size_t size, size_t align) 811static void *pcpu_alloc(size_t size, size_t align, bool reserved)
731{ 812{
732 void *ptr = NULL;
733 struct pcpu_chunk *chunk; 813 struct pcpu_chunk *chunk;
734 int slot, off; 814 int slot, off;
735 815
@@ -739,90 +819,192 @@ void *__alloc_percpu(size_t size, size_t align)
739 return NULL; 819 return NULL;
740 } 820 }
741 821
742 mutex_lock(&pcpu_mutex); 822 mutex_lock(&pcpu_alloc_mutex);
823 spin_lock_irq(&pcpu_lock);
824
825 /* serve reserved allocations from the reserved chunk if available */
826 if (reserved && pcpu_reserved_chunk) {
827 chunk = pcpu_reserved_chunk;
828 if (size > chunk->contig_hint ||
829 pcpu_extend_area_map(chunk) < 0)
830 goto fail_unlock;
831 off = pcpu_alloc_area(chunk, size, align);
832 if (off >= 0)
833 goto area_found;
834 goto fail_unlock;
835 }
743 836
744 /* allocate area */ 837restart:
838 /* search through normal chunks */
745 for (slot = pcpu_size_to_slot(size); slot < pcpu_nr_slots; slot++) { 839 for (slot = pcpu_size_to_slot(size); slot < pcpu_nr_slots; slot++) {
746 list_for_each_entry(chunk, &pcpu_slot[slot], list) { 840 list_for_each_entry(chunk, &pcpu_slot[slot], list) {
747 if (size > chunk->contig_hint) 841 if (size > chunk->contig_hint)
748 continue; 842 continue;
843
844 switch (pcpu_extend_area_map(chunk)) {
845 case 0:
846 break;
847 case 1:
848 goto restart; /* pcpu_lock dropped, restart */
849 default:
850 goto fail_unlock;
851 }
852
749 off = pcpu_alloc_area(chunk, size, align); 853 off = pcpu_alloc_area(chunk, size, align);
750 if (off >= 0) 854 if (off >= 0)
751 goto area_found; 855 goto area_found;
752 if (off != -ENOSPC)
753 goto out_unlock;
754 } 856 }
755 } 857 }
756 858
757 /* hmmm... no space left, create a new chunk */ 859 /* hmmm... no space left, create a new chunk */
860 spin_unlock_irq(&pcpu_lock);
861
758 chunk = alloc_pcpu_chunk(); 862 chunk = alloc_pcpu_chunk();
759 if (!chunk) 863 if (!chunk)
760 goto out_unlock; 864 goto fail_unlock_mutex;
865
866 spin_lock_irq(&pcpu_lock);
761 pcpu_chunk_relocate(chunk, -1); 867 pcpu_chunk_relocate(chunk, -1);
762 pcpu_chunk_addr_insert(chunk); 868 pcpu_chunk_addr_insert(chunk);
763 869 goto restart;
764 off = pcpu_alloc_area(chunk, size, align);
765 if (off < 0)
766 goto out_unlock;
767 870
768area_found: 871area_found:
872 spin_unlock_irq(&pcpu_lock);
873
769 /* populate, map and clear the area */ 874 /* populate, map and clear the area */
770 if (pcpu_populate_chunk(chunk, off, size)) { 875 if (pcpu_populate_chunk(chunk, off, size)) {
876 spin_lock_irq(&pcpu_lock);
771 pcpu_free_area(chunk, off); 877 pcpu_free_area(chunk, off);
772 goto out_unlock; 878 goto fail_unlock;
773 } 879 }
774 880
775 ptr = __addr_to_pcpu_ptr(chunk->vm->addr + off); 881 mutex_unlock(&pcpu_alloc_mutex);
776out_unlock: 882
777 mutex_unlock(&pcpu_mutex); 883 return __addr_to_pcpu_ptr(chunk->vm->addr + off);
778 return ptr; 884
885fail_unlock:
886 spin_unlock_irq(&pcpu_lock);
887fail_unlock_mutex:
888 mutex_unlock(&pcpu_alloc_mutex);
889 return NULL;
890}
891
892/**
893 * __alloc_percpu - allocate dynamic percpu area
894 * @size: size of area to allocate in bytes
895 * @align: alignment of area (max PAGE_SIZE)
896 *
897 * Allocate percpu area of @size bytes aligned at @align. Might
898 * sleep. Might trigger writeouts.
899 *
900 * CONTEXT:
901 * Does GFP_KERNEL allocation.
902 *
903 * RETURNS:
904 * Percpu pointer to the allocated area on success, NULL on failure.
905 */
906void *__alloc_percpu(size_t size, size_t align)
907{
908 return pcpu_alloc(size, align, false);
779} 909}
780EXPORT_SYMBOL_GPL(__alloc_percpu); 910EXPORT_SYMBOL_GPL(__alloc_percpu);
781 911
782static void pcpu_kill_chunk(struct pcpu_chunk *chunk) 912/**
913 * __alloc_reserved_percpu - allocate reserved percpu area
914 * @size: size of area to allocate in bytes
915 * @align: alignment of area (max PAGE_SIZE)
916 *
917 * Allocate percpu area of @size bytes aligned at @align from reserved
918 * percpu area if arch has set it up; otherwise, allocation is served
919 * from the same dynamic area. Might sleep. Might trigger writeouts.
920 *
921 * CONTEXT:
922 * Does GFP_KERNEL allocation.
923 *
924 * RETURNS:
925 * Percpu pointer to the allocated area on success, NULL on failure.
926 */
927void *__alloc_reserved_percpu(size_t size, size_t align)
928{
929 return pcpu_alloc(size, align, true);
930}
931
932/**
933 * pcpu_reclaim - reclaim fully free chunks, workqueue function
934 * @work: unused
935 *
936 * Reclaim all fully free chunks except for the first one.
937 *
938 * CONTEXT:
939 * workqueue context.
940 */
941static void pcpu_reclaim(struct work_struct *work)
783{ 942{
784 WARN_ON(chunk->immutable); 943 LIST_HEAD(todo);
785 pcpu_depopulate_chunk(chunk, 0, pcpu_unit_size, false); 944 struct list_head *head = &pcpu_slot[pcpu_nr_slots - 1];
786 list_del(&chunk->list); 945 struct pcpu_chunk *chunk, *next;
787 rb_erase(&chunk->rb_node, &pcpu_addr_root); 946
788 free_pcpu_chunk(chunk); 947 mutex_lock(&pcpu_alloc_mutex);
948 spin_lock_irq(&pcpu_lock);
949
950 list_for_each_entry_safe(chunk, next, head, list) {
951 WARN_ON(chunk->immutable);
952
953 /* spare the first one */
954 if (chunk == list_first_entry(head, struct pcpu_chunk, list))
955 continue;
956
957 rb_erase(&chunk->rb_node, &pcpu_addr_root);
958 list_move(&chunk->list, &todo);
959 }
960
961 spin_unlock_irq(&pcpu_lock);
962 mutex_unlock(&pcpu_alloc_mutex);
963
964 list_for_each_entry_safe(chunk, next, &todo, list) {
965 pcpu_depopulate_chunk(chunk, 0, pcpu_unit_size, false);
966 free_pcpu_chunk(chunk);
967 }
789} 968}
790 969
791/** 970/**
792 * free_percpu - free percpu area 971 * free_percpu - free percpu area
793 * @ptr: pointer to area to free 972 * @ptr: pointer to area to free
794 * 973 *
795 * Free percpu area @ptr. Might sleep. 974 * Free percpu area @ptr.
975 *
976 * CONTEXT:
977 * Can be called from atomic context.
796 */ 978 */
797void free_percpu(void *ptr) 979void free_percpu(void *ptr)
798{ 980{
799 void *addr = __pcpu_ptr_to_addr(ptr); 981 void *addr = __pcpu_ptr_to_addr(ptr);
800 struct pcpu_chunk *chunk; 982 struct pcpu_chunk *chunk;
983 unsigned long flags;
801 int off; 984 int off;
802 985
803 if (!ptr) 986 if (!ptr)
804 return; 987 return;
805 988
806 mutex_lock(&pcpu_mutex); 989 spin_lock_irqsave(&pcpu_lock, flags);
807 990
808 chunk = pcpu_chunk_addr_search(addr); 991 chunk = pcpu_chunk_addr_search(addr);
809 off = addr - chunk->vm->addr; 992 off = addr - chunk->vm->addr;
810 993
811 pcpu_free_area(chunk, off); 994 pcpu_free_area(chunk, off);
812 995
813 /* the chunk became fully free, kill one if there are other free ones */ 996 /* if there are more than one fully free chunks, wake up grim reaper */
814 if (chunk->free_size == pcpu_unit_size) { 997 if (chunk->free_size == pcpu_unit_size) {
815 struct pcpu_chunk *pos; 998 struct pcpu_chunk *pos;
816 999
817 list_for_each_entry(pos, 1000 list_for_each_entry(pos, &pcpu_slot[pcpu_nr_slots - 1], list)
818 &pcpu_slot[pcpu_chunk_slot(chunk)], list)
819 if (pos != chunk) { 1001 if (pos != chunk) {
820 pcpu_kill_chunk(pos); 1002 schedule_work(&pcpu_reclaim_work);
821 break; 1003 break;
822 } 1004 }
823 } 1005 }
824 1006
825 mutex_unlock(&pcpu_mutex); 1007 spin_unlock_irqrestore(&pcpu_lock, flags);
826} 1008}
827EXPORT_SYMBOL_GPL(free_percpu); 1009EXPORT_SYMBOL_GPL(free_percpu);
828 1010
@@ -830,8 +1012,9 @@ EXPORT_SYMBOL_GPL(free_percpu);
830 * pcpu_setup_first_chunk - initialize the first percpu chunk 1012 * pcpu_setup_first_chunk - initialize the first percpu chunk
831 * @get_page_fn: callback to fetch page pointer 1013 * @get_page_fn: callback to fetch page pointer
832 * @static_size: the size of static percpu area in bytes 1014 * @static_size: the size of static percpu area in bytes
833 * @unit_size: unit size in bytes, must be multiple of PAGE_SIZE, 0 for auto 1015 * @reserved_size: the size of reserved percpu area in bytes
834 * @free_size: free size in bytes, 0 for auto 1016 * @unit_size: unit size in bytes, must be multiple of PAGE_SIZE, -1 for auto
1017 * @dyn_size: free size for dynamic allocation in bytes, -1 for auto
835 * @base_addr: mapped address, NULL for auto 1018 * @base_addr: mapped address, NULL for auto
836 * @populate_pte_fn: callback to allocate pagetable, NULL if unnecessary 1019 * @populate_pte_fn: callback to allocate pagetable, NULL if unnecessary
837 * 1020 *
@@ -848,13 +1031,22 @@ EXPORT_SYMBOL_GPL(free_percpu);
848 * indicates end of pages for the cpu. Note that @get_page_fn() must 1031 * indicates end of pages for the cpu. Note that @get_page_fn() must
849 * return the same number of pages for all cpus. 1032 * return the same number of pages for all cpus.
850 * 1033 *
851 * @unit_size, if non-zero, determines unit size and must be aligned 1034 * @reserved_size, if non-zero, specifies the amount of bytes to
852 * to PAGE_SIZE and equal to or larger than @static_size + @free_size. 1035 * reserve after the static area in the first chunk. This reserves
1036 * the first chunk such that it's available only through reserved
1037 * percpu allocation. This is primarily used to serve module percpu
1038 * static areas on architectures where the addressing model has
1039 * limited offset range for symbol relocations to guarantee module
1040 * percpu symbols fall inside the relocatable range.
853 * 1041 *
854 * @free_size determines the number of free bytes after the static 1042 * @unit_size, if non-negative, specifies unit size and must be
855 * area in the first chunk. If zero, whatever left is available. 1043 * aligned to PAGE_SIZE and equal to or larger than @static_size +
856 * Specifying non-zero value make percpu leave the area after 1044 * @reserved_size + @dyn_size.
857 * @static_size + @free_size alone. 1045 *
1046 * @dyn_size, if non-negative, limits the number of bytes available
1047 * for dynamic allocation in the first chunk. Specifying non-negative
1048 * value make percpu leave alone the area beyond @static_size +
1049 * @reserved_size + @dyn_size.
858 * 1050 *
859 * Non-null @base_addr means that the caller already allocated virtual 1051 * Non-null @base_addr means that the caller already allocated virtual
860 * region for the first chunk and mapped it. percpu must not mess 1052 * region for the first chunk and mapped it. percpu must not mess
@@ -864,41 +1056,58 @@ EXPORT_SYMBOL_GPL(free_percpu);
864 * @populate_pte_fn is used to populate the pagetable. NULL means the 1056 * @populate_pte_fn is used to populate the pagetable. NULL means the
865 * caller already populated the pagetable. 1057 * caller already populated the pagetable.
866 * 1058 *
1059 * If the first chunk ends up with both reserved and dynamic areas, it
1060 * is served by two chunks - one to serve the core static and reserved
1061 * areas and the other for the dynamic area. They share the same vm
1062 * and page map but uses different area allocation map to stay away
1063 * from each other. The latter chunk is circulated in the chunk slots
1064 * and available for dynamic allocation like any other chunks.
1065 *
867 * RETURNS: 1066 * RETURNS:
868 * The determined pcpu_unit_size which can be used to initialize 1067 * The determined pcpu_unit_size which can be used to initialize
869 * percpu access. 1068 * percpu access.
870 */ 1069 */
871size_t __init pcpu_setup_first_chunk(pcpu_get_page_fn_t get_page_fn, 1070size_t __init pcpu_setup_first_chunk(pcpu_get_page_fn_t get_page_fn,
872 size_t static_size, size_t unit_size, 1071 size_t static_size, size_t reserved_size,
873 size_t free_size, void *base_addr, 1072 ssize_t unit_size, ssize_t dyn_size,
1073 void *base_addr,
874 pcpu_populate_pte_fn_t populate_pte_fn) 1074 pcpu_populate_pte_fn_t populate_pte_fn)
875{ 1075{
876 static struct vm_struct static_vm; 1076 static struct vm_struct first_vm;
877 struct pcpu_chunk *static_chunk; 1077 static int smap[2], dmap[2];
1078 struct pcpu_chunk *schunk, *dchunk = NULL;
878 unsigned int cpu; 1079 unsigned int cpu;
879 int nr_pages; 1080 int nr_pages;
880 int err, i; 1081 int err, i;
881 1082
882 /* santiy checks */ 1083 /* santiy checks */
1084 BUILD_BUG_ON(ARRAY_SIZE(smap) >= PCPU_DFL_MAP_ALLOC ||
1085 ARRAY_SIZE(dmap) >= PCPU_DFL_MAP_ALLOC);
883 BUG_ON(!static_size); 1086 BUG_ON(!static_size);
884 BUG_ON(!unit_size && free_size); 1087 if (unit_size >= 0) {
885 BUG_ON(unit_size && unit_size < static_size + free_size); 1088 BUG_ON(unit_size < static_size + reserved_size +
886 BUG_ON(unit_size & ~PAGE_MASK); 1089 (dyn_size >= 0 ? dyn_size : 0));
887 BUG_ON(base_addr && !unit_size); 1090 BUG_ON(unit_size & ~PAGE_MASK);
1091 } else {
1092 BUG_ON(dyn_size >= 0);
1093 BUG_ON(base_addr);
1094 }
888 BUG_ON(base_addr && populate_pte_fn); 1095 BUG_ON(base_addr && populate_pte_fn);
889 1096
890 if (unit_size) 1097 if (unit_size >= 0)
891 pcpu_unit_pages = unit_size >> PAGE_SHIFT; 1098 pcpu_unit_pages = unit_size >> PAGE_SHIFT;
892 else 1099 else
893 pcpu_unit_pages = max_t(int, PCPU_MIN_UNIT_SIZE >> PAGE_SHIFT, 1100 pcpu_unit_pages = max_t(int, PCPU_MIN_UNIT_SIZE >> PAGE_SHIFT,
894 PFN_UP(static_size)); 1101 PFN_UP(static_size + reserved_size));
895 1102
896 pcpu_static_size = static_size;
897 pcpu_unit_size = pcpu_unit_pages << PAGE_SHIFT; 1103 pcpu_unit_size = pcpu_unit_pages << PAGE_SHIFT;
898 pcpu_chunk_size = num_possible_cpus() * pcpu_unit_size; 1104 pcpu_chunk_size = num_possible_cpus() * pcpu_unit_size;
899 pcpu_chunk_struct_size = sizeof(struct pcpu_chunk) 1105 pcpu_chunk_struct_size = sizeof(struct pcpu_chunk)
900 + num_possible_cpus() * pcpu_unit_pages * sizeof(struct page *); 1106 + num_possible_cpus() * pcpu_unit_pages * sizeof(struct page *);
901 1107
1108 if (dyn_size < 0)
1109 dyn_size = pcpu_unit_size - static_size - reserved_size;
1110
902 /* 1111 /*
903 * Allocate chunk slots. The additional last slot is for 1112 * Allocate chunk slots. The additional last slot is for
904 * empty chunks. 1113 * empty chunks.
@@ -908,33 +1117,66 @@ size_t __init pcpu_setup_first_chunk(pcpu_get_page_fn_t get_page_fn,
908 for (i = 0; i < pcpu_nr_slots; i++) 1117 for (i = 0; i < pcpu_nr_slots; i++)
909 INIT_LIST_HEAD(&pcpu_slot[i]); 1118 INIT_LIST_HEAD(&pcpu_slot[i]);
910 1119
911 /* init static_chunk */ 1120 /*
912 static_chunk = alloc_bootmem(pcpu_chunk_struct_size); 1121 * Initialize static chunk. If reserved_size is zero, the
913 INIT_LIST_HEAD(&static_chunk->list); 1122 * static chunk covers static area + dynamic allocation area
914 static_chunk->vm = &static_vm; 1123 * in the first chunk. If reserved_size is not zero, it
915 1124 * covers static area + reserved area (mostly used for module
916 if (free_size) 1125 * static percpu allocation).
917 static_chunk->free_size = free_size; 1126 */
918 else 1127 schunk = alloc_bootmem(pcpu_chunk_struct_size);
919 static_chunk->free_size = pcpu_unit_size - pcpu_static_size; 1128 INIT_LIST_HEAD(&schunk->list);
920 1129 schunk->vm = &first_vm;
921 static_chunk->contig_hint = static_chunk->free_size; 1130 schunk->map = smap;
1131 schunk->map_alloc = ARRAY_SIZE(smap);
1132 schunk->page = schunk->page_ar;
1133
1134 if (reserved_size) {
1135 schunk->free_size = reserved_size;
1136 pcpu_reserved_chunk = schunk; /* not for dynamic alloc */
1137 } else {
1138 schunk->free_size = dyn_size;
1139 dyn_size = 0; /* dynamic area covered */
1140 }
1141 schunk->contig_hint = schunk->free_size;
1142
1143 schunk->map[schunk->map_used++] = -static_size;
1144 if (schunk->free_size)
1145 schunk->map[schunk->map_used++] = schunk->free_size;
1146
1147 pcpu_reserved_chunk_limit = static_size + schunk->free_size;
1148
1149 /* init dynamic chunk if necessary */
1150 if (dyn_size) {
1151 dchunk = alloc_bootmem(sizeof(struct pcpu_chunk));
1152 INIT_LIST_HEAD(&dchunk->list);
1153 dchunk->vm = &first_vm;
1154 dchunk->map = dmap;
1155 dchunk->map_alloc = ARRAY_SIZE(dmap);
1156 dchunk->page = schunk->page_ar; /* share page map with schunk */
1157
1158 dchunk->contig_hint = dchunk->free_size = dyn_size;
1159 dchunk->map[dchunk->map_used++] = -pcpu_reserved_chunk_limit;
1160 dchunk->map[dchunk->map_used++] = dchunk->free_size;
1161 }
922 1162
923 /* allocate vm address */ 1163 /* allocate vm address */
924 static_vm.flags = VM_ALLOC; 1164 first_vm.flags = VM_ALLOC;
925 static_vm.size = pcpu_chunk_size; 1165 first_vm.size = pcpu_chunk_size;
926 1166
927 if (!base_addr) 1167 if (!base_addr)
928 vm_area_register_early(&static_vm, PAGE_SIZE); 1168 vm_area_register_early(&first_vm, PAGE_SIZE);
929 else { 1169 else {
930 /* 1170 /*
931 * Pages already mapped. No need to remap into 1171 * Pages already mapped. No need to remap into
932 * vmalloc area. In this case the static chunk can't 1172 * vmalloc area. In this case the first chunks can't
933 * be mapped or unmapped by percpu and is marked 1173 * be mapped or unmapped by percpu and are marked
934 * immutable. 1174 * immutable.
935 */ 1175 */
936 static_vm.addr = base_addr; 1176 first_vm.addr = base_addr;
937 static_chunk->immutable = true; 1177 schunk->immutable = true;
1178 if (dchunk)
1179 dchunk->immutable = true;
938 } 1180 }
939 1181
940 /* assign pages */ 1182 /* assign pages */
@@ -945,10 +1187,10 @@ size_t __init pcpu_setup_first_chunk(pcpu_get_page_fn_t get_page_fn,
945 1187
946 if (!page) 1188 if (!page)
947 break; 1189 break;
948 *pcpu_chunk_pagep(static_chunk, cpu, i) = page; 1190 *pcpu_chunk_pagep(schunk, cpu, i) = page;
949 } 1191 }
950 1192
951 BUG_ON(i < PFN_UP(pcpu_static_size)); 1193 BUG_ON(i < PFN_UP(static_size));
952 1194
953 if (nr_pages < 0) 1195 if (nr_pages < 0)
954 nr_pages = i; 1196 nr_pages = i;
@@ -960,20 +1202,25 @@ size_t __init pcpu_setup_first_chunk(pcpu_get_page_fn_t get_page_fn,
960 if (populate_pte_fn) { 1202 if (populate_pte_fn) {
961 for_each_possible_cpu(cpu) 1203 for_each_possible_cpu(cpu)
962 for (i = 0; i < nr_pages; i++) 1204 for (i = 0; i < nr_pages; i++)
963 populate_pte_fn(pcpu_chunk_addr(static_chunk, 1205 populate_pte_fn(pcpu_chunk_addr(schunk,
964 cpu, i)); 1206 cpu, i));
965 1207
966 err = pcpu_map(static_chunk, 0, nr_pages); 1208 err = pcpu_map(schunk, 0, nr_pages);
967 if (err) 1209 if (err)
968 panic("failed to setup static percpu area, err=%d\n", 1210 panic("failed to setup static percpu area, err=%d\n",
969 err); 1211 err);
970 } 1212 }
971 1213
972 /* link static_chunk in */ 1214 /* link the first chunk in */
973 pcpu_chunk_relocate(static_chunk, -1); 1215 if (!dchunk) {
974 pcpu_chunk_addr_insert(static_chunk); 1216 pcpu_chunk_relocate(schunk, -1);
1217 pcpu_chunk_addr_insert(schunk);
1218 } else {
1219 pcpu_chunk_relocate(dchunk, -1);
1220 pcpu_chunk_addr_insert(dchunk);
1221 }
975 1222
976 /* we're done */ 1223 /* we're done */
977 pcpu_base_addr = (void *)pcpu_chunk_addr(static_chunk, 0, 0); 1224 pcpu_base_addr = (void *)pcpu_chunk_addr(schunk, 0, 0);
978 return pcpu_unit_size; 1225 return pcpu_unit_size;
979} 1226}
diff --git a/security/smack/smack_lsm.c b/security/smack/smack_lsm.c
index 0278bc083044..e7ded1326b0f 100644
--- a/security/smack/smack_lsm.c
+++ b/security/smack/smack_lsm.c
@@ -1498,58 +1498,31 @@ static int smack_socket_post_create(struct socket *sock, int family,
1498 * looks for host based access restrictions 1498 * looks for host based access restrictions
1499 * 1499 *
1500 * This version will only be appropriate for really small 1500 * This version will only be appropriate for really small
1501 * sets of single label hosts. Because of the masking 1501 * sets of single label hosts.
1502 * it cannot shortcut out on the first match. There are
1503 * numerious ways to address the problem, but none of them
1504 * have been applied here.
1505 * 1502 *
1506 * Returns the label of the far end or NULL if it's not special. 1503 * Returns the label of the far end or NULL if it's not special.
1507 */ 1504 */
1508static char *smack_host_label(struct sockaddr_in *sip) 1505static char *smack_host_label(struct sockaddr_in *sip)
1509{ 1506{
1510 struct smk_netlbladdr *snp; 1507 struct smk_netlbladdr *snp;
1511 char *bestlabel = NULL;
1512 struct in_addr *siap = &sip->sin_addr; 1508 struct in_addr *siap = &sip->sin_addr;
1513 struct in_addr *liap;
1514 struct in_addr *miap;
1515 struct in_addr bestmask;
1516 1509
1517 if (siap->s_addr == 0) 1510 if (siap->s_addr == 0)
1518 return NULL; 1511 return NULL;
1519 1512
1520 bestmask.s_addr = 0;
1521
1522 for (snp = smack_netlbladdrs; snp != NULL; snp = snp->smk_next) { 1513 for (snp = smack_netlbladdrs; snp != NULL; snp = snp->smk_next) {
1523 liap = &snp->smk_host.sin_addr;
1524 miap = &snp->smk_mask;
1525 /*
1526 * If the addresses match after applying the list entry mask
1527 * the entry matches the address. If it doesn't move along to
1528 * the next entry.
1529 */
1530 if ((liap->s_addr & miap->s_addr) !=
1531 (siap->s_addr & miap->s_addr))
1532 continue;
1533 /* 1514 /*
1534 * If the list entry mask identifies a single address 1515 * we break after finding the first match because
1535 * it can't get any more specific. 1516 * the list is sorted from longest to shortest mask
1517 * so we have found the most specific match
1536 */ 1518 */
1537 if (miap->s_addr == 0xffffffff) 1519 if ((&snp->smk_host.sin_addr)->s_addr ==
1520 (siap->s_addr & (&snp->smk_mask)->s_addr)) {
1538 return snp->smk_label; 1521 return snp->smk_label;
1539 /* 1522 }
1540 * If the list entry mask is less specific than the best
1541 * already found this entry is uninteresting.
1542 */
1543 if ((miap->s_addr | bestmask.s_addr) == bestmask.s_addr)
1544 continue;
1545 /*
1546 * This is better than any entry found so far.
1547 */
1548 bestmask.s_addr = miap->s_addr;
1549 bestlabel = snp->smk_label;
1550 } 1523 }
1551 1524
1552 return bestlabel; 1525 return NULL;
1553} 1526}
1554 1527
1555/** 1528/**
diff --git a/security/smack/smackfs.c b/security/smack/smackfs.c
index 8e42800878f4..51f0efc50dab 100644
--- a/security/smack/smackfs.c
+++ b/security/smack/smackfs.c
@@ -650,10 +650,6 @@ static void *netlbladdr_seq_next(struct seq_file *s, void *v, loff_t *pos)
650 650
651 return skp; 651 return skp;
652} 652}
653/*
654#define BEMASK 0x80000000
655*/
656#define BEMASK 0x00000001
657#define BEBITS (sizeof(__be32) * 8) 653#define BEBITS (sizeof(__be32) * 8)
658 654
659/* 655/*
@@ -663,12 +659,10 @@ static int netlbladdr_seq_show(struct seq_file *s, void *v)
663{ 659{
664 struct smk_netlbladdr *skp = (struct smk_netlbladdr *) v; 660 struct smk_netlbladdr *skp = (struct smk_netlbladdr *) v;
665 unsigned char *hp = (char *) &skp->smk_host.sin_addr.s_addr; 661 unsigned char *hp = (char *) &skp->smk_host.sin_addr.s_addr;
666 __be32 bebits; 662 int maskn;
667 int maskn = 0; 663 u32 temp_mask = be32_to_cpu(skp->smk_mask.s_addr);
668 664
669 for (bebits = BEMASK; bebits != 0; maskn++, bebits <<= 1) 665 for (maskn = 0; temp_mask; temp_mask <<= 1, maskn++);
670 if ((skp->smk_mask.s_addr & bebits) == 0)
671 break;
672 666
673 seq_printf(s, "%u.%u.%u.%u/%d %s\n", 667 seq_printf(s, "%u.%u.%u.%u/%d %s\n",
674 hp[0], hp[1], hp[2], hp[3], maskn, skp->smk_label); 668 hp[0], hp[1], hp[2], hp[3], maskn, skp->smk_label);
@@ -702,6 +696,42 @@ static int smk_open_netlbladdr(struct inode *inode, struct file *file)
702} 696}
703 697
704/** 698/**
699 * smk_netlbladdr_insert
700 * @new : netlabel to insert
701 *
702 * This helper insert netlabel in the smack_netlbladdrs list
703 * sorted by netmask length (longest to smallest)
704 */
705static void smk_netlbladdr_insert(struct smk_netlbladdr *new)
706{
707 struct smk_netlbladdr *m;
708
709 if (smack_netlbladdrs == NULL) {
710 smack_netlbladdrs = new;
711 return;
712 }
713
714 /* the comparison '>' is a bit hacky, but works */
715 if (new->smk_mask.s_addr > smack_netlbladdrs->smk_mask.s_addr) {
716 new->smk_next = smack_netlbladdrs;
717 smack_netlbladdrs = new;
718 return;
719 }
720 for (m = smack_netlbladdrs; m != NULL; m = m->smk_next) {
721 if (m->smk_next == NULL) {
722 m->smk_next = new;
723 return;
724 }
725 if (new->smk_mask.s_addr > m->smk_next->smk_mask.s_addr) {
726 new->smk_next = m->smk_next;
727 m->smk_next = new;
728 return;
729 }
730 }
731}
732
733
734/**
705 * smk_write_netlbladdr - write() for /smack/netlabel 735 * smk_write_netlbladdr - write() for /smack/netlabel
706 * @filp: file pointer, not actually used 736 * @filp: file pointer, not actually used
707 * @buf: where to get the data from 737 * @buf: where to get the data from
@@ -724,8 +754,9 @@ static ssize_t smk_write_netlbladdr(struct file *file, const char __user *buf,
724 struct netlbl_audit audit_info; 754 struct netlbl_audit audit_info;
725 struct in_addr mask; 755 struct in_addr mask;
726 unsigned int m; 756 unsigned int m;
727 __be32 bebits = BEMASK; 757 u32 mask_bits = (1<<31);
728 __be32 nsa; 758 __be32 nsa;
759 u32 temp_mask;
729 760
730 /* 761 /*
731 * Must have privilege. 762 * Must have privilege.
@@ -761,10 +792,13 @@ static ssize_t smk_write_netlbladdr(struct file *file, const char __user *buf,
761 if (sp == NULL) 792 if (sp == NULL)
762 return -EINVAL; 793 return -EINVAL;
763 794
764 for (mask.s_addr = 0; m > 0; m--) { 795 for (temp_mask = 0; m > 0; m--) {
765 mask.s_addr |= bebits; 796 temp_mask |= mask_bits;
766 bebits <<= 1; 797 mask_bits >>= 1;
767 } 798 }
799 mask.s_addr = cpu_to_be32(temp_mask);
800
801 newname.sin_addr.s_addr &= mask.s_addr;
768 /* 802 /*
769 * Only allow one writer at a time. Writes should be 803 * Only allow one writer at a time. Writes should be
770 * quite rare and small in any case. 804 * quite rare and small in any case.
@@ -772,6 +806,7 @@ static ssize_t smk_write_netlbladdr(struct file *file, const char __user *buf,
772 mutex_lock(&smk_netlbladdr_lock); 806 mutex_lock(&smk_netlbladdr_lock);
773 807
774 nsa = newname.sin_addr.s_addr; 808 nsa = newname.sin_addr.s_addr;
809 /* try to find if the prefix is already in the list */
775 for (skp = smack_netlbladdrs; skp != NULL; skp = skp->smk_next) 810 for (skp = smack_netlbladdrs; skp != NULL; skp = skp->smk_next)
776 if (skp->smk_host.sin_addr.s_addr == nsa && 811 if (skp->smk_host.sin_addr.s_addr == nsa &&
777 skp->smk_mask.s_addr == mask.s_addr) 812 skp->smk_mask.s_addr == mask.s_addr)
@@ -787,9 +822,8 @@ static ssize_t smk_write_netlbladdr(struct file *file, const char __user *buf,
787 rc = 0; 822 rc = 0;
788 skp->smk_host.sin_addr.s_addr = newname.sin_addr.s_addr; 823 skp->smk_host.sin_addr.s_addr = newname.sin_addr.s_addr;
789 skp->smk_mask.s_addr = mask.s_addr; 824 skp->smk_mask.s_addr = mask.s_addr;
790 skp->smk_next = smack_netlbladdrs;
791 skp->smk_label = sp; 825 skp->smk_label = sp;
792 smack_netlbladdrs = skp; 826 smk_netlbladdr_insert(skp);
793 } 827 }
794 } else { 828 } else {
795 rc = netlbl_cfg_unlbl_static_del(&init_net, NULL, 829 rc = netlbl_cfg_unlbl_static_del(&init_net, NULL,
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
index 3bc427645da8..6094344fb223 100644
--- a/sound/pci/hda/patch_sigmatel.c
+++ b/sound/pci/hda/patch_sigmatel.c
@@ -1207,7 +1207,7 @@ static const char *slave_vols[] = {
1207 "LFE Playback Volume", 1207 "LFE Playback Volume",
1208 "Side Playback Volume", 1208 "Side Playback Volume",
1209 "Headphone Playback Volume", 1209 "Headphone Playback Volume",
1210 "Headphone Playback Volume", 1210 "Headphone2 Playback Volume",
1211 "Speaker Playback Volume", 1211 "Speaker Playback Volume",
1212 "External Speaker Playback Volume", 1212 "External Speaker Playback Volume",
1213 "Speaker2 Playback Volume", 1213 "Speaker2 Playback Volume",
@@ -1221,7 +1221,7 @@ static const char *slave_sws[] = {
1221 "LFE Playback Switch", 1221 "LFE Playback Switch",
1222 "Side Playback Switch", 1222 "Side Playback Switch",
1223 "Headphone Playback Switch", 1223 "Headphone Playback Switch",
1224 "Headphone Playback Switch", 1224 "Headphone2 Playback Switch",
1225 "Speaker Playback Switch", 1225 "Speaker Playback Switch",
1226 "External Speaker Playback Switch", 1226 "External Speaker Playback Switch",
1227 "Speaker2 Playback Switch", 1227 "Speaker2 Playback Switch",
@@ -3516,6 +3516,7 @@ static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out
3516 if (! spec->autocfg.line_outs) 3516 if (! spec->autocfg.line_outs)
3517 return 0; /* can't find valid pin config */ 3517 return 0; /* can't find valid pin config */
3518 3518
3519#if 0 /* FIXME: temporarily disabled */
3519 /* If we have no real line-out pin and multiple hp-outs, HPs should 3520 /* If we have no real line-out pin and multiple hp-outs, HPs should
3520 * be set up as multi-channel outputs. 3521 * be set up as multi-channel outputs.
3521 */ 3522 */
@@ -3535,6 +3536,7 @@ static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out
3535 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT; 3536 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3536 spec->autocfg.hp_outs = 0; 3537 spec->autocfg.hp_outs = 0;
3537 } 3538 }
3539#endif /* FIXME: temporarily disabled */
3538 if (spec->autocfg.mono_out_pin) { 3540 if (spec->autocfg.mono_out_pin) {
3539 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) & 3541 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3540 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP); 3542 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);