1 files changed, 9 insertions, 9 deletions

diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 7e71bb6270eb..59e33a3bf7f3 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -47,7 +47,7 @@
 #define MX2_TSTAT_CAPT          (1 << 1)
 #define MX2_TSTAT_COMP          (1 << 0)
 
-/* MX31, MX35 */
+/* MX31, MX35, MX25 */
 #define MX3_TCTL_WAITEN         (1 << 3)
 #define MX3_TCTL_CLK_IPG        (1 << 6)
 #define MX3_TCTL_FRR            (1 << 9)
@@ -66,7 +66,7 @@ static inline void gpt_irq_disable(void)
 {
         unsigned int tmp;
 
-        if (cpu_is_mx3())
+        if (cpu_is_mx3() || cpu_is_mx25())
                 __raw_writel(0, timer_base + MX3_IR);
         else {
                 tmp = __raw_readl(timer_base + MXC_TCTL);
@@ -76,7 +76,7 @@ static inline void gpt_irq_disable(void)
 
 static inline void gpt_irq_enable(void)
 {
-        if (cpu_is_mx3())
+        if (cpu_is_mx3() || cpu_is_mx25())
                 __raw_writel(1<<0, timer_base + MX3_IR);
         else {
                 __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN,
@@ -90,7 +90,7 @@ static void gpt_irq_acknowledge(void)
                 __raw_writel(0, timer_base + MX1_2_TSTAT);
         if (cpu_is_mx2())
                 __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, timer_base + MX1_2_TSTAT);
-        if (cpu_is_mx3())
+        if (cpu_is_mx3() || cpu_is_mx25())
                 __raw_writel(MX3_TSTAT_OF1, timer_base + MX3_TSTAT);
 }
 
@@ -117,7 +117,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
 {
         unsigned int c = clk_get_rate(timer_clk);
 
-        if (cpu_is_mx3())
+        if (cpu_is_mx3() || cpu_is_mx25())
                 clocksource_mxc.read = mx3_get_cycles;
 
         clocksource_mxc.mult = clocksource_hz2mult(c,
@@ -180,7 +180,7 @@ static void mxc_set_mode(enum clock_event_mode mode,
 
         if (mode != clockevent_mode) {
                 /* Set event time into far-far future */
-                if (cpu_is_mx3())
+                if (cpu_is_mx3() || cpu_is_mx25())
                         __raw_writel(__raw_readl(timer_base + MX3_TCN) - 3,
                                         timer_base + MX3_TCMP);
                 else
@@ -233,7 +233,7 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)
         struct clock_event_device *evt = &clockevent_mxc;
         uint32_t tstat;
 
-        if (cpu_is_mx3())
+        if (cpu_is_mx3() || cpu_is_mx25())
                 tstat = __raw_readl(timer_base + MX3_TSTAT);
         else
                 tstat = __raw_readl(timer_base + MX1_2_TSTAT);
@@ -264,7 +264,7 @@ static int __init mxc_clockevent_init(struct clk *timer_clk)
 {
         unsigned int c = clk_get_rate(timer_clk);
 
-        if (cpu_is_mx3())
+        if (cpu_is_mx3() || cpu_is_mx25())
                 clockevent_mxc.set_next_event = mx3_set_next_event;
 
         clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC,
@@ -296,7 +296,7 @@ void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
         __raw_writel(0, timer_base + MXC_TCTL);
         __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */
 
-        if (cpu_is_mx3())
+        if (cpu_is_mx3() || cpu_is_mx25())
                 tctl_val = MX3_TCTL_CLK_IPG | MX3_TCTL_FRR | MX3_TCTL_WAITEN | MXC_TCTL_TEN;
         else
                 tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN;