diff options
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600_blit_kms.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_object.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs690.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 2 |
9 files changed, 14 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 79082d4398ae..315e1341a942 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -1407,6 +1407,7 @@ int evergreen_mc_init(struct radeon_device *rdev) | |||
1407 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | 1407 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; |
1408 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | 1408 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; |
1409 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 1409 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
1410 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
1410 | r600_vram_gtt_location(rdev, &rdev->mc); | 1411 | r600_vram_gtt_location(rdev, &rdev->mc); |
1411 | radeon_update_bandwidth_info(rdev); | 1412 | radeon_update_bandwidth_info(rdev); |
1412 | 1413 | ||
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index e151f16a8f86..e59422320bb6 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -1030,6 +1030,7 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) | |||
1030 | return r; | 1030 | return r; |
1031 | } | 1031 | } |
1032 | rdev->cp.ready = true; | 1032 | rdev->cp.ready = true; |
1033 | rdev->mc.active_vram_size = rdev->mc.real_vram_size; | ||
1033 | return 0; | 1034 | return 0; |
1034 | } | 1035 | } |
1035 | 1036 | ||
@@ -1047,6 +1048,7 @@ void r100_cp_fini(struct radeon_device *rdev) | |||
1047 | void r100_cp_disable(struct radeon_device *rdev) | 1048 | void r100_cp_disable(struct radeon_device *rdev) |
1048 | { | 1049 | { |
1049 | /* Disable ring */ | 1050 | /* Disable ring */ |
1051 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
1050 | rdev->cp.ready = false; | 1052 | rdev->cp.ready = false; |
1051 | WREG32(RADEON_CP_CSQ_MODE, 0); | 1053 | WREG32(RADEON_CP_CSQ_MODE, 0); |
1052 | WREG32(RADEON_CP_CSQ_CNTL, 0); | 1054 | WREG32(RADEON_CP_CSQ_CNTL, 0); |
@@ -2295,6 +2297,7 @@ void r100_vram_init_sizes(struct radeon_device *rdev) | |||
2295 | /* FIXME we don't use the second aperture yet when we could use it */ | 2297 | /* FIXME we don't use the second aperture yet when we could use it */ |
2296 | if (rdev->mc.visible_vram_size > rdev->mc.aper_size) | 2298 | if (rdev->mc.visible_vram_size > rdev->mc.aper_size) |
2297 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 2299 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
2300 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
2298 | config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE); | 2301 | config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE); |
2299 | if (rdev->flags & RADEON_IS_IGP) { | 2302 | if (rdev->flags & RADEON_IS_IGP) { |
2300 | uint32_t tom; | 2303 | uint32_t tom; |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 7a04959ba0ee..ba05d3e7d145 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -1248,6 +1248,7 @@ int r600_mc_init(struct radeon_device *rdev) | |||
1248 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); | 1248 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); |
1249 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); | 1249 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); |
1250 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 1250 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
1251 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
1251 | r600_vram_gtt_location(rdev, &rdev->mc); | 1252 | r600_vram_gtt_location(rdev, &rdev->mc); |
1252 | 1253 | ||
1253 | if (rdev->flags & RADEON_IS_IGP) { | 1254 | if (rdev->flags & RADEON_IS_IGP) { |
@@ -1917,6 +1918,7 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v) | |||
1917 | */ | 1918 | */ |
1918 | void r600_cp_stop(struct radeon_device *rdev) | 1919 | void r600_cp_stop(struct radeon_device *rdev) |
1919 | { | 1920 | { |
1921 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
1920 | WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1)); | 1922 | WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1)); |
1921 | } | 1923 | } |
1922 | 1924 | ||
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c index 9ceb2a1ce799..3473c00781ff 100644 --- a/drivers/gpu/drm/radeon/r600_blit_kms.c +++ b/drivers/gpu/drm/radeon/r600_blit_kms.c | |||
@@ -532,6 +532,7 @@ int r600_blit_init(struct radeon_device *rdev) | |||
532 | memcpy(ptr + rdev->r600_blit.ps_offset, r6xx_ps, r6xx_ps_size * 4); | 532 | memcpy(ptr + rdev->r600_blit.ps_offset, r6xx_ps, r6xx_ps_size * 4); |
533 | radeon_bo_kunmap(rdev->r600_blit.shader_obj); | 533 | radeon_bo_kunmap(rdev->r600_blit.shader_obj); |
534 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); | 534 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); |
535 | rdev->mc.active_vram_size = rdev->mc.real_vram_size; | ||
535 | return 0; | 536 | return 0; |
536 | } | 537 | } |
537 | 538 | ||
@@ -539,6 +540,7 @@ void r600_blit_fini(struct radeon_device *rdev) | |||
539 | { | 540 | { |
540 | int r; | 541 | int r; |
541 | 542 | ||
543 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
542 | if (rdev->r600_blit.shader_obj == NULL) | 544 | if (rdev->r600_blit.shader_obj == NULL) |
543 | return; | 545 | return; |
544 | /* If we can't reserve the bo, unref should be enough to destroy | 546 | /* If we can't reserve the bo, unref should be enough to destroy |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index a168d644bf9e..9ff38c99a6ea 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -344,6 +344,7 @@ struct radeon_mc { | |||
344 | * about vram size near mc fb location */ | 344 | * about vram size near mc fb location */ |
345 | u64 mc_vram_size; | 345 | u64 mc_vram_size; |
346 | u64 visible_vram_size; | 346 | u64 visible_vram_size; |
347 | u64 active_vram_size; | ||
347 | u64 gtt_size; | 348 | u64 gtt_size; |
348 | u64 gtt_start; | 349 | u64 gtt_start; |
349 | u64 gtt_end; | 350 | u64 gtt_end; |
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 0afd1e62347d..b3b5306bb578 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c | |||
@@ -69,7 +69,7 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) | |||
69 | u32 c = 0; | 69 | u32 c = 0; |
70 | 70 | ||
71 | rbo->placement.fpfn = 0; | 71 | rbo->placement.fpfn = 0; |
72 | rbo->placement.lpfn = 0; | 72 | rbo->placement.lpfn = rbo->rdev->mc.active_vram_size >> PAGE_SHIFT; |
73 | rbo->placement.placement = rbo->placements; | 73 | rbo->placement.placement = rbo->placements; |
74 | rbo->placement.busy_placement = rbo->placements; | 74 | rbo->placement.busy_placement = rbo->placements; |
75 | if (domain & RADEON_GEM_DOMAIN_VRAM) | 75 | if (domain & RADEON_GEM_DOMAIN_VRAM) |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index cc05b230d7ef..51d5f7b5ab21 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -693,6 +693,7 @@ void rs600_mc_init(struct radeon_device *rdev) | |||
693 | rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); | 693 | rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); |
694 | rdev->mc.mc_vram_size = rdev->mc.real_vram_size; | 694 | rdev->mc.mc_vram_size = rdev->mc.real_vram_size; |
695 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 695 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
696 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
696 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); | 697 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); |
697 | base = RREG32_MC(R_000004_MC_FB_LOCATION); | 698 | base = RREG32_MC(R_000004_MC_FB_LOCATION); |
698 | base = G_000004_MC_FB_START(base) << 16; | 699 | base = G_000004_MC_FB_START(base) << 16; |
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index 3e3f75718be3..4dc2a87ea680 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c | |||
@@ -157,6 +157,7 @@ void rs690_mc_init(struct radeon_device *rdev) | |||
157 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); | 157 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
158 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); | 158 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
159 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 159 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
160 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
160 | base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); | 161 | base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); |
161 | base = G_000100_MC_FB_START(base) << 16; | 162 | base = G_000100_MC_FB_START(base) << 16; |
162 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); | 163 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index bfa59db374d2..9490da700749 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -267,6 +267,7 @@ static void rv770_mc_program(struct radeon_device *rdev) | |||
267 | */ | 267 | */ |
268 | void r700_cp_stop(struct radeon_device *rdev) | 268 | void r700_cp_stop(struct radeon_device *rdev) |
269 | { | 269 | { |
270 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
270 | WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT)); | 271 | WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT)); |
271 | } | 272 | } |
272 | 273 | ||
@@ -992,6 +993,7 @@ int rv770_mc_init(struct radeon_device *rdev) | |||
992 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); | 993 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); |
993 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); | 994 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); |
994 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 995 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
996 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | ||
995 | r600_vram_gtt_location(rdev, &rdev->mc); | 997 | r600_vram_gtt_location(rdev, &rdev->mc); |
996 | radeon_update_bandwidth_info(rdev); | 998 | radeon_update_bandwidth_info(rdev); |
997 | 999 | ||