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-rw-r--r--drivers/ata/libata-core.c2
-rw-r--r--drivers/ata/pata_cs5536.c4
-rw-r--r--drivers/ata/sata_sis.c15
3 files changed, 12 insertions, 9 deletions
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index bbaa545ea999..629eadbd0ec0 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -1392,7 +1392,7 @@ static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1392 * @tf: Taskfile registers for the command and the result 1392 * @tf: Taskfile registers for the command and the result
1393 * @cdb: CDB for packet command 1393 * @cdb: CDB for packet command
1394 * @dma_dir: Data tranfer direction of the command 1394 * @dma_dir: Data tranfer direction of the command
1395 * @sg: sg list for the data buffer of the command 1395 * @sgl: sg list for the data buffer of the command
1396 * @n_elem: Number of sg entries 1396 * @n_elem: Number of sg entries
1397 * @timeout: Timeout in msecs (0 for default) 1397 * @timeout: Timeout in msecs (0 for default)
1398 * 1398 *
diff --git a/drivers/ata/pata_cs5536.c b/drivers/ata/pata_cs5536.c
index 53070f6b1fc4..d753e568588e 100644
--- a/drivers/ata/pata_cs5536.c
+++ b/drivers/ata/pata_cs5536.c
@@ -40,7 +40,7 @@
40#include <asm/msr.h> 40#include <asm/msr.h>
41 41
42#define DRV_NAME "pata_cs5536" 42#define DRV_NAME "pata_cs5536"
43#define DRV_VERSION "0.0.5" 43#define DRV_VERSION "0.0.6"
44 44
45enum { 45enum {
46 CFG = 0, 46 CFG = 0,
@@ -214,7 +214,7 @@ static void cs5536_set_dmamode(struct ata_port *ap, struct ata_device *adev)
214 cs5536_read(pdev, DTC, &dtc); 214 cs5536_read(pdev, DTC, &dtc);
215 215
216 dtc &= ~(IDE_DRV_MASK << dshift); 216 dtc &= ~(IDE_DRV_MASK << dshift);
217 dtc |= mwdma_timings[mode] << dshift; 217 dtc |= mwdma_timings[mode - XFER_MW_DMA_0] << dshift;
218 218
219 cs5536_write(pdev, DTC, dtc); 219 cs5536_write(pdev, DTC, dtc);
220 } 220 }
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c
index 8d98a9fb0a42..f147dc7bf464 100644
--- a/drivers/ata/sata_sis.c
+++ b/drivers/ata/sata_sis.c
@@ -92,7 +92,7 @@ static struct scsi_host_template sis_sht = {
92 .queuecommand = ata_scsi_queuecmd, 92 .queuecommand = ata_scsi_queuecmd,
93 .can_queue = ATA_DEF_QUEUE, 93 .can_queue = ATA_DEF_QUEUE,
94 .this_id = ATA_SHT_THIS_ID, 94 .this_id = ATA_SHT_THIS_ID,
95 .sg_tablesize = ATA_MAX_PRD, 95 .sg_tablesize = LIBATA_MAX_PRD,
96 .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 96 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
97 .emulated = ATA_SHT_EMULATED, 97 .emulated = ATA_SHT_EMULATED,
98 .use_clustering = ATA_SHT_USE_CLUSTERING, 98 .use_clustering = ATA_SHT_USE_CLUSTERING,
@@ -166,11 +166,11 @@ static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
166 return addr; 166 return addr;
167} 167}
168 168
169static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg) 169static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg, u32 *val)
170{ 170{
171 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 171 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
172 unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); 172 unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
173 u32 val, val2 = 0; 173 u32 val2 = 0;
174 u8 pmr; 174 u8 pmr;
175 175
176 if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */ 176 if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */
@@ -178,13 +178,16 @@ static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
178 178
179 pci_read_config_byte(pdev, SIS_PMR, &pmr); 179 pci_read_config_byte(pdev, SIS_PMR, &pmr);
180 180
181 pci_read_config_dword(pdev, cfg_addr, &val); 181 pci_read_config_dword(pdev, cfg_addr, val);
182 182
183 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || 183 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) ||
184 (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) 184 (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
185 pci_read_config_dword(pdev, cfg_addr+0x10, &val2); 185 pci_read_config_dword(pdev, cfg_addr+0x10, &val2);
186 186
187 return (val|val2) & 0xfffffffb; /* avoid problems with powerdowned ports */ 187 *val |= val2;
188 *val &= 0xfffffffb; /* avoid problems with powerdowned ports */
189
190 return 0;
188} 191}
189 192
190static void sis_scr_cfg_write (struct ata_port *ap, unsigned int sc_reg, u32 val) 193static void sis_scr_cfg_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
@@ -214,7 +217,7 @@ static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
214 return -EINVAL; 217 return -EINVAL;
215 218
216 if (ap->flags & SIS_FLAG_CFGSCR) 219 if (ap->flags & SIS_FLAG_CFGSCR)
217 return sis_scr_cfg_read(ap, sc_reg); 220 return sis_scr_cfg_read(ap, sc_reg, val);
218 221
219 pci_read_config_byte(pdev, SIS_PMR, &pmr); 222 pci_read_config_byte(pdev, SIS_PMR, &pmr);
220 223