diff options
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 39 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 5 |
2 files changed, 39 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index fe31b0db1e9c..b8b7f010b25f 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -675,6 +675,43 @@ static int evergreen_cp_load_microcode(struct radeon_device *rdev) | |||
675 | return 0; | 675 | return 0; |
676 | } | 676 | } |
677 | 677 | ||
678 | static int evergreen_cp_start(struct radeon_device *rdev) | ||
679 | { | ||
680 | int r; | ||
681 | uint32_t cp_me; | ||
682 | |||
683 | r = radeon_ring_lock(rdev, 7); | ||
684 | if (r) { | ||
685 | DRM_ERROR("radeon: cp failed to lock ring (%d).\n", r); | ||
686 | return r; | ||
687 | } | ||
688 | radeon_ring_write(rdev, PACKET3(PACKET3_ME_INITIALIZE, 5)); | ||
689 | radeon_ring_write(rdev, 0x1); | ||
690 | radeon_ring_write(rdev, 0x0); | ||
691 | radeon_ring_write(rdev, rdev->config.evergreen.max_hw_contexts - 1); | ||
692 | radeon_ring_write(rdev, PACKET3_ME_INITIALIZE_DEVICE_ID(1)); | ||
693 | radeon_ring_write(rdev, 0); | ||
694 | radeon_ring_write(rdev, 0); | ||
695 | radeon_ring_unlock_commit(rdev); | ||
696 | |||
697 | cp_me = 0xff; | ||
698 | WREG32(CP_ME_CNTL, cp_me); | ||
699 | |||
700 | r = radeon_ring_lock(rdev, 4); | ||
701 | if (r) { | ||
702 | DRM_ERROR("radeon: cp failed to lock ring (%d).\n", r); | ||
703 | return r; | ||
704 | } | ||
705 | /* init some VGT regs */ | ||
706 | radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); | ||
707 | radeon_ring_write(rdev, (VGT_VERTEX_REUSE_BLOCK_CNTL - PACKET3_SET_CONTEXT_REG_START) >> 2); | ||
708 | radeon_ring_write(rdev, 0xe); | ||
709 | radeon_ring_write(rdev, 0x10); | ||
710 | radeon_ring_unlock_commit(rdev); | ||
711 | |||
712 | return 0; | ||
713 | } | ||
714 | |||
678 | int evergreen_cp_resume(struct radeon_device *rdev) | 715 | int evergreen_cp_resume(struct radeon_device *rdev) |
679 | { | 716 | { |
680 | u32 tmp; | 717 | u32 tmp; |
@@ -719,7 +756,7 @@ int evergreen_cp_resume(struct radeon_device *rdev) | |||
719 | rdev->cp.rptr = RREG32(CP_RB_RPTR); | 756 | rdev->cp.rptr = RREG32(CP_RB_RPTR); |
720 | rdev->cp.wptr = RREG32(CP_RB_WPTR); | 757 | rdev->cp.wptr = RREG32(CP_RB_WPTR); |
721 | 758 | ||
722 | r600_cp_start(rdev); | 759 | evergreen_cp_start(rdev); |
723 | rdev->cp.ready = true; | 760 | rdev->cp.ready = true; |
724 | r = radeon_ring_test(rdev); | 761 | r = radeon_ring_test(rdev); |
725 | if (r) { | 762 | if (r) { |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 04f134d1aae7..afc18d87fdca 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -2119,10 +2119,7 @@ int r600_cp_start(struct radeon_device *rdev) | |||
2119 | } | 2119 | } |
2120 | radeon_ring_write(rdev, PACKET3(PACKET3_ME_INITIALIZE, 5)); | 2120 | radeon_ring_write(rdev, PACKET3(PACKET3_ME_INITIALIZE, 5)); |
2121 | radeon_ring_write(rdev, 0x1); | 2121 | radeon_ring_write(rdev, 0x1); |
2122 | if (rdev->family >= CHIP_CEDAR) { | 2122 | if (rdev->family >= CHIP_RV770) { |
2123 | radeon_ring_write(rdev, 0x0); | ||
2124 | radeon_ring_write(rdev, rdev->config.evergreen.max_hw_contexts - 1); | ||
2125 | } else if (rdev->family >= CHIP_RV770) { | ||
2126 | radeon_ring_write(rdev, 0x0); | 2123 | radeon_ring_write(rdev, 0x0); |
2127 | radeon_ring_write(rdev, rdev->config.rv770.max_hw_contexts - 1); | 2124 | radeon_ring_write(rdev, rdev->config.rv770.max_hw_contexts - 1); |
2128 | } else { | 2125 | } else { |