diff options
-rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 6e808612d170..351afd0e36d8 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
@@ -1152,23 +1152,22 @@ void do_irq(int vec, struct pt_regs *fp) | |||
1152 | } else { | 1152 | } else { |
1153 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; | 1153 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; |
1154 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; | 1154 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; |
1155 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \ | 1155 | #if defined(SIC_ISR0) || defined(SICA_ISR0) |
1156 | || defined(BF538_FAMILY) || defined(CONFIG_BF51x) | ||
1157 | unsigned long sic_status[3]; | 1156 | unsigned long sic_status[3]; |
1158 | 1157 | ||
1159 | if (smp_processor_id()) { | 1158 | if (smp_processor_id()) { |
1160 | #ifdef CONFIG_SMP | 1159 | # ifdef SICB_ISR0 |
1161 | /* This will be optimized out in UP mode. */ | 1160 | /* This will be optimized out in UP mode. */ |
1162 | sic_status[0] = bfin_read_SICB_ISR0() & bfin_read_SICB_IMASK0(); | 1161 | sic_status[0] = bfin_read_SICB_ISR0() & bfin_read_SICB_IMASK0(); |
1163 | sic_status[1] = bfin_read_SICB_ISR1() & bfin_read_SICB_IMASK1(); | 1162 | sic_status[1] = bfin_read_SICB_ISR1() & bfin_read_SICB_IMASK1(); |
1164 | #endif | 1163 | # endif |
1165 | } else { | 1164 | } else { |
1166 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); | 1165 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); |
1167 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); | 1166 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); |
1168 | } | 1167 | } |
1169 | #ifdef CONFIG_BF54x | 1168 | # ifdef SIC_ISR2 |
1170 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); | 1169 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); |
1171 | #endif | 1170 | # endif |
1172 | for (;; ivg++) { | 1171 | for (;; ivg++) { |
1173 | if (ivg >= ivg_stop) { | 1172 | if (ivg >= ivg_stop) { |
1174 | atomic_inc(&num_spurious); | 1173 | atomic_inc(&num_spurious); |
@@ -1234,14 +1233,14 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) | |||
1234 | irq = IRQ_CORETMR; | 1233 | irq = IRQ_CORETMR; |
1235 | 1234 | ||
1236 | } else { | 1235 | } else { |
1237 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) | 1236 | #if defined(SIC_ISR0) || defined(SICA_ISR0) |
1238 | unsigned long sic_status[3]; | 1237 | unsigned long sic_status[3]; |
1239 | 1238 | ||
1240 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); | 1239 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); |
1241 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); | 1240 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); |
1242 | #ifdef CONFIG_BF54x | 1241 | # ifdef SIC_ISR2 |
1243 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); | 1242 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); |
1244 | #endif | 1243 | # endif |
1245 | for (;; ivg++) { | 1244 | for (;; ivg++) { |
1246 | if (ivg >= ivg_stop) { | 1245 | if (ivg >= ivg_stop) { |
1247 | atomic_inc(&num_spurious); | 1246 | atomic_inc(&num_spurious); |