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-rw-r--r--drivers/net/wireless/ath9k/hw.c8
-rw-r--r--drivers/net/wireless/ath9k/reg.h8
2 files changed, 14 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c
index e33c53fb6b7e..1c02358b31f5 100644
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -1482,6 +1482,14 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
1482 u32 rst_flags; 1482 u32 rst_flags;
1483 u32 tmpReg; 1483 u32 tmpReg;
1484 1484
1485 if (AR_SREV_9100(ah)) {
1486 u32 val = REG_READ(ah, AR_RTC_DERIVED_CLK);
1487 val &= ~AR_RTC_DERIVED_CLK_PERIOD;
1488 val |= SM(1, AR_RTC_DERIVED_CLK_PERIOD);
1489 REG_WRITE(ah, AR_RTC_DERIVED_CLK, val);
1490 (void)REG_READ(ah, AR_RTC_DERIVED_CLK);
1491 }
1492
1485 REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN | 1493 REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
1486 AR_RTC_FORCE_WAKE_ON_INT); 1494 AR_RTC_FORCE_WAKE_ON_INT);
1487 1495
diff --git a/drivers/net/wireless/ath9k/reg.h b/drivers/net/wireless/ath9k/reg.h
index a471832308a0..8d85106d6df2 100644
--- a/drivers/net/wireless/ath9k/reg.h
+++ b/drivers/net/wireless/ath9k/reg.h
@@ -977,8 +977,6 @@ enum {
977#define AR_RTC_PLL_CLKSEL 0x00000300 977#define AR_RTC_PLL_CLKSEL 0x00000300
978#define AR_RTC_PLL_CLKSEL_S 8 978#define AR_RTC_PLL_CLKSEL_S 8
979 979
980
981
982#define AR_RTC_RESET \ 980#define AR_RTC_RESET \
983 ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0040) : 0x7040) 981 ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0040) : 0x7040)
984#define AR_RTC_RESET_EN (0x00000001) 982#define AR_RTC_RESET_EN (0x00000001)
@@ -1015,6 +1013,12 @@ enum {
1015#define AR_RTC_INTR_MASK \ 1013#define AR_RTC_INTR_MASK \
1016 ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0058) : 0x7058) 1014 ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0058) : 0x7058)
1017 1015
1016/* RTC_DERIVED_* - only for AR9100 */
1017
1018#define AR_RTC_DERIVED_CLK (AR_RTC_BASE + 0x0038)
1019#define AR_RTC_DERIVED_CLK_PERIOD 0x0000fffe
1020#define AR_RTC_DERIVED_CLK_PERIOD_S 1
1021
1018#define AR_SEQ_MASK 0x8060 1022#define AR_SEQ_MASK 0x8060
1019 1023
1020#define AR_AN_RF2G1_CH0 0x7810 1024#define AR_AN_RF2G1_CH0 0x7810