diff options
-rw-r--r-- | drivers/ssb/pci.c | 34 | ||||
-rw-r--r-- | include/linux/ssb/ssb_regs.h | 4 |
2 files changed, 14 insertions, 24 deletions
diff --git a/drivers/ssb/pci.c b/drivers/ssb/pci.c index 0de4b5e04505..d5cde051806b 100644 --- a/drivers/ssb/pci.c +++ b/drivers/ssb/pci.c | |||
@@ -327,11 +327,9 @@ static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in) | |||
327 | s8 gain; | 327 | s8 gain; |
328 | u16 loc[3]; | 328 | u16 loc[3]; |
329 | 329 | ||
330 | if (out->revision == 3) { /* rev 3 moved MAC */ | 330 | if (out->revision == 3) /* rev 3 moved MAC */ |
331 | loc[0] = SSB_SPROM3_IL0MAC; | 331 | loc[0] = SSB_SPROM3_IL0MAC; |
332 | loc[1] = SSB_SPROM3_ET0MAC; | 332 | else { |
333 | loc[2] = SSB_SPROM3_ET1MAC; | ||
334 | } else { | ||
335 | loc[0] = SSB_SPROM1_IL0MAC; | 333 | loc[0] = SSB_SPROM1_IL0MAC; |
336 | loc[1] = SSB_SPROM1_ET0MAC; | 334 | loc[1] = SSB_SPROM1_ET0MAC; |
337 | loc[2] = SSB_SPROM1_ET1MAC; | 335 | loc[2] = SSB_SPROM1_ET1MAC; |
@@ -340,13 +338,15 @@ static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in) | |||
340 | v = in[SPOFF(loc[0]) + i]; | 338 | v = in[SPOFF(loc[0]) + i]; |
341 | *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v); | 339 | *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v); |
342 | } | 340 | } |
343 | for (i = 0; i < 3; i++) { | 341 | if (out->revision < 3) { /* only rev 1-2 have et0, et1 */ |
344 | v = in[SPOFF(loc[1]) + i]; | 342 | for (i = 0; i < 3; i++) { |
345 | *(((__be16 *)out->et0mac) + i) = cpu_to_be16(v); | 343 | v = in[SPOFF(loc[1]) + i]; |
346 | } | 344 | *(((__be16 *)out->et0mac) + i) = cpu_to_be16(v); |
347 | for (i = 0; i < 3; i++) { | 345 | } |
348 | v = in[SPOFF(loc[2]) + i]; | 346 | for (i = 0; i < 3; i++) { |
349 | *(((__be16 *)out->et1mac) + i) = cpu_to_be16(v); | 347 | v = in[SPOFF(loc[2]) + i]; |
348 | *(((__be16 *)out->et1mac) + i) = cpu_to_be16(v); | ||
349 | } | ||
350 | } | 350 | } |
351 | SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0); | 351 | SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0); |
352 | SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A, | 352 | SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A, |
@@ -409,19 +409,11 @@ static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in) | |||
409 | il0mac_offset = SSB_SPROM4_IL0MAC; | 409 | il0mac_offset = SSB_SPROM4_IL0MAC; |
410 | else | 410 | else |
411 | il0mac_offset = SSB_SPROM5_IL0MAC; | 411 | il0mac_offset = SSB_SPROM5_IL0MAC; |
412 | /* extract the equivalent of the r1 variables */ | 412 | /* extract the MAC address */ |
413 | for (i = 0; i < 3; i++) { | 413 | for (i = 0; i < 3; i++) { |
414 | v = in[SPOFF(il0mac_offset) + i]; | 414 | v = in[SPOFF(il0mac_offset) + i]; |
415 | *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v); | 415 | *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v); |
416 | } | 416 | } |
417 | for (i = 0; i < 3; i++) { | ||
418 | v = in[SPOFF(SSB_SPROM4_ET0MAC) + i]; | ||
419 | *(((__be16 *)out->et0mac) + i) = cpu_to_be16(v); | ||
420 | } | ||
421 | for (i = 0; i < 3; i++) { | ||
422 | v = in[SPOFF(SSB_SPROM4_ET1MAC) + i]; | ||
423 | *(((__be16 *)out->et1mac) + i) = cpu_to_be16(v); | ||
424 | } | ||
425 | SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0); | 417 | SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0); |
426 | SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A, | 418 | SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A, |
427 | SSB_SPROM4_ETHPHY_ET1A_SHIFT); | 419 | SSB_SPROM4_ETHPHY_ET1A_SHIFT); |
@@ -482,6 +474,8 @@ static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out, | |||
482 | 474 | ||
483 | out->revision = in[size - 1] & 0x00FF; | 475 | out->revision = in[size - 1] & 0x00FF; |
484 | ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision); | 476 | ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision); |
477 | memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */ | ||
478 | memset(out->et1mac, 0xFF, 6); | ||
485 | if ((bus->chip_id & 0xFF00) == 0x4400) { | 479 | if ((bus->chip_id & 0xFF00) == 0x4400) { |
486 | /* Workaround: The BCM44XX chip has a stupid revision | 480 | /* Workaround: The BCM44XX chip has a stupid revision |
487 | * number stored in the SPROM. | 481 | * number stored in the SPROM. |
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h index 271bb4b6446e..99a0f991e850 100644 --- a/include/linux/ssb/ssb_regs.h +++ b/include/linux/ssb/ssb_regs.h | |||
@@ -245,8 +245,6 @@ | |||
245 | 245 | ||
246 | /* SPROM Revision 3 (inherits most data from rev 2) */ | 246 | /* SPROM Revision 3 (inherits most data from rev 2) */ |
247 | #define SSB_SPROM3_IL0MAC 0x104A /* 6 bytes MAC address for 802.11b/g */ | 247 | #define SSB_SPROM3_IL0MAC 0x104A /* 6 bytes MAC address for 802.11b/g */ |
248 | #define SSB_SPROM3_ET0MAC 0x1050 /* 6 bytes MAC address for Ethernet ?? */ | ||
249 | #define SSB_SPROM3_ET1MAC 0x1050 /* 6 bytes MAC address for 802.11a ?? */ | ||
250 | #define SSB_SPROM3_OFDMAPO 0x102C /* A-PHY OFDM Mid Power Offset (4 bytes, BigEndian) */ | 248 | #define SSB_SPROM3_OFDMAPO 0x102C /* A-PHY OFDM Mid Power Offset (4 bytes, BigEndian) */ |
251 | #define SSB_SPROM3_OFDMALPO 0x1030 /* A-PHY OFDM Low Power Offset (4 bytes, BigEndian) */ | 249 | #define SSB_SPROM3_OFDMALPO 0x1030 /* A-PHY OFDM Low Power Offset (4 bytes, BigEndian) */ |
252 | #define SSB_SPROM3_OFDMAHPO 0x1034 /* A-PHY OFDM High Power Offset (4 bytes, BigEndian) */ | 250 | #define SSB_SPROM3_OFDMAHPO 0x1034 /* A-PHY OFDM High Power Offset (4 bytes, BigEndian) */ |
@@ -267,8 +265,6 @@ | |||
267 | 265 | ||
268 | /* SPROM Revision 4 */ | 266 | /* SPROM Revision 4 */ |
269 | #define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for a/b/g/n */ | 267 | #define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for a/b/g/n */ |
270 | #define SSB_SPROM4_ET0MAC 0x1018 /* 6 bytes MAC address for Ethernet ?? */ | ||
271 | #define SSB_SPROM4_ET1MAC 0x1018 /* 6 bytes MAC address for 802.11a ?? */ | ||
272 | #define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings ?? */ | 268 | #define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings ?? */ |
273 | #define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */ | 269 | #define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */ |
274 | #define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */ | 270 | #define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */ |