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-rw-r--r--drivers/gpu/drm/radeon/atombios_dp.c24
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c221
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h4
-rw-r--r--include/drm/drm_dp_helper.h4
5 files changed, 105 insertions, 150 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index a4bc80113385..d1c144be9734 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -34,7 +34,7 @@
34#define DP_LINK_STATUS_SIZE 6 34#define DP_LINK_STATUS_SIZE 6
35 35
36bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes, 36bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes,
37 int num_bytes, u8 *read_byte, 37 int num_bytes, u8 *read_byte,
38 u8 read_buf_len, u8 delay) 38 u8 read_buf_len, u8 delay)
39{ 39{
40 struct drm_device *dev = chan->dev; 40 struct drm_device *dev = chan->dev;
@@ -42,9 +42,9 @@ bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes,
42 PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION args; 42 PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION args;
43 int index = GetIndexIntoMasterTable(COMMAND, ProcessAuxChannelTransaction); 43 int index = GetIndexIntoMasterTable(COMMAND, ProcessAuxChannelTransaction);
44 unsigned char *base; 44 unsigned char *base;
45 45
46 memset(&args, 0, sizeof(args)); 46 memset(&args, 0, sizeof(args));
47 47
48 base = (unsigned char *)rdev->mode_info.atom_context->scratch; 48 base = (unsigned char *)rdev->mode_info.atom_context->scratch;
49 49
50 memcpy(base, req_bytes, num_bytes); 50 memcpy(base, req_bytes, num_bytes);
@@ -53,7 +53,7 @@ bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes,
53 args.lpDataOut = 16; 53 args.lpDataOut = 16;
54 args.ucDataOutLen = 0; 54 args.ucDataOutLen = 0;
55 args.ucChannelID = chan->i2c_id; 55 args.ucChannelID = chan->i2c_id;
56 args.ucDelay = delay; 56 args.ucDelay = delay / 10;
57 57
58 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 58 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
59 59
@@ -158,24 +158,24 @@ bool radeon_dp_aux_native_read(struct radeon_connector *radeon_connector, uint16
158 return ret; 158 return ret;
159} 159}
160 160
161void radeon_dp_getdpcp(struct radeon_connector *radeon_connector) 161void radeon_dp_getdpcd(struct radeon_connector *radeon_connector)
162{ 162{
163 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; 163 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
164 u8 msg[25]; 164 u8 msg[25];
165 int ret; 165 int ret;
166 166
167 ret = radeon_dp_aux_native_read(radeon_connector, DP_DPCP_REV, 0, 8, msg); 167 ret = radeon_dp_aux_native_read(radeon_connector, DP_DPCD_REV, 0, 8, msg);
168 if (ret) { 168 if (ret) {
169 memcpy(radeon_dig_connector->dpcp, msg, 8); 169 memcpy(radeon_dig_connector->dpcd, msg, 8);
170 { 170 {
171 int i; 171 int i;
172 printk("DPCP: "); 172 printk("DPCD: ");
173 for (i = 0; i < 8; i++) 173 for (i = 0; i < 8; i++)
174 printk("%02x ", msg[i]); 174 printk("%02x ", msg[i]);
175 printk("\n"); 175 printk("\n");
176 } 176 }
177 } 177 }
178 radeon_dig_connector->dpcp[0] = 0; 178 radeon_dig_connector->dpcd[0] = 0;
179 return; 179 return;
180} 180}
181 181
@@ -199,8 +199,8 @@ static bool atom_dp_get_link_status(struct radeon_connector *radeon_connector,
199static void dp_set_power(struct radeon_connector *radeon_connector, u8 power_state) 199static void dp_set_power(struct radeon_connector *radeon_connector, u8 power_state)
200{ 200{
201 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; 201 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
202 if (radeon_dig_connector->dpcp[0] >= 0x11) { 202 if (radeon_dig_connector->dpcd[0] >= 0x11) {
203 radeon_dp_aux_native_write(radeon_connector, 0x600, 1, 203 radeon_dp_aux_native_write(radeon_connector, DP_SET_POWER, 1,
204 &power_state); 204 &power_state);
205 } 205 }
206} 206}
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 733427555ee1..4d457bc90141 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -923,7 +923,7 @@ static enum drm_connector_status radeon_dp_detect(struct drm_connector *connecto
923 923
924 sink_type = radeon_dp_getsinktype(radeon_connector); 924 sink_type = radeon_dp_getsinktype(radeon_connector);
925 if (sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { 925 if (sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
926 radeon_dp_getdpcp(radeon_connector); 926 radeon_dp_getdpcd(radeon_connector);
927 ret = connector_status_connected; 927 ret = connector_status_connected;
928 } 928 }
929 return ret; 929 return ret;
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 37f5ea1af969..b4e7abadbfb2 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -605,6 +605,30 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
605 } 605 }
606} 606}
607 607
608/*
609 * DIG Encoder/Transmitter Setup
610 *
611 * DCE 3.0/3.1
612 * - 2 DIG transmitter blocks. UNIPHY (links A and B) and LVTMA.
613 * Supports up to 3 digital outputs
614 * - 2 DIG encoder blocks.
615 * DIG1 can drive UNIPHY link A or link B
616 * DIG2 can drive UNIPHY link B or LVTMA
617 *
618 * DCE 3.2
619 * - 3 DIG transmitter blocks. UNIPHY0/1/2 (links A and B).
620 * Supports up to 5 digital outputs
621 * - 2 DIG encoder blocks.
622 * DIG1/2 can drive UNIPHY0/1/2 link A or link B
623 *
624 * Routing
625 * crtc -> dig encoder -> UNIPHY/LVTMA (1 or 2 links)
626 * Examples:
627 * crtc0 -> dig2 -> LVTMA links A+B -> TMDS/HDMI
628 * crtc1 -> dig1 -> UNIPHY0 link B -> DP
629 * crtc0 -> dig1 -> UNIPHY2 link A -> LVDS
630 * crtc1 -> dig2 -> UNIPHY1 link B+A -> TMDS/HDMI
631 */
608static void 632static void
609atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) 633atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
610{ 634{
@@ -646,10 +670,17 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
646 } else { 670 } else {
647 switch (radeon_encoder->encoder_id) { 671 switch (radeon_encoder->encoder_id) {
648 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 672 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
649 index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); 673 /* XXX doesn't really matter which dig encoder we pick as long as it's
674 * not already in use
675 */
676 if (dig_connector->linkb)
677 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
678 else
679 index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
650 num = 1; 680 num = 1;
651 break; 681 break;
652 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: 682 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
683 /* Only dig2 encoder can drive LVTMA */
653 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl); 684 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
654 num = 2; 685 num = 2;
655 break; 686 break;
@@ -684,16 +715,15 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
684 } 715 }
685 } 716 }
686 717
687 if (radeon_encoder->pixel_clock > 165000) { 718 if (radeon_encoder->pixel_clock > 165000)
688 args.ucConfig |= ATOM_ENCODER_CONFIG_LINKA_B;
689 args.ucLaneNum = 8; 719 args.ucLaneNum = 8;
690 } else { 720 else
691 if (dig_connector->linkb)
692 args.ucConfig |= ATOM_ENCODER_CONFIG_LINKB;
693 else
694 args.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;
695 args.ucLaneNum = 4; 721 args.ucLaneNum = 4;
696 } 722
723 if (dig_connector->linkb)
724 args.ucConfig |= ATOM_ENCODER_CONFIG_LINKB;
725 else
726 args.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;
697 727
698 args.ucEncoderMode = atombios_get_encoder_mode(encoder); 728 args.ucEncoderMode = atombios_get_encoder_mode(encoder);
699 729
@@ -707,7 +737,7 @@ union dig_transmitter_control {
707}; 737};
708 738
709static void 739static void
710atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action) 740atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t lane_num, uint8_t lane_set)
711{ 741{
712 struct drm_device *dev = encoder->dev; 742 struct drm_device *dev = encoder->dev;
713 struct radeon_device *rdev = dev->dev_private; 743 struct radeon_device *rdev = dev->dev_private;
@@ -756,6 +786,9 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
756 args.v1.ucAction = action; 786 args.v1.ucAction = action;
757 if (action == ATOM_TRANSMITTER_ACTION_INIT) { 787 if (action == ATOM_TRANSMITTER_ACTION_INIT) {
758 args.v1.usInitInfo = radeon_connector->connector_object_id; 788 args.v1.usInitInfo = radeon_connector->connector_object_id;
789 } else if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH) {
790 args.v1.asMode.ucLaneSel = lane_num;
791 args.v1.asMode.ucLaneSet = lane_set;
759 } else { 792 } else {
760 if (radeon_encoder->pixel_clock > 165000) 793 if (radeon_encoder->pixel_clock > 165000)
761 args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); 794 args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
@@ -767,6 +800,8 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
767 args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); 800 args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
768 if (dig->dig_block) 801 if (dig->dig_block)
769 args.v2.acConfig.ucEncoderSel = 1; 802 args.v2.acConfig.ucEncoderSel = 1;
803 if (dig_connector->linkb)
804 args.v2.acConfig.ucLinkSel = 1;
770 805
771 switch (radeon_encoder->encoder_id) { 806 switch (radeon_encoder->encoder_id) {
772 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 807 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
@@ -792,17 +827,20 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
792 827
793 switch (radeon_encoder->encoder_id) { 828 switch (radeon_encoder->encoder_id) {
794 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 829 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
795 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; 830 /* XXX doesn't really matter which dig encoder we pick as long as it's
831 * not already in use
832 */
833 if (dig_connector->linkb)
834 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
835 else
836 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
796 if (rdev->flags & RADEON_IS_IGP) { 837 if (rdev->flags & RADEON_IS_IGP) {
797 if (radeon_encoder->pixel_clock > 165000) { 838 if (radeon_encoder->pixel_clock > 165000) {
798 args.v1.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
799 ATOM_TRANSMITTER_CONFIG_LINKA_B);
800 if (dig_connector->igp_lane_info & 0x3) 839 if (dig_connector->igp_lane_info & 0x3)
801 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; 840 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7;
802 else if (dig_connector->igp_lane_info & 0xc) 841 else if (dig_connector->igp_lane_info & 0xc)
803 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; 842 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15;
804 } else { 843 } else {
805 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA;
806 if (dig_connector->igp_lane_info & 0x1) 844 if (dig_connector->igp_lane_info & 0x1)
807 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; 845 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3;
808 else if (dig_connector->igp_lane_info & 0x2) 846 else if (dig_connector->igp_lane_info & 0x2)
@@ -812,34 +850,22 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
812 else if (dig_connector->igp_lane_info & 0x8) 850 else if (dig_connector->igp_lane_info & 0x8)
813 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; 851 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15;
814 } 852 }
815 } else {
816 if (radeon_encoder->pixel_clock > 165000)
817 args.v1.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
818 ATOM_TRANSMITTER_CONFIG_LINKA_B |
819 ATOM_TRANSMITTER_CONFIG_LANE_0_7);
820 else {
821 if (dig_connector->linkb)
822 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
823 else
824 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
825 }
826 } 853 }
827 break; 854 break;
828 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: 855 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
856 /* Only dig2 encoder can drive LVTMA */
829 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER; 857 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
830 if (radeon_encoder->pixel_clock > 165000)
831 args.v1.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
832 ATOM_TRANSMITTER_CONFIG_LINKA_B |
833 ATOM_TRANSMITTER_CONFIG_LANE_0_7);
834 else {
835 if (dig_connector->linkb)
836 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
837 else
838 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
839 }
840 break; 858 break;
841 } 859 }
842 860
861 if (radeon_encoder->pixel_clock > 165000)
862 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK;
863
864 if (dig_connector->linkb)
865 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB;
866 else
867 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA;
868
843 if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { 869 if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
844 if (dig->coherent_mode) 870 if (dig->coherent_mode)
845 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; 871 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;
@@ -851,99 +877,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
851} 877}
852 878
853static void 879static void
854atombios_dig_transmitter_setup_vsemph(struct drm_encoder *encoder, u8 lane_num,
855 u8 lane_set)
856{
857 struct drm_device *dev = encoder->dev;
858 struct radeon_device *rdev = dev->dev_private;
859 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
860 union dig_transmitter_control args;
861 int index = 0, num = 0;
862 uint8_t frev, crev;
863 struct radeon_encoder_atom_dig *dig;
864 struct drm_connector *connector;
865 struct radeon_connector *radeon_connector;
866 struct radeon_connector_atom_dig *dig_connector;
867
868 connector = radeon_get_connector_for_encoder(encoder);
869 if (!connector)
870 return;
871
872 radeon_connector = to_radeon_connector(connector);
873
874 if (!radeon_encoder->enc_priv)
875 return;
876
877 dig = radeon_encoder->enc_priv;
878
879 if (!radeon_connector->con_priv)
880 return;
881
882 dig_connector = radeon_connector->con_priv;
883
884 memset(&args, 0, sizeof(args));
885
886 if (ASIC_IS_DCE32(rdev))
887 index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl);
888 else {
889 switch (radeon_encoder->encoder_id) {
890 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
891 index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl);
892 break;
893 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
894 index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl);
895 break;
896 }
897 }
898
899 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev);
900
901 args.v1.ucAction = ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH;
902 args.v1.asMode.ucLaneSel = lane_num;
903 args.v1.asMode.ucLaneSet = lane_set;
904
905 if (ASIC_IS_DCE32(rdev)) {
906 args.v2.acConfig.fDPConnector = 1;
907
908 if (dig->dig_block)
909 args.v2.acConfig.ucEncoderSel = 1;
910
911 switch (radeon_encoder->encoder_id) {
912 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
913 args.v2.acConfig.ucTransmitterSel = 0;
914 num = 0;
915 break;
916 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
917 args.v2.acConfig.ucTransmitterSel = 1;
918 num = 1;
919 break;
920 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
921 args.v2.acConfig.ucTransmitterSel = 2;
922 num = 2;
923 break;
924 }
925 } else {
926 args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
927
928 switch (radeon_encoder->encoder_id) {
929 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
930 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
931 if (dig_connector->linkb)
932 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
933 else
934 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
935 }
936 }
937
938 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
939
940 if (ASIC_IS_DCE32(rdev))
941 DRM_INFO("Output UNIPHY%d transmitter VSEMPH setup success\n", num);
942 else
943 DRM_INFO("Output DIG%d transmitter VSEMPH setup success\n", num);
944}
945
946static void
947atombios_yuv_setup(struct drm_encoder *encoder, bool enable) 880atombios_yuv_setup(struct drm_encoder *encoder, bool enable)
948{ 881{
949 struct drm_device *dev = encoder->dev; 882 struct drm_device *dev = encoder->dev;
@@ -1150,13 +1083,33 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
1150 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; 1083 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
1151 else 1084 else
1152 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; 1085 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
1153 } else 1086 } else {
1154 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; 1087 struct drm_connector *connector;
1088 struct radeon_connector *radeon_connector;
1089 struct radeon_connector_atom_dig *dig_connector;
1090
1091 connector = radeon_get_connector_for_encoder(encoder);
1092 if (!connector)
1093 return;
1094 radeon_connector = to_radeon_connector(connector);
1095 if (!radeon_connector->con_priv)
1096 return;
1097 dig_connector = radeon_connector->con_priv;
1098
1099 /* XXX doesn't really matter which dig encoder we pick as long as it's
1100 * not already in use
1101 */
1102 if (dig_connector->linkb)
1103 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
1104 else
1105 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
1106 }
1155 break; 1107 break;
1156 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: 1108 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
1157 args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID; 1109 args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID;
1158 break; 1110 break;
1159 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: 1111 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
1112 /* Only dig2 encoder can drive LVTMA */
1160 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; 1113 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
1161 break; 1114 break;
1162 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: 1115 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
@@ -1259,14 +1212,14 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1259 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: 1212 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
1260 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: 1213 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
1261 /* disable the encoder and transmitter */ 1214 /* disable the encoder and transmitter */
1262 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE); 1215 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
1263 atombios_dig_encoder_setup(encoder, ATOM_DISABLE); 1216 atombios_dig_encoder_setup(encoder, ATOM_DISABLE);
1264 1217
1265 /* setup and enable the encoder and transmitter */ 1218 /* setup and enable the encoder and transmitter */
1266 atombios_dig_encoder_setup(encoder, ATOM_ENABLE); 1219 atombios_dig_encoder_setup(encoder, ATOM_ENABLE);
1267 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT); 1220 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0);
1268 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP); 1221 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0);
1269 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE); 1222 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
1270 break; 1223 break;
1271 case ENCODER_OBJECT_ID_INTERNAL_DDI: 1224 case ENCODER_OBJECT_ID_INTERNAL_DDI:
1272 atombios_ddia_setup(encoder, ATOM_ENABLE); 1225 atombios_ddia_setup(encoder, ATOM_ENABLE);
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index ce1cdc748f1f..166f75395f52 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -335,7 +335,7 @@ struct radeon_connector_atom_dig {
335 bool linkb; 335 bool linkb;
336 uint16_t uc_i2c_id; 336 uint16_t uc_i2c_id;
337 struct radeon_i2c_chan *dp_i2c_bus; 337 struct radeon_i2c_chan *dp_i2c_bus;
338 u8 dpcp[8]; 338 u8 dpcd[8];
339}; 339};
340 340
341struct radeon_connector { 341struct radeon_connector {
@@ -362,7 +362,7 @@ struct radeon_framebuffer {
362}; 362};
363 363
364extern int radeon_dp_getsinktype(struct radeon_connector *radeon_connector); 364extern int radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
365extern void radeon_dp_getdpcp(struct radeon_connector *connector); 365extern void radeon_dp_getdpcd(struct radeon_connector *connector);
366extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, 366extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
367 uint8_t write_byte, uint8_t *read_byte); 367 uint8_t write_byte, uint8_t *read_byte);
368 368
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 376155f8f81f..f09b0b2a99b7 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -43,7 +43,7 @@
43#define AUX_I2C_REPLY_MASK (0x3 << 6) 43#define AUX_I2C_REPLY_MASK (0x3 << 6)
44 44
45/* AUX CH addresses */ 45/* AUX CH addresses */
46#define DP_DPCP_REV 0x0 46#define DP_DPCD_REV 0x0
47 47
48#define DP_LINK_BW_SET 0x100 48#define DP_LINK_BW_SET 0x100
49# define DP_LINK_BW_1_62 0x06 49# define DP_LINK_BW_1_62 0x06
@@ -132,6 +132,8 @@
132#define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK 0xc0 132#define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK 0xc0
133#define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6 133#define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6
134 134
135#define DP_SET_POWER 0x600
136
135#define MODE_I2C_START 1 137#define MODE_I2C_START 1
136#define MODE_I2C_WRITE 2 138#define MODE_I2C_WRITE 2
137#define MODE_I2C_READ 4 139#define MODE_I2C_READ 4
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 09:31:43 -0500