diff options
-rw-r--r-- | arch/ppc/Kconfig | 7 | ||||
-rw-r--r-- | arch/ppc/configs/sandpoint_defconfig | 2 | ||||
-rw-r--r-- | arch/ppc/platforms/sandpoint.c | 17 | ||||
-rw-r--r-- | arch/ppc/syslib/mpc10x_common.c | 53 | ||||
-rw-r--r-- | include/asm-ppc/mpc10x.h | 3 |
5 files changed, 63 insertions, 19 deletions
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig index be4e629e69d0..a862c037c65d 100644 --- a/arch/ppc/Kconfig +++ b/arch/ppc/Kconfig | |||
@@ -878,6 +878,13 @@ config MPC10X_STORE_GATHERING | |||
878 | bool "Enable MPC10x store gathering" | 878 | bool "Enable MPC10x store gathering" |
879 | depends on MPC10X_BRIDGE | 879 | depends on MPC10X_BRIDGE |
880 | 880 | ||
881 | config SANDPOINT_ENABLE_UART1 | ||
882 | bool "Enable DUART mode on Sandpoint" | ||
883 | depends on SANDPOINT | ||
884 | help | ||
885 | If this option is enabled then the MPC824x processor will run | ||
886 | in DUART mode instead of UART mode. | ||
887 | |||
881 | config CPC710_DATA_GATHERING | 888 | config CPC710_DATA_GATHERING |
882 | bool "Enable CPC710 data gathering" | 889 | bool "Enable CPC710 data gathering" |
883 | depends on K2 | 890 | depends on K2 |
diff --git a/arch/ppc/configs/sandpoint_defconfig b/arch/ppc/configs/sandpoint_defconfig index 0f4393a07f82..fb493a67c60d 100644 --- a/arch/ppc/configs/sandpoint_defconfig +++ b/arch/ppc/configs/sandpoint_defconfig | |||
@@ -437,7 +437,7 @@ CONFIG_SOUND_GAMEPORT=y | |||
437 | # | 437 | # |
438 | CONFIG_SERIAL_8250=y | 438 | CONFIG_SERIAL_8250=y |
439 | CONFIG_SERIAL_8250_CONSOLE=y | 439 | CONFIG_SERIAL_8250_CONSOLE=y |
440 | CONFIG_SERIAL_8250_NR_UARTS=2 | 440 | CONFIG_SERIAL_8250_NR_UARTS=4 |
441 | # CONFIG_SERIAL_8250_EXTENDED is not set | 441 | # CONFIG_SERIAL_8250_EXTENDED is not set |
442 | 442 | ||
443 | # | 443 | # |
diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c index 8b149c2fc54f..21e31346b12b 100644 --- a/arch/ppc/platforms/sandpoint.c +++ b/arch/ppc/platforms/sandpoint.c | |||
@@ -311,19 +311,22 @@ sandpoint_setup_arch(void) | |||
311 | { | 311 | { |
312 | bd_t *bp = (bd_t *)__res; | 312 | bd_t *bp = (bd_t *)__res; |
313 | struct plat_serial8250_port *pdata; | 313 | struct plat_serial8250_port *pdata; |
314 | pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC10X_DUART); | ||
315 | 314 | ||
315 | pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC10X_UART0); | ||
316 | if (pdata) | 316 | if (pdata) |
317 | { | 317 | { |
318 | pdata[0].uartclk = bp->bi_busfreq; | 318 | pdata[0].uartclk = bp->bi_busfreq; |
319 | pdata[0].membase = ioremap(pdata[0].mapbase, 0x100); | 319 | } |
320 | 320 | ||
321 | /* this disables the 2nd serial port on the DUART | 321 | #ifdef CONFIG_SANDPOINT_ENABLE_UART1 |
322 | * since the sandpoint does not have it connected */ | 322 | pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC10X_UART1); |
323 | pdata[1].uartclk = 0; | 323 | if (pdata) |
324 | pdata[1].irq = 0; | 324 | { |
325 | pdata[1].mapbase = 0; | 325 | pdata[0].uartclk = bp->bi_busfreq; |
326 | } | 326 | } |
327 | #else | ||
328 | ppc_sys_device_remove(MPC10X_UART1); | ||
329 | #endif | ||
327 | } | 330 | } |
328 | 331 | ||
329 | printk(KERN_INFO "Motorola SPS Sandpoint Test Platform\n"); | 332 | printk(KERN_INFO "Motorola SPS Sandpoint Test Platform\n"); |
diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c index 8fc5f4154521..87065e2e4c5f 100644 --- a/arch/ppc/syslib/mpc10x_common.c +++ b/arch/ppc/syslib/mpc10x_common.c | |||
@@ -45,24 +45,29 @@ | |||
45 | #define MPC10X_DMA0_IRQ (EPIC_IRQ_BASE + 1 + NUM_8259_INTERRUPTS) | 45 | #define MPC10X_DMA0_IRQ (EPIC_IRQ_BASE + 1 + NUM_8259_INTERRUPTS) |
46 | #define MPC10X_DMA1_IRQ (EPIC_IRQ_BASE + 2 + NUM_8259_INTERRUPTS) | 46 | #define MPC10X_DMA1_IRQ (EPIC_IRQ_BASE + 2 + NUM_8259_INTERRUPTS) |
47 | #define MPC10X_UART0_IRQ (EPIC_IRQ_BASE + 4 + NUM_8259_INTERRUPTS) | 47 | #define MPC10X_UART0_IRQ (EPIC_IRQ_BASE + 4 + NUM_8259_INTERRUPTS) |
48 | #define MPC10X_UART1_IRQ (EPIC_IRQ_BASE + 5 + NUM_8259_INTERRUPTS) | ||
48 | #else | 49 | #else |
49 | #define MPC10X_I2C_IRQ -1 | 50 | #define MPC10X_I2C_IRQ -1 |
50 | #define MPC10X_DMA0_IRQ -1 | 51 | #define MPC10X_DMA0_IRQ -1 |
51 | #define MPC10X_DMA1_IRQ -1 | 52 | #define MPC10X_DMA1_IRQ -1 |
52 | #define MPC10X_UART0_IRQ -1 | 53 | #define MPC10X_UART0_IRQ -1 |
54 | #define MPC10X_UART1_IRQ -1 | ||
53 | #endif | 55 | #endif |
54 | 56 | ||
55 | static struct fsl_i2c_platform_data mpc10x_i2c_pdata = { | 57 | static struct fsl_i2c_platform_data mpc10x_i2c_pdata = { |
56 | .device_flags = 0, | 58 | .device_flags = 0, |
57 | }; | 59 | }; |
58 | 60 | ||
59 | static struct plat_serial8250_port serial_platform_data[] = { | 61 | static struct plat_serial8250_port serial_plat_uart0[] = { |
60 | [0] = { | 62 | [0] = { |
61 | .mapbase = 0x4500, | 63 | .mapbase = 0x4500, |
62 | .iotype = UPIO_MEM, | 64 | .iotype = UPIO_MEM, |
63 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | 65 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
64 | }, | 66 | }, |
65 | [1] = { | 67 | { }, |
68 | }; | ||
69 | static struct plat_serial8250_port serial_plat_uart1[] = { | ||
70 | [0] = { | ||
66 | .mapbase = 0x4600, | 71 | .mapbase = 0x4600, |
67 | .iotype = UPIO_MEM, | 72 | .iotype = UPIO_MEM, |
68 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | 73 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
@@ -133,11 +138,17 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
133 | }, | 138 | }, |
134 | }, | 139 | }, |
135 | }, | 140 | }, |
136 | [MPC10X_DUART] = { | 141 | [MPC10X_UART0] = { |
137 | .name = "serial8250", | 142 | .name = "serial8250", |
138 | .id = 0, | 143 | .id = 0, |
139 | .dev.platform_data = serial_platform_data, | 144 | .dev.platform_data = serial_plat_uart0, |
140 | }, | 145 | }, |
146 | [MPC10X_UART1] = { | ||
147 | .name = "serial8250", | ||
148 | .id = 1, | ||
149 | .dev.platform_data = serial_plat_uart1, | ||
150 | }, | ||
151 | |||
141 | }; | 152 | }; |
142 | 153 | ||
143 | /* We use the PCI ID to match on */ | 154 | /* We use the PCI ID to match on */ |
@@ -147,10 +158,10 @@ struct ppc_sys_spec ppc_sys_specs[] = { | |||
147 | .ppc_sys_name = "8245", | 158 | .ppc_sys_name = "8245", |
148 | .mask = 0xFFFFFFFF, | 159 | .mask = 0xFFFFFFFF, |
149 | .value = MPC10X_BRIDGE_8245, | 160 | .value = MPC10X_BRIDGE_8245, |
150 | .num_devices = 4, | 161 | .num_devices = 5, |
151 | .device_list = (enum ppc_sys_devices[]) | 162 | .device_list = (enum ppc_sys_devices[]) |
152 | { | 163 | { |
153 | MPC10X_IIC1, MPC10X_DMA0, MPC10X_DMA1, MPC10X_DUART, | 164 | MPC10X_IIC1, MPC10X_DMA0, MPC10X_DMA1, MPC10X_UART0, MPC10X_UART1, |
154 | }, | 165 | }, |
155 | }, | 166 | }, |
156 | { | 167 | { |
@@ -180,6 +191,25 @@ struct ppc_sys_spec ppc_sys_specs[] = { | |||
180 | }, | 191 | }, |
181 | }; | 192 | }; |
182 | 193 | ||
194 | /* | ||
195 | * mach_mpc10x_fixup: This function enables DUART mode if it detects | ||
196 | * if it detects two UARTS in the platform device entries. | ||
197 | */ | ||
198 | static int __init mach_mpc10x_fixup(struct platform_device *pdev) | ||
199 | { | ||
200 | if (strncmp (pdev->name, "serial8250", 10) == 0 && pdev->id == 1) | ||
201 | writeb(readb(serial_plat_uart1[0].membase + 0x11) | 0x1, | ||
202 | serial_plat_uart1[0].membase + 0x11); | ||
203 | return 0; | ||
204 | } | ||
205 | |||
206 | static int __init mach_mpc10x_init(void) | ||
207 | { | ||
208 | ppc_sys_device_fixup = mach_mpc10x_fixup; | ||
209 | return 0; | ||
210 | } | ||
211 | postcore_initcall(mach_mpc10x_init); | ||
212 | |||
183 | /* Set resources to match bridge memory map */ | 213 | /* Set resources to match bridge memory map */ |
184 | void __init | 214 | void __init |
185 | mpc10x_bridge_set_resources(int map, struct pci_controller *hose) | 215 | mpc10x_bridge_set_resources(int map, struct pci_controller *hose) |
@@ -219,6 +249,7 @@ mpc10x_bridge_set_resources(int map, struct pci_controller *hose) | |||
219 | ppc_md.progress("mpc10x:exit1", 0x100); | 249 | ppc_md.progress("mpc10x:exit1", 0x100); |
220 | } | 250 | } |
221 | } | 251 | } |
252 | |||
222 | /* | 253 | /* |
223 | * Do some initialization and put the EUMB registers at the specified address | 254 | * Do some initialization and put the EUMB registers at the specified address |
224 | * (also map the EPIC registers into virtual space--OpenPIC_Addr will be set). | 255 | * (also map the EPIC registers into virtual space--OpenPIC_Addr will be set). |
@@ -411,11 +442,13 @@ mpc10x_bridge_init(struct pci_controller *hose, | |||
411 | ppc_sys_platform_devices[MPC10X_DMA1].resource[1].start = MPC10X_DMA1_IRQ; | 442 | ppc_sys_platform_devices[MPC10X_DMA1].resource[1].start = MPC10X_DMA1_IRQ; |
412 | ppc_sys_platform_devices[MPC10X_DMA1].resource[1].end = MPC10X_DMA1_IRQ; | 443 | ppc_sys_platform_devices[MPC10X_DMA1].resource[1].end = MPC10X_DMA1_IRQ; |
413 | 444 | ||
414 | serial_platform_data[0].mapbase += phys_eumb_base; | 445 | serial_plat_uart0[0].mapbase += phys_eumb_base; |
415 | serial_platform_data[0].irq = MPC10X_UART0_IRQ; | 446 | serial_plat_uart0[0].irq = MPC10X_UART0_IRQ; |
447 | serial_plat_uart0[0].membase = ioremap(serial_plat_uart0[0].mapbase, 0x100); | ||
416 | 448 | ||
417 | serial_platform_data[1].mapbase += phys_eumb_base; | 449 | serial_plat_uart1[0].mapbase += phys_eumb_base; |
418 | serial_platform_data[1].irq = MPC10X_UART0_IRQ + 1; | 450 | serial_plat_uart1[0].irq = MPC10X_UART1_IRQ; |
451 | serial_plat_uart1[0].membase = ioremap(serial_plat_uart1[0].mapbase, 0x100); | ||
419 | 452 | ||
420 | /* | 453 | /* |
421 | * 8240 erratum 26, 8241/8245 erratum 29, 107 erratum 23: speculative | 454 | * 8240 erratum 26, 8241/8245 erratum 29, 107 erratum 23: speculative |
diff --git a/include/asm-ppc/mpc10x.h b/include/asm-ppc/mpc10x.h index f5196a4efbe0..77b1e092c206 100644 --- a/include/asm-ppc/mpc10x.h +++ b/include/asm-ppc/mpc10x.h | |||
@@ -163,7 +163,8 @@ enum ppc_sys_devices { | |||
163 | MPC10X_IIC1, | 163 | MPC10X_IIC1, |
164 | MPC10X_DMA0, | 164 | MPC10X_DMA0, |
165 | MPC10X_DMA1, | 165 | MPC10X_DMA1, |
166 | MPC10X_DUART, | 166 | MPC10X_UART0, |
167 | MPC10X_UART1, | ||
167 | }; | 168 | }; |
168 | 169 | ||
169 | int mpc10x_bridge_init(struct pci_controller *hose, | 170 | int mpc10x_bridge_init(struct pci_controller *hose, |