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-rw-r--r-- | Documentation/powerpc/booting-without-of.txt | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index aee243a846a2..ee92fedada1a 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt | |||
@@ -59,6 +59,7 @@ Table of Contents | |||
59 | p) Freescale Synchronous Serial Interface | 59 | p) Freescale Synchronous Serial Interface |
60 | q) USB EHCI controllers | 60 | q) USB EHCI controllers |
61 | r) MDIO on GPIOs | 61 | r) MDIO on GPIOs |
62 | s) SPI busses | ||
62 | 63 | ||
63 | VII - Marvell Discovery mv64[345]6x System Controller chips | 64 | VII - Marvell Discovery mv64[345]6x System Controller chips |
64 | 1) The /system-controller node | 65 | 1) The /system-controller node |
@@ -1881,6 +1882,62 @@ platforms are moved over to use the flattened-device-tree model. | |||
1881 | &qe_pio_c 6>; | 1882 | &qe_pio_c 6>; |
1882 | }; | 1883 | }; |
1883 | 1884 | ||
1885 | s) SPI (Serial Peripheral Interface) busses | ||
1886 | |||
1887 | SPI busses can be described with a node for the SPI master device | ||
1888 | and a set of child nodes for each SPI slave on the bus. For this | ||
1889 | discussion, it is assumed that the system's SPI controller is in | ||
1890 | SPI master mode. This binding does not describe SPI controllers | ||
1891 | in slave mode. | ||
1892 | |||
1893 | The SPI master node requires the following properties: | ||
1894 | - #address-cells - number of cells required to define a chip select | ||
1895 | address on the SPI bus. | ||
1896 | - #size-cells - should be zero. | ||
1897 | - compatible - name of SPI bus controller following generic names | ||
1898 | recommended practice. | ||
1899 | No other properties are required in the SPI bus node. It is assumed | ||
1900 | that a driver for an SPI bus device will understand that it is an SPI bus. | ||
1901 | However, the binding does not attempt to define the specific method for | ||
1902 | assigning chip select numbers. Since SPI chip select configuration is | ||
1903 | flexible and non-standardized, it is left out of this binding with the | ||
1904 | assumption that board specific platform code will be used to manage | ||
1905 | chip selects. Individual drivers can define additional properties to | ||
1906 | support describing the chip select layout. | ||
1907 | |||
1908 | SPI slave nodes must be children of the SPI master node and can | ||
1909 | contain the following properties. | ||
1910 | - reg - (required) chip select address of device. | ||
1911 | - compatible - (required) name of SPI device following generic names | ||
1912 | recommended practice | ||
1913 | - spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz | ||
1914 | - spi-cpol - (optional) Empty property indicating device requires | ||
1915 | inverse clock polarity (CPOL) mode | ||
1916 | - spi-cpha - (optional) Empty property indicating device requires | ||
1917 | shifted clock phase (CPHA) mode | ||
1918 | |||
1919 | SPI example for an MPC5200 SPI bus: | ||
1920 | spi@f00 { | ||
1921 | #address-cells = <1>; | ||
1922 | #size-cells = <0>; | ||
1923 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; | ||
1924 | reg = <0xf00 0x20>; | ||
1925 | interrupts = <2 13 0 2 14 0>; | ||
1926 | interrupt-parent = <&mpc5200_pic>; | ||
1927 | |||
1928 | ethernet-switch@0 { | ||
1929 | compatible = "micrel,ks8995m"; | ||
1930 | spi-max-frequency = <1000000>; | ||
1931 | reg = <0>; | ||
1932 | }; | ||
1933 | |||
1934 | codec@1 { | ||
1935 | compatible = "ti,tlv320aic26"; | ||
1936 | spi-max-frequency = <100000>; | ||
1937 | reg = <1>; | ||
1938 | }; | ||
1939 | }; | ||
1940 | |||
1884 | VII - Marvell Discovery mv64[345]6x System Controller chips | 1941 | VII - Marvell Discovery mv64[345]6x System Controller chips |
1885 | =========================================================== | 1942 | =========================================================== |
1886 | 1943 | ||