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-rw-r--r--arch/arm/boot/compressed/head.S9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 5cac46a19bb7..2073bf080523 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -641,7 +641,7 @@ proc_types:
641 .word 0x000f0000 641 .word 0x000f0000
642 b __armv4_mmu_cache_on 642 b __armv4_mmu_cache_on
643 b __armv4_mmu_cache_off 643 b __armv4_mmu_cache_off
644 b __armv4_mmu_cache_flush 644 b __armv5tej_mmu_cache_flush
645 645
646 .word 0x0007b000 @ ARMv6 646 .word 0x0007b000 @ ARMv6
647 .word 0x000ff000 647 .word 0x000ff000
@@ -821,6 +821,13 @@ iflush:
821 mcr p15, 0, r10, c7, c10, 4 @ drain WB 821 mcr p15, 0, r10, c7, c10, 4 @ drain WB
822 mov pc, lr 822 mov pc, lr
823 823
824__armv5tej_mmu_cache_flush:
8251: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache
826 bne 1b
827 mcr p15, 0, r0, c7, c5, 0 @ flush I cache
828 mcr p15, 0, r0, c7, c10, 4 @ drain WB
829 mov pc, lr
830
824__armv4_mmu_cache_flush: 831__armv4_mmu_cache_flush:
825 mov r2, #64*1024 @ default: 32K dcache size (*2) 832 mov r2, #64*1024 @ default: 32K dcache size (*2)
826 mov r11, #32 @ default: 32 byte line size 833 mov r11, #32 @ default: 32 byte line size