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-rw-r--r--drivers/net/mv643xx_eth.c44
1 files changed, 22 insertions, 22 deletions
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 4cbf84052b0f..098f3a28837c 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -83,9 +83,9 @@ static void eth_port_uc_addr_get(struct net_device *dev,
83 unsigned char *MacAddr); 83 unsigned char *MacAddr);
84static void eth_port_set_multicast_list(struct net_device *); 84static void eth_port_set_multicast_list(struct net_device *);
85static void mv643xx_eth_port_enable_tx(unsigned int port_num, 85static void mv643xx_eth_port_enable_tx(unsigned int port_num,
86 unsigned int channels); 86 unsigned int queues);
87static void mv643xx_eth_port_enable_rx(unsigned int port_num, 87static void mv643xx_eth_port_enable_rx(unsigned int port_num,
88 unsigned int channels); 88 unsigned int queues);
89static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num); 89static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num);
90static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num); 90static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num);
91static int mv643xx_eth_open(struct net_device *); 91static int mv643xx_eth_open(struct net_device *);
@@ -466,7 +466,7 @@ static void mv643xx_eth_update_pscr(struct net_device *dev,
466 struct mv643xx_private *mp = netdev_priv(dev); 466 struct mv643xx_private *mp = netdev_priv(dev);
467 int port_num = mp->port_num; 467 int port_num = mp->port_num;
468 u32 o_pscr, n_pscr; 468 u32 o_pscr, n_pscr;
469 unsigned int channels; 469 unsigned int queues;
470 470
471 o_pscr = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num)); 471 o_pscr = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
472 n_pscr = o_pscr; 472 n_pscr = o_pscr;
@@ -494,7 +494,7 @@ static void mv643xx_eth_update_pscr(struct net_device *dev,
494 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), 494 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
495 n_pscr); 495 n_pscr);
496 else { 496 else {
497 channels = mv643xx_eth_port_disable_tx(port_num); 497 queues = mv643xx_eth_port_disable_tx(port_num);
498 498
499 o_pscr &= ~MV643XX_ETH_SERIAL_PORT_ENABLE; 499 o_pscr &= ~MV643XX_ETH_SERIAL_PORT_ENABLE;
500 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), 500 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
@@ -503,8 +503,8 @@ static void mv643xx_eth_update_pscr(struct net_device *dev,
503 n_pscr); 503 n_pscr);
504 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), 504 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
505 n_pscr); 505 n_pscr);
506 if (channels) 506 if (queues)
507 mv643xx_eth_port_enable_tx(port_num, channels); 507 mv643xx_eth_port_enable_tx(port_num, queues);
508 } 508 }
509 } 509 }
510} 510}
@@ -2453,28 +2453,28 @@ static void ethernet_phy_reset(unsigned int eth_port_num)
2453} 2453}
2454 2454
2455static void mv643xx_eth_port_enable_tx(unsigned int port_num, 2455static void mv643xx_eth_port_enable_tx(unsigned int port_num,
2456 unsigned int channels) 2456 unsigned int queues)
2457{ 2457{
2458 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), channels); 2458 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), queues);
2459} 2459}
2460 2460
2461static void mv643xx_eth_port_enable_rx(unsigned int port_num, 2461static void mv643xx_eth_port_enable_rx(unsigned int port_num,
2462 unsigned int channels) 2462 unsigned int queues)
2463{ 2463{
2464 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), channels); 2464 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), queues);
2465} 2465}
2466 2466
2467static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num) 2467static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num)
2468{ 2468{
2469 u32 channels; 2469 u32 queues;
2470 2470
2471 /* Stop Tx port activity. Check port Tx activity. */ 2471 /* Stop Tx port activity. Check port Tx activity. */
2472 channels = mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num)) 2472 queues = mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num))
2473 & 0xFF; 2473 & 0xFF;
2474 if (channels) { 2474 if (queues) {
2475 /* Issue stop command for active channels only */ 2475 /* Issue stop command for active queues only */
2476 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), 2476 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num),
2477 (channels << 8)); 2477 (queues << 8));
2478 2478
2479 /* Wait for all Tx activity to terminate. */ 2479 /* Wait for all Tx activity to terminate. */
2480 /* Check port cause register that all Tx queues are stopped */ 2480 /* Check port cause register that all Tx queues are stopped */
@@ -2488,20 +2488,20 @@ static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num)
2488 udelay(PHY_WAIT_MICRO_SECONDS); 2488 udelay(PHY_WAIT_MICRO_SECONDS);
2489 } 2489 }
2490 2490
2491 return channels; 2491 return queues;
2492} 2492}
2493 2493
2494static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num) 2494static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num)
2495{ 2495{
2496 u32 channels; 2496 u32 queues;
2497 2497
2498 /* Stop Rx port activity. Check port Rx activity. */ 2498 /* Stop Rx port activity. Check port Rx activity. */
2499 channels = mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num)) 2499 queues = mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num))
2500 & 0xFF; 2500 & 0xFF;
2501 if (channels) { 2501 if (queues) {
2502 /* Issue stop command for active channels only */ 2502 /* Issue stop command for active queues only */
2503 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), 2503 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num),
2504 (channels << 8)); 2504 (queues << 8));
2505 2505
2506 /* Wait for all Rx activity to terminate. */ 2506 /* Wait for all Rx activity to terminate. */
2507 /* Check port cause register that all Rx queues are stopped */ 2507 /* Check port cause register that all Rx queues are stopped */
@@ -2510,7 +2510,7 @@ static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num)
2510 udelay(PHY_WAIT_MICRO_SECONDS); 2510 udelay(PHY_WAIT_MICRO_SECONDS);
2511 } 2511 }
2512 2512
2513 return channels; 2513 return queues;
2514} 2514}
2515 2515
2516/* 2516/*