diff options
47 files changed, 981 insertions, 510 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 668682d1f5fa..f94cfc6f4c5d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -2951,7 +2951,7 @@ M: Roland Dreier <rolandd@cisco.com> | |||
2951 | M: Sean Hefty <sean.hefty@intel.com> | 2951 | M: Sean Hefty <sean.hefty@intel.com> |
2952 | M: Hal Rosenstock <hal.rosenstock@gmail.com> | 2952 | M: Hal Rosenstock <hal.rosenstock@gmail.com> |
2953 | L: linux-rdma@vger.kernel.org | 2953 | L: linux-rdma@vger.kernel.org |
2954 | W: http://www.openib.org/ | 2954 | W: http://www.openfabrics.org/ |
2955 | Q: http://patchwork.kernel.org/project/linux-rdma/list/ | 2955 | Q: http://patchwork.kernel.org/project/linux-rdma/list/ |
2956 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband.git | 2956 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband.git |
2957 | S: Supported | 2957 | S: Supported |
@@ -5035,6 +5035,16 @@ W: http://www.kernel.dk | |||
5035 | S: Maintained | 5035 | S: Maintained |
5036 | F: drivers/scsi/sr* | 5036 | F: drivers/scsi/sr* |
5037 | 5037 | ||
5038 | SCSI RDMA PROTOCOL (SRP) INITIATOR | ||
5039 | M: David Dillow <dillowda@ornl.gov> | ||
5040 | L: linux-rdma@vger.kernel.org | ||
5041 | S: Supported | ||
5042 | W: http://www.openfabrics.org | ||
5043 | Q: http://patchwork.kernel.org/project/linux-rdma/list/ | ||
5044 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/dad/srp-initiator.git | ||
5045 | F: drivers/infiniband/ulp/srp/ | ||
5046 | F: include/scsi/srp.h | ||
5047 | |||
5038 | SCSI SG DRIVER | 5048 | SCSI SG DRIVER |
5039 | M: Doug Gilbert <dgilbert@interlog.com> | 5049 | M: Doug Gilbert <dgilbert@interlog.com> |
5040 | L: linux-scsi@vger.kernel.org | 5050 | L: linux-scsi@vger.kernel.org |
diff --git a/drivers/infiniband/core/iwcm.c b/drivers/infiniband/core/iwcm.c index bfead5bc25f6..2a1e9ae134b4 100644 --- a/drivers/infiniband/core/iwcm.c +++ b/drivers/infiniband/core/iwcm.c | |||
@@ -506,6 +506,8 @@ int iw_cm_accept(struct iw_cm_id *cm_id, | |||
506 | qp = cm_id->device->iwcm->get_qp(cm_id->device, iw_param->qpn); | 506 | qp = cm_id->device->iwcm->get_qp(cm_id->device, iw_param->qpn); |
507 | if (!qp) { | 507 | if (!qp) { |
508 | spin_unlock_irqrestore(&cm_id_priv->lock, flags); | 508 | spin_unlock_irqrestore(&cm_id_priv->lock, flags); |
509 | clear_bit(IWCM_F_CONNECT_WAIT, &cm_id_priv->flags); | ||
510 | wake_up_all(&cm_id_priv->connect_wait); | ||
509 | return -EINVAL; | 511 | return -EINVAL; |
510 | } | 512 | } |
511 | cm_id->device->iwcm->add_ref(qp); | 513 | cm_id->device->iwcm->add_ref(qp); |
@@ -565,6 +567,8 @@ int iw_cm_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *iw_param) | |||
565 | qp = cm_id->device->iwcm->get_qp(cm_id->device, iw_param->qpn); | 567 | qp = cm_id->device->iwcm->get_qp(cm_id->device, iw_param->qpn); |
566 | if (!qp) { | 568 | if (!qp) { |
567 | spin_unlock_irqrestore(&cm_id_priv->lock, flags); | 569 | spin_unlock_irqrestore(&cm_id_priv->lock, flags); |
570 | clear_bit(IWCM_F_CONNECT_WAIT, &cm_id_priv->flags); | ||
571 | wake_up_all(&cm_id_priv->connect_wait); | ||
568 | return -EINVAL; | 572 | return -EINVAL; |
569 | } | 573 | } |
570 | cm_id->device->iwcm->add_ref(qp); | 574 | cm_id->device->iwcm->add_ref(qp); |
diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c index 357a766bd220..ca12acf38379 100644 --- a/drivers/infiniband/core/ucma.c +++ b/drivers/infiniband/core/ucma.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #include <linux/in6.h> | 40 | #include <linux/in6.h> |
41 | #include <linux/miscdevice.h> | 41 | #include <linux/miscdevice.h> |
42 | #include <linux/slab.h> | 42 | #include <linux/slab.h> |
43 | #include <linux/sysctl.h> | ||
43 | 44 | ||
44 | #include <rdma/rdma_user_cm.h> | 45 | #include <rdma/rdma_user_cm.h> |
45 | #include <rdma/ib_marshall.h> | 46 | #include <rdma/ib_marshall.h> |
@@ -50,8 +51,24 @@ MODULE_AUTHOR("Sean Hefty"); | |||
50 | MODULE_DESCRIPTION("RDMA Userspace Connection Manager Access"); | 51 | MODULE_DESCRIPTION("RDMA Userspace Connection Manager Access"); |
51 | MODULE_LICENSE("Dual BSD/GPL"); | 52 | MODULE_LICENSE("Dual BSD/GPL"); |
52 | 53 | ||
53 | enum { | 54 | static unsigned int max_backlog = 1024; |
54 | UCMA_MAX_BACKLOG = 128 | 55 | |
56 | static struct ctl_table_header *ucma_ctl_table_hdr; | ||
57 | static ctl_table ucma_ctl_table[] = { | ||
58 | { | ||
59 | .procname = "max_backlog", | ||
60 | .data = &max_backlog, | ||
61 | .maxlen = sizeof max_backlog, | ||
62 | .mode = 0644, | ||
63 | .proc_handler = proc_dointvec, | ||
64 | }, | ||
65 | { } | ||
66 | }; | ||
67 | |||
68 | static struct ctl_path ucma_ctl_path[] = { | ||
69 | { .procname = "net" }, | ||
70 | { .procname = "rdma_ucm" }, | ||
71 | { } | ||
55 | }; | 72 | }; |
56 | 73 | ||
57 | struct ucma_file { | 74 | struct ucma_file { |
@@ -727,8 +744,8 @@ static ssize_t ucma_listen(struct ucma_file *file, const char __user *inbuf, | |||
727 | if (IS_ERR(ctx)) | 744 | if (IS_ERR(ctx)) |
728 | return PTR_ERR(ctx); | 745 | return PTR_ERR(ctx); |
729 | 746 | ||
730 | ctx->backlog = cmd.backlog > 0 && cmd.backlog < UCMA_MAX_BACKLOG ? | 747 | ctx->backlog = cmd.backlog > 0 && cmd.backlog < max_backlog ? |
731 | cmd.backlog : UCMA_MAX_BACKLOG; | 748 | cmd.backlog : max_backlog; |
732 | ret = rdma_listen(ctx->cm_id, ctx->backlog); | 749 | ret = rdma_listen(ctx->cm_id, ctx->backlog); |
733 | ucma_put_ctx(ctx); | 750 | ucma_put_ctx(ctx); |
734 | return ret; | 751 | return ret; |
@@ -1320,16 +1337,26 @@ static int __init ucma_init(void) | |||
1320 | ret = device_create_file(ucma_misc.this_device, &dev_attr_abi_version); | 1337 | ret = device_create_file(ucma_misc.this_device, &dev_attr_abi_version); |
1321 | if (ret) { | 1338 | if (ret) { |
1322 | printk(KERN_ERR "rdma_ucm: couldn't create abi_version attr\n"); | 1339 | printk(KERN_ERR "rdma_ucm: couldn't create abi_version attr\n"); |
1323 | goto err; | 1340 | goto err1; |
1341 | } | ||
1342 | |||
1343 | ucma_ctl_table_hdr = register_sysctl_paths(ucma_ctl_path, ucma_ctl_table); | ||
1344 | if (!ucma_ctl_table_hdr) { | ||
1345 | printk(KERN_ERR "rdma_ucm: couldn't register sysctl paths\n"); | ||
1346 | ret = -ENOMEM; | ||
1347 | goto err2; | ||
1324 | } | 1348 | } |
1325 | return 0; | 1349 | return 0; |
1326 | err: | 1350 | err2: |
1351 | device_remove_file(ucma_misc.this_device, &dev_attr_abi_version); | ||
1352 | err1: | ||
1327 | misc_deregister(&ucma_misc); | 1353 | misc_deregister(&ucma_misc); |
1328 | return ret; | 1354 | return ret; |
1329 | } | 1355 | } |
1330 | 1356 | ||
1331 | static void __exit ucma_cleanup(void) | 1357 | static void __exit ucma_cleanup(void) |
1332 | { | 1358 | { |
1359 | unregister_sysctl_table(ucma_ctl_table_hdr); | ||
1333 | device_remove_file(ucma_misc.this_device, &dev_attr_abi_version); | 1360 | device_remove_file(ucma_misc.this_device, &dev_attr_abi_version); |
1334 | misc_deregister(&ucma_misc); | 1361 | misc_deregister(&ucma_misc); |
1335 | idr_destroy(&ctx_idr); | 1362 | idr_destroy(&ctx_idr); |
diff --git a/drivers/infiniband/core/user_mad.c b/drivers/infiniband/core/user_mad.c index 5fa856909511..cd1996d0ad08 100644 --- a/drivers/infiniband/core/user_mad.c +++ b/drivers/infiniband/core/user_mad.c | |||
@@ -1022,7 +1022,7 @@ static int ib_umad_init_port(struct ib_device *device, int port_num, | |||
1022 | 1022 | ||
1023 | port->ib_dev = device; | 1023 | port->ib_dev = device; |
1024 | port->port_num = port_num; | 1024 | port->port_num = port_num; |
1025 | init_MUTEX(&port->sm_sem); | 1025 | sema_init(&port->sm_sem, 1); |
1026 | mutex_init(&port->file_mutex); | 1026 | mutex_init(&port->file_mutex); |
1027 | INIT_LIST_HEAD(&port->file_list); | 1027 | INIT_LIST_HEAD(&port->file_list); |
1028 | 1028 | ||
diff --git a/drivers/infiniband/hw/amso1100/Kbuild b/drivers/infiniband/hw/amso1100/Kbuild index 06964c4af849..950dfabcd89d 100644 --- a/drivers/infiniband/hw/amso1100/Kbuild +++ b/drivers/infiniband/hw/amso1100/Kbuild | |||
@@ -1,6 +1,4 @@ | |||
1 | ifdef CONFIG_INFINIBAND_AMSO1100_DEBUG | 1 | ccflags-$(CONFIG_INFINIBAND_AMSO1100_DEBUG) := -DDEBUG |
2 | EXTRA_CFLAGS += -DDEBUG | ||
3 | endif | ||
4 | 2 | ||
5 | obj-$(CONFIG_INFINIBAND_AMSO1100) += iw_c2.o | 3 | obj-$(CONFIG_INFINIBAND_AMSO1100) += iw_c2.o |
6 | 4 | ||
diff --git a/drivers/infiniband/hw/amso1100/c2_intr.c b/drivers/infiniband/hw/amso1100/c2_intr.c index 3b5095470cb3..0ebe4e806b86 100644 --- a/drivers/infiniband/hw/amso1100/c2_intr.c +++ b/drivers/infiniband/hw/amso1100/c2_intr.c | |||
@@ -62,8 +62,8 @@ void c2_rnic_interrupt(struct c2_dev *c2dev) | |||
62 | static void handle_mq(struct c2_dev *c2dev, u32 mq_index) | 62 | static void handle_mq(struct c2_dev *c2dev, u32 mq_index) |
63 | { | 63 | { |
64 | if (c2dev->qptr_array[mq_index] == NULL) { | 64 | if (c2dev->qptr_array[mq_index] == NULL) { |
65 | pr_debug(KERN_INFO "handle_mq: stray activity for mq_index=%d\n", | 65 | pr_debug("handle_mq: stray activity for mq_index=%d\n", |
66 | mq_index); | 66 | mq_index); |
67 | return; | 67 | return; |
68 | } | 68 | } |
69 | 69 | ||
diff --git a/drivers/infiniband/hw/cxgb3/Makefile b/drivers/infiniband/hw/cxgb3/Makefile index 7e7b5a66f042..621619c794e5 100644 --- a/drivers/infiniband/hw/cxgb3/Makefile +++ b/drivers/infiniband/hw/cxgb3/Makefile | |||
@@ -1,10 +1,8 @@ | |||
1 | EXTRA_CFLAGS += -Idrivers/net/cxgb3 | 1 | ccflags-y := -Idrivers/net/cxgb3 |
2 | 2 | ||
3 | obj-$(CONFIG_INFINIBAND_CXGB3) += iw_cxgb3.o | 3 | obj-$(CONFIG_INFINIBAND_CXGB3) += iw_cxgb3.o |
4 | 4 | ||
5 | iw_cxgb3-y := iwch_cm.o iwch_ev.o iwch_cq.o iwch_qp.o iwch_mem.o \ | 5 | iw_cxgb3-y := iwch_cm.o iwch_ev.o iwch_cq.o iwch_qp.o iwch_mem.o \ |
6 | iwch_provider.o iwch.o cxio_hal.o cxio_resource.o | 6 | iwch_provider.o iwch.o cxio_hal.o cxio_resource.o |
7 | 7 | ||
8 | ifdef CONFIG_INFINIBAND_CXGB3_DEBUG | 8 | ccflags-$(CONFIG_INFINIBAND_CXGB3_DEBUG) += -DDEBUG |
9 | EXTRA_CFLAGS += -DDEBUG | ||
10 | endif | ||
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.c b/drivers/infiniband/hw/cxgb3/cxio_hal.c index 005b7b52bc1e..09dda0b8740e 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_hal.c +++ b/drivers/infiniband/hw/cxgb3/cxio_hal.c | |||
@@ -160,6 +160,7 @@ int cxio_create_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq, int kernel) | |||
160 | struct rdma_cq_setup setup; | 160 | struct rdma_cq_setup setup; |
161 | int size = (1UL << (cq->size_log2)) * sizeof(struct t3_cqe); | 161 | int size = (1UL << (cq->size_log2)) * sizeof(struct t3_cqe); |
162 | 162 | ||
163 | size += 1; /* one extra page for storing cq-in-err state */ | ||
163 | cq->cqid = cxio_hal_get_cqid(rdev_p->rscp); | 164 | cq->cqid = cxio_hal_get_cqid(rdev_p->rscp); |
164 | if (!cq->cqid) | 165 | if (!cq->cqid) |
165 | return -ENOMEM; | 166 | return -ENOMEM; |
diff --git a/drivers/infiniband/hw/cxgb3/cxio_wr.h b/drivers/infiniband/hw/cxgb3/cxio_wr.h index e5ddb63e7d23..4bb997aa39d0 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_wr.h +++ b/drivers/infiniband/hw/cxgb3/cxio_wr.h | |||
@@ -728,6 +728,22 @@ struct t3_cq { | |||
728 | #define CQ_VLD_ENTRY(ptr,size_log2,cqe) (Q_GENBIT(ptr,size_log2) == \ | 728 | #define CQ_VLD_ENTRY(ptr,size_log2,cqe) (Q_GENBIT(ptr,size_log2) == \ |
729 | CQE_GENBIT(*cqe)) | 729 | CQE_GENBIT(*cqe)) |
730 | 730 | ||
731 | struct t3_cq_status_page { | ||
732 | u32 cq_err; | ||
733 | }; | ||
734 | |||
735 | static inline int cxio_cq_in_error(struct t3_cq *cq) | ||
736 | { | ||
737 | return ((struct t3_cq_status_page *) | ||
738 | &cq->queue[1 << cq->size_log2])->cq_err; | ||
739 | } | ||
740 | |||
741 | static inline void cxio_set_cq_in_error(struct t3_cq *cq) | ||
742 | { | ||
743 | ((struct t3_cq_status_page *) | ||
744 | &cq->queue[1 << cq->size_log2])->cq_err = 1; | ||
745 | } | ||
746 | |||
731 | static inline void cxio_set_wq_in_error(struct t3_wq *wq) | 747 | static inline void cxio_set_wq_in_error(struct t3_wq *wq) |
732 | { | 748 | { |
733 | wq->queue->wq_in_err.err |= 1; | 749 | wq->queue->wq_in_err.err |= 1; |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cm.c b/drivers/infiniband/hw/cxgb3/iwch_cm.c index 13c88871dc3b..d02dcc6e5963 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_cm.c +++ b/drivers/infiniband/hw/cxgb3/iwch_cm.c | |||
@@ -1093,8 +1093,8 @@ static int tx_ack(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | |||
1093 | PDBG("%s ep %p credits %u\n", __func__, ep, credits); | 1093 | PDBG("%s ep %p credits %u\n", __func__, ep, credits); |
1094 | 1094 | ||
1095 | if (credits == 0) { | 1095 | if (credits == 0) { |
1096 | PDBG(KERN_ERR "%s 0 credit ack ep %p state %u\n", | 1096 | PDBG("%s 0 credit ack ep %p state %u\n", |
1097 | __func__, ep, state_read(&ep->com)); | 1097 | __func__, ep, state_read(&ep->com)); |
1098 | return CPL_RET_BUF_DONE; | 1098 | return CPL_RET_BUF_DONE; |
1099 | } | 1099 | } |
1100 | 1100 | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_ev.c b/drivers/infiniband/hw/cxgb3/iwch_ev.c index 6afc89e7572c..71e0d845da3d 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_ev.c +++ b/drivers/infiniband/hw/cxgb3/iwch_ev.c | |||
@@ -76,6 +76,14 @@ static void post_qp_event(struct iwch_dev *rnicp, struct iwch_cq *chp, | |||
76 | atomic_inc(&qhp->refcnt); | 76 | atomic_inc(&qhp->refcnt); |
77 | spin_unlock(&rnicp->lock); | 77 | spin_unlock(&rnicp->lock); |
78 | 78 | ||
79 | if (qhp->attr.state == IWCH_QP_STATE_RTS) { | ||
80 | attrs.next_state = IWCH_QP_STATE_TERMINATE; | ||
81 | iwch_modify_qp(qhp->rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, | ||
82 | &attrs, 1); | ||
83 | if (send_term) | ||
84 | iwch_post_terminate(qhp, rsp_msg); | ||
85 | } | ||
86 | |||
79 | event.event = ib_event; | 87 | event.event = ib_event; |
80 | event.device = chp->ibcq.device; | 88 | event.device = chp->ibcq.device; |
81 | if (ib_event == IB_EVENT_CQ_ERR) | 89 | if (ib_event == IB_EVENT_CQ_ERR) |
@@ -86,13 +94,7 @@ static void post_qp_event(struct iwch_dev *rnicp, struct iwch_cq *chp, | |||
86 | if (qhp->ibqp.event_handler) | 94 | if (qhp->ibqp.event_handler) |
87 | (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context); | 95 | (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context); |
88 | 96 | ||
89 | if (qhp->attr.state == IWCH_QP_STATE_RTS) { | 97 | (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); |
90 | attrs.next_state = IWCH_QP_STATE_TERMINATE; | ||
91 | iwch_modify_qp(qhp->rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, | ||
92 | &attrs, 1); | ||
93 | if (send_term) | ||
94 | iwch_post_terminate(qhp, rsp_msg); | ||
95 | } | ||
96 | 98 | ||
97 | if (atomic_dec_and_test(&qhp->refcnt)) | 99 | if (atomic_dec_and_test(&qhp->refcnt)) |
98 | wake_up(&qhp->wait); | 100 | wake_up(&qhp->wait); |
@@ -179,7 +181,6 @@ void iwch_ev_dispatch(struct cxio_rdev *rdev_p, struct sk_buff *skb) | |||
179 | case TPT_ERR_BOUND: | 181 | case TPT_ERR_BOUND: |
180 | case TPT_ERR_INVALIDATE_SHARED_MR: | 182 | case TPT_ERR_INVALIDATE_SHARED_MR: |
181 | case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: | 183 | case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: |
182 | (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); | ||
183 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_ACCESS_ERR, 1); | 184 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_ACCESS_ERR, 1); |
184 | break; | 185 | break; |
185 | 186 | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.c b/drivers/infiniband/hw/cxgb3/iwch_provider.c index fca0b4b747e4..2e2741307af4 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_provider.c +++ b/drivers/infiniband/hw/cxgb3/iwch_provider.c | |||
@@ -154,6 +154,8 @@ static struct ib_cq *iwch_create_cq(struct ib_device *ibdev, int entries, int ve | |||
154 | struct iwch_create_cq_resp uresp; | 154 | struct iwch_create_cq_resp uresp; |
155 | struct iwch_create_cq_req ureq; | 155 | struct iwch_create_cq_req ureq; |
156 | struct iwch_ucontext *ucontext = NULL; | 156 | struct iwch_ucontext *ucontext = NULL; |
157 | static int warned; | ||
158 | size_t resplen; | ||
157 | 159 | ||
158 | PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries); | 160 | PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries); |
159 | rhp = to_iwch_dev(ibdev); | 161 | rhp = to_iwch_dev(ibdev); |
@@ -217,15 +219,26 @@ static struct ib_cq *iwch_create_cq(struct ib_device *ibdev, int entries, int ve | |||
217 | uresp.key = ucontext->key; | 219 | uresp.key = ucontext->key; |
218 | ucontext->key += PAGE_SIZE; | 220 | ucontext->key += PAGE_SIZE; |
219 | spin_unlock(&ucontext->mmap_lock); | 221 | spin_unlock(&ucontext->mmap_lock); |
220 | if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) { | 222 | mm->key = uresp.key; |
223 | mm->addr = virt_to_phys(chp->cq.queue); | ||
224 | if (udata->outlen < sizeof uresp) { | ||
225 | if (!warned++) | ||
226 | printk(KERN_WARNING MOD "Warning - " | ||
227 | "downlevel libcxgb3 (non-fatal).\n"); | ||
228 | mm->len = PAGE_ALIGN((1UL << uresp.size_log2) * | ||
229 | sizeof(struct t3_cqe)); | ||
230 | resplen = sizeof(struct iwch_create_cq_resp_v0); | ||
231 | } else { | ||
232 | mm->len = PAGE_ALIGN(((1UL << uresp.size_log2) + 1) * | ||
233 | sizeof(struct t3_cqe)); | ||
234 | uresp.memsize = mm->len; | ||
235 | resplen = sizeof uresp; | ||
236 | } | ||
237 | if (ib_copy_to_udata(udata, &uresp, resplen)) { | ||
221 | kfree(mm); | 238 | kfree(mm); |
222 | iwch_destroy_cq(&chp->ibcq); | 239 | iwch_destroy_cq(&chp->ibcq); |
223 | return ERR_PTR(-EFAULT); | 240 | return ERR_PTR(-EFAULT); |
224 | } | 241 | } |
225 | mm->key = uresp.key; | ||
226 | mm->addr = virt_to_phys(chp->cq.queue); | ||
227 | mm->len = PAGE_ALIGN((1UL << uresp.size_log2) * | ||
228 | sizeof (struct t3_cqe)); | ||
229 | insert_mmap(ucontext, mm); | 242 | insert_mmap(ucontext, mm); |
230 | } | 243 | } |
231 | PDBG("created cqid 0x%0x chp %p size 0x%0x, dma_addr 0x%0llx\n", | 244 | PDBG("created cqid 0x%0x chp %p size 0x%0x, dma_addr 0x%0llx\n", |
@@ -1414,6 +1427,7 @@ int iwch_register_device(struct iwch_dev *dev) | |||
1414 | dev->ibdev.post_send = iwch_post_send; | 1427 | dev->ibdev.post_send = iwch_post_send; |
1415 | dev->ibdev.post_recv = iwch_post_receive; | 1428 | dev->ibdev.post_recv = iwch_post_receive; |
1416 | dev->ibdev.get_protocol_stats = iwch_get_mib; | 1429 | dev->ibdev.get_protocol_stats = iwch_get_mib; |
1430 | dev->ibdev.uverbs_abi_ver = IWCH_UVERBS_ABI_VERSION; | ||
1417 | 1431 | ||
1418 | dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); | 1432 | dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); |
1419 | if (!dev->ibdev.iwcm) | 1433 | if (!dev->ibdev.iwcm) |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c index c64d27bf2c15..0993137181d7 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_qp.c +++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c | |||
@@ -802,14 +802,12 @@ int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg) | |||
802 | /* | 802 | /* |
803 | * Assumes qhp lock is held. | 803 | * Assumes qhp lock is held. |
804 | */ | 804 | */ |
805 | static void __flush_qp(struct iwch_qp *qhp, unsigned long *flag) | 805 | static void __flush_qp(struct iwch_qp *qhp, struct iwch_cq *rchp, |
806 | struct iwch_cq *schp, unsigned long *flag) | ||
806 | { | 807 | { |
807 | struct iwch_cq *rchp, *schp; | ||
808 | int count; | 808 | int count; |
809 | int flushed; | 809 | int flushed; |
810 | 810 | ||
811 | rchp = get_chp(qhp->rhp, qhp->attr.rcq); | ||
812 | schp = get_chp(qhp->rhp, qhp->attr.scq); | ||
813 | 811 | ||
814 | PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); | 812 | PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); |
815 | /* take a ref on the qhp since we must release the lock */ | 813 | /* take a ref on the qhp since we must release the lock */ |
@@ -847,10 +845,23 @@ static void __flush_qp(struct iwch_qp *qhp, unsigned long *flag) | |||
847 | 845 | ||
848 | static void flush_qp(struct iwch_qp *qhp, unsigned long *flag) | 846 | static void flush_qp(struct iwch_qp *qhp, unsigned long *flag) |
849 | { | 847 | { |
850 | if (qhp->ibqp.uobject) | 848 | struct iwch_cq *rchp, *schp; |
849 | |||
850 | rchp = get_chp(qhp->rhp, qhp->attr.rcq); | ||
851 | schp = get_chp(qhp->rhp, qhp->attr.scq); | ||
852 | |||
853 | if (qhp->ibqp.uobject) { | ||
851 | cxio_set_wq_in_error(&qhp->wq); | 854 | cxio_set_wq_in_error(&qhp->wq); |
852 | else | 855 | cxio_set_cq_in_error(&rchp->cq); |
853 | __flush_qp(qhp, flag); | 856 | (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); |
857 | if (schp != rchp) { | ||
858 | cxio_set_cq_in_error(&schp->cq); | ||
859 | (*schp->ibcq.comp_handler)(&schp->ibcq, | ||
860 | schp->ibcq.cq_context); | ||
861 | } | ||
862 | return; | ||
863 | } | ||
864 | __flush_qp(qhp, rchp, schp, flag); | ||
854 | } | 865 | } |
855 | 866 | ||
856 | 867 | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_user.h b/drivers/infiniband/hw/cxgb3/iwch_user.h index cb7086f558c1..a277c31fcaf7 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_user.h +++ b/drivers/infiniband/hw/cxgb3/iwch_user.h | |||
@@ -45,10 +45,18 @@ struct iwch_create_cq_req { | |||
45 | __u64 user_rptr_addr; | 45 | __u64 user_rptr_addr; |
46 | }; | 46 | }; |
47 | 47 | ||
48 | struct iwch_create_cq_resp_v0 { | ||
49 | __u64 key; | ||
50 | __u32 cqid; | ||
51 | __u32 size_log2; | ||
52 | }; | ||
53 | |||
48 | struct iwch_create_cq_resp { | 54 | struct iwch_create_cq_resp { |
49 | __u64 key; | 55 | __u64 key; |
50 | __u32 cqid; | 56 | __u32 cqid; |
51 | __u32 size_log2; | 57 | __u32 size_log2; |
58 | __u32 memsize; | ||
59 | __u32 reserved; | ||
52 | }; | 60 | }; |
53 | 61 | ||
54 | struct iwch_create_qp_resp { | 62 | struct iwch_create_qp_resp { |
diff --git a/drivers/infiniband/hw/cxgb4/Makefile b/drivers/infiniband/hw/cxgb4/Makefile index e31a499f0172..cd20b1342aec 100644 --- a/drivers/infiniband/hw/cxgb4/Makefile +++ b/drivers/infiniband/hw/cxgb4/Makefile | |||
@@ -1,4 +1,4 @@ | |||
1 | EXTRA_CFLAGS += -Idrivers/net/cxgb4 | 1 | ccflags-y := -Idrivers/net/cxgb4 |
2 | 2 | ||
3 | obj-$(CONFIG_INFINIBAND_CXGB4) += iw_cxgb4.o | 3 | obj-$(CONFIG_INFINIBAND_CXGB4) += iw_cxgb4.o |
4 | 4 | ||
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c index 32d352a88d50..0dc62b1438be 100644 --- a/drivers/infiniband/hw/cxgb4/cm.c +++ b/drivers/infiniband/hw/cxgb4/cm.c | |||
@@ -117,9 +117,9 @@ static int rcv_win = 256 * 1024; | |||
117 | module_param(rcv_win, int, 0644); | 117 | module_param(rcv_win, int, 0644); |
118 | MODULE_PARM_DESC(rcv_win, "TCP receive window in bytes (default=256KB)"); | 118 | MODULE_PARM_DESC(rcv_win, "TCP receive window in bytes (default=256KB)"); |
119 | 119 | ||
120 | static int snd_win = 32 * 1024; | 120 | static int snd_win = 128 * 1024; |
121 | module_param(snd_win, int, 0644); | 121 | module_param(snd_win, int, 0644); |
122 | MODULE_PARM_DESC(snd_win, "TCP send window in bytes (default=32KB)"); | 122 | MODULE_PARM_DESC(snd_win, "TCP send window in bytes (default=128KB)"); |
123 | 123 | ||
124 | static struct workqueue_struct *workq; | 124 | static struct workqueue_struct *workq; |
125 | 125 | ||
@@ -172,7 +172,7 @@ static int c4iw_l2t_send(struct c4iw_rdev *rdev, struct sk_buff *skb, | |||
172 | error = cxgb4_l2t_send(rdev->lldi.ports[0], skb, l2e); | 172 | error = cxgb4_l2t_send(rdev->lldi.ports[0], skb, l2e); |
173 | if (error < 0) | 173 | if (error < 0) |
174 | kfree_skb(skb); | 174 | kfree_skb(skb); |
175 | return error; | 175 | return error < 0 ? error : 0; |
176 | } | 176 | } |
177 | 177 | ||
178 | int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb) | 178 | int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb) |
@@ -187,7 +187,7 @@ int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb) | |||
187 | error = cxgb4_ofld_send(rdev->lldi.ports[0], skb); | 187 | error = cxgb4_ofld_send(rdev->lldi.ports[0], skb); |
188 | if (error < 0) | 188 | if (error < 0) |
189 | kfree_skb(skb); | 189 | kfree_skb(skb); |
190 | return error; | 190 | return error < 0 ? error : 0; |
191 | } | 191 | } |
192 | 192 | ||
193 | static void release_tid(struct c4iw_rdev *rdev, u32 hwtid, struct sk_buff *skb) | 193 | static void release_tid(struct c4iw_rdev *rdev, u32 hwtid, struct sk_buff *skb) |
@@ -219,12 +219,11 @@ static void set_emss(struct c4iw_ep *ep, u16 opt) | |||
219 | 219 | ||
220 | static enum c4iw_ep_state state_read(struct c4iw_ep_common *epc) | 220 | static enum c4iw_ep_state state_read(struct c4iw_ep_common *epc) |
221 | { | 221 | { |
222 | unsigned long flags; | ||
223 | enum c4iw_ep_state state; | 222 | enum c4iw_ep_state state; |
224 | 223 | ||
225 | spin_lock_irqsave(&epc->lock, flags); | 224 | mutex_lock(&epc->mutex); |
226 | state = epc->state; | 225 | state = epc->state; |
227 | spin_unlock_irqrestore(&epc->lock, flags); | 226 | mutex_unlock(&epc->mutex); |
228 | return state; | 227 | return state; |
229 | } | 228 | } |
230 | 229 | ||
@@ -235,12 +234,10 @@ static void __state_set(struct c4iw_ep_common *epc, enum c4iw_ep_state new) | |||
235 | 234 | ||
236 | static void state_set(struct c4iw_ep_common *epc, enum c4iw_ep_state new) | 235 | static void state_set(struct c4iw_ep_common *epc, enum c4iw_ep_state new) |
237 | { | 236 | { |
238 | unsigned long flags; | 237 | mutex_lock(&epc->mutex); |
239 | |||
240 | spin_lock_irqsave(&epc->lock, flags); | ||
241 | PDBG("%s - %s -> %s\n", __func__, states[epc->state], states[new]); | 238 | PDBG("%s - %s -> %s\n", __func__, states[epc->state], states[new]); |
242 | __state_set(epc, new); | 239 | __state_set(epc, new); |
243 | spin_unlock_irqrestore(&epc->lock, flags); | 240 | mutex_unlock(&epc->mutex); |
244 | return; | 241 | return; |
245 | } | 242 | } |
246 | 243 | ||
@@ -251,8 +248,8 @@ static void *alloc_ep(int size, gfp_t gfp) | |||
251 | epc = kzalloc(size, gfp); | 248 | epc = kzalloc(size, gfp); |
252 | if (epc) { | 249 | if (epc) { |
253 | kref_init(&epc->kref); | 250 | kref_init(&epc->kref); |
254 | spin_lock_init(&epc->lock); | 251 | mutex_init(&epc->mutex); |
255 | init_waitqueue_head(&epc->waitq); | 252 | c4iw_init_wr_wait(&epc->wr_wait); |
256 | } | 253 | } |
257 | PDBG("%s alloc ep %p\n", __func__, epc); | 254 | PDBG("%s alloc ep %p\n", __func__, epc); |
258 | return epc; | 255 | return epc; |
@@ -1131,7 +1128,6 @@ static int abort_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1131 | { | 1128 | { |
1132 | struct c4iw_ep *ep; | 1129 | struct c4iw_ep *ep; |
1133 | struct cpl_abort_rpl_rss *rpl = cplhdr(skb); | 1130 | struct cpl_abort_rpl_rss *rpl = cplhdr(skb); |
1134 | unsigned long flags; | ||
1135 | int release = 0; | 1131 | int release = 0; |
1136 | unsigned int tid = GET_TID(rpl); | 1132 | unsigned int tid = GET_TID(rpl); |
1137 | struct tid_info *t = dev->rdev.lldi.tids; | 1133 | struct tid_info *t = dev->rdev.lldi.tids; |
@@ -1139,7 +1135,7 @@ static int abort_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1139 | ep = lookup_tid(t, tid); | 1135 | ep = lookup_tid(t, tid); |
1140 | PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); | 1136 | PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); |
1141 | BUG_ON(!ep); | 1137 | BUG_ON(!ep); |
1142 | spin_lock_irqsave(&ep->com.lock, flags); | 1138 | mutex_lock(&ep->com.mutex); |
1143 | switch (ep->com.state) { | 1139 | switch (ep->com.state) { |
1144 | case ABORTING: | 1140 | case ABORTING: |
1145 | __state_set(&ep->com, DEAD); | 1141 | __state_set(&ep->com, DEAD); |
@@ -1150,7 +1146,7 @@ static int abort_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1150 | __func__, ep, ep->com.state); | 1146 | __func__, ep, ep->com.state); |
1151 | break; | 1147 | break; |
1152 | } | 1148 | } |
1153 | spin_unlock_irqrestore(&ep->com.lock, flags); | 1149 | mutex_unlock(&ep->com.mutex); |
1154 | 1150 | ||
1155 | if (release) | 1151 | if (release) |
1156 | release_ep_resources(ep); | 1152 | release_ep_resources(ep); |
@@ -1213,9 +1209,9 @@ static int pass_open_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1213 | } | 1209 | } |
1214 | PDBG("%s ep %p status %d error %d\n", __func__, ep, | 1210 | PDBG("%s ep %p status %d error %d\n", __func__, ep, |
1215 | rpl->status, status2errno(rpl->status)); | 1211 | rpl->status, status2errno(rpl->status)); |
1216 | ep->com.rpl_err = status2errno(rpl->status); | 1212 | ep->com.wr_wait.ret = status2errno(rpl->status); |
1217 | ep->com.rpl_done = 1; | 1213 | ep->com.wr_wait.done = 1; |
1218 | wake_up(&ep->com.waitq); | 1214 | wake_up(&ep->com.wr_wait.wait); |
1219 | 1215 | ||
1220 | return 0; | 1216 | return 0; |
1221 | } | 1217 | } |
@@ -1249,9 +1245,9 @@ static int close_listsrv_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1249 | struct c4iw_listen_ep *ep = lookup_stid(t, stid); | 1245 | struct c4iw_listen_ep *ep = lookup_stid(t, stid); |
1250 | 1246 | ||
1251 | PDBG("%s ep %p\n", __func__, ep); | 1247 | PDBG("%s ep %p\n", __func__, ep); |
1252 | ep->com.rpl_err = status2errno(rpl->status); | 1248 | ep->com.wr_wait.ret = status2errno(rpl->status); |
1253 | ep->com.rpl_done = 1; | 1249 | ep->com.wr_wait.done = 1; |
1254 | wake_up(&ep->com.waitq); | 1250 | wake_up(&ep->com.wr_wait.wait); |
1255 | return 0; | 1251 | return 0; |
1256 | } | 1252 | } |
1257 | 1253 | ||
@@ -1478,7 +1474,6 @@ static int peer_close(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1478 | struct cpl_peer_close *hdr = cplhdr(skb); | 1474 | struct cpl_peer_close *hdr = cplhdr(skb); |
1479 | struct c4iw_ep *ep; | 1475 | struct c4iw_ep *ep; |
1480 | struct c4iw_qp_attributes attrs; | 1476 | struct c4iw_qp_attributes attrs; |
1481 | unsigned long flags; | ||
1482 | int disconnect = 1; | 1477 | int disconnect = 1; |
1483 | int release = 0; | 1478 | int release = 0; |
1484 | int closing = 0; | 1479 | int closing = 0; |
@@ -1489,7 +1484,7 @@ static int peer_close(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1489 | PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); | 1484 | PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); |
1490 | dst_confirm(ep->dst); | 1485 | dst_confirm(ep->dst); |
1491 | 1486 | ||
1492 | spin_lock_irqsave(&ep->com.lock, flags); | 1487 | mutex_lock(&ep->com.mutex); |
1493 | switch (ep->com.state) { | 1488 | switch (ep->com.state) { |
1494 | case MPA_REQ_WAIT: | 1489 | case MPA_REQ_WAIT: |
1495 | __state_set(&ep->com, CLOSING); | 1490 | __state_set(&ep->com, CLOSING); |
@@ -1507,17 +1502,17 @@ static int peer_close(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1507 | * in rdma connection migration (see c4iw_accept_cr()). | 1502 | * in rdma connection migration (see c4iw_accept_cr()). |
1508 | */ | 1503 | */ |
1509 | __state_set(&ep->com, CLOSING); | 1504 | __state_set(&ep->com, CLOSING); |
1510 | ep->com.rpl_done = 1; | 1505 | ep->com.wr_wait.done = 1; |
1511 | ep->com.rpl_err = -ECONNRESET; | 1506 | ep->com.wr_wait.ret = -ECONNRESET; |
1512 | PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); | 1507 | PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); |
1513 | wake_up(&ep->com.waitq); | 1508 | wake_up(&ep->com.wr_wait.wait); |
1514 | break; | 1509 | break; |
1515 | case MPA_REP_SENT: | 1510 | case MPA_REP_SENT: |
1516 | __state_set(&ep->com, CLOSING); | 1511 | __state_set(&ep->com, CLOSING); |
1517 | ep->com.rpl_done = 1; | 1512 | ep->com.wr_wait.done = 1; |
1518 | ep->com.rpl_err = -ECONNRESET; | 1513 | ep->com.wr_wait.ret = -ECONNRESET; |
1519 | PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); | 1514 | PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); |
1520 | wake_up(&ep->com.waitq); | 1515 | wake_up(&ep->com.wr_wait.wait); |
1521 | break; | 1516 | break; |
1522 | case FPDU_MODE: | 1517 | case FPDU_MODE: |
1523 | start_ep_timer(ep); | 1518 | start_ep_timer(ep); |
@@ -1550,7 +1545,7 @@ static int peer_close(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1550 | default: | 1545 | default: |
1551 | BUG_ON(1); | 1546 | BUG_ON(1); |
1552 | } | 1547 | } |
1553 | spin_unlock_irqrestore(&ep->com.lock, flags); | 1548 | mutex_unlock(&ep->com.mutex); |
1554 | if (closing) { | 1549 | if (closing) { |
1555 | attrs.next_state = C4IW_QP_STATE_CLOSING; | 1550 | attrs.next_state = C4IW_QP_STATE_CLOSING; |
1556 | c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, | 1551 | c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, |
@@ -1581,7 +1576,6 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1581 | struct c4iw_qp_attributes attrs; | 1576 | struct c4iw_qp_attributes attrs; |
1582 | int ret; | 1577 | int ret; |
1583 | int release = 0; | 1578 | int release = 0; |
1584 | unsigned long flags; | ||
1585 | struct tid_info *t = dev->rdev.lldi.tids; | 1579 | struct tid_info *t = dev->rdev.lldi.tids; |
1586 | unsigned int tid = GET_TID(req); | 1580 | unsigned int tid = GET_TID(req); |
1587 | 1581 | ||
@@ -1591,9 +1585,17 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1591 | ep->hwtid); | 1585 | ep->hwtid); |
1592 | return 0; | 1586 | return 0; |
1593 | } | 1587 | } |
1594 | spin_lock_irqsave(&ep->com.lock, flags); | ||
1595 | PDBG("%s ep %p tid %u state %u\n", __func__, ep, ep->hwtid, | 1588 | PDBG("%s ep %p tid %u state %u\n", __func__, ep, ep->hwtid, |
1596 | ep->com.state); | 1589 | ep->com.state); |
1590 | |||
1591 | /* | ||
1592 | * Wake up any threads in rdma_init() or rdma_fini(). | ||
1593 | */ | ||
1594 | ep->com.wr_wait.done = 1; | ||
1595 | ep->com.wr_wait.ret = -ECONNRESET; | ||
1596 | wake_up(&ep->com.wr_wait.wait); | ||
1597 | |||
1598 | mutex_lock(&ep->com.mutex); | ||
1597 | switch (ep->com.state) { | 1599 | switch (ep->com.state) { |
1598 | case CONNECTING: | 1600 | case CONNECTING: |
1599 | break; | 1601 | break; |
@@ -1605,23 +1607,8 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1605 | connect_reply_upcall(ep, -ECONNRESET); | 1607 | connect_reply_upcall(ep, -ECONNRESET); |
1606 | break; | 1608 | break; |
1607 | case MPA_REP_SENT: | 1609 | case MPA_REP_SENT: |
1608 | ep->com.rpl_done = 1; | ||
1609 | ep->com.rpl_err = -ECONNRESET; | ||
1610 | PDBG("waking up ep %p\n", ep); | ||
1611 | wake_up(&ep->com.waitq); | ||
1612 | break; | 1610 | break; |
1613 | case MPA_REQ_RCVD: | 1611 | case MPA_REQ_RCVD: |
1614 | |||
1615 | /* | ||
1616 | * We're gonna mark this puppy DEAD, but keep | ||
1617 | * the reference on it until the ULP accepts or | ||
1618 | * rejects the CR. Also wake up anyone waiting | ||
1619 | * in rdma connection migration (see c4iw_accept_cr()). | ||
1620 | */ | ||
1621 | ep->com.rpl_done = 1; | ||
1622 | ep->com.rpl_err = -ECONNRESET; | ||
1623 | PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); | ||
1624 | wake_up(&ep->com.waitq); | ||
1625 | break; | 1612 | break; |
1626 | case MORIBUND: | 1613 | case MORIBUND: |
1627 | case CLOSING: | 1614 | case CLOSING: |
@@ -1644,7 +1631,7 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1644 | break; | 1631 | break; |
1645 | case DEAD: | 1632 | case DEAD: |
1646 | PDBG("%s PEER_ABORT IN DEAD STATE!!!!\n", __func__); | 1633 | PDBG("%s PEER_ABORT IN DEAD STATE!!!!\n", __func__); |
1647 | spin_unlock_irqrestore(&ep->com.lock, flags); | 1634 | mutex_unlock(&ep->com.mutex); |
1648 | return 0; | 1635 | return 0; |
1649 | default: | 1636 | default: |
1650 | BUG_ON(1); | 1637 | BUG_ON(1); |
@@ -1655,7 +1642,7 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1655 | __state_set(&ep->com, DEAD); | 1642 | __state_set(&ep->com, DEAD); |
1656 | release = 1; | 1643 | release = 1; |
1657 | } | 1644 | } |
1658 | spin_unlock_irqrestore(&ep->com.lock, flags); | 1645 | mutex_unlock(&ep->com.mutex); |
1659 | 1646 | ||
1660 | rpl_skb = get_skb(skb, sizeof(*rpl), GFP_KERNEL); | 1647 | rpl_skb = get_skb(skb, sizeof(*rpl), GFP_KERNEL); |
1661 | if (!rpl_skb) { | 1648 | if (!rpl_skb) { |
@@ -1681,7 +1668,6 @@ static int close_con_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1681 | struct c4iw_ep *ep; | 1668 | struct c4iw_ep *ep; |
1682 | struct c4iw_qp_attributes attrs; | 1669 | struct c4iw_qp_attributes attrs; |
1683 | struct cpl_close_con_rpl *rpl = cplhdr(skb); | 1670 | struct cpl_close_con_rpl *rpl = cplhdr(skb); |
1684 | unsigned long flags; | ||
1685 | int release = 0; | 1671 | int release = 0; |
1686 | struct tid_info *t = dev->rdev.lldi.tids; | 1672 | struct tid_info *t = dev->rdev.lldi.tids; |
1687 | unsigned int tid = GET_TID(rpl); | 1673 | unsigned int tid = GET_TID(rpl); |
@@ -1692,7 +1678,7 @@ static int close_con_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1692 | BUG_ON(!ep); | 1678 | BUG_ON(!ep); |
1693 | 1679 | ||
1694 | /* The cm_id may be null if we failed to connect */ | 1680 | /* The cm_id may be null if we failed to connect */ |
1695 | spin_lock_irqsave(&ep->com.lock, flags); | 1681 | mutex_lock(&ep->com.mutex); |
1696 | switch (ep->com.state) { | 1682 | switch (ep->com.state) { |
1697 | case CLOSING: | 1683 | case CLOSING: |
1698 | __state_set(&ep->com, MORIBUND); | 1684 | __state_set(&ep->com, MORIBUND); |
@@ -1717,7 +1703,7 @@ static int close_con_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1717 | BUG_ON(1); | 1703 | BUG_ON(1); |
1718 | break; | 1704 | break; |
1719 | } | 1705 | } |
1720 | spin_unlock_irqrestore(&ep->com.lock, flags); | 1706 | mutex_unlock(&ep->com.mutex); |
1721 | if (release) | 1707 | if (release) |
1722 | release_ep_resources(ep); | 1708 | release_ep_resources(ep); |
1723 | return 0; | 1709 | return 0; |
@@ -1725,23 +1711,24 @@ static int close_con_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1725 | 1711 | ||
1726 | static int terminate(struct c4iw_dev *dev, struct sk_buff *skb) | 1712 | static int terminate(struct c4iw_dev *dev, struct sk_buff *skb) |
1727 | { | 1713 | { |
1728 | struct c4iw_ep *ep; | 1714 | struct cpl_rdma_terminate *rpl = cplhdr(skb); |
1729 | struct cpl_rdma_terminate *term = cplhdr(skb); | ||
1730 | struct tid_info *t = dev->rdev.lldi.tids; | 1715 | struct tid_info *t = dev->rdev.lldi.tids; |
1731 | unsigned int tid = GET_TID(term); | 1716 | unsigned int tid = GET_TID(rpl); |
1717 | struct c4iw_ep *ep; | ||
1718 | struct c4iw_qp_attributes attrs; | ||
1732 | 1719 | ||
1733 | ep = lookup_tid(t, tid); | 1720 | ep = lookup_tid(t, tid); |
1721 | BUG_ON(!ep); | ||
1734 | 1722 | ||
1735 | if (state_read(&ep->com) != FPDU_MODE) | 1723 | if (ep->com.qp) { |
1736 | return 0; | 1724 | printk(KERN_WARNING MOD "TERM received tid %u qpid %u\n", tid, |
1725 | ep->com.qp->wq.sq.qid); | ||
1726 | attrs.next_state = C4IW_QP_STATE_TERMINATE; | ||
1727 | c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, | ||
1728 | C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); | ||
1729 | } else | ||
1730 | printk(KERN_WARNING MOD "TERM received tid %u no qp\n", tid); | ||
1737 | 1731 | ||
1738 | PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); | ||
1739 | skb_pull(skb, sizeof *term); | ||
1740 | PDBG("%s saving %d bytes of term msg\n", __func__, skb->len); | ||
1741 | skb_copy_from_linear_data(skb, ep->com.qp->attr.terminate_buffer, | ||
1742 | skb->len); | ||
1743 | ep->com.qp->attr.terminate_msg_len = skb->len; | ||
1744 | ep->com.qp->attr.is_terminate_local = 0; | ||
1745 | return 0; | 1732 | return 0; |
1746 | } | 1733 | } |
1747 | 1734 | ||
@@ -1762,8 +1749,8 @@ static int fw4_ack(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1762 | ep = lookup_tid(t, tid); | 1749 | ep = lookup_tid(t, tid); |
1763 | PDBG("%s ep %p tid %u credits %u\n", __func__, ep, ep->hwtid, credits); | 1750 | PDBG("%s ep %p tid %u credits %u\n", __func__, ep, ep->hwtid, credits); |
1764 | if (credits == 0) { | 1751 | if (credits == 0) { |
1765 | PDBG(KERN_ERR "%s 0 credit ack ep %p tid %u state %u\n", | 1752 | PDBG("%s 0 credit ack ep %p tid %u state %u\n", |
1766 | __func__, ep, ep->hwtid, state_read(&ep->com)); | 1753 | __func__, ep, ep->hwtid, state_read(&ep->com)); |
1767 | return 0; | 1754 | return 0; |
1768 | } | 1755 | } |
1769 | 1756 | ||
@@ -2042,6 +2029,7 @@ int c4iw_create_listen(struct iw_cm_id *cm_id, int backlog) | |||
2042 | } | 2029 | } |
2043 | 2030 | ||
2044 | state_set(&ep->com, LISTEN); | 2031 | state_set(&ep->com, LISTEN); |
2032 | c4iw_init_wr_wait(&ep->com.wr_wait); | ||
2045 | err = cxgb4_create_server(ep->com.dev->rdev.lldi.ports[0], ep->stid, | 2033 | err = cxgb4_create_server(ep->com.dev->rdev.lldi.ports[0], ep->stid, |
2046 | ep->com.local_addr.sin_addr.s_addr, | 2034 | ep->com.local_addr.sin_addr.s_addr, |
2047 | ep->com.local_addr.sin_port, | 2035 | ep->com.local_addr.sin_port, |
@@ -2050,15 +2038,8 @@ int c4iw_create_listen(struct iw_cm_id *cm_id, int backlog) | |||
2050 | goto fail3; | 2038 | goto fail3; |
2051 | 2039 | ||
2052 | /* wait for pass_open_rpl */ | 2040 | /* wait for pass_open_rpl */ |
2053 | wait_event_timeout(ep->com.waitq, ep->com.rpl_done, C4IW_WR_TO); | 2041 | err = c4iw_wait_for_reply(&ep->com.dev->rdev, &ep->com.wr_wait, 0, 0, |
2054 | if (ep->com.rpl_done) | 2042 | __func__); |
2055 | err = ep->com.rpl_err; | ||
2056 | else { | ||
2057 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
2058 | pci_name(ep->com.dev->rdev.lldi.pdev)); | ||
2059 | ep->com.dev->rdev.flags = T4_FATAL_ERROR; | ||
2060 | err = -EIO; | ||
2061 | } | ||
2062 | if (!err) { | 2043 | if (!err) { |
2063 | cm_id->provider_data = ep; | 2044 | cm_id->provider_data = ep; |
2064 | goto out; | 2045 | goto out; |
@@ -2082,20 +2063,12 @@ int c4iw_destroy_listen(struct iw_cm_id *cm_id) | |||
2082 | 2063 | ||
2083 | might_sleep(); | 2064 | might_sleep(); |
2084 | state_set(&ep->com, DEAD); | 2065 | state_set(&ep->com, DEAD); |
2085 | ep->com.rpl_done = 0; | 2066 | c4iw_init_wr_wait(&ep->com.wr_wait); |
2086 | ep->com.rpl_err = 0; | ||
2087 | err = listen_stop(ep); | 2067 | err = listen_stop(ep); |
2088 | if (err) | 2068 | if (err) |
2089 | goto done; | 2069 | goto done; |
2090 | wait_event_timeout(ep->com.waitq, ep->com.rpl_done, C4IW_WR_TO); | 2070 | err = c4iw_wait_for_reply(&ep->com.dev->rdev, &ep->com.wr_wait, 0, 0, |
2091 | if (ep->com.rpl_done) | 2071 | __func__); |
2092 | err = ep->com.rpl_err; | ||
2093 | else { | ||
2094 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
2095 | pci_name(ep->com.dev->rdev.lldi.pdev)); | ||
2096 | ep->com.dev->rdev.flags = T4_FATAL_ERROR; | ||
2097 | err = -EIO; | ||
2098 | } | ||
2099 | cxgb4_free_stid(ep->com.dev->rdev.lldi.tids, ep->stid, PF_INET); | 2072 | cxgb4_free_stid(ep->com.dev->rdev.lldi.tids, ep->stid, PF_INET); |
2100 | done: | 2073 | done: |
2101 | cm_id->rem_ref(cm_id); | 2074 | cm_id->rem_ref(cm_id); |
@@ -2106,12 +2079,11 @@ done: | |||
2106 | int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp) | 2079 | int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp) |
2107 | { | 2080 | { |
2108 | int ret = 0; | 2081 | int ret = 0; |
2109 | unsigned long flags; | ||
2110 | int close = 0; | 2082 | int close = 0; |
2111 | int fatal = 0; | 2083 | int fatal = 0; |
2112 | struct c4iw_rdev *rdev; | 2084 | struct c4iw_rdev *rdev; |
2113 | 2085 | ||
2114 | spin_lock_irqsave(&ep->com.lock, flags); | 2086 | mutex_lock(&ep->com.mutex); |
2115 | 2087 | ||
2116 | PDBG("%s ep %p state %s, abrupt %d\n", __func__, ep, | 2088 | PDBG("%s ep %p state %s, abrupt %d\n", __func__, ep, |
2117 | states[ep->com.state], abrupt); | 2089 | states[ep->com.state], abrupt); |
@@ -2158,7 +2130,7 @@ int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp) | |||
2158 | break; | 2130 | break; |
2159 | } | 2131 | } |
2160 | 2132 | ||
2161 | spin_unlock_irqrestore(&ep->com.lock, flags); | 2133 | mutex_unlock(&ep->com.mutex); |
2162 | if (close) { | 2134 | if (close) { |
2163 | if (abrupt) | 2135 | if (abrupt) |
2164 | ret = abort_connection(ep, NULL, gfp); | 2136 | ret = abort_connection(ep, NULL, gfp); |
@@ -2172,6 +2144,13 @@ int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp) | |||
2172 | return ret; | 2144 | return ret; |
2173 | } | 2145 | } |
2174 | 2146 | ||
2147 | static int async_event(struct c4iw_dev *dev, struct sk_buff *skb) | ||
2148 | { | ||
2149 | struct cpl_fw6_msg *rpl = cplhdr(skb); | ||
2150 | c4iw_ev_dispatch(dev, (struct t4_cqe *)&rpl->data[0]); | ||
2151 | return 0; | ||
2152 | } | ||
2153 | |||
2175 | /* | 2154 | /* |
2176 | * These are the real handlers that are called from a | 2155 | * These are the real handlers that are called from a |
2177 | * work queue. | 2156 | * work queue. |
@@ -2190,7 +2169,8 @@ static c4iw_handler_func work_handlers[NUM_CPL_CMDS] = { | |||
2190 | [CPL_ABORT_REQ_RSS] = peer_abort, | 2169 | [CPL_ABORT_REQ_RSS] = peer_abort, |
2191 | [CPL_CLOSE_CON_RPL] = close_con_rpl, | 2170 | [CPL_CLOSE_CON_RPL] = close_con_rpl, |
2192 | [CPL_RDMA_TERMINATE] = terminate, | 2171 | [CPL_RDMA_TERMINATE] = terminate, |
2193 | [CPL_FW4_ACK] = fw4_ack | 2172 | [CPL_FW4_ACK] = fw4_ack, |
2173 | [CPL_FW6_MSG] = async_event | ||
2194 | }; | 2174 | }; |
2195 | 2175 | ||
2196 | static void process_timeout(struct c4iw_ep *ep) | 2176 | static void process_timeout(struct c4iw_ep *ep) |
@@ -2198,7 +2178,7 @@ static void process_timeout(struct c4iw_ep *ep) | |||
2198 | struct c4iw_qp_attributes attrs; | 2178 | struct c4iw_qp_attributes attrs; |
2199 | int abort = 1; | 2179 | int abort = 1; |
2200 | 2180 | ||
2201 | spin_lock_irq(&ep->com.lock); | 2181 | mutex_lock(&ep->com.mutex); |
2202 | PDBG("%s ep %p tid %u state %d\n", __func__, ep, ep->hwtid, | 2182 | PDBG("%s ep %p tid %u state %d\n", __func__, ep, ep->hwtid, |
2203 | ep->com.state); | 2183 | ep->com.state); |
2204 | switch (ep->com.state) { | 2184 | switch (ep->com.state) { |
@@ -2225,7 +2205,7 @@ static void process_timeout(struct c4iw_ep *ep) | |||
2225 | WARN_ON(1); | 2205 | WARN_ON(1); |
2226 | abort = 0; | 2206 | abort = 0; |
2227 | } | 2207 | } |
2228 | spin_unlock_irq(&ep->com.lock); | 2208 | mutex_unlock(&ep->com.mutex); |
2229 | if (abort) | 2209 | if (abort) |
2230 | abort_connection(ep, NULL, GFP_KERNEL); | 2210 | abort_connection(ep, NULL, GFP_KERNEL); |
2231 | c4iw_put_ep(&ep->com); | 2211 | c4iw_put_ep(&ep->com); |
@@ -2309,6 +2289,7 @@ static int set_tcb_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
2309 | printk(KERN_ERR MOD "Unexpected SET_TCB_RPL status %u " | 2289 | printk(KERN_ERR MOD "Unexpected SET_TCB_RPL status %u " |
2310 | "for tid %u\n", rpl->status, GET_TID(rpl)); | 2290 | "for tid %u\n", rpl->status, GET_TID(rpl)); |
2311 | } | 2291 | } |
2292 | kfree_skb(skb); | ||
2312 | return 0; | 2293 | return 0; |
2313 | } | 2294 | } |
2314 | 2295 | ||
@@ -2323,20 +2304,25 @@ static int fw6_msg(struct c4iw_dev *dev, struct sk_buff *skb) | |||
2323 | switch (rpl->type) { | 2304 | switch (rpl->type) { |
2324 | case 1: | 2305 | case 1: |
2325 | ret = (int)((be64_to_cpu(rpl->data[0]) >> 8) & 0xff); | 2306 | ret = (int)((be64_to_cpu(rpl->data[0]) >> 8) & 0xff); |
2326 | wr_waitp = (__force struct c4iw_wr_wait *)rpl->data[1]; | 2307 | wr_waitp = (struct c4iw_wr_wait *)(__force unsigned long) rpl->data[1]; |
2327 | PDBG("%s wr_waitp %p ret %u\n", __func__, wr_waitp, ret); | 2308 | PDBG("%s wr_waitp %p ret %u\n", __func__, wr_waitp, ret); |
2328 | if (wr_waitp) { | 2309 | if (wr_waitp) { |
2329 | wr_waitp->ret = ret; | 2310 | if (ret) |
2311 | wr_waitp->ret = -ret; | ||
2312 | else | ||
2313 | wr_waitp->ret = 0; | ||
2330 | wr_waitp->done = 1; | 2314 | wr_waitp->done = 1; |
2331 | wake_up(&wr_waitp->wait); | 2315 | wake_up(&wr_waitp->wait); |
2332 | } | 2316 | } |
2317 | kfree_skb(skb); | ||
2333 | break; | 2318 | break; |
2334 | case 2: | 2319 | case 2: |
2335 | c4iw_ev_dispatch(dev, (struct t4_cqe *)&rpl->data[0]); | 2320 | sched(dev, skb); |
2336 | break; | 2321 | break; |
2337 | default: | 2322 | default: |
2338 | printk(KERN_ERR MOD "%s unexpected fw6 msg type %u\n", __func__, | 2323 | printk(KERN_ERR MOD "%s unexpected fw6 msg type %u\n", __func__, |
2339 | rpl->type); | 2324 | rpl->type); |
2325 | kfree_skb(skb); | ||
2340 | break; | 2326 | break; |
2341 | } | 2327 | } |
2342 | return 0; | 2328 | return 0; |
diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c index b3daf39eed4a..8d8f8add6fcd 100644 --- a/drivers/infiniband/hw/cxgb4/cq.c +++ b/drivers/infiniband/hw/cxgb4/cq.c | |||
@@ -55,7 +55,7 @@ static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
55 | V_FW_RI_RES_WR_NRES(1) | | 55 | V_FW_RI_RES_WR_NRES(1) | |
56 | FW_WR_COMPL(1)); | 56 | FW_WR_COMPL(1)); |
57 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 57 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
58 | res_wr->cookie = (u64)&wr_wait; | 58 | res_wr->cookie = (unsigned long) &wr_wait; |
59 | res = res_wr->res; | 59 | res = res_wr->res; |
60 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; | 60 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; |
61 | res->u.cq.op = FW_RI_RES_OP_RESET; | 61 | res->u.cq.op = FW_RI_RES_OP_RESET; |
@@ -64,14 +64,7 @@ static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
64 | c4iw_init_wr_wait(&wr_wait); | 64 | c4iw_init_wr_wait(&wr_wait); |
65 | ret = c4iw_ofld_send(rdev, skb); | 65 | ret = c4iw_ofld_send(rdev, skb); |
66 | if (!ret) { | 66 | if (!ret) { |
67 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 67 | ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, 0, __func__); |
68 | if (!wr_wait.done) { | ||
69 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
70 | pci_name(rdev->lldi.pdev)); | ||
71 | rdev->flags = T4_FATAL_ERROR; | ||
72 | ret = -EIO; | ||
73 | } else | ||
74 | ret = wr_wait.ret; | ||
75 | } | 68 | } |
76 | 69 | ||
77 | kfree(cq->sw_queue); | 70 | kfree(cq->sw_queue); |
@@ -132,7 +125,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
132 | V_FW_RI_RES_WR_NRES(1) | | 125 | V_FW_RI_RES_WR_NRES(1) | |
133 | FW_WR_COMPL(1)); | 126 | FW_WR_COMPL(1)); |
134 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 127 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
135 | res_wr->cookie = (u64)&wr_wait; | 128 | res_wr->cookie = (unsigned long) &wr_wait; |
136 | res = res_wr->res; | 129 | res = res_wr->res; |
137 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; | 130 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; |
138 | res->u.cq.op = FW_RI_RES_OP_WRITE; | 131 | res->u.cq.op = FW_RI_RES_OP_WRITE; |
@@ -157,14 +150,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
157 | if (ret) | 150 | if (ret) |
158 | goto err4; | 151 | goto err4; |
159 | PDBG("%s wait_event wr_wait %p\n", __func__, &wr_wait); | 152 | PDBG("%s wait_event wr_wait %p\n", __func__, &wr_wait); |
160 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 153 | ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, 0, __func__); |
161 | if (!wr_wait.done) { | ||
162 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
163 | pci_name(rdev->lldi.pdev)); | ||
164 | rdev->flags = T4_FATAL_ERROR; | ||
165 | ret = -EIO; | ||
166 | } else | ||
167 | ret = wr_wait.ret; | ||
168 | if (ret) | 154 | if (ret) |
169 | goto err4; | 155 | goto err4; |
170 | 156 | ||
@@ -476,6 +462,11 @@ static int poll_cq(struct t4_wq *wq, struct t4_cq *cq, struct t4_cqe *cqe, | |||
476 | goto proc_cqe; | 462 | goto proc_cqe; |
477 | } | 463 | } |
478 | 464 | ||
465 | if (CQE_OPCODE(hw_cqe) == FW_RI_TERMINATE) { | ||
466 | ret = -EAGAIN; | ||
467 | goto skip_cqe; | ||
468 | } | ||
469 | |||
479 | /* | 470 | /* |
480 | * RECV completion. | 471 | * RECV completion. |
481 | */ | 472 | */ |
@@ -696,6 +687,7 @@ static int c4iw_poll_cq_one(struct c4iw_cq *chp, struct ib_wc *wc) | |||
696 | case T4_ERR_MSN_RANGE: | 687 | case T4_ERR_MSN_RANGE: |
697 | case T4_ERR_IRD_OVERFLOW: | 688 | case T4_ERR_IRD_OVERFLOW: |
698 | case T4_ERR_OPCODE: | 689 | case T4_ERR_OPCODE: |
690 | case T4_ERR_INTERNAL_ERR: | ||
699 | wc->status = IB_WC_FATAL_ERR; | 691 | wc->status = IB_WC_FATAL_ERR; |
700 | break; | 692 | break; |
701 | case T4_ERR_SWFLUSH: | 693 | case T4_ERR_SWFLUSH: |
diff --git a/drivers/infiniband/hw/cxgb4/device.c b/drivers/infiniband/hw/cxgb4/device.c index 9bbf491d5d9e..54fbc1118abe 100644 --- a/drivers/infiniband/hw/cxgb4/device.c +++ b/drivers/infiniband/hw/cxgb4/device.c | |||
@@ -49,29 +49,33 @@ static DEFINE_MUTEX(dev_mutex); | |||
49 | 49 | ||
50 | static struct dentry *c4iw_debugfs_root; | 50 | static struct dentry *c4iw_debugfs_root; |
51 | 51 | ||
52 | struct debugfs_qp_data { | 52 | struct c4iw_debugfs_data { |
53 | struct c4iw_dev *devp; | 53 | struct c4iw_dev *devp; |
54 | char *buf; | 54 | char *buf; |
55 | int bufsize; | 55 | int bufsize; |
56 | int pos; | 56 | int pos; |
57 | }; | 57 | }; |
58 | 58 | ||
59 | static int count_qps(int id, void *p, void *data) | 59 | static int count_idrs(int id, void *p, void *data) |
60 | { | 60 | { |
61 | struct c4iw_qp *qp = p; | ||
62 | int *countp = data; | 61 | int *countp = data; |
63 | 62 | ||
64 | if (id != qp->wq.sq.qid) | ||
65 | return 0; | ||
66 | |||
67 | *countp = *countp + 1; | 63 | *countp = *countp + 1; |
68 | return 0; | 64 | return 0; |
69 | } | 65 | } |
70 | 66 | ||
71 | static int dump_qps(int id, void *p, void *data) | 67 | static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count, |
68 | loff_t *ppos) | ||
69 | { | ||
70 | struct c4iw_debugfs_data *d = file->private_data; | ||
71 | |||
72 | return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos); | ||
73 | } | ||
74 | |||
75 | static int dump_qp(int id, void *p, void *data) | ||
72 | { | 76 | { |
73 | struct c4iw_qp *qp = p; | 77 | struct c4iw_qp *qp = p; |
74 | struct debugfs_qp_data *qpd = data; | 78 | struct c4iw_debugfs_data *qpd = data; |
75 | int space; | 79 | int space; |
76 | int cc; | 80 | int cc; |
77 | 81 | ||
@@ -101,7 +105,7 @@ static int dump_qps(int id, void *p, void *data) | |||
101 | 105 | ||
102 | static int qp_release(struct inode *inode, struct file *file) | 106 | static int qp_release(struct inode *inode, struct file *file) |
103 | { | 107 | { |
104 | struct debugfs_qp_data *qpd = file->private_data; | 108 | struct c4iw_debugfs_data *qpd = file->private_data; |
105 | if (!qpd) { | 109 | if (!qpd) { |
106 | printk(KERN_INFO "%s null qpd?\n", __func__); | 110 | printk(KERN_INFO "%s null qpd?\n", __func__); |
107 | return 0; | 111 | return 0; |
@@ -113,7 +117,7 @@ static int qp_release(struct inode *inode, struct file *file) | |||
113 | 117 | ||
114 | static int qp_open(struct inode *inode, struct file *file) | 118 | static int qp_open(struct inode *inode, struct file *file) |
115 | { | 119 | { |
116 | struct debugfs_qp_data *qpd; | 120 | struct c4iw_debugfs_data *qpd; |
117 | int ret = 0; | 121 | int ret = 0; |
118 | int count = 1; | 122 | int count = 1; |
119 | 123 | ||
@@ -126,7 +130,7 @@ static int qp_open(struct inode *inode, struct file *file) | |||
126 | qpd->pos = 0; | 130 | qpd->pos = 0; |
127 | 131 | ||
128 | spin_lock_irq(&qpd->devp->lock); | 132 | spin_lock_irq(&qpd->devp->lock); |
129 | idr_for_each(&qpd->devp->qpidr, count_qps, &count); | 133 | idr_for_each(&qpd->devp->qpidr, count_idrs, &count); |
130 | spin_unlock_irq(&qpd->devp->lock); | 134 | spin_unlock_irq(&qpd->devp->lock); |
131 | 135 | ||
132 | qpd->bufsize = count * 128; | 136 | qpd->bufsize = count * 128; |
@@ -137,7 +141,7 @@ static int qp_open(struct inode *inode, struct file *file) | |||
137 | } | 141 | } |
138 | 142 | ||
139 | spin_lock_irq(&qpd->devp->lock); | 143 | spin_lock_irq(&qpd->devp->lock); |
140 | idr_for_each(&qpd->devp->qpidr, dump_qps, qpd); | 144 | idr_for_each(&qpd->devp->qpidr, dump_qp, qpd); |
141 | spin_unlock_irq(&qpd->devp->lock); | 145 | spin_unlock_irq(&qpd->devp->lock); |
142 | 146 | ||
143 | qpd->buf[qpd->pos++] = 0; | 147 | qpd->buf[qpd->pos++] = 0; |
@@ -149,43 +153,86 @@ out: | |||
149 | return ret; | 153 | return ret; |
150 | } | 154 | } |
151 | 155 | ||
152 | static ssize_t qp_read(struct file *file, char __user *buf, size_t count, | 156 | static const struct file_operations qp_debugfs_fops = { |
153 | loff_t *ppos) | 157 | .owner = THIS_MODULE, |
158 | .open = qp_open, | ||
159 | .release = qp_release, | ||
160 | .read = debugfs_read, | ||
161 | .llseek = default_llseek, | ||
162 | }; | ||
163 | |||
164 | static int dump_stag(int id, void *p, void *data) | ||
154 | { | 165 | { |
155 | struct debugfs_qp_data *qpd = file->private_data; | 166 | struct c4iw_debugfs_data *stagd = data; |
156 | loff_t pos = *ppos; | 167 | int space; |
157 | loff_t avail = qpd->pos; | 168 | int cc; |
158 | 169 | ||
159 | if (pos < 0) | 170 | space = stagd->bufsize - stagd->pos - 1; |
160 | return -EINVAL; | 171 | if (space == 0) |
161 | if (pos >= avail) | 172 | return 1; |
173 | |||
174 | cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8); | ||
175 | if (cc < space) | ||
176 | stagd->pos += cc; | ||
177 | return 0; | ||
178 | } | ||
179 | |||
180 | static int stag_release(struct inode *inode, struct file *file) | ||
181 | { | ||
182 | struct c4iw_debugfs_data *stagd = file->private_data; | ||
183 | if (!stagd) { | ||
184 | printk(KERN_INFO "%s null stagd?\n", __func__); | ||
162 | return 0; | 185 | return 0; |
163 | if (count > avail - pos) | 186 | } |
164 | count = avail - pos; | 187 | kfree(stagd->buf); |
188 | kfree(stagd); | ||
189 | return 0; | ||
190 | } | ||
165 | 191 | ||
166 | while (count) { | 192 | static int stag_open(struct inode *inode, struct file *file) |
167 | size_t len = 0; | 193 | { |
194 | struct c4iw_debugfs_data *stagd; | ||
195 | int ret = 0; | ||
196 | int count = 1; | ||
168 | 197 | ||
169 | len = min((int)count, (int)qpd->pos - (int)pos); | 198 | stagd = kmalloc(sizeof *stagd, GFP_KERNEL); |
170 | if (copy_to_user(buf, qpd->buf + pos, len)) | 199 | if (!stagd) { |
171 | return -EFAULT; | 200 | ret = -ENOMEM; |
172 | if (len == 0) | 201 | goto out; |
173 | return -EINVAL; | 202 | } |
203 | stagd->devp = inode->i_private; | ||
204 | stagd->pos = 0; | ||
205 | |||
206 | spin_lock_irq(&stagd->devp->lock); | ||
207 | idr_for_each(&stagd->devp->mmidr, count_idrs, &count); | ||
208 | spin_unlock_irq(&stagd->devp->lock); | ||
174 | 209 | ||
175 | buf += len; | 210 | stagd->bufsize = count * sizeof("0x12345678\n"); |
176 | pos += len; | 211 | stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL); |
177 | count -= len; | 212 | if (!stagd->buf) { |
213 | ret = -ENOMEM; | ||
214 | goto err1; | ||
178 | } | 215 | } |
179 | count = pos - *ppos; | 216 | |
180 | *ppos = pos; | 217 | spin_lock_irq(&stagd->devp->lock); |
181 | return count; | 218 | idr_for_each(&stagd->devp->mmidr, dump_stag, stagd); |
219 | spin_unlock_irq(&stagd->devp->lock); | ||
220 | |||
221 | stagd->buf[stagd->pos++] = 0; | ||
222 | file->private_data = stagd; | ||
223 | goto out; | ||
224 | err1: | ||
225 | kfree(stagd); | ||
226 | out: | ||
227 | return ret; | ||
182 | } | 228 | } |
183 | 229 | ||
184 | static const struct file_operations qp_debugfs_fops = { | 230 | static const struct file_operations stag_debugfs_fops = { |
185 | .owner = THIS_MODULE, | 231 | .owner = THIS_MODULE, |
186 | .open = qp_open, | 232 | .open = stag_open, |
187 | .release = qp_release, | 233 | .release = stag_release, |
188 | .read = qp_read, | 234 | .read = debugfs_read, |
235 | .llseek = default_llseek, | ||
189 | }; | 236 | }; |
190 | 237 | ||
191 | static int setup_debugfs(struct c4iw_dev *devp) | 238 | static int setup_debugfs(struct c4iw_dev *devp) |
@@ -199,6 +246,11 @@ static int setup_debugfs(struct c4iw_dev *devp) | |||
199 | (void *)devp, &qp_debugfs_fops); | 246 | (void *)devp, &qp_debugfs_fops); |
200 | if (de && de->d_inode) | 247 | if (de && de->d_inode) |
201 | de->d_inode->i_size = 4096; | 248 | de->d_inode->i_size = 4096; |
249 | |||
250 | de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root, | ||
251 | (void *)devp, &stag_debugfs_fops); | ||
252 | if (de && de->d_inode) | ||
253 | de->d_inode->i_size = 4096; | ||
202 | return 0; | 254 | return 0; |
203 | } | 255 | } |
204 | 256 | ||
@@ -290,7 +342,14 @@ static int c4iw_rdev_open(struct c4iw_rdev *rdev) | |||
290 | printk(KERN_ERR MOD "error %d initializing rqt pool\n", err); | 342 | printk(KERN_ERR MOD "error %d initializing rqt pool\n", err); |
291 | goto err3; | 343 | goto err3; |
292 | } | 344 | } |
345 | err = c4iw_ocqp_pool_create(rdev); | ||
346 | if (err) { | ||
347 | printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err); | ||
348 | goto err4; | ||
349 | } | ||
293 | return 0; | 350 | return 0; |
351 | err4: | ||
352 | c4iw_rqtpool_destroy(rdev); | ||
294 | err3: | 353 | err3: |
295 | c4iw_pblpool_destroy(rdev); | 354 | c4iw_pblpool_destroy(rdev); |
296 | err2: | 355 | err2: |
@@ -317,6 +376,7 @@ static void c4iw_remove(struct c4iw_dev *dev) | |||
317 | idr_destroy(&dev->cqidr); | 376 | idr_destroy(&dev->cqidr); |
318 | idr_destroy(&dev->qpidr); | 377 | idr_destroy(&dev->qpidr); |
319 | idr_destroy(&dev->mmidr); | 378 | idr_destroy(&dev->mmidr); |
379 | iounmap(dev->rdev.oc_mw_kva); | ||
320 | ib_dealloc_device(&dev->ibdev); | 380 | ib_dealloc_device(&dev->ibdev); |
321 | } | 381 | } |
322 | 382 | ||
@@ -332,6 +392,17 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) | |||
332 | } | 392 | } |
333 | devp->rdev.lldi = *infop; | 393 | devp->rdev.lldi = *infop; |
334 | 394 | ||
395 | devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) + | ||
396 | (pci_resource_len(devp->rdev.lldi.pdev, 2) - | ||
397 | roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size)); | ||
398 | devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa, | ||
399 | devp->rdev.lldi.vr->ocq.size); | ||
400 | |||
401 | printk(KERN_INFO MOD "ocq memory: " | ||
402 | "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n", | ||
403 | devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size, | ||
404 | devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva); | ||
405 | |||
335 | mutex_lock(&dev_mutex); | 406 | mutex_lock(&dev_mutex); |
336 | 407 | ||
337 | ret = c4iw_rdev_open(&devp->rdev); | 408 | ret = c4iw_rdev_open(&devp->rdev); |
@@ -383,46 +454,6 @@ out: | |||
383 | return dev; | 454 | return dev; |
384 | } | 455 | } |
385 | 456 | ||
386 | static struct sk_buff *t4_pktgl_to_skb(const struct pkt_gl *gl, | ||
387 | unsigned int skb_len, | ||
388 | unsigned int pull_len) | ||
389 | { | ||
390 | struct sk_buff *skb; | ||
391 | struct skb_shared_info *ssi; | ||
392 | |||
393 | if (gl->tot_len <= 512) { | ||
394 | skb = alloc_skb(gl->tot_len, GFP_ATOMIC); | ||
395 | if (unlikely(!skb)) | ||
396 | goto out; | ||
397 | __skb_put(skb, gl->tot_len); | ||
398 | skb_copy_to_linear_data(skb, gl->va, gl->tot_len); | ||
399 | } else { | ||
400 | skb = alloc_skb(skb_len, GFP_ATOMIC); | ||
401 | if (unlikely(!skb)) | ||
402 | goto out; | ||
403 | __skb_put(skb, pull_len); | ||
404 | skb_copy_to_linear_data(skb, gl->va, pull_len); | ||
405 | |||
406 | ssi = skb_shinfo(skb); | ||
407 | ssi->frags[0].page = gl->frags[0].page; | ||
408 | ssi->frags[0].page_offset = gl->frags[0].page_offset + pull_len; | ||
409 | ssi->frags[0].size = gl->frags[0].size - pull_len; | ||
410 | if (gl->nfrags > 1) | ||
411 | memcpy(&ssi->frags[1], &gl->frags[1], | ||
412 | (gl->nfrags - 1) * sizeof(skb_frag_t)); | ||
413 | ssi->nr_frags = gl->nfrags; | ||
414 | |||
415 | skb->len = gl->tot_len; | ||
416 | skb->data_len = skb->len - pull_len; | ||
417 | skb->truesize += skb->data_len; | ||
418 | |||
419 | /* Get a reference for the last page, we don't own it */ | ||
420 | get_page(gl->frags[gl->nfrags - 1].page); | ||
421 | } | ||
422 | out: | ||
423 | return skb; | ||
424 | } | ||
425 | |||
426 | static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp, | 457 | static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp, |
427 | const struct pkt_gl *gl) | 458 | const struct pkt_gl *gl) |
428 | { | 459 | { |
@@ -447,7 +478,7 @@ static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp, | |||
447 | c4iw_ev_handler(dev, qid); | 478 | c4iw_ev_handler(dev, qid); |
448 | return 0; | 479 | return 0; |
449 | } else { | 480 | } else { |
450 | skb = t4_pktgl_to_skb(gl, 128, 128); | 481 | skb = cxgb4_pktgl_to_skb(gl, 128, 128); |
451 | if (unlikely(!skb)) | 482 | if (unlikely(!skb)) |
452 | goto nomem; | 483 | goto nomem; |
453 | } | 484 | } |
diff --git a/drivers/infiniband/hw/cxgb4/ev.c b/drivers/infiniband/hw/cxgb4/ev.c index 491e76a0327f..c13041a0aeba 100644 --- a/drivers/infiniband/hw/cxgb4/ev.c +++ b/drivers/infiniband/hw/cxgb4/ev.c | |||
@@ -60,7 +60,7 @@ static void post_qp_event(struct c4iw_dev *dev, struct c4iw_cq *chp, | |||
60 | if (qhp->attr.state == C4IW_QP_STATE_RTS) { | 60 | if (qhp->attr.state == C4IW_QP_STATE_RTS) { |
61 | attrs.next_state = C4IW_QP_STATE_TERMINATE; | 61 | attrs.next_state = C4IW_QP_STATE_TERMINATE; |
62 | c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE, | 62 | c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE, |
63 | &attrs, 1); | 63 | &attrs, 0); |
64 | } | 64 | } |
65 | 65 | ||
66 | event.event = ib_event; | 66 | event.event = ib_event; |
diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h index ed459b8f800f..16032cdb4337 100644 --- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h +++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h | |||
@@ -46,6 +46,7 @@ | |||
46 | #include <linux/timer.h> | 46 | #include <linux/timer.h> |
47 | #include <linux/io.h> | 47 | #include <linux/io.h> |
48 | #include <linux/kfifo.h> | 48 | #include <linux/kfifo.h> |
49 | #include <linux/mutex.h> | ||
49 | 50 | ||
50 | #include <asm/byteorder.h> | 51 | #include <asm/byteorder.h> |
51 | 52 | ||
@@ -79,21 +80,6 @@ static inline void *cplhdr(struct sk_buff *skb) | |||
79 | return skb->data; | 80 | return skb->data; |
80 | } | 81 | } |
81 | 82 | ||
82 | #define C4IW_WR_TO (10*HZ) | ||
83 | |||
84 | struct c4iw_wr_wait { | ||
85 | wait_queue_head_t wait; | ||
86 | int done; | ||
87 | int ret; | ||
88 | }; | ||
89 | |||
90 | static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp) | ||
91 | { | ||
92 | wr_waitp->ret = 0; | ||
93 | wr_waitp->done = 0; | ||
94 | init_waitqueue_head(&wr_waitp->wait); | ||
95 | } | ||
96 | |||
97 | struct c4iw_resource { | 83 | struct c4iw_resource { |
98 | struct kfifo tpt_fifo; | 84 | struct kfifo tpt_fifo; |
99 | spinlock_t tpt_fifo_lock; | 85 | spinlock_t tpt_fifo_lock; |
@@ -127,8 +113,11 @@ struct c4iw_rdev { | |||
127 | struct c4iw_dev_ucontext uctx; | 113 | struct c4iw_dev_ucontext uctx; |
128 | struct gen_pool *pbl_pool; | 114 | struct gen_pool *pbl_pool; |
129 | struct gen_pool *rqt_pool; | 115 | struct gen_pool *rqt_pool; |
116 | struct gen_pool *ocqp_pool; | ||
130 | u32 flags; | 117 | u32 flags; |
131 | struct cxgb4_lld_info lldi; | 118 | struct cxgb4_lld_info lldi; |
119 | unsigned long oc_mw_pa; | ||
120 | void __iomem *oc_mw_kva; | ||
132 | }; | 121 | }; |
133 | 122 | ||
134 | static inline int c4iw_fatal_error(struct c4iw_rdev *rdev) | 123 | static inline int c4iw_fatal_error(struct c4iw_rdev *rdev) |
@@ -141,6 +130,44 @@ static inline int c4iw_num_stags(struct c4iw_rdev *rdev) | |||
141 | return min((int)T4_MAX_NUM_STAG, (int)(rdev->lldi.vr->stag.size >> 5)); | 130 | return min((int)T4_MAX_NUM_STAG, (int)(rdev->lldi.vr->stag.size >> 5)); |
142 | } | 131 | } |
143 | 132 | ||
133 | #define C4IW_WR_TO (10*HZ) | ||
134 | |||
135 | struct c4iw_wr_wait { | ||
136 | wait_queue_head_t wait; | ||
137 | int done; | ||
138 | int ret; | ||
139 | }; | ||
140 | |||
141 | static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp) | ||
142 | { | ||
143 | wr_waitp->ret = 0; | ||
144 | wr_waitp->done = 0; | ||
145 | init_waitqueue_head(&wr_waitp->wait); | ||
146 | } | ||
147 | |||
148 | static inline int c4iw_wait_for_reply(struct c4iw_rdev *rdev, | ||
149 | struct c4iw_wr_wait *wr_waitp, | ||
150 | u32 hwtid, u32 qpid, | ||
151 | const char *func) | ||
152 | { | ||
153 | unsigned to = C4IW_WR_TO; | ||
154 | do { | ||
155 | |||
156 | wait_event_timeout(wr_waitp->wait, wr_waitp->done, to); | ||
157 | if (!wr_waitp->done) { | ||
158 | printk(KERN_ERR MOD "%s - Device %s not responding - " | ||
159 | "tid %u qpid %u\n", func, | ||
160 | pci_name(rdev->lldi.pdev), hwtid, qpid); | ||
161 | to = to << 2; | ||
162 | } | ||
163 | } while (!wr_waitp->done); | ||
164 | if (wr_waitp->ret) | ||
165 | printk(KERN_WARNING MOD "%s: FW reply %d tid %u qpid %u\n", | ||
166 | pci_name(rdev->lldi.pdev), wr_waitp->ret, hwtid, qpid); | ||
167 | return wr_waitp->ret; | ||
168 | } | ||
169 | |||
170 | |||
144 | struct c4iw_dev { | 171 | struct c4iw_dev { |
145 | struct ib_device ibdev; | 172 | struct ib_device ibdev; |
146 | struct c4iw_rdev rdev; | 173 | struct c4iw_rdev rdev; |
@@ -327,6 +354,7 @@ struct c4iw_qp { | |||
327 | struct c4iw_qp_attributes attr; | 354 | struct c4iw_qp_attributes attr; |
328 | struct t4_wq wq; | 355 | struct t4_wq wq; |
329 | spinlock_t lock; | 356 | spinlock_t lock; |
357 | struct mutex mutex; | ||
330 | atomic_t refcnt; | 358 | atomic_t refcnt; |
331 | wait_queue_head_t wait; | 359 | wait_queue_head_t wait; |
332 | struct timer_list timer; | 360 | struct timer_list timer; |
@@ -579,12 +607,10 @@ struct c4iw_ep_common { | |||
579 | struct c4iw_dev *dev; | 607 | struct c4iw_dev *dev; |
580 | enum c4iw_ep_state state; | 608 | enum c4iw_ep_state state; |
581 | struct kref kref; | 609 | struct kref kref; |
582 | spinlock_t lock; | 610 | struct mutex mutex; |
583 | struct sockaddr_in local_addr; | 611 | struct sockaddr_in local_addr; |
584 | struct sockaddr_in remote_addr; | 612 | struct sockaddr_in remote_addr; |
585 | wait_queue_head_t waitq; | 613 | struct c4iw_wr_wait wr_wait; |
586 | int rpl_done; | ||
587 | int rpl_err; | ||
588 | unsigned long flags; | 614 | unsigned long flags; |
589 | }; | 615 | }; |
590 | 616 | ||
@@ -654,8 +680,10 @@ int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, u32 nr_pdid); | |||
654 | int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev); | 680 | int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev); |
655 | int c4iw_pblpool_create(struct c4iw_rdev *rdev); | 681 | int c4iw_pblpool_create(struct c4iw_rdev *rdev); |
656 | int c4iw_rqtpool_create(struct c4iw_rdev *rdev); | 682 | int c4iw_rqtpool_create(struct c4iw_rdev *rdev); |
683 | int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev); | ||
657 | void c4iw_pblpool_destroy(struct c4iw_rdev *rdev); | 684 | void c4iw_pblpool_destroy(struct c4iw_rdev *rdev); |
658 | void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev); | 685 | void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev); |
686 | void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev); | ||
659 | void c4iw_destroy_resource(struct c4iw_resource *rscp); | 687 | void c4iw_destroy_resource(struct c4iw_resource *rscp); |
660 | int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev); | 688 | int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev); |
661 | int c4iw_register_device(struct c4iw_dev *dev); | 689 | int c4iw_register_device(struct c4iw_dev *dev); |
@@ -721,6 +749,8 @@ u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size); | |||
721 | void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size); | 749 | void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size); |
722 | u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size); | 750 | u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size); |
723 | void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size); | 751 | void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size); |
752 | u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size); | ||
753 | void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size); | ||
724 | int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb); | 754 | int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb); |
725 | void c4iw_flush_hw_cq(struct t4_cq *cq); | 755 | void c4iw_flush_hw_cq(struct t4_cq *cq); |
726 | void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count); | 756 | void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count); |
diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c index 269373a62f22..273ffe49525a 100644 --- a/drivers/infiniband/hw/cxgb4/mem.c +++ b/drivers/infiniband/hw/cxgb4/mem.c | |||
@@ -71,7 +71,7 @@ static int write_adapter_mem(struct c4iw_rdev *rdev, u32 addr, u32 len, | |||
71 | if (i == (num_wqe-1)) { | 71 | if (i == (num_wqe-1)) { |
72 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR) | | 72 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR) | |
73 | FW_WR_COMPL(1)); | 73 | FW_WR_COMPL(1)); |
74 | req->wr.wr_lo = (__force __be64)&wr_wait; | 74 | req->wr.wr_lo = (__force __be64)(unsigned long) &wr_wait; |
75 | } else | 75 | } else |
76 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR)); | 76 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR)); |
77 | req->wr.wr_mid = cpu_to_be32( | 77 | req->wr.wr_mid = cpu_to_be32( |
@@ -103,14 +103,7 @@ static int write_adapter_mem(struct c4iw_rdev *rdev, u32 addr, u32 len, | |||
103 | len -= C4IW_MAX_INLINE_SIZE; | 103 | len -= C4IW_MAX_INLINE_SIZE; |
104 | } | 104 | } |
105 | 105 | ||
106 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 106 | ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, 0, __func__); |
107 | if (!wr_wait.done) { | ||
108 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
109 | pci_name(rdev->lldi.pdev)); | ||
110 | rdev->flags = T4_FATAL_ERROR; | ||
111 | ret = -EIO; | ||
112 | } else | ||
113 | ret = wr_wait.ret; | ||
114 | return ret; | 107 | return ret; |
115 | } | 108 | } |
116 | 109 | ||
diff --git a/drivers/infiniband/hw/cxgb4/provider.c b/drivers/infiniband/hw/cxgb4/provider.c index 8f645c83a125..f66dd8bf5128 100644 --- a/drivers/infiniband/hw/cxgb4/provider.c +++ b/drivers/infiniband/hw/cxgb4/provider.c | |||
@@ -54,9 +54,9 @@ | |||
54 | 54 | ||
55 | #include "iw_cxgb4.h" | 55 | #include "iw_cxgb4.h" |
56 | 56 | ||
57 | static int fastreg_support; | 57 | static int fastreg_support = 1; |
58 | module_param(fastreg_support, int, 0644); | 58 | module_param(fastreg_support, int, 0644); |
59 | MODULE_PARM_DESC(fastreg_support, "Advertise fastreg support (default=0)"); | 59 | MODULE_PARM_DESC(fastreg_support, "Advertise fastreg support (default=1)"); |
60 | 60 | ||
61 | static int c4iw_modify_port(struct ib_device *ibdev, | 61 | static int c4iw_modify_port(struct ib_device *ibdev, |
62 | u8 port, int port_modify_mask, | 62 | u8 port, int port_modify_mask, |
@@ -149,19 +149,28 @@ static int c4iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) | |||
149 | addr = mm->addr; | 149 | addr = mm->addr; |
150 | kfree(mm); | 150 | kfree(mm); |
151 | 151 | ||
152 | if ((addr >= pci_resource_start(rdev->lldi.pdev, 2)) && | 152 | if ((addr >= pci_resource_start(rdev->lldi.pdev, 0)) && |
153 | (addr < (pci_resource_start(rdev->lldi.pdev, 2) + | 153 | (addr < (pci_resource_start(rdev->lldi.pdev, 0) + |
154 | pci_resource_len(rdev->lldi.pdev, 2)))) { | 154 | pci_resource_len(rdev->lldi.pdev, 0)))) { |
155 | 155 | ||
156 | /* | 156 | /* |
157 | * Map T4 DB register. | 157 | * MA_SYNC register... |
158 | */ | 158 | */ |
159 | if (vma->vm_flags & VM_READ) | ||
160 | return -EPERM; | ||
161 | |||
162 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | 159 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
163 | vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND; | 160 | ret = io_remap_pfn_range(vma, vma->vm_start, |
164 | vma->vm_flags &= ~VM_MAYREAD; | 161 | addr >> PAGE_SHIFT, |
162 | len, vma->vm_page_prot); | ||
163 | } else if ((addr >= pci_resource_start(rdev->lldi.pdev, 2)) && | ||
164 | (addr < (pci_resource_start(rdev->lldi.pdev, 2) + | ||
165 | pci_resource_len(rdev->lldi.pdev, 2)))) { | ||
166 | |||
167 | /* | ||
168 | * Map user DB or OCQP memory... | ||
169 | */ | ||
170 | if (addr >= rdev->oc_mw_pa) | ||
171 | vma->vm_page_prot = t4_pgprot_wc(vma->vm_page_prot); | ||
172 | else | ||
173 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | ||
165 | ret = io_remap_pfn_range(vma, vma->vm_start, | 174 | ret = io_remap_pfn_range(vma, vma->vm_start, |
166 | addr >> PAGE_SHIFT, | 175 | addr >> PAGE_SHIFT, |
167 | len, vma->vm_page_prot); | 176 | len, vma->vm_page_prot); |
@@ -382,7 +391,17 @@ static ssize_t show_board(struct device *dev, struct device_attribute *attr, | |||
382 | static int c4iw_get_mib(struct ib_device *ibdev, | 391 | static int c4iw_get_mib(struct ib_device *ibdev, |
383 | union rdma_protocol_stats *stats) | 392 | union rdma_protocol_stats *stats) |
384 | { | 393 | { |
385 | return -ENOSYS; | 394 | struct tp_tcp_stats v4, v6; |
395 | struct c4iw_dev *c4iw_dev = to_c4iw_dev(ibdev); | ||
396 | |||
397 | cxgb4_get_tcp_stats(c4iw_dev->rdev.lldi.pdev, &v4, &v6); | ||
398 | memset(stats, 0, sizeof *stats); | ||
399 | stats->iw.tcpInSegs = v4.tcpInSegs + v6.tcpInSegs; | ||
400 | stats->iw.tcpOutSegs = v4.tcpOutSegs + v6.tcpOutSegs; | ||
401 | stats->iw.tcpRetransSegs = v4.tcpRetransSegs + v6.tcpRetransSegs; | ||
402 | stats->iw.tcpOutRsts = v4.tcpOutRsts + v6.tcpOutSegs; | ||
403 | |||
404 | return 0; | ||
386 | } | 405 | } |
387 | 406 | ||
388 | static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); | 407 | static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); |
@@ -472,6 +491,7 @@ int c4iw_register_device(struct c4iw_dev *dev) | |||
472 | dev->ibdev.post_send = c4iw_post_send; | 491 | dev->ibdev.post_send = c4iw_post_send; |
473 | dev->ibdev.post_recv = c4iw_post_receive; | 492 | dev->ibdev.post_recv = c4iw_post_receive; |
474 | dev->ibdev.get_protocol_stats = c4iw_get_mib; | 493 | dev->ibdev.get_protocol_stats = c4iw_get_mib; |
494 | dev->ibdev.uverbs_abi_ver = C4IW_UVERBS_ABI_VERSION; | ||
475 | 495 | ||
476 | dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); | 496 | dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); |
477 | if (!dev->ibdev.iwcm) | 497 | if (!dev->ibdev.iwcm) |
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 93f6e5bf0ec5..057cb2505ea1 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c | |||
@@ -31,6 +31,63 @@ | |||
31 | */ | 31 | */ |
32 | #include "iw_cxgb4.h" | 32 | #include "iw_cxgb4.h" |
33 | 33 | ||
34 | static int ocqp_support; | ||
35 | module_param(ocqp_support, int, 0644); | ||
36 | MODULE_PARM_DESC(ocqp_support, "Support on-chip SQs (default=0)"); | ||
37 | |||
38 | static void set_state(struct c4iw_qp *qhp, enum c4iw_qp_state state) | ||
39 | { | ||
40 | unsigned long flag; | ||
41 | spin_lock_irqsave(&qhp->lock, flag); | ||
42 | qhp->attr.state = state; | ||
43 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
44 | } | ||
45 | |||
46 | static void dealloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) | ||
47 | { | ||
48 | c4iw_ocqp_pool_free(rdev, sq->dma_addr, sq->memsize); | ||
49 | } | ||
50 | |||
51 | static void dealloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) | ||
52 | { | ||
53 | dma_free_coherent(&(rdev->lldi.pdev->dev), sq->memsize, sq->queue, | ||
54 | pci_unmap_addr(sq, mapping)); | ||
55 | } | ||
56 | |||
57 | static void dealloc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) | ||
58 | { | ||
59 | if (t4_sq_onchip(sq)) | ||
60 | dealloc_oc_sq(rdev, sq); | ||
61 | else | ||
62 | dealloc_host_sq(rdev, sq); | ||
63 | } | ||
64 | |||
65 | static int alloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) | ||
66 | { | ||
67 | if (!ocqp_support || !t4_ocqp_supported()) | ||
68 | return -ENOSYS; | ||
69 | sq->dma_addr = c4iw_ocqp_pool_alloc(rdev, sq->memsize); | ||
70 | if (!sq->dma_addr) | ||
71 | return -ENOMEM; | ||
72 | sq->phys_addr = rdev->oc_mw_pa + sq->dma_addr - | ||
73 | rdev->lldi.vr->ocq.start; | ||
74 | sq->queue = (__force union t4_wr *)(rdev->oc_mw_kva + sq->dma_addr - | ||
75 | rdev->lldi.vr->ocq.start); | ||
76 | sq->flags |= T4_SQ_ONCHIP; | ||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | static int alloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) | ||
81 | { | ||
82 | sq->queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), sq->memsize, | ||
83 | &(sq->dma_addr), GFP_KERNEL); | ||
84 | if (!sq->queue) | ||
85 | return -ENOMEM; | ||
86 | sq->phys_addr = virt_to_phys(sq->queue); | ||
87 | pci_unmap_addr_set(sq, mapping, sq->dma_addr); | ||
88 | return 0; | ||
89 | } | ||
90 | |||
34 | static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | 91 | static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, |
35 | struct c4iw_dev_ucontext *uctx) | 92 | struct c4iw_dev_ucontext *uctx) |
36 | { | 93 | { |
@@ -41,9 +98,7 @@ static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
41 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 98 | dma_free_coherent(&(rdev->lldi.pdev->dev), |
42 | wq->rq.memsize, wq->rq.queue, | 99 | wq->rq.memsize, wq->rq.queue, |
43 | dma_unmap_addr(&wq->rq, mapping)); | 100 | dma_unmap_addr(&wq->rq, mapping)); |
44 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 101 | dealloc_sq(rdev, &wq->sq); |
45 | wq->sq.memsize, wq->sq.queue, | ||
46 | dma_unmap_addr(&wq->sq, mapping)); | ||
47 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); | 102 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); |
48 | kfree(wq->rq.sw_rq); | 103 | kfree(wq->rq.sw_rq); |
49 | kfree(wq->sq.sw_sq); | 104 | kfree(wq->sq.sw_sq); |
@@ -93,11 +148,12 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
93 | if (!wq->rq.rqt_hwaddr) | 148 | if (!wq->rq.rqt_hwaddr) |
94 | goto err4; | 149 | goto err4; |
95 | 150 | ||
96 | wq->sq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), | 151 | if (user) { |
97 | wq->sq.memsize, &(wq->sq.dma_addr), | 152 | if (alloc_oc_sq(rdev, &wq->sq) && alloc_host_sq(rdev, &wq->sq)) |
98 | GFP_KERNEL); | 153 | goto err5; |
99 | if (!wq->sq.queue) | 154 | } else |
100 | goto err5; | 155 | if (alloc_host_sq(rdev, &wq->sq)) |
156 | goto err5; | ||
101 | memset(wq->sq.queue, 0, wq->sq.memsize); | 157 | memset(wq->sq.queue, 0, wq->sq.memsize); |
102 | dma_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr); | 158 | dma_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr); |
103 | 159 | ||
@@ -144,7 +200,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
144 | V_FW_RI_RES_WR_NRES(2) | | 200 | V_FW_RI_RES_WR_NRES(2) | |
145 | FW_WR_COMPL(1)); | 201 | FW_WR_COMPL(1)); |
146 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 202 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
147 | res_wr->cookie = (u64)&wr_wait; | 203 | res_wr->cookie = (unsigned long) &wr_wait; |
148 | res = res_wr->res; | 204 | res = res_wr->res; |
149 | res->u.sqrq.restype = FW_RI_RES_TYPE_SQ; | 205 | res->u.sqrq.restype = FW_RI_RES_TYPE_SQ; |
150 | res->u.sqrq.op = FW_RI_RES_OP_WRITE; | 206 | res->u.sqrq.op = FW_RI_RES_OP_WRITE; |
@@ -158,6 +214,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
158 | V_FW_RI_RES_WR_HOSTFCMODE(0) | /* no host cidx updates */ | 214 | V_FW_RI_RES_WR_HOSTFCMODE(0) | /* no host cidx updates */ |
159 | V_FW_RI_RES_WR_CPRIO(0) | /* don't keep in chip cache */ | 215 | V_FW_RI_RES_WR_CPRIO(0) | /* don't keep in chip cache */ |
160 | V_FW_RI_RES_WR_PCIECHN(0) | /* set by uP at ri_init time */ | 216 | V_FW_RI_RES_WR_PCIECHN(0) | /* set by uP at ri_init time */ |
217 | t4_sq_onchip(&wq->sq) ? F_FW_RI_RES_WR_ONCHIP : 0 | | ||
161 | V_FW_RI_RES_WR_IQID(scq->cqid)); | 218 | V_FW_RI_RES_WR_IQID(scq->cqid)); |
162 | res->u.sqrq.dcaen_to_eqsize = cpu_to_be32( | 219 | res->u.sqrq.dcaen_to_eqsize = cpu_to_be32( |
163 | V_FW_RI_RES_WR_DCAEN(0) | | 220 | V_FW_RI_RES_WR_DCAEN(0) | |
@@ -198,14 +255,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
198 | ret = c4iw_ofld_send(rdev, skb); | 255 | ret = c4iw_ofld_send(rdev, skb); |
199 | if (ret) | 256 | if (ret) |
200 | goto err7; | 257 | goto err7; |
201 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 258 | ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, wq->sq.qid, __func__); |
202 | if (!wr_wait.done) { | ||
203 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
204 | pci_name(rdev->lldi.pdev)); | ||
205 | rdev->flags = T4_FATAL_ERROR; | ||
206 | ret = -EIO; | ||
207 | } else | ||
208 | ret = wr_wait.ret; | ||
209 | if (ret) | 259 | if (ret) |
210 | goto err7; | 260 | goto err7; |
211 | 261 | ||
@@ -219,9 +269,7 @@ err7: | |||
219 | wq->rq.memsize, wq->rq.queue, | 269 | wq->rq.memsize, wq->rq.queue, |
220 | dma_unmap_addr(&wq->rq, mapping)); | 270 | dma_unmap_addr(&wq->rq, mapping)); |
221 | err6: | 271 | err6: |
222 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 272 | dealloc_sq(rdev, &wq->sq); |
223 | wq->sq.memsize, wq->sq.queue, | ||
224 | dma_unmap_addr(&wq->sq, mapping)); | ||
225 | err5: | 273 | err5: |
226 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); | 274 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); |
227 | err4: | 275 | err4: |
@@ -263,6 +311,9 @@ static int build_immd(struct t4_sq *sq, struct fw_ri_immd *immdp, | |||
263 | rem -= len; | 311 | rem -= len; |
264 | } | 312 | } |
265 | } | 313 | } |
314 | len = roundup(plen + sizeof *immdp, 16) - (plen + sizeof *immdp); | ||
315 | if (len) | ||
316 | memset(dstp, 0, len); | ||
266 | immdp->op = FW_RI_DATA_IMMD; | 317 | immdp->op = FW_RI_DATA_IMMD; |
267 | immdp->r1 = 0; | 318 | immdp->r1 = 0; |
268 | immdp->r2 = 0; | 319 | immdp->r2 = 0; |
@@ -292,6 +343,7 @@ static int build_isgl(__be64 *queue_start, __be64 *queue_end, | |||
292 | if (++flitp == queue_end) | 343 | if (++flitp == queue_end) |
293 | flitp = queue_start; | 344 | flitp = queue_start; |
294 | } | 345 | } |
346 | *flitp = (__force __be64)0; | ||
295 | isglp->op = FW_RI_DATA_ISGL; | 347 | isglp->op = FW_RI_DATA_ISGL; |
296 | isglp->r1 = 0; | 348 | isglp->r1 = 0; |
297 | isglp->nsge = cpu_to_be16(num_sge); | 349 | isglp->nsge = cpu_to_be16(num_sge); |
@@ -453,13 +505,15 @@ static int build_rdma_recv(struct c4iw_qp *qhp, union t4_recv_wr *wqe, | |||
453 | return 0; | 505 | return 0; |
454 | } | 506 | } |
455 | 507 | ||
456 | static int build_fastreg(union t4_wr *wqe, struct ib_send_wr *wr, u8 *len16) | 508 | static int build_fastreg(struct t4_sq *sq, union t4_wr *wqe, |
509 | struct ib_send_wr *wr, u8 *len16) | ||
457 | { | 510 | { |
458 | 511 | ||
459 | struct fw_ri_immd *imdp; | 512 | struct fw_ri_immd *imdp; |
460 | __be64 *p; | 513 | __be64 *p; |
461 | int i; | 514 | int i; |
462 | int pbllen = roundup(wr->wr.fast_reg.page_list_len * sizeof(u64), 32); | 515 | int pbllen = roundup(wr->wr.fast_reg.page_list_len * sizeof(u64), 32); |
516 | int rem; | ||
463 | 517 | ||
464 | if (wr->wr.fast_reg.page_list_len > T4_MAX_FR_DEPTH) | 518 | if (wr->wr.fast_reg.page_list_len > T4_MAX_FR_DEPTH) |
465 | return -EINVAL; | 519 | return -EINVAL; |
@@ -474,32 +528,28 @@ static int build_fastreg(union t4_wr *wqe, struct ib_send_wr *wr, u8 *len16) | |||
474 | wqe->fr.va_hi = cpu_to_be32(wr->wr.fast_reg.iova_start >> 32); | 528 | wqe->fr.va_hi = cpu_to_be32(wr->wr.fast_reg.iova_start >> 32); |
475 | wqe->fr.va_lo_fbo = cpu_to_be32(wr->wr.fast_reg.iova_start & | 529 | wqe->fr.va_lo_fbo = cpu_to_be32(wr->wr.fast_reg.iova_start & |
476 | 0xffffffff); | 530 | 0xffffffff); |
477 | if (pbllen > T4_MAX_FR_IMMD) { | 531 | WARN_ON(pbllen > T4_MAX_FR_IMMD); |
478 | struct c4iw_fr_page_list *c4pl = | 532 | imdp = (struct fw_ri_immd *)(&wqe->fr + 1); |
479 | to_c4iw_fr_page_list(wr->wr.fast_reg.page_list); | 533 | imdp->op = FW_RI_DATA_IMMD; |
480 | struct fw_ri_dsgl *sglp; | 534 | imdp->r1 = 0; |
481 | 535 | imdp->r2 = 0; | |
482 | sglp = (struct fw_ri_dsgl *)(&wqe->fr + 1); | 536 | imdp->immdlen = cpu_to_be32(pbllen); |
483 | sglp->op = FW_RI_DATA_DSGL; | 537 | p = (__be64 *)(imdp + 1); |
484 | sglp->r1 = 0; | 538 | rem = pbllen; |
485 | sglp->nsge = cpu_to_be16(1); | 539 | for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) { |
486 | sglp->addr0 = cpu_to_be64(c4pl->dma_addr); | 540 | *p = cpu_to_be64((u64)wr->wr.fast_reg.page_list->page_list[i]); |
487 | sglp->len0 = cpu_to_be32(pbllen); | 541 | rem -= sizeof *p; |
488 | 542 | if (++p == (__be64 *)&sq->queue[sq->size]) | |
489 | *len16 = DIV_ROUND_UP(sizeof wqe->fr + sizeof *sglp, 16); | 543 | p = (__be64 *)sq->queue; |
490 | } else { | ||
491 | imdp = (struct fw_ri_immd *)(&wqe->fr + 1); | ||
492 | imdp->op = FW_RI_DATA_IMMD; | ||
493 | imdp->r1 = 0; | ||
494 | imdp->r2 = 0; | ||
495 | imdp->immdlen = cpu_to_be32(pbllen); | ||
496 | p = (__be64 *)(imdp + 1); | ||
497 | for (i = 0; i < wr->wr.fast_reg.page_list_len; i++, p++) | ||
498 | *p = cpu_to_be64( | ||
499 | (u64)wr->wr.fast_reg.page_list->page_list[i]); | ||
500 | *len16 = DIV_ROUND_UP(sizeof wqe->fr + sizeof *imdp + pbllen, | ||
501 | 16); | ||
502 | } | 544 | } |
545 | BUG_ON(rem < 0); | ||
546 | while (rem) { | ||
547 | *p = 0; | ||
548 | rem -= sizeof *p; | ||
549 | if (++p == (__be64 *)&sq->queue[sq->size]) | ||
550 | p = (__be64 *)sq->queue; | ||
551 | } | ||
552 | *len16 = DIV_ROUND_UP(sizeof wqe->fr + sizeof *imdp + pbllen, 16); | ||
503 | return 0; | 553 | return 0; |
504 | } | 554 | } |
505 | 555 | ||
@@ -587,7 +637,7 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
587 | fw_opcode = FW_RI_RDMA_READ_WR; | 637 | fw_opcode = FW_RI_RDMA_READ_WR; |
588 | swsqe->opcode = FW_RI_READ_REQ; | 638 | swsqe->opcode = FW_RI_READ_REQ; |
589 | if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) | 639 | if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) |
590 | fw_flags |= FW_RI_RDMA_READ_INVALIDATE; | 640 | fw_flags = FW_RI_RDMA_READ_INVALIDATE; |
591 | else | 641 | else |
592 | fw_flags = 0; | 642 | fw_flags = 0; |
593 | err = build_rdma_read(wqe, wr, &len16); | 643 | err = build_rdma_read(wqe, wr, &len16); |
@@ -600,7 +650,7 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
600 | case IB_WR_FAST_REG_MR: | 650 | case IB_WR_FAST_REG_MR: |
601 | fw_opcode = FW_RI_FR_NSMR_WR; | 651 | fw_opcode = FW_RI_FR_NSMR_WR; |
602 | swsqe->opcode = FW_RI_FAST_REGISTER; | 652 | swsqe->opcode = FW_RI_FAST_REGISTER; |
603 | err = build_fastreg(wqe, wr, &len16); | 653 | err = build_fastreg(&qhp->wq.sq, wqe, wr, &len16); |
604 | break; | 654 | break; |
605 | case IB_WR_LOCAL_INV: | 655 | case IB_WR_LOCAL_INV: |
606 | if (wr->send_flags & IB_SEND_FENCE) | 656 | if (wr->send_flags & IB_SEND_FENCE) |
@@ -905,46 +955,38 @@ static void post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe, | |||
905 | * Assumes qhp lock is held. | 955 | * Assumes qhp lock is held. |
906 | */ | 956 | */ |
907 | static void __flush_qp(struct c4iw_qp *qhp, struct c4iw_cq *rchp, | 957 | static void __flush_qp(struct c4iw_qp *qhp, struct c4iw_cq *rchp, |
908 | struct c4iw_cq *schp, unsigned long *flag) | 958 | struct c4iw_cq *schp) |
909 | { | 959 | { |
910 | int count; | 960 | int count; |
911 | int flushed; | 961 | int flushed; |
962 | unsigned long flag; | ||
912 | 963 | ||
913 | PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); | 964 | PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); |
914 | /* take a ref on the qhp since we must release the lock */ | ||
915 | atomic_inc(&qhp->refcnt); | ||
916 | spin_unlock_irqrestore(&qhp->lock, *flag); | ||
917 | 965 | ||
918 | /* locking hierarchy: cq lock first, then qp lock. */ | 966 | /* locking hierarchy: cq lock first, then qp lock. */ |
919 | spin_lock_irqsave(&rchp->lock, *flag); | 967 | spin_lock_irqsave(&rchp->lock, flag); |
920 | spin_lock(&qhp->lock); | 968 | spin_lock(&qhp->lock); |
921 | c4iw_flush_hw_cq(&rchp->cq); | 969 | c4iw_flush_hw_cq(&rchp->cq); |
922 | c4iw_count_rcqes(&rchp->cq, &qhp->wq, &count); | 970 | c4iw_count_rcqes(&rchp->cq, &qhp->wq, &count); |
923 | flushed = c4iw_flush_rq(&qhp->wq, &rchp->cq, count); | 971 | flushed = c4iw_flush_rq(&qhp->wq, &rchp->cq, count); |
924 | spin_unlock(&qhp->lock); | 972 | spin_unlock(&qhp->lock); |
925 | spin_unlock_irqrestore(&rchp->lock, *flag); | 973 | spin_unlock_irqrestore(&rchp->lock, flag); |
926 | if (flushed) | 974 | if (flushed) |
927 | (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); | 975 | (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); |
928 | 976 | ||
929 | /* locking hierarchy: cq lock first, then qp lock. */ | 977 | /* locking hierarchy: cq lock first, then qp lock. */ |
930 | spin_lock_irqsave(&schp->lock, *flag); | 978 | spin_lock_irqsave(&schp->lock, flag); |
931 | spin_lock(&qhp->lock); | 979 | spin_lock(&qhp->lock); |
932 | c4iw_flush_hw_cq(&schp->cq); | 980 | c4iw_flush_hw_cq(&schp->cq); |
933 | c4iw_count_scqes(&schp->cq, &qhp->wq, &count); | 981 | c4iw_count_scqes(&schp->cq, &qhp->wq, &count); |
934 | flushed = c4iw_flush_sq(&qhp->wq, &schp->cq, count); | 982 | flushed = c4iw_flush_sq(&qhp->wq, &schp->cq, count); |
935 | spin_unlock(&qhp->lock); | 983 | spin_unlock(&qhp->lock); |
936 | spin_unlock_irqrestore(&schp->lock, *flag); | 984 | spin_unlock_irqrestore(&schp->lock, flag); |
937 | if (flushed) | 985 | if (flushed) |
938 | (*schp->ibcq.comp_handler)(&schp->ibcq, schp->ibcq.cq_context); | 986 | (*schp->ibcq.comp_handler)(&schp->ibcq, schp->ibcq.cq_context); |
939 | |||
940 | /* deref */ | ||
941 | if (atomic_dec_and_test(&qhp->refcnt)) | ||
942 | wake_up(&qhp->wait); | ||
943 | |||
944 | spin_lock_irqsave(&qhp->lock, *flag); | ||
945 | } | 987 | } |
946 | 988 | ||
947 | static void flush_qp(struct c4iw_qp *qhp, unsigned long *flag) | 989 | static void flush_qp(struct c4iw_qp *qhp) |
948 | { | 990 | { |
949 | struct c4iw_cq *rchp, *schp; | 991 | struct c4iw_cq *rchp, *schp; |
950 | 992 | ||
@@ -958,7 +1000,7 @@ static void flush_qp(struct c4iw_qp *qhp, unsigned long *flag) | |||
958 | t4_set_cq_in_error(&schp->cq); | 1000 | t4_set_cq_in_error(&schp->cq); |
959 | return; | 1001 | return; |
960 | } | 1002 | } |
961 | __flush_qp(qhp, rchp, schp, flag); | 1003 | __flush_qp(qhp, rchp, schp); |
962 | } | 1004 | } |
963 | 1005 | ||
964 | static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | 1006 | static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, |
@@ -966,7 +1008,6 @@ static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
966 | { | 1008 | { |
967 | struct fw_ri_wr *wqe; | 1009 | struct fw_ri_wr *wqe; |
968 | int ret; | 1010 | int ret; |
969 | struct c4iw_wr_wait wr_wait; | ||
970 | struct sk_buff *skb; | 1011 | struct sk_buff *skb; |
971 | 1012 | ||
972 | PDBG("%s qhp %p qid 0x%x tid %u\n", __func__, qhp, qhp->wq.sq.qid, | 1013 | PDBG("%s qhp %p qid 0x%x tid %u\n", __func__, qhp, qhp->wq.sq.qid, |
@@ -985,28 +1026,16 @@ static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
985 | wqe->flowid_len16 = cpu_to_be32( | 1026 | wqe->flowid_len16 = cpu_to_be32( |
986 | FW_WR_FLOWID(ep->hwtid) | | 1027 | FW_WR_FLOWID(ep->hwtid) | |
987 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); | 1028 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); |
988 | wqe->cookie = (u64)&wr_wait; | 1029 | wqe->cookie = (unsigned long) &ep->com.wr_wait; |
989 | 1030 | ||
990 | wqe->u.fini.type = FW_RI_TYPE_FINI; | 1031 | wqe->u.fini.type = FW_RI_TYPE_FINI; |
991 | c4iw_init_wr_wait(&wr_wait); | 1032 | c4iw_init_wr_wait(&ep->com.wr_wait); |
992 | ret = c4iw_ofld_send(&rhp->rdev, skb); | 1033 | ret = c4iw_ofld_send(&rhp->rdev, skb); |
993 | if (ret) | 1034 | if (ret) |
994 | goto out; | 1035 | goto out; |
995 | 1036 | ||
996 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 1037 | ret = c4iw_wait_for_reply(&rhp->rdev, &ep->com.wr_wait, qhp->ep->hwtid, |
997 | if (!wr_wait.done) { | 1038 | qhp->wq.sq.qid, __func__); |
998 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
999 | pci_name(rhp->rdev.lldi.pdev)); | ||
1000 | rhp->rdev.flags = T4_FATAL_ERROR; | ||
1001 | ret = -EIO; | ||
1002 | } else { | ||
1003 | ret = wr_wait.ret; | ||
1004 | if (ret) | ||
1005 | printk(KERN_WARNING MOD | ||
1006 | "%s: Abnormal close qpid %d ret %u\n", | ||
1007 | pci_name(rhp->rdev.lldi.pdev), qhp->wq.sq.qid, | ||
1008 | ret); | ||
1009 | } | ||
1010 | out: | 1039 | out: |
1011 | PDBG("%s ret %d\n", __func__, ret); | 1040 | PDBG("%s ret %d\n", __func__, ret); |
1012 | return ret; | 1041 | return ret; |
@@ -1040,7 +1069,6 @@ static int rdma_init(struct c4iw_dev *rhp, struct c4iw_qp *qhp) | |||
1040 | { | 1069 | { |
1041 | struct fw_ri_wr *wqe; | 1070 | struct fw_ri_wr *wqe; |
1042 | int ret; | 1071 | int ret; |
1043 | struct c4iw_wr_wait wr_wait; | ||
1044 | struct sk_buff *skb; | 1072 | struct sk_buff *skb; |
1045 | 1073 | ||
1046 | PDBG("%s qhp %p qid 0x%x tid %u\n", __func__, qhp, qhp->wq.sq.qid, | 1074 | PDBG("%s qhp %p qid 0x%x tid %u\n", __func__, qhp, qhp->wq.sq.qid, |
@@ -1060,7 +1088,7 @@ static int rdma_init(struct c4iw_dev *rhp, struct c4iw_qp *qhp) | |||
1060 | FW_WR_FLOWID(qhp->ep->hwtid) | | 1088 | FW_WR_FLOWID(qhp->ep->hwtid) | |
1061 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); | 1089 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); |
1062 | 1090 | ||
1063 | wqe->cookie = (u64)&wr_wait; | 1091 | wqe->cookie = (unsigned long) &qhp->ep->com.wr_wait; |
1064 | 1092 | ||
1065 | wqe->u.init.type = FW_RI_TYPE_INIT; | 1093 | wqe->u.init.type = FW_RI_TYPE_INIT; |
1066 | wqe->u.init.mpareqbit_p2ptype = | 1094 | wqe->u.init.mpareqbit_p2ptype = |
@@ -1097,19 +1125,13 @@ static int rdma_init(struct c4iw_dev *rhp, struct c4iw_qp *qhp) | |||
1097 | if (qhp->attr.mpa_attr.initiator) | 1125 | if (qhp->attr.mpa_attr.initiator) |
1098 | build_rtr_msg(qhp->attr.mpa_attr.p2p_type, &wqe->u.init); | 1126 | build_rtr_msg(qhp->attr.mpa_attr.p2p_type, &wqe->u.init); |
1099 | 1127 | ||
1100 | c4iw_init_wr_wait(&wr_wait); | 1128 | c4iw_init_wr_wait(&qhp->ep->com.wr_wait); |
1101 | ret = c4iw_ofld_send(&rhp->rdev, skb); | 1129 | ret = c4iw_ofld_send(&rhp->rdev, skb); |
1102 | if (ret) | 1130 | if (ret) |
1103 | goto out; | 1131 | goto out; |
1104 | 1132 | ||
1105 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 1133 | ret = c4iw_wait_for_reply(&rhp->rdev, &qhp->ep->com.wr_wait, |
1106 | if (!wr_wait.done) { | 1134 | qhp->ep->hwtid, qhp->wq.sq.qid, __func__); |
1107 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
1108 | pci_name(rhp->rdev.lldi.pdev)); | ||
1109 | rhp->rdev.flags = T4_FATAL_ERROR; | ||
1110 | ret = -EIO; | ||
1111 | } else | ||
1112 | ret = wr_wait.ret; | ||
1113 | out: | 1135 | out: |
1114 | PDBG("%s ret %d\n", __func__, ret); | 1136 | PDBG("%s ret %d\n", __func__, ret); |
1115 | return ret; | 1137 | return ret; |
@@ -1122,7 +1144,6 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1122 | { | 1144 | { |
1123 | int ret = 0; | 1145 | int ret = 0; |
1124 | struct c4iw_qp_attributes newattr = qhp->attr; | 1146 | struct c4iw_qp_attributes newattr = qhp->attr; |
1125 | unsigned long flag; | ||
1126 | int disconnect = 0; | 1147 | int disconnect = 0; |
1127 | int terminate = 0; | 1148 | int terminate = 0; |
1128 | int abort = 0; | 1149 | int abort = 0; |
@@ -1133,7 +1154,7 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1133 | qhp, qhp->wq.sq.qid, qhp->wq.rq.qid, qhp->ep, qhp->attr.state, | 1154 | qhp, qhp->wq.sq.qid, qhp->wq.rq.qid, qhp->ep, qhp->attr.state, |
1134 | (mask & C4IW_QP_ATTR_NEXT_STATE) ? attrs->next_state : -1); | 1155 | (mask & C4IW_QP_ATTR_NEXT_STATE) ? attrs->next_state : -1); |
1135 | 1156 | ||
1136 | spin_lock_irqsave(&qhp->lock, flag); | 1157 | mutex_lock(&qhp->mutex); |
1137 | 1158 | ||
1138 | /* Process attr changes if in IDLE */ | 1159 | /* Process attr changes if in IDLE */ |
1139 | if (mask & C4IW_QP_ATTR_VALID_MODIFY) { | 1160 | if (mask & C4IW_QP_ATTR_VALID_MODIFY) { |
@@ -1184,7 +1205,7 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1184 | qhp->attr.mpa_attr = attrs->mpa_attr; | 1205 | qhp->attr.mpa_attr = attrs->mpa_attr; |
1185 | qhp->attr.llp_stream_handle = attrs->llp_stream_handle; | 1206 | qhp->attr.llp_stream_handle = attrs->llp_stream_handle; |
1186 | qhp->ep = qhp->attr.llp_stream_handle; | 1207 | qhp->ep = qhp->attr.llp_stream_handle; |
1187 | qhp->attr.state = C4IW_QP_STATE_RTS; | 1208 | set_state(qhp, C4IW_QP_STATE_RTS); |
1188 | 1209 | ||
1189 | /* | 1210 | /* |
1190 | * Ref the endpoint here and deref when we | 1211 | * Ref the endpoint here and deref when we |
@@ -1193,15 +1214,13 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1193 | * transition. | 1214 | * transition. |
1194 | */ | 1215 | */ |
1195 | c4iw_get_ep(&qhp->ep->com); | 1216 | c4iw_get_ep(&qhp->ep->com); |
1196 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
1197 | ret = rdma_init(rhp, qhp); | 1217 | ret = rdma_init(rhp, qhp); |
1198 | spin_lock_irqsave(&qhp->lock, flag); | ||
1199 | if (ret) | 1218 | if (ret) |
1200 | goto err; | 1219 | goto err; |
1201 | break; | 1220 | break; |
1202 | case C4IW_QP_STATE_ERROR: | 1221 | case C4IW_QP_STATE_ERROR: |
1203 | qhp->attr.state = C4IW_QP_STATE_ERROR; | 1222 | set_state(qhp, C4IW_QP_STATE_ERROR); |
1204 | flush_qp(qhp, &flag); | 1223 | flush_qp(qhp); |
1205 | break; | 1224 | break; |
1206 | default: | 1225 | default: |
1207 | ret = -EINVAL; | 1226 | ret = -EINVAL; |
@@ -1212,38 +1231,38 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1212 | switch (attrs->next_state) { | 1231 | switch (attrs->next_state) { |
1213 | case C4IW_QP_STATE_CLOSING: | 1232 | case C4IW_QP_STATE_CLOSING: |
1214 | BUG_ON(atomic_read(&qhp->ep->com.kref.refcount) < 2); | 1233 | BUG_ON(atomic_read(&qhp->ep->com.kref.refcount) < 2); |
1215 | qhp->attr.state = C4IW_QP_STATE_CLOSING; | 1234 | set_state(qhp, C4IW_QP_STATE_CLOSING); |
1216 | ep = qhp->ep; | 1235 | ep = qhp->ep; |
1217 | if (!internal) { | 1236 | if (!internal) { |
1218 | abort = 0; | 1237 | abort = 0; |
1219 | disconnect = 1; | 1238 | disconnect = 1; |
1220 | c4iw_get_ep(&ep->com); | 1239 | c4iw_get_ep(&qhp->ep->com); |
1221 | } | 1240 | } |
1222 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
1223 | ret = rdma_fini(rhp, qhp, ep); | 1241 | ret = rdma_fini(rhp, qhp, ep); |
1224 | spin_lock_irqsave(&qhp->lock, flag); | ||
1225 | if (ret) { | 1242 | if (ret) { |
1226 | c4iw_get_ep(&ep->com); | 1243 | if (internal) |
1244 | c4iw_get_ep(&qhp->ep->com); | ||
1227 | disconnect = abort = 1; | 1245 | disconnect = abort = 1; |
1228 | goto err; | 1246 | goto err; |
1229 | } | 1247 | } |
1230 | break; | 1248 | break; |
1231 | case C4IW_QP_STATE_TERMINATE: | 1249 | case C4IW_QP_STATE_TERMINATE: |
1232 | qhp->attr.state = C4IW_QP_STATE_TERMINATE; | 1250 | set_state(qhp, C4IW_QP_STATE_TERMINATE); |
1233 | if (qhp->ibqp.uobject) | 1251 | if (qhp->ibqp.uobject) |
1234 | t4_set_wq_in_error(&qhp->wq); | 1252 | t4_set_wq_in_error(&qhp->wq); |
1235 | ep = qhp->ep; | 1253 | ep = qhp->ep; |
1236 | c4iw_get_ep(&ep->com); | 1254 | if (!internal) |
1237 | terminate = 1; | 1255 | terminate = 1; |
1238 | disconnect = 1; | 1256 | disconnect = 1; |
1257 | c4iw_get_ep(&qhp->ep->com); | ||
1239 | break; | 1258 | break; |
1240 | case C4IW_QP_STATE_ERROR: | 1259 | case C4IW_QP_STATE_ERROR: |
1241 | qhp->attr.state = C4IW_QP_STATE_ERROR; | 1260 | set_state(qhp, C4IW_QP_STATE_ERROR); |
1242 | if (!internal) { | 1261 | if (!internal) { |
1243 | abort = 1; | 1262 | abort = 1; |
1244 | disconnect = 1; | 1263 | disconnect = 1; |
1245 | ep = qhp->ep; | 1264 | ep = qhp->ep; |
1246 | c4iw_get_ep(&ep->com); | 1265 | c4iw_get_ep(&qhp->ep->com); |
1247 | } | 1266 | } |
1248 | goto err; | 1267 | goto err; |
1249 | break; | 1268 | break; |
@@ -1259,8 +1278,8 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1259 | } | 1278 | } |
1260 | switch (attrs->next_state) { | 1279 | switch (attrs->next_state) { |
1261 | case C4IW_QP_STATE_IDLE: | 1280 | case C4IW_QP_STATE_IDLE: |
1262 | flush_qp(qhp, &flag); | 1281 | flush_qp(qhp); |
1263 | qhp->attr.state = C4IW_QP_STATE_IDLE; | 1282 | set_state(qhp, C4IW_QP_STATE_IDLE); |
1264 | qhp->attr.llp_stream_handle = NULL; | 1283 | qhp->attr.llp_stream_handle = NULL; |
1265 | c4iw_put_ep(&qhp->ep->com); | 1284 | c4iw_put_ep(&qhp->ep->com); |
1266 | qhp->ep = NULL; | 1285 | qhp->ep = NULL; |
@@ -1282,7 +1301,7 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1282 | ret = -EINVAL; | 1301 | ret = -EINVAL; |
1283 | goto out; | 1302 | goto out; |
1284 | } | 1303 | } |
1285 | qhp->attr.state = C4IW_QP_STATE_IDLE; | 1304 | set_state(qhp, C4IW_QP_STATE_IDLE); |
1286 | break; | 1305 | break; |
1287 | case C4IW_QP_STATE_TERMINATE: | 1306 | case C4IW_QP_STATE_TERMINATE: |
1288 | if (!internal) { | 1307 | if (!internal) { |
@@ -1305,15 +1324,16 @@ err: | |||
1305 | 1324 | ||
1306 | /* disassociate the LLP connection */ | 1325 | /* disassociate the LLP connection */ |
1307 | qhp->attr.llp_stream_handle = NULL; | 1326 | qhp->attr.llp_stream_handle = NULL; |
1308 | ep = qhp->ep; | 1327 | if (!ep) |
1328 | ep = qhp->ep; | ||
1309 | qhp->ep = NULL; | 1329 | qhp->ep = NULL; |
1310 | qhp->attr.state = C4IW_QP_STATE_ERROR; | 1330 | set_state(qhp, C4IW_QP_STATE_ERROR); |
1311 | free = 1; | 1331 | free = 1; |
1312 | wake_up(&qhp->wait); | 1332 | wake_up(&qhp->wait); |
1313 | BUG_ON(!ep); | 1333 | BUG_ON(!ep); |
1314 | flush_qp(qhp, &flag); | 1334 | flush_qp(qhp); |
1315 | out: | 1335 | out: |
1316 | spin_unlock_irqrestore(&qhp->lock, flag); | 1336 | mutex_unlock(&qhp->mutex); |
1317 | 1337 | ||
1318 | if (terminate) | 1338 | if (terminate) |
1319 | post_terminate(qhp, NULL, internal ? GFP_ATOMIC : GFP_KERNEL); | 1339 | post_terminate(qhp, NULL, internal ? GFP_ATOMIC : GFP_KERNEL); |
@@ -1335,7 +1355,6 @@ out: | |||
1335 | */ | 1355 | */ |
1336 | if (free) | 1356 | if (free) |
1337 | c4iw_put_ep(&ep->com); | 1357 | c4iw_put_ep(&ep->com); |
1338 | |||
1339 | PDBG("%s exit state %d\n", __func__, qhp->attr.state); | 1358 | PDBG("%s exit state %d\n", __func__, qhp->attr.state); |
1340 | return ret; | 1359 | return ret; |
1341 | } | 1360 | } |
@@ -1380,7 +1399,7 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1380 | int sqsize, rqsize; | 1399 | int sqsize, rqsize; |
1381 | struct c4iw_ucontext *ucontext; | 1400 | struct c4iw_ucontext *ucontext; |
1382 | int ret; | 1401 | int ret; |
1383 | struct c4iw_mm_entry *mm1, *mm2, *mm3, *mm4; | 1402 | struct c4iw_mm_entry *mm1, *mm2, *mm3, *mm4, *mm5 = NULL; |
1384 | 1403 | ||
1385 | PDBG("%s ib_pd %p\n", __func__, pd); | 1404 | PDBG("%s ib_pd %p\n", __func__, pd); |
1386 | 1405 | ||
@@ -1450,6 +1469,7 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1450 | qhp->attr.max_ord = 1; | 1469 | qhp->attr.max_ord = 1; |
1451 | qhp->attr.max_ird = 1; | 1470 | qhp->attr.max_ird = 1; |
1452 | spin_lock_init(&qhp->lock); | 1471 | spin_lock_init(&qhp->lock); |
1472 | mutex_init(&qhp->mutex); | ||
1453 | init_waitqueue_head(&qhp->wait); | 1473 | init_waitqueue_head(&qhp->wait); |
1454 | atomic_set(&qhp->refcnt, 1); | 1474 | atomic_set(&qhp->refcnt, 1); |
1455 | 1475 | ||
@@ -1478,7 +1498,15 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1478 | ret = -ENOMEM; | 1498 | ret = -ENOMEM; |
1479 | goto err6; | 1499 | goto err6; |
1480 | } | 1500 | } |
1481 | 1501 | if (t4_sq_onchip(&qhp->wq.sq)) { | |
1502 | mm5 = kmalloc(sizeof *mm5, GFP_KERNEL); | ||
1503 | if (!mm5) { | ||
1504 | ret = -ENOMEM; | ||
1505 | goto err7; | ||
1506 | } | ||
1507 | uresp.flags = C4IW_QPF_ONCHIP; | ||
1508 | } else | ||
1509 | uresp.flags = 0; | ||
1482 | uresp.qid_mask = rhp->rdev.qpmask; | 1510 | uresp.qid_mask = rhp->rdev.qpmask; |
1483 | uresp.sqid = qhp->wq.sq.qid; | 1511 | uresp.sqid = qhp->wq.sq.qid; |
1484 | uresp.sq_size = qhp->wq.sq.size; | 1512 | uresp.sq_size = qhp->wq.sq.size; |
@@ -1487,6 +1515,10 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1487 | uresp.rq_size = qhp->wq.rq.size; | 1515 | uresp.rq_size = qhp->wq.rq.size; |
1488 | uresp.rq_memsize = qhp->wq.rq.memsize; | 1516 | uresp.rq_memsize = qhp->wq.rq.memsize; |
1489 | spin_lock(&ucontext->mmap_lock); | 1517 | spin_lock(&ucontext->mmap_lock); |
1518 | if (mm5) { | ||
1519 | uresp.ma_sync_key = ucontext->key; | ||
1520 | ucontext->key += PAGE_SIZE; | ||
1521 | } | ||
1490 | uresp.sq_key = ucontext->key; | 1522 | uresp.sq_key = ucontext->key; |
1491 | ucontext->key += PAGE_SIZE; | 1523 | ucontext->key += PAGE_SIZE; |
1492 | uresp.rq_key = ucontext->key; | 1524 | uresp.rq_key = ucontext->key; |
@@ -1498,9 +1530,9 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1498 | spin_unlock(&ucontext->mmap_lock); | 1530 | spin_unlock(&ucontext->mmap_lock); |
1499 | ret = ib_copy_to_udata(udata, &uresp, sizeof uresp); | 1531 | ret = ib_copy_to_udata(udata, &uresp, sizeof uresp); |
1500 | if (ret) | 1532 | if (ret) |
1501 | goto err7; | 1533 | goto err8; |
1502 | mm1->key = uresp.sq_key; | 1534 | mm1->key = uresp.sq_key; |
1503 | mm1->addr = virt_to_phys(qhp->wq.sq.queue); | 1535 | mm1->addr = qhp->wq.sq.phys_addr; |
1504 | mm1->len = PAGE_ALIGN(qhp->wq.sq.memsize); | 1536 | mm1->len = PAGE_ALIGN(qhp->wq.sq.memsize); |
1505 | insert_mmap(ucontext, mm1); | 1537 | insert_mmap(ucontext, mm1); |
1506 | mm2->key = uresp.rq_key; | 1538 | mm2->key = uresp.rq_key; |
@@ -1515,6 +1547,13 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1515 | mm4->addr = qhp->wq.rq.udb; | 1547 | mm4->addr = qhp->wq.rq.udb; |
1516 | mm4->len = PAGE_SIZE; | 1548 | mm4->len = PAGE_SIZE; |
1517 | insert_mmap(ucontext, mm4); | 1549 | insert_mmap(ucontext, mm4); |
1550 | if (mm5) { | ||
1551 | mm5->key = uresp.ma_sync_key; | ||
1552 | mm5->addr = (pci_resource_start(rhp->rdev.lldi.pdev, 0) | ||
1553 | + A_PCIE_MA_SYNC) & PAGE_MASK; | ||
1554 | mm5->len = PAGE_SIZE; | ||
1555 | insert_mmap(ucontext, mm5); | ||
1556 | } | ||
1518 | } | 1557 | } |
1519 | qhp->ibqp.qp_num = qhp->wq.sq.qid; | 1558 | qhp->ibqp.qp_num = qhp->wq.sq.qid; |
1520 | init_timer(&(qhp->timer)); | 1559 | init_timer(&(qhp->timer)); |
@@ -1522,6 +1561,8 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1522 | __func__, qhp, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, | 1561 | __func__, qhp, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, |
1523 | qhp->wq.sq.qid); | 1562 | qhp->wq.sq.qid); |
1524 | return &qhp->ibqp; | 1563 | return &qhp->ibqp; |
1564 | err8: | ||
1565 | kfree(mm5); | ||
1525 | err7: | 1566 | err7: |
1526 | kfree(mm4); | 1567 | kfree(mm4); |
1527 | err6: | 1568 | err6: |
diff --git a/drivers/infiniband/hw/cxgb4/resource.c b/drivers/infiniband/hw/cxgb4/resource.c index 83b23dfa250d..4fb50d58b493 100644 --- a/drivers/infiniband/hw/cxgb4/resource.c +++ b/drivers/infiniband/hw/cxgb4/resource.c | |||
@@ -311,6 +311,9 @@ u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size) | |||
311 | { | 311 | { |
312 | unsigned long addr = gen_pool_alloc(rdev->pbl_pool, size); | 312 | unsigned long addr = gen_pool_alloc(rdev->pbl_pool, size); |
313 | PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size); | 313 | PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size); |
314 | if (!addr && printk_ratelimit()) | ||
315 | printk(KERN_WARNING MOD "%s: Out of PBL memory\n", | ||
316 | pci_name(rdev->lldi.pdev)); | ||
314 | return (u32)addr; | 317 | return (u32)addr; |
315 | } | 318 | } |
316 | 319 | ||
@@ -370,6 +373,9 @@ u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size) | |||
370 | { | 373 | { |
371 | unsigned long addr = gen_pool_alloc(rdev->rqt_pool, size << 6); | 374 | unsigned long addr = gen_pool_alloc(rdev->rqt_pool, size << 6); |
372 | PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size << 6); | 375 | PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size << 6); |
376 | if (!addr && printk_ratelimit()) | ||
377 | printk(KERN_WARNING MOD "%s: Out of RQT memory\n", | ||
378 | pci_name(rdev->lldi.pdev)); | ||
373 | return (u32)addr; | 379 | return (u32)addr; |
374 | } | 380 | } |
375 | 381 | ||
@@ -416,3 +422,59 @@ void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev) | |||
416 | { | 422 | { |
417 | gen_pool_destroy(rdev->rqt_pool); | 423 | gen_pool_destroy(rdev->rqt_pool); |
418 | } | 424 | } |
425 | |||
426 | /* | ||
427 | * On-Chip QP Memory. | ||
428 | */ | ||
429 | #define MIN_OCQP_SHIFT 12 /* 4KB == min ocqp size */ | ||
430 | |||
431 | u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size) | ||
432 | { | ||
433 | unsigned long addr = gen_pool_alloc(rdev->ocqp_pool, size); | ||
434 | PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size); | ||
435 | return (u32)addr; | ||
436 | } | ||
437 | |||
438 | void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size) | ||
439 | { | ||
440 | PDBG("%s addr 0x%x size %d\n", __func__, addr, size); | ||
441 | gen_pool_free(rdev->ocqp_pool, (unsigned long)addr, size); | ||
442 | } | ||
443 | |||
444 | int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev) | ||
445 | { | ||
446 | unsigned start, chunk, top; | ||
447 | |||
448 | rdev->ocqp_pool = gen_pool_create(MIN_OCQP_SHIFT, -1); | ||
449 | if (!rdev->ocqp_pool) | ||
450 | return -ENOMEM; | ||
451 | |||
452 | start = rdev->lldi.vr->ocq.start; | ||
453 | chunk = rdev->lldi.vr->ocq.size; | ||
454 | top = start + chunk; | ||
455 | |||
456 | while (start < top) { | ||
457 | chunk = min(top - start + 1, chunk); | ||
458 | if (gen_pool_add(rdev->ocqp_pool, start, chunk, -1)) { | ||
459 | PDBG("%s failed to add OCQP chunk (%x/%x)\n", | ||
460 | __func__, start, chunk); | ||
461 | if (chunk <= 1024 << MIN_OCQP_SHIFT) { | ||
462 | printk(KERN_WARNING MOD | ||
463 | "Failed to add all OCQP chunks (%x/%x)\n", | ||
464 | start, top - start); | ||
465 | return 0; | ||
466 | } | ||
467 | chunk >>= 1; | ||
468 | } else { | ||
469 | PDBG("%s added OCQP chunk (%x/%x)\n", | ||
470 | __func__, start, chunk); | ||
471 | start += chunk; | ||
472 | } | ||
473 | } | ||
474 | return 0; | ||
475 | } | ||
476 | |||
477 | void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev) | ||
478 | { | ||
479 | gen_pool_destroy(rdev->ocqp_pool); | ||
480 | } | ||
diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h index 24f369046ef3..70004425d695 100644 --- a/drivers/infiniband/hw/cxgb4/t4.h +++ b/drivers/infiniband/hw/cxgb4/t4.h | |||
@@ -52,6 +52,7 @@ | |||
52 | #define T4_STAG_UNSET 0xffffffff | 52 | #define T4_STAG_UNSET 0xffffffff |
53 | #define T4_FW_MAJ 0 | 53 | #define T4_FW_MAJ 0 |
54 | #define T4_EQ_STATUS_ENTRIES (L1_CACHE_BYTES > 64 ? 2 : 1) | 54 | #define T4_EQ_STATUS_ENTRIES (L1_CACHE_BYTES > 64 ? 2 : 1) |
55 | #define A_PCIE_MA_SYNC 0x30b4 | ||
55 | 56 | ||
56 | struct t4_status_page { | 57 | struct t4_status_page { |
57 | __be32 rsvd1; /* flit 0 - hw owns */ | 58 | __be32 rsvd1; /* flit 0 - hw owns */ |
@@ -65,7 +66,7 @@ struct t4_status_page { | |||
65 | 66 | ||
66 | #define T4_EQ_ENTRY_SIZE 64 | 67 | #define T4_EQ_ENTRY_SIZE 64 |
67 | 68 | ||
68 | #define T4_SQ_NUM_SLOTS 4 | 69 | #define T4_SQ_NUM_SLOTS 5 |
69 | #define T4_SQ_NUM_BYTES (T4_EQ_ENTRY_SIZE * T4_SQ_NUM_SLOTS) | 70 | #define T4_SQ_NUM_BYTES (T4_EQ_ENTRY_SIZE * T4_SQ_NUM_SLOTS) |
70 | #define T4_MAX_SEND_SGE ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_send_wr) - \ | 71 | #define T4_MAX_SEND_SGE ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_send_wr) - \ |
71 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) | 72 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) |
@@ -78,7 +79,7 @@ struct t4_status_page { | |||
78 | sizeof(struct fw_ri_rdma_write_wr) - \ | 79 | sizeof(struct fw_ri_rdma_write_wr) - \ |
79 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) | 80 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) |
80 | #define T4_MAX_FR_IMMD ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \ | 81 | #define T4_MAX_FR_IMMD ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \ |
81 | sizeof(struct fw_ri_immd))) | 82 | sizeof(struct fw_ri_immd)) & ~31UL) |
82 | #define T4_MAX_FR_DEPTH (T4_MAX_FR_IMMD / sizeof(u64)) | 83 | #define T4_MAX_FR_DEPTH (T4_MAX_FR_IMMD / sizeof(u64)) |
83 | 84 | ||
84 | #define T4_RQ_NUM_SLOTS 2 | 85 | #define T4_RQ_NUM_SLOTS 2 |
@@ -266,10 +267,36 @@ struct t4_swsqe { | |||
266 | u16 idx; | 267 | u16 idx; |
267 | }; | 268 | }; |
268 | 269 | ||
270 | static inline pgprot_t t4_pgprot_wc(pgprot_t prot) | ||
271 | { | ||
272 | #if defined(__i386__) || defined(__x86_64__) | ||
273 | return pgprot_writecombine(prot); | ||
274 | #elif defined(CONFIG_PPC64) | ||
275 | return __pgprot((pgprot_val(prot) | _PAGE_NO_CACHE) & | ||
276 | ~(pgprot_t)_PAGE_GUARDED); | ||
277 | #else | ||
278 | return pgprot_noncached(prot); | ||
279 | #endif | ||
280 | } | ||
281 | |||
282 | static inline int t4_ocqp_supported(void) | ||
283 | { | ||
284 | #if defined(__i386__) || defined(__x86_64__) || defined(CONFIG_PPC64) | ||
285 | return 1; | ||
286 | #else | ||
287 | return 0; | ||
288 | #endif | ||
289 | } | ||
290 | |||
291 | enum { | ||
292 | T4_SQ_ONCHIP = (1<<0), | ||
293 | }; | ||
294 | |||
269 | struct t4_sq { | 295 | struct t4_sq { |
270 | union t4_wr *queue; | 296 | union t4_wr *queue; |
271 | dma_addr_t dma_addr; | 297 | dma_addr_t dma_addr; |
272 | DEFINE_DMA_UNMAP_ADDR(mapping); | 298 | DEFINE_DMA_UNMAP_ADDR(mapping); |
299 | unsigned long phys_addr; | ||
273 | struct t4_swsqe *sw_sq; | 300 | struct t4_swsqe *sw_sq; |
274 | struct t4_swsqe *oldest_read; | 301 | struct t4_swsqe *oldest_read; |
275 | u64 udb; | 302 | u64 udb; |
@@ -280,6 +307,7 @@ struct t4_sq { | |||
280 | u16 cidx; | 307 | u16 cidx; |
281 | u16 pidx; | 308 | u16 pidx; |
282 | u16 wq_pidx; | 309 | u16 wq_pidx; |
310 | u16 flags; | ||
283 | }; | 311 | }; |
284 | 312 | ||
285 | struct t4_swrqe { | 313 | struct t4_swrqe { |
@@ -350,6 +378,11 @@ static inline void t4_rq_consume(struct t4_wq *wq) | |||
350 | wq->rq.cidx = 0; | 378 | wq->rq.cidx = 0; |
351 | } | 379 | } |
352 | 380 | ||
381 | static inline int t4_sq_onchip(struct t4_sq *sq) | ||
382 | { | ||
383 | return sq->flags & T4_SQ_ONCHIP; | ||
384 | } | ||
385 | |||
353 | static inline int t4_sq_empty(struct t4_wq *wq) | 386 | static inline int t4_sq_empty(struct t4_wq *wq) |
354 | { | 387 | { |
355 | return wq->sq.in_use == 0; | 388 | return wq->sq.in_use == 0; |
@@ -396,30 +429,27 @@ static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc) | |||
396 | 429 | ||
397 | static inline int t4_wq_in_error(struct t4_wq *wq) | 430 | static inline int t4_wq_in_error(struct t4_wq *wq) |
398 | { | 431 | { |
399 | return wq->sq.queue[wq->sq.size].status.qp_err; | 432 | return wq->rq.queue[wq->rq.size].status.qp_err; |
400 | } | 433 | } |
401 | 434 | ||
402 | static inline void t4_set_wq_in_error(struct t4_wq *wq) | 435 | static inline void t4_set_wq_in_error(struct t4_wq *wq) |
403 | { | 436 | { |
404 | wq->sq.queue[wq->sq.size].status.qp_err = 1; | ||
405 | wq->rq.queue[wq->rq.size].status.qp_err = 1; | 437 | wq->rq.queue[wq->rq.size].status.qp_err = 1; |
406 | } | 438 | } |
407 | 439 | ||
408 | static inline void t4_disable_wq_db(struct t4_wq *wq) | 440 | static inline void t4_disable_wq_db(struct t4_wq *wq) |
409 | { | 441 | { |
410 | wq->sq.queue[wq->sq.size].status.db_off = 1; | ||
411 | wq->rq.queue[wq->rq.size].status.db_off = 1; | 442 | wq->rq.queue[wq->rq.size].status.db_off = 1; |
412 | } | 443 | } |
413 | 444 | ||
414 | static inline void t4_enable_wq_db(struct t4_wq *wq) | 445 | static inline void t4_enable_wq_db(struct t4_wq *wq) |
415 | { | 446 | { |
416 | wq->sq.queue[wq->sq.size].status.db_off = 0; | ||
417 | wq->rq.queue[wq->rq.size].status.db_off = 0; | 447 | wq->rq.queue[wq->rq.size].status.db_off = 0; |
418 | } | 448 | } |
419 | 449 | ||
420 | static inline int t4_wq_db_enabled(struct t4_wq *wq) | 450 | static inline int t4_wq_db_enabled(struct t4_wq *wq) |
421 | { | 451 | { |
422 | return !wq->sq.queue[wq->sq.size].status.db_off; | 452 | return !wq->rq.queue[wq->rq.size].status.db_off; |
423 | } | 453 | } |
424 | 454 | ||
425 | struct t4_cq { | 455 | struct t4_cq { |
diff --git a/drivers/infiniband/hw/cxgb4/user.h b/drivers/infiniband/hw/cxgb4/user.h index ed6414abde02..e6669d54770e 100644 --- a/drivers/infiniband/hw/cxgb4/user.h +++ b/drivers/infiniband/hw/cxgb4/user.h | |||
@@ -50,7 +50,13 @@ struct c4iw_create_cq_resp { | |||
50 | __u32 qid_mask; | 50 | __u32 qid_mask; |
51 | }; | 51 | }; |
52 | 52 | ||
53 | |||
54 | enum { | ||
55 | C4IW_QPF_ONCHIP = (1<<0) | ||
56 | }; | ||
57 | |||
53 | struct c4iw_create_qp_resp { | 58 | struct c4iw_create_qp_resp { |
59 | __u64 ma_sync_key; | ||
54 | __u64 sq_key; | 60 | __u64 sq_key; |
55 | __u64 rq_key; | 61 | __u64 rq_key; |
56 | __u64 sq_db_gts_key; | 62 | __u64 sq_db_gts_key; |
@@ -62,5 +68,6 @@ struct c4iw_create_qp_resp { | |||
62 | __u32 sq_size; | 68 | __u32 sq_size; |
63 | __u32 rq_size; | 69 | __u32 rq_size; |
64 | __u32 qid_mask; | 70 | __u32 qid_mask; |
71 | __u32 flags; | ||
65 | }; | 72 | }; |
66 | #endif | 73 | #endif |
diff --git a/drivers/infiniband/hw/ehca/ehca_mrmw.c b/drivers/infiniband/hw/ehca/ehca_mrmw.c index 53f4cd4fc19a..43cae84005f0 100644 --- a/drivers/infiniband/hw/ehca/ehca_mrmw.c +++ b/drivers/infiniband/hw/ehca/ehca_mrmw.c | |||
@@ -171,7 +171,7 @@ struct ib_mr *ehca_get_dma_mr(struct ib_pd *pd, int mr_access_flags) | |||
171 | } | 171 | } |
172 | 172 | ||
173 | ret = ehca_reg_maxmr(shca, e_maxmr, | 173 | ret = ehca_reg_maxmr(shca, e_maxmr, |
174 | (void *)ehca_map_vaddr((void *)KERNELBASE), | 174 | (void *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)), |
175 | mr_access_flags, e_pd, | 175 | mr_access_flags, e_pd, |
176 | &e_maxmr->ib.ib_mr.lkey, | 176 | &e_maxmr->ib.ib_mr.lkey, |
177 | &e_maxmr->ib.ib_mr.rkey); | 177 | &e_maxmr->ib.ib_mr.rkey); |
@@ -1636,7 +1636,7 @@ int ehca_reg_internal_maxmr( | |||
1636 | 1636 | ||
1637 | /* register internal max-MR on HCA */ | 1637 | /* register internal max-MR on HCA */ |
1638 | size_maxmr = ehca_mr_len; | 1638 | size_maxmr = ehca_mr_len; |
1639 | iova_start = (u64 *)ehca_map_vaddr((void *)KERNELBASE); | 1639 | iova_start = (u64 *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)); |
1640 | ib_pbuf.addr = 0; | 1640 | ib_pbuf.addr = 0; |
1641 | ib_pbuf.size = size_maxmr; | 1641 | ib_pbuf.size = size_maxmr; |
1642 | num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size_maxmr, | 1642 | num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size_maxmr, |
@@ -2209,7 +2209,7 @@ int ehca_mr_is_maxmr(u64 size, | |||
2209 | { | 2209 | { |
2210 | /* a MR is treated as max-MR only if it fits following: */ | 2210 | /* a MR is treated as max-MR only if it fits following: */ |
2211 | if ((size == ehca_mr_len) && | 2211 | if ((size == ehca_mr_len) && |
2212 | (iova_start == (void *)ehca_map_vaddr((void *)KERNELBASE))) { | 2212 | (iova_start == (void *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)))) { |
2213 | ehca_gen_dbg("this is a max-MR"); | 2213 | ehca_gen_dbg("this is a max-MR"); |
2214 | return 1; | 2214 | return 1; |
2215 | } else | 2215 | } else |
diff --git a/drivers/infiniband/hw/ipath/Makefile b/drivers/infiniband/hw/ipath/Makefile index fa3df82681df..4496f2820c92 100644 --- a/drivers/infiniband/hw/ipath/Makefile +++ b/drivers/infiniband/hw/ipath/Makefile | |||
@@ -1,4 +1,4 @@ | |||
1 | EXTRA_CFLAGS += -DIPATH_IDSTR='"QLogic kernel.org driver"' \ | 1 | ccflags-y := -DIPATH_IDSTR='"QLogic kernel.org driver"' \ |
2 | -DIPATH_KERN_TYPE=0 | 2 | -DIPATH_KERN_TYPE=0 |
3 | 3 | ||
4 | obj-$(CONFIG_INFINIBAND_IPATH) += ib_ipath.o | 4 | obj-$(CONFIG_INFINIBAND_IPATH) += ib_ipath.o |
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c index 8736bd836dc0..bf3e20cd0298 100644 --- a/drivers/infiniband/hw/mlx4/main.c +++ b/drivers/infiniband/hw/mlx4/main.c | |||
@@ -151,7 +151,7 @@ static int mlx4_ib_query_device(struct ib_device *ibdev, | |||
151 | props->max_srq = dev->dev->caps.num_srqs - dev->dev->caps.reserved_srqs; | 151 | props->max_srq = dev->dev->caps.num_srqs - dev->dev->caps.reserved_srqs; |
152 | props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; | 152 | props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; |
153 | props->max_srq_sge = dev->dev->caps.max_srq_sge; | 153 | props->max_srq_sge = dev->dev->caps.max_srq_sge; |
154 | props->max_fast_reg_page_list_len = PAGE_SIZE / sizeof (u64); | 154 | props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; |
155 | props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; | 155 | props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; |
156 | props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? | 156 | props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? |
157 | IB_ATOMIC_HCA : IB_ATOMIC_NONE; | 157 | IB_ATOMIC_HCA : IB_ATOMIC_NONE; |
@@ -372,14 +372,32 @@ out: | |||
372 | static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, | 372 | static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, |
373 | struct ib_device_modify *props) | 373 | struct ib_device_modify *props) |
374 | { | 374 | { |
375 | struct mlx4_cmd_mailbox *mailbox; | ||
376 | |||
375 | if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) | 377 | if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) |
376 | return -EOPNOTSUPP; | 378 | return -EOPNOTSUPP; |
377 | 379 | ||
378 | if (mask & IB_DEVICE_MODIFY_NODE_DESC) { | 380 | if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) |
379 | spin_lock(&to_mdev(ibdev)->sm_lock); | 381 | return 0; |
380 | memcpy(ibdev->node_desc, props->node_desc, 64); | 382 | |
381 | spin_unlock(&to_mdev(ibdev)->sm_lock); | 383 | spin_lock(&to_mdev(ibdev)->sm_lock); |
382 | } | 384 | memcpy(ibdev->node_desc, props->node_desc, 64); |
385 | spin_unlock(&to_mdev(ibdev)->sm_lock); | ||
386 | |||
387 | /* | ||
388 | * If possible, pass node desc to FW, so it can generate | ||
389 | * a 144 trap. If cmd fails, just ignore. | ||
390 | */ | ||
391 | mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); | ||
392 | if (IS_ERR(mailbox)) | ||
393 | return 0; | ||
394 | |||
395 | memset(mailbox->buf, 0, 256); | ||
396 | memcpy(mailbox->buf, props->node_desc, 64); | ||
397 | mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, | ||
398 | MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A); | ||
399 | |||
400 | mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); | ||
383 | 401 | ||
384 | return 0; | 402 | return 0; |
385 | } | 403 | } |
diff --git a/drivers/infiniband/hw/mlx4/mr.c b/drivers/infiniband/hw/mlx4/mr.c index 1d27b9a8e2d6..dca55b19a6f1 100644 --- a/drivers/infiniband/hw/mlx4/mr.c +++ b/drivers/infiniband/hw/mlx4/mr.c | |||
@@ -226,7 +226,7 @@ struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device | |||
226 | struct mlx4_ib_fast_reg_page_list *mfrpl; | 226 | struct mlx4_ib_fast_reg_page_list *mfrpl; |
227 | int size = page_list_len * sizeof (u64); | 227 | int size = page_list_len * sizeof (u64); |
228 | 228 | ||
229 | if (size > PAGE_SIZE) | 229 | if (page_list_len > MLX4_MAX_FAST_REG_PAGES) |
230 | return ERR_PTR(-EINVAL); | 230 | return ERR_PTR(-EINVAL); |
231 | 231 | ||
232 | mfrpl = kmalloc(sizeof *mfrpl, GFP_KERNEL); | 232 | mfrpl = kmalloc(sizeof *mfrpl, GFP_KERNEL); |
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c index 61e0efd4ccfb..5c8d34cb6a23 100644 --- a/drivers/infiniband/hw/nes/nes_cm.c +++ b/drivers/infiniband/hw/nes/nes_cm.c | |||
@@ -1424,7 +1424,6 @@ static void handle_rst_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb, | |||
1424 | { | 1424 | { |
1425 | 1425 | ||
1426 | int reset = 0; /* whether to send reset in case of err.. */ | 1426 | int reset = 0; /* whether to send reset in case of err.. */ |
1427 | int passive_state; | ||
1428 | atomic_inc(&cm_resets_recvd); | 1427 | atomic_inc(&cm_resets_recvd); |
1429 | nes_debug(NES_DBG_CM, "Received Reset, cm_node = %p, state = %u." | 1428 | nes_debug(NES_DBG_CM, "Received Reset, cm_node = %p, state = %u." |
1430 | " refcnt=%d\n", cm_node, cm_node->state, | 1429 | " refcnt=%d\n", cm_node, cm_node->state, |
@@ -1439,7 +1438,7 @@ static void handle_rst_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb, | |||
1439 | active_open_err(cm_node, skb, reset); | 1438 | active_open_err(cm_node, skb, reset); |
1440 | break; | 1439 | break; |
1441 | case NES_CM_STATE_MPAREQ_RCVD: | 1440 | case NES_CM_STATE_MPAREQ_RCVD: |
1442 | passive_state = atomic_add_return(1, &cm_node->passive_state); | 1441 | atomic_inc(&cm_node->passive_state); |
1443 | dev_kfree_skb_any(skb); | 1442 | dev_kfree_skb_any(skb); |
1444 | break; | 1443 | break; |
1445 | case NES_CM_STATE_ESTABLISHED: | 1444 | case NES_CM_STATE_ESTABLISHED: |
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c index 10560c796fd6..3892e2c0e95a 100644 --- a/drivers/infiniband/hw/nes/nes_nic.c +++ b/drivers/infiniband/hw/nes/nes_nic.c | |||
@@ -271,6 +271,7 @@ static int nes_netdev_stop(struct net_device *netdev) | |||
271 | 271 | ||
272 | if (netif_msg_ifdown(nesvnic)) | 272 | if (netif_msg_ifdown(nesvnic)) |
273 | printk(KERN_INFO PFX "%s: disabling interface\n", netdev->name); | 273 | printk(KERN_INFO PFX "%s: disabling interface\n", netdev->name); |
274 | netif_carrier_off(netdev); | ||
274 | 275 | ||
275 | /* Disable network packets */ | 276 | /* Disable network packets */ |
276 | napi_disable(&nesvnic->napi); | 277 | napi_disable(&nesvnic->napi); |
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c index 9046e6675686..2374efbdda6b 100644 --- a/drivers/infiniband/hw/nes/nes_verbs.c +++ b/drivers/infiniband/hw/nes/nes_verbs.c | |||
@@ -476,9 +476,9 @@ static struct ib_fast_reg_page_list *nes_alloc_fast_reg_page_list( | |||
476 | } | 476 | } |
477 | nes_debug(NES_DBG_MR, "nes_alloc_fast_reg_pbl: nes_frpl = %p, " | 477 | nes_debug(NES_DBG_MR, "nes_alloc_fast_reg_pbl: nes_frpl = %p, " |
478 | "ibfrpl = %p, ibfrpl.page_list = %p, pbl.kva = %p, " | 478 | "ibfrpl = %p, ibfrpl.page_list = %p, pbl.kva = %p, " |
479 | "pbl.paddr= %p\n", pnesfrpl, &pnesfrpl->ibfrpl, | 479 | "pbl.paddr = %llx\n", pnesfrpl, &pnesfrpl->ibfrpl, |
480 | pnesfrpl->ibfrpl.page_list, pnesfrpl->nes_wqe_pbl.kva, | 480 | pnesfrpl->ibfrpl.page_list, pnesfrpl->nes_wqe_pbl.kva, |
481 | (void *)pnesfrpl->nes_wqe_pbl.paddr); | 481 | (unsigned long long) pnesfrpl->nes_wqe_pbl.paddr); |
482 | 482 | ||
483 | return pifrpl; | 483 | return pifrpl; |
484 | } | 484 | } |
@@ -584,7 +584,9 @@ static int nes_query_port(struct ib_device *ibdev, u8 port, struct ib_port_attr | |||
584 | props->lmc = 0; | 584 | props->lmc = 0; |
585 | props->sm_lid = 0; | 585 | props->sm_lid = 0; |
586 | props->sm_sl = 0; | 586 | props->sm_sl = 0; |
587 | if (nesvnic->linkup) | 587 | if (netif_queue_stopped(netdev)) |
588 | props->state = IB_PORT_DOWN; | ||
589 | else if (nesvnic->linkup) | ||
588 | props->state = IB_PORT_ACTIVE; | 590 | props->state = IB_PORT_ACTIVE; |
589 | else | 591 | else |
590 | props->state = IB_PORT_DOWN; | 592 | props->state = IB_PORT_DOWN; |
@@ -3483,13 +3485,13 @@ static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr, | |||
3483 | for (i = 0; i < ib_wr->wr.fast_reg.page_list_len; i++) | 3485 | for (i = 0; i < ib_wr->wr.fast_reg.page_list_len; i++) |
3484 | dst_page_list[i] = cpu_to_le64(src_page_list[i]); | 3486 | dst_page_list[i] = cpu_to_le64(src_page_list[i]); |
3485 | 3487 | ||
3486 | nes_debug(NES_DBG_IW_TX, "SQ_FMR: iova_start: %p, " | 3488 | nes_debug(NES_DBG_IW_TX, "SQ_FMR: iova_start: %llx, " |
3487 | "length: %d, rkey: %0x, pgl_paddr: %p, " | 3489 | "length: %d, rkey: %0x, pgl_paddr: %llx, " |
3488 | "page_list_len: %u, wqe_misc: %x\n", | 3490 | "page_list_len: %u, wqe_misc: %x\n", |
3489 | (void *)ib_wr->wr.fast_reg.iova_start, | 3491 | (unsigned long long) ib_wr->wr.fast_reg.iova_start, |
3490 | ib_wr->wr.fast_reg.length, | 3492 | ib_wr->wr.fast_reg.length, |
3491 | ib_wr->wr.fast_reg.rkey, | 3493 | ib_wr->wr.fast_reg.rkey, |
3492 | (void *)pnesfrpl->nes_wqe_pbl.paddr, | 3494 | (unsigned long long) pnesfrpl->nes_wqe_pbl.paddr, |
3493 | ib_wr->wr.fast_reg.page_list_len, | 3495 | ib_wr->wr.fast_reg.page_list_len, |
3494 | wqe_misc); | 3496 | wqe_misc); |
3495 | break; | 3497 | break; |
diff --git a/drivers/infiniband/hw/qib/qib.h b/drivers/infiniband/hw/qib/qib.h index 61de0654820e..64c9e7d02d4a 100644 --- a/drivers/infiniband/hw/qib/qib.h +++ b/drivers/infiniband/hw/qib/qib.h | |||
@@ -1406,7 +1406,7 @@ extern struct mutex qib_mutex; | |||
1406 | */ | 1406 | */ |
1407 | #define qib_early_err(dev, fmt, ...) \ | 1407 | #define qib_early_err(dev, fmt, ...) \ |
1408 | do { \ | 1408 | do { \ |
1409 | dev_info(dev, KERN_ERR QIB_DRV_NAME ": " fmt, ##__VA_ARGS__); \ | 1409 | dev_err(dev, fmt, ##__VA_ARGS__); \ |
1410 | } while (0) | 1410 | } while (0) |
1411 | 1411 | ||
1412 | #define qib_dev_err(dd, fmt, ...) \ | 1412 | #define qib_dev_err(dd, fmt, ...) \ |
diff --git a/drivers/infiniband/hw/qib/qib_file_ops.c b/drivers/infiniband/hw/qib/qib_file_ops.c index 6b11645edf35..cef5d676120a 100644 --- a/drivers/infiniband/hw/qib/qib_file_ops.c +++ b/drivers/infiniband/hw/qib/qib_file_ops.c | |||
@@ -1722,7 +1722,7 @@ static int qib_close(struct inode *in, struct file *fp) | |||
1722 | 1722 | ||
1723 | mutex_lock(&qib_mutex); | 1723 | mutex_lock(&qib_mutex); |
1724 | 1724 | ||
1725 | fd = (struct qib_filedata *) fp->private_data; | 1725 | fd = fp->private_data; |
1726 | fp->private_data = NULL; | 1726 | fp->private_data = NULL; |
1727 | rcd = fd->rcd; | 1727 | rcd = fd->rcd; |
1728 | if (!rcd) { | 1728 | if (!rcd) { |
@@ -1808,7 +1808,7 @@ static int qib_ctxt_info(struct file *fp, struct qib_ctxt_info __user *uinfo) | |||
1808 | struct qib_ctxtdata *rcd = ctxt_fp(fp); | 1808 | struct qib_ctxtdata *rcd = ctxt_fp(fp); |
1809 | struct qib_filedata *fd; | 1809 | struct qib_filedata *fd; |
1810 | 1810 | ||
1811 | fd = (struct qib_filedata *) fp->private_data; | 1811 | fd = fp->private_data; |
1812 | 1812 | ||
1813 | info.num_active = qib_count_active_units(); | 1813 | info.num_active = qib_count_active_units(); |
1814 | info.unit = rcd->dd->unit; | 1814 | info.unit = rcd->dd->unit; |
diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c index f1d16d3a01f6..f3b503936043 100644 --- a/drivers/infiniband/hw/qib/qib_init.c +++ b/drivers/infiniband/hw/qib/qib_init.c | |||
@@ -1243,6 +1243,7 @@ static int __devinit qib_init_one(struct pci_dev *pdev, | |||
1243 | qib_early_err(&pdev->dev, "QLogic PCIE device 0x%x cannot " | 1243 | qib_early_err(&pdev->dev, "QLogic PCIE device 0x%x cannot " |
1244 | "work if CONFIG_PCI_MSI is not enabled\n", | 1244 | "work if CONFIG_PCI_MSI is not enabled\n", |
1245 | ent->device); | 1245 | ent->device); |
1246 | dd = ERR_PTR(-ENODEV); | ||
1246 | #endif | 1247 | #endif |
1247 | break; | 1248 | break; |
1248 | 1249 | ||
diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c index 7fa6e5592630..48b6674cbc49 100644 --- a/drivers/infiniband/hw/qib/qib_pcie.c +++ b/drivers/infiniband/hw/qib/qib_pcie.c | |||
@@ -103,16 +103,20 @@ int qib_pcie_init(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
103 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | 103 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
104 | } else | 104 | } else |
105 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | 105 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); |
106 | if (ret) | 106 | if (ret) { |
107 | qib_early_err(&pdev->dev, | 107 | qib_early_err(&pdev->dev, |
108 | "Unable to set DMA consistent mask: %d\n", ret); | 108 | "Unable to set DMA consistent mask: %d\n", ret); |
109 | goto bail; | ||
110 | } | ||
109 | 111 | ||
110 | pci_set_master(pdev); | 112 | pci_set_master(pdev); |
111 | ret = pci_enable_pcie_error_reporting(pdev); | 113 | ret = pci_enable_pcie_error_reporting(pdev); |
112 | if (ret) | 114 | if (ret) { |
113 | qib_early_err(&pdev->dev, | 115 | qib_early_err(&pdev->dev, |
114 | "Unable to enable pcie error reporting: %d\n", | 116 | "Unable to enable pcie error reporting: %d\n", |
115 | ret); | 117 | ret); |
118 | ret = 0; | ||
119 | } | ||
116 | goto done; | 120 | goto done; |
117 | 121 | ||
118 | bail: | 122 | bail: |
diff --git a/drivers/infiniband/hw/qib/qib_rc.c b/drivers/infiniband/hw/qib/qib_rc.c index a0931119bd78..955fb7157793 100644 --- a/drivers/infiniband/hw/qib/qib_rc.c +++ b/drivers/infiniband/hw/qib/qib_rc.c | |||
@@ -2068,7 +2068,10 @@ send_last: | |||
2068 | goto nack_op_err; | 2068 | goto nack_op_err; |
2069 | if (!ret) | 2069 | if (!ret) |
2070 | goto rnr_nak; | 2070 | goto rnr_nak; |
2071 | goto send_last_imm; | 2071 | wc.ex.imm_data = ohdr->u.rc.imm_data; |
2072 | hdrsize += 4; | ||
2073 | wc.wc_flags = IB_WC_WITH_IMM; | ||
2074 | goto send_last; | ||
2072 | 2075 | ||
2073 | case OP(RDMA_READ_REQUEST): { | 2076 | case OP(RDMA_READ_REQUEST): { |
2074 | struct qib_ack_entry *e; | 2077 | struct qib_ack_entry *e; |
diff --git a/drivers/infiniband/hw/qib/qib_uc.c b/drivers/infiniband/hw/qib/qib_uc.c index b9c8b6346c1b..32ccf3c824ca 100644 --- a/drivers/infiniband/hw/qib/qib_uc.c +++ b/drivers/infiniband/hw/qib/qib_uc.c | |||
@@ -457,8 +457,10 @@ rdma_first: | |||
457 | } | 457 | } |
458 | if (opcode == OP(RDMA_WRITE_ONLY)) | 458 | if (opcode == OP(RDMA_WRITE_ONLY)) |
459 | goto rdma_last; | 459 | goto rdma_last; |
460 | else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) | 460 | else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) { |
461 | wc.ex.imm_data = ohdr->u.rc.imm_data; | ||
461 | goto rdma_last_imm; | 462 | goto rdma_last_imm; |
463 | } | ||
462 | /* FALLTHROUGH */ | 464 | /* FALLTHROUGH */ |
463 | case OP(RDMA_WRITE_MIDDLE): | 465 | case OP(RDMA_WRITE_MIDDLE): |
464 | /* Check for invalid length PMTU or posted rwqe len. */ | 466 | /* Check for invalid length PMTU or posted rwqe len. */ |
@@ -471,8 +473,8 @@ rdma_first: | |||
471 | break; | 473 | break; |
472 | 474 | ||
473 | case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): | 475 | case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): |
474 | rdma_last_imm: | ||
475 | wc.ex.imm_data = ohdr->u.imm_data; | 476 | wc.ex.imm_data = ohdr->u.imm_data; |
477 | rdma_last_imm: | ||
476 | hdrsize += 4; | 478 | hdrsize += 4; |
477 | wc.wc_flags = IB_WC_WITH_IMM; | 479 | wc.wc_flags = IB_WC_WITH_IMM; |
478 | 480 | ||
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_ib.c b/drivers/infiniband/ulp/ipoib/ipoib_ib.c index ec6b4fbe25e4..dfa71903d6e4 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_ib.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_ib.c | |||
@@ -223,6 +223,7 @@ static void ipoib_ib_handle_rx_wc(struct net_device *dev, struct ib_wc *wc) | |||
223 | unsigned int wr_id = wc->wr_id & ~IPOIB_OP_RECV; | 223 | unsigned int wr_id = wc->wr_id & ~IPOIB_OP_RECV; |
224 | struct sk_buff *skb; | 224 | struct sk_buff *skb; |
225 | u64 mapping[IPOIB_UD_RX_SG]; | 225 | u64 mapping[IPOIB_UD_RX_SG]; |
226 | union ib_gid *dgid; | ||
226 | 227 | ||
227 | ipoib_dbg_data(priv, "recv completion: id %d, status: %d\n", | 228 | ipoib_dbg_data(priv, "recv completion: id %d, status: %d\n", |
228 | wr_id, wc->status); | 229 | wr_id, wc->status); |
@@ -271,6 +272,16 @@ static void ipoib_ib_handle_rx_wc(struct net_device *dev, struct ib_wc *wc) | |||
271 | ipoib_ud_dma_unmap_rx(priv, mapping); | 272 | ipoib_ud_dma_unmap_rx(priv, mapping); |
272 | ipoib_ud_skb_put_frags(priv, skb, wc->byte_len); | 273 | ipoib_ud_skb_put_frags(priv, skb, wc->byte_len); |
273 | 274 | ||
275 | /* First byte of dgid signals multicast when 0xff */ | ||
276 | dgid = &((struct ib_grh *)skb->data)->dgid; | ||
277 | |||
278 | if (!(wc->wc_flags & IB_WC_GRH) || dgid->raw[0] != 0xff) | ||
279 | skb->pkt_type = PACKET_HOST; | ||
280 | else if (memcmp(dgid, dev->broadcast + 4, sizeof(union ib_gid)) == 0) | ||
281 | skb->pkt_type = PACKET_BROADCAST; | ||
282 | else | ||
283 | skb->pkt_type = PACKET_MULTICAST; | ||
284 | |||
274 | skb_pull(skb, IB_GRH_BYTES); | 285 | skb_pull(skb, IB_GRH_BYTES); |
275 | 286 | ||
276 | skb->protocol = ((struct ipoib_header *) skb->data)->proto; | 287 | skb->protocol = ((struct ipoib_header *) skb->data)->proto; |
@@ -281,9 +292,6 @@ static void ipoib_ib_handle_rx_wc(struct net_device *dev, struct ib_wc *wc) | |||
281 | dev->stats.rx_bytes += skb->len; | 292 | dev->stats.rx_bytes += skb->len; |
282 | 293 | ||
283 | skb->dev = dev; | 294 | skb->dev = dev; |
284 | /* XXX get correct PACKET_ type here */ | ||
285 | skb->pkt_type = PACKET_HOST; | ||
286 | |||
287 | if (test_bit(IPOIB_FLAG_CSUM, &priv->flags) && likely(wc->csum_ok)) | 295 | if (test_bit(IPOIB_FLAG_CSUM, &priv->flags) && likely(wc->csum_ok)) |
288 | skb->ip_summed = CHECKSUM_UNNECESSARY; | 296 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
289 | 297 | ||
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c index 9141779fba3c..4f258c88c1b4 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_main.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c | |||
@@ -1240,6 +1240,7 @@ static struct net_device *ipoib_add_port(const char *format, | |||
1240 | goto alloc_mem_failed; | 1240 | goto alloc_mem_failed; |
1241 | 1241 | ||
1242 | SET_NETDEV_DEV(priv->dev, hca->dma_device); | 1242 | SET_NETDEV_DEV(priv->dev, hca->dma_device); |
1243 | priv->dev->dev_id = port - 1; | ||
1243 | 1244 | ||
1244 | if (!ib_query_port(hca, port, &attr)) | 1245 | if (!ib_query_port(hca, port, &attr)) |
1245 | priv->max_ib_mtu = ib_mtu_enum_to_int(attr.max_mtu); | 1246 | priv->max_ib_mtu = ib_mtu_enum_to_int(attr.max_mtu); |
diff --git a/drivers/infiniband/ulp/srp/ib_srp.c b/drivers/infiniband/ulp/srp/ib_srp.c index 7f8f16bad753..cfc1d65c4577 100644 --- a/drivers/infiniband/ulp/srp/ib_srp.c +++ b/drivers/infiniband/ulp/srp/ib_srp.c | |||
@@ -291,7 +291,7 @@ static void srp_free_target_ib(struct srp_target_port *target) | |||
291 | 291 | ||
292 | for (i = 0; i < SRP_RQ_SIZE; ++i) | 292 | for (i = 0; i < SRP_RQ_SIZE; ++i) |
293 | srp_free_iu(target->srp_host, target->rx_ring[i]); | 293 | srp_free_iu(target->srp_host, target->rx_ring[i]); |
294 | for (i = 0; i < SRP_SQ_SIZE + 1; ++i) | 294 | for (i = 0; i < SRP_SQ_SIZE; ++i) |
295 | srp_free_iu(target->srp_host, target->tx_ring[i]); | 295 | srp_free_iu(target->srp_host, target->tx_ring[i]); |
296 | } | 296 | } |
297 | 297 | ||
@@ -811,6 +811,75 @@ static int srp_map_data(struct scsi_cmnd *scmnd, struct srp_target_port *target, | |||
811 | return len; | 811 | return len; |
812 | } | 812 | } |
813 | 813 | ||
814 | /* | ||
815 | * Must be called with target->scsi_host->host_lock held to protect | ||
816 | * req_lim and tx_head. Lock cannot be dropped between call here and | ||
817 | * call to __srp_post_send(). | ||
818 | * | ||
819 | * Note: | ||
820 | * An upper limit for the number of allocated information units for each | ||
821 | * request type is: | ||
822 | * - SRP_IU_CMD: SRP_CMD_SQ_SIZE, since the SCSI mid-layer never queues | ||
823 | * more than Scsi_Host.can_queue requests. | ||
824 | * - SRP_IU_TSK_MGMT: SRP_TSK_MGMT_SQ_SIZE. | ||
825 | * - SRP_IU_RSP: 1, since a conforming SRP target never sends more than | ||
826 | * one unanswered SRP request to an initiator. | ||
827 | */ | ||
828 | static struct srp_iu *__srp_get_tx_iu(struct srp_target_port *target, | ||
829 | enum srp_iu_type iu_type) | ||
830 | { | ||
831 | s32 rsv = (iu_type == SRP_IU_TSK_MGMT) ? 0 : SRP_TSK_MGMT_SQ_SIZE; | ||
832 | struct srp_iu *iu; | ||
833 | |||
834 | srp_send_completion(target->send_cq, target); | ||
835 | |||
836 | if (target->tx_head - target->tx_tail >= SRP_SQ_SIZE) | ||
837 | return NULL; | ||
838 | |||
839 | /* Initiator responses to target requests do not consume credits */ | ||
840 | if (target->req_lim <= rsv && iu_type != SRP_IU_RSP) { | ||
841 | ++target->zero_req_lim; | ||
842 | return NULL; | ||
843 | } | ||
844 | |||
845 | iu = target->tx_ring[target->tx_head & SRP_SQ_MASK]; | ||
846 | iu->type = iu_type; | ||
847 | return iu; | ||
848 | } | ||
849 | |||
850 | /* | ||
851 | * Must be called with target->scsi_host->host_lock held to protect | ||
852 | * req_lim and tx_head. | ||
853 | */ | ||
854 | static int __srp_post_send(struct srp_target_port *target, | ||
855 | struct srp_iu *iu, int len) | ||
856 | { | ||
857 | struct ib_sge list; | ||
858 | struct ib_send_wr wr, *bad_wr; | ||
859 | int ret = 0; | ||
860 | |||
861 | list.addr = iu->dma; | ||
862 | list.length = len; | ||
863 | list.lkey = target->srp_host->srp_dev->mr->lkey; | ||
864 | |||
865 | wr.next = NULL; | ||
866 | wr.wr_id = target->tx_head & SRP_SQ_MASK; | ||
867 | wr.sg_list = &list; | ||
868 | wr.num_sge = 1; | ||
869 | wr.opcode = IB_WR_SEND; | ||
870 | wr.send_flags = IB_SEND_SIGNALED; | ||
871 | |||
872 | ret = ib_post_send(target->qp, &wr, &bad_wr); | ||
873 | |||
874 | if (!ret) { | ||
875 | ++target->tx_head; | ||
876 | if (iu->type != SRP_IU_RSP) | ||
877 | --target->req_lim; | ||
878 | } | ||
879 | |||
880 | return ret; | ||
881 | } | ||
882 | |||
814 | static int srp_post_recv(struct srp_target_port *target) | 883 | static int srp_post_recv(struct srp_target_port *target) |
815 | { | 884 | { |
816 | unsigned long flags; | 885 | unsigned long flags; |
@@ -822,7 +891,7 @@ static int srp_post_recv(struct srp_target_port *target) | |||
822 | 891 | ||
823 | spin_lock_irqsave(target->scsi_host->host_lock, flags); | 892 | spin_lock_irqsave(target->scsi_host->host_lock, flags); |
824 | 893 | ||
825 | next = target->rx_head & (SRP_RQ_SIZE - 1); | 894 | next = target->rx_head & SRP_RQ_MASK; |
826 | wr.wr_id = next; | 895 | wr.wr_id = next; |
827 | iu = target->rx_ring[next]; | 896 | iu = target->rx_ring[next]; |
828 | 897 | ||
@@ -896,6 +965,71 @@ static void srp_process_rsp(struct srp_target_port *target, struct srp_rsp *rsp) | |||
896 | spin_unlock_irqrestore(target->scsi_host->host_lock, flags); | 965 | spin_unlock_irqrestore(target->scsi_host->host_lock, flags); |
897 | } | 966 | } |
898 | 967 | ||
968 | static int srp_response_common(struct srp_target_port *target, s32 req_delta, | ||
969 | void *rsp, int len) | ||
970 | { | ||
971 | struct ib_device *dev; | ||
972 | unsigned long flags; | ||
973 | struct srp_iu *iu; | ||
974 | int err = 1; | ||
975 | |||
976 | dev = target->srp_host->srp_dev->dev; | ||
977 | |||
978 | spin_lock_irqsave(target->scsi_host->host_lock, flags); | ||
979 | target->req_lim += req_delta; | ||
980 | |||
981 | iu = __srp_get_tx_iu(target, SRP_IU_RSP); | ||
982 | if (!iu) { | ||
983 | shost_printk(KERN_ERR, target->scsi_host, PFX | ||
984 | "no IU available to send response\n"); | ||
985 | goto out; | ||
986 | } | ||
987 | |||
988 | ib_dma_sync_single_for_cpu(dev, iu->dma, len, DMA_TO_DEVICE); | ||
989 | memcpy(iu->buf, rsp, len); | ||
990 | ib_dma_sync_single_for_device(dev, iu->dma, len, DMA_TO_DEVICE); | ||
991 | |||
992 | err = __srp_post_send(target, iu, len); | ||
993 | if (err) | ||
994 | shost_printk(KERN_ERR, target->scsi_host, PFX | ||
995 | "unable to post response: %d\n", err); | ||
996 | |||
997 | out: | ||
998 | spin_unlock_irqrestore(target->scsi_host->host_lock, flags); | ||
999 | return err; | ||
1000 | } | ||
1001 | |||
1002 | static void srp_process_cred_req(struct srp_target_port *target, | ||
1003 | struct srp_cred_req *req) | ||
1004 | { | ||
1005 | struct srp_cred_rsp rsp = { | ||
1006 | .opcode = SRP_CRED_RSP, | ||
1007 | .tag = req->tag, | ||
1008 | }; | ||
1009 | s32 delta = be32_to_cpu(req->req_lim_delta); | ||
1010 | |||
1011 | if (srp_response_common(target, delta, &rsp, sizeof rsp)) | ||
1012 | shost_printk(KERN_ERR, target->scsi_host, PFX | ||
1013 | "problems processing SRP_CRED_REQ\n"); | ||
1014 | } | ||
1015 | |||
1016 | static void srp_process_aer_req(struct srp_target_port *target, | ||
1017 | struct srp_aer_req *req) | ||
1018 | { | ||
1019 | struct srp_aer_rsp rsp = { | ||
1020 | .opcode = SRP_AER_RSP, | ||
1021 | .tag = req->tag, | ||
1022 | }; | ||
1023 | s32 delta = be32_to_cpu(req->req_lim_delta); | ||
1024 | |||
1025 | shost_printk(KERN_ERR, target->scsi_host, PFX | ||
1026 | "ignoring AER for LUN %llu\n", be64_to_cpu(req->lun)); | ||
1027 | |||
1028 | if (srp_response_common(target, delta, &rsp, sizeof rsp)) | ||
1029 | shost_printk(KERN_ERR, target->scsi_host, PFX | ||
1030 | "problems processing SRP_AER_REQ\n"); | ||
1031 | } | ||
1032 | |||
899 | static void srp_handle_recv(struct srp_target_port *target, struct ib_wc *wc) | 1033 | static void srp_handle_recv(struct srp_target_port *target, struct ib_wc *wc) |
900 | { | 1034 | { |
901 | struct ib_device *dev; | 1035 | struct ib_device *dev; |
@@ -923,6 +1057,14 @@ static void srp_handle_recv(struct srp_target_port *target, struct ib_wc *wc) | |||
923 | srp_process_rsp(target, iu->buf); | 1057 | srp_process_rsp(target, iu->buf); |
924 | break; | 1058 | break; |
925 | 1059 | ||
1060 | case SRP_CRED_REQ: | ||
1061 | srp_process_cred_req(target, iu->buf); | ||
1062 | break; | ||
1063 | |||
1064 | case SRP_AER_REQ: | ||
1065 | srp_process_aer_req(target, iu->buf); | ||
1066 | break; | ||
1067 | |||
926 | case SRP_T_LOGOUT: | 1068 | case SRP_T_LOGOUT: |
927 | /* XXX Handle target logout */ | 1069 | /* XXX Handle target logout */ |
928 | shost_printk(KERN_WARNING, target->scsi_host, | 1070 | shost_printk(KERN_WARNING, target->scsi_host, |
@@ -981,61 +1123,6 @@ static void srp_send_completion(struct ib_cq *cq, void *target_ptr) | |||
981 | } | 1123 | } |
982 | } | 1124 | } |
983 | 1125 | ||
984 | /* | ||
985 | * Must be called with target->scsi_host->host_lock held to protect | ||
986 | * req_lim and tx_head. Lock cannot be dropped between call here and | ||
987 | * call to __srp_post_send(). | ||
988 | */ | ||
989 | static struct srp_iu *__srp_get_tx_iu(struct srp_target_port *target, | ||
990 | enum srp_request_type req_type) | ||
991 | { | ||
992 | s32 min = (req_type == SRP_REQ_TASK_MGMT) ? 1 : 2; | ||
993 | |||
994 | srp_send_completion(target->send_cq, target); | ||
995 | |||
996 | if (target->tx_head - target->tx_tail >= SRP_SQ_SIZE) | ||
997 | return NULL; | ||
998 | |||
999 | if (target->req_lim < min) { | ||
1000 | ++target->zero_req_lim; | ||
1001 | return NULL; | ||
1002 | } | ||
1003 | |||
1004 | return target->tx_ring[target->tx_head & SRP_SQ_SIZE]; | ||
1005 | } | ||
1006 | |||
1007 | /* | ||
1008 | * Must be called with target->scsi_host->host_lock held to protect | ||
1009 | * req_lim and tx_head. | ||
1010 | */ | ||
1011 | static int __srp_post_send(struct srp_target_port *target, | ||
1012 | struct srp_iu *iu, int len) | ||
1013 | { | ||
1014 | struct ib_sge list; | ||
1015 | struct ib_send_wr wr, *bad_wr; | ||
1016 | int ret = 0; | ||
1017 | |||
1018 | list.addr = iu->dma; | ||
1019 | list.length = len; | ||
1020 | list.lkey = target->srp_host->srp_dev->mr->lkey; | ||
1021 | |||
1022 | wr.next = NULL; | ||
1023 | wr.wr_id = target->tx_head & SRP_SQ_SIZE; | ||
1024 | wr.sg_list = &list; | ||
1025 | wr.num_sge = 1; | ||
1026 | wr.opcode = IB_WR_SEND; | ||
1027 | wr.send_flags = IB_SEND_SIGNALED; | ||
1028 | |||
1029 | ret = ib_post_send(target->qp, &wr, &bad_wr); | ||
1030 | |||
1031 | if (!ret) { | ||
1032 | ++target->tx_head; | ||
1033 | --target->req_lim; | ||
1034 | } | ||
1035 | |||
1036 | return ret; | ||
1037 | } | ||
1038 | |||
1039 | static int srp_queuecommand(struct scsi_cmnd *scmnd, | 1126 | static int srp_queuecommand(struct scsi_cmnd *scmnd, |
1040 | void (*done)(struct scsi_cmnd *)) | 1127 | void (*done)(struct scsi_cmnd *)) |
1041 | { | 1128 | { |
@@ -1056,7 +1143,7 @@ static int srp_queuecommand(struct scsi_cmnd *scmnd, | |||
1056 | return 0; | 1143 | return 0; |
1057 | } | 1144 | } |
1058 | 1145 | ||
1059 | iu = __srp_get_tx_iu(target, SRP_REQ_NORMAL); | 1146 | iu = __srp_get_tx_iu(target, SRP_IU_CMD); |
1060 | if (!iu) | 1147 | if (!iu) |
1061 | goto err; | 1148 | goto err; |
1062 | 1149 | ||
@@ -1064,7 +1151,7 @@ static int srp_queuecommand(struct scsi_cmnd *scmnd, | |||
1064 | ib_dma_sync_single_for_cpu(dev, iu->dma, srp_max_iu_len, | 1151 | ib_dma_sync_single_for_cpu(dev, iu->dma, srp_max_iu_len, |
1065 | DMA_TO_DEVICE); | 1152 | DMA_TO_DEVICE); |
1066 | 1153 | ||
1067 | req = list_entry(target->free_reqs.next, struct srp_request, list); | 1154 | req = list_first_entry(&target->free_reqs, struct srp_request, list); |
1068 | 1155 | ||
1069 | scmnd->scsi_done = done; | 1156 | scmnd->scsi_done = done; |
1070 | scmnd->result = 0; | 1157 | scmnd->result = 0; |
@@ -1121,7 +1208,7 @@ static int srp_alloc_iu_bufs(struct srp_target_port *target) | |||
1121 | goto err; | 1208 | goto err; |
1122 | } | 1209 | } |
1123 | 1210 | ||
1124 | for (i = 0; i < SRP_SQ_SIZE + 1; ++i) { | 1211 | for (i = 0; i < SRP_SQ_SIZE; ++i) { |
1125 | target->tx_ring[i] = srp_alloc_iu(target->srp_host, | 1212 | target->tx_ring[i] = srp_alloc_iu(target->srp_host, |
1126 | srp_max_iu_len, | 1213 | srp_max_iu_len, |
1127 | GFP_KERNEL, DMA_TO_DEVICE); | 1214 | GFP_KERNEL, DMA_TO_DEVICE); |
@@ -1137,7 +1224,7 @@ err: | |||
1137 | target->rx_ring[i] = NULL; | 1224 | target->rx_ring[i] = NULL; |
1138 | } | 1225 | } |
1139 | 1226 | ||
1140 | for (i = 0; i < SRP_SQ_SIZE + 1; ++i) { | 1227 | for (i = 0; i < SRP_SQ_SIZE; ++i) { |
1141 | srp_free_iu(target->srp_host, target->tx_ring[i]); | 1228 | srp_free_iu(target->srp_host, target->tx_ring[i]); |
1142 | target->tx_ring[i] = NULL; | 1229 | target->tx_ring[i] = NULL; |
1143 | } | 1230 | } |
@@ -1252,8 +1339,13 @@ static int srp_cm_handler(struct ib_cm_id *cm_id, struct ib_cm_event *event) | |||
1252 | target->max_ti_iu_len = be32_to_cpu(rsp->max_ti_iu_len); | 1339 | target->max_ti_iu_len = be32_to_cpu(rsp->max_ti_iu_len); |
1253 | target->req_lim = be32_to_cpu(rsp->req_lim_delta); | 1340 | target->req_lim = be32_to_cpu(rsp->req_lim_delta); |
1254 | 1341 | ||
1255 | target->scsi_host->can_queue = min(target->req_lim, | 1342 | /* |
1256 | target->scsi_host->can_queue); | 1343 | * Reserve credits for task management so we don't |
1344 | * bounce requests back to the SCSI mid-layer. | ||
1345 | */ | ||
1346 | target->scsi_host->can_queue | ||
1347 | = min(target->req_lim - SRP_TSK_MGMT_SQ_SIZE, | ||
1348 | target->scsi_host->can_queue); | ||
1257 | } else { | 1349 | } else { |
1258 | shost_printk(KERN_WARNING, target->scsi_host, | 1350 | shost_printk(KERN_WARNING, target->scsi_host, |
1259 | PFX "Unhandled RSP opcode %#x\n", opcode); | 1351 | PFX "Unhandled RSP opcode %#x\n", opcode); |
@@ -1350,6 +1442,7 @@ static int srp_cm_handler(struct ib_cm_id *cm_id, struct ib_cm_event *event) | |||
1350 | static int srp_send_tsk_mgmt(struct srp_target_port *target, | 1442 | static int srp_send_tsk_mgmt(struct srp_target_port *target, |
1351 | struct srp_request *req, u8 func) | 1443 | struct srp_request *req, u8 func) |
1352 | { | 1444 | { |
1445 | struct ib_device *dev = target->srp_host->srp_dev->dev; | ||
1353 | struct srp_iu *iu; | 1446 | struct srp_iu *iu; |
1354 | struct srp_tsk_mgmt *tsk_mgmt; | 1447 | struct srp_tsk_mgmt *tsk_mgmt; |
1355 | 1448 | ||
@@ -1363,10 +1456,12 @@ static int srp_send_tsk_mgmt(struct srp_target_port *target, | |||
1363 | 1456 | ||
1364 | init_completion(&req->done); | 1457 | init_completion(&req->done); |
1365 | 1458 | ||
1366 | iu = __srp_get_tx_iu(target, SRP_REQ_TASK_MGMT); | 1459 | iu = __srp_get_tx_iu(target, SRP_IU_TSK_MGMT); |
1367 | if (!iu) | 1460 | if (!iu) |
1368 | goto out; | 1461 | goto out; |
1369 | 1462 | ||
1463 | ib_dma_sync_single_for_cpu(dev, iu->dma, sizeof *tsk_mgmt, | ||
1464 | DMA_TO_DEVICE); | ||
1370 | tsk_mgmt = iu->buf; | 1465 | tsk_mgmt = iu->buf; |
1371 | memset(tsk_mgmt, 0, sizeof *tsk_mgmt); | 1466 | memset(tsk_mgmt, 0, sizeof *tsk_mgmt); |
1372 | 1467 | ||
@@ -1376,6 +1471,8 @@ static int srp_send_tsk_mgmt(struct srp_target_port *target, | |||
1376 | tsk_mgmt->tsk_mgmt_func = func; | 1471 | tsk_mgmt->tsk_mgmt_func = func; |
1377 | tsk_mgmt->task_tag = req->index; | 1472 | tsk_mgmt->task_tag = req->index; |
1378 | 1473 | ||
1474 | ib_dma_sync_single_for_device(dev, iu->dma, sizeof *tsk_mgmt, | ||
1475 | DMA_TO_DEVICE); | ||
1379 | if (__srp_post_send(target, iu, sizeof *tsk_mgmt)) | 1476 | if (__srp_post_send(target, iu, sizeof *tsk_mgmt)) |
1380 | goto out; | 1477 | goto out; |
1381 | 1478 | ||
@@ -1626,9 +1723,9 @@ static struct scsi_host_template srp_template = { | |||
1626 | .eh_abort_handler = srp_abort, | 1723 | .eh_abort_handler = srp_abort, |
1627 | .eh_device_reset_handler = srp_reset_device, | 1724 | .eh_device_reset_handler = srp_reset_device, |
1628 | .eh_host_reset_handler = srp_reset_host, | 1725 | .eh_host_reset_handler = srp_reset_host, |
1629 | .can_queue = SRP_SQ_SIZE, | 1726 | .can_queue = SRP_CMD_SQ_SIZE, |
1630 | .this_id = -1, | 1727 | .this_id = -1, |
1631 | .cmd_per_lun = SRP_SQ_SIZE, | 1728 | .cmd_per_lun = SRP_CMD_SQ_SIZE, |
1632 | .use_clustering = ENABLE_CLUSTERING, | 1729 | .use_clustering = ENABLE_CLUSTERING, |
1633 | .shost_attrs = srp_host_attrs | 1730 | .shost_attrs = srp_host_attrs |
1634 | }; | 1731 | }; |
@@ -1813,7 +1910,7 @@ static int srp_parse_options(const char *buf, struct srp_target_port *target) | |||
1813 | printk(KERN_WARNING PFX "bad max cmd_per_lun parameter '%s'\n", p); | 1910 | printk(KERN_WARNING PFX "bad max cmd_per_lun parameter '%s'\n", p); |
1814 | goto out; | 1911 | goto out; |
1815 | } | 1912 | } |
1816 | target->scsi_host->cmd_per_lun = min(token, SRP_SQ_SIZE); | 1913 | target->scsi_host->cmd_per_lun = min(token, SRP_CMD_SQ_SIZE); |
1817 | break; | 1914 | break; |
1818 | 1915 | ||
1819 | case SRP_OPT_IO_CLASS: | 1916 | case SRP_OPT_IO_CLASS: |
@@ -1891,7 +1988,7 @@ static ssize_t srp_create_target(struct device *dev, | |||
1891 | 1988 | ||
1892 | INIT_LIST_HEAD(&target->free_reqs); | 1989 | INIT_LIST_HEAD(&target->free_reqs); |
1893 | INIT_LIST_HEAD(&target->req_queue); | 1990 | INIT_LIST_HEAD(&target->req_queue); |
1894 | for (i = 0; i < SRP_SQ_SIZE; ++i) { | 1991 | for (i = 0; i < SRP_CMD_SQ_SIZE; ++i) { |
1895 | target->req_ring[i].index = i; | 1992 | target->req_ring[i].index = i; |
1896 | list_add_tail(&target->req_ring[i].list, &target->free_reqs); | 1993 | list_add_tail(&target->req_ring[i].list, &target->free_reqs); |
1897 | } | 1994 | } |
@@ -2159,6 +2256,9 @@ static int __init srp_init_module(void) | |||
2159 | { | 2256 | { |
2160 | int ret; | 2257 | int ret; |
2161 | 2258 | ||
2259 | BUILD_BUG_ON_NOT_POWER_OF_2(SRP_SQ_SIZE); | ||
2260 | BUILD_BUG_ON_NOT_POWER_OF_2(SRP_RQ_SIZE); | ||
2261 | |||
2162 | if (srp_sg_tablesize > 255) { | 2262 | if (srp_sg_tablesize > 255) { |
2163 | printk(KERN_WARNING PFX "Clamping srp_sg_tablesize to 255\n"); | 2263 | printk(KERN_WARNING PFX "Clamping srp_sg_tablesize to 255\n"); |
2164 | srp_sg_tablesize = 255; | 2264 | srp_sg_tablesize = 255; |
diff --git a/drivers/infiniband/ulp/srp/ib_srp.h b/drivers/infiniband/ulp/srp/ib_srp.h index 5a80eac6fdaa..ed0dce9e479f 100644 --- a/drivers/infiniband/ulp/srp/ib_srp.h +++ b/drivers/infiniband/ulp/srp/ib_srp.h | |||
@@ -59,7 +59,14 @@ enum { | |||
59 | 59 | ||
60 | SRP_RQ_SHIFT = 6, | 60 | SRP_RQ_SHIFT = 6, |
61 | SRP_RQ_SIZE = 1 << SRP_RQ_SHIFT, | 61 | SRP_RQ_SIZE = 1 << SRP_RQ_SHIFT, |
62 | SRP_SQ_SIZE = SRP_RQ_SIZE - 1, | 62 | SRP_RQ_MASK = SRP_RQ_SIZE - 1, |
63 | |||
64 | SRP_SQ_SIZE = SRP_RQ_SIZE, | ||
65 | SRP_SQ_MASK = SRP_SQ_SIZE - 1, | ||
66 | SRP_RSP_SQ_SIZE = 1, | ||
67 | SRP_REQ_SQ_SIZE = SRP_SQ_SIZE - SRP_RSP_SQ_SIZE, | ||
68 | SRP_TSK_MGMT_SQ_SIZE = 1, | ||
69 | SRP_CMD_SQ_SIZE = SRP_REQ_SQ_SIZE - SRP_TSK_MGMT_SQ_SIZE, | ||
63 | 70 | ||
64 | SRP_TAG_TSK_MGMT = 1 << (SRP_RQ_SHIFT + 1), | 71 | SRP_TAG_TSK_MGMT = 1 << (SRP_RQ_SHIFT + 1), |
65 | 72 | ||
@@ -75,9 +82,10 @@ enum srp_target_state { | |||
75 | SRP_TARGET_REMOVED | 82 | SRP_TARGET_REMOVED |
76 | }; | 83 | }; |
77 | 84 | ||
78 | enum srp_request_type { | 85 | enum srp_iu_type { |
79 | SRP_REQ_NORMAL, | 86 | SRP_IU_CMD, |
80 | SRP_REQ_TASK_MGMT, | 87 | SRP_IU_TSK_MGMT, |
88 | SRP_IU_RSP, | ||
81 | }; | 89 | }; |
82 | 90 | ||
83 | struct srp_device { | 91 | struct srp_device { |
@@ -144,11 +152,11 @@ struct srp_target_port { | |||
144 | 152 | ||
145 | unsigned tx_head; | 153 | unsigned tx_head; |
146 | unsigned tx_tail; | 154 | unsigned tx_tail; |
147 | struct srp_iu *tx_ring[SRP_SQ_SIZE + 1]; | 155 | struct srp_iu *tx_ring[SRP_SQ_SIZE]; |
148 | 156 | ||
149 | struct list_head free_reqs; | 157 | struct list_head free_reqs; |
150 | struct list_head req_queue; | 158 | struct list_head req_queue; |
151 | struct srp_request req_ring[SRP_SQ_SIZE]; | 159 | struct srp_request req_ring[SRP_CMD_SQ_SIZE]; |
152 | 160 | ||
153 | struct work_struct work; | 161 | struct work_struct work; |
154 | 162 | ||
@@ -164,6 +172,7 @@ struct srp_iu { | |||
164 | void *buf; | 172 | void *buf; |
165 | size_t size; | 173 | size_t size; |
166 | enum dma_data_direction direction; | 174 | enum dma_data_direction direction; |
175 | enum srp_iu_type type; | ||
167 | }; | 176 | }; |
168 | 177 | ||
169 | #endif /* IB_SRP_H */ | 178 | #endif /* IB_SRP_H */ |
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c index 5102ab1ac561..4f6a8597042a 100644 --- a/drivers/net/mlx4/main.c +++ b/drivers/net/mlx4/main.c | |||
@@ -103,7 +103,7 @@ MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports " | |||
103 | 103 | ||
104 | static int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG); | 104 | static int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG); |
105 | module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444); | 105 | module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444); |
106 | MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-5)"); | 106 | MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)"); |
107 | 107 | ||
108 | int mlx4_check_port_params(struct mlx4_dev *dev, | 108 | int mlx4_check_port_params(struct mlx4_dev *dev, |
109 | enum mlx4_port_type *port_type) | 109 | enum mlx4_port_type *port_type) |
@@ -1304,7 +1304,7 @@ static int __init mlx4_verify_params(void) | |||
1304 | return -1; | 1304 | return -1; |
1305 | } | 1305 | } |
1306 | 1306 | ||
1307 | if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 5)) { | 1307 | if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) { |
1308 | pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg); | 1308 | pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg); |
1309 | return -1; | 1309 | return -1; |
1310 | } | 1310 | } |
diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h index 22bd8d3b84a2..ddbe81261d5d 100644 --- a/include/linux/mlx4/cmd.h +++ b/include/linux/mlx4/cmd.h | |||
@@ -57,6 +57,7 @@ enum { | |||
57 | MLX4_CMD_QUERY_PORT = 0x43, | 57 | MLX4_CMD_QUERY_PORT = 0x43, |
58 | MLX4_CMD_SENSE_PORT = 0x4d, | 58 | MLX4_CMD_SENSE_PORT = 0x4d, |
59 | MLX4_CMD_SET_PORT = 0xc, | 59 | MLX4_CMD_SET_PORT = 0xc, |
60 | MLX4_CMD_SET_NODE = 0x5a, | ||
60 | MLX4_CMD_ACCESS_DDR = 0x2e, | 61 | MLX4_CMD_ACCESS_DDR = 0x2e, |
61 | MLX4_CMD_MAP_ICM = 0xffa, | 62 | MLX4_CMD_MAP_ICM = 0xffa, |
62 | MLX4_CMD_UNMAP_ICM = 0xff9, | 63 | MLX4_CMD_UNMAP_ICM = 0xff9, |
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index ff9893a33e90..897ec71a0ca5 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h | |||
@@ -172,6 +172,10 @@ enum { | |||
172 | MLX4_NUM_FEXCH = 64 * 1024, | 172 | MLX4_NUM_FEXCH = 64 * 1024, |
173 | }; | 173 | }; |
174 | 174 | ||
175 | enum { | ||
176 | MLX4_MAX_FAST_REG_PAGES = 511, | ||
177 | }; | ||
178 | |||
175 | static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) | 179 | static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) |
176 | { | 180 | { |
177 | return (major << 32) | (minor << 16) | subminor; | 181 | return (major << 32) | (minor << 16) | subminor; |
diff --git a/include/scsi/srp.h b/include/scsi/srp.h index ad178fa78f66..1ae84db4c9fb 100644 --- a/include/scsi/srp.h +++ b/include/scsi/srp.h | |||
@@ -239,4 +239,42 @@ struct srp_rsp { | |||
239 | u8 data[0]; | 239 | u8 data[0]; |
240 | } __attribute__((packed)); | 240 | } __attribute__((packed)); |
241 | 241 | ||
242 | struct srp_cred_req { | ||
243 | u8 opcode; | ||
244 | u8 sol_not; | ||
245 | u8 reserved[2]; | ||
246 | __be32 req_lim_delta; | ||
247 | u64 tag; | ||
248 | }; | ||
249 | |||
250 | struct srp_cred_rsp { | ||
251 | u8 opcode; | ||
252 | u8 reserved[7]; | ||
253 | u64 tag; | ||
254 | }; | ||
255 | |||
256 | /* | ||
257 | * The SRP spec defines the fixed portion of the AER_REQ structure to be | ||
258 | * 36 bytes, so it needs to be packed to avoid having it padded to 40 bytes | ||
259 | * on 64-bit architectures. | ||
260 | */ | ||
261 | struct srp_aer_req { | ||
262 | u8 opcode; | ||
263 | u8 sol_not; | ||
264 | u8 reserved[2]; | ||
265 | __be32 req_lim_delta; | ||
266 | u64 tag; | ||
267 | u32 reserved2; | ||
268 | __be64 lun; | ||
269 | __be32 sense_data_len; | ||
270 | u32 reserved3; | ||
271 | u8 sense_data[0]; | ||
272 | } __attribute__((packed)); | ||
273 | |||
274 | struct srp_aer_rsp { | ||
275 | u8 opcode; | ||
276 | u8 reserved[7]; | ||
277 | u64 tag; | ||
278 | }; | ||
279 | |||
242 | #endif /* SCSI_SRP_H */ | 280 | #endif /* SCSI_SRP_H */ |