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-rw-r--r--arch/avr32/boards/atstk1000/atstk1002.c18
-rw-r--r--arch/avr32/boards/atstk1000/atstk1003.c18
-rw-r--r--arch/avr32/boards/favr-32/setup.c18
-rw-r--r--arch/avr32/mach-at32ap/include/mach/at32ap700x.h3
-rw-r--r--arch/avr32/mach-at32ap/include/mach/portmux.h2
-rw-r--r--arch/avr32/mach-at32ap/pio.c19
6 files changed, 20 insertions, 58 deletions
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index 5c5cdf3b464f..11e7800c1632 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -287,23 +287,7 @@ static int __init atstk1002_init(void)
287 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the 287 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
288 * SDRAM-specific pins so that nobody messes with them. 288 * SDRAM-specific pins so that nobody messes with them.
289 */ 289 */
290 at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ 290 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
291 at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
292 at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
293 at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
294 at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
295 at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
296 at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
297 at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
298 at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
299 at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
300 at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
301 at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
302 at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
303 at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
304 at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
305 at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
306 at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
307 291
308#ifdef CONFIG_BOARD_ATSTK1006 292#ifdef CONFIG_BOARD_ATSTK1006
309 smc_set_timing(&nand_config, &nand_timing); 293 smc_set_timing(&nand_config, &nand_timing);
diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
index 134b566630b0..ac31666613a1 100644
--- a/arch/avr32/boards/atstk1000/atstk1003.c
+++ b/arch/avr32/boards/atstk1000/atstk1003.c
@@ -131,23 +131,7 @@ static int __init atstk1003_init(void)
131 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the 131 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
132 * SDRAM-specific pins so that nobody messes with them. 132 * SDRAM-specific pins so that nobody messes with them.
133 */ 133 */
134 at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ 134 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
135 at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
136 at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
137 at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
138 at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
139 at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
140 at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
141 at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
142 at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
143 at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
144 at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
145 at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
146 at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
147 at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
148 at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
149 at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
150 at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
151 135
152#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM 136#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
153 at32_add_device_usart(1); 137 at32_add_device_usart(1);
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c
index ff8235a30ecd..006a04e8bef2 100644
--- a/arch/avr32/boards/favr-32/setup.c
+++ b/arch/avr32/boards/favr-32/setup.c
@@ -307,23 +307,7 @@ static int __init favr32_init(void)
307 * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific 307 * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
308 * pins so that nobody messes with them. 308 * pins so that nobody messes with them.
309 */ 309 */
310 at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ 310 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
311 at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
312 at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
313 at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
314 at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
315 at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
316 at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
317 at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
318 at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
319 at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
320 at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
321 at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
322 at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
323 at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
324 at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
325 at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
326 at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
327 311
328 at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */ 312 at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */
329 313
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
index a77d372f6f3e..5c4c971eed8e 100644
--- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
+++ b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
@@ -211,4 +211,7 @@
211 211
212#define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA) 212#define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)
213 213
214/* Bitmask for all EBI data (D16..D31) pins on port E */
215#define ATMEL_EBI_PE_DATA_ALL (0x0000FFFF)
216
214#endif /* __ASM_ARCH_AT32AP700X_H__ */ 217#endif /* __ASM_ARCH_AT32AP700X_H__ */
diff --git a/arch/avr32/mach-at32ap/include/mach/portmux.h b/arch/avr32/mach-at32ap/include/mach/portmux.h
index 21c79373b53f..4873024e3b96 100644
--- a/arch/avr32/mach-at32ap/include/mach/portmux.h
+++ b/arch/avr32/mach-at32ap/include/mach/portmux.h
@@ -25,6 +25,6 @@ void at32_select_periph(unsigned int port, unsigned int pin,
25 unsigned int periph, unsigned long flags); 25 unsigned int periph, unsigned long flags);
26void at32_select_gpio(unsigned int pin, unsigned long flags); 26void at32_select_gpio(unsigned int pin, unsigned long flags);
27void at32_deselect_pin(unsigned int pin); 27void at32_deselect_pin(unsigned int pin);
28void at32_reserve_pin(unsigned int pin); 28void at32_reserve_pin(unsigned int port, u32 pin_mask);
29 29
30#endif /* __ASM_ARCH_PORTMUX_H__ */ 30#endif /* __ASM_ARCH_PORTMUX_H__ */
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index ed81a8bcb22d..09a274c9d0b7 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -167,22 +167,29 @@ void at32_deselect_pin(unsigned int pin)
167} 167}
168 168
169/* Reserve a pin, preventing anyone else from changing its configuration. */ 169/* Reserve a pin, preventing anyone else from changing its configuration. */
170void __init at32_reserve_pin(unsigned int pin) 170void __init at32_reserve_pin(unsigned int port, u32 pin_mask)
171{ 171{
172 struct pio_device *pio; 172 struct pio_device *pio;
173 unsigned int pin_index = pin & 0x1f;
174 173
175 pio = gpio_to_pio(pin); 174 /* assign and verify pio */
175 pio = gpio_to_pio(port);
176 if (unlikely(!pio)) { 176 if (unlikely(!pio)) {
177 printk("pio: invalid pin %u\n", pin); 177 printk(KERN_WARNING "pio: invalid port %u\n", port);
178 goto fail; 178 goto fail;
179 } 179 }
180 180
181 if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) { 181 /* Test if any of the requested pins is already muxed */
182 printk("%s: pin %u is busy\n", pio->name, pin_index); 182 spin_lock(&pio_lock);
183 if (unlikely(pio->pinmux_mask & pin_mask)) {
184 printk(KERN_WARNING "%s: pin(s) busy (req. 0x%x, busy 0x%x)\n",
185 pio->name, pin_mask, pio->pinmux_mask & pin_mask);
186 spin_unlock(&pio_lock);
183 goto fail; 187 goto fail;
184 } 188 }
185 189
190 /* Reserve pins */
191 pio->pinmux_mask |= pin_mask;
192 spin_unlock(&pio_lock);
186 return; 193 return;
187 194
188fail: 195fail:
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-28 12:10:49 -0500