diff options
-rw-r--r-- | arch/arm/mach-mx5/clock-mx51.c | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index 5c7901180c8e..e6c17d78189c 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c | |||
@@ -914,24 +914,24 @@ DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET, | |||
914 | NULL, NULL, &ipg_clk, NULL); | 914 | NULL, NULL, &ipg_clk, NULL); |
915 | 915 | ||
916 | /* UART */ | 916 | /* UART */ |
917 | DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, | ||
918 | NULL, NULL, &uart_root_clk, NULL); | ||
919 | DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, | ||
920 | NULL, NULL, &uart_root_clk, NULL); | ||
921 | DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, | ||
922 | NULL, NULL, &uart_root_clk, NULL); | ||
923 | DEFINE_CLOCK(uart1_ipg_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG3_OFFSET, | 917 | DEFINE_CLOCK(uart1_ipg_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG3_OFFSET, |
924 | NULL, NULL, &ipg_clk, &aips_tz1_clk); | 918 | NULL, NULL, &ipg_clk, &aips_tz1_clk); |
925 | DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET, | 919 | DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET, |
926 | NULL, NULL, &ipg_clk, &aips_tz1_clk); | 920 | NULL, NULL, &ipg_clk, &aips_tz1_clk); |
927 | DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, | 921 | DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, |
928 | NULL, NULL, &ipg_clk, &spba_clk); | 922 | NULL, NULL, &ipg_clk, &spba_clk); |
923 | DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, | ||
924 | NULL, NULL, &uart_root_clk, &uart1_ipg_clk); | ||
925 | DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, | ||
926 | NULL, NULL, &uart_root_clk, &uart2_ipg_clk); | ||
927 | DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, | ||
928 | NULL, NULL, &uart_root_clk, &uart3_ipg_clk); | ||
929 | 929 | ||
930 | /* GPT */ | 930 | /* GPT */ |
931 | DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET, | ||
932 | NULL, NULL, &ipg_clk, NULL); | ||
933 | DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, | 931 | DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, |
934 | NULL, NULL, &ipg_clk, NULL); | 932 | NULL, NULL, &ipg_clk, NULL); |
933 | DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET, | ||
934 | NULL, NULL, &ipg_clk, &gpt_ipg_clk); | ||
935 | 935 | ||
936 | /* I2C */ | 936 | /* I2C */ |
937 | DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, | 937 | DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, |
@@ -1003,6 +1003,9 @@ static struct clk_lookup lookups[] = { | |||
1003 | _REGISTER_CLOCK("mxc_nand", NULL, nfc_clk) | 1003 | _REGISTER_CLOCK("mxc_nand", NULL, nfc_clk) |
1004 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) | 1004 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) |
1005 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) | 1005 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) |
1006 | _REGISTER_CLOCK(NULL, "ckih", ckih_clk) | ||
1007 | _REGISTER_CLOCK(NULL, "ckih2", ckih2_clk) | ||
1008 | _REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk) | ||
1006 | _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk) | 1009 | _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk) |
1007 | _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) | 1010 | _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) |
1008 | _REGISTER_CLOCK("imx51-cspi.0", NULL, cspi_clk) | 1011 | _REGISTER_CLOCK("imx51-cspi.0", NULL, cspi_clk) |