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-rw-r--r--arch/x86/kernel/cpu/intel.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 8ea6929e974c..43c1dcf0bec7 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -29,6 +29,16 @@
29 29
30static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) 30static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
31{ 31{
32 u64 misc_enable;
33
34 /* Unmask CPUID levels if masked */
35 if (!rdmsrl_safe(MSR_IA32_MISC_ENABLE, &misc_enable) &&
36 (misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID)) {
37 misc_enable &= ~MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
38 wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
39 c->cpuid_level = cpuid_eax(0);
40 }
41
32 if ((c->x86 == 0xf && c->x86_model >= 0x03) || 42 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
33 (c->x86 == 0x6 && c->x86_model >= 0x0e)) 43 (c->x86 == 0x6 && c->x86_model >= 0x0e))
34 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); 44 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);