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-rw-r--r--arch/mips/Kconfig2
-rw-r--r--arch/mips/include/asm/amon.h7
-rw-r--r--arch/mips/include/asm/gic.h2
-rw-r--r--arch/mips/kernel/smp-cmp.c66
-rw-r--r--arch/mips/mti-malta/malta-int.c10
5 files changed, 25 insertions, 62 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 64891f74019f..4368a723e2d0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -229,7 +229,7 @@ config MIPS_MALTA
229 select SYS_SUPPORTS_64BIT_KERNEL 229 select SYS_SUPPORTS_64BIT_KERNEL
230 select SYS_SUPPORTS_BIG_ENDIAN 230 select SYS_SUPPORTS_BIG_ENDIAN
231 select SYS_SUPPORTS_LITTLE_ENDIAN 231 select SYS_SUPPORTS_LITTLE_ENDIAN
232 select SYS_SUPPORTS_MIPS_CMP if BROKEN # because SYNC_R4K is broken 232 select SYS_SUPPORTS_MIPS_CMP
233 select SYS_SUPPORTS_MULTITHREADING 233 select SYS_SUPPORTS_MULTITHREADING
234 select SYS_SUPPORTS_SMARTMIPS 234 select SYS_SUPPORTS_SMARTMIPS
235 help 235 help
diff --git a/arch/mips/include/asm/amon.h b/arch/mips/include/asm/amon.h
new file mode 100644
index 000000000000..c3dc1a68dd8d
--- /dev/null
+++ b/arch/mips/include/asm/amon.h
@@ -0,0 +1,7 @@
1/*
2 * Amon support
3 */
4
5int amon_cpu_avail(int);
6void amon_cpu_start(int, unsigned long, unsigned long,
7 unsigned long, unsigned long);
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index e8fdd92c52c7..10292e37c1f7 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -487,5 +487,7 @@ extern void gic_init(unsigned long gic_base_addr,
487 487
488extern unsigned int gic_get_int(void); 488extern unsigned int gic_get_int(void);
489extern void gic_send_ipi(unsigned int intr); 489extern void gic_send_ipi(unsigned int intr);
490extern unsigned int plat_ipi_call_int_xlate(unsigned int);
491extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
490 492
491#endif /* _ASM_GICREGS_H */ 493#endif /* _ASM_GICREGS_H */
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index 653be061b9ec..ad0ff5dc4d59 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -37,80 +37,24 @@
37#include <asm/mipsregs.h> 37#include <asm/mipsregs.h>
38#include <asm/mipsmtregs.h> 38#include <asm/mipsmtregs.h>
39#include <asm/mips_mt.h> 39#include <asm/mips_mt.h>
40 40#include <asm/amon.h>
41/* 41#include <asm/gic.h>
42 * Crude manipulation of the CPU masks to control which
43 * which CPU's are brought online during initialisation
44 *
45 * Beware... this needs to be called after CPU discovery
46 * but before CPU bringup
47 */
48static int __init allowcpus(char *str)
49{
50 cpumask_t cpu_allow_map;
51 char buf[256];
52 int len;
53
54 cpus_clear(cpu_allow_map);
55 if (cpulist_parse(str, &cpu_allow_map) == 0) {
56 cpu_set(0, cpu_allow_map);
57 cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map);
58 len = cpulist_scnprintf(buf, sizeof(buf)-1, &cpu_possible_map);
59 buf[len] = '\0';
60 pr_debug("Allowable CPUs: %s\n", buf);
61 return 1;
62 } else
63 return 0;
64}
65__setup("allowcpus=", allowcpus);
66 42
67static void ipi_call_function(unsigned int cpu) 43static void ipi_call_function(unsigned int cpu)
68{ 44{
69 unsigned int action = 0;
70
71 pr_debug("CPU%d: %s cpu %d status %08x\n", 45 pr_debug("CPU%d: %s cpu %d status %08x\n",
72 smp_processor_id(), __func__, cpu, read_c0_status()); 46 smp_processor_id(), __func__, cpu, read_c0_status());
73 47
74 switch (cpu) { 48 gic_send_ipi(plat_ipi_call_int_xlate(cpu));
75 case 0:
76 action = GIC_IPI_EXT_INTR_CALLFNC_VPE0;
77 break;
78 case 1:
79 action = GIC_IPI_EXT_INTR_CALLFNC_VPE1;
80 break;
81 case 2:
82 action = GIC_IPI_EXT_INTR_CALLFNC_VPE2;
83 break;
84 case 3:
85 action = GIC_IPI_EXT_INTR_CALLFNC_VPE3;
86 break;
87 }
88 gic_send_ipi(action);
89} 49}
90 50
91 51
92static void ipi_resched(unsigned int cpu) 52static void ipi_resched(unsigned int cpu)
93{ 53{
94 unsigned int action = 0;
95
96 pr_debug("CPU%d: %s cpu %d status %08x\n", 54 pr_debug("CPU%d: %s cpu %d status %08x\n",
97 smp_processor_id(), __func__, cpu, read_c0_status()); 55 smp_processor_id(), __func__, cpu, read_c0_status());
98 56
99 switch (cpu) { 57 gic_send_ipi(plat_ipi_resched_int_xlate(cpu));
100 case 0:
101 action = GIC_IPI_EXT_INTR_RESCHED_VPE0;
102 break;
103 case 1:
104 action = GIC_IPI_EXT_INTR_RESCHED_VPE1;
105 break;
106 case 2:
107 action = GIC_IPI_EXT_INTR_RESCHED_VPE2;
108 break;
109 case 3:
110 action = GIC_IPI_EXT_INTR_RESCHED_VPE3;
111 break;
112 }
113 gic_send_ipi(action);
114} 58}
115 59
116/* 60/*
@@ -206,7 +150,7 @@ static void cmp_boot_secondary(int cpu, struct task_struct *idle)
206 (unsigned long)(gp + sizeof(struct thread_info))); 150 (unsigned long)(gp + sizeof(struct thread_info)));
207#endif 151#endif
208 152
209 amon_cpu_start(cpu, pc, sp, gp, a0); 153 amon_cpu_start(cpu, pc, sp, (unsigned long)gp, a0);
210} 154}
211 155
212/* 156/*
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index 4e14972dcfc4..bc0ba58acfd5 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -336,6 +336,16 @@ static int gic_resched_int_base;
336static int gic_call_int_base; 336static int gic_call_int_base;
337#define GIC_RESCHED_INT(cpu) (gic_resched_int_base+(cpu)) 337#define GIC_RESCHED_INT(cpu) (gic_resched_int_base+(cpu))
338#define GIC_CALL_INT(cpu) (gic_call_int_base+(cpu)) 338#define GIC_CALL_INT(cpu) (gic_call_int_base+(cpu))
339
340unsigned int plat_ipi_call_int_xlate(unsigned int cpu)
341{
342 return GIC_CALL_INT(cpu);
343}
344
345unsigned int plat_ipi_resched_int_xlate(unsigned int cpu)
346{
347 return GIC_RESCHED_INT(cpu);
348}
339#endif /* CONFIG_MIPS_MT_SMP */ 349#endif /* CONFIG_MIPS_MT_SMP */
340 350
341static struct irqaction i8259irq = { 351static struct irqaction i8259irq = {