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-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S38
1 files changed, 34 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index 101ed79deec4..fe3c9ad59450 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -19,6 +19,8 @@
19#include <plat/omap34xx.h> 19#include <plat/omap34xx.h>
20#include <plat/omap44xx.h> 20#include <plat/omap44xx.h>
21 21
22#include <plat/multi.h>
23
22#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) 24#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
23#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) 25#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
24#define OMAP4_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) 26#define OMAP4_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
@@ -31,13 +33,15 @@
31 .macro arch_ret_to_user, tmp1, tmp2 33 .macro arch_ret_to_user, tmp1, tmp2
32 .endm 34 .endm
33 35
34#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 36/*
37 * Unoptimized irq functions for multi-omap2, 3 and 4
38 */
35 39
40#ifdef MULTI_OMAP2
36 .pushsection .data 41 .pushsection .data
37omap_irq_base: .word 0 42omap_irq_base: .word 0
38 .popsection 43 .popsection
39 44
40#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_ARCH_OMAP3)
41 /* Configure the interrupt base on the first interrupt */ 45 /* Configure the interrupt base on the first interrupt */
42 .macro get_irqnr_preamble, base, tmp 46 .macro get_irqnr_preamble, base, tmp
439: 479:
@@ -62,7 +66,32 @@ omap_irq_base: .word 0
62 b 9b 66 b 9b
639998: 679998:
64 .endm 68 .endm
65#else 69
70 /* Check the pending interrupts. Note that base already set */
71 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
72 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
73 cmp \irqnr, #0x0
74 bne 9999f
75 ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
76 cmp \irqnr, #0x0
77 bne 9999f
78 ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
79 cmp \irqnr, #0x0
809999:
81 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
82 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
83
84 .endm
85
86
87#else /* MULTI_OMAP2 */
88
89
90/*
91 * Optimized irq functions for omap2, 3 and 4
92 */
93
94#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
66 .macro get_irqnr_preamble, base, tmp 95 .macro get_irqnr_preamble, base, tmp
67#ifdef CONFIG_ARCH_OMAP2 96#ifdef CONFIG_ARCH_OMAP2
68 ldr \base, =OMAP2_IRQ_BASE 97 ldr \base, =OMAP2_IRQ_BASE
@@ -70,7 +99,7 @@ omap_irq_base: .word 0
70 ldr \base, =OMAP3_IRQ_BASE 99 ldr \base, =OMAP3_IRQ_BASE
71#endif 100#endif
72 .endm 101 .endm
73#endif 102
74 /* Check the pending interrupts. Note that base already set */ 103 /* Check the pending interrupts. Note that base already set */
75 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 104 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
76 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ 105 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
@@ -155,6 +184,7 @@ omap_irq_base: .word 0
155 cmp \tmp, #0 184 cmp \tmp, #0
156 .endm 185 .endm
157#endif 186#endif
187#endif /* MULTI_OMAP2 */
158 188
159 .macro irq_prio_table 189 .macro irq_prio_table
160 .endm 190 .endm