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-rw-r--r--arch/arm/Kconfig52
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/compressed/Makefile4
-rw-r--r--arch/arm/boot/compressed/head-clps7500.S86
-rw-r--r--arch/arm/boot/compressed/head.S20
-rw-r--r--arch/arm/boot/compressed/misc.c2
-rw-r--r--arch/arm/common/Kconfig3
-rw-r--r--arch/arm/common/Makefile1
-rw-r--r--arch/arm/common/clkdev.c128
-rw-r--r--arch/arm/common/locomo.c1
-rw-r--r--arch/arm/configs/h5000_defconfig996
-rw-r--r--arch/arm/configs/neocore926_defconfig1302
-rw-r--r--arch/arm/configs/realview-smp_defconfig718
-rw-r--r--arch/arm/configs/realview_defconfig763
-rw-r--r--arch/arm/include/asm/cacheflush.h37
-rw-r--r--arch/arm/include/asm/clkdev.h30
-rw-r--r--arch/arm/include/asm/dma-mapping.h4
-rw-r--r--arch/arm/include/asm/dma.h24
-rw-r--r--arch/arm/include/asm/hardware/iomd.h41
-rw-r--r--arch/arm/include/asm/hwcap.h1
-rw-r--r--arch/arm/include/asm/io.h8
-rw-r--r--arch/arm/include/asm/irq.h4
-rw-r--r--arch/arm/include/asm/memory.h7
-rw-r--r--arch/arm/include/asm/mmu_context.h1
-rw-r--r--arch/arm/include/asm/page.h32
-rw-r--r--arch/arm/include/asm/processor.h2
-rw-r--r--arch/arm/include/asm/setup.h6
-rw-r--r--arch/arm/include/asm/smp.h6
-rw-r--r--arch/arm/include/asm/string.h9
-rw-r--r--arch/arm/include/asm/system.h2
-rw-r--r--arch/arm/include/asm/uaccess.h5
-rw-r--r--arch/arm/kernel/armksyms.c1
-rw-r--r--arch/arm/kernel/head-common.S2
-rw-r--r--arch/arm/kernel/module.c4
-rw-r--r--arch/arm/kernel/setup.c57
-rw-r--r--arch/arm/kernel/smp.c4
-rw-r--r--arch/arm/kernel/thumbee.c2
-rw-r--r--arch/arm/kernel/vmlinux.lds.S2
-rw-r--r--arch/arm/lib/Makefile1
-rw-r--r--arch/arm/lib/memset.S2
-rw-r--r--arch/arm/mach-aaec2000/Makefile2
-rw-r--r--arch/arm/mach-aaec2000/clock.c99
-rw-r--r--arch/arm/mach-aaec2000/clock.h23
-rw-r--r--arch/arm/mach-aaec2000/core.c29
-rw-r--r--arch/arm/mach-aaec2000/include/mach/dma.h9
-rw-r--r--arch/arm/mach-aaec2000/include/mach/io.h6
-rw-r--r--arch/arm/mach-aaec2000/include/mach/memory.h3
-rw-r--r--arch/arm/mach-at91/Kconfig15
-rw-r--r--arch/arm/mach-at91/Makefile13
-rw-r--r--arch/arm/mach-at91/at91cap9.c8
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c36
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c38
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c17
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c17
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c11
-rw-r--r--arch/arm/mach-at91/board-cam60.c30
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c77
-rw-r--r--arch/arm/mach-at91/board-neocore926.c397
-rw-r--r--arch/arm/mach-at91/board-qil-a9260.c35
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c35
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c37
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c80
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c36
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c36
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c32
-rw-r--r--arch/arm/mach-at91/board-usb-a9260.c35
-rw-r--r--arch/arm/mach-at91/board-usb-a9263.c36
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h7
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9.h4
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h15
-rw-r--r--arch/arm/mach-at91/include/mach/dma.h19
-rw-r--r--arch/arm/mach-at91/include/mach/io.h4
-rw-r--r--arch/arm/mach-at91/include/mach/memory.h11
-rw-r--r--arch/arm/mach-at91/sam9_smc.c47
-rw-r--r--arch/arm/mach-at91/sam9_smc.h33
-rw-r--r--arch/arm/mach-clps711x/include/mach/dma.h19
-rw-r--r--arch/arm/mach-clps711x/include/mach/io.h6
-rw-r--r--arch/arm/mach-clps711x/include/mach/memory.h20
-rw-r--r--arch/arm/mach-clps7500/Makefile11
-rw-r--r--arch/arm/mach-clps7500/Makefile.boot2
-rw-r--r--arch/arm/mach-clps7500/core.c395
-rw-r--r--arch/arm/mach-clps7500/include/mach/acornfb.h33
-rw-r--r--arch/arm/mach-clps7500/include/mach/debug-macro.S21
-rw-r--r--arch/arm/mach-clps7500/include/mach/dma.h21
-rw-r--r--arch/arm/mach-clps7500/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-clps7500/include/mach/hardware.h67
-rw-r--r--arch/arm/mach-clps7500/include/mach/io.h255
-rw-r--r--arch/arm/mach-clps7500/include/mach/irq.h32
-rw-r--r--arch/arm/mach-clps7500/include/mach/irqs.h66
-rw-r--r--arch/arm/mach-clps7500/include/mach/memory.h43
-rw-r--r--arch/arm/mach-clps7500/include/mach/system.h23
-rw-r--r--arch/arm/mach-clps7500/include/mach/timex.h13
-rw-r--r--arch/arm/mach-clps7500/include/mach/uncompress.h35
-rw-r--r--arch/arm/mach-clps7500/include/mach/vmalloc.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/dma.h16
-rw-r--r--arch/arm/mach-davinci/include/mach/io.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/memory.h7
-rw-r--r--arch/arm/mach-davinci/include/mach/vmalloc.h1
-rw-r--r--arch/arm/mach-ebsa110/include/mach/dma.h11
-rw-r--r--arch/arm/mach-ebsa110/include/mach/memory.h7
-rw-r--r--arch/arm/mach-ep93xx/Kconfig6
-rw-r--r--arch/arm/mach-ep93xx/Makefile1
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c7
-rw-r--r--arch/arm/mach-ep93xx/clock.c68
-rw-r--r--arch/arm/mach-ep93xx/core.c40
-rw-r--r--arch/arm/mach-ep93xx/edb9302.c7
-rw-r--r--arch/arm/mach-ep93xx/edb9302a.c9
-rw-r--r--arch/arm/mach-ep93xx/edb9307.c9
-rw-r--r--arch/arm/mach-ep93xx/edb9307a.c68
-rw-r--r--arch/arm/mach-ep93xx/edb9312.c9
-rw-r--r--arch/arm/mach-ep93xx/edb9315.c9
-rw-r--r--arch/arm/mach-ep93xx/edb9315a.c9
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c7
-rw-r--r--arch/arm/mach-ep93xx/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-ep93xx/include/mach/dma.h3
-rw-r--r--arch/arm/mach-ep93xx/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-ep93xx/include/mach/io.h4
-rw-r--r--arch/arm/mach-ep93xx/include/mach/memory.h4
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h1
-rw-r--r--arch/arm/mach-ep93xx/micro9.c89
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c21
-rw-r--r--arch/arm/mach-footbridge/cats-hw.c1
-rw-r--r--arch/arm/mach-footbridge/common.c1
-rw-r--r--arch/arm/mach-footbridge/dc21285-timer.c1
-rw-r--r--arch/arm/mach-footbridge/dc21285.c1
-rw-r--r--arch/arm/mach-footbridge/dma.c1
-rw-r--r--arch/arm/mach-footbridge/ebsa285.c1
-rw-r--r--arch/arm/mach-footbridge/include/mach/hardware.h14
-rw-r--r--arch/arm/mach-footbridge/include/mach/io.h3
-rw-r--r--arch/arm/mach-footbridge/include/mach/isa-dma.h (renamed from arch/arm/mach-footbridge/include/mach/dma.h)2
-rw-r--r--arch/arm/mach-footbridge/include/mach/memory.h9
-rw-r--r--arch/arm/mach-footbridge/isa-irq.c1
-rw-r--r--arch/arm/mach-footbridge/netwinder-hw.c54
-rw-r--r--arch/arm/mach-footbridge/netwinder-leds.c7
-rw-r--r--arch/arm/mach-footbridge/personal.c1
-rw-r--r--arch/arm/mach-h720x/include/mach/io.h4
-rw-r--r--arch/arm/mach-h720x/include/mach/isa-dma.h (renamed from arch/arm/mach-h720x/include/mach/dma.h)9
-rw-r--r--arch/arm/mach-h720x/include/mach/memory.h20
-rw-r--r--arch/arm/mach-imx/dma.c7
-rw-r--r--arch/arm/mach-imx/include/mach/imx-dma.h12
-rw-r--r--arch/arm/mach-imx/include/mach/io.h4
-rw-r--r--arch/arm/mach-imx/include/mach/memory.h10
-rw-r--r--arch/arm/mach-integrator/clock.c80
-rw-r--r--arch/arm/mach-integrator/clock.h25
-rw-r--r--arch/arm/mach-integrator/core.c35
-rw-r--r--arch/arm/mach-integrator/impd1.c26
-rw-r--r--arch/arm/mach-integrator/include/mach/clkdev.h25
-rw-r--r--arch/arm/mach-integrator/include/mach/dma.h19
-rw-r--r--arch/arm/mach-integrator/include/mach/memory.h13
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c18
-rw-r--r--arch/arm/mach-iop13xx/include/mach/dma.h3
-rw-r--r--arch/arm/mach-iop13xx/include/mach/memory.h16
-rw-r--r--arch/arm/mach-iop13xx/include/mach/timex.h2
-rw-r--r--arch/arm/mach-iop32x/include/mach/dma.h9
-rw-r--r--arch/arm/mach-iop32x/include/mach/io.h2
-rw-r--r--arch/arm/mach-iop32x/include/mach/memory.h13
-rw-r--r--arch/arm/mach-iop32x/include/mach/system.h3
-rw-r--r--arch/arm/mach-iop32x/include/mach/timex.h3
-rw-r--r--arch/arm/mach-iop33x/include/mach/dma.h9
-rw-r--r--arch/arm/mach-iop33x/include/mach/io.h2
-rw-r--r--arch/arm/mach-iop33x/include/mach/memory.h13
-rw-r--r--arch/arm/mach-iop33x/include/mach/system.h1
-rw-r--r--arch/arm/mach-iop33x/include/mach/timex.h3
-rw-r--r--arch/arm/mach-ixp2000/include/mach/dma.h9
-rw-r--r--arch/arm/mach-ixp2000/include/mach/memory.h7
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/dma.h3
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/io.h2
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/memory.h13
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/dma.h21
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/io.h4
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/memory.h13
-rw-r--r--arch/arm/mach-kirkwood/include/mach/dma.h1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/memory.h4
-rw-r--r--arch/arm/mach-ks8695/include/mach/dma.h17
-rw-r--r--arch/arm/mach-ks8695/include/mach/io.h4
-rw-r--r--arch/arm/mach-ks8695/include/mach/memory.h5
-rw-r--r--arch/arm/mach-l7200/include/mach/dma.h23
-rw-r--r--arch/arm/mach-l7200/include/mach/io.h10
-rw-r--r--arch/arm/mach-l7200/include/mach/memory.h3
-rw-r--r--arch/arm/mach-lh7a40x/clocks.c92
-rw-r--r--arch/arm/mach-lh7a40x/include/mach/io.h6
-rw-r--r--arch/arm/mach-lh7a40x/include/mach/memory.h10
-rw-r--r--arch/arm/mach-loki/include/mach/dma.h1
-rw-r--r--arch/arm/mach-loki/include/mach/memory.h4
-rw-r--r--arch/arm/mach-msm/include/mach/io.h6
-rw-r--r--arch/arm/mach-msm/include/mach/memory.h4
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/dma.h1
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/memory.h4
-rw-r--r--arch/arm/mach-netx/fb.c7
-rw-r--r--arch/arm/mach-netx/include/mach/dma.h21
-rw-r--r--arch/arm/mach-netx/include/mach/io.h2
-rw-r--r--arch/arm/mach-netx/include/mach/memory.h10
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/dma.h14
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/io.h2
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/memory.h3
-rw-r--r--arch/arm/mach-omap1/Kconfig3
-rw-r--r--arch/arm/mach-orion5x/include/mach/dma.h1
-rw-r--r--arch/arm/mach-orion5x/include/mach/io.h7
-rw-r--r--arch/arm/mach-orion5x/include/mach/memory.h4
-rw-r--r--arch/arm/mach-pnx4008/dma.c3
-rw-r--r--arch/arm/mach-pnx4008/include/mach/dma.h2
-rw-r--r--arch/arm/mach-pnx4008/include/mach/io.h4
-rw-r--r--arch/arm/mach-pnx4008/include/mach/memory.h5
-rw-r--r--arch/arm/mach-pxa/Kconfig17
-rw-r--r--arch/arm/mach-pxa/Makefile1
-rw-r--r--arch/arm/mach-pxa/am200epd.c15
-rw-r--r--arch/arm/mach-pxa/clock.c67
-rw-r--r--arch/arm/mach-pxa/clock.h59
-rw-r--r--arch/arm/mach-pxa/cm-x300.c5
-rw-r--r--arch/arm/mach-pxa/corgi.c32
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa2xx.c57
-rw-r--r--arch/arm/mach-pxa/devices.c95
-rw-r--r--arch/arm/mach-pxa/devices.h1
-rw-r--r--arch/arm/mach-pxa/dma.c2
-rw-r--r--arch/arm/mach-pxa/ezx.c5
-rw-r--r--arch/arm/mach-pxa/gpio.c59
-rw-r--r--arch/arm/mach-pxa/gumstix.c7
-rw-r--r--arch/arm/mach-pxa/h5000.c200
-rw-r--r--arch/arm/mach-pxa/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-pxa/include/mach/dma.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/h5000.h113
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h50
-rw-r--r--arch/arm/mach-pxa/include/mach/io.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/memory.h11
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa25x.h31
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa27x.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/mioa701.h9
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa-regs.h507
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h5
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx-regs.h12
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-ac97.h99
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-uart.h143
-rw-r--r--arch/arm/mach-pxa/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-pxa/littleton.c2
-rw-r--r--arch/arm/mach-pxa/magician.c4
-rw-r--r--arch/arm/mach-pxa/mainstone.c4
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c62
-rw-r--r--arch/arm/mach-pxa/mioa701.c203
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c4
-rw-r--r--arch/arm/mach-pxa/poodle.c32
-rw-r--r--arch/arm/mach-pxa/pwm.c2
-rw-r--r--arch/arm/mach-pxa/pxa25x.c89
-rw-r--r--arch/arm/mach-pxa/pxa27x.c115
-rw-r--r--arch/arm/mach-pxa/pxa300.c18
-rw-r--r--arch/arm/mach-pxa/pxa320.c8
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c111
-rw-r--r--arch/arm/mach-pxa/smemc.c2
-rw-r--r--arch/arm/mach-pxa/spitz.c36
-rw-r--r--arch/arm/mach-pxa/ssp.c2
-rw-r--r--arch/arm/mach-pxa/time.c1
-rw-r--r--arch/arm/mach-pxa/tosa.c74
-rw-r--r--arch/arm/mach-pxa/zylonite.c2
-rw-r--r--arch/arm/mach-pxa/zylonite_pxa320.c2
-rw-r--r--arch/arm/mach-realview/Kconfig30
-rw-r--r--arch/arm/mach-realview/Makefile1
-rw-r--r--arch/arm/mach-realview/Makefile.boot7
-rw-r--r--arch/arm/mach-realview/clock.c80
-rw-r--r--arch/arm/mach-realview/clock.h6
-rw-r--r--arch/arm/mach-realview/core.c141
-rw-r--r--arch/arm/mach-realview/core.h5
-rw-r--r--arch/arm/mach-realview/hotplug.c5
-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h18
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb11mp.h3
-rw-r--r--arch/arm/mach-realview/include/mach/board-pba8.h152
-rw-r--r--arch/arm/mach-realview/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-realview/include/mach/debug-macro.S29
-rw-r--r--arch/arm/mach-realview/include/mach/dma.h20
-rw-r--r--arch/arm/mach-realview/include/mach/hardware.h9
-rw-r--r--arch/arm/mach-realview/include/mach/io.h9
-rw-r--r--arch/arm/mach-realview/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-realview/include/mach/memory.h14
-rw-r--r--arch/arm/mach-realview/include/mach/uncompress.h3
-rw-r--r--arch/arm/mach-realview/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-realview/localtimer.c44
-rw-r--r--arch/arm/mach-realview/platsmp.c37
-rw-r--r--arch/arm/mach-realview/realview_eb.c33
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c13
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c16
-rw-r--r--arch/arm/mach-realview/realview_pba8.c300
-rw-r--r--arch/arm/mach-rpc/include/mach/io.h47
-rw-r--r--arch/arm/mach-rpc/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-rpc/include/mach/isa-dma.h (renamed from arch/arm/mach-rpc/include/mach/dma.h)8
-rw-r--r--arch/arm/mach-rpc/include/mach/memory.h7
-rw-r--r--arch/arm/mach-s3c2400/include/mach/memory.h3
-rw-r--r--arch/arm/mach-s3c2410/Kconfig1
-rw-r--r--arch/arm/mach-s3c2410/dma.c5
-rw-r--r--arch/arm/mach-s3c2410/include/mach/dma.h23
-rw-r--r--arch/arm/mach-s3c2410/include/mach/memory.h3
-rw-r--r--arch/arm/mach-s3c2410/include/mach/system-reset.h2
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c4
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-n30.c4
-rw-r--r--arch/arm/mach-s3c2410/mach-qt2410.c4
-rw-r--r--arch/arm/mach-s3c2412/Kconfig1
-rw-r--r--arch/arm/mach-s3c2412/dma.c5
-rw-r--r--arch/arm/mach-s3c2412/mach-jive.c6
-rw-r--r--arch/arm/mach-s3c2412/mach-smdk2413.c2
-rw-r--r--arch/arm/mach-s3c2412/mach-vstms.c2
-rw-r--r--arch/arm/mach-s3c2412/s3c2412.c2
-rw-r--r--arch/arm/mach-s3c2440/Kconfig1
-rw-r--r--arch/arm/mach-s3c2440/dma.c5
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-at2440evb.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c2
-rw-r--r--arch/arm/mach-s3c2442/Kconfig1
-rw-r--r--arch/arm/mach-s3c2443/dma.c5
-rw-r--r--arch/arm/mach-sa1100/clock.c100
-rw-r--r--arch/arm/mach-sa1100/collie.c29
-rw-r--r--arch/arm/mach-sa1100/collie_pm.c22
-rw-r--r--arch/arm/mach-sa1100/cpu-sa1100.c20
-rw-r--r--arch/arm/mach-sa1100/cpu-sa1110.c18
-rw-r--r--arch/arm/mach-sa1100/dma.c10
-rw-r--r--arch/arm/mach-sa1100/include/mach/h3600.h12
-rw-r--r--arch/arm/mach-sa1100/include/mach/io.h8
-rw-r--r--arch/arm/mach-sa1100/include/mach/memory.h13
-rw-r--r--arch/arm/mach-sa1100/pleb.c10
-rw-r--r--arch/arm/mach-sa1100/shannon.c2
-rw-r--r--arch/arm/mach-sa1100/sleep.S52
-rw-r--r--arch/arm/mach-sa1100/time.c4
-rw-r--r--arch/arm/mach-shark/core.c2
-rw-r--r--arch/arm/mach-shark/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-shark/include/mach/io.h44
-rw-r--r--arch/arm/mach-shark/include/mach/isa-dma.h (renamed from arch/arm/mach-shark/include/mach/dma.h)3
-rw-r--r--arch/arm/mach-shark/include/mach/memory.h4
-rw-r--r--arch/arm/mach-versatile/Kconfig2
-rw-r--r--arch/arm/mach-versatile/clock.c80
-rw-r--r--arch/arm/mach-versatile/clock.h7
-rw-r--r--arch/arm/mach-versatile/core.c56
-rw-r--r--arch/arm/mach-versatile/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-versatile/include/mach/dma.h20
-rw-r--r--arch/arm/mach-versatile/include/mach/io.h8
-rw-r--r--arch/arm/mach-versatile/include/mach/irqs.h86
-rw-r--r--arch/arm/mach-versatile/include/mach/memory.h10
-rw-r--r--arch/arm/mach-versatile/include/mach/platform.h58
-rw-r--r--arch/arm/mach-w90x900/Kconfig19
-rw-r--r--arch/arm/mach-w90x900/Makefile15
-rw-r--r--arch/arm/mach-w90x900/Makefile.boot3
-rw-r--r--arch/arm/mach-w90x900/cpu.h77
-rw-r--r--arch/arm/mach-w90x900/include/mach/entry-macro.S34
-rw-r--r--arch/arm/mach-w90x900/include/mach/hardware.h24
-rw-r--r--arch/arm/mach-w90x900/include/mach/io.h30
-rw-r--r--arch/arm/mach-w90x900/include/mach/irqs.h45
-rw-r--r--arch/arm/mach-w90x900/include/mach/map.h76
-rw-r--r--arch/arm/mach-w90x900/include/mach/memory.h23
-rw-r--r--arch/arm/mach-w90x900/include/mach/regs-irq.h51
-rw-r--r--arch/arm/mach-w90x900/include/mach/regs-serial.h59
-rw-r--r--arch/arm/mach-w90x900/include/mach/regs-timer.h42
-rw-r--r--arch/arm/mach-w90x900/include/mach/system.h28
-rw-r--r--arch/arm/mach-w90x900/include/mach/timex.h25
-rw-r--r--arch/arm/mach-w90x900/include/mach/uncompress.h40
-rw-r--r--arch/arm/mach-w90x900/include/mach/vmalloc.h23
-rw-r--r--arch/arm/mach-w90x900/irq.c76
-rw-r--r--arch/arm/mach-w90x900/mach-w90p910evb.c72
-rw-r--r--arch/arm/mach-w90x900/time.c80
-rw-r--r--arch/arm/mach-w90x900/w90p910.c134
-rw-r--r--arch/arm/mm/Kconfig67
-rw-r--r--arch/arm/mm/alignment.c1
-rw-r--r--arch/arm/mm/cache-v3.S1
-rw-r--r--arch/arm/mm/cache-v4.S1
-rw-r--r--arch/arm/mm/cache-v4wt.S1
-rw-r--r--arch/arm/mm/cache-v7.S2
-rw-r--r--arch/arm/mm/copypage-feroceon.S95
-rw-r--r--arch/arm/mm/copypage-feroceon.c111
-rw-r--r--arch/arm/mm/copypage-v3.S67
-rw-r--r--arch/arm/mm/copypage-v3.c81
-rw-r--r--arch/arm/mm/copypage-v4mc.c53
-rw-r--r--arch/arm/mm/copypage-v4wb.S79
-rw-r--r--arch/arm/mm/copypage-v4wb.c94
-rw-r--r--arch/arm/mm/copypage-v4wt.S73
-rw-r--r--arch/arm/mm/copypage-v4wt.c88
-rw-r--r--arch/arm/mm/copypage-v6.c84
-rw-r--r--arch/arm/mm/copypage-xsc3.S97
-rw-r--r--arch/arm/mm/copypage-xsc3.c113
-rw-r--r--arch/arm/mm/copypage-xscale.c47
-rw-r--r--arch/arm/mm/fault.c6
-rw-r--r--arch/arm/mm/init.c60
-rw-r--r--arch/arm/mm/mm.h4
-rw-r--r--arch/arm/mm/mmu.c125
-rw-r--r--arch/arm/mm/nommu.c23
-rw-r--r--arch/arm/mm/pgd.c2
-rw-r--r--arch/arm/mm/proc-syms.c4
-rw-r--r--arch/arm/mm/proc-v6.S2
-rw-r--r--arch/arm/mm/proc-v7.S19
-rw-r--r--arch/arm/mm/proc-xsc3.S25
-rw-r--r--arch/arm/plat-mxc/Kconfig2
-rw-r--r--arch/arm/plat-mxc/dma-mx1-mx2.c2
-rw-r--r--arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/dma.h14
-rw-r--r--arch/arm/plat-mxc/include/mach/io.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/memory.h13
-rw-r--r--arch/arm/plat-omap/Kconfig2
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-omap/include/mach/io.h6
-rw-r--r--arch/arm/plat-omap/include/mach/memory.h17
-rw-r--r--arch/arm/plat-s3c/include/plat/iic.h (renamed from include/asm-arm/plat-s3c/iic.h)0
-rw-r--r--arch/arm/plat-s3c/include/plat/nand.h (renamed from include/asm-arm/plat-s3c/nand.h)0
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-ac97.h (renamed from include/asm-arm/plat-s3c/regs-ac97.h)0
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-iic.h (renamed from include/asm-arm/plat-s3c/regs-iic.h)0
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-nand.h (renamed from include/asm-arm/plat-s3c/regs-nand.h)0
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-rtc.h (renamed from include/asm-arm/plat-s3c/regs-rtc.h)0
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-watchdog.h (renamed from include/asm-arm/plat-s3c/regs-watchdog.h)0
-rw-r--r--arch/arm/plat-s3c/include/plat/uncompress.h2
-rw-r--r--arch/arm/plat-s3c24xx/common-smdk.c2
-rw-r--r--arch/arm/plat-s3c24xx/devs.c4
-rw-r--r--arch/arm/plat-s3c24xx/dma.c17
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/mci.h (renamed from include/asm-arm/plat-s3c24xx/mci.h)0
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/regs-spi.h (renamed from include/asm-arm/plat-s3c24xx/regs-spi.h)0
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/regs-udc.h (renamed from include/asm-arm/plat-s3c24xx/regs-udc.h)0
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/udc.h (renamed from include/asm-arm/plat-s3c24xx/udc.h)0
-rw-r--r--arch/arm/tools/mach-types101
-rw-r--r--arch/arm/vfp/vfphw.S27
-rw-r--r--arch/arm/vfp/vfpmodule.c9
-rw-r--r--drivers/char/ds1620.c25
-rw-r--r--drivers/char/nwflash.c8
-rw-r--r--drivers/i2c/busses/i2c-pxa.c2
-rw-r--r--drivers/i2c/busses/i2c-s3c2410.c4
-rw-r--r--drivers/ide/Kconfig2
-rw-r--r--drivers/ide/ide_arm.c11
-rw-r--r--drivers/input/keyboard/pxa27x_keypad.c2
-rw-r--r--drivers/input/serio/Kconfig2
-rw-r--r--drivers/input/touchscreen/mainstone-wm97xx.c2
-rw-r--r--drivers/media/video/pxa_camera.c4
-rw-r--r--drivers/media/video/pxa_camera.h95
-rw-r--r--drivers/mfd/asic3.c6
-rw-r--r--drivers/mfd/mcp-core.c2
-rw-r--r--drivers/mfd/mcp-sa11x0.c2
-rw-r--r--drivers/mfd/ucb1x00-assabet.c2
-rw-r--r--drivers/mfd/ucb1x00-core.c2
-rw-r--r--drivers/mfd/ucb1x00-ts.c2
-rw-r--r--drivers/mmc/host/mmci.c2
-rw-r--r--drivers/mmc/host/pxamci.c7
-rw-r--r--drivers/mmc/host/s3cmci.c2
-rw-r--r--drivers/mtd/maps/dc21285.c7
-rw-r--r--drivers/mtd/maps/ixp2000.c2
-rw-r--r--drivers/mtd/maps/ixp4xx.c2
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c4
-rw-r--r--drivers/mtd/nand/s3c2410.c8
-rw-r--r--drivers/net/cs89x0.c6
-rw-r--r--drivers/net/irda/pxaficp_ir.c46
-rw-r--r--drivers/net/irda/sa1100_ir.c2
-rw-r--r--drivers/net/smc911x.h3
-rw-r--r--drivers/net/smc91x.h3
-rw-r--r--drivers/rtc/rtc-at91sam9.c1
-rw-r--r--drivers/rtc/rtc-s3c.c2
-rw-r--r--drivers/serial/amba-pl010.c2
-rw-r--r--drivers/serial/amba-pl011.c2
-rw-r--r--drivers/serial/pxa.c3
-rw-r--r--drivers/serial/serial_lh7a40x.c3
-rw-r--r--drivers/spi/pxa2xx_spi.c2
-rw-r--r--drivers/spi/spi_s3c24xx.c2
-rw-r--r--drivers/usb/gadget/pxa25x_udc.c2
-rw-r--r--drivers/usb/gadget/pxa27x_udc.c2
-rw-r--r--drivers/usb/gadget/s3c2410_udc.c4
-rw-r--r--drivers/usb/host/ohci-pxa27x.c2
-rw-r--r--drivers/video/Kconfig2
-rw-r--r--drivers/video/amba-clcd.c4
-rw-r--r--drivers/video/pxafb.c20
-rw-r--r--drivers/video/pxafb.h3
-rw-r--r--drivers/video/sa1100fb.c2
-rw-r--r--drivers/watchdog/s3c2410_wdt.c2
-rw-r--r--drivers/watchdog/sa1100_wdt.c1
-rw-r--r--sound/arm/pxa2xx-ac97-lib.c2
-rw-r--r--sound/arm/pxa2xx-ac97.c1
-rw-r--r--sound/arm/pxa2xx-pcm.h2
-rw-r--r--sound/oss/waveartist.c8
-rw-r--r--sound/soc/pxa/pxa2xx-ac97.c1
-rw-r--r--sound/soc/s3c24xx/s3c2443-ac97.c2
469 files changed, 9520 insertions, 5728 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9722f8bb506c..4546f8b2ce8c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -201,6 +201,7 @@ choice
201 201
202config ARCH_AAEC2000 202config ARCH_AAEC2000
203 bool "Agilent AAEC-2000 based" 203 bool "Agilent AAEC-2000 based"
204 select CPU_ARM920T
204 select ARM_AMBA 205 select ARM_AMBA
205 select HAVE_CLK 206 select HAVE_CLK
206 help 207 help
@@ -210,6 +211,7 @@ config ARCH_INTEGRATOR
210 bool "ARM Ltd. Integrator family" 211 bool "ARM Ltd. Integrator family"
211 select ARM_AMBA 212 select ARM_AMBA
212 select HAVE_CLK 213 select HAVE_CLK
214 select COMMON_CLKDEV
213 select ICST525 215 select ICST525
214 help 216 help
215 Support for ARM's Integrator platform. 217 Support for ARM's Integrator platform.
@@ -218,6 +220,7 @@ config ARCH_REALVIEW
218 bool "ARM Ltd. RealView family" 220 bool "ARM Ltd. RealView family"
219 select ARM_AMBA 221 select ARM_AMBA
220 select HAVE_CLK 222 select HAVE_CLK
223 select COMMON_CLKDEV
221 select ICST307 224 select ICST307
222 select GENERIC_TIME 225 select GENERIC_TIME
223 select GENERIC_CLOCKEVENTS 226 select GENERIC_CLOCKEVENTS
@@ -229,6 +232,7 @@ config ARCH_VERSATILE
229 select ARM_AMBA 232 select ARM_AMBA
230 select ARM_VIC 233 select ARM_VIC
231 select HAVE_CLK 234 select HAVE_CLK
235 select COMMON_CLKDEV
232 select ICST307 236 select ICST307
233 select GENERIC_TIME 237 select GENERIC_TIME
234 select GENERIC_CLOCKEVENTS 238 select GENERIC_CLOCKEVENTS
@@ -243,22 +247,15 @@ config ARCH_AT91
243 This enables support for systems based on the Atmel AT91RM9200, 247 This enables support for systems based on the Atmel AT91RM9200,
244 AT91SAM9 and AT91CAP9 processors. 248 AT91SAM9 and AT91CAP9 processors.
245 249
246config ARCH_CLPS7500
247 bool "Cirrus CL-PS7500FE"
248 select TIMER_ACORN
249 select ISA
250 select NO_IOPORT
251 select ARCH_SPARSEMEM_ENABLE
252 help
253 Support for the Cirrus Logic PS7500FE system-on-a-chip.
254
255config ARCH_CLPS711X 250config ARCH_CLPS711X
256 bool "Cirrus Logic CLPS711x/EP721x-based" 251 bool "Cirrus Logic CLPS711x/EP721x-based"
252 select CPU_ARM720T
257 help 253 help
258 Support for Cirrus Logic 711x/721x based boards. 254 Support for Cirrus Logic 711x/721x based boards.
259 255
260config ARCH_EBSA110 256config ARCH_EBSA110
261 bool "EBSA-110" 257 bool "EBSA-110"
258 select CPU_SA110
262 select ISA 259 select ISA
263 select NO_IOPORT 260 select NO_IOPORT
264 help 261 help
@@ -269,16 +266,19 @@ config ARCH_EBSA110
269 266
270config ARCH_EP93XX 267config ARCH_EP93XX
271 bool "EP93xx-based" 268 bool "EP93xx-based"
269 select CPU_ARM920T
272 select ARM_AMBA 270 select ARM_AMBA
273 select ARM_VIC 271 select ARM_VIC
274 select GENERIC_GPIO 272 select GENERIC_GPIO
275 select HAVE_CLK 273 select HAVE_CLK
274 select COMMON_CLKDEV
276 select ARCH_REQUIRE_GPIOLIB 275 select ARCH_REQUIRE_GPIOLIB
277 help 276 help
278 This enables support for the Cirrus EP93xx series of CPUs. 277 This enables support for the Cirrus EP93xx series of CPUs.
279 278
280config ARCH_FOOTBRIDGE 279config ARCH_FOOTBRIDGE
281 bool "FootBridge" 280 bool "FootBridge"
281 select CPU_SA110
282 select FOOTBRIDGE 282 select FOOTBRIDGE
283 help 283 help
284 Support for systems based on the DC21285 companion chip 284 Support for systems based on the DC21285 companion chip
@@ -286,18 +286,21 @@ config ARCH_FOOTBRIDGE
286 286
287config ARCH_NETX 287config ARCH_NETX
288 bool "Hilscher NetX based" 288 bool "Hilscher NetX based"
289 select CPU_ARM926T
289 select ARM_VIC 290 select ARM_VIC
290 help 291 help
291 This enables support for systems based on the Hilscher NetX Soc 292 This enables support for systems based on the Hilscher NetX Soc
292 293
293config ARCH_H720X 294config ARCH_H720X
294 bool "Hynix HMS720x-based" 295 bool "Hynix HMS720x-based"
296 select CPU_ARM720T
295 select ISA_DMA_API 297 select ISA_DMA_API
296 help 298 help
297 This enables support for systems based on the Hynix HMS720x 299 This enables support for systems based on the Hynix HMS720x
298 300
299config ARCH_IMX 301config ARCH_IMX
300 bool "IMX" 302 bool "IMX"
303 select CPU_ARM920T
301 select GENERIC_GPIO 304 select GENERIC_GPIO
302 select GENERIC_TIME 305 select GENERIC_TIME
303 select GENERIC_CLOCKEVENTS 306 select GENERIC_CLOCKEVENTS
@@ -307,6 +310,7 @@ config ARCH_IMX
307config ARCH_IOP13XX 310config ARCH_IOP13XX
308 bool "IOP13xx-based" 311 bool "IOP13xx-based"
309 depends on MMU 312 depends on MMU
313 select CPU_XSC3
310 select PLAT_IOP 314 select PLAT_IOP
311 select PCI 315 select PCI
312 select ARCH_SUPPORTS_MSI 316 select ARCH_SUPPORTS_MSI
@@ -317,6 +321,7 @@ config ARCH_IOP13XX
317config ARCH_IOP32X 321config ARCH_IOP32X
318 bool "IOP32x-based" 322 bool "IOP32x-based"
319 depends on MMU 323 depends on MMU
324 select CPU_XSCALE
320 select PLAT_IOP 325 select PLAT_IOP
321 select PCI 326 select PCI
322 select GENERIC_GPIO 327 select GENERIC_GPIO
@@ -328,6 +333,7 @@ config ARCH_IOP32X
328config ARCH_IOP33X 333config ARCH_IOP33X
329 bool "IOP33x-based" 334 bool "IOP33x-based"
330 depends on MMU 335 depends on MMU
336 select CPU_XSCALE
331 select PLAT_IOP 337 select PLAT_IOP
332 select PCI 338 select PCI
333 select GENERIC_GPIO 339 select GENERIC_GPIO
@@ -338,6 +344,7 @@ config ARCH_IOP33X
338config ARCH_IXP23XX 344config ARCH_IXP23XX
339 bool "IXP23XX-based" 345 bool "IXP23XX-based"
340 depends on MMU 346 depends on MMU
347 select CPU_XSC3
341 select PCI 348 select PCI
342 help 349 help
343 Support for Intel's IXP23xx (XScale) family of processors. 350 Support for Intel's IXP23xx (XScale) family of processors.
@@ -345,6 +352,7 @@ config ARCH_IXP23XX
345config ARCH_IXP2000 352config ARCH_IXP2000
346 bool "IXP2400/2800-based" 353 bool "IXP2400/2800-based"
347 depends on MMU 354 depends on MMU
355 select CPU_XSCALE
348 select PCI 356 select PCI
349 help 357 help
350 Support for Intel's IXP2400/2800 (XScale) family of processors. 358 Support for Intel's IXP2400/2800 (XScale) family of processors.
@@ -352,6 +360,7 @@ config ARCH_IXP2000
352config ARCH_IXP4XX 360config ARCH_IXP4XX
353 bool "IXP4xx-based" 361 bool "IXP4xx-based"
354 depends on MMU 362 depends on MMU
363 select CPU_XSCALE
355 select GENERIC_GPIO 364 select GENERIC_GPIO
356 select GENERIC_TIME 365 select GENERIC_TIME
357 select GENERIC_CLOCKEVENTS 366 select GENERIC_CLOCKEVENTS
@@ -361,6 +370,7 @@ config ARCH_IXP4XX
361 370
362config ARCH_L7200 371config ARCH_L7200
363 bool "LinkUp-L7200" 372 bool "LinkUp-L7200"
373 select CPU_ARM720T
364 select FIQ 374 select FIQ
365 help 375 help
366 Say Y here if you intend to run this kernel on a LinkUp Systems 376 Say Y here if you intend to run this kernel on a LinkUp Systems
@@ -374,6 +384,7 @@ config ARCH_L7200
374 384
375config ARCH_KIRKWOOD 385config ARCH_KIRKWOOD
376 bool "Marvell Kirkwood" 386 bool "Marvell Kirkwood"
387 select CPU_FEROCEON
377 select PCI 388 select PCI
378 select GENERIC_TIME 389 select GENERIC_TIME
379 select GENERIC_CLOCKEVENTS 390 select GENERIC_CLOCKEVENTS
@@ -384,6 +395,7 @@ config ARCH_KIRKWOOD
384 395
385config ARCH_KS8695 396config ARCH_KS8695
386 bool "Micrel/Kendin KS8695" 397 bool "Micrel/Kendin KS8695"
398 select CPU_ARM922T
387 select GENERIC_GPIO 399 select GENERIC_GPIO
388 help 400 help
389 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 401 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
@@ -391,6 +403,7 @@ config ARCH_KS8695
391 403
392config ARCH_NS9XXX 404config ARCH_NS9XXX
393 bool "NetSilicon NS9xxx" 405 bool "NetSilicon NS9xxx"
406 select CPU_ARM926T
394 select GENERIC_GPIO 407 select GENERIC_GPIO
395 select GENERIC_TIME 408 select GENERIC_TIME
396 select GENERIC_CLOCKEVENTS 409 select GENERIC_CLOCKEVENTS
@@ -403,6 +416,7 @@ config ARCH_NS9XXX
403 416
404config ARCH_LOKI 417config ARCH_LOKI
405 bool "Marvell Loki (88RC8480)" 418 bool "Marvell Loki (88RC8480)"
419 select CPU_FEROCEON
406 select GENERIC_TIME 420 select GENERIC_TIME
407 select GENERIC_CLOCKEVENTS 421 select GENERIC_CLOCKEVENTS
408 select PLAT_ORION 422 select PLAT_ORION
@@ -411,6 +425,7 @@ config ARCH_LOKI
411 425
412config ARCH_MV78XX0 426config ARCH_MV78XX0
413 bool "Marvell MV78xx0" 427 bool "Marvell MV78xx0"
428 select CPU_FEROCEON
414 select PCI 429 select PCI
415 select GENERIC_TIME 430 select GENERIC_TIME
416 select GENERIC_CLOCKEVENTS 431 select GENERIC_CLOCKEVENTS
@@ -432,6 +447,7 @@ config ARCH_MXC
432config ARCH_ORION5X 447config ARCH_ORION5X
433 bool "Marvell Orion" 448 bool "Marvell Orion"
434 depends on MMU 449 depends on MMU
450 select CPU_FEROCEON
435 select PCI 451 select PCI
436 select GENERIC_GPIO 452 select GENERIC_GPIO
437 select GENERIC_TIME 453 select GENERIC_TIME
@@ -444,6 +460,7 @@ config ARCH_ORION5X
444 460
445config ARCH_PNX4008 461config ARCH_PNX4008
446 bool "Philips Nexperia PNX4008 Mobile" 462 bool "Philips Nexperia PNX4008 Mobile"
463 select CPU_ARM926T
447 select HAVE_CLK 464 select HAVE_CLK
448 help 465 help
449 This enables support for Philips PNX4008 mobile platform. 466 This enables support for Philips PNX4008 mobile platform.
@@ -454,6 +471,7 @@ config ARCH_PXA
454 select ARCH_MTD_XIP 471 select ARCH_MTD_XIP
455 select GENERIC_GPIO 472 select GENERIC_GPIO
456 select HAVE_CLK 473 select HAVE_CLK
474 select COMMON_CLKDEV
457 select ARCH_REQUIRE_GPIOLIB 475 select ARCH_REQUIRE_GPIOLIB
458 select GENERIC_TIME 476 select GENERIC_TIME
459 select GENERIC_CLOCKEVENTS 477 select GENERIC_CLOCKEVENTS
@@ -477,6 +495,7 @@ config ARCH_RPC
477 495
478config ARCH_SA1100 496config ARCH_SA1100
479 bool "SA1100-based" 497 bool "SA1100-based"
498 select CPU_SA1100
480 select ISA 499 select ISA
481 select ARCH_SPARSEMEM_ENABLE 500 select ARCH_SPARSEMEM_ENABLE
482 select ARCH_MTD_XIP 501 select ARCH_MTD_XIP
@@ -500,6 +519,7 @@ config ARCH_S3C2410
500 519
501config ARCH_SHARK 520config ARCH_SHARK
502 bool "Shark" 521 bool "Shark"
522 select CPU_SA110
503 select ISA 523 select ISA
504 select ISA_DMA 524 select ISA_DMA
505 select ZONE_DMA 525 select ZONE_DMA
@@ -510,6 +530,7 @@ config ARCH_SHARK
510 530
511config ARCH_LH7A40X 531config ARCH_LH7A40X
512 bool "Sharp LH7A40X" 532 bool "Sharp LH7A40X"
533 select CPU_ARM922T
513 select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM 534 select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
514 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM 535 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
515 help 536 help
@@ -520,6 +541,7 @@ config ARCH_LH7A40X
520 541
521config ARCH_DAVINCI 542config ARCH_DAVINCI
522 bool "TI DaVinci" 543 bool "TI DaVinci"
544 select CPU_ARM926T
523 select GENERIC_TIME 545 select GENERIC_TIME
524 select GENERIC_CLOCKEVENTS 546 select GENERIC_CLOCKEVENTS
525 select GENERIC_GPIO 547 select GENERIC_GPIO
@@ -541,6 +563,7 @@ config ARCH_OMAP
541 563
542config ARCH_MSM 564config ARCH_MSM
543 bool "Qualcomm MSM" 565 bool "Qualcomm MSM"
566 select CPU_V6
544 select GENERIC_TIME 567 select GENERIC_TIME
545 select GENERIC_CLOCKEVENTS 568 select GENERIC_CLOCKEVENTS
546 help 569 help
@@ -549,6 +572,13 @@ config ARCH_MSM
549 interface to the ARM9 modem processor which runs the baseband stack 572 interface to the ARM9 modem processor which runs the baseband stack
550 and controls some vital subsystems (clock and power control, etc). 573 and controls some vital subsystems (clock and power control, etc).
551 574
575config ARCH_W90X900
576 bool "Nuvoton W90X900 CPU"
577 select CPU_ARM926T
578 help
579 Support for Nuvoton (Winbond logic dept.) ARM9 processor,You
580 can login www.mcuos.com or www.nuvoton.com to know more.
581
552endchoice 582endchoice
553 583
554source "arch/arm/mach-clps711x/Kconfig" 584source "arch/arm/mach-clps711x/Kconfig"
@@ -627,6 +657,8 @@ source "arch/arm/mach-ks8695/Kconfig"
627 657
628source "arch/arm/mach-msm/Kconfig" 658source "arch/arm/mach-msm/Kconfig"
629 659
660source "arch/arm/mach-w90x900/Kconfig"
661
630# Definitions to make life easier 662# Definitions to make life easier
631config ARCH_ACORN 663config ARCH_ACORN
632 bool 664 bool
@@ -781,7 +813,7 @@ config HOTPLUG_CPU
781 813
782config LOCAL_TIMERS 814config LOCAL_TIMERS
783 bool "Use local timer interrupts" 815 bool "Use local timer interrupts"
784 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP) 816 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || REALVIEW_EB_A9MP)
785 default y 817 default y
786 help 818 help
787 Enable support for local timers on SMP platforms, rather then the 819 Enable support for local timers on SMP platforms, rather then the
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 384f6b16bfd8..260864f3f010 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -97,7 +97,6 @@ textofs-y := 0x00008000
97 97
98 machine-$(CONFIG_ARCH_RPC) := rpc 98 machine-$(CONFIG_ARCH_RPC) := rpc
99 machine-$(CONFIG_ARCH_EBSA110) := ebsa110 99 machine-$(CONFIG_ARCH_EBSA110) := ebsa110
100 machine-$(CONFIG_ARCH_CLPS7500) := clps7500
101 machine-$(CONFIG_FOOTBRIDGE) := footbridge 100 machine-$(CONFIG_FOOTBRIDGE) := footbridge
102 machine-$(CONFIG_ARCH_SHARK) := shark 101 machine-$(CONFIG_ARCH_SHARK) := shark
103 machine-$(CONFIG_ARCH_SA1100) := sa1100 102 machine-$(CONFIG_ARCH_SA1100) := sa1100
@@ -145,6 +144,7 @@ endif
145 machine-$(CONFIG_ARCH_MSM) := msm 144 machine-$(CONFIG_ARCH_MSM) := msm
146 machine-$(CONFIG_ARCH_LOKI) := loki 145 machine-$(CONFIG_ARCH_LOKI) := loki
147 machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 146 machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
147 machine-$(CONFIG_ARCH_W90X900) := w90x900
148 148
149ifeq ($(CONFIG_ARCH_EBSA110),y) 149ifeq ($(CONFIG_ARCH_EBSA110),y)
150# This is what happens if you forget the IOCS16 line. 150# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index c47f2a3f8f8f..fbe5eef1f6c9 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
23OBJS += head-l7200.o 23OBJS += head-l7200.o
24endif 24endif
25 25
26ifeq ($(CONFIG_ARCH_CLPS7500),y)
27HEAD = head-clps7500.o
28endif
29
30ifeq ($(CONFIG_ARCH_P720T),y) 26ifeq ($(CONFIG_ARCH_P720T),y)
31# Borrow this code from SA1100 27# Borrow this code from SA1100
32OBJS += head-sa1100.o 28OBJS += head-sa1100.o
diff --git a/arch/arm/boot/compressed/head-clps7500.S b/arch/arm/boot/compressed/head-clps7500.S
deleted file mode 100644
index 4f3c78ac30a0..000000000000
--- a/arch/arm/boot/compressed/head-clps7500.S
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * linux/arch/arm/boot/compressed/head-clps7500.S
3 *
4 * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
5 */
6
7
8 /* There are three different ways the kernel can be
9 booted on a 7500 system: from Angel (loaded in RAM), from
10 16-bit ROM or from 32-bit Flash. Luckily, a single kernel
11 image does for them all. */
12 /* This branch is taken if the CPU memory width matches the
13 actual device in use. The default at power on is 16 bits
14 so we must be prepared for a mismatch. */
15 .section ".start", "ax"
162:
17 b 1f
18 .word 0xffff
19 .word 0xb632 @ mov r11, #0x03200000
20 .word 0xe3a0
21 .word 0x0000 @ mov r0, #0
22 .word 0xe3a0
23 .word 0x0080 @ strb r0, [r11, #0x80]
24 .word 0xe5cb
25 .word 0xf000 @ mov pc, #0
26 .word 0xe3a0
271:
28 adr r1, 2b
29 teq r1, #0
30 bne .Langel
31 /* This is a direct-from-ROM boot. Copy the kernel into
32 RAM and run it there. */
33 mov r0, #0x30
34 mcr p15, 0, r0, c1, c0, 0
35 mov r0, #0x13
36 msr cpsr_cxsf, r0
37 mov r12, #0x03000000 @ point to LEDs
38 orr r12, r12, #0x00020000
39 orr r12, r12, #0xba00
40 mov r0, #0x5500
41 str r0, [r12]
42 mov r0, #0x10000000
43 orr r0, r0, #0x8000
44 mov r4, r0
45 ldr r2, =_end
462:
47 ldr r3, [r1], #4
48 str r3, [r0], #4
49 teq r0, r2
50 bne 2b
51 mov r0, #0xff00
52 str r0, [r12]
531:
54 mov r12, #0x03000000 @ point to LEDs
55 orr r12, r12, #0x00020000
56 orr r12, r12, #0xba00
57 mov r0, #0xfe00
58 str r0, [r12]
59
60 adr lr, 1f
61 mov r0, #0
62 mov r1, #14 /* MACH_TYPE_CLPS7500 */
63 mov pc, lr
64.Langel:
65#ifdef CONFIG_ANGELBOOT
66 /* Call Angel to switch into SVC mode. */
67 mov r0, #0x17
68 swi 0x123456
69#endif
70 /* Ensure all interrupts are off and MMU disabled */
71 mrs r0, cpsr
72 orr r0, r0, #0xc0
73 msr cpsr_cxsf, r0
74
75 adr lr, 1b
76 orr lr, lr, #0x10000000
77 mov r0, #0x30 @ MMU off
78 mcr p15, 0, r0, c1, c0, 0
79 mov r0, r0
80 mov pc, lr
81
82 .ltorg
83
841:
85/* And the rest */
86#include "head.S"
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 84a1e0496a3c..77d614232d81 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -624,6 +624,12 @@ proc_types:
624 b __armv4_mmu_cache_off 624 b __armv4_mmu_cache_off
625 b __armv4_mmu_cache_flush 625 b __armv4_mmu_cache_flush
626 626
627 .word 0x56056930
628 .word 0xff0ffff0 @ PXA935
629 b __armv4_mmu_cache_on
630 b __armv4_mmu_cache_off
631 b __armv4_mmu_cache_flush
632
627 .word 0x56050000 @ Feroceon 633 .word 0x56050000 @ Feroceon
628 .word 0xff0f0000 634 .word 0xff0f0000
629 b __armv4_mmu_cache_on 635 b __armv4_mmu_cache_on
@@ -717,6 +723,9 @@ __armv7_mmu_cache_off:
717 bl __armv7_mmu_cache_flush 723 bl __armv7_mmu_cache_flush
718 mov r0, #0 724 mov r0, #0
719 mcr p15, 0, r0, c8, c7, 0 @ invalidate whole TLB 725 mcr p15, 0, r0, c8, c7, 0 @ invalidate whole TLB
726 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTC
727 mcr p15, 0, r0, c7, c10, 4 @ DSB
728 mcr p15, 0, r0, c7, c5, 4 @ ISB
720 mov pc, r12 729 mov pc, r12
721 730
722__arm6_mmu_cache_off: 731__arm6_mmu_cache_off:
@@ -778,12 +787,13 @@ __armv6_mmu_cache_flush:
778__armv7_mmu_cache_flush: 787__armv7_mmu_cache_flush:
779 mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1 788 mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1
780 tst r10, #0xf << 16 @ hierarchical cache (ARMv7) 789 tst r10, #0xf << 16 @ hierarchical cache (ARMv7)
781 beq hierarchical
782 mov r10, #0 790 mov r10, #0
791 beq hierarchical
783 mcr p15, 0, r10, c7, c14, 0 @ clean+invalidate D 792 mcr p15, 0, r10, c7, c14, 0 @ clean+invalidate D
784 b iflush 793 b iflush
785hierarchical: 794hierarchical:
786 stmfd sp!, {r0-r5, r7, r9-r11} 795 mcr p15, 0, r10, c7, c10, 5 @ DMB
796 stmfd sp!, {r0-r5, r7, r9, r11}
787 mrc p15, 1, r0, c0, c0, 1 @ read clidr 797 mrc p15, 1, r0, c0, c0, 1 @ read clidr
788 ands r3, r0, #0x7000000 @ extract loc from clidr 798 ands r3, r0, #0x7000000 @ extract loc from clidr
789 mov r3, r3, lsr #23 @ left align loc bit field 799 mov r3, r3, lsr #23 @ left align loc bit field
@@ -820,12 +830,14 @@ skip:
820 cmp r3, r10 830 cmp r3, r10
821 bgt loop1 831 bgt loop1
822finished: 832finished:
833 ldmfd sp!, {r0-r5, r7, r9, r11}
823 mov r10, #0 @ swith back to cache level 0 834 mov r10, #0 @ swith back to cache level 0
824 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr 835 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
825 ldmfd sp!, {r0-r5, r7, r9-r11}
826iflush: 836iflush:
837 mcr p15, 0, r10, c7, c10, 4 @ DSB
827 mcr p15, 0, r10, c7, c5, 0 @ invalidate I+BTB 838 mcr p15, 0, r10, c7, c5, 0 @ invalidate I+BTB
828 mcr p15, 0, r10, c7, c10, 4 @ drain WB 839 mcr p15, 0, r10, c7, c10, 4 @ DSB
840 mcr p15, 0, r10, c7, c5, 4 @ ISB
829 mov pc, lr 841 mov pc, lr
830 842
831__armv5tej_mmu_cache_flush: 843__armv5tej_mmu_cache_flush:
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 65ce8fff29db..3fc08413fff0 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -86,6 +86,8 @@ static void putstr(const char *ptr)
86 86
87#define __ptr_t void * 87#define __ptr_t void *
88 88
89#define memzero(s,n) __memzero(s,n)
90
89/* 91/*
90 * Optimised C version of memzero for the ARM. 92 * Optimised C version of memzero for the ARM.
91 */ 93 */
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 86b5e6982660..a2cd9beaf37d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -33,3 +33,6 @@ config SHARPSL_PM
33 33
34config SHARP_SCOOP 34config SHARP_SCOOP
35 bool 35 bool
36
37config COMMON_CLKDEV
38 bool
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 325e4b6a6afb..7cb7961d81cb 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o
17obj-$(CONFIG_ARCH_IXP2000) += uengine.o 17obj-$(CONFIG_ARCH_IXP2000) += uengine.o
18obj-$(CONFIG_ARCH_IXP23XX) += uengine.o 18obj-$(CONFIG_ARCH_IXP23XX) += uengine.o
19obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o 19obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
20obj-$(CONFIG_COMMON_CLKDEV) += clkdev.o
diff --git a/arch/arm/common/clkdev.c b/arch/arm/common/clkdev.c
new file mode 100644
index 000000000000..17a17b49a45b
--- /dev/null
+++ b/arch/arm/common/clkdev.c
@@ -0,0 +1,128 @@
1/*
2 * arch/arm/common/clkdev.c
3 *
4 * Copyright (C) 2008 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Helper for the clk API to assist looking up a struct clk.
11 */
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/device.h>
15#include <linux/list.h>
16#include <linux/errno.h>
17#include <linux/err.h>
18#include <linux/string.h>
19#include <linux/mutex.h>
20
21#include <asm/clkdev.h>
22#include <mach/clkdev.h>
23
24static LIST_HEAD(clocks);
25static DEFINE_MUTEX(clocks_mutex);
26
27static struct clk *clk_find(const char *dev_id, const char *con_id)
28{
29 struct clk_lookup *p;
30 struct clk *clk = NULL;
31 int match, best = 0;
32
33 list_for_each_entry(p, &clocks, node) {
34 if ((p->dev_id && !dev_id) || (p->con_id && !con_id))
35 continue;
36 match = 0;
37 if (p->dev_id)
38 match += 2 * (strcmp(p->dev_id, dev_id) == 0);
39 if (p->con_id)
40 match += 1 * (strcmp(p->con_id, con_id) == 0);
41 if (match == 0)
42 continue;
43
44 if (match > best) {
45 clk = p->clk;
46 best = match;
47 }
48 }
49 return clk;
50}
51
52struct clk *clk_get(struct device *dev, const char *con_id)
53{
54 const char *dev_id = dev ? dev_name(dev) : NULL;
55 struct clk *clk;
56
57 mutex_lock(&clocks_mutex);
58 clk = clk_find(dev_id, con_id);
59 if (clk && !__clk_get(clk))
60 clk = NULL;
61 mutex_unlock(&clocks_mutex);
62
63 return clk ? clk : ERR_PTR(-ENOENT);
64}
65EXPORT_SYMBOL(clk_get);
66
67void clk_put(struct clk *clk)
68{
69 __clk_put(clk);
70}
71EXPORT_SYMBOL(clk_put);
72
73void clkdev_add(struct clk_lookup *cl)
74{
75 mutex_lock(&clocks_mutex);
76 list_add_tail(&cl->node, &clocks);
77 mutex_unlock(&clocks_mutex);
78}
79EXPORT_SYMBOL(clkdev_add);
80
81#define MAX_DEV_ID 20
82#define MAX_CON_ID 16
83
84struct clk_lookup_alloc {
85 struct clk_lookup cl;
86 char dev_id[MAX_DEV_ID];
87 char con_id[MAX_CON_ID];
88};
89
90struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
91 const char *dev_fmt, ...)
92{
93 struct clk_lookup_alloc *cla;
94
95 cla = kzalloc(sizeof(*cla), GFP_KERNEL);
96 if (!cla)
97 return NULL;
98
99 cla->cl.clk = clk;
100 if (con_id) {
101 strlcpy(cla->con_id, con_id, sizeof(cla->con_id));
102 cla->cl.con_id = cla->con_id;
103 }
104
105 if (dev_fmt) {
106 va_list ap;
107
108 va_start(ap, dev_fmt);
109 vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap);
110 cla->cl.dev_id = cla->dev_id;
111 va_end(ap);
112 }
113
114 return &cla->cl;
115}
116EXPORT_SYMBOL(clkdev_alloc);
117
118/*
119 * clkdev_drop - remove a clock dynamically allocated
120 */
121void clkdev_drop(struct clk_lookup *cl)
122{
123 mutex_lock(&clocks_mutex);
124 list_del(&cl->node);
125 mutex_unlock(&clocks_mutex);
126 kfree(cl);
127}
128EXPORT_SYMBOL(clkdev_drop);
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 7c6b4b99a2df..2293f0ce061e 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -1108,6 +1108,7 @@ void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf)
1108 locomo_writel(bpwf | LOCOMO_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); 1108 locomo_writel(bpwf | LOCOMO_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS);
1109 spin_unlock_irqrestore(&lchip->lock, flags); 1109 spin_unlock_irqrestore(&lchip->lock, flags);
1110} 1110}
1111EXPORT_SYMBOL(locomo_frontlight_set);
1111 1112
1112/* 1113/*
1113 * LoCoMo "Register Access Bus." 1114 * LoCoMo "Register Access Bus."
diff --git a/arch/arm/configs/h5000_defconfig b/arch/arm/configs/h5000_defconfig
new file mode 100644
index 000000000000..649baa370495
--- /dev/null
+++ b/arch/arm/configs/h5000_defconfig
@@ -0,0 +1,996 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc6
4# Tue Sep 16 16:13:48 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ARCH_SUPPORTS_AOUT=y
26CONFIG_ZONE_DMA=y
27CONFIG_ARCH_MTD_XIP=y
28CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
29CONFIG_VECTORS_BASE=0xffff0000
30CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
31
32#
33# General setup
34#
35CONFIG_EXPERIMENTAL=y
36CONFIG_BROKEN_ON_SMP=y
37CONFIG_INIT_ENV_ARG_LIMIT=32
38CONFIG_LOCALVERSION=""
39CONFIG_LOCALVERSION_AUTO=y
40CONFIG_SWAP=y
41CONFIG_SYSVIPC=y
42CONFIG_SYSVIPC_SYSCTL=y
43# CONFIG_POSIX_MQUEUE is not set
44# CONFIG_BSD_PROCESS_ACCT is not set
45# CONFIG_TASKSTATS is not set
46# CONFIG_AUDIT is not set
47CONFIG_IKCONFIG=y
48CONFIG_IKCONFIG_PROC=y
49CONFIG_LOG_BUF_SHIFT=16
50# CONFIG_CGROUPS is not set
51CONFIG_GROUP_SCHED=y
52CONFIG_FAIR_GROUP_SCHED=y
53# CONFIG_RT_GROUP_SCHED is not set
54CONFIG_USER_SCHED=y
55# CONFIG_CGROUP_SCHED is not set
56# CONFIG_SYSFS_DEPRECATED_V2 is not set
57# CONFIG_RELAY is not set
58# CONFIG_NAMESPACES is not set
59# CONFIG_BLK_DEV_INITRD is not set
60# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
61CONFIG_SYSCTL=y
62CONFIG_EMBEDDED=y
63# CONFIG_UID16 is not set
64CONFIG_SYSCTL_SYSCALL=y
65CONFIG_KALLSYMS=y
66# CONFIG_KALLSYMS_ALL is not set
67# CONFIG_KALLSYMS_EXTRA_PASS is not set
68CONFIG_HOTPLUG=y
69CONFIG_PRINTK=y
70CONFIG_BUG=y
71CONFIG_ELF_CORE=y
72CONFIG_COMPAT_BRK=y
73CONFIG_BASE_FULL=y
74CONFIG_FUTEX=y
75CONFIG_ANON_INODES=y
76CONFIG_EPOLL=y
77CONFIG_SIGNALFD=y
78CONFIG_TIMERFD=y
79CONFIG_EVENTFD=y
80CONFIG_SHMEM=y
81CONFIG_VM_EVENT_COUNTERS=y
82CONFIG_SLAB=y
83# CONFIG_SLUB is not set
84# CONFIG_SLOB is not set
85# CONFIG_PROFILING is not set
86# CONFIG_MARKERS is not set
87CONFIG_HAVE_OPROFILE=y
88# CONFIG_KPROBES is not set
89# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
90# CONFIG_HAVE_IOREMAP_PROT is not set
91CONFIG_HAVE_KPROBES=y
92CONFIG_HAVE_KRETPROBES=y
93# CONFIG_HAVE_ARCH_TRACEHOOK is not set
94# CONFIG_HAVE_DMA_ATTRS is not set
95# CONFIG_USE_GENERIC_SMP_HELPERS is not set
96CONFIG_HAVE_CLK=y
97# CONFIG_PROC_PAGE_MONITOR is not set
98CONFIG_HAVE_GENERIC_DMA_COHERENT=y
99CONFIG_SLABINFO=y
100CONFIG_RT_MUTEXES=y
101# CONFIG_TINY_SHMEM is not set
102CONFIG_BASE_SMALL=0
103CONFIG_MODULES=y
104# CONFIG_MODULE_FORCE_LOAD is not set
105CONFIG_MODULE_UNLOAD=y
106CONFIG_MODULE_FORCE_UNLOAD=y
107# CONFIG_MODVERSIONS is not set
108# CONFIG_MODULE_SRCVERSION_ALL is not set
109CONFIG_KMOD=y
110CONFIG_BLOCK=y
111# CONFIG_LBD is not set
112# CONFIG_BLK_DEV_IO_TRACE is not set
113# CONFIG_LSF is not set
114# CONFIG_BLK_DEV_BSG is not set
115# CONFIG_BLK_DEV_INTEGRITY is not set
116
117#
118# IO Schedulers
119#
120CONFIG_IOSCHED_NOOP=y
121CONFIG_IOSCHED_AS=y
122CONFIG_IOSCHED_DEADLINE=y
123# CONFIG_IOSCHED_CFQ is not set
124CONFIG_DEFAULT_AS=y
125# CONFIG_DEFAULT_DEADLINE is not set
126# CONFIG_DEFAULT_CFQ is not set
127# CONFIG_DEFAULT_NOOP is not set
128CONFIG_DEFAULT_IOSCHED="anticipatory"
129CONFIG_CLASSIC_RCU=y
130
131#
132# System Type
133#
134# CONFIG_ARCH_AAEC2000 is not set
135# CONFIG_ARCH_INTEGRATOR is not set
136# CONFIG_ARCH_REALVIEW is not set
137# CONFIG_ARCH_VERSATILE is not set
138# CONFIG_ARCH_AT91 is not set
139# CONFIG_ARCH_CLPS7500 is not set
140# CONFIG_ARCH_CLPS711X is not set
141# CONFIG_ARCH_EBSA110 is not set
142# CONFIG_ARCH_EP93XX is not set
143# CONFIG_ARCH_FOOTBRIDGE is not set
144# CONFIG_ARCH_NETX is not set
145# CONFIG_ARCH_H720X is not set
146# CONFIG_ARCH_IMX is not set
147# CONFIG_ARCH_IOP13XX is not set
148# CONFIG_ARCH_IOP32X is not set
149# CONFIG_ARCH_IOP33X is not set
150# CONFIG_ARCH_IXP23XX is not set
151# CONFIG_ARCH_IXP2000 is not set
152# CONFIG_ARCH_IXP4XX is not set
153# CONFIG_ARCH_L7200 is not set
154# CONFIG_ARCH_KIRKWOOD is not set
155# CONFIG_ARCH_KS8695 is not set
156# CONFIG_ARCH_NS9XXX is not set
157# CONFIG_ARCH_LOKI is not set
158# CONFIG_ARCH_MV78XX0 is not set
159# CONFIG_ARCH_MXC is not set
160# CONFIG_ARCH_ORION5X is not set
161# CONFIG_ARCH_PNX4008 is not set
162CONFIG_ARCH_PXA=y
163# CONFIG_ARCH_RPC is not set
164# CONFIG_ARCH_SA1100 is not set
165# CONFIG_ARCH_S3C2410 is not set
166# CONFIG_ARCH_SHARK is not set
167# CONFIG_ARCH_LH7A40X is not set
168# CONFIG_ARCH_DAVINCI is not set
169# CONFIG_ARCH_OMAP is not set
170# CONFIG_ARCH_MSM7X00A is not set
171
172#
173# Intel PXA2xx/PXA3xx Implementations
174#
175# CONFIG_ARCH_GUMSTIX is not set
176# CONFIG_ARCH_LUBBOCK is not set
177# CONFIG_MACH_LOGICPD_PXA270 is not set
178# CONFIG_MACH_MAINSTONE is not set
179# CONFIG_ARCH_PXA_IDP is not set
180# CONFIG_PXA_SHARPSL is not set
181# CONFIG_ARCH_PXA_ESERIES is not set
182CONFIG_MACH_H5000=y
183# CONFIG_MACH_TRIZEPS4 is not set
184# CONFIG_MACH_EM_X270 is not set
185# CONFIG_MACH_COLIBRI is not set
186# CONFIG_MACH_ZYLONITE is not set
187# CONFIG_MACH_LITTLETON is not set
188# CONFIG_MACH_TAVOREVB is not set
189# CONFIG_MACH_SAAR is not set
190# CONFIG_MACH_ARMCORE is not set
191# CONFIG_MACH_MAGICIAN is not set
192# CONFIG_MACH_PCM027 is not set
193# CONFIG_ARCH_PXA_PALM is not set
194# CONFIG_PXA_EZX is not set
195CONFIG_PXA25x=y
196# CONFIG_PXA_PWM is not set
197
198#
199# Boot options
200#
201
202#
203# Power management
204#
205
206#
207# Processor Type
208#
209CONFIG_CPU_32=y
210CONFIG_CPU_XSCALE=y
211CONFIG_CPU_32v5=y
212CONFIG_CPU_ABRT_EV5T=y
213CONFIG_CPU_PABRT_NOIFAR=y
214CONFIG_CPU_CACHE_VIVT=y
215CONFIG_CPU_TLB_V4WBI=y
216CONFIG_CPU_CP15=y
217CONFIG_CPU_CP15_MMU=y
218
219#
220# Processor Features
221#
222CONFIG_ARM_THUMB=y
223# CONFIG_CPU_DCACHE_DISABLE is not set
224# CONFIG_OUTER_CACHE is not set
225# CONFIG_IWMMXT is not set
226CONFIG_XSCALE_PMU=y
227
228#
229# Bus support
230#
231# CONFIG_PCI_SYSCALL is not set
232# CONFIG_ARCH_SUPPORTS_MSI is not set
233# CONFIG_PCCARD is not set
234
235#
236# Kernel Features
237#
238CONFIG_TICK_ONESHOT=y
239# CONFIG_NO_HZ is not set
240# CONFIG_HIGH_RES_TIMERS is not set
241CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
242# CONFIG_PREEMPT is not set
243CONFIG_HZ=100
244CONFIG_AEABI=y
245CONFIG_OABI_COMPAT=y
246CONFIG_ARCH_FLATMEM_HAS_HOLES=y
247# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
248CONFIG_SELECT_MEMORY_MODEL=y
249CONFIG_FLATMEM_MANUAL=y
250# CONFIG_DISCONTIGMEM_MANUAL is not set
251# CONFIG_SPARSEMEM_MANUAL is not set
252CONFIG_FLATMEM=y
253CONFIG_FLAT_NODE_MEM_MAP=y
254# CONFIG_SPARSEMEM_STATIC is not set
255# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
256CONFIG_PAGEFLAGS_EXTENDED=y
257CONFIG_SPLIT_PTLOCK_CPUS=4096
258# CONFIG_RESOURCES_64BIT is not set
259CONFIG_ZONE_DMA_FLAG=1
260CONFIG_BOUNCE=y
261CONFIG_VIRT_TO_BUS=y
262CONFIG_ALIGNMENT_TRAP=y
263
264#
265# Boot options
266#
267CONFIG_ZBOOT_ROM_TEXT=0x0
268CONFIG_ZBOOT_ROM_BSS=0x0
269CONFIG_CMDLINE="keepinitrd"
270# CONFIG_XIP_KERNEL is not set
271CONFIG_KEXEC=y
272CONFIG_ATAGS_PROC=y
273
274#
275# CPU Frequency scaling
276#
277# CONFIG_CPU_FREQ is not set
278
279#
280# Floating point emulation
281#
282
283#
284# At least one emulation must be selected
285#
286CONFIG_FPE_NWFPE=y
287# CONFIG_FPE_NWFPE_XP is not set
288# CONFIG_FPE_FASTFPE is not set
289
290#
291# Userspace binary formats
292#
293CONFIG_BINFMT_ELF=y
294# CONFIG_BINFMT_AOUT is not set
295# CONFIG_BINFMT_MISC is not set
296
297#
298# Power management options
299#
300CONFIG_PM=y
301# CONFIG_PM_DEBUG is not set
302CONFIG_PM_SLEEP=y
303CONFIG_SUSPEND=y
304CONFIG_SUSPEND_FREEZER=y
305CONFIG_APM_EMULATION=y
306CONFIG_ARCH_SUSPEND_POSSIBLE=y
307CONFIG_NET=y
308
309#
310# Networking options
311#
312CONFIG_PACKET=y
313CONFIG_PACKET_MMAP=y
314CONFIG_UNIX=y
315# CONFIG_NET_KEY is not set
316CONFIG_INET=y
317CONFIG_IP_MULTICAST=y
318# CONFIG_IP_ADVANCED_ROUTER is not set
319CONFIG_IP_FIB_HASH=y
320CONFIG_IP_PNP=y
321# CONFIG_IP_PNP_DHCP is not set
322# CONFIG_IP_PNP_BOOTP is not set
323# CONFIG_IP_PNP_RARP is not set
324# CONFIG_NET_IPIP is not set
325# CONFIG_NET_IPGRE is not set
326# CONFIG_IP_MROUTE is not set
327# CONFIG_ARPD is not set
328# CONFIG_SYN_COOKIES is not set
329# CONFIG_INET_AH is not set
330# CONFIG_INET_ESP is not set
331# CONFIG_INET_IPCOMP is not set
332# CONFIG_INET_XFRM_TUNNEL is not set
333# CONFIG_INET_TUNNEL is not set
334# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
335# CONFIG_INET_XFRM_MODE_TUNNEL is not set
336# CONFIG_INET_XFRM_MODE_BEET is not set
337# CONFIG_INET_LRO is not set
338# CONFIG_INET_DIAG is not set
339# CONFIG_TCP_CONG_ADVANCED is not set
340CONFIG_TCP_CONG_CUBIC=y
341CONFIG_DEFAULT_TCP_CONG="cubic"
342# CONFIG_TCP_MD5SIG is not set
343# CONFIG_IPV6 is not set
344# CONFIG_NETWORK_SECMARK is not set
345# CONFIG_NETFILTER is not set
346# CONFIG_IP_DCCP is not set
347# CONFIG_IP_SCTP is not set
348# CONFIG_TIPC is not set
349# CONFIG_ATM is not set
350# CONFIG_BRIDGE is not set
351# CONFIG_VLAN_8021Q is not set
352# CONFIG_DECNET is not set
353# CONFIG_LLC2 is not set
354# CONFIG_IPX is not set
355# CONFIG_ATALK is not set
356# CONFIG_X25 is not set
357# CONFIG_LAPB is not set
358# CONFIG_ECONET is not set
359# CONFIG_WAN_ROUTER is not set
360# CONFIG_NET_SCHED is not set
361
362#
363# Network testing
364#
365# CONFIG_NET_PKTGEN is not set
366# CONFIG_HAMRADIO is not set
367# CONFIG_CAN is not set
368# CONFIG_IRDA is not set
369# CONFIG_BT is not set
370# CONFIG_AF_RXRPC is not set
371
372#
373# Wireless
374#
375# CONFIG_CFG80211 is not set
376# CONFIG_WIRELESS_EXT is not set
377# CONFIG_MAC80211 is not set
378# CONFIG_IEEE80211 is not set
379# CONFIG_RFKILL is not set
380# CONFIG_NET_9P is not set
381
382#
383# Device Drivers
384#
385
386#
387# Generic Driver Options
388#
389CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
390CONFIG_STANDALONE=y
391CONFIG_PREVENT_FIRMWARE_BUILD=y
392CONFIG_FW_LOADER=y
393CONFIG_FIRMWARE_IN_KERNEL=y
394CONFIG_EXTRA_FIRMWARE=""
395# CONFIG_DEBUG_DRIVER is not set
396# CONFIG_DEBUG_DEVRES is not set
397# CONFIG_SYS_HYPERVISOR is not set
398# CONFIG_CONNECTOR is not set
399CONFIG_MTD=y
400# CONFIG_MTD_DEBUG is not set
401# CONFIG_MTD_CONCAT is not set
402CONFIG_MTD_PARTITIONS=y
403# CONFIG_MTD_REDBOOT_PARTS is not set
404# CONFIG_MTD_CMDLINE_PARTS is not set
405# CONFIG_MTD_AFS_PARTS is not set
406# CONFIG_MTD_AR7_PARTS is not set
407
408#
409# User Modules And Translation Layers
410#
411# CONFIG_MTD_CHAR is not set
412CONFIG_MTD_BLKDEVS=y
413CONFIG_MTD_BLOCK=y
414# CONFIG_FTL is not set
415# CONFIG_NFTL is not set
416# CONFIG_INFTL is not set
417# CONFIG_RFD_FTL is not set
418# CONFIG_SSFDC is not set
419# CONFIG_MTD_OOPS is not set
420
421#
422# RAM/ROM/Flash chip drivers
423#
424CONFIG_MTD_CFI=y
425# CONFIG_MTD_JEDECPROBE is not set
426CONFIG_MTD_GEN_PROBE=y
427CONFIG_MTD_CFI_ADV_OPTIONS=y
428CONFIG_MTD_CFI_NOSWAP=y
429# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
430# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
431CONFIG_MTD_CFI_GEOMETRY=y
432CONFIG_MTD_MAP_BANK_WIDTH_1=y
433CONFIG_MTD_MAP_BANK_WIDTH_2=y
434CONFIG_MTD_MAP_BANK_WIDTH_4=y
435# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
436# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
437# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
438CONFIG_MTD_CFI_I1=y
439CONFIG_MTD_CFI_I2=y
440# CONFIG_MTD_CFI_I4 is not set
441# CONFIG_MTD_CFI_I8 is not set
442# CONFIG_MTD_OTP is not set
443CONFIG_MTD_CFI_INTELEXT=y
444# CONFIG_MTD_CFI_AMDSTD is not set
445# CONFIG_MTD_CFI_STAA is not set
446CONFIG_MTD_CFI_UTIL=y
447# CONFIG_MTD_RAM is not set
448# CONFIG_MTD_ROM is not set
449# CONFIG_MTD_ABSENT is not set
450# CONFIG_MTD_XIP is not set
451
452#
453# Mapping drivers for chip access
454#
455# CONFIG_MTD_COMPLEX_MAPPINGS is not set
456CONFIG_MTD_PHYSMAP=y
457CONFIG_MTD_PHYSMAP_START=0x8000000
458CONFIG_MTD_PHYSMAP_LEN=0x0
459CONFIG_MTD_PHYSMAP_BANKWIDTH=2
460# CONFIG_MTD_PXA2XX is not set
461# CONFIG_MTD_ARM_INTEGRATOR is not set
462# CONFIG_MTD_SHARP_SL is not set
463# CONFIG_MTD_PLATRAM is not set
464
465#
466# Self-contained MTD device drivers
467#
468# CONFIG_MTD_SLRAM is not set
469# CONFIG_MTD_PHRAM is not set
470# CONFIG_MTD_MTDRAM is not set
471# CONFIG_MTD_BLOCK2MTD is not set
472
473#
474# Disk-On-Chip Device Drivers
475#
476# CONFIG_MTD_DOC2000 is not set
477# CONFIG_MTD_DOC2001 is not set
478# CONFIG_MTD_DOC2001PLUS is not set
479# CONFIG_MTD_NAND is not set
480# CONFIG_MTD_ONENAND is not set
481
482#
483# UBI - Unsorted block images
484#
485# CONFIG_MTD_UBI is not set
486# CONFIG_PARPORT is not set
487CONFIG_BLK_DEV=y
488# CONFIG_BLK_DEV_COW_COMMON is not set
489# CONFIG_BLK_DEV_LOOP is not set
490# CONFIG_BLK_DEV_NBD is not set
491# CONFIG_BLK_DEV_RAM is not set
492# CONFIG_CDROM_PKTCDVD is not set
493# CONFIG_ATA_OVER_ETH is not set
494CONFIG_MISC_DEVICES=y
495# CONFIG_EEPROM_93CX6 is not set
496# CONFIG_ENCLOSURE_SERVICES is not set
497CONFIG_HAVE_IDE=y
498# CONFIG_IDE is not set
499
500#
501# SCSI device support
502#
503# CONFIG_RAID_ATTRS is not set
504# CONFIG_SCSI is not set
505# CONFIG_SCSI_DMA is not set
506# CONFIG_SCSI_NETLINK is not set
507# CONFIG_ATA is not set
508# CONFIG_MD is not set
509# CONFIG_NETDEVICES is not set
510# CONFIG_ISDN is not set
511
512#
513# Input device support
514#
515CONFIG_INPUT=y
516# CONFIG_INPUT_FF_MEMLESS is not set
517# CONFIG_INPUT_POLLDEV is not set
518
519#
520# Userland interfaces
521#
522# CONFIG_INPUT_MOUSEDEV is not set
523# CONFIG_INPUT_JOYDEV is not set
524# CONFIG_INPUT_EVDEV is not set
525# CONFIG_INPUT_EVBUG is not set
526# CONFIG_INPUT_APMPOWER is not set
527
528#
529# Input Device Drivers
530#
531# CONFIG_INPUT_KEYBOARD is not set
532# CONFIG_INPUT_MOUSE is not set
533# CONFIG_INPUT_JOYSTICK is not set
534# CONFIG_INPUT_TABLET is not set
535# CONFIG_INPUT_TOUCHSCREEN is not set
536# CONFIG_INPUT_MISC is not set
537
538#
539# Hardware I/O ports
540#
541# CONFIG_SERIO is not set
542# CONFIG_GAMEPORT is not set
543
544#
545# Character devices
546#
547CONFIG_VT=y
548CONFIG_CONSOLE_TRANSLATIONS=y
549CONFIG_VT_CONSOLE=y
550CONFIG_HW_CONSOLE=y
551# CONFIG_VT_HW_CONSOLE_BINDING is not set
552CONFIG_DEVKMEM=y
553# CONFIG_SERIAL_NONSTANDARD is not set
554
555#
556# Serial drivers
557#
558# CONFIG_SERIAL_8250 is not set
559
560#
561# Non-8250 serial port support
562#
563CONFIG_SERIAL_PXA=y
564CONFIG_SERIAL_PXA_CONSOLE=y
565CONFIG_SERIAL_CORE=y
566CONFIG_SERIAL_CORE_CONSOLE=y
567CONFIG_UNIX98_PTYS=y
568CONFIG_LEGACY_PTYS=y
569CONFIG_LEGACY_PTY_COUNT=32
570# CONFIG_IPMI_HANDLER is not set
571# CONFIG_HW_RANDOM is not set
572# CONFIG_NVRAM is not set
573# CONFIG_R3964 is not set
574# CONFIG_RAW_DRIVER is not set
575# CONFIG_TCG_TPM is not set
576# CONFIG_I2C is not set
577# CONFIG_SPI is not set
578CONFIG_ARCH_REQUIRE_GPIOLIB=y
579CONFIG_GPIOLIB=y
580# CONFIG_DEBUG_GPIO is not set
581# CONFIG_GPIO_SYSFS is not set
582
583#
584# I2C GPIO expanders:
585#
586
587#
588# PCI GPIO expanders:
589#
590
591#
592# SPI GPIO expanders:
593#
594# CONFIG_W1 is not set
595# CONFIG_POWER_SUPPLY is not set
596# CONFIG_HWMON is not set
597# CONFIG_WATCHDOG is not set
598
599#
600# Sonics Silicon Backplane
601#
602CONFIG_SSB_POSSIBLE=y
603# CONFIG_SSB is not set
604
605#
606# Multifunction device drivers
607#
608# CONFIG_MFD_CORE is not set
609# CONFIG_MFD_SM501 is not set
610# CONFIG_HTC_EGPIO is not set
611# CONFIG_HTC_PASIC3 is not set
612# CONFIG_MFD_TMIO is not set
613# CONFIG_MFD_T7L66XB is not set
614# CONFIG_MFD_TC6387XB is not set
615# CONFIG_MFD_TC6393XB is not set
616
617#
618# Multimedia devices
619#
620
621#
622# Multimedia core support
623#
624# CONFIG_VIDEO_DEV is not set
625# CONFIG_DVB_CORE is not set
626# CONFIG_VIDEO_MEDIA is not set
627
628#
629# Multimedia drivers
630#
631# CONFIG_DAB is not set
632
633#
634# Graphics support
635#
636# CONFIG_VGASTATE is not set
637# CONFIG_VIDEO_OUTPUT_CONTROL is not set
638# CONFIG_FB is not set
639# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
640
641#
642# Display device support
643#
644# CONFIG_DISPLAY_SUPPORT is not set
645
646#
647# Console display driver support
648#
649# CONFIG_VGA_CONSOLE is not set
650CONFIG_DUMMY_CONSOLE=y
651# CONFIG_SOUND is not set
652# CONFIG_HID_SUPPORT is not set
653CONFIG_USB_SUPPORT=y
654CONFIG_USB_ARCH_HAS_HCD=y
655# CONFIG_USB_ARCH_HAS_OHCI is not set
656# CONFIG_USB_ARCH_HAS_EHCI is not set
657# CONFIG_USB is not set
658# CONFIG_USB_OTG_WHITELIST is not set
659# CONFIG_USB_OTG_BLACKLIST_HUB is not set
660# CONFIG_USB_MUSB_HDRC is not set
661# CONFIG_USB_GADGET_MUSB_HDRC is not set
662
663#
664# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
665#
666CONFIG_USB_GADGET=y
667# CONFIG_USB_GADGET_DEBUG is not set
668# CONFIG_USB_GADGET_DEBUG_FILES is not set
669CONFIG_USB_GADGET_SELECTED=y
670# CONFIG_USB_GADGET_AMD5536UDC is not set
671# CONFIG_USB_GADGET_ATMEL_USBA is not set
672# CONFIG_USB_GADGET_FSL_USB2 is not set
673# CONFIG_USB_GADGET_NET2280 is not set
674CONFIG_USB_GADGET_PXA25X=y
675CONFIG_USB_PXA25X=y
676CONFIG_USB_PXA25X_SMALL=y
677# CONFIG_USB_GADGET_M66592 is not set
678# CONFIG_USB_GADGET_PXA27X is not set
679# CONFIG_USB_GADGET_GOKU is not set
680# CONFIG_USB_GADGET_LH7A40X is not set
681# CONFIG_USB_GADGET_OMAP is not set
682# CONFIG_USB_GADGET_S3C2410 is not set
683# CONFIG_USB_GADGET_AT91 is not set
684# CONFIG_USB_GADGET_DUMMY_HCD is not set
685# CONFIG_USB_GADGET_DUALSPEED is not set
686# CONFIG_USB_ZERO is not set
687CONFIG_USB_ETH=y
688# CONFIG_USB_ETH_RNDIS is not set
689# CONFIG_USB_GADGETFS is not set
690# CONFIG_USB_FILE_STORAGE is not set
691# CONFIG_USB_G_SERIAL is not set
692# CONFIG_USB_MIDI_GADGET is not set
693# CONFIG_USB_G_PRINTER is not set
694# CONFIG_USB_CDC_COMPOSITE is not set
695# CONFIG_MMC is not set
696# CONFIG_NEW_LEDS is not set
697CONFIG_RTC_LIB=y
698CONFIG_RTC_CLASS=y
699CONFIG_RTC_HCTOSYS=y
700CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
701# CONFIG_RTC_DEBUG is not set
702
703#
704# RTC interfaces
705#
706CONFIG_RTC_INTF_SYSFS=y
707CONFIG_RTC_INTF_PROC=y
708CONFIG_RTC_INTF_DEV=y
709# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
710# CONFIG_RTC_DRV_TEST is not set
711
712#
713# SPI RTC drivers
714#
715
716#
717# Platform RTC drivers
718#
719# CONFIG_RTC_DRV_CMOS is not set
720# CONFIG_RTC_DRV_DS1511 is not set
721# CONFIG_RTC_DRV_DS1553 is not set
722# CONFIG_RTC_DRV_DS1742 is not set
723# CONFIG_RTC_DRV_STK17TA8 is not set
724# CONFIG_RTC_DRV_M48T86 is not set
725# CONFIG_RTC_DRV_M48T59 is not set
726# CONFIG_RTC_DRV_V3020 is not set
727
728#
729# on-CPU RTC drivers
730#
731CONFIG_RTC_DRV_SA1100=y
732# CONFIG_DMADEVICES is not set
733
734#
735# Voltage and Current regulators
736#
737# CONFIG_REGULATOR is not set
738# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
739# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
740# CONFIG_REGULATOR_BQ24022 is not set
741# CONFIG_UIO is not set
742
743#
744# File systems
745#
746CONFIG_EXT2_FS=y
747# CONFIG_EXT2_FS_XATTR is not set
748# CONFIG_EXT2_FS_XIP is not set
749# CONFIG_EXT3_FS is not set
750# CONFIG_EXT4DEV_FS is not set
751# CONFIG_REISERFS_FS is not set
752# CONFIG_JFS_FS is not set
753# CONFIG_FS_POSIX_ACL is not set
754# CONFIG_XFS_FS is not set
755# CONFIG_OCFS2_FS is not set
756CONFIG_DNOTIFY=y
757CONFIG_INOTIFY=y
758CONFIG_INOTIFY_USER=y
759# CONFIG_QUOTA is not set
760# CONFIG_AUTOFS_FS is not set
761# CONFIG_AUTOFS4_FS is not set
762# CONFIG_FUSE_FS is not set
763
764#
765# CD-ROM/DVD Filesystems
766#
767# CONFIG_ISO9660_FS is not set
768# CONFIG_UDF_FS is not set
769
770#
771# DOS/FAT/NT Filesystems
772#
773# CONFIG_MSDOS_FS is not set
774# CONFIG_VFAT_FS is not set
775# CONFIG_NTFS_FS is not set
776
777#
778# Pseudo filesystems
779#
780CONFIG_PROC_FS=y
781CONFIG_PROC_SYSCTL=y
782CONFIG_SYSFS=y
783CONFIG_TMPFS=y
784# CONFIG_TMPFS_POSIX_ACL is not set
785# CONFIG_HUGETLB_PAGE is not set
786# CONFIG_CONFIGFS_FS is not set
787
788#
789# Miscellaneous filesystems
790#
791# CONFIG_ADFS_FS is not set
792# CONFIG_AFFS_FS is not set
793# CONFIG_HFS_FS is not set
794# CONFIG_HFSPLUS_FS is not set
795# CONFIG_BEFS_FS is not set
796# CONFIG_BFS_FS is not set
797# CONFIG_EFS_FS is not set
798CONFIG_JFFS2_FS=y
799CONFIG_JFFS2_FS_DEBUG=0
800CONFIG_JFFS2_FS_WRITEBUFFER=y
801# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
802# CONFIG_JFFS2_SUMMARY is not set
803# CONFIG_JFFS2_FS_XATTR is not set
804CONFIG_JFFS2_COMPRESSION_OPTIONS=y
805CONFIG_JFFS2_ZLIB=y
806# CONFIG_JFFS2_LZO is not set
807CONFIG_JFFS2_RTIME=y
808# CONFIG_JFFS2_RUBIN is not set
809# CONFIG_JFFS2_CMODE_NONE is not set
810CONFIG_JFFS2_CMODE_PRIORITY=y
811# CONFIG_JFFS2_CMODE_SIZE is not set
812# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
813# CONFIG_CRAMFS is not set
814# CONFIG_VXFS_FS is not set
815# CONFIG_MINIX_FS is not set
816# CONFIG_OMFS_FS is not set
817# CONFIG_HPFS_FS is not set
818# CONFIG_QNX4FS_FS is not set
819# CONFIG_ROMFS_FS is not set
820# CONFIG_SYSV_FS is not set
821# CONFIG_UFS_FS is not set
822# CONFIG_NETWORK_FILESYSTEMS is not set
823
824#
825# Partition Types
826#
827# CONFIG_PARTITION_ADVANCED is not set
828CONFIG_MSDOS_PARTITION=y
829# CONFIG_NLS is not set
830# CONFIG_DLM is not set
831
832#
833# Kernel hacking
834#
835CONFIG_PRINTK_TIME=y
836CONFIG_ENABLE_WARN_DEPRECATED=y
837CONFIG_ENABLE_MUST_CHECK=y
838CONFIG_FRAME_WARN=1024
839# CONFIG_MAGIC_SYSRQ is not set
840# CONFIG_UNUSED_SYMBOLS is not set
841# CONFIG_DEBUG_FS is not set
842# CONFIG_HEADERS_CHECK is not set
843CONFIG_DEBUG_KERNEL=y
844# CONFIG_DEBUG_SHIRQ is not set
845CONFIG_DETECT_SOFTLOCKUP=y
846# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
847CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
848# CONFIG_SCHED_DEBUG is not set
849# CONFIG_SCHEDSTATS is not set
850# CONFIG_TIMER_STATS is not set
851# CONFIG_DEBUG_OBJECTS is not set
852# CONFIG_DEBUG_SLAB is not set
853# CONFIG_DEBUG_RT_MUTEXES is not set
854# CONFIG_RT_MUTEX_TESTER is not set
855# CONFIG_DEBUG_SPINLOCK is not set
856# CONFIG_DEBUG_MUTEXES is not set
857# CONFIG_DEBUG_LOCK_ALLOC is not set
858# CONFIG_PROVE_LOCKING is not set
859# CONFIG_LOCK_STAT is not set
860# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
861# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
862# CONFIG_DEBUG_KOBJECT is not set
863# CONFIG_DEBUG_BUGVERBOSE is not set
864# CONFIG_DEBUG_INFO is not set
865# CONFIG_DEBUG_VM is not set
866# CONFIG_DEBUG_WRITECOUNT is not set
867# CONFIG_DEBUG_MEMORY_INIT is not set
868# CONFIG_DEBUG_LIST is not set
869# CONFIG_DEBUG_SG is not set
870CONFIG_FRAME_POINTER=y
871# CONFIG_BOOT_PRINTK_DELAY is not set
872# CONFIG_RCU_TORTURE_TEST is not set
873# CONFIG_BACKTRACE_SELF_TEST is not set
874# CONFIG_FAULT_INJECTION is not set
875# CONFIG_LATENCYTOP is not set
876CONFIG_SYSCTL_SYSCALL_CHECK=y
877CONFIG_HAVE_FTRACE=y
878CONFIG_HAVE_DYNAMIC_FTRACE=y
879# CONFIG_FTRACE is not set
880# CONFIG_IRQSOFF_TRACER is not set
881# CONFIG_SCHED_TRACER is not set
882# CONFIG_CONTEXT_SWITCH_TRACER is not set
883# CONFIG_SAMPLES is not set
884CONFIG_HAVE_ARCH_KGDB=y
885# CONFIG_KGDB is not set
886# CONFIG_DEBUG_USER is not set
887# CONFIG_DEBUG_ERRORS is not set
888# CONFIG_DEBUG_STACK_USAGE is not set
889# CONFIG_DEBUG_LL is not set
890
891#
892# Security options
893#
894# CONFIG_KEYS is not set
895# CONFIG_SECURITY is not set
896# CONFIG_SECURITY_FILE_CAPABILITIES is not set
897CONFIG_CRYPTO=y
898
899#
900# Crypto core or helper
901#
902CONFIG_CRYPTO_ALGAPI=y
903CONFIG_CRYPTO_HASH=y
904CONFIG_CRYPTO_MANAGER=y
905# CONFIG_CRYPTO_GF128MUL is not set
906# CONFIG_CRYPTO_NULL is not set
907# CONFIG_CRYPTO_CRYPTD is not set
908# CONFIG_CRYPTO_AUTHENC is not set
909# CONFIG_CRYPTO_TEST is not set
910
911#
912# Authenticated Encryption with Associated Data
913#
914# CONFIG_CRYPTO_CCM is not set
915# CONFIG_CRYPTO_GCM is not set
916# CONFIG_CRYPTO_SEQIV is not set
917
918#
919# Block modes
920#
921# CONFIG_CRYPTO_CBC is not set
922# CONFIG_CRYPTO_CTR is not set
923# CONFIG_CRYPTO_CTS is not set
924# CONFIG_CRYPTO_ECB is not set
925# CONFIG_CRYPTO_LRW is not set
926# CONFIG_CRYPTO_PCBC is not set
927# CONFIG_CRYPTO_XTS is not set
928
929#
930# Hash modes
931#
932CONFIG_CRYPTO_HMAC=y
933# CONFIG_CRYPTO_XCBC is not set
934
935#
936# Digest
937#
938# CONFIG_CRYPTO_CRC32C is not set
939# CONFIG_CRYPTO_MD4 is not set
940CONFIG_CRYPTO_MD5=y
941# CONFIG_CRYPTO_MICHAEL_MIC is not set
942# CONFIG_CRYPTO_RMD128 is not set
943# CONFIG_CRYPTO_RMD160 is not set
944# CONFIG_CRYPTO_RMD256 is not set
945# CONFIG_CRYPTO_RMD320 is not set
946CONFIG_CRYPTO_SHA1=y
947# CONFIG_CRYPTO_SHA256 is not set
948# CONFIG_CRYPTO_SHA512 is not set
949# CONFIG_CRYPTO_TGR192 is not set
950# CONFIG_CRYPTO_WP512 is not set
951
952#
953# Ciphers
954#
955# CONFIG_CRYPTO_AES is not set
956# CONFIG_CRYPTO_ANUBIS is not set
957# CONFIG_CRYPTO_ARC4 is not set
958# CONFIG_CRYPTO_BLOWFISH is not set
959# CONFIG_CRYPTO_CAMELLIA is not set
960# CONFIG_CRYPTO_CAST5 is not set
961# CONFIG_CRYPTO_CAST6 is not set
962CONFIG_CRYPTO_DES=y
963# CONFIG_CRYPTO_FCRYPT is not set
964# CONFIG_CRYPTO_KHAZAD is not set
965# CONFIG_CRYPTO_SALSA20 is not set
966# CONFIG_CRYPTO_SEED is not set
967# CONFIG_CRYPTO_SERPENT is not set
968# CONFIG_CRYPTO_TEA is not set
969# CONFIG_CRYPTO_TWOFISH is not set
970
971#
972# Compression
973#
974CONFIG_CRYPTO_DEFLATE=y
975# CONFIG_CRYPTO_LZO is not set
976# CONFIG_CRYPTO_HW is not set
977
978#
979# Library routines
980#
981CONFIG_BITREVERSE=y
982# CONFIG_GENERIC_FIND_FIRST_BIT is not set
983# CONFIG_GENERIC_FIND_NEXT_BIT is not set
984CONFIG_CRC_CCITT=y
985# CONFIG_CRC16 is not set
986# CONFIG_CRC_T10DIF is not set
987# CONFIG_CRC_ITU_T is not set
988CONFIG_CRC32=y
989# CONFIG_CRC7 is not set
990# CONFIG_LIBCRC32C is not set
991CONFIG_ZLIB_INFLATE=y
992CONFIG_ZLIB_DEFLATE=y
993CONFIG_PLIST=y
994CONFIG_HAS_IOMEM=y
995CONFIG_HAS_IOPORT=y
996CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/neocore926_defconfig b/arch/arm/configs/neocore926_defconfig
new file mode 100644
index 000000000000..325f1e105f69
--- /dev/null
+++ b/arch/arm/configs/neocore926_defconfig
@@ -0,0 +1,1302 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc1
4# Tue Jul 29 10:46:54 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ARCH_SUPPORTS_AOUT=y
26CONFIG_ZONE_DMA=y
27CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
28CONFIG_VECTORS_BASE=0xffff0000
29CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
30
31#
32# General setup
33#
34CONFIG_EXPERIMENTAL=y
35CONFIG_BROKEN_ON_SMP=y
36CONFIG_INIT_ENV_ARG_LIMIT=32
37CONFIG_LOCALVERSION=""
38# CONFIG_LOCALVERSION_AUTO is not set
39# CONFIG_SWAP is not set
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42# CONFIG_POSIX_MQUEUE is not set
43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set
46# CONFIG_IKCONFIG is not set
47CONFIG_LOG_BUF_SHIFT=17
48# CONFIG_CGROUPS is not set
49# CONFIG_GROUP_SCHED is not set
50# CONFIG_SYSFS_DEPRECATED_V2 is not set
51# CONFIG_RELAY is not set
52CONFIG_NAMESPACES=y
53# CONFIG_UTS_NS is not set
54# CONFIG_IPC_NS is not set
55# CONFIG_USER_NS is not set
56# CONFIG_PID_NS is not set
57CONFIG_BLK_DEV_INITRD=y
58CONFIG_INITRAMFS_SOURCE=""
59CONFIG_CC_OPTIMIZE_FOR_SIZE=y
60CONFIG_SYSCTL=y
61# CONFIG_EMBEDDED is not set
62CONFIG_UID16=y
63CONFIG_SYSCTL_SYSCALL=y
64CONFIG_SYSCTL_SYSCALL_CHECK=y
65CONFIG_KALLSYMS=y
66# CONFIG_KALLSYMS_EXTRA_PASS is not set
67CONFIG_HOTPLUG=y
68CONFIG_PRINTK=y
69CONFIG_BUG=y
70CONFIG_ELF_CORE=y
71# CONFIG_COMPAT_BRK is not set
72CONFIG_BASE_FULL=y
73CONFIG_FUTEX=y
74CONFIG_ANON_INODES=y
75CONFIG_EPOLL=y
76CONFIG_SIGNALFD=y
77CONFIG_TIMERFD=y
78CONFIG_EVENTFD=y
79CONFIG_SHMEM=y
80CONFIG_VM_EVENT_COUNTERS=y
81CONFIG_SLUB_DEBUG=y
82# CONFIG_SLAB is not set
83CONFIG_SLUB=y
84# CONFIG_SLOB is not set
85# CONFIG_PROFILING is not set
86# CONFIG_MARKERS is not set
87CONFIG_HAVE_OPROFILE=y
88# CONFIG_KPROBES is not set
89# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
90# CONFIG_HAVE_IOREMAP_PROT is not set
91CONFIG_HAVE_KPROBES=y
92CONFIG_HAVE_KRETPROBES=y
93# CONFIG_HAVE_ARCH_TRACEHOOK is not set
94# CONFIG_HAVE_DMA_ATTRS is not set
95# CONFIG_USE_GENERIC_SMP_HELPERS is not set
96CONFIG_HAVE_CLK=y
97CONFIG_PROC_PAGE_MONITOR=y
98CONFIG_HAVE_GENERIC_DMA_COHERENT=y
99CONFIG_SLABINFO=y
100CONFIG_RT_MUTEXES=y
101# CONFIG_TINY_SHMEM is not set
102CONFIG_BASE_SMALL=0
103CONFIG_MODULES=y
104# CONFIG_MODULE_FORCE_LOAD is not set
105CONFIG_MODULE_UNLOAD=y
106# CONFIG_MODULE_FORCE_UNLOAD is not set
107# CONFIG_MODVERSIONS is not set
108# CONFIG_MODULE_SRCVERSION_ALL is not set
109CONFIG_KMOD=y
110CONFIG_BLOCK=y
111# CONFIG_LBD is not set
112# CONFIG_BLK_DEV_IO_TRACE is not set
113# CONFIG_LSF is not set
114# CONFIG_BLK_DEV_BSG is not set
115# CONFIG_BLK_DEV_INTEGRITY is not set
116
117#
118# IO Schedulers
119#
120CONFIG_IOSCHED_NOOP=y
121# CONFIG_IOSCHED_AS is not set
122# CONFIG_IOSCHED_DEADLINE is not set
123# CONFIG_IOSCHED_CFQ is not set
124# CONFIG_DEFAULT_AS is not set
125# CONFIG_DEFAULT_DEADLINE is not set
126# CONFIG_DEFAULT_CFQ is not set
127CONFIG_DEFAULT_NOOP=y
128CONFIG_DEFAULT_IOSCHED="noop"
129CONFIG_CLASSIC_RCU=y
130
131#
132# System Type
133#
134# CONFIG_ARCH_AAEC2000 is not set
135# CONFIG_ARCH_INTEGRATOR is not set
136# CONFIG_ARCH_REALVIEW is not set
137# CONFIG_ARCH_VERSATILE is not set
138CONFIG_ARCH_AT91=y
139# CONFIG_ARCH_CLPS7500 is not set
140# CONFIG_ARCH_CLPS711X is not set
141# CONFIG_ARCH_EBSA110 is not set
142# CONFIG_ARCH_EP93XX is not set
143# CONFIG_ARCH_FOOTBRIDGE is not set
144# CONFIG_ARCH_NETX is not set
145# CONFIG_ARCH_H720X is not set
146# CONFIG_ARCH_IMX is not set
147# CONFIG_ARCH_IOP13XX is not set
148# CONFIG_ARCH_IOP32X is not set
149# CONFIG_ARCH_IOP33X is not set
150# CONFIG_ARCH_IXP23XX is not set
151# CONFIG_ARCH_IXP2000 is not set
152# CONFIG_ARCH_IXP4XX is not set
153# CONFIG_ARCH_L7200 is not set
154# CONFIG_ARCH_KIRKWOOD is not set
155# CONFIG_ARCH_KS8695 is not set
156# CONFIG_ARCH_NS9XXX is not set
157# CONFIG_ARCH_LOKI is not set
158# CONFIG_ARCH_MV78XX0 is not set
159# CONFIG_ARCH_MXC is not set
160# CONFIG_ARCH_ORION5X is not set
161# CONFIG_ARCH_PNX4008 is not set
162# CONFIG_ARCH_PXA is not set
163# CONFIG_ARCH_RPC is not set
164# CONFIG_ARCH_SA1100 is not set
165# CONFIG_ARCH_S3C2410 is not set
166# CONFIG_ARCH_SHARK is not set
167# CONFIG_ARCH_LH7A40X is not set
168# CONFIG_ARCH_DAVINCI is not set
169# CONFIG_ARCH_OMAP is not set
170# CONFIG_ARCH_MSM7X00A is not set
171
172#
173# Boot options
174#
175
176#
177# Power management
178#
179
180#
181# Atmel AT91 System-on-Chip
182#
183# CONFIG_ARCH_AT91RM9200 is not set
184# CONFIG_ARCH_AT91SAM9260 is not set
185# CONFIG_ARCH_AT91SAM9261 is not set
186CONFIG_ARCH_AT91SAM9263=y
187# CONFIG_ARCH_AT91SAM9RL is not set
188# CONFIG_ARCH_AT91SAM9G20 is not set
189# CONFIG_ARCH_AT91CAP9 is not set
190# CONFIG_ARCH_AT91X40 is not set
191CONFIG_AT91_PMC_UNIT=y
192
193#
194# AT91SAM9263 Board Type
195#
196# CONFIG_MACH_AT91SAM9263EK is not set
197# CONFIG_MACH_USB_A9263 is not set
198CONFIG_MACH_NEOCORE926=y
199
200#
201# AT91 Board Options
202#
203CONFIG_MTD_AT91_DATAFLASH_CARD=y
204
205#
206# AT91 Feature Selections
207#
208# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
209CONFIG_AT91_TIMER_HZ=100
210CONFIG_AT91_EARLY_DBGU=y
211# CONFIG_AT91_EARLY_USART0 is not set
212# CONFIG_AT91_EARLY_USART1 is not set
213# CONFIG_AT91_EARLY_USART2 is not set
214# CONFIG_AT91_EARLY_USART3 is not set
215# CONFIG_AT91_EARLY_USART4 is not set
216# CONFIG_AT91_EARLY_USART5 is not set
217
218#
219# Processor Type
220#
221CONFIG_CPU_32=y
222CONFIG_CPU_ARM926T=y
223CONFIG_CPU_32v5=y
224CONFIG_CPU_ABRT_EV5TJ=y
225CONFIG_CPU_PABRT_NOIFAR=y
226CONFIG_CPU_CACHE_VIVT=y
227CONFIG_CPU_COPY_V4WB=y
228CONFIG_CPU_TLB_V4WBI=y
229CONFIG_CPU_CP15=y
230CONFIG_CPU_CP15_MMU=y
231
232#
233# Processor Features
234#
235CONFIG_ARM_THUMB=y
236# CONFIG_CPU_ICACHE_DISABLE is not set
237# CONFIG_CPU_DCACHE_DISABLE is not set
238# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
239# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
240# CONFIG_OUTER_CACHE is not set
241
242#
243# Bus support
244#
245# CONFIG_PCI_SYSCALL is not set
246# CONFIG_ARCH_SUPPORTS_MSI is not set
247# CONFIG_PCCARD is not set
248
249#
250# Kernel Features
251#
252# CONFIG_TICK_ONESHOT is not set
253# CONFIG_NO_HZ is not set
254# CONFIG_HIGH_RES_TIMERS is not set
255CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
256# CONFIG_PREEMPT is not set
257CONFIG_HZ=100
258# CONFIG_AEABI is not set
259# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
260CONFIG_SELECT_MEMORY_MODEL=y
261CONFIG_FLATMEM_MANUAL=y
262# CONFIG_DISCONTIGMEM_MANUAL is not set
263# CONFIG_SPARSEMEM_MANUAL is not set
264CONFIG_FLATMEM=y
265CONFIG_FLAT_NODE_MEM_MAP=y
266# CONFIG_SPARSEMEM_STATIC is not set
267# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
268CONFIG_PAGEFLAGS_EXTENDED=y
269CONFIG_SPLIT_PTLOCK_CPUS=4096
270# CONFIG_RESOURCES_64BIT is not set
271CONFIG_ZONE_DMA_FLAG=1
272CONFIG_BOUNCE=y
273CONFIG_VIRT_TO_BUS=y
274# CONFIG_LEDS is not set
275CONFIG_ALIGNMENT_TRAP=y
276
277#
278# Boot options
279#
280CONFIG_ZBOOT_ROM_TEXT=0x0
281CONFIG_ZBOOT_ROM_BSS=0x0
282CONFIG_CMDLINE=""
283# CONFIG_XIP_KERNEL is not set
284# CONFIG_KEXEC is not set
285
286#
287# Floating point emulation
288#
289
290#
291# At least one emulation must be selected
292#
293CONFIG_FPE_NWFPE=y
294# CONFIG_FPE_NWFPE_XP is not set
295# CONFIG_FPE_FASTFPE is not set
296# CONFIG_VFP is not set
297
298#
299# Userspace binary formats
300#
301CONFIG_BINFMT_ELF=y
302# CONFIG_BINFMT_AOUT is not set
303# CONFIG_BINFMT_MISC is not set
304# CONFIG_ARTHUR is not set
305
306#
307# Power management options
308#
309# CONFIG_PM is not set
310CONFIG_ARCH_SUSPEND_POSSIBLE=y
311
312#
313# Networking
314#
315CONFIG_NET=y
316
317#
318# Networking options
319#
320CONFIG_PACKET=y
321# CONFIG_PACKET_MMAP is not set
322CONFIG_UNIX=y
323CONFIG_XFRM=y
324# CONFIG_XFRM_USER is not set
325# CONFIG_XFRM_SUB_POLICY is not set
326# CONFIG_XFRM_MIGRATE is not set
327# CONFIG_XFRM_STATISTICS is not set
328CONFIG_NET_KEY=y
329# CONFIG_NET_KEY_MIGRATE is not set
330CONFIG_INET=y
331# CONFIG_IP_MULTICAST is not set
332# CONFIG_IP_ADVANCED_ROUTER is not set
333CONFIG_IP_FIB_HASH=y
334CONFIG_IP_PNP=y
335CONFIG_IP_PNP_DHCP=y
336CONFIG_IP_PNP_BOOTP=y
337CONFIG_IP_PNP_RARP=y
338CONFIG_NET_IPIP=y
339# CONFIG_NET_IPGRE is not set
340# CONFIG_ARPD is not set
341# CONFIG_SYN_COOKIES is not set
342# CONFIG_INET_AH is not set
343# CONFIG_INET_ESP is not set
344# CONFIG_INET_IPCOMP is not set
345# CONFIG_INET_XFRM_TUNNEL is not set
346CONFIG_INET_TUNNEL=y
347CONFIG_INET_XFRM_MODE_TRANSPORT=y
348CONFIG_INET_XFRM_MODE_TUNNEL=y
349CONFIG_INET_XFRM_MODE_BEET=y
350# CONFIG_INET_LRO is not set
351CONFIG_INET_DIAG=y
352CONFIG_INET_TCP_DIAG=y
353# CONFIG_TCP_CONG_ADVANCED is not set
354CONFIG_TCP_CONG_CUBIC=y
355CONFIG_DEFAULT_TCP_CONG="cubic"
356# CONFIG_TCP_MD5SIG is not set
357CONFIG_IPV6=y
358# CONFIG_IPV6_PRIVACY is not set
359# CONFIG_IPV6_ROUTER_PREF is not set
360# CONFIG_IPV6_OPTIMISTIC_DAD is not set
361# CONFIG_INET6_AH is not set
362# CONFIG_INET6_ESP is not set
363# CONFIG_INET6_IPCOMP is not set
364# CONFIG_IPV6_MIP6 is not set
365# CONFIG_INET6_XFRM_TUNNEL is not set
366# CONFIG_INET6_TUNNEL is not set
367CONFIG_INET6_XFRM_MODE_TRANSPORT=y
368CONFIG_INET6_XFRM_MODE_TUNNEL=y
369CONFIG_INET6_XFRM_MODE_BEET=y
370# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
371CONFIG_IPV6_SIT=y
372CONFIG_IPV6_NDISC_NODETYPE=y
373# CONFIG_IPV6_TUNNEL is not set
374# CONFIG_IPV6_MULTIPLE_TABLES is not set
375# CONFIG_IPV6_MROUTE is not set
376# CONFIG_NETWORK_SECMARK is not set
377# CONFIG_NETFILTER is not set
378# CONFIG_IP_DCCP is not set
379# CONFIG_IP_SCTP is not set
380# CONFIG_TIPC is not set
381# CONFIG_ATM is not set
382# CONFIG_BRIDGE is not set
383# CONFIG_VLAN_8021Q is not set
384# CONFIG_DECNET is not set
385# CONFIG_LLC2 is not set
386# CONFIG_IPX is not set
387# CONFIG_ATALK is not set
388# CONFIG_X25 is not set
389# CONFIG_LAPB is not set
390# CONFIG_ECONET is not set
391# CONFIG_WAN_ROUTER is not set
392# CONFIG_NET_SCHED is not set
393
394#
395# Network testing
396#
397# CONFIG_NET_PKTGEN is not set
398# CONFIG_HAMRADIO is not set
399# CONFIG_CAN is not set
400# CONFIG_IRDA is not set
401# CONFIG_BT is not set
402# CONFIG_AF_RXRPC is not set
403
404#
405# Wireless
406#
407# CONFIG_CFG80211 is not set
408# CONFIG_WIRELESS_EXT is not set
409# CONFIG_MAC80211 is not set
410# CONFIG_IEEE80211 is not set
411# CONFIG_RFKILL is not set
412# CONFIG_NET_9P is not set
413
414#
415# Device Drivers
416#
417
418#
419# Generic Driver Options
420#
421CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
422CONFIG_STANDALONE=y
423# CONFIG_PREVENT_FIRMWARE_BUILD is not set
424CONFIG_FW_LOADER=y
425CONFIG_FIRMWARE_IN_KERNEL=y
426CONFIG_EXTRA_FIRMWARE=""
427# CONFIG_SYS_HYPERVISOR is not set
428# CONFIG_CONNECTOR is not set
429CONFIG_MTD=y
430# CONFIG_MTD_DEBUG is not set
431# CONFIG_MTD_CONCAT is not set
432CONFIG_MTD_PARTITIONS=y
433# CONFIG_MTD_REDBOOT_PARTS is not set
434# CONFIG_MTD_CMDLINE_PARTS is not set
435# CONFIG_MTD_AFS_PARTS is not set
436# CONFIG_MTD_AR7_PARTS is not set
437
438#
439# User Modules And Translation Layers
440#
441CONFIG_MTD_CHAR=y
442CONFIG_MTD_BLKDEVS=y
443CONFIG_MTD_BLOCK=y
444# CONFIG_FTL is not set
445CONFIG_NFTL=y
446CONFIG_NFTL_RW=y
447# CONFIG_INFTL is not set
448# CONFIG_RFD_FTL is not set
449# CONFIG_SSFDC is not set
450# CONFIG_MTD_OOPS is not set
451
452#
453# RAM/ROM/Flash chip drivers
454#
455# CONFIG_MTD_CFI is not set
456# CONFIG_MTD_JEDECPROBE is not set
457CONFIG_MTD_MAP_BANK_WIDTH_1=y
458CONFIG_MTD_MAP_BANK_WIDTH_2=y
459CONFIG_MTD_MAP_BANK_WIDTH_4=y
460# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
461# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
462# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
463CONFIG_MTD_CFI_I1=y
464CONFIG_MTD_CFI_I2=y
465# CONFIG_MTD_CFI_I4 is not set
466# CONFIG_MTD_CFI_I8 is not set
467# CONFIG_MTD_RAM is not set
468# CONFIG_MTD_ROM is not set
469# CONFIG_MTD_ABSENT is not set
470
471#
472# Mapping drivers for chip access
473#
474# CONFIG_MTD_COMPLEX_MAPPINGS is not set
475# CONFIG_MTD_PLATRAM is not set
476
477#
478# Self-contained MTD device drivers
479#
480# CONFIG_MTD_DATAFLASH is not set
481# CONFIG_MTD_M25P80 is not set
482# CONFIG_MTD_SLRAM is not set
483# CONFIG_MTD_PHRAM is not set
484# CONFIG_MTD_MTDRAM is not set
485CONFIG_MTD_BLOCK2MTD=y
486
487#
488# Disk-On-Chip Device Drivers
489#
490# CONFIG_MTD_DOC2000 is not set
491# CONFIG_MTD_DOC2001 is not set
492# CONFIG_MTD_DOC2001PLUS is not set
493CONFIG_MTD_NAND=y
494CONFIG_MTD_NAND_VERIFY_WRITE=y
495CONFIG_MTD_NAND_ECC_SMC=y
496# CONFIG_MTD_NAND_MUSEUM_IDS is not set
497CONFIG_MTD_NAND_IDS=y
498# CONFIG_MTD_NAND_DISKONCHIP is not set
499CONFIG_MTD_NAND_ATMEL=y
500CONFIG_MTD_NAND_ATMEL_ECC_HW=y
501# CONFIG_MTD_NAND_ATMEL_ECC_SOFT is not set
502# CONFIG_MTD_NAND_ATMEL_ECC_NONE is not set
503# CONFIG_MTD_NAND_NANDSIM is not set
504CONFIG_MTD_NAND_PLATFORM=y
505# CONFIG_MTD_ALAUDA is not set
506# CONFIG_MTD_ONENAND is not set
507
508#
509# UBI - Unsorted block images
510#
511# CONFIG_MTD_UBI is not set
512# CONFIG_PARPORT is not set
513CONFIG_BLK_DEV=y
514# CONFIG_BLK_DEV_COW_COMMON is not set
515CONFIG_BLK_DEV_LOOP=y
516# CONFIG_BLK_DEV_CRYPTOLOOP is not set
517CONFIG_BLK_DEV_NBD=y
518# CONFIG_BLK_DEV_UB is not set
519# CONFIG_BLK_DEV_RAM is not set
520# CONFIG_CDROM_PKTCDVD is not set
521# CONFIG_ATA_OVER_ETH is not set
522CONFIG_MISC_DEVICES=y
523CONFIG_ATMEL_PWM=y
524CONFIG_ATMEL_TCLIB=y
525CONFIG_ATMEL_TCB_CLKSRC=y
526CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
527# CONFIG_EEPROM_93CX6 is not set
528# CONFIG_ATMEL_SSC is not set
529# CONFIG_ENCLOSURE_SERVICES is not set
530CONFIG_HAVE_IDE=y
531# CONFIG_IDE is not set
532
533#
534# SCSI device support
535#
536# CONFIG_RAID_ATTRS is not set
537CONFIG_SCSI=y
538CONFIG_SCSI_DMA=y
539# CONFIG_SCSI_TGT is not set
540# CONFIG_SCSI_NETLINK is not set
541CONFIG_SCSI_PROC_FS=y
542
543#
544# SCSI support type (disk, tape, CD-ROM)
545#
546# CONFIG_BLK_DEV_SD is not set
547# CONFIG_CHR_DEV_ST is not set
548# CONFIG_CHR_DEV_OSST is not set
549# CONFIG_BLK_DEV_SR is not set
550CONFIG_CHR_DEV_SG=y
551# CONFIG_CHR_DEV_SCH is not set
552
553#
554# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
555#
556# CONFIG_SCSI_MULTI_LUN is not set
557# CONFIG_SCSI_CONSTANTS is not set
558# CONFIG_SCSI_LOGGING is not set
559# CONFIG_SCSI_SCAN_ASYNC is not set
560CONFIG_SCSI_WAIT_SCAN=m
561
562#
563# SCSI Transports
564#
565# CONFIG_SCSI_SPI_ATTRS is not set
566# CONFIG_SCSI_FC_ATTRS is not set
567# CONFIG_SCSI_ISCSI_ATTRS is not set
568# CONFIG_SCSI_SAS_LIBSAS is not set
569# CONFIG_SCSI_SRP_ATTRS is not set
570CONFIG_SCSI_LOWLEVEL=y
571# CONFIG_ISCSI_TCP is not set
572# CONFIG_SCSI_DEBUG is not set
573# CONFIG_SCSI_DH is not set
574# CONFIG_ATA is not set
575# CONFIG_MD is not set
576CONFIG_NETDEVICES=y
577# CONFIG_DUMMY is not set
578# CONFIG_BONDING is not set
579# CONFIG_MACVLAN is not set
580# CONFIG_EQUALIZER is not set
581# CONFIG_TUN is not set
582# CONFIG_VETH is not set
583CONFIG_PHYLIB=y
584
585#
586# MII PHY device drivers
587#
588# CONFIG_MARVELL_PHY is not set
589# CONFIG_DAVICOM_PHY is not set
590# CONFIG_QSEMI_PHY is not set
591# CONFIG_LXT_PHY is not set
592# CONFIG_CICADA_PHY is not set
593# CONFIG_VITESSE_PHY is not set
594CONFIG_SMSC_PHY=y
595# CONFIG_BROADCOM_PHY is not set
596# CONFIG_ICPLUS_PHY is not set
597# CONFIG_REALTEK_PHY is not set
598# CONFIG_FIXED_PHY is not set
599# CONFIG_MDIO_BITBANG is not set
600CONFIG_NET_ETHERNET=y
601# CONFIG_MII is not set
602CONFIG_MACB=y
603# CONFIG_AX88796 is not set
604# CONFIG_SMC91X is not set
605# CONFIG_DM9000 is not set
606# CONFIG_ENC28J60 is not set
607# CONFIG_IBM_NEW_EMAC_ZMII is not set
608# CONFIG_IBM_NEW_EMAC_RGMII is not set
609# CONFIG_IBM_NEW_EMAC_TAH is not set
610# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
611# CONFIG_B44 is not set
612# CONFIG_NETDEV_1000 is not set
613# CONFIG_NETDEV_10000 is not set
614
615#
616# Wireless LAN
617#
618# CONFIG_WLAN_PRE80211 is not set
619# CONFIG_WLAN_80211 is not set
620# CONFIG_IWLWIFI_LEDS is not set
621
622#
623# USB Network Adapters
624#
625# CONFIG_USB_CATC is not set
626# CONFIG_USB_KAWETH is not set
627# CONFIG_USB_PEGASUS is not set
628# CONFIG_USB_RTL8150 is not set
629# CONFIG_USB_USBNET is not set
630# CONFIG_WAN is not set
631# CONFIG_PPP is not set
632# CONFIG_SLIP is not set
633# CONFIG_NETCONSOLE is not set
634# CONFIG_NETPOLL is not set
635# CONFIG_NET_POLL_CONTROLLER is not set
636# CONFIG_ISDN is not set
637
638#
639# Input device support
640#
641CONFIG_INPUT=y
642# CONFIG_INPUT_FF_MEMLESS is not set
643# CONFIG_INPUT_POLLDEV is not set
644
645#
646# Userland interfaces
647#
648CONFIG_INPUT_MOUSEDEV=y
649# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
650CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
651CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
652# CONFIG_INPUT_JOYDEV is not set
653CONFIG_INPUT_EVDEV=y
654# CONFIG_INPUT_EVBUG is not set
655
656#
657# Input Device Drivers
658#
659CONFIG_INPUT_KEYBOARD=y
660CONFIG_KEYBOARD_ATKBD=y
661# CONFIG_KEYBOARD_SUNKBD is not set
662# CONFIG_KEYBOARD_LKKBD is not set
663# CONFIG_KEYBOARD_XTKBD is not set
664# CONFIG_KEYBOARD_NEWTON is not set
665# CONFIG_KEYBOARD_STOWAWAY is not set
666# CONFIG_KEYBOARD_GPIO is not set
667CONFIG_INPUT_MOUSE=y
668CONFIG_MOUSE_PS2=y
669CONFIG_MOUSE_PS2_ALPS=y
670CONFIG_MOUSE_PS2_LOGIPS2PP=y
671CONFIG_MOUSE_PS2_SYNAPTICS=y
672CONFIG_MOUSE_PS2_LIFEBOOK=y
673CONFIG_MOUSE_PS2_TRACKPOINT=y
674# CONFIG_MOUSE_PS2_TOUCHKIT is not set
675# CONFIG_MOUSE_SERIAL is not set
676# CONFIG_MOUSE_APPLETOUCH is not set
677# CONFIG_MOUSE_VSXXXAA is not set
678# CONFIG_MOUSE_GPIO is not set
679# CONFIG_INPUT_JOYSTICK is not set
680# CONFIG_INPUT_TABLET is not set
681CONFIG_INPUT_TOUCHSCREEN=y
682CONFIG_TOUCHSCREEN_ADS7846=y
683# CONFIG_TOUCHSCREEN_FUJITSU is not set
684# CONFIG_TOUCHSCREEN_GUNZE is not set
685# CONFIG_TOUCHSCREEN_ELO is not set
686# CONFIG_TOUCHSCREEN_MTOUCH is not set
687# CONFIG_TOUCHSCREEN_INEXIO is not set
688# CONFIG_TOUCHSCREEN_MK712 is not set
689# CONFIG_TOUCHSCREEN_PENMOUNT is not set
690# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
691# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
692# CONFIG_TOUCHSCREEN_UCB1400 is not set
693# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
694# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
695# CONFIG_INPUT_MISC is not set
696
697#
698# Hardware I/O ports
699#
700CONFIG_SERIO=y
701CONFIG_SERIO_SERPORT=y
702CONFIG_SERIO_LIBPS2=y
703# CONFIG_SERIO_RAW is not set
704# CONFIG_GAMEPORT is not set
705
706#
707# Character devices
708#
709CONFIG_VT=y
710CONFIG_CONSOLE_TRANSLATIONS=y
711CONFIG_VT_CONSOLE=y
712CONFIG_HW_CONSOLE=y
713CONFIG_VT_HW_CONSOLE_BINDING=y
714# CONFIG_DEVKMEM is not set
715CONFIG_SERIAL_NONSTANDARD=y
716# CONFIG_N_HDLC is not set
717# CONFIG_RISCOM8 is not set
718# CONFIG_SPECIALIX is not set
719# CONFIG_RIO is not set
720# CONFIG_STALDRV is not set
721
722#
723# Serial drivers
724#
725# CONFIG_SERIAL_8250 is not set
726
727#
728# Non-8250 serial port support
729#
730CONFIG_SERIAL_ATMEL=y
731CONFIG_SERIAL_ATMEL_CONSOLE=y
732# CONFIG_SERIAL_ATMEL_PDC is not set
733# CONFIG_SERIAL_ATMEL_TTYAT is not set
734CONFIG_SERIAL_CORE=y
735CONFIG_SERIAL_CORE_CONSOLE=y
736CONFIG_UNIX98_PTYS=y
737CONFIG_LEGACY_PTYS=y
738CONFIG_LEGACY_PTY_COUNT=256
739# CONFIG_IPMI_HANDLER is not set
740# CONFIG_HW_RANDOM is not set
741# CONFIG_NVRAM is not set
742# CONFIG_R3964 is not set
743# CONFIG_RAW_DRIVER is not set
744# CONFIG_TCG_TPM is not set
745CONFIG_I2C=y
746CONFIG_I2C_BOARDINFO=y
747CONFIG_I2C_CHARDEV=y
748
749#
750# I2C Hardware Bus support
751#
752
753#
754# I2C system bus drivers (mostly embedded / system-on-chip)
755#
756# CONFIG_I2C_GPIO is not set
757# CONFIG_I2C_OCORES is not set
758# CONFIG_I2C_SIMTEC is not set
759
760#
761# External I2C/SMBus adapter drivers
762#
763# CONFIG_I2C_PARPORT_LIGHT is not set
764# CONFIG_I2C_TAOS_EVM is not set
765# CONFIG_I2C_TINY_USB is not set
766
767#
768# Other I2C/SMBus bus drivers
769#
770# CONFIG_I2C_PCA_PLATFORM is not set
771# CONFIG_I2C_STUB is not set
772
773#
774# Miscellaneous I2C Chip support
775#
776# CONFIG_DS1682 is not set
777# CONFIG_AT24 is not set
778# CONFIG_SENSORS_EEPROM is not set
779# CONFIG_SENSORS_PCF8574 is not set
780# CONFIG_PCF8575 is not set
781# CONFIG_SENSORS_PCA9539 is not set
782# CONFIG_SENSORS_PCF8591 is not set
783# CONFIG_SENSORS_MAX6875 is not set
784# CONFIG_SENSORS_TSL2550 is not set
785# CONFIG_I2C_DEBUG_CORE is not set
786# CONFIG_I2C_DEBUG_ALGO is not set
787# CONFIG_I2C_DEBUG_BUS is not set
788# CONFIG_I2C_DEBUG_CHIP is not set
789CONFIG_SPI=y
790CONFIG_SPI_MASTER=y
791
792#
793# SPI Master Controller Drivers
794#
795CONFIG_SPI_ATMEL=y
796# CONFIG_SPI_BITBANG is not set
797
798#
799# SPI Protocol Masters
800#
801# CONFIG_SPI_AT25 is not set
802# CONFIG_SPI_SPIDEV is not set
803# CONFIG_SPI_TLE62X0 is not set
804# CONFIG_W1 is not set
805# CONFIG_POWER_SUPPLY is not set
806# CONFIG_HWMON is not set
807# CONFIG_WATCHDOG is not set
808
809#
810# Sonics Silicon Backplane
811#
812CONFIG_SSB_POSSIBLE=y
813# CONFIG_SSB is not set
814
815#
816# Multifunction device drivers
817#
818# CONFIG_MFD_CORE is not set
819# CONFIG_MFD_SM501 is not set
820# CONFIG_HTC_PASIC3 is not set
821
822#
823# Multimedia devices
824#
825
826#
827# Multimedia core support
828#
829# CONFIG_VIDEO_DEV is not set
830# CONFIG_DVB_CORE is not set
831# CONFIG_VIDEO_MEDIA is not set
832
833#
834# Multimedia drivers
835#
836# CONFIG_DAB is not set
837
838#
839# Graphics support
840#
841# CONFIG_VGASTATE is not set
842CONFIG_VIDEO_OUTPUT_CONTROL=y
843CONFIG_FB=y
844# CONFIG_FIRMWARE_EDID is not set
845# CONFIG_FB_DDC is not set
846CONFIG_FB_CFB_FILLRECT=y
847CONFIG_FB_CFB_COPYAREA=y
848CONFIG_FB_CFB_IMAGEBLIT=y
849# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
850# CONFIG_FB_SYS_FILLRECT is not set
851# CONFIG_FB_SYS_COPYAREA is not set
852# CONFIG_FB_SYS_IMAGEBLIT is not set
853# CONFIG_FB_FOREIGN_ENDIAN is not set
854# CONFIG_FB_SYS_FOPS is not set
855# CONFIG_FB_SVGALIB is not set
856# CONFIG_FB_MACMODES is not set
857# CONFIG_FB_BACKLIGHT is not set
858# CONFIG_FB_MODE_HELPERS is not set
859# CONFIG_FB_TILEBLITTING is not set
860
861#
862# Frame buffer hardware drivers
863#
864# CONFIG_FB_S1D13XXX is not set
865CONFIG_FB_ATMEL=y
866# CONFIG_FB_VIRTUAL is not set
867CONFIG_BACKLIGHT_LCD_SUPPORT=y
868CONFIG_LCD_CLASS_DEVICE=y
869# CONFIG_LCD_LTV350QV is not set
870# CONFIG_LCD_ILI9320 is not set
871# CONFIG_LCD_VGG2432A4 is not set
872# CONFIG_LCD_PLATFORM is not set
873CONFIG_BACKLIGHT_CLASS_DEVICE=y
874CONFIG_BACKLIGHT_ATMEL_LCDC=y
875# CONFIG_BACKLIGHT_ATMEL_PWM is not set
876# CONFIG_BACKLIGHT_CORGI is not set
877
878#
879# Display device support
880#
881# CONFIG_DISPLAY_SUPPORT is not set
882
883#
884# Console display driver support
885#
886# CONFIG_VGA_CONSOLE is not set
887CONFIG_DUMMY_CONSOLE=y
888CONFIG_FRAMEBUFFER_CONSOLE=y
889CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
890# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
891# CONFIG_FONTS is not set
892CONFIG_FONT_8x8=y
893CONFIG_FONT_8x16=y
894CONFIG_LOGO=y
895CONFIG_LOGO_LINUX_MONO=y
896CONFIG_LOGO_LINUX_VGA16=y
897CONFIG_LOGO_LINUX_CLUT224=y
898# CONFIG_SOUND is not set
899CONFIG_HID_SUPPORT=y
900CONFIG_HID=y
901CONFIG_HID_DEBUG=y
902# CONFIG_HIDRAW is not set
903
904#
905# USB Input Devices
906#
907CONFIG_USB_HID=y
908# CONFIG_USB_HIDINPUT_POWERBOOK is not set
909# CONFIG_HID_FF is not set
910# CONFIG_USB_HIDDEV is not set
911CONFIG_USB_SUPPORT=y
912CONFIG_USB_ARCH_HAS_HCD=y
913CONFIG_USB_ARCH_HAS_OHCI=y
914# CONFIG_USB_ARCH_HAS_EHCI is not set
915CONFIG_USB=y
916# CONFIG_USB_DEBUG is not set
917# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
918
919#
920# Miscellaneous USB options
921#
922CONFIG_USB_DEVICEFS=y
923CONFIG_USB_DEVICE_CLASS=y
924# CONFIG_USB_DYNAMIC_MINORS is not set
925# CONFIG_USB_OTG is not set
926
927#
928# USB Host Controller Drivers
929#
930# CONFIG_USB_C67X00_HCD is not set
931# CONFIG_USB_ISP116X_HCD is not set
932# CONFIG_USB_ISP1760_HCD is not set
933CONFIG_USB_OHCI_HCD=y
934# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
935# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
936CONFIG_USB_OHCI_LITTLE_ENDIAN=y
937# CONFIG_USB_SL811_HCD is not set
938# CONFIG_USB_R8A66597_HCD is not set
939
940#
941# USB Device Class drivers
942#
943# CONFIG_USB_ACM is not set
944# CONFIG_USB_PRINTER is not set
945# CONFIG_USB_WDM is not set
946
947#
948# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
949#
950
951#
952# may also be needed; see USB_STORAGE Help for more information
953#
954CONFIG_USB_STORAGE=y
955# CONFIG_USB_STORAGE_DEBUG is not set
956# CONFIG_USB_STORAGE_DATAFAB is not set
957# CONFIG_USB_STORAGE_FREECOM is not set
958# CONFIG_USB_STORAGE_ISD200 is not set
959# CONFIG_USB_STORAGE_DPCM is not set
960# CONFIG_USB_STORAGE_USBAT is not set
961# CONFIG_USB_STORAGE_SDDR09 is not set
962# CONFIG_USB_STORAGE_SDDR55 is not set
963# CONFIG_USB_STORAGE_JUMPSHOT is not set
964# CONFIG_USB_STORAGE_ALAUDA is not set
965# CONFIG_USB_STORAGE_ONETOUCH is not set
966# CONFIG_USB_STORAGE_KARMA is not set
967# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
968# CONFIG_USB_LIBUSUAL is not set
969
970#
971# USB Imaging devices
972#
973# CONFIG_USB_MDC800 is not set
974# CONFIG_USB_MICROTEK is not set
975CONFIG_USB_MON=y
976
977#
978# USB port drivers
979#
980# CONFIG_USB_SERIAL is not set
981
982#
983# USB Miscellaneous drivers
984#
985# CONFIG_USB_EMI62 is not set
986# CONFIG_USB_EMI26 is not set
987# CONFIG_USB_ADUTUX is not set
988# CONFIG_USB_AUERSWALD is not set
989# CONFIG_USB_RIO500 is not set
990# CONFIG_USB_LEGOTOWER is not set
991# CONFIG_USB_LCD is not set
992# CONFIG_USB_BERRY_CHARGE is not set
993# CONFIG_USB_LED is not set
994# CONFIG_USB_CYPRESS_CY7C63 is not set
995# CONFIG_USB_CYTHERM is not set
996# CONFIG_USB_PHIDGET is not set
997# CONFIG_USB_IDMOUSE is not set
998# CONFIG_USB_FTDI_ELAN is not set
999# CONFIG_USB_APPLEDISPLAY is not set
1000# CONFIG_USB_LD is not set
1001# CONFIG_USB_TRANCEVIBRATOR is not set
1002# CONFIG_USB_IOWARRIOR is not set
1003# CONFIG_USB_TEST is not set
1004# CONFIG_USB_ISIGHTFW is not set
1005# CONFIG_USB_GADGET is not set
1006CONFIG_MMC=y
1007# CONFIG_MMC_DEBUG is not set
1008# CONFIG_MMC_UNSAFE_RESUME is not set
1009
1010#
1011# MMC/SD Card Drivers
1012#
1013CONFIG_MMC_BLOCK=y
1014CONFIG_MMC_BLOCK_BOUNCE=y
1015CONFIG_SDIO_UART=y
1016# CONFIG_MMC_TEST is not set
1017
1018#
1019# MMC/SD Host Controller Drivers
1020#
1021# CONFIG_MMC_SDHCI is not set
1022CONFIG_MMC_AT91=y
1023# CONFIG_MMC_SPI is not set
1024# CONFIG_NEW_LEDS is not set
1025CONFIG_RTC_LIB=y
1026# CONFIG_RTC_CLASS is not set
1027# CONFIG_DMADEVICES is not set
1028# CONFIG_UIO is not set
1029
1030#
1031# File systems
1032#
1033CONFIG_EXT2_FS=y
1034# CONFIG_EXT2_FS_XATTR is not set
1035# CONFIG_EXT2_FS_XIP is not set
1036# CONFIG_EXT3_FS is not set
1037# CONFIG_EXT4DEV_FS is not set
1038# CONFIG_REISERFS_FS is not set
1039# CONFIG_JFS_FS is not set
1040# CONFIG_FS_POSIX_ACL is not set
1041# CONFIG_XFS_FS is not set
1042# CONFIG_OCFS2_FS is not set
1043# CONFIG_DNOTIFY is not set
1044# CONFIG_INOTIFY is not set
1045# CONFIG_QUOTA is not set
1046CONFIG_AUTOFS_FS=y
1047# CONFIG_AUTOFS4_FS is not set
1048# CONFIG_FUSE_FS is not set
1049
1050#
1051# CD-ROM/DVD Filesystems
1052#
1053# CONFIG_ISO9660_FS is not set
1054# CONFIG_UDF_FS is not set
1055
1056#
1057# DOS/FAT/NT Filesystems
1058#
1059CONFIG_FAT_FS=y
1060# CONFIG_MSDOS_FS is not set
1061CONFIG_VFAT_FS=y
1062CONFIG_FAT_DEFAULT_CODEPAGE=437
1063CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1064# CONFIG_NTFS_FS is not set
1065
1066#
1067# Pseudo filesystems
1068#
1069CONFIG_PROC_FS=y
1070CONFIG_PROC_SYSCTL=y
1071CONFIG_SYSFS=y
1072CONFIG_TMPFS=y
1073# CONFIG_TMPFS_POSIX_ACL is not set
1074# CONFIG_HUGETLB_PAGE is not set
1075# CONFIG_CONFIGFS_FS is not set
1076
1077#
1078# Miscellaneous filesystems
1079#
1080# CONFIG_ADFS_FS is not set
1081# CONFIG_AFFS_FS is not set
1082# CONFIG_HFS_FS is not set
1083# CONFIG_HFSPLUS_FS is not set
1084# CONFIG_BEFS_FS is not set
1085# CONFIG_BFS_FS is not set
1086# CONFIG_EFS_FS is not set
1087CONFIG_JFFS2_FS=y
1088CONFIG_JFFS2_FS_DEBUG=0
1089CONFIG_JFFS2_FS_WRITEBUFFER=y
1090CONFIG_JFFS2_FS_WBUF_VERIFY=y
1091# CONFIG_JFFS2_SUMMARY is not set
1092# CONFIG_JFFS2_FS_XATTR is not set
1093# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1094CONFIG_JFFS2_ZLIB=y
1095# CONFIG_JFFS2_LZO is not set
1096CONFIG_JFFS2_RTIME=y
1097# CONFIG_JFFS2_RUBIN is not set
1098# CONFIG_CRAMFS is not set
1099# CONFIG_VXFS_FS is not set
1100# CONFIG_MINIX_FS is not set
1101# CONFIG_OMFS_FS is not set
1102# CONFIG_HPFS_FS is not set
1103# CONFIG_QNX4FS_FS is not set
1104# CONFIG_ROMFS_FS is not set
1105# CONFIG_SYSV_FS is not set
1106# CONFIG_UFS_FS is not set
1107CONFIG_NETWORK_FILESYSTEMS=y
1108CONFIG_NFS_FS=y
1109# CONFIG_NFS_V3 is not set
1110# CONFIG_NFS_V4 is not set
1111CONFIG_ROOT_NFS=y
1112# CONFIG_NFSD is not set
1113CONFIG_LOCKD=y
1114CONFIG_NFS_COMMON=y
1115CONFIG_SUNRPC=y
1116# CONFIG_RPCSEC_GSS_KRB5 is not set
1117# CONFIG_RPCSEC_GSS_SPKM3 is not set
1118# CONFIG_SMB_FS is not set
1119# CONFIG_CIFS is not set
1120# CONFIG_NCP_FS is not set
1121# CONFIG_CODA_FS is not set
1122# CONFIG_AFS_FS is not set
1123
1124#
1125# Partition Types
1126#
1127# CONFIG_PARTITION_ADVANCED is not set
1128CONFIG_MSDOS_PARTITION=y
1129CONFIG_NLS=y
1130CONFIG_NLS_DEFAULT="iso8859-1"
1131# CONFIG_NLS_CODEPAGE_437 is not set
1132# CONFIG_NLS_CODEPAGE_737 is not set
1133# CONFIG_NLS_CODEPAGE_775 is not set
1134# CONFIG_NLS_CODEPAGE_850 is not set
1135# CONFIG_NLS_CODEPAGE_852 is not set
1136# CONFIG_NLS_CODEPAGE_855 is not set
1137# CONFIG_NLS_CODEPAGE_857 is not set
1138# CONFIG_NLS_CODEPAGE_860 is not set
1139# CONFIG_NLS_CODEPAGE_861 is not set
1140# CONFIG_NLS_CODEPAGE_862 is not set
1141# CONFIG_NLS_CODEPAGE_863 is not set
1142# CONFIG_NLS_CODEPAGE_864 is not set
1143# CONFIG_NLS_CODEPAGE_865 is not set
1144# CONFIG_NLS_CODEPAGE_866 is not set
1145# CONFIG_NLS_CODEPAGE_869 is not set
1146# CONFIG_NLS_CODEPAGE_936 is not set
1147# CONFIG_NLS_CODEPAGE_950 is not set
1148# CONFIG_NLS_CODEPAGE_932 is not set
1149# CONFIG_NLS_CODEPAGE_949 is not set
1150# CONFIG_NLS_CODEPAGE_874 is not set
1151# CONFIG_NLS_ISO8859_8 is not set
1152# CONFIG_NLS_CODEPAGE_1250 is not set
1153# CONFIG_NLS_CODEPAGE_1251 is not set
1154# CONFIG_NLS_ASCII is not set
1155# CONFIG_NLS_ISO8859_1 is not set
1156# CONFIG_NLS_ISO8859_2 is not set
1157# CONFIG_NLS_ISO8859_3 is not set
1158# CONFIG_NLS_ISO8859_4 is not set
1159# CONFIG_NLS_ISO8859_5 is not set
1160# CONFIG_NLS_ISO8859_6 is not set
1161# CONFIG_NLS_ISO8859_7 is not set
1162# CONFIG_NLS_ISO8859_9 is not set
1163# CONFIG_NLS_ISO8859_13 is not set
1164# CONFIG_NLS_ISO8859_14 is not set
1165# CONFIG_NLS_ISO8859_15 is not set
1166# CONFIG_NLS_KOI8_R is not set
1167# CONFIG_NLS_KOI8_U is not set
1168# CONFIG_NLS_UTF8 is not set
1169# CONFIG_DLM is not set
1170
1171#
1172# Kernel hacking
1173#
1174# CONFIG_PRINTK_TIME is not set
1175# CONFIG_ENABLE_WARN_DEPRECATED is not set
1176# CONFIG_ENABLE_MUST_CHECK is not set
1177CONFIG_FRAME_WARN=1024
1178# CONFIG_MAGIC_SYSRQ is not set
1179# CONFIG_UNUSED_SYMBOLS is not set
1180# CONFIG_DEBUG_FS is not set
1181# CONFIG_HEADERS_CHECK is not set
1182# CONFIG_DEBUG_KERNEL is not set
1183# CONFIG_SLUB_DEBUG_ON is not set
1184# CONFIG_SLUB_STATS is not set
1185CONFIG_DEBUG_BUGVERBOSE=y
1186CONFIG_DEBUG_MEMORY_INIT=y
1187CONFIG_FRAME_POINTER=y
1188# CONFIG_LATENCYTOP is not set
1189CONFIG_HAVE_FTRACE=y
1190CONFIG_HAVE_DYNAMIC_FTRACE=y
1191# CONFIG_FTRACE is not set
1192# CONFIG_IRQSOFF_TRACER is not set
1193# CONFIG_SCHED_TRACER is not set
1194# CONFIG_CONTEXT_SWITCH_TRACER is not set
1195# CONFIG_SAMPLES is not set
1196CONFIG_HAVE_ARCH_KGDB=y
1197# CONFIG_DEBUG_USER is not set
1198
1199#
1200# Security options
1201#
1202# CONFIG_KEYS is not set
1203# CONFIG_SECURITY is not set
1204# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1205CONFIG_CRYPTO=y
1206
1207#
1208# Crypto core or helper
1209#
1210# CONFIG_CRYPTO_MANAGER is not set
1211# CONFIG_CRYPTO_GF128MUL is not set
1212# CONFIG_CRYPTO_NULL is not set
1213# CONFIG_CRYPTO_CRYPTD is not set
1214# CONFIG_CRYPTO_AUTHENC is not set
1215# CONFIG_CRYPTO_TEST is not set
1216
1217#
1218# Authenticated Encryption with Associated Data
1219#
1220# CONFIG_CRYPTO_CCM is not set
1221# CONFIG_CRYPTO_GCM is not set
1222# CONFIG_CRYPTO_SEQIV is not set
1223
1224#
1225# Block modes
1226#
1227# CONFIG_CRYPTO_CBC is not set
1228# CONFIG_CRYPTO_CTR is not set
1229# CONFIG_CRYPTO_CTS is not set
1230# CONFIG_CRYPTO_ECB is not set
1231# CONFIG_CRYPTO_LRW is not set
1232# CONFIG_CRYPTO_PCBC is not set
1233# CONFIG_CRYPTO_XTS is not set
1234
1235#
1236# Hash modes
1237#
1238# CONFIG_CRYPTO_HMAC is not set
1239# CONFIG_CRYPTO_XCBC is not set
1240
1241#
1242# Digest
1243#
1244# CONFIG_CRYPTO_CRC32C is not set
1245# CONFIG_CRYPTO_MD4 is not set
1246# CONFIG_CRYPTO_MD5 is not set
1247# CONFIG_CRYPTO_MICHAEL_MIC is not set
1248# CONFIG_CRYPTO_RMD128 is not set
1249# CONFIG_CRYPTO_RMD160 is not set
1250# CONFIG_CRYPTO_RMD256 is not set
1251# CONFIG_CRYPTO_RMD320 is not set
1252# CONFIG_CRYPTO_SHA1 is not set
1253# CONFIG_CRYPTO_SHA256 is not set
1254# CONFIG_CRYPTO_SHA512 is not set
1255# CONFIG_CRYPTO_TGR192 is not set
1256# CONFIG_CRYPTO_WP512 is not set
1257
1258#
1259# Ciphers
1260#
1261# CONFIG_CRYPTO_AES is not set
1262# CONFIG_CRYPTO_ANUBIS is not set
1263# CONFIG_CRYPTO_ARC4 is not set
1264# CONFIG_CRYPTO_BLOWFISH is not set
1265# CONFIG_CRYPTO_CAMELLIA is not set
1266# CONFIG_CRYPTO_CAST5 is not set
1267# CONFIG_CRYPTO_CAST6 is not set
1268# CONFIG_CRYPTO_DES is not set
1269# CONFIG_CRYPTO_FCRYPT is not set
1270# CONFIG_CRYPTO_KHAZAD is not set
1271# CONFIG_CRYPTO_SALSA20 is not set
1272# CONFIG_CRYPTO_SEED is not set
1273# CONFIG_CRYPTO_SERPENT is not set
1274# CONFIG_CRYPTO_TEA is not set
1275# CONFIG_CRYPTO_TWOFISH is not set
1276
1277#
1278# Compression
1279#
1280# CONFIG_CRYPTO_DEFLATE is not set
1281# CONFIG_CRYPTO_LZO is not set
1282# CONFIG_CRYPTO_HW is not set
1283
1284#
1285# Library routines
1286#
1287CONFIG_BITREVERSE=y
1288# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1289# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1290# CONFIG_CRC_CCITT is not set
1291# CONFIG_CRC16 is not set
1292# CONFIG_CRC_T10DIF is not set
1293# CONFIG_CRC_ITU_T is not set
1294CONFIG_CRC32=y
1295# CONFIG_CRC7 is not set
1296# CONFIG_LIBCRC32C is not set
1297CONFIG_ZLIB_INFLATE=y
1298CONFIG_ZLIB_DEFLATE=y
1299CONFIG_PLIST=y
1300CONFIG_HAS_IOMEM=y
1301CONFIG_HAS_IOPORT=y
1302CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/realview-smp_defconfig b/arch/arm/configs/realview-smp_defconfig
index 0c09b23167ec..cd29824d791c 100644
--- a/arch/arm/configs/realview-smp_defconfig
+++ b/arch/arm/configs/realview-smp_defconfig
@@ -1,84 +1,111 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.19-rc3 3# Linux kernel version: 2.6.28-rc2
4# Wed Oct 25 14:12:00 2006 4# Mon Nov 10 14:41:47 2008
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7# CONFIG_GENERIC_TIME is not set 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8# CONFIG_GENERIC_GPIO is not set
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
8CONFIG_MMU=y 11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
9CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
10CONFIG_TRACE_IRQFLAGS_SUPPORT=y 16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
11CONFIG_HARDIRQS_SW_RESEND=y 17CONFIG_HARDIRQS_SW_RESEND=y
12CONFIG_GENERIC_IRQ_PROBE=y 18CONFIG_GENERIC_IRQ_PROBE=y
13CONFIG_RWSEM_GENERIC_SPINLOCK=y 19CONFIG_RWSEM_GENERIC_SPINLOCK=y
20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
14CONFIG_GENERIC_HWEIGHT=y 22CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_CALIBRATE_DELAY=y 23CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_VECTORS_BASE=0xffff0000 25CONFIG_VECTORS_BASE=0xffff0000
17CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 26CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
18 27
19# 28#
20# Code maturity level options 29# General setup
21# 30#
22CONFIG_EXPERIMENTAL=y 31CONFIG_EXPERIMENTAL=y
23CONFIG_LOCK_KERNEL=y 32CONFIG_LOCK_KERNEL=y
24CONFIG_INIT_ENV_ARG_LIMIT=32 33CONFIG_INIT_ENV_ARG_LIMIT=32
25
26#
27# General setup
28#
29CONFIG_LOCALVERSION="" 34CONFIG_LOCALVERSION=""
30CONFIG_LOCALVERSION_AUTO=y 35CONFIG_LOCALVERSION_AUTO=y
31# CONFIG_SWAP is not set 36# CONFIG_SWAP is not set
32CONFIG_SYSVIPC=y 37CONFIG_SYSVIPC=y
33# CONFIG_IPC_NS is not set 38CONFIG_SYSVIPC_SYSCTL=y
34# CONFIG_POSIX_MQUEUE is not set 39# CONFIG_POSIX_MQUEUE is not set
35# CONFIG_BSD_PROCESS_ACCT is not set 40# CONFIG_BSD_PROCESS_ACCT is not set
36# CONFIG_TASKSTATS is not set 41# CONFIG_TASKSTATS is not set
37# CONFIG_UTS_NS is not set
38# CONFIG_AUDIT is not set 42# CONFIG_AUDIT is not set
39# CONFIG_IKCONFIG is not set 43# CONFIG_IKCONFIG is not set
40# CONFIG_CPUSETS is not set 44CONFIG_LOG_BUF_SHIFT=14
45# CONFIG_CGROUPS is not set
46# CONFIG_GROUP_SCHED is not set
47CONFIG_SYSFS_DEPRECATED=y
48CONFIG_SYSFS_DEPRECATED_V2=y
41# CONFIG_RELAY is not set 49# CONFIG_RELAY is not set
42CONFIG_INITRAMFS_SOURCE="" 50CONFIG_NAMESPACES=y
51# CONFIG_UTS_NS is not set
52# CONFIG_IPC_NS is not set
53# CONFIG_USER_NS is not set
54# CONFIG_PID_NS is not set
55# CONFIG_BLK_DEV_INITRD is not set
43CONFIG_CC_OPTIMIZE_FOR_SIZE=y 56CONFIG_CC_OPTIMIZE_FOR_SIZE=y
44CONFIG_SYSCTL=y 57CONFIG_SYSCTL=y
45# CONFIG_EMBEDDED is not set 58# CONFIG_EMBEDDED is not set
46CONFIG_UID16=y 59CONFIG_UID16=y
47# CONFIG_SYSCTL_SYSCALL is not set 60CONFIG_SYSCTL_SYSCALL=y
48CONFIG_KALLSYMS=y 61CONFIG_KALLSYMS=y
49CONFIG_KALLSYMS_ALL=y 62# CONFIG_KALLSYMS_ALL is not set
50# CONFIG_KALLSYMS_EXTRA_PASS is not set 63# CONFIG_KALLSYMS_EXTRA_PASS is not set
51CONFIG_HOTPLUG=y 64CONFIG_HOTPLUG=y
52CONFIG_PRINTK=y 65CONFIG_PRINTK=y
53CONFIG_BUG=y 66CONFIG_BUG=y
54CONFIG_ELF_CORE=y 67CONFIG_ELF_CORE=y
68CONFIG_COMPAT_BRK=y
55CONFIG_BASE_FULL=y 69CONFIG_BASE_FULL=y
56CONFIG_FUTEX=y 70CONFIG_FUTEX=y
71CONFIG_ANON_INODES=y
57CONFIG_EPOLL=y 72CONFIG_EPOLL=y
73CONFIG_SIGNALFD=y
74CONFIG_TIMERFD=y
75CONFIG_EVENTFD=y
58CONFIG_SHMEM=y 76CONFIG_SHMEM=y
59CONFIG_SLAB=y 77CONFIG_AIO=y
60CONFIG_VM_EVENT_COUNTERS=y 78CONFIG_VM_EVENT_COUNTERS=y
79CONFIG_SLAB=y
80# CONFIG_SLUB is not set
81# CONFIG_SLOB is not set
82# CONFIG_PROFILING is not set
83# CONFIG_MARKERS is not set
84CONFIG_HAVE_OPROFILE=y
85# CONFIG_KPROBES is not set
86CONFIG_HAVE_KPROBES=y
87CONFIG_HAVE_KRETPROBES=y
88CONFIG_USE_GENERIC_SMP_HELPERS=y
89CONFIG_HAVE_CLK=y
90CONFIG_HAVE_GENERIC_DMA_COHERENT=y
91CONFIG_SLABINFO=y
61CONFIG_RT_MUTEXES=y 92CONFIG_RT_MUTEXES=y
62# CONFIG_TINY_SHMEM is not set 93# CONFIG_TINY_SHMEM is not set
63CONFIG_BASE_SMALL=0 94CONFIG_BASE_SMALL=0
64# CONFIG_SLOB is not set
65
66#
67# Loadable module support
68#
69CONFIG_MODULES=y 95CONFIG_MODULES=y
96# CONFIG_MODULE_FORCE_LOAD is not set
70CONFIG_MODULE_UNLOAD=y 97CONFIG_MODULE_UNLOAD=y
71# CONFIG_MODULE_FORCE_UNLOAD is not set 98# CONFIG_MODULE_FORCE_UNLOAD is not set
72# CONFIG_MODVERSIONS is not set 99# CONFIG_MODVERSIONS is not set
73# CONFIG_MODULE_SRCVERSION_ALL is not set 100# CONFIG_MODULE_SRCVERSION_ALL is not set
74# CONFIG_KMOD is not set 101CONFIG_KMOD=y
75CONFIG_STOP_MACHINE=y 102CONFIG_STOP_MACHINE=y
76
77#
78# Block layer
79#
80CONFIG_BLOCK=y 103CONFIG_BLOCK=y
104# CONFIG_LBD is not set
81# CONFIG_BLK_DEV_IO_TRACE is not set 105# CONFIG_BLK_DEV_IO_TRACE is not set
106# CONFIG_LSF is not set
107# CONFIG_BLK_DEV_BSG is not set
108# CONFIG_BLK_DEV_INTEGRITY is not set
82 109
83# 110#
84# IO Schedulers 111# IO Schedulers
@@ -92,6 +119,8 @@ CONFIG_DEFAULT_DEADLINE=y
92# CONFIG_DEFAULT_CFQ is not set 119# CONFIG_DEFAULT_CFQ is not set
93# CONFIG_DEFAULT_NOOP is not set 120# CONFIG_DEFAULT_NOOP is not set
94CONFIG_DEFAULT_IOSCHED="deadline" 121CONFIG_DEFAULT_IOSCHED="deadline"
122CONFIG_CLASSIC_RCU=y
123# CONFIG_FREEZER is not set
95 124
96# 125#
97# System Type 126# System Type
@@ -103,19 +132,26 @@ CONFIG_ARCH_REALVIEW=y
103# CONFIG_ARCH_AT91 is not set 132# CONFIG_ARCH_AT91 is not set
104# CONFIG_ARCH_CLPS7500 is not set 133# CONFIG_ARCH_CLPS7500 is not set
105# CONFIG_ARCH_CLPS711X is not set 134# CONFIG_ARCH_CLPS711X is not set
106# CONFIG_ARCH_CO285 is not set
107# CONFIG_ARCH_EBSA110 is not set 135# CONFIG_ARCH_EBSA110 is not set
108# CONFIG_ARCH_EP93XX is not set 136# CONFIG_ARCH_EP93XX is not set
109# CONFIG_ARCH_FOOTBRIDGE is not set 137# CONFIG_ARCH_FOOTBRIDGE is not set
110# CONFIG_ARCH_NETX is not set 138# CONFIG_ARCH_NETX is not set
111# CONFIG_ARCH_H720X is not set 139# CONFIG_ARCH_H720X is not set
112# CONFIG_ARCH_IMX is not set 140# CONFIG_ARCH_IMX is not set
141# CONFIG_ARCH_IOP13XX is not set
113# CONFIG_ARCH_IOP32X is not set 142# CONFIG_ARCH_IOP32X is not set
114# CONFIG_ARCH_IOP33X is not set 143# CONFIG_ARCH_IOP33X is not set
115# CONFIG_ARCH_IXP4XX is not set
116# CONFIG_ARCH_IXP2000 is not set
117# CONFIG_ARCH_IXP23XX is not set 144# CONFIG_ARCH_IXP23XX is not set
145# CONFIG_ARCH_IXP2000 is not set
146# CONFIG_ARCH_IXP4XX is not set
118# CONFIG_ARCH_L7200 is not set 147# CONFIG_ARCH_L7200 is not set
148# CONFIG_ARCH_KIRKWOOD is not set
149# CONFIG_ARCH_KS8695 is not set
150# CONFIG_ARCH_NS9XXX is not set
151# CONFIG_ARCH_LOKI is not set
152# CONFIG_ARCH_MV78XX0 is not set
153# CONFIG_ARCH_MXC is not set
154# CONFIG_ARCH_ORION5X is not set
119# CONFIG_ARCH_PNX4008 is not set 155# CONFIG_ARCH_PNX4008 is not set
120# CONFIG_ARCH_PXA is not set 156# CONFIG_ARCH_PXA is not set
121# CONFIG_ARCH_RPC is not set 157# CONFIG_ARCH_RPC is not set
@@ -123,13 +159,29 @@ CONFIG_ARCH_REALVIEW=y
123# CONFIG_ARCH_S3C2410 is not set 159# CONFIG_ARCH_S3C2410 is not set
124# CONFIG_ARCH_SHARK is not set 160# CONFIG_ARCH_SHARK is not set
125# CONFIG_ARCH_LH7A40X is not set 161# CONFIG_ARCH_LH7A40X is not set
162# CONFIG_ARCH_DAVINCI is not set
126# CONFIG_ARCH_OMAP is not set 163# CONFIG_ARCH_OMAP is not set
164# CONFIG_ARCH_MSM is not set
165
166#
167# Boot options
168#
169
170#
171# Power management
172#
127 173
128# 174#
129# RealView platform type 175# RealView platform type
130# 176#
131CONFIG_MACH_REALVIEW_EB=y 177CONFIG_MACH_REALVIEW_EB=y
132CONFIG_REALVIEW_MPCORE=y 178# CONFIG_REALVIEW_EB_A9MP is not set
179CONFIG_REALVIEW_EB_ARM11MP=y
180# CONFIG_REALVIEW_EB_ARM11MP_REVB is not set
181CONFIG_MACH_REALVIEW_PB11MP=y
182# CONFIG_MACH_REALVIEW_PB1176 is not set
183# CONFIG_MACH_REALVIEW_PBA8 is not set
184CONFIG_REALVIEW_HIGH_PHYS_OFFSET=y
133 185
134# 186#
135# Processor Type 187# Processor Type
@@ -138,12 +190,15 @@ CONFIG_CPU_32=y
138# CONFIG_CPU_ARM926T is not set 190# CONFIG_CPU_ARM926T is not set
139CONFIG_CPU_V6=y 191CONFIG_CPU_V6=y
140CONFIG_CPU_32v6K=y 192CONFIG_CPU_32v6K=y
193# CONFIG_CPU_V7 is not set
141CONFIG_CPU_32v6=y 194CONFIG_CPU_32v6=y
142CONFIG_CPU_ABRT_EV6=y 195CONFIG_CPU_ABRT_EV6=y
196CONFIG_CPU_PABRT_NOIFAR=y
143CONFIG_CPU_CACHE_V6=y 197CONFIG_CPU_CACHE_V6=y
144CONFIG_CPU_CACHE_VIPT=y 198CONFIG_CPU_CACHE_VIPT=y
145CONFIG_CPU_COPY_V6=y 199CONFIG_CPU_COPY_V6=y
146CONFIG_CPU_TLB_V6=y 200CONFIG_CPU_TLB_V6=y
201CONFIG_CPU_HAS_ASID=y
147CONFIG_CPU_CP15=y 202CONFIG_CPU_CP15=y
148CONFIG_CPU_CP15_MMU=y 203CONFIG_CPU_CP15_MMU=y
149 204
@@ -153,9 +208,10 @@ CONFIG_CPU_CP15_MMU=y
153CONFIG_ARM_THUMB=y 208CONFIG_ARM_THUMB=y
154# CONFIG_CPU_ICACHE_DISABLE is not set 209# CONFIG_CPU_ICACHE_DISABLE is not set
155# CONFIG_CPU_DCACHE_DISABLE is not set 210# CONFIG_CPU_DCACHE_DISABLE is not set
156# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
157# CONFIG_CPU_BPREDICT_DISABLE is not set 211# CONFIG_CPU_BPREDICT_DISABLE is not set
158CONFIG_HAS_TLS_REG=y 212CONFIG_HAS_TLS_REG=y
213CONFIG_OUTER_CACHE=y
214CONFIG_CACHE_L2X0=y
159CONFIG_ARM_GIC=y 215CONFIG_ARM_GIC=y
160CONFIG_ICST307=y 216CONFIG_ICST307=y
161 217
@@ -163,32 +219,44 @@ CONFIG_ICST307=y
163# Bus support 219# Bus support
164# 220#
165CONFIG_ARM_AMBA=y 221CONFIG_ARM_AMBA=y
166 222# CONFIG_PCI_SYSCALL is not set
167# 223# CONFIG_ARCH_SUPPORTS_MSI is not set
168# PCCARD (PCMCIA/CardBus) support
169#
170# CONFIG_PCCARD is not set 224# CONFIG_PCCARD is not set
171 225
172# 226#
173# Kernel Features 227# Kernel Features
174# 228#
229# CONFIG_NO_HZ is not set
230# CONFIG_HIGH_RES_TIMERS is not set
231CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
175CONFIG_SMP=y 232CONFIG_SMP=y
233CONFIG_VMSPLIT_3G=y
234# CONFIG_VMSPLIT_2G is not set
235# CONFIG_VMSPLIT_1G is not set
236CONFIG_PAGE_OFFSET=0xC0000000
176CONFIG_NR_CPUS=4 237CONFIG_NR_CPUS=4
177CONFIG_HOTPLUG_CPU=y 238CONFIG_HOTPLUG_CPU=y
178CONFIG_LOCAL_TIMERS=y 239CONFIG_LOCAL_TIMERS=y
179# CONFIG_PREEMPT is not set 240# CONFIG_PREEMPT is not set
180CONFIG_HZ=100 241CONFIG_HZ=100
181# CONFIG_AEABI is not set 242CONFIG_AEABI=y
182# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 243CONFIG_OABI_COMPAT=y
244CONFIG_ARCH_FLATMEM_HAS_HOLES=y
245# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
246# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
183CONFIG_SELECT_MEMORY_MODEL=y 247CONFIG_SELECT_MEMORY_MODEL=y
184CONFIG_FLATMEM_MANUAL=y 248CONFIG_FLATMEM_MANUAL=y
185# CONFIG_DISCONTIGMEM_MANUAL is not set 249# CONFIG_DISCONTIGMEM_MANUAL is not set
186# CONFIG_SPARSEMEM_MANUAL is not set 250# CONFIG_SPARSEMEM_MANUAL is not set
187CONFIG_FLATMEM=y 251CONFIG_FLATMEM=y
188CONFIG_FLAT_NODE_MEM_MAP=y 252CONFIG_FLAT_NODE_MEM_MAP=y
189# CONFIG_SPARSEMEM_STATIC is not set 253CONFIG_PAGEFLAGS_EXTENDED=y
190CONFIG_SPLIT_PTLOCK_CPUS=4 254CONFIG_SPLIT_PTLOCK_CPUS=4
191# CONFIG_RESOURCES_64BIT is not set 255# CONFIG_RESOURCES_64BIT is not set
256# CONFIG_PHYS_ADDR_T_64BIT is not set
257CONFIG_ZONE_DMA_FLAG=0
258CONFIG_VIRT_TO_BUS=y
259CONFIG_UNEVICTABLE_LRU=y
192CONFIG_ALIGNMENT_TRAP=y 260CONFIG_ALIGNMENT_TRAP=y
193 261
194# 262#
@@ -198,6 +266,12 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
198CONFIG_ZBOOT_ROM_BSS=0x0 266CONFIG_ZBOOT_ROM_BSS=0x0
199CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M" 267CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
200# CONFIG_XIP_KERNEL is not set 268# CONFIG_XIP_KERNEL is not set
269# CONFIG_KEXEC is not set
270
271#
272# CPU Power Management
273#
274# CONFIG_CPU_IDLE is not set
201 275
202# 276#
203# Floating point emulation 277# Floating point emulation
@@ -206,8 +280,7 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=tt
206# 280#
207# At least one emulation must be selected 281# At least one emulation must be selected
208# 282#
209CONFIG_FPE_NWFPE=y 283# CONFIG_FPE_NWFPE is not set
210# CONFIG_FPE_NWFPE_XP is not set
211# CONFIG_FPE_FASTFPE is not set 284# CONFIG_FPE_FASTFPE is not set
212CONFIG_VFP=y 285CONFIG_VFP=y
213 286
@@ -215,28 +288,29 @@ CONFIG_VFP=y
215# Userspace binary formats 288# Userspace binary formats
216# 289#
217CONFIG_BINFMT_ELF=y 290CONFIG_BINFMT_ELF=y
291# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
292CONFIG_HAVE_AOUT=y
218# CONFIG_BINFMT_AOUT is not set 293# CONFIG_BINFMT_AOUT is not set
219# CONFIG_BINFMT_MISC is not set 294# CONFIG_BINFMT_MISC is not set
220# CONFIG_ARTHUR is not set
221 295
222# 296#
223# Power management options 297# Power management options
224# 298#
225# CONFIG_PM is not set 299# CONFIG_PM is not set
226# CONFIG_APM is not set 300CONFIG_ARCH_SUSPEND_POSSIBLE=y
227
228#
229# Networking
230#
231CONFIG_NET=y 301CONFIG_NET=y
232 302
233# 303#
234# Networking options 304# Networking options
235# 305#
236# CONFIG_NETDEBUG is not set
237CONFIG_PACKET=y 306CONFIG_PACKET=y
238# CONFIG_PACKET_MMAP is not set 307# CONFIG_PACKET_MMAP is not set
239CONFIG_UNIX=y 308CONFIG_UNIX=y
309CONFIG_XFRM=y
310# CONFIG_XFRM_USER is not set
311# CONFIG_XFRM_SUB_POLICY is not set
312# CONFIG_XFRM_MIGRATE is not set
313# CONFIG_XFRM_STATISTICS is not set
240# CONFIG_NET_KEY is not set 314# CONFIG_NET_KEY is not set
241CONFIG_INET=y 315CONFIG_INET=y
242# CONFIG_IP_MULTICAST is not set 316# CONFIG_IP_MULTICAST is not set
@@ -255,36 +329,25 @@ CONFIG_IP_PNP_BOOTP=y
255# CONFIG_INET_IPCOMP is not set 329# CONFIG_INET_IPCOMP is not set
256# CONFIG_INET_XFRM_TUNNEL is not set 330# CONFIG_INET_XFRM_TUNNEL is not set
257# CONFIG_INET_TUNNEL is not set 331# CONFIG_INET_TUNNEL is not set
258# CONFIG_INET_XFRM_MODE_TRANSPORT is not set 332CONFIG_INET_XFRM_MODE_TRANSPORT=y
259# CONFIG_INET_XFRM_MODE_TUNNEL is not set 333CONFIG_INET_XFRM_MODE_TUNNEL=y
260# CONFIG_INET_XFRM_MODE_BEET is not set 334CONFIG_INET_XFRM_MODE_BEET=y
335# CONFIG_INET_LRO is not set
261CONFIG_INET_DIAG=y 336CONFIG_INET_DIAG=y
262CONFIG_INET_TCP_DIAG=y 337CONFIG_INET_TCP_DIAG=y
263# CONFIG_TCP_CONG_ADVANCED is not set 338# CONFIG_TCP_CONG_ADVANCED is not set
264CONFIG_TCP_CONG_CUBIC=y 339CONFIG_TCP_CONG_CUBIC=y
265CONFIG_DEFAULT_TCP_CONG="cubic" 340CONFIG_DEFAULT_TCP_CONG="cubic"
341# CONFIG_TCP_MD5SIG is not set
266# CONFIG_IPV6 is not set 342# CONFIG_IPV6 is not set
267# CONFIG_INET6_XFRM_TUNNEL is not set
268# CONFIG_INET6_TUNNEL is not set
269# CONFIG_NETWORK_SECMARK is not set 343# CONFIG_NETWORK_SECMARK is not set
270# CONFIG_NETFILTER is not set 344# CONFIG_NETFILTER is not set
271
272#
273# DCCP Configuration (EXPERIMENTAL)
274#
275# CONFIG_IP_DCCP is not set 345# CONFIG_IP_DCCP is not set
276
277#
278# SCTP Configuration (EXPERIMENTAL)
279#
280# CONFIG_IP_SCTP is not set 346# CONFIG_IP_SCTP is not set
281
282#
283# TIPC Configuration (EXPERIMENTAL)
284#
285# CONFIG_TIPC is not set 347# CONFIG_TIPC is not set
286# CONFIG_ATM is not set 348# CONFIG_ATM is not set
287# CONFIG_BRIDGE is not set 349# CONFIG_BRIDGE is not set
350# CONFIG_NET_DSA is not set
288# CONFIG_VLAN_8021Q is not set 351# CONFIG_VLAN_8021Q is not set
289# CONFIG_DECNET is not set 352# CONFIG_DECNET is not set
290# CONFIG_LLC2 is not set 353# CONFIG_LLC2 is not set
@@ -294,10 +357,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
294# CONFIG_LAPB is not set 357# CONFIG_LAPB is not set
295# CONFIG_ECONET is not set 358# CONFIG_ECONET is not set
296# CONFIG_WAN_ROUTER is not set 359# CONFIG_WAN_ROUTER is not set
297
298#
299# QoS and/or fair queueing
300#
301# CONFIG_NET_SCHED is not set 360# CONFIG_NET_SCHED is not set
302 361
303# 362#
@@ -305,9 +364,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
305# 364#
306# CONFIG_NET_PKTGEN is not set 365# CONFIG_NET_PKTGEN is not set
307# CONFIG_HAMRADIO is not set 366# CONFIG_HAMRADIO is not set
367# CONFIG_CAN is not set
308# CONFIG_IRDA is not set 368# CONFIG_IRDA is not set
309# CONFIG_BT is not set 369# CONFIG_BT is not set
310# CONFIG_IEEE80211 is not set 370# CONFIG_AF_RXRPC is not set
371# CONFIG_PHONET is not set
372# CONFIG_WIRELESS is not set
373# CONFIG_RFKILL is not set
374# CONFIG_NET_9P is not set
311 375
312# 376#
313# Device Drivers 377# Device Drivers
@@ -316,38 +380,37 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
316# 380#
317# Generic Driver Options 381# Generic Driver Options
318# 382#
383CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
319CONFIG_STANDALONE=y 384CONFIG_STANDALONE=y
320CONFIG_PREVENT_FIRMWARE_BUILD=y 385CONFIG_PREVENT_FIRMWARE_BUILD=y
321# CONFIG_FW_LOADER is not set 386CONFIG_FW_LOADER=y
387CONFIG_FIRMWARE_IN_KERNEL=y
388CONFIG_EXTRA_FIRMWARE=""
322# CONFIG_DEBUG_DRIVER is not set 389# CONFIG_DEBUG_DRIVER is not set
390# CONFIG_DEBUG_DEVRES is not set
323# CONFIG_SYS_HYPERVISOR is not set 391# CONFIG_SYS_HYPERVISOR is not set
324
325#
326# Connector - unified userspace <-> kernelspace linker
327#
328# CONFIG_CONNECTOR is not set 392# CONFIG_CONNECTOR is not set
329
330#
331# Memory Technology Devices (MTD)
332#
333CONFIG_MTD=y 393CONFIG_MTD=y
334# CONFIG_MTD_DEBUG is not set 394# CONFIG_MTD_DEBUG is not set
335# CONFIG_MTD_CONCAT is not set 395CONFIG_MTD_CONCAT=y
336CONFIG_MTD_PARTITIONS=y 396CONFIG_MTD_PARTITIONS=y
337# CONFIG_MTD_REDBOOT_PARTS is not set 397# CONFIG_MTD_REDBOOT_PARTS is not set
338CONFIG_MTD_CMDLINE_PARTS=y 398CONFIG_MTD_CMDLINE_PARTS=y
339# CONFIG_MTD_AFS_PARTS is not set 399# CONFIG_MTD_AFS_PARTS is not set
400# CONFIG_MTD_AR7_PARTS is not set
340 401
341# 402#
342# User Modules And Translation Layers 403# User Modules And Translation Layers
343# 404#
344CONFIG_MTD_CHAR=y 405CONFIG_MTD_CHAR=y
406CONFIG_MTD_BLKDEVS=y
345CONFIG_MTD_BLOCK=y 407CONFIG_MTD_BLOCK=y
346# CONFIG_FTL is not set 408# CONFIG_FTL is not set
347# CONFIG_NFTL is not set 409# CONFIG_NFTL is not set
348# CONFIG_INFTL is not set 410# CONFIG_INFTL is not set
349# CONFIG_RFD_FTL is not set 411# CONFIG_RFD_FTL is not set
350# CONFIG_SSFDC is not set 412# CONFIG_SSFDC is not set
413# CONFIG_MTD_OOPS is not set
351 414
352# 415#
353# RAM/ROM/Flash chip drivers 416# RAM/ROM/Flash chip drivers
@@ -373,7 +436,6 @@ CONFIG_MTD_CFI_UTIL=y
373# CONFIG_MTD_RAM is not set 436# CONFIG_MTD_RAM is not set
374# CONFIG_MTD_ROM is not set 437# CONFIG_MTD_ROM is not set
375# CONFIG_MTD_ABSENT is not set 438# CONFIG_MTD_ABSENT is not set
376# CONFIG_MTD_OBSOLETE_CHIPS is not set
377 439
378# 440#
379# Mapping drivers for chip access 441# Mapping drivers for chip access
@@ -397,115 +459,73 @@ CONFIG_MTD_ARM_INTEGRATOR=y
397# CONFIG_MTD_DOC2000 is not set 459# CONFIG_MTD_DOC2000 is not set
398# CONFIG_MTD_DOC2001 is not set 460# CONFIG_MTD_DOC2001 is not set
399# CONFIG_MTD_DOC2001PLUS is not set 461# CONFIG_MTD_DOC2001PLUS is not set
400
401#
402# NAND Flash Device Drivers
403#
404# CONFIG_MTD_NAND is not set 462# CONFIG_MTD_NAND is not set
405
406#
407# OneNAND Flash Device Drivers
408#
409# CONFIG_MTD_ONENAND is not set 463# CONFIG_MTD_ONENAND is not set
410 464
411# 465#
412# Parallel port support 466# UBI - Unsorted block images
413# 467#
468# CONFIG_MTD_UBI is not set
414# CONFIG_PARPORT is not set 469# CONFIG_PARPORT is not set
415 470CONFIG_BLK_DEV=y
416#
417# Plug and Play support
418#
419
420#
421# Block devices
422#
423# CONFIG_BLK_DEV_COW_COMMON is not set 471# CONFIG_BLK_DEV_COW_COMMON is not set
424# CONFIG_BLK_DEV_LOOP is not set 472# CONFIG_BLK_DEV_LOOP is not set
425# CONFIG_BLK_DEV_NBD is not set 473# CONFIG_BLK_DEV_NBD is not set
426# CONFIG_BLK_DEV_RAM is not set 474# CONFIG_BLK_DEV_RAM is not set
427CONFIG_BLK_DEV_INITRD=y
428# CONFIG_CDROM_PKTCDVD is not set 475# CONFIG_CDROM_PKTCDVD is not set
429# CONFIG_ATA_OVER_ETH is not set 476# CONFIG_ATA_OVER_ETH is not set
477CONFIG_MISC_DEVICES=y
478# CONFIG_EEPROM_93CX6 is not set
479# CONFIG_ENCLOSURE_SERVICES is not set
480CONFIG_HAVE_IDE=y
481# CONFIG_IDE is not set
430 482
431# 483#
432# SCSI device support 484# SCSI device support
433# 485#
434# CONFIG_RAID_ATTRS is not set 486# CONFIG_RAID_ATTRS is not set
435# CONFIG_SCSI is not set 487# CONFIG_SCSI is not set
488# CONFIG_SCSI_DMA is not set
436# CONFIG_SCSI_NETLINK is not set 489# CONFIG_SCSI_NETLINK is not set
437 490# CONFIG_ATA is not set
438#
439# Multi-device support (RAID and LVM)
440#
441# CONFIG_MD is not set 491# CONFIG_MD is not set
442
443#
444# Fusion MPT device support
445#
446# CONFIG_FUSION is not set
447
448#
449# IEEE 1394 (FireWire) support
450#
451
452#
453# I2O device support
454#
455
456#
457# Network device support
458#
459CONFIG_NETDEVICES=y 492CONFIG_NETDEVICES=y
460# CONFIG_DUMMY is not set 493# CONFIG_DUMMY is not set
461# CONFIG_BONDING is not set 494# CONFIG_BONDING is not set
495# CONFIG_MACVLAN is not set
462# CONFIG_EQUALIZER is not set 496# CONFIG_EQUALIZER is not set
463# CONFIG_TUN is not set 497# CONFIG_TUN is not set
464 498# CONFIG_VETH is not set
465#
466# PHY device support
467#
468# CONFIG_PHYLIB is not set 499# CONFIG_PHYLIB is not set
469
470#
471# Ethernet (10 or 100Mbit)
472#
473CONFIG_NET_ETHERNET=y 500CONFIG_NET_ETHERNET=y
474CONFIG_MII=y 501CONFIG_MII=y
502# CONFIG_AX88796 is not set
475CONFIG_SMC91X=y 503CONFIG_SMC91X=y
476# CONFIG_DM9000 is not set 504# CONFIG_DM9000 is not set
477 505CONFIG_SMC911X=y
478# 506# CONFIG_IBM_NEW_EMAC_ZMII is not set
479# Ethernet (1000 Mbit) 507# CONFIG_IBM_NEW_EMAC_RGMII is not set
480# 508# CONFIG_IBM_NEW_EMAC_TAH is not set
481 509# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
482# 510# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
483# Ethernet (10000 Mbit) 511# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
484# 512# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
485 513# CONFIG_B44 is not set
486# 514# CONFIG_NETDEV_1000 is not set
487# Token Ring devices 515# CONFIG_NETDEV_10000 is not set
488# 516
489 517#
490# 518# Wireless LAN
491# Wireless LAN (non-hamradio) 519#
492# 520# CONFIG_WLAN_PRE80211 is not set
493# CONFIG_NET_RADIO is not set 521# CONFIG_WLAN_80211 is not set
494 522# CONFIG_IWLWIFI_LEDS is not set
495#
496# Wan interfaces
497#
498# CONFIG_WAN is not set 523# CONFIG_WAN is not set
499# CONFIG_PPP is not set 524# CONFIG_PPP is not set
500# CONFIG_SLIP is not set 525# CONFIG_SLIP is not set
501# CONFIG_SHAPER is not set
502# CONFIG_NETCONSOLE is not set 526# CONFIG_NETCONSOLE is not set
503# CONFIG_NETPOLL is not set 527# CONFIG_NETPOLL is not set
504# CONFIG_NET_POLL_CONTROLLER is not set 528# CONFIG_NET_POLL_CONTROLLER is not set
505
506#
507# ISDN subsystem
508#
509# CONFIG_ISDN is not set 529# CONFIG_ISDN is not set
510 530
511# 531#
@@ -513,6 +533,7 @@ CONFIG_SMC91X=y
513# 533#
514CONFIG_INPUT=y 534CONFIG_INPUT=y
515# CONFIG_INPUT_FF_MEMLESS is not set 535# CONFIG_INPUT_FF_MEMLESS is not set
536# CONFIG_INPUT_POLLDEV is not set
516 537
517# 538#
518# Userland interfaces 539# Userland interfaces
@@ -522,7 +543,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
522CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 543CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
523CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 544CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
524# CONFIG_INPUT_JOYDEV is not set 545# CONFIG_INPUT_JOYDEV is not set
525# CONFIG_INPUT_TSDEV is not set
526# CONFIG_INPUT_EVDEV is not set 546# CONFIG_INPUT_EVDEV is not set
527# CONFIG_INPUT_EVBUG is not set 547# CONFIG_INPUT_EVBUG is not set
528 548
@@ -538,9 +558,16 @@ CONFIG_KEYBOARD_ATKBD=y
538# CONFIG_KEYBOARD_STOWAWAY is not set 558# CONFIG_KEYBOARD_STOWAWAY is not set
539CONFIG_INPUT_MOUSE=y 559CONFIG_INPUT_MOUSE=y
540CONFIG_MOUSE_PS2=y 560CONFIG_MOUSE_PS2=y
561CONFIG_MOUSE_PS2_ALPS=y
562CONFIG_MOUSE_PS2_LOGIPS2PP=y
563CONFIG_MOUSE_PS2_SYNAPTICS=y
564CONFIG_MOUSE_PS2_LIFEBOOK=y
565CONFIG_MOUSE_PS2_TRACKPOINT=y
566# CONFIG_MOUSE_PS2_TOUCHKIT is not set
541# CONFIG_MOUSE_SERIAL is not set 567# CONFIG_MOUSE_SERIAL is not set
542# CONFIG_MOUSE_VSXXXAA is not set 568# CONFIG_MOUSE_VSXXXAA is not set
543# CONFIG_INPUT_JOYSTICK is not set 569# CONFIG_INPUT_JOYSTICK is not set
570# CONFIG_INPUT_TABLET is not set
544# CONFIG_INPUT_TOUCHSCREEN is not set 571# CONFIG_INPUT_TOUCHSCREEN is not set
545# CONFIG_INPUT_MISC is not set 572# CONFIG_INPUT_MISC is not set
546 573
@@ -558,9 +585,11 @@ CONFIG_SERIO_LIBPS2=y
558# Character devices 585# Character devices
559# 586#
560CONFIG_VT=y 587CONFIG_VT=y
588CONFIG_CONSOLE_TRANSLATIONS=y
561CONFIG_VT_CONSOLE=y 589CONFIG_VT_CONSOLE=y
562CONFIG_HW_CONSOLE=y 590CONFIG_HW_CONSOLE=y
563# CONFIG_VT_HW_CONSOLE_BINDING is not set 591# CONFIG_VT_HW_CONSOLE_BINDING is not set
592CONFIG_DEVKMEM=y
564# CONFIG_SERIAL_NONSTANDARD is not set 593# CONFIG_SERIAL_NONSTANDARD is not set
565 594
566# 595#
@@ -579,97 +608,91 @@ CONFIG_SERIAL_CORE_CONSOLE=y
579CONFIG_UNIX98_PTYS=y 608CONFIG_UNIX98_PTYS=y
580CONFIG_LEGACY_PTYS=y 609CONFIG_LEGACY_PTYS=y
581CONFIG_LEGACY_PTY_COUNT=16 610CONFIG_LEGACY_PTY_COUNT=16
582
583#
584# IPMI
585#
586# CONFIG_IPMI_HANDLER is not set 611# CONFIG_IPMI_HANDLER is not set
587
588#
589# Watchdog Cards
590#
591# CONFIG_WATCHDOG is not set
592# CONFIG_HW_RANDOM is not set 612# CONFIG_HW_RANDOM is not set
593# CONFIG_NVRAM is not set 613# CONFIG_NVRAM is not set
594# CONFIG_DTLK is not set
595# CONFIG_R3964 is not set 614# CONFIG_R3964 is not set
596
597#
598# Ftape, the floppy tape device driver
599#
600# CONFIG_RAW_DRIVER is not set 615# CONFIG_RAW_DRIVER is not set
601
602#
603# TPM devices
604#
605# CONFIG_TCG_TPM is not set 616# CONFIG_TCG_TPM is not set
606
607#
608# I2C support
609#
610# CONFIG_I2C is not set 617# CONFIG_I2C is not set
611
612#
613# SPI support
614#
615# CONFIG_SPI is not set 618# CONFIG_SPI is not set
616# CONFIG_SPI_MASTER is not set
617
618#
619# Dallas's 1-wire bus
620#
621# CONFIG_W1 is not set 619# CONFIG_W1 is not set
622 620# CONFIG_POWER_SUPPLY is not set
623#
624# Hardware Monitoring support
625#
626# CONFIG_HWMON is not set 621# CONFIG_HWMON is not set
627# CONFIG_HWMON_VID is not set 622# CONFIG_THERMAL is not set
628 623# CONFIG_THERMAL_HWMON is not set
629# 624# CONFIG_WATCHDOG is not set
630# Misc devices
631#
632# CONFIG_SGI_IOC4 is not set
633# CONFIG_TIFM_CORE is not set
634 625
635# 626#
636# LED devices 627# Sonics Silicon Backplane
637# 628#
638# CONFIG_NEW_LEDS is not set 629CONFIG_SSB_POSSIBLE=y
630# CONFIG_SSB is not set
639 631
640# 632#
641# LED drivers 633# Multifunction device drivers
642# 634#
635# CONFIG_MFD_CORE is not set
636# CONFIG_MFD_SM501 is not set
637# CONFIG_HTC_PASIC3 is not set
638# CONFIG_MFD_TMIO is not set
639# CONFIG_MFD_T7L66XB is not set
640# CONFIG_MFD_TC6387XB is not set
641# CONFIG_MFD_WM8400 is not set
643 642
644# 643#
645# LED Triggers 644# Multimedia devices
646# 645#
647 646
648# 647#
649# Multimedia devices 648# Multimedia core support
650# 649#
651# CONFIG_VIDEO_DEV is not set 650# CONFIG_VIDEO_DEV is not set
651# CONFIG_DVB_CORE is not set
652# CONFIG_VIDEO_MEDIA is not set
652 653
653# 654#
654# Digital Video Broadcasting Devices 655# Multimedia drivers
655# 656#
656# CONFIG_DVB is not set 657# CONFIG_DAB is not set
657 658
658# 659#
659# Graphics support 660# Graphics support
660# 661#
661# CONFIG_FIRMWARE_EDID is not set 662# CONFIG_VGASTATE is not set
663# CONFIG_VIDEO_OUTPUT_CONTROL is not set
662CONFIG_FB=y 664CONFIG_FB=y
665# CONFIG_FIRMWARE_EDID is not set
666# CONFIG_FB_DDC is not set
667# CONFIG_FB_BOOT_VESA_SUPPORT is not set
663CONFIG_FB_CFB_FILLRECT=y 668CONFIG_FB_CFB_FILLRECT=y
664CONFIG_FB_CFB_COPYAREA=y 669CONFIG_FB_CFB_COPYAREA=y
665CONFIG_FB_CFB_IMAGEBLIT=y 670CONFIG_FB_CFB_IMAGEBLIT=y
671# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
672# CONFIG_FB_SYS_FILLRECT is not set
673# CONFIG_FB_SYS_COPYAREA is not set
674# CONFIG_FB_SYS_IMAGEBLIT is not set
675# CONFIG_FB_FOREIGN_ENDIAN is not set
676# CONFIG_FB_SYS_FOPS is not set
677# CONFIG_FB_SVGALIB is not set
666# CONFIG_FB_MACMODES is not set 678# CONFIG_FB_MACMODES is not set
667# CONFIG_FB_BACKLIGHT is not set 679# CONFIG_FB_BACKLIGHT is not set
668# CONFIG_FB_MODE_HELPERS is not set 680# CONFIG_FB_MODE_HELPERS is not set
669# CONFIG_FB_TILEBLITTING is not set 681# CONFIG_FB_TILEBLITTING is not set
682
683#
684# Frame buffer hardware drivers
685#
670CONFIG_FB_ARMCLCD=y 686CONFIG_FB_ARMCLCD=y
671# CONFIG_FB_S1D13XXX is not set 687# CONFIG_FB_S1D13XXX is not set
672# CONFIG_FB_VIRTUAL is not set 688# CONFIG_FB_VIRTUAL is not set
689# CONFIG_FB_METRONOME is not set
690# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
691
692#
693# Display device support
694#
695# CONFIG_DISPLAY_SUPPORT is not set
673 696
674# 697#
675# Console display driver support 698# Console display driver support
@@ -677,28 +700,17 @@ CONFIG_FB_ARMCLCD=y
677# CONFIG_VGA_CONSOLE is not set 700# CONFIG_VGA_CONSOLE is not set
678CONFIG_DUMMY_CONSOLE=y 701CONFIG_DUMMY_CONSOLE=y
679CONFIG_FRAMEBUFFER_CONSOLE=y 702CONFIG_FRAMEBUFFER_CONSOLE=y
703# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
680# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set 704# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
681# CONFIG_FONTS is not set 705# CONFIG_FONTS is not set
682CONFIG_FONT_8x8=y 706CONFIG_FONT_8x8=y
683CONFIG_FONT_8x16=y 707CONFIG_FONT_8x16=y
684
685#
686# Logo configuration
687#
688CONFIG_LOGO=y 708CONFIG_LOGO=y
689# CONFIG_LOGO_LINUX_MONO is not set 709# CONFIG_LOGO_LINUX_MONO is not set
690# CONFIG_LOGO_LINUX_VGA16 is not set 710# CONFIG_LOGO_LINUX_VGA16 is not set
691CONFIG_LOGO_LINUX_CLUT224=y 711CONFIG_LOGO_LINUX_CLUT224=y
692# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
693
694#
695# Sound
696#
697CONFIG_SOUND=y 712CONFIG_SOUND=y
698 713CONFIG_SOUND_OSS_CORE=y
699#
700# Advanced Linux Sound Architecture
701#
702CONFIG_SND=y 714CONFIG_SND=y
703CONFIG_SND_TIMER=y 715CONFIG_SND_TIMER=y
704CONFIG_SND_PCM=y 716CONFIG_SND_PCM=y
@@ -712,100 +724,65 @@ CONFIG_SND_SUPPORT_OLD_API=y
712CONFIG_SND_VERBOSE_PROCFS=y 724CONFIG_SND_VERBOSE_PROCFS=y
713# CONFIG_SND_VERBOSE_PRINTK is not set 725# CONFIG_SND_VERBOSE_PRINTK is not set
714# CONFIG_SND_DEBUG is not set 726# CONFIG_SND_DEBUG is not set
715 727CONFIG_SND_VMASTER=y
716# 728CONFIG_SND_AC97_CODEC=y
717# Generic devices 729# CONFIG_SND_DRIVERS is not set
718# 730CONFIG_SND_ARM=y
719CONFIG_SND_AC97_CODEC=m 731CONFIG_SND_ARMAACI=y
720CONFIG_SND_AC97_BUS=m 732# CONFIG_SND_SOC is not set
721# CONFIG_SND_DUMMY is not set
722# CONFIG_SND_MTPAV is not set
723# CONFIG_SND_SERIAL_U16550 is not set
724# CONFIG_SND_MPU401 is not set
725
726#
727# ALSA ARM devices
728#
729CONFIG_SND_ARMAACI=m
730
731#
732# Open Sound System
733#
734# CONFIG_SOUND_PRIME is not set 733# CONFIG_SOUND_PRIME is not set
735 734CONFIG_AC97_BUS=y
736# 735# CONFIG_HID_SUPPORT is not set
737# USB support 736# CONFIG_USB_SUPPORT is not set
738#
739CONFIG_USB_ARCH_HAS_HCD=y
740# CONFIG_USB_ARCH_HAS_OHCI is not set
741# CONFIG_USB_ARCH_HAS_EHCI is not set
742# CONFIG_USB is not set
743
744#
745# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
746#
747
748#
749# USB Gadget Support
750#
751# CONFIG_USB_GADGET is not set
752
753#
754# MMC/SD Card support
755#
756CONFIG_MMC=y 737CONFIG_MMC=y
757# CONFIG_MMC_DEBUG is not set 738# CONFIG_MMC_DEBUG is not set
758CONFIG_MMC_BLOCK=y 739# CONFIG_MMC_UNSAFE_RESUME is not set
759CONFIG_MMC_ARMMMCI=y
760# CONFIG_MMC_TIFM_SD is not set
761 740
762# 741#
763# Real Time Clock 742# MMC/SD/SDIO Card Drivers
764# 743#
765CONFIG_RTC_LIB=y 744CONFIG_MMC_BLOCK=y
766CONFIG_RTC_CLASS=y 745CONFIG_MMC_BLOCK_BOUNCE=y
767CONFIG_RTC_HCTOSYS=y 746# CONFIG_SDIO_UART is not set
768CONFIG_RTC_HCTOSYS_DEVICE="rtc0" 747# CONFIG_MMC_TEST is not set
769# CONFIG_RTC_DEBUG is not set
770 748
771# 749#
772# RTC interfaces 750# MMC/SD/SDIO Host Controller Drivers
773# 751#
774CONFIG_RTC_INTF_SYSFS=y 752CONFIG_MMC_ARMMMCI=y
775CONFIG_RTC_INTF_PROC=y 753# CONFIG_MMC_SDHCI is not set
776CONFIG_RTC_INTF_DEV=y 754# CONFIG_MEMSTICK is not set
777CONFIG_RTC_INTF_DEV_UIE_EMUL=y 755# CONFIG_ACCESSIBILITY is not set
756# CONFIG_NEW_LEDS is not set
757CONFIG_RTC_LIB=y
758# CONFIG_RTC_CLASS is not set
759# CONFIG_DMADEVICES is not set
778 760
779# 761#
780# RTC drivers 762# Voltage and Current regulators
781# 763#
782# CONFIG_RTC_DRV_DS1553 is not set 764# CONFIG_REGULATOR is not set
783# CONFIG_RTC_DRV_DS1742 is not set 765# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
784# CONFIG_RTC_DRV_M48T86 is not set 766# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
785CONFIG_RTC_DRV_PL031=y 767# CONFIG_REGULATOR_BQ24022 is not set
786# CONFIG_RTC_DRV_TEST is not set 768# CONFIG_UIO is not set
787# CONFIG_RTC_DRV_V3020 is not set
788 769
789# 770#
790# File systems 771# File systems
791# 772#
792CONFIG_EXT2_FS=y 773# CONFIG_EXT2_FS is not set
793# CONFIG_EXT2_FS_XATTR is not set
794# CONFIG_EXT2_FS_XIP is not set
795# CONFIG_EXT3_FS is not set 774# CONFIG_EXT3_FS is not set
796# CONFIG_EXT4DEV_FS is not set 775# CONFIG_EXT4_FS is not set
797# CONFIG_REISERFS_FS is not set 776# CONFIG_REISERFS_FS is not set
798# CONFIG_JFS_FS is not set 777# CONFIG_JFS_FS is not set
799# CONFIG_FS_POSIX_ACL is not set 778# CONFIG_FS_POSIX_ACL is not set
779CONFIG_FILE_LOCKING=y
800# CONFIG_XFS_FS is not set 780# CONFIG_XFS_FS is not set
801# CONFIG_GFS2_FS is not set
802# CONFIG_OCFS2_FS is not set 781# CONFIG_OCFS2_FS is not set
803# CONFIG_MINIX_FS is not set 782CONFIG_DNOTIFY=y
804# CONFIG_ROMFS_FS is not set
805CONFIG_INOTIFY=y 783CONFIG_INOTIFY=y
806# CONFIG_INOTIFY_USER is not set 784CONFIG_INOTIFY_USER=y
807# CONFIG_QUOTA is not set 785# CONFIG_QUOTA is not set
808CONFIG_DNOTIFY=y
809# CONFIG_AUTOFS_FS is not set 786# CONFIG_AUTOFS_FS is not set
810# CONFIG_AUTOFS4_FS is not set 787# CONFIG_AUTOFS4_FS is not set
811# CONFIG_FUSE_FS is not set 788# CONFIG_FUSE_FS is not set
@@ -831,11 +808,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
831# 808#
832CONFIG_PROC_FS=y 809CONFIG_PROC_FS=y
833CONFIG_PROC_SYSCTL=y 810CONFIG_PROC_SYSCTL=y
811CONFIG_PROC_PAGE_MONITOR=y
834CONFIG_SYSFS=y 812CONFIG_SYSFS=y
835CONFIG_TMPFS=y 813CONFIG_TMPFS=y
836# CONFIG_TMPFS_POSIX_ACL is not set 814# CONFIG_TMPFS_POSIX_ACL is not set
837# CONFIG_HUGETLB_PAGE is not set 815# CONFIG_HUGETLB_PAGE is not set
838CONFIG_RAMFS=y
839# CONFIG_CONFIGFS_FS is not set 816# CONFIG_CONFIGFS_FS is not set
840 817
841# 818#
@@ -848,29 +825,28 @@ CONFIG_RAMFS=y
848# CONFIG_BEFS_FS is not set 825# CONFIG_BEFS_FS is not set
849# CONFIG_BFS_FS is not set 826# CONFIG_BFS_FS is not set
850# CONFIG_EFS_FS is not set 827# CONFIG_EFS_FS is not set
851# CONFIG_JFFS_FS is not set
852# CONFIG_JFFS2_FS is not set 828# CONFIG_JFFS2_FS is not set
853CONFIG_CRAMFS=y 829CONFIG_CRAMFS=y
854# CONFIG_VXFS_FS is not set 830# CONFIG_VXFS_FS is not set
831# CONFIG_MINIX_FS is not set
832# CONFIG_OMFS_FS is not set
855# CONFIG_HPFS_FS is not set 833# CONFIG_HPFS_FS is not set
856# CONFIG_QNX4FS_FS is not set 834# CONFIG_QNX4FS_FS is not set
835# CONFIG_ROMFS_FS is not set
857# CONFIG_SYSV_FS is not set 836# CONFIG_SYSV_FS is not set
858# CONFIG_UFS_FS is not set 837# CONFIG_UFS_FS is not set
859 838CONFIG_NETWORK_FILESYSTEMS=y
860#
861# Network File Systems
862#
863CONFIG_NFS_FS=y 839CONFIG_NFS_FS=y
864CONFIG_NFS_V3=y 840CONFIG_NFS_V3=y
865# CONFIG_NFS_V3_ACL is not set 841# CONFIG_NFS_V3_ACL is not set
866# CONFIG_NFS_V4 is not set 842# CONFIG_NFS_V4 is not set
867# CONFIG_NFS_DIRECTIO is not set
868# CONFIG_NFSD is not set
869CONFIG_ROOT_NFS=y 843CONFIG_ROOT_NFS=y
844# CONFIG_NFSD is not set
870CONFIG_LOCKD=y 845CONFIG_LOCKD=y
871CONFIG_LOCKD_V4=y 846CONFIG_LOCKD_V4=y
872CONFIG_NFS_COMMON=y 847CONFIG_NFS_COMMON=y
873CONFIG_SUNRPC=y 848CONFIG_SUNRPC=y
849# CONFIG_SUNRPC_REGISTER_V4 is not set
874# CONFIG_RPCSEC_GSS_KRB5 is not set 850# CONFIG_RPCSEC_GSS_KRB5 is not set
875# CONFIG_RPCSEC_GSS_SPKM3 is not set 851# CONFIG_RPCSEC_GSS_SPKM3 is not set
876# CONFIG_SMB_FS is not set 852# CONFIG_SMB_FS is not set
@@ -878,17 +854,12 @@ CONFIG_SUNRPC=y
878# CONFIG_NCP_FS is not set 854# CONFIG_NCP_FS is not set
879# CONFIG_CODA_FS is not set 855# CONFIG_CODA_FS is not set
880# CONFIG_AFS_FS is not set 856# CONFIG_AFS_FS is not set
881# CONFIG_9P_FS is not set
882 857
883# 858#
884# Partition Types 859# Partition Types
885# 860#
886# CONFIG_PARTITION_ADVANCED is not set 861# CONFIG_PARTITION_ADVANCED is not set
887CONFIG_MSDOS_PARTITION=y 862CONFIG_MSDOS_PARTITION=y
888
889#
890# Native Language Support
891#
892CONFIG_NLS=y 863CONFIG_NLS=y
893CONFIG_NLS_DEFAULT="iso8859-1" 864CONFIG_NLS_DEFAULT="iso8859-1"
894CONFIG_NLS_CODEPAGE_437=y 865CONFIG_NLS_CODEPAGE_437=y
@@ -929,64 +900,177 @@ CONFIG_NLS_ISO8859_1=y
929# CONFIG_NLS_KOI8_R is not set 900# CONFIG_NLS_KOI8_R is not set
930# CONFIG_NLS_KOI8_U is not set 901# CONFIG_NLS_KOI8_U is not set
931# CONFIG_NLS_UTF8 is not set 902# CONFIG_NLS_UTF8 is not set
932 903# CONFIG_DLM is not set
933#
934# Profiling support
935#
936# CONFIG_PROFILING is not set
937 904
938# 905#
939# Kernel hacking 906# Kernel hacking
940# 907#
941# CONFIG_PRINTK_TIME is not set 908# CONFIG_PRINTK_TIME is not set
942# CONFIG_ENABLE_MUST_CHECK is not set 909CONFIG_ENABLE_WARN_DEPRECATED=y
910CONFIG_ENABLE_MUST_CHECK=y
911CONFIG_FRAME_WARN=1024
943CONFIG_MAGIC_SYSRQ=y 912CONFIG_MAGIC_SYSRQ=y
944# CONFIG_UNUSED_SYMBOLS is not set 913# CONFIG_UNUSED_SYMBOLS is not set
914# CONFIG_DEBUG_FS is not set
915# CONFIG_HEADERS_CHECK is not set
945CONFIG_DEBUG_KERNEL=y 916CONFIG_DEBUG_KERNEL=y
946CONFIG_LOG_BUF_SHIFT=14 917# CONFIG_DEBUG_SHIRQ is not set
947CONFIG_DETECT_SOFTLOCKUP=y 918CONFIG_DETECT_SOFTLOCKUP=y
919# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
920CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
921# CONFIG_SCHED_DEBUG is not set
948# CONFIG_SCHEDSTATS is not set 922# CONFIG_SCHEDSTATS is not set
923# CONFIG_TIMER_STATS is not set
924# CONFIG_DEBUG_OBJECTS is not set
949# CONFIG_DEBUG_SLAB is not set 925# CONFIG_DEBUG_SLAB is not set
950# CONFIG_DEBUG_RT_MUTEXES is not set 926# CONFIG_DEBUG_RT_MUTEXES is not set
951# CONFIG_RT_MUTEX_TESTER is not set 927# CONFIG_RT_MUTEX_TESTER is not set
952CONFIG_DEBUG_SPINLOCK=y 928# CONFIG_DEBUG_SPINLOCK is not set
953CONFIG_DEBUG_MUTEXES=y 929# CONFIG_DEBUG_MUTEXES is not set
954CONFIG_DEBUG_RWSEMS=y 930# CONFIG_DEBUG_LOCK_ALLOC is not set
931# CONFIG_PROVE_LOCKING is not set
932# CONFIG_LOCK_STAT is not set
955# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 933# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
956# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 934# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
957# CONFIG_DEBUG_KOBJECT is not set 935# CONFIG_DEBUG_KOBJECT is not set
958CONFIG_DEBUG_BUGVERBOSE=y 936CONFIG_DEBUG_BUGVERBOSE=y
959# CONFIG_DEBUG_INFO is not set 937# CONFIG_DEBUG_INFO is not set
960# CONFIG_DEBUG_FS is not set
961# CONFIG_DEBUG_VM is not set 938# CONFIG_DEBUG_VM is not set
939# CONFIG_DEBUG_WRITECOUNT is not set
940CONFIG_DEBUG_MEMORY_INIT=y
962# CONFIG_DEBUG_LIST is not set 941# CONFIG_DEBUG_LIST is not set
942# CONFIG_DEBUG_SG is not set
963CONFIG_FRAME_POINTER=y 943CONFIG_FRAME_POINTER=y
964# CONFIG_UNWIND_INFO is not set 944# CONFIG_BOOT_PRINTK_DELAY is not set
965CONFIG_FORCED_INLINING=y
966# CONFIG_HEADERS_CHECK is not set
967# CONFIG_RCU_TORTURE_TEST is not set 945# CONFIG_RCU_TORTURE_TEST is not set
946# CONFIG_RCU_CPU_STALL_DETECTOR is not set
947# CONFIG_BACKTRACE_SELF_TEST is not set
948# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
949# CONFIG_FAULT_INJECTION is not set
950# CONFIG_SYSCTL_SYSCALL_CHECK is not set
951CONFIG_NOP_TRACER=y
952CONFIG_HAVE_FTRACE=y
953CONFIG_HAVE_DYNAMIC_FTRACE=y
954# CONFIG_FTRACE is not set
955# CONFIG_IRQSOFF_TRACER is not set
956# CONFIG_SCHED_TRACER is not set
957# CONFIG_CONTEXT_SWITCH_TRACER is not set
958# CONFIG_BOOT_TRACER is not set
959# CONFIG_STACK_TRACER is not set
960# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
961# CONFIG_SAMPLES is not set
962CONFIG_HAVE_ARCH_KGDB=y
963# CONFIG_KGDB is not set
968CONFIG_DEBUG_USER=y 964CONFIG_DEBUG_USER=y
969CONFIG_DEBUG_ERRORS=y 965CONFIG_DEBUG_ERRORS=y
970CONFIG_DEBUG_LL=y 966# CONFIG_DEBUG_STACK_USAGE is not set
971# CONFIG_DEBUG_ICEDCC is not set 967# CONFIG_DEBUG_LL is not set
972 968
973# 969#
974# Security options 970# Security options
975# 971#
976# CONFIG_KEYS is not set 972# CONFIG_KEYS is not set
977# CONFIG_SECURITY is not set 973# CONFIG_SECURITY is not set
974# CONFIG_SECURITYFS is not set
975# CONFIG_SECURITY_FILE_CAPABILITIES is not set
976CONFIG_CRYPTO=y
977
978#
979# Crypto core or helper
980#
981# CONFIG_CRYPTO_FIPS is not set
982# CONFIG_CRYPTO_MANAGER is not set
983# CONFIG_CRYPTO_GF128MUL is not set
984# CONFIG_CRYPTO_NULL is not set
985# CONFIG_CRYPTO_CRYPTD is not set
986# CONFIG_CRYPTO_AUTHENC is not set
987# CONFIG_CRYPTO_TEST is not set
988
989#
990# Authenticated Encryption with Associated Data
991#
992# CONFIG_CRYPTO_CCM is not set
993# CONFIG_CRYPTO_GCM is not set
994# CONFIG_CRYPTO_SEQIV is not set
995
996#
997# Block modes
998#
999# CONFIG_CRYPTO_CBC is not set
1000# CONFIG_CRYPTO_CTR is not set
1001# CONFIG_CRYPTO_CTS is not set
1002# CONFIG_CRYPTO_ECB is not set
1003# CONFIG_CRYPTO_LRW is not set
1004# CONFIG_CRYPTO_PCBC is not set
1005# CONFIG_CRYPTO_XTS is not set
1006
1007#
1008# Hash modes
1009#
1010# CONFIG_CRYPTO_HMAC is not set
1011# CONFIG_CRYPTO_XCBC is not set
1012
1013#
1014# Digest
1015#
1016# CONFIG_CRYPTO_CRC32C is not set
1017# CONFIG_CRYPTO_MD4 is not set
1018# CONFIG_CRYPTO_MD5 is not set
1019# CONFIG_CRYPTO_MICHAEL_MIC is not set
1020# CONFIG_CRYPTO_RMD128 is not set
1021# CONFIG_CRYPTO_RMD160 is not set
1022# CONFIG_CRYPTO_RMD256 is not set
1023# CONFIG_CRYPTO_RMD320 is not set
1024# CONFIG_CRYPTO_SHA1 is not set
1025# CONFIG_CRYPTO_SHA256 is not set
1026# CONFIG_CRYPTO_SHA512 is not set
1027# CONFIG_CRYPTO_TGR192 is not set
1028# CONFIG_CRYPTO_WP512 is not set
1029
1030#
1031# Ciphers
1032#
1033# CONFIG_CRYPTO_AES is not set
1034# CONFIG_CRYPTO_ANUBIS is not set
1035# CONFIG_CRYPTO_ARC4 is not set
1036# CONFIG_CRYPTO_BLOWFISH is not set
1037# CONFIG_CRYPTO_CAMELLIA is not set
1038# CONFIG_CRYPTO_CAST5 is not set
1039# CONFIG_CRYPTO_CAST6 is not set
1040# CONFIG_CRYPTO_DES is not set
1041# CONFIG_CRYPTO_FCRYPT is not set
1042# CONFIG_CRYPTO_KHAZAD is not set
1043# CONFIG_CRYPTO_SALSA20 is not set
1044# CONFIG_CRYPTO_SEED is not set
1045# CONFIG_CRYPTO_SERPENT is not set
1046# CONFIG_CRYPTO_TEA is not set
1047# CONFIG_CRYPTO_TWOFISH is not set
1048
1049#
1050# Compression
1051#
1052# CONFIG_CRYPTO_DEFLATE is not set
1053# CONFIG_CRYPTO_LZO is not set
978 1054
979# 1055#
980# Cryptographic options 1056# Random Number Generation
981# 1057#
982# CONFIG_CRYPTO is not set 1058# CONFIG_CRYPTO_ANSI_CPRNG is not set
1059# CONFIG_CRYPTO_HW is not set
983 1060
984# 1061#
985# Library routines 1062# Library routines
986# 1063#
1064CONFIG_BITREVERSE=y
987# CONFIG_CRC_CCITT is not set 1065# CONFIG_CRC_CCITT is not set
988# CONFIG_CRC16 is not set 1066# CONFIG_CRC16 is not set
1067# CONFIG_CRC_T10DIF is not set
1068# CONFIG_CRC_ITU_T is not set
989CONFIG_CRC32=y 1069CONFIG_CRC32=y
1070# CONFIG_CRC7 is not set
990# CONFIG_LIBCRC32C is not set 1071# CONFIG_LIBCRC32C is not set
991CONFIG_ZLIB_INFLATE=y 1072CONFIG_ZLIB_INFLATE=y
992CONFIG_PLIST=y 1073CONFIG_PLIST=y
1074CONFIG_HAS_IOMEM=y
1075CONFIG_HAS_IOPORT=y
1076CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/realview_defconfig b/arch/arm/configs/realview_defconfig
index 907e54344dad..7e253f58ed18 100644
--- a/arch/arm/configs/realview_defconfig
+++ b/arch/arm/configs/realview_defconfig
@@ -1,105 +1,204 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-rc2 3# Linux kernel version: 2.6.28-rc2
4# Thu Sep 29 14:50:10 2005 4# Mon Nov 10 14:39:48 2008
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8# CONFIG_GENERIC_GPIO is not set
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
7CONFIG_MMU=y 11CONFIG_MMU=y
8CONFIG_UID16=y 12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
9CONFIG_RWSEM_GENERIC_SPINLOCK=y 20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
26CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
11 28
12# 29#
13# Code maturity level options 30# General setup
14# 31#
15# CONFIG_EXPERIMENTAL is not set 32CONFIG_EXPERIMENTAL=y
16CONFIG_CLEAN_COMPILE=y
17CONFIG_BROKEN_ON_SMP=y 33CONFIG_BROKEN_ON_SMP=y
18CONFIG_INIT_ENV_ARG_LIMIT=32 34CONFIG_INIT_ENV_ARG_LIMIT=32
19
20#
21# General setup
22#
23CONFIG_LOCALVERSION="" 35CONFIG_LOCALVERSION=""
24CONFIG_LOCALVERSION_AUTO=y 36CONFIG_LOCALVERSION_AUTO=y
25# CONFIG_SWAP is not set 37# CONFIG_SWAP is not set
26CONFIG_SYSVIPC=y 38CONFIG_SYSVIPC=y
39CONFIG_SYSVIPC_SYSCTL=y
40# CONFIG_POSIX_MQUEUE is not set
27# CONFIG_BSD_PROCESS_ACCT is not set 41# CONFIG_BSD_PROCESS_ACCT is not set
28CONFIG_SYSCTL=y 42# CONFIG_TASKSTATS is not set
29# CONFIG_AUDIT is not set 43# CONFIG_AUDIT is not set
30CONFIG_HOTPLUG=y
31CONFIG_KOBJECT_UEVENT=y
32# CONFIG_IKCONFIG is not set 44# CONFIG_IKCONFIG is not set
33CONFIG_INITRAMFS_SOURCE="" 45CONFIG_LOG_BUF_SHIFT=14
46# CONFIG_CGROUPS is not set
47# CONFIG_GROUP_SCHED is not set
48CONFIG_SYSFS_DEPRECATED=y
49CONFIG_SYSFS_DEPRECATED_V2=y
50# CONFIG_RELAY is not set
51CONFIG_NAMESPACES=y
52# CONFIG_UTS_NS is not set
53# CONFIG_IPC_NS is not set
54# CONFIG_USER_NS is not set
55# CONFIG_PID_NS is not set
56# CONFIG_BLK_DEV_INITRD is not set
57CONFIG_CC_OPTIMIZE_FOR_SIZE=y
58CONFIG_SYSCTL=y
34# CONFIG_EMBEDDED is not set 59# CONFIG_EMBEDDED is not set
60CONFIG_UID16=y
61CONFIG_SYSCTL_SYSCALL=y
35CONFIG_KALLSYMS=y 62CONFIG_KALLSYMS=y
36# CONFIG_KALLSYMS_ALL is not set 63# CONFIG_KALLSYMS_ALL is not set
37# CONFIG_KALLSYMS_EXTRA_PASS is not set 64# CONFIG_KALLSYMS_EXTRA_PASS is not set
65CONFIG_HOTPLUG=y
38CONFIG_PRINTK=y 66CONFIG_PRINTK=y
39CONFIG_BUG=y 67CONFIG_BUG=y
68CONFIG_ELF_CORE=y
69CONFIG_COMPAT_BRK=y
40CONFIG_BASE_FULL=y 70CONFIG_BASE_FULL=y
41CONFIG_FUTEX=y 71CONFIG_FUTEX=y
72CONFIG_ANON_INODES=y
42CONFIG_EPOLL=y 73CONFIG_EPOLL=y
43CONFIG_CC_OPTIMIZE_FOR_SIZE=y 74CONFIG_SIGNALFD=y
75CONFIG_TIMERFD=y
76CONFIG_EVENTFD=y
44CONFIG_SHMEM=y 77CONFIG_SHMEM=y
45CONFIG_CC_ALIGN_FUNCTIONS=0 78CONFIG_AIO=y
46CONFIG_CC_ALIGN_LABELS=0 79CONFIG_VM_EVENT_COUNTERS=y
47CONFIG_CC_ALIGN_LOOPS=0 80CONFIG_SLAB=y
48CONFIG_CC_ALIGN_JUMPS=0 81# CONFIG_SLUB is not set
82# CONFIG_SLOB is not set
83# CONFIG_PROFILING is not set
84# CONFIG_MARKERS is not set
85CONFIG_HAVE_OPROFILE=y
86# CONFIG_KPROBES is not set
87CONFIG_HAVE_KPROBES=y
88CONFIG_HAVE_KRETPROBES=y
89CONFIG_HAVE_CLK=y
90CONFIG_HAVE_GENERIC_DMA_COHERENT=y
91CONFIG_SLABINFO=y
92CONFIG_RT_MUTEXES=y
49# CONFIG_TINY_SHMEM is not set 93# CONFIG_TINY_SHMEM is not set
50CONFIG_BASE_SMALL=0 94CONFIG_BASE_SMALL=0
51
52#
53# Loadable module support
54#
55CONFIG_MODULES=y 95CONFIG_MODULES=y
96# CONFIG_MODULE_FORCE_LOAD is not set
56CONFIG_MODULE_UNLOAD=y 97CONFIG_MODULE_UNLOAD=y
57CONFIG_OBSOLETE_MODPARM=y 98# CONFIG_MODULE_FORCE_UNLOAD is not set
99# CONFIG_MODVERSIONS is not set
58# CONFIG_MODULE_SRCVERSION_ALL is not set 100# CONFIG_MODULE_SRCVERSION_ALL is not set
59# CONFIG_KMOD is not set 101CONFIG_KMOD=y
102CONFIG_BLOCK=y
103# CONFIG_LBD is not set
104# CONFIG_BLK_DEV_IO_TRACE is not set
105# CONFIG_LSF is not set
106# CONFIG_BLK_DEV_BSG is not set
107# CONFIG_BLK_DEV_INTEGRITY is not set
108
109#
110# IO Schedulers
111#
112CONFIG_IOSCHED_NOOP=y
113# CONFIG_IOSCHED_AS is not set
114CONFIG_IOSCHED_DEADLINE=y
115# CONFIG_IOSCHED_CFQ is not set
116# CONFIG_DEFAULT_AS is not set
117CONFIG_DEFAULT_DEADLINE=y
118# CONFIG_DEFAULT_CFQ is not set
119# CONFIG_DEFAULT_NOOP is not set
120CONFIG_DEFAULT_IOSCHED="deadline"
121CONFIG_CLASSIC_RCU=y
122# CONFIG_FREEZER is not set
60 123
61# 124#
62# System Type 125# System Type
63# 126#
127# CONFIG_ARCH_AAEC2000 is not set
128# CONFIG_ARCH_INTEGRATOR is not set
129CONFIG_ARCH_REALVIEW=y
130# CONFIG_ARCH_VERSATILE is not set
131# CONFIG_ARCH_AT91 is not set
64# CONFIG_ARCH_CLPS7500 is not set 132# CONFIG_ARCH_CLPS7500 is not set
65# CONFIG_ARCH_CLPS711X is not set 133# CONFIG_ARCH_CLPS711X is not set
66# CONFIG_ARCH_CO285 is not set
67# CONFIG_ARCH_EBSA110 is not set 134# CONFIG_ARCH_EBSA110 is not set
135# CONFIG_ARCH_EP93XX is not set
68# CONFIG_ARCH_FOOTBRIDGE is not set 136# CONFIG_ARCH_FOOTBRIDGE is not set
69# CONFIG_ARCH_INTEGRATOR is not set 137# CONFIG_ARCH_NETX is not set
70# CONFIG_ARCH_IOP3XX is not set 138# CONFIG_ARCH_H720X is not set
71# CONFIG_ARCH_IXP4XX is not set 139# CONFIG_ARCH_IMX is not set
140# CONFIG_ARCH_IOP13XX is not set
141# CONFIG_ARCH_IOP32X is not set
142# CONFIG_ARCH_IOP33X is not set
143# CONFIG_ARCH_IXP23XX is not set
72# CONFIG_ARCH_IXP2000 is not set 144# CONFIG_ARCH_IXP2000 is not set
145# CONFIG_ARCH_IXP4XX is not set
73# CONFIG_ARCH_L7200 is not set 146# CONFIG_ARCH_L7200 is not set
147# CONFIG_ARCH_KIRKWOOD is not set
148# CONFIG_ARCH_KS8695 is not set
149# CONFIG_ARCH_NS9XXX is not set
150# CONFIG_ARCH_LOKI is not set
151# CONFIG_ARCH_MV78XX0 is not set
152# CONFIG_ARCH_MXC is not set
153# CONFIG_ARCH_ORION5X is not set
154# CONFIG_ARCH_PNX4008 is not set
74# CONFIG_ARCH_PXA is not set 155# CONFIG_ARCH_PXA is not set
75# CONFIG_ARCH_RPC is not set 156# CONFIG_ARCH_RPC is not set
76# CONFIG_ARCH_SA1100 is not set 157# CONFIG_ARCH_SA1100 is not set
77# CONFIG_ARCH_S3C2410 is not set 158# CONFIG_ARCH_S3C2410 is not set
78# CONFIG_ARCH_SHARK is not set 159# CONFIG_ARCH_SHARK is not set
79# CONFIG_ARCH_LH7A40X is not set 160# CONFIG_ARCH_LH7A40X is not set
161# CONFIG_ARCH_DAVINCI is not set
80# CONFIG_ARCH_OMAP is not set 162# CONFIG_ARCH_OMAP is not set
81# CONFIG_ARCH_VERSATILE is not set 163# CONFIG_ARCH_MSM is not set
82CONFIG_ARCH_REALVIEW=y 164
83# CONFIG_ARCH_IMX is not set 165#
84# CONFIG_ARCH_H720X is not set 166# Boot options
85# CONFIG_ARCH_AAEC2000 is not set 167#
168
169#
170# Power management
171#
86 172
87# 173#
88# RealView platform type 174# RealView platform type
89# 175#
90CONFIG_MACH_REALVIEW_EB=y 176CONFIG_MACH_REALVIEW_EB=y
177# CONFIG_REALVIEW_EB_A9MP is not set
178CONFIG_REALVIEW_EB_ARM11MP=y
179# CONFIG_REALVIEW_EB_ARM11MP_REVB is not set
180CONFIG_MACH_REALVIEW_PB11MP=y
181CONFIG_MACH_REALVIEW_PB1176=y
182# CONFIG_MACH_REALVIEW_PBA8 is not set
91 183
92# 184#
93# Processor Type 185# Processor Type
94# 186#
95CONFIG_CPU_32=y 187CONFIG_CPU_32=y
96CONFIG_CPU_ARM926T=y 188# CONFIG_CPU_ARM926T is not set
97# CONFIG_CPU_V6 is not set 189CONFIG_CPU_V6=y
98CONFIG_CPU_32v5=y 190# CONFIG_CPU_32v6K is not set
99CONFIG_CPU_ABRT_EV5TJ=y 191# CONFIG_CPU_V7 is not set
100CONFIG_CPU_CACHE_VIVT=y 192CONFIG_CPU_32v6=y
101CONFIG_CPU_COPY_V4WB=y 193CONFIG_CPU_ABRT_EV6=y
102CONFIG_CPU_TLB_V4WBI=y 194CONFIG_CPU_PABRT_NOIFAR=y
195CONFIG_CPU_CACHE_V6=y
196CONFIG_CPU_CACHE_VIPT=y
197CONFIG_CPU_COPY_V6=y
198CONFIG_CPU_TLB_V6=y
199CONFIG_CPU_HAS_ASID=y
200CONFIG_CPU_CP15=y
201CONFIG_CPU_CP15_MMU=y
103 202
104# 203#
105# Processor Features 204# Processor Features
@@ -107,8 +206,9 @@ CONFIG_CPU_TLB_V4WBI=y
107CONFIG_ARM_THUMB=y 206CONFIG_ARM_THUMB=y
108# CONFIG_CPU_ICACHE_DISABLE is not set 207# CONFIG_CPU_ICACHE_DISABLE is not set
109# CONFIG_CPU_DCACHE_DISABLE is not set 208# CONFIG_CPU_DCACHE_DISABLE is not set
110# CONFIG_CPU_DCACHE_WRITETHROUGH is not set 209# CONFIG_CPU_BPREDICT_DISABLE is not set
111# CONFIG_CPU_CACHE_ROUND_ROBIN is not set 210CONFIG_OUTER_CACHE=y
211CONFIG_CACHE_L2X0=y
112CONFIG_ARM_GIC=y 212CONFIG_ARM_GIC=y
113CONFIG_ICST307=y 213CONFIG_ICST307=y
114 214
@@ -116,20 +216,41 @@ CONFIG_ICST307=y
116# Bus support 216# Bus support
117# 217#
118CONFIG_ARM_AMBA=y 218CONFIG_ARM_AMBA=y
119CONFIG_ISA_DMA_API=y 219# CONFIG_PCI_SYSCALL is not set
120 220# CONFIG_ARCH_SUPPORTS_MSI is not set
121#
122# PCCARD (PCMCIA/CardBus) support
123#
124# CONFIG_PCCARD is not set 221# CONFIG_PCCARD is not set
125 222
126# 223#
127# Kernel Features 224# Kernel Features
128# 225#
129# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 226# CONFIG_NO_HZ is not set
227# CONFIG_HIGH_RES_TIMERS is not set
228CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
229# CONFIG_SMP is not set
230CONFIG_VMSPLIT_3G=y
231# CONFIG_VMSPLIT_2G is not set
232# CONFIG_VMSPLIT_1G is not set
233CONFIG_PAGE_OFFSET=0xC0000000
234# CONFIG_PREEMPT is not set
235CONFIG_HZ=100
236CONFIG_AEABI=y
237CONFIG_OABI_COMPAT=y
238CONFIG_ARCH_FLATMEM_HAS_HOLES=y
239# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
240# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
241CONFIG_SELECT_MEMORY_MODEL=y
242CONFIG_FLATMEM_MANUAL=y
243# CONFIG_DISCONTIGMEM_MANUAL is not set
244# CONFIG_SPARSEMEM_MANUAL is not set
130CONFIG_FLATMEM=y 245CONFIG_FLATMEM=y
131CONFIG_FLAT_NODE_MEM_MAP=y 246CONFIG_FLAT_NODE_MEM_MAP=y
132# CONFIG_SPARSEMEM_STATIC is not set 247CONFIG_PAGEFLAGS_EXTENDED=y
248CONFIG_SPLIT_PTLOCK_CPUS=4
249# CONFIG_RESOURCES_64BIT is not set
250# CONFIG_PHYS_ADDR_T_64BIT is not set
251CONFIG_ZONE_DMA_FLAG=0
252CONFIG_VIRT_TO_BUS=y
253CONFIG_UNEVICTABLE_LRU=y
133CONFIG_ALIGNMENT_TRAP=y 254CONFIG_ALIGNMENT_TRAP=y
134 255
135# 256#
@@ -139,6 +260,12 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
139CONFIG_ZBOOT_ROM_BSS=0x0 260CONFIG_ZBOOT_ROM_BSS=0x0
140CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M" 261CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
141# CONFIG_XIP_KERNEL is not set 262# CONFIG_XIP_KERNEL is not set
263# CONFIG_KEXEC is not set
264
265#
266# CPU Power Management
267#
268# CONFIG_CPU_IDLE is not set
142 269
143# 270#
144# Floating point emulation 271# Floating point emulation
@@ -147,26 +274,24 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=tt
147# 274#
148# At least one emulation must be selected 275# At least one emulation must be selected
149# 276#
150CONFIG_FPE_NWFPE=y 277# CONFIG_FPE_NWFPE is not set
151# CONFIG_FPE_NWFPE_XP is not set 278# CONFIG_FPE_FASTFPE is not set
152# CONFIG_VFP is not set 279CONFIG_VFP=y
153 280
154# 281#
155# Userspace binary formats 282# Userspace binary formats
156# 283#
157CONFIG_BINFMT_ELF=y 284CONFIG_BINFMT_ELF=y
285# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
286CONFIG_HAVE_AOUT=y
158# CONFIG_BINFMT_AOUT is not set 287# CONFIG_BINFMT_AOUT is not set
159# CONFIG_BINFMT_MISC is not set 288# CONFIG_BINFMT_MISC is not set
160# CONFIG_ARTHUR is not set
161 289
162# 290#
163# Power management options 291# Power management options
164# 292#
165# CONFIG_PM is not set 293# CONFIG_PM is not set
166 294CONFIG_ARCH_SUSPEND_POSSIBLE=y
167#
168# Networking
169#
170CONFIG_NET=y 295CONFIG_NET=y
171 296
172# 297#
@@ -175,6 +300,11 @@ CONFIG_NET=y
175CONFIG_PACKET=y 300CONFIG_PACKET=y
176# CONFIG_PACKET_MMAP is not set 301# CONFIG_PACKET_MMAP is not set
177CONFIG_UNIX=y 302CONFIG_UNIX=y
303CONFIG_XFRM=y
304# CONFIG_XFRM_USER is not set
305# CONFIG_XFRM_SUB_POLICY is not set
306# CONFIG_XFRM_MIGRATE is not set
307# CONFIG_XFRM_STATISTICS is not set
178# CONFIG_NET_KEY is not set 308# CONFIG_NET_KEY is not set
179CONFIG_INET=y 309CONFIG_INET=y
180# CONFIG_IP_MULTICAST is not set 310# CONFIG_IP_MULTICAST is not set
@@ -186,34 +316,56 @@ CONFIG_IP_PNP_BOOTP=y
186# CONFIG_IP_PNP_RARP is not set 316# CONFIG_IP_PNP_RARP is not set
187# CONFIG_NET_IPIP is not set 317# CONFIG_NET_IPIP is not set
188# CONFIG_NET_IPGRE is not set 318# CONFIG_NET_IPGRE is not set
319# CONFIG_ARPD is not set
189# CONFIG_SYN_COOKIES is not set 320# CONFIG_SYN_COOKIES is not set
190# CONFIG_INET_AH is not set 321# CONFIG_INET_AH is not set
191# CONFIG_INET_ESP is not set 322# CONFIG_INET_ESP is not set
192# CONFIG_INET_IPCOMP is not set 323# CONFIG_INET_IPCOMP is not set
324# CONFIG_INET_XFRM_TUNNEL is not set
193# CONFIG_INET_TUNNEL is not set 325# CONFIG_INET_TUNNEL is not set
326CONFIG_INET_XFRM_MODE_TRANSPORT=y
327CONFIG_INET_XFRM_MODE_TUNNEL=y
328CONFIG_INET_XFRM_MODE_BEET=y
329# CONFIG_INET_LRO is not set
194CONFIG_INET_DIAG=y 330CONFIG_INET_DIAG=y
195CONFIG_INET_TCP_DIAG=y 331CONFIG_INET_TCP_DIAG=y
196# CONFIG_TCP_CONG_ADVANCED is not set 332# CONFIG_TCP_CONG_ADVANCED is not set
197CONFIG_TCP_CONG_BIC=y 333CONFIG_TCP_CONG_CUBIC=y
334CONFIG_DEFAULT_TCP_CONG="cubic"
335# CONFIG_TCP_MD5SIG is not set
198# CONFIG_IPV6 is not set 336# CONFIG_IPV6 is not set
337# CONFIG_NETWORK_SECMARK is not set
199# CONFIG_NETFILTER is not set 338# CONFIG_NETFILTER is not set
339# CONFIG_IP_DCCP is not set
340# CONFIG_IP_SCTP is not set
341# CONFIG_TIPC is not set
342# CONFIG_ATM is not set
200# CONFIG_BRIDGE is not set 343# CONFIG_BRIDGE is not set
344# CONFIG_NET_DSA is not set
201# CONFIG_VLAN_8021Q is not set 345# CONFIG_VLAN_8021Q is not set
202# CONFIG_DECNET is not set 346# CONFIG_DECNET is not set
203# CONFIG_LLC2 is not set 347# CONFIG_LLC2 is not set
204# CONFIG_IPX is not set 348# CONFIG_IPX is not set
205# CONFIG_ATALK is not set 349# CONFIG_ATALK is not set
350# CONFIG_X25 is not set
351# CONFIG_LAPB is not set
352# CONFIG_ECONET is not set
353# CONFIG_WAN_ROUTER is not set
206# CONFIG_NET_SCHED is not set 354# CONFIG_NET_SCHED is not set
207# CONFIG_NET_CLS_ROUTE is not set
208 355
209# 356#
210# Network testing 357# Network testing
211# 358#
212# CONFIG_NET_PKTGEN is not set 359# CONFIG_NET_PKTGEN is not set
213# CONFIG_HAMRADIO is not set 360# CONFIG_HAMRADIO is not set
361# CONFIG_CAN is not set
214# CONFIG_IRDA is not set 362# CONFIG_IRDA is not set
215# CONFIG_BT is not set 363# CONFIG_BT is not set
216# CONFIG_IEEE80211 is not set 364# CONFIG_AF_RXRPC is not set
365# CONFIG_PHONET is not set
366# CONFIG_WIRELESS is not set
367# CONFIG_RFKILL is not set
368# CONFIG_NET_9P is not set
217 369
218# 370#
219# Device Drivers 371# Device Drivers
@@ -222,30 +374,37 @@ CONFIG_TCP_CONG_BIC=y
222# 374#
223# Generic Driver Options 375# Generic Driver Options
224# 376#
377CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
225CONFIG_STANDALONE=y 378CONFIG_STANDALONE=y
226CONFIG_PREVENT_FIRMWARE_BUILD=y 379CONFIG_PREVENT_FIRMWARE_BUILD=y
227# CONFIG_FW_LOADER is not set 380CONFIG_FW_LOADER=y
381CONFIG_FIRMWARE_IN_KERNEL=y
382CONFIG_EXTRA_FIRMWARE=""
228# CONFIG_DEBUG_DRIVER is not set 383# CONFIG_DEBUG_DRIVER is not set
229 384# CONFIG_DEBUG_DEVRES is not set
230# 385# CONFIG_SYS_HYPERVISOR is not set
231# Memory Technology Devices (MTD) 386# CONFIG_CONNECTOR is not set
232#
233CONFIG_MTD=y 387CONFIG_MTD=y
234# CONFIG_MTD_DEBUG is not set 388# CONFIG_MTD_DEBUG is not set
235# CONFIG_MTD_CONCAT is not set 389CONFIG_MTD_CONCAT=y
236CONFIG_MTD_PARTITIONS=y 390CONFIG_MTD_PARTITIONS=y
237# CONFIG_MTD_REDBOOT_PARTS is not set 391# CONFIG_MTD_REDBOOT_PARTS is not set
238CONFIG_MTD_CMDLINE_PARTS=y 392CONFIG_MTD_CMDLINE_PARTS=y
239# CONFIG_MTD_AFS_PARTS is not set 393# CONFIG_MTD_AFS_PARTS is not set
394# CONFIG_MTD_AR7_PARTS is not set
240 395
241# 396#
242# User Modules And Translation Layers 397# User Modules And Translation Layers
243# 398#
244CONFIG_MTD_CHAR=y 399CONFIG_MTD_CHAR=y
400CONFIG_MTD_BLKDEVS=y
245CONFIG_MTD_BLOCK=y 401CONFIG_MTD_BLOCK=y
246# CONFIG_FTL is not set 402# CONFIG_FTL is not set
247# CONFIG_NFTL is not set 403# CONFIG_NFTL is not set
248# CONFIG_INFTL is not set 404# CONFIG_INFTL is not set
405# CONFIG_RFD_FTL is not set
406# CONFIG_SSFDC is not set
407# CONFIG_MTD_OOPS is not set
249 408
250# 409#
251# RAM/ROM/Flash chip drivers 410# RAM/ROM/Flash chip drivers
@@ -266,7 +425,6 @@ CONFIG_MTD_CFI_I2=y
266# CONFIG_MTD_CFI_I8 is not set 425# CONFIG_MTD_CFI_I8 is not set
267CONFIG_MTD_CFI_INTELEXT=y 426CONFIG_MTD_CFI_INTELEXT=y
268CONFIG_MTD_CFI_AMDSTD=y 427CONFIG_MTD_CFI_AMDSTD=y
269CONFIG_MTD_CFI_AMDSTD_RETRY=0
270# CONFIG_MTD_CFI_STAA is not set 428# CONFIG_MTD_CFI_STAA is not set
271CONFIG_MTD_CFI_UTIL=y 429CONFIG_MTD_CFI_UTIL=y
272# CONFIG_MTD_RAM is not set 430# CONFIG_MTD_RAM is not set
@@ -279,7 +437,6 @@ CONFIG_MTD_CFI_UTIL=y
279# CONFIG_MTD_COMPLEX_MAPPINGS is not set 437# CONFIG_MTD_COMPLEX_MAPPINGS is not set
280# CONFIG_MTD_PHYSMAP is not set 438# CONFIG_MTD_PHYSMAP is not set
281CONFIG_MTD_ARM_INTEGRATOR=y 439CONFIG_MTD_ARM_INTEGRATOR=y
282# CONFIG_MTD_EDB7312 is not set
283# CONFIG_MTD_PLATRAM is not set 440# CONFIG_MTD_PLATRAM is not set
284 441
285# 442#
@@ -288,7 +445,7 @@ CONFIG_MTD_ARM_INTEGRATOR=y
288# CONFIG_MTD_SLRAM is not set 445# CONFIG_MTD_SLRAM is not set
289# CONFIG_MTD_PHRAM is not set 446# CONFIG_MTD_PHRAM is not set
290# CONFIG_MTD_MTDRAM is not set 447# CONFIG_MTD_MTDRAM is not set
291# CONFIG_MTD_BLKMTD is not set 448# CONFIG_MTD_BLOCK2MTD is not set
292 449
293# 450#
294# Disk-On-Chip Device Drivers 451# Disk-On-Chip Device Drivers
@@ -296,121 +453,81 @@ CONFIG_MTD_ARM_INTEGRATOR=y
296# CONFIG_MTD_DOC2000 is not set 453# CONFIG_MTD_DOC2000 is not set
297# CONFIG_MTD_DOC2001 is not set 454# CONFIG_MTD_DOC2001 is not set
298# CONFIG_MTD_DOC2001PLUS is not set 455# CONFIG_MTD_DOC2001PLUS is not set
299
300#
301# NAND Flash Device Drivers
302#
303# CONFIG_MTD_NAND is not set 456# CONFIG_MTD_NAND is not set
457# CONFIG_MTD_ONENAND is not set
304 458
305# 459#
306# Parallel port support 460# UBI - Unsorted block images
307# 461#
462# CONFIG_MTD_UBI is not set
308# CONFIG_PARPORT is not set 463# CONFIG_PARPORT is not set
309 464CONFIG_BLK_DEV=y
310#
311# Plug and Play support
312#
313
314#
315# Block devices
316#
317# CONFIG_BLK_DEV_COW_COMMON is not set 465# CONFIG_BLK_DEV_COW_COMMON is not set
318# CONFIG_BLK_DEV_LOOP is not set 466# CONFIG_BLK_DEV_LOOP is not set
319# CONFIG_BLK_DEV_NBD is not set 467# CONFIG_BLK_DEV_NBD is not set
320# CONFIG_BLK_DEV_RAM is not set 468# CONFIG_BLK_DEV_RAM is not set
321CONFIG_BLK_DEV_RAM_COUNT=16
322# CONFIG_CDROM_PKTCDVD is not set 469# CONFIG_CDROM_PKTCDVD is not set
323
324#
325# IO Schedulers
326#
327CONFIG_IOSCHED_NOOP=y
328# CONFIG_IOSCHED_AS is not set
329CONFIG_IOSCHED_DEADLINE=y
330# CONFIG_IOSCHED_CFQ is not set
331# CONFIG_ATA_OVER_ETH is not set 470# CONFIG_ATA_OVER_ETH is not set
471CONFIG_MISC_DEVICES=y
472# CONFIG_EEPROM_93CX6 is not set
473# CONFIG_ENCLOSURE_SERVICES is not set
474CONFIG_HAVE_IDE=y
475# CONFIG_IDE is not set
332 476
333# 477#
334# SCSI device support 478# SCSI device support
335# 479#
336# CONFIG_RAID_ATTRS is not set 480# CONFIG_RAID_ATTRS is not set
337# CONFIG_SCSI is not set 481# CONFIG_SCSI is not set
338 482# CONFIG_SCSI_DMA is not set
339# 483# CONFIG_SCSI_NETLINK is not set
340# Multi-device support (RAID and LVM) 484# CONFIG_ATA is not set
341#
342# CONFIG_MD is not set 485# CONFIG_MD is not set
343
344#
345# Fusion MPT device support
346#
347# CONFIG_FUSION is not set
348
349#
350# IEEE 1394 (FireWire) support
351#
352
353#
354# I2O device support
355#
356
357#
358# Network device support
359#
360CONFIG_NETDEVICES=y 486CONFIG_NETDEVICES=y
361# CONFIG_DUMMY is not set 487# CONFIG_DUMMY is not set
362# CONFIG_BONDING is not set 488# CONFIG_BONDING is not set
489# CONFIG_MACVLAN is not set
363# CONFIG_EQUALIZER is not set 490# CONFIG_EQUALIZER is not set
364# CONFIG_TUN is not set 491# CONFIG_TUN is not set
365 492# CONFIG_VETH is not set
366#
367# PHY device support
368#
369# CONFIG_PHYLIB is not set 493# CONFIG_PHYLIB is not set
370
371#
372# Ethernet (10 or 100Mbit)
373#
374CONFIG_NET_ETHERNET=y 494CONFIG_NET_ETHERNET=y
375CONFIG_MII=y 495CONFIG_MII=y
496# CONFIG_AX88796 is not set
376CONFIG_SMC91X=y 497CONFIG_SMC91X=y
377# CONFIG_DM9000 is not set 498# CONFIG_DM9000 is not set
378 499CONFIG_SMC911X=y
379# 500# CONFIG_IBM_NEW_EMAC_ZMII is not set
380# Ethernet (1000 Mbit) 501# CONFIG_IBM_NEW_EMAC_RGMII is not set
381# 502# CONFIG_IBM_NEW_EMAC_TAH is not set
382 503# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
383# 504# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
384# Ethernet (10000 Mbit) 505# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
385# 506# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
386 507# CONFIG_B44 is not set
387# 508# CONFIG_NETDEV_1000 is not set
388# Token Ring devices 509# CONFIG_NETDEV_10000 is not set
389# 510
390 511#
391# 512# Wireless LAN
392# Wireless LAN (non-hamradio) 513#
393# 514# CONFIG_WLAN_PRE80211 is not set
394# CONFIG_NET_RADIO is not set 515# CONFIG_WLAN_80211 is not set
395 516# CONFIG_IWLWIFI_LEDS is not set
396#
397# Wan interfaces
398#
399# CONFIG_WAN is not set 517# CONFIG_WAN is not set
400# CONFIG_PPP is not set 518# CONFIG_PPP is not set
401# CONFIG_SLIP is not set 519# CONFIG_SLIP is not set
520# CONFIG_NETCONSOLE is not set
402# CONFIG_NETPOLL is not set 521# CONFIG_NETPOLL is not set
403# CONFIG_NET_POLL_CONTROLLER is not set 522# CONFIG_NET_POLL_CONTROLLER is not set
404
405#
406# ISDN subsystem
407#
408# CONFIG_ISDN is not set 523# CONFIG_ISDN is not set
409 524
410# 525#
411# Input device support 526# Input device support
412# 527#
413CONFIG_INPUT=y 528CONFIG_INPUT=y
529# CONFIG_INPUT_FF_MEMLESS is not set
530# CONFIG_INPUT_POLLDEV is not set
414 531
415# 532#
416# Userland interfaces 533# Userland interfaces
@@ -420,7 +537,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
420CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 537CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
421CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 538CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
422# CONFIG_INPUT_JOYDEV is not set 539# CONFIG_INPUT_JOYDEV is not set
423# CONFIG_INPUT_TSDEV is not set
424# CONFIG_INPUT_EVDEV is not set 540# CONFIG_INPUT_EVDEV is not set
425# CONFIG_INPUT_EVBUG is not set 541# CONFIG_INPUT_EVBUG is not set
426 542
@@ -433,11 +549,19 @@ CONFIG_KEYBOARD_ATKBD=y
433# CONFIG_KEYBOARD_LKKBD is not set 549# CONFIG_KEYBOARD_LKKBD is not set
434# CONFIG_KEYBOARD_XTKBD is not set 550# CONFIG_KEYBOARD_XTKBD is not set
435# CONFIG_KEYBOARD_NEWTON is not set 551# CONFIG_KEYBOARD_NEWTON is not set
552# CONFIG_KEYBOARD_STOWAWAY is not set
436CONFIG_INPUT_MOUSE=y 553CONFIG_INPUT_MOUSE=y
437CONFIG_MOUSE_PS2=y 554CONFIG_MOUSE_PS2=y
555CONFIG_MOUSE_PS2_ALPS=y
556CONFIG_MOUSE_PS2_LOGIPS2PP=y
557CONFIG_MOUSE_PS2_SYNAPTICS=y
558CONFIG_MOUSE_PS2_LIFEBOOK=y
559CONFIG_MOUSE_PS2_TRACKPOINT=y
560# CONFIG_MOUSE_PS2_TOUCHKIT is not set
438# CONFIG_MOUSE_SERIAL is not set 561# CONFIG_MOUSE_SERIAL is not set
439# CONFIG_MOUSE_VSXXXAA is not set 562# CONFIG_MOUSE_VSXXXAA is not set
440# CONFIG_INPUT_JOYSTICK is not set 563# CONFIG_INPUT_JOYSTICK is not set
564# CONFIG_INPUT_TABLET is not set
441# CONFIG_INPUT_TOUCHSCREEN is not set 565# CONFIG_INPUT_TOUCHSCREEN is not set
442# CONFIG_INPUT_MISC is not set 566# CONFIG_INPUT_MISC is not set
443 567
@@ -455,8 +579,11 @@ CONFIG_SERIO_LIBPS2=y
455# Character devices 579# Character devices
456# 580#
457CONFIG_VT=y 581CONFIG_VT=y
582CONFIG_CONSOLE_TRANSLATIONS=y
458CONFIG_VT_CONSOLE=y 583CONFIG_VT_CONSOLE=y
459CONFIG_HW_CONSOLE=y 584CONFIG_HW_CONSOLE=y
585# CONFIG_VT_HW_CONSOLE_BINDING is not set
586CONFIG_DEVKMEM=y
460# CONFIG_SERIAL_NONSTANDARD is not set 587# CONFIG_SERIAL_NONSTANDARD is not set
461 588
462# 589#
@@ -475,73 +602,91 @@ CONFIG_SERIAL_CORE_CONSOLE=y
475CONFIG_UNIX98_PTYS=y 602CONFIG_UNIX98_PTYS=y
476CONFIG_LEGACY_PTYS=y 603CONFIG_LEGACY_PTYS=y
477CONFIG_LEGACY_PTY_COUNT=16 604CONFIG_LEGACY_PTY_COUNT=16
478
479#
480# IPMI
481#
482# CONFIG_IPMI_HANDLER is not set 605# CONFIG_IPMI_HANDLER is not set
483 606# CONFIG_HW_RANDOM is not set
484#
485# Watchdog Cards
486#
487# CONFIG_WATCHDOG is not set
488# CONFIG_NVRAM is not set 607# CONFIG_NVRAM is not set
489# CONFIG_RTC is not set
490# CONFIG_DTLK is not set
491# CONFIG_R3964 is not set 608# CONFIG_R3964 is not set
492
493#
494# Ftape, the floppy tape device driver
495#
496# CONFIG_RAW_DRIVER is not set 609# CONFIG_RAW_DRIVER is not set
497 610# CONFIG_TCG_TPM is not set
498#
499# TPM devices
500#
501
502#
503# I2C support
504#
505# CONFIG_I2C is not set 611# CONFIG_I2C is not set
612# CONFIG_SPI is not set
613# CONFIG_W1 is not set
614# CONFIG_POWER_SUPPLY is not set
615# CONFIG_HWMON is not set
616# CONFIG_THERMAL is not set
617# CONFIG_THERMAL_HWMON is not set
618# CONFIG_WATCHDOG is not set
506 619
507# 620#
508# Hardware Monitoring support 621# Sonics Silicon Backplane
509# 622#
510# CONFIG_HWMON is not set 623CONFIG_SSB_POSSIBLE=y
511# CONFIG_HWMON_VID is not set 624# CONFIG_SSB is not set
512 625
513# 626#
514# Misc devices 627# Multifunction device drivers
515# 628#
629# CONFIG_MFD_CORE is not set
630# CONFIG_MFD_SM501 is not set
631# CONFIG_HTC_PASIC3 is not set
632# CONFIG_MFD_TMIO is not set
633# CONFIG_MFD_T7L66XB is not set
634# CONFIG_MFD_TC6387XB is not set
635# CONFIG_MFD_WM8400 is not set
516 636
517# 637#
518# Multimedia Capabilities Port drivers 638# Multimedia devices
519# 639#
520 640
521# 641#
522# Multimedia devices 642# Multimedia core support
523# 643#
524# CONFIG_VIDEO_DEV is not set 644# CONFIG_VIDEO_DEV is not set
645# CONFIG_DVB_CORE is not set
646# CONFIG_VIDEO_MEDIA is not set
525 647
526# 648#
527# Digital Video Broadcasting Devices 649# Multimedia drivers
528# 650#
529# CONFIG_DVB is not set 651# CONFIG_DAB is not set
530 652
531# 653#
532# Graphics support 654# Graphics support
533# 655#
656# CONFIG_VGASTATE is not set
657# CONFIG_VIDEO_OUTPUT_CONTROL is not set
534CONFIG_FB=y 658CONFIG_FB=y
659# CONFIG_FIRMWARE_EDID is not set
660# CONFIG_FB_DDC is not set
661# CONFIG_FB_BOOT_VESA_SUPPORT is not set
535CONFIG_FB_CFB_FILLRECT=y 662CONFIG_FB_CFB_FILLRECT=y
536CONFIG_FB_CFB_COPYAREA=y 663CONFIG_FB_CFB_COPYAREA=y
537CONFIG_FB_CFB_IMAGEBLIT=y 664CONFIG_FB_CFB_IMAGEBLIT=y
538CONFIG_FB_SOFT_CURSOR=y 665# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
666# CONFIG_FB_SYS_FILLRECT is not set
667# CONFIG_FB_SYS_COPYAREA is not set
668# CONFIG_FB_SYS_IMAGEBLIT is not set
669# CONFIG_FB_FOREIGN_ENDIAN is not set
670# CONFIG_FB_SYS_FOPS is not set
671# CONFIG_FB_SVGALIB is not set
539# CONFIG_FB_MACMODES is not set 672# CONFIG_FB_MACMODES is not set
673# CONFIG_FB_BACKLIGHT is not set
540# CONFIG_FB_MODE_HELPERS is not set 674# CONFIG_FB_MODE_HELPERS is not set
541# CONFIG_FB_TILEBLITTING is not set 675# CONFIG_FB_TILEBLITTING is not set
676
677#
678# Frame buffer hardware drivers
679#
542CONFIG_FB_ARMCLCD=y 680CONFIG_FB_ARMCLCD=y
543# CONFIG_FB_S1D13XXX is not set 681# CONFIG_FB_S1D13XXX is not set
544# CONFIG_FB_VIRTUAL is not set 682# CONFIG_FB_VIRTUAL is not set
683# CONFIG_FB_METRONOME is not set
684# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
685
686#
687# Display device support
688#
689# CONFIG_DISPLAY_SUPPORT is not set
545 690
546# 691#
547# Console display driver support 692# Console display driver support
@@ -549,27 +694,17 @@ CONFIG_FB_ARMCLCD=y
549# CONFIG_VGA_CONSOLE is not set 694# CONFIG_VGA_CONSOLE is not set
550CONFIG_DUMMY_CONSOLE=y 695CONFIG_DUMMY_CONSOLE=y
551CONFIG_FRAMEBUFFER_CONSOLE=y 696CONFIG_FRAMEBUFFER_CONSOLE=y
697# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
698# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
552# CONFIG_FONTS is not set 699# CONFIG_FONTS is not set
553CONFIG_FONT_8x8=y 700CONFIG_FONT_8x8=y
554CONFIG_FONT_8x16=y 701CONFIG_FONT_8x16=y
555
556#
557# Logo configuration
558#
559CONFIG_LOGO=y 702CONFIG_LOGO=y
560# CONFIG_LOGO_LINUX_MONO is not set 703# CONFIG_LOGO_LINUX_MONO is not set
561# CONFIG_LOGO_LINUX_VGA16 is not set 704# CONFIG_LOGO_LINUX_VGA16 is not set
562CONFIG_LOGO_LINUX_CLUT224=y 705CONFIG_LOGO_LINUX_CLUT224=y
563# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
564
565#
566# Sound
567#
568CONFIG_SOUND=y 706CONFIG_SOUND=y
569 707CONFIG_SOUND_OSS_CORE=y
570#
571# Advanced Linux Sound Architecture
572#
573CONFIG_SND=y 708CONFIG_SND=y
574CONFIG_SND_TIMER=y 709CONFIG_SND_TIMER=y
575CONFIG_SND_PCM=y 710CONFIG_SND_PCM=y
@@ -577,59 +712,71 @@ CONFIG_SND_PCM=y
577CONFIG_SND_OSSEMUL=y 712CONFIG_SND_OSSEMUL=y
578CONFIG_SND_MIXER_OSS=y 713CONFIG_SND_MIXER_OSS=y
579CONFIG_SND_PCM_OSS=y 714CONFIG_SND_PCM_OSS=y
715CONFIG_SND_PCM_OSS_PLUGINS=y
716# CONFIG_SND_DYNAMIC_MINORS is not set
717CONFIG_SND_SUPPORT_OLD_API=y
718CONFIG_SND_VERBOSE_PROCFS=y
580# CONFIG_SND_VERBOSE_PRINTK is not set 719# CONFIG_SND_VERBOSE_PRINTK is not set
581# CONFIG_SND_DEBUG is not set 720# CONFIG_SND_DEBUG is not set
582 721CONFIG_SND_VMASTER=y
583# 722CONFIG_SND_AC97_CODEC=y
584# Generic devices 723# CONFIG_SND_DRIVERS is not set
585# 724CONFIG_SND_ARM=y
586# CONFIG_SND_DUMMY is not set 725CONFIG_SND_ARMAACI=y
587# CONFIG_SND_MTPAV is not set 726# CONFIG_SND_SOC is not set
588# CONFIG_SND_SERIAL_U16550 is not set
589# CONFIG_SND_MPU401 is not set
590
591#
592# ALSA ARM devices
593#
594# CONFIG_SND_ARMAACI is not set
595
596#
597# Open Sound System
598#
599# CONFIG_SOUND_PRIME is not set 727# CONFIG_SOUND_PRIME is not set
728CONFIG_AC97_BUS=y
729# CONFIG_HID_SUPPORT is not set
730# CONFIG_USB_SUPPORT is not set
731CONFIG_MMC=y
732# CONFIG_MMC_DEBUG is not set
733# CONFIG_MMC_UNSAFE_RESUME is not set
600 734
601# 735#
602# USB support 736# MMC/SD/SDIO Card Drivers
603# 737#
604CONFIG_USB_ARCH_HAS_HCD=y 738CONFIG_MMC_BLOCK=y
605# CONFIG_USB_ARCH_HAS_OHCI is not set 739CONFIG_MMC_BLOCK_BOUNCE=y
606# CONFIG_USB is not set 740# CONFIG_SDIO_UART is not set
741# CONFIG_MMC_TEST is not set
607 742
608# 743#
609# USB Gadget Support 744# MMC/SD/SDIO Host Controller Drivers
610# 745#
611# CONFIG_USB_GADGET is not set 746CONFIG_MMC_ARMMMCI=y
747# CONFIG_MMC_SDHCI is not set
748# CONFIG_MEMSTICK is not set
749# CONFIG_ACCESSIBILITY is not set
750# CONFIG_NEW_LEDS is not set
751CONFIG_RTC_LIB=y
752# CONFIG_RTC_CLASS is not set
753# CONFIG_DMADEVICES is not set
612 754
613# 755#
614# MMC/SD Card support 756# Voltage and Current regulators
615# 757#
616# CONFIG_MMC is not set 758# CONFIG_REGULATOR is not set
759# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
760# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
761# CONFIG_REGULATOR_BQ24022 is not set
762# CONFIG_UIO is not set
617 763
618# 764#
619# File systems 765# File systems
620# 766#
621# CONFIG_EXT2_FS is not set 767# CONFIG_EXT2_FS is not set
622# CONFIG_EXT3_FS is not set 768# CONFIG_EXT3_FS is not set
623# CONFIG_JBD is not set 769# CONFIG_EXT4_FS is not set
624# CONFIG_REISERFS_FS is not set 770# CONFIG_REISERFS_FS is not set
625# CONFIG_JFS_FS is not set 771# CONFIG_JFS_FS is not set
626# CONFIG_FS_POSIX_ACL is not set 772# CONFIG_FS_POSIX_ACL is not set
773CONFIG_FILE_LOCKING=y
627# CONFIG_XFS_FS is not set 774# CONFIG_XFS_FS is not set
628# CONFIG_MINIX_FS is not set 775# CONFIG_OCFS2_FS is not set
629# CONFIG_ROMFS_FS is not set 776CONFIG_DNOTIFY=y
630CONFIG_INOTIFY=y 777CONFIG_INOTIFY=y
778CONFIG_INOTIFY_USER=y
631# CONFIG_QUOTA is not set 779# CONFIG_QUOTA is not set
632CONFIG_DNOTIFY=y
633# CONFIG_AUTOFS_FS is not set 780# CONFIG_AUTOFS_FS is not set
634# CONFIG_AUTOFS4_FS is not set 781# CONFIG_AUTOFS4_FS is not set
635# CONFIG_FUSE_FS is not set 782# CONFIG_FUSE_FS is not set
@@ -654,51 +801,59 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
654# Pseudo filesystems 801# Pseudo filesystems
655# 802#
656CONFIG_PROC_FS=y 803CONFIG_PROC_FS=y
804CONFIG_PROC_SYSCTL=y
805CONFIG_PROC_PAGE_MONITOR=y
657CONFIG_SYSFS=y 806CONFIG_SYSFS=y
658CONFIG_TMPFS=y 807CONFIG_TMPFS=y
808# CONFIG_TMPFS_POSIX_ACL is not set
659# CONFIG_HUGETLB_PAGE is not set 809# CONFIG_HUGETLB_PAGE is not set
660CONFIG_RAMFS=y 810# CONFIG_CONFIGFS_FS is not set
661# CONFIG_RELAYFS_FS is not set
662 811
663# 812#
664# Miscellaneous filesystems 813# Miscellaneous filesystems
665# 814#
815# CONFIG_ADFS_FS is not set
816# CONFIG_AFFS_FS is not set
817# CONFIG_HFS_FS is not set
666# CONFIG_HFSPLUS_FS is not set 818# CONFIG_HFSPLUS_FS is not set
667# CONFIG_JFFS_FS is not set 819# CONFIG_BEFS_FS is not set
820# CONFIG_BFS_FS is not set
821# CONFIG_EFS_FS is not set
668# CONFIG_JFFS2_FS is not set 822# CONFIG_JFFS2_FS is not set
669CONFIG_CRAMFS=y 823CONFIG_CRAMFS=y
670# CONFIG_VXFS_FS is not set 824# CONFIG_VXFS_FS is not set
825# CONFIG_MINIX_FS is not set
826# CONFIG_OMFS_FS is not set
671# CONFIG_HPFS_FS is not set 827# CONFIG_HPFS_FS is not set
672# CONFIG_QNX4FS_FS is not set 828# CONFIG_QNX4FS_FS is not set
829# CONFIG_ROMFS_FS is not set
673# CONFIG_SYSV_FS is not set 830# CONFIG_SYSV_FS is not set
674# CONFIG_UFS_FS is not set 831# CONFIG_UFS_FS is not set
675 832CONFIG_NETWORK_FILESYSTEMS=y
676#
677# Network File Systems
678#
679CONFIG_NFS_FS=y 833CONFIG_NFS_FS=y
680CONFIG_NFS_V3=y 834CONFIG_NFS_V3=y
681# CONFIG_NFS_V3_ACL is not set 835# CONFIG_NFS_V3_ACL is not set
682# CONFIG_NFSD is not set 836# CONFIG_NFS_V4 is not set
683CONFIG_ROOT_NFS=y 837CONFIG_ROOT_NFS=y
838# CONFIG_NFSD is not set
684CONFIG_LOCKD=y 839CONFIG_LOCKD=y
685CONFIG_LOCKD_V4=y 840CONFIG_LOCKD_V4=y
686CONFIG_NFS_COMMON=y 841CONFIG_NFS_COMMON=y
687CONFIG_SUNRPC=y 842CONFIG_SUNRPC=y
843# CONFIG_SUNRPC_REGISTER_V4 is not set
844# CONFIG_RPCSEC_GSS_KRB5 is not set
845# CONFIG_RPCSEC_GSS_SPKM3 is not set
688# CONFIG_SMB_FS is not set 846# CONFIG_SMB_FS is not set
689# CONFIG_CIFS is not set 847# CONFIG_CIFS is not set
690# CONFIG_NCP_FS is not set 848# CONFIG_NCP_FS is not set
691# CONFIG_CODA_FS is not set 849# CONFIG_CODA_FS is not set
850# CONFIG_AFS_FS is not set
692 851
693# 852#
694# Partition Types 853# Partition Types
695# 854#
696# CONFIG_PARTITION_ADVANCED is not set 855# CONFIG_PARTITION_ADVANCED is not set
697CONFIG_MSDOS_PARTITION=y 856CONFIG_MSDOS_PARTITION=y
698
699#
700# Native Language Support
701#
702CONFIG_NLS=y 857CONFIG_NLS=y
703CONFIG_NLS_DEFAULT="iso8859-1" 858CONFIG_NLS_DEFAULT="iso8859-1"
704CONFIG_NLS_CODEPAGE_437=y 859CONFIG_NLS_CODEPAGE_437=y
@@ -739,26 +894,71 @@ CONFIG_NLS_ISO8859_1=y
739# CONFIG_NLS_KOI8_R is not set 894# CONFIG_NLS_KOI8_R is not set
740# CONFIG_NLS_KOI8_U is not set 895# CONFIG_NLS_KOI8_U is not set
741# CONFIG_NLS_UTF8 is not set 896# CONFIG_NLS_UTF8 is not set
897# CONFIG_DLM is not set
742 898
743# 899#
744# Kernel hacking 900# Kernel hacking
745# 901#
746# CONFIG_PRINTK_TIME is not set 902# CONFIG_PRINTK_TIME is not set
747CONFIG_DEBUG_KERNEL=y 903CONFIG_ENABLE_WARN_DEPRECATED=y
904CONFIG_ENABLE_MUST_CHECK=y
905CONFIG_FRAME_WARN=1024
748CONFIG_MAGIC_SYSRQ=y 906CONFIG_MAGIC_SYSRQ=y
749CONFIG_LOG_BUF_SHIFT=14 907# CONFIG_UNUSED_SYMBOLS is not set
908# CONFIG_DEBUG_FS is not set
909# CONFIG_HEADERS_CHECK is not set
910CONFIG_DEBUG_KERNEL=y
911# CONFIG_DEBUG_SHIRQ is not set
750CONFIG_DETECT_SOFTLOCKUP=y 912CONFIG_DETECT_SOFTLOCKUP=y
913# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
914CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
915# CONFIG_SCHED_DEBUG is not set
751# CONFIG_SCHEDSTATS is not set 916# CONFIG_SCHEDSTATS is not set
917# CONFIG_TIMER_STATS is not set
918# CONFIG_DEBUG_OBJECTS is not set
752# CONFIG_DEBUG_SLAB is not set 919# CONFIG_DEBUG_SLAB is not set
920# CONFIG_DEBUG_RT_MUTEXES is not set
921# CONFIG_RT_MUTEX_TESTER is not set
753# CONFIG_DEBUG_SPINLOCK is not set 922# CONFIG_DEBUG_SPINLOCK is not set
923# CONFIG_DEBUG_MUTEXES is not set
924# CONFIG_DEBUG_LOCK_ALLOC is not set
925# CONFIG_PROVE_LOCKING is not set
926# CONFIG_LOCK_STAT is not set
754# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 927# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
928# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
755# CONFIG_DEBUG_KOBJECT is not set 929# CONFIG_DEBUG_KOBJECT is not set
756CONFIG_DEBUG_BUGVERBOSE=y 930CONFIG_DEBUG_BUGVERBOSE=y
757# CONFIG_DEBUG_INFO is not set 931# CONFIG_DEBUG_INFO is not set
758# CONFIG_DEBUG_FS is not set 932# CONFIG_DEBUG_VM is not set
933# CONFIG_DEBUG_WRITECOUNT is not set
934CONFIG_DEBUG_MEMORY_INIT=y
935# CONFIG_DEBUG_LIST is not set
936# CONFIG_DEBUG_SG is not set
759CONFIG_FRAME_POINTER=y 937CONFIG_FRAME_POINTER=y
938# CONFIG_BOOT_PRINTK_DELAY is not set
939# CONFIG_RCU_TORTURE_TEST is not set
940# CONFIG_RCU_CPU_STALL_DETECTOR is not set
941# CONFIG_BACKTRACE_SELF_TEST is not set
942# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
943# CONFIG_FAULT_INJECTION is not set
944# CONFIG_LATENCYTOP is not set
945# CONFIG_SYSCTL_SYSCALL_CHECK is not set
946CONFIG_NOP_TRACER=y
947CONFIG_HAVE_FTRACE=y
948CONFIG_HAVE_DYNAMIC_FTRACE=y
949# CONFIG_FTRACE is not set
950# CONFIG_IRQSOFF_TRACER is not set
951# CONFIG_SCHED_TRACER is not set
952# CONFIG_CONTEXT_SWITCH_TRACER is not set
953# CONFIG_BOOT_TRACER is not set
954# CONFIG_STACK_TRACER is not set
955# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
956# CONFIG_SAMPLES is not set
957CONFIG_HAVE_ARCH_KGDB=y
958# CONFIG_KGDB is not set
760CONFIG_DEBUG_USER=y 959CONFIG_DEBUG_USER=y
761CONFIG_DEBUG_ERRORS=y 960CONFIG_DEBUG_ERRORS=y
961# CONFIG_DEBUG_STACK_USAGE is not set
762# CONFIG_DEBUG_LL is not set 962# CONFIG_DEBUG_LL is not set
763 963
764# 964#
@@ -766,21 +966,106 @@ CONFIG_DEBUG_ERRORS=y
766# 966#
767# CONFIG_KEYS is not set 967# CONFIG_KEYS is not set
768# CONFIG_SECURITY is not set 968# CONFIG_SECURITY is not set
969# CONFIG_SECURITYFS is not set
970# CONFIG_SECURITY_FILE_CAPABILITIES is not set
971CONFIG_CRYPTO=y
972
973#
974# Crypto core or helper
975#
976# CONFIG_CRYPTO_FIPS is not set
977# CONFIG_CRYPTO_MANAGER is not set
978# CONFIG_CRYPTO_GF128MUL is not set
979# CONFIG_CRYPTO_NULL is not set
980# CONFIG_CRYPTO_CRYPTD is not set
981# CONFIG_CRYPTO_AUTHENC is not set
982# CONFIG_CRYPTO_TEST is not set
983
984#
985# Authenticated Encryption with Associated Data
986#
987# CONFIG_CRYPTO_CCM is not set
988# CONFIG_CRYPTO_GCM is not set
989# CONFIG_CRYPTO_SEQIV is not set
990
991#
992# Block modes
993#
994# CONFIG_CRYPTO_CBC is not set
995# CONFIG_CRYPTO_CTR is not set
996# CONFIG_CRYPTO_CTS is not set
997# CONFIG_CRYPTO_ECB is not set
998# CONFIG_CRYPTO_LRW is not set
999# CONFIG_CRYPTO_PCBC is not set
1000# CONFIG_CRYPTO_XTS is not set
1001
1002#
1003# Hash modes
1004#
1005# CONFIG_CRYPTO_HMAC is not set
1006# CONFIG_CRYPTO_XCBC is not set
1007
1008#
1009# Digest
1010#
1011# CONFIG_CRYPTO_CRC32C is not set
1012# CONFIG_CRYPTO_MD4 is not set
1013# CONFIG_CRYPTO_MD5 is not set
1014# CONFIG_CRYPTO_MICHAEL_MIC is not set
1015# CONFIG_CRYPTO_RMD128 is not set
1016# CONFIG_CRYPTO_RMD160 is not set
1017# CONFIG_CRYPTO_RMD256 is not set
1018# CONFIG_CRYPTO_RMD320 is not set
1019# CONFIG_CRYPTO_SHA1 is not set
1020# CONFIG_CRYPTO_SHA256 is not set
1021# CONFIG_CRYPTO_SHA512 is not set
1022# CONFIG_CRYPTO_TGR192 is not set
1023# CONFIG_CRYPTO_WP512 is not set
1024
1025#
1026# Ciphers
1027#
1028# CONFIG_CRYPTO_AES is not set
1029# CONFIG_CRYPTO_ANUBIS is not set
1030# CONFIG_CRYPTO_ARC4 is not set
1031# CONFIG_CRYPTO_BLOWFISH is not set
1032# CONFIG_CRYPTO_CAMELLIA is not set
1033# CONFIG_CRYPTO_CAST5 is not set
1034# CONFIG_CRYPTO_CAST6 is not set
1035# CONFIG_CRYPTO_DES is not set
1036# CONFIG_CRYPTO_FCRYPT is not set
1037# CONFIG_CRYPTO_KHAZAD is not set
1038# CONFIG_CRYPTO_SALSA20 is not set
1039# CONFIG_CRYPTO_SEED is not set
1040# CONFIG_CRYPTO_SERPENT is not set
1041# CONFIG_CRYPTO_TEA is not set
1042# CONFIG_CRYPTO_TWOFISH is not set
769 1043
770# 1044#
771# Cryptographic options 1045# Compression
772# 1046#
773# CONFIG_CRYPTO is not set 1047# CONFIG_CRYPTO_DEFLATE is not set
1048# CONFIG_CRYPTO_LZO is not set
774 1049
775# 1050#
776# Hardware crypto devices 1051# Random Number Generation
777# 1052#
1053# CONFIG_CRYPTO_ANSI_CPRNG is not set
1054# CONFIG_CRYPTO_HW is not set
778 1055
779# 1056#
780# Library routines 1057# Library routines
781# 1058#
1059CONFIG_BITREVERSE=y
782# CONFIG_CRC_CCITT is not set 1060# CONFIG_CRC_CCITT is not set
783# CONFIG_CRC16 is not set 1061# CONFIG_CRC16 is not set
1062# CONFIG_CRC_T10DIF is not set
1063# CONFIG_CRC_ITU_T is not set
784CONFIG_CRC32=y 1064CONFIG_CRC32=y
1065# CONFIG_CRC7 is not set
785# CONFIG_LIBCRC32C is not set 1066# CONFIG_LIBCRC32C is not set
786CONFIG_ZLIB_INFLATE=y 1067CONFIG_ZLIB_INFLATE=y
1068CONFIG_PLIST=y
1069CONFIG_HAS_IOMEM=y
1070CONFIG_HAS_IOPORT=y
1071CONFIG_HAS_DMA=y
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index de6c59f814a1..6cbd8fdc9f1f 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -10,11 +10,11 @@
10#ifndef _ASMARM_CACHEFLUSH_H 10#ifndef _ASMARM_CACHEFLUSH_H
11#define _ASMARM_CACHEFLUSH_H 11#define _ASMARM_CACHEFLUSH_H
12 12
13#include <linux/sched.h>
14#include <linux/mm.h> 13#include <linux/mm.h>
15 14
16#include <asm/glue.h> 15#include <asm/glue.h>
17#include <asm/shmparam.h> 16#include <asm/shmparam.h>
17#include <asm/cachetype.h>
18 18
19#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) 19#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
20 20
@@ -296,16 +296,6 @@ static inline void outer_flush_range(unsigned long start, unsigned long end)
296#endif 296#endif
297 297
298/* 298/*
299 * flush_cache_vmap() is used when creating mappings (eg, via vmap,
300 * vmalloc, ioremap etc) in kernel space for pages. Since the
301 * direct-mappings of these pages may contain cached data, we need
302 * to do a full cache flush to ensure that writebacks don't corrupt
303 * data placed into these pages via the new mappings.
304 */
305#define flush_cache_vmap(start, end) flush_cache_all()
306#define flush_cache_vunmap(start, end) flush_cache_all()
307
308/*
309 * Copy user data from/to a page which is mapped into a different 299 * Copy user data from/to a page which is mapped into a different
310 * processes address space. Really, we want to allow our "user 300 * processes address space. Really, we want to allow our "user
311 * space" model to handle this. 301 * space" model to handle this.
@@ -444,4 +434,29 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
444 dmac_inv_range(start, start + size); 434 dmac_inv_range(start, start + size);
445} 435}
446 436
437/*
438 * flush_cache_vmap() is used when creating mappings (eg, via vmap,
439 * vmalloc, ioremap etc) in kernel space for pages. On non-VIPT
440 * caches, since the direct-mappings of these pages may contain cached
441 * data, we need to do a full cache flush to ensure that writebacks
442 * don't corrupt data placed into these pages via the new mappings.
443 */
444static inline void flush_cache_vmap(unsigned long start, unsigned long end)
445{
446 if (!cache_is_vipt_nonaliasing())
447 flush_cache_all();
448 else
449 /*
450 * set_pte_at() called from vmap_pte_range() does not
451 * have a DSB after cleaning the cache line.
452 */
453 dsb();
454}
455
456static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
457{
458 if (!cache_is_vipt_nonaliasing())
459 flush_cache_all();
460}
461
447#endif 462#endif
diff --git a/arch/arm/include/asm/clkdev.h b/arch/arm/include/asm/clkdev.h
new file mode 100644
index 000000000000..b6ec7c627b39
--- /dev/null
+++ b/arch/arm/include/asm/clkdev.h
@@ -0,0 +1,30 @@
1/*
2 * arch/arm/include/asm/clkdev.h
3 *
4 * Copyright (C) 2008 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Helper for the clk API to assist looking up a struct clk.
11 */
12#ifndef __ASM_CLKDEV_H
13#define __ASM_CLKDEV_H
14
15struct clk;
16
17struct clk_lookup {
18 struct list_head node;
19 const char *dev_id;
20 const char *con_id;
21 struct clk *clk;
22};
23
24struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
25 const char *dev_fmt, ...);
26
27void clkdev_add(struct clk_lookup *cl);
28void clkdev_drop(struct clk_lookup *cl);
29
30#endif
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 4ed149cbb32a..22cb14ec3438 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -69,7 +69,9 @@ extern void dma_cache_maint(const void *kaddr, size_t size, int rw);
69 */ 69 */
70static inline int dma_supported(struct device *dev, u64 mask) 70static inline int dma_supported(struct device *dev, u64 mask)
71{ 71{
72 return dev->dma_mask && *dev->dma_mask != 0; 72 if (mask < ISA_DMA_THRESHOLD)
73 return 0;
74 return 1;
73} 75}
74 76
75static inline int dma_set_mask(struct device *dev, u64 dma_mask) 77static inline int dma_set_mask(struct device *dev, u64 dma_mask)
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h
index 75154b193117..df5638f3643a 100644
--- a/arch/arm/include/asm/dma.h
+++ b/arch/arm/include/asm/dma.h
@@ -1,12 +1,7 @@
1#ifndef __ASM_ARM_DMA_H 1#ifndef __ASM_ARM_DMA_H
2#define __ASM_ARM_DMA_H 2#define __ASM_ARM_DMA_H
3 3
4typedef unsigned int dmach_t; 4#include <asm/memory.h>
5
6#include <linux/spinlock.h>
7#include <asm/system.h>
8#include <asm/scatterlist.h>
9#include <mach/dma.h>
10 5
11/* 6/*
12 * This is the maximum virtual address which can be DMA'd from. 7 * This is the maximum virtual address which can be DMA'd from.
@@ -15,6 +10,19 @@ typedef unsigned int dmach_t;
15#define MAX_DMA_ADDRESS 0xffffffff 10#define MAX_DMA_ADDRESS 0xffffffff
16#endif 11#endif
17 12
13#ifdef CONFIG_ISA_DMA_API
14/*
15 * This is used to support drivers written for the x86 ISA DMA API.
16 * It should not be re-used except for that purpose.
17 */
18#include <linux/spinlock.h>
19#include <asm/system.h>
20#include <asm/scatterlist.h>
21
22typedef unsigned int dmach_t;
23
24#include <mach/isa-dma.h>
25
18/* 26/*
19 * DMA modes 27 * DMA modes
20 */ 28 */
@@ -140,4 +148,6 @@ extern int isa_dma_bridge_buggy;
140#define isa_dma_bridge_buggy (0) 148#define isa_dma_bridge_buggy (0)
141#endif 149#endif
142 150
143#endif /* _ARM_DMA_H */ 151#endif /* CONFIG_ISA_DMA_API */
152
153#endif /* __ASM_ARM_DMA_H */
diff --git a/arch/arm/include/asm/hardware/iomd.h b/arch/arm/include/asm/hardware/iomd.h
index 9c5afbd71a69..f9ee69e4f53e 100644
--- a/arch/arm/include/asm/hardware/iomd.h
+++ b/arch/arm/include/asm/hardware/iomd.h
@@ -32,19 +32,11 @@
32#define IOMD_KARTRX (0x004) 32#define IOMD_KARTRX (0x004)
33#define IOMD_KCTRL (0x008) 33#define IOMD_KCTRL (0x008)
34 34
35#ifdef CONFIG_ARCH_CLPS7500
36#define IOMD_IOLINES (0x00C)
37#endif
38
39#define IOMD_IRQSTATA (0x010) 35#define IOMD_IRQSTATA (0x010)
40#define IOMD_IRQREQA (0x014) 36#define IOMD_IRQREQA (0x014)
41#define IOMD_IRQCLRA (0x014) 37#define IOMD_IRQCLRA (0x014)
42#define IOMD_IRQMASKA (0x018) 38#define IOMD_IRQMASKA (0x018)
43 39
44#ifdef CONFIG_ARCH_CLPS7500
45#define IOMD_SUSMODE (0x01C)
46#endif
47
48#define IOMD_IRQSTATB (0x020) 40#define IOMD_IRQSTATB (0x020)
49#define IOMD_IRQREQB (0x024) 41#define IOMD_IRQREQB (0x024)
50#define IOMD_IRQMASKB (0x028) 42#define IOMD_IRQMASKB (0x028)
@@ -53,10 +45,6 @@
53#define IOMD_FIQREQ (0x034) 45#define IOMD_FIQREQ (0x034)
54#define IOMD_FIQMASK (0x038) 46#define IOMD_FIQMASK (0x038)
55 47
56#ifdef CONFIG_ARCH_CLPS7500
57#define IOMD_CLKCTL (0x03C)
58#endif
59
60#define IOMD_T0CNTL (0x040) 48#define IOMD_T0CNTL (0x040)
61#define IOMD_T0LTCHL (0x040) 49#define IOMD_T0LTCHL (0x040)
62#define IOMD_T0CNTH (0x044) 50#define IOMD_T0CNTH (0x044)
@@ -71,18 +59,6 @@
71#define IOMD_T1GO (0x058) 59#define IOMD_T1GO (0x058)
72#define IOMD_T1LATCH (0x05c) 60#define IOMD_T1LATCH (0x05c)
73 61
74#ifdef CONFIG_ARCH_CLPS7500
75#define IOMD_IRQSTATC (0x060)
76#define IOMD_IRQREQC (0x064)
77#define IOMD_IRQMASKC (0x068)
78
79#define IOMD_VIDMUX (0x06c)
80
81#define IOMD_IRQSTATD (0x070)
82#define IOMD_IRQREQD (0x074)
83#define IOMD_IRQMASKD (0x078)
84#endif
85
86#define IOMD_ROMCR0 (0x080) 62#define IOMD_ROMCR0 (0x080)
87#define IOMD_ROMCR1 (0x084) 63#define IOMD_ROMCR1 (0x084)
88#ifdef CONFIG_ARCH_RPC 64#ifdef CONFIG_ARCH_RPC
@@ -100,11 +76,6 @@
100#define IOMD_MOUSEY (0x0A4) 76#define IOMD_MOUSEY (0x0A4)
101#endif 77#endif
102 78
103#ifdef CONFIG_ARCH_CLPS7500
104#define IOMD_MSEDAT (0x0A8)
105#define IOMD_MSECTL (0x0Ac)
106#endif
107
108#ifdef CONFIG_ARCH_RPC 79#ifdef CONFIG_ARCH_RPC
109#define IOMD_DMATCR (0x0C0) 80#define IOMD_DMATCR (0x0C0)
110#endif 81#endif
@@ -113,18 +84,6 @@
113#ifdef CONFIG_ARCH_RPC 84#ifdef CONFIG_ARCH_RPC
114#define IOMD_DMAEXT (0x0CC) 85#define IOMD_DMAEXT (0x0CC)
115#endif 86#endif
116#ifdef CONFIG_ARCH_CLPS7500
117#define IOMD_ASTCR (0x0CC)
118#define IOMD_DRAMCR (0x0D0)
119#define IOMD_SELFREF (0x0D4)
120#define IOMD_ATODICR (0x0E0)
121#define IOMD_ATODSR (0x0E4)
122#define IOMD_ATODCC (0x0E8)
123#define IOMD_ATODCNT1 (0x0EC)
124#define IOMD_ATODCNT2 (0x0F0)
125#define IOMD_ATODCNT3 (0x0F4)
126#define IOMD_ATODCNT4 (0x0F8)
127#endif
128 87
129#ifdef CONFIG_ARCH_RPC 88#ifdef CONFIG_ARCH_RPC
130#define DMA_EXT_IO0 1 89#define DMA_EXT_IO0 1
diff --git a/arch/arm/include/asm/hwcap.h b/arch/arm/include/asm/hwcap.h
index 81f4c899a555..bda489f9f017 100644
--- a/arch/arm/include/asm/hwcap.h
+++ b/arch/arm/include/asm/hwcap.h
@@ -16,6 +16,7 @@
16#define HWCAP_IWMMXT 512 16#define HWCAP_IWMMXT 512
17#define HWCAP_CRUNCH 1024 17#define HWCAP_CRUNCH 1024
18#define HWCAP_THUMBEE 2048 18#define HWCAP_THUMBEE 2048
19#define HWCAP_NEON 4096
19 20
20#if defined(__KERNEL__) && !defined(__ASSEMBLY__) 21#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
21/* 22/*
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index a8094451be57..d2a59cfc30ce 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -80,6 +80,14 @@ extern void __iounmap(volatile void __iomem *addr);
80extern void __readwrite_bug(const char *fn); 80extern void __readwrite_bug(const char *fn);
81 81
82/* 82/*
83 * A typesafe __io() helper
84 */
85static inline void __iomem *__typesafe_io(unsigned long addr)
86{
87 return (void __iomem *)addr;
88}
89
90/*
83 * Now, pick up the machine-defined IO definitions 91 * Now, pick up the machine-defined IO definitions
84 */ 92 */
85#include <mach/io.h> 93#include <mach/io.h>
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index a0009aa5d157..328f14a8b790 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -7,10 +7,6 @@
7#define irq_canonicalize(i) (i) 7#define irq_canonicalize(i) (i)
8#endif 8#endif
9 9
10#ifndef NR_IRQS
11#define NR_IRQS 128
12#endif
13
14/* 10/*
15 * Use this value to indicate lack of interrupt 11 * Use this value to indicate lack of interrupt
16 * capability 12 * capability
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 77764301844b..0202a7c20e62 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -112,10 +112,8 @@
112 * private definitions which should NOT be used outside memory.h 112 * private definitions which should NOT be used outside memory.h
113 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. 113 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
114 */ 114 */
115#ifndef __virt_to_phys
116#define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) 115#define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
117#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) 116#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
118#endif
119 117
120/* 118/*
121 * Convert a physical address to a Page Frame Number and back 119 * Convert a physical address to a Page Frame Number and back
@@ -180,6 +178,11 @@ static inline void *phys_to_virt(unsigned long x)
180 * memory. Use of these is *deprecated* (and that doesn't mean 178 * memory. Use of these is *deprecated* (and that doesn't mean
181 * use the __ prefixed forms instead.) See dma-mapping.h. 179 * use the __ prefixed forms instead.) See dma-mapping.h.
182 */ 180 */
181#ifndef __virt_to_bus
182#define __virt_to_bus __virt_to_phys
183#define __bus_to_virt __phys_to_virt
184#endif
185
183static inline __deprecated unsigned long virt_to_bus(void *x) 186static inline __deprecated unsigned long virt_to_bus(void *x)
184{ 187{
185 return __virt_to_bus((unsigned long)x); 188 return __virt_to_bus((unsigned long)x);
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index 0559f37c2a27..263fed05ea33 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -14,6 +14,7 @@
14#define __ASM_ARM_MMU_CONTEXT_H 14#define __ASM_ARM_MMU_CONTEXT_H
15 15
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <linux/sched.h>
17#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
18#include <asm/cachetype.h> 19#include <asm/cachetype.h>
19#include <asm/proc-fns.h> 20#include <asm/proc-fns.h>
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index bed1c0a00368..f341c9dbd662 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -108,32 +108,38 @@
108#error Unknown user operations model 108#error Unknown user operations model
109#endif 109#endif
110 110
111struct page;
112
111struct cpu_user_fns { 113struct cpu_user_fns {
112 void (*cpu_clear_user_page)(void *p, unsigned long user); 114 void (*cpu_clear_user_highpage)(struct page *page, unsigned long vaddr);
113 void (*cpu_copy_user_page)(void *to, const void *from, 115 void (*cpu_copy_user_highpage)(struct page *to, struct page *from,
114 unsigned long user); 116 unsigned long vaddr);
115}; 117};
116 118
117#ifdef MULTI_USER 119#ifdef MULTI_USER
118extern struct cpu_user_fns cpu_user; 120extern struct cpu_user_fns cpu_user;
119 121
120#define __cpu_clear_user_page cpu_user.cpu_clear_user_page 122#define __cpu_clear_user_highpage cpu_user.cpu_clear_user_highpage
121#define __cpu_copy_user_page cpu_user.cpu_copy_user_page 123#define __cpu_copy_user_highpage cpu_user.cpu_copy_user_highpage
122 124
123#else 125#else
124 126
125#define __cpu_clear_user_page __glue(_USER,_clear_user_page) 127#define __cpu_clear_user_highpage __glue(_USER,_clear_user_highpage)
126#define __cpu_copy_user_page __glue(_USER,_copy_user_page) 128#define __cpu_copy_user_highpage __glue(_USER,_copy_user_highpage)
127 129
128extern void __cpu_clear_user_page(void *p, unsigned long user); 130extern void __cpu_clear_user_highpage(struct page *page, unsigned long vaddr);
129extern void __cpu_copy_user_page(void *to, const void *from, 131extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
130 unsigned long user); 132 unsigned long vaddr);
131#endif 133#endif
132 134
133#define clear_user_page(addr,vaddr,pg) __cpu_clear_user_page(addr, vaddr) 135#define clear_user_highpage(page,vaddr) \
134#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr) 136 __cpu_clear_user_highpage(page, vaddr)
137
138#define __HAVE_ARCH_COPY_USER_HIGHPAGE
139#define copy_user_highpage(to,from,vaddr,vma) \
140 __cpu_copy_user_highpage(to, from, vaddr)
135 141
136#define clear_page(page) memzero((void *)(page), PAGE_SIZE) 142#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
137extern void copy_page(void *to, const void *from); 143extern void copy_page(void *to, const void *from);
138 144
139#undef STRICT_MM_TYPECHECKS 145#undef STRICT_MM_TYPECHECKS
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 517a4d6ffc74..2320508443a5 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -64,7 +64,7 @@ struct thread_struct {
64({ \ 64({ \
65 unsigned long *stack = (unsigned long *)sp; \ 65 unsigned long *stack = (unsigned long *)sp; \
66 set_fs(USER_DS); \ 66 set_fs(USER_DS); \
67 memzero(regs->uregs, sizeof(regs->uregs)); \ 67 memset(regs->uregs, 0, sizeof(regs->uregs)); \
68 if (current->personality & ADDR_LIMIT_32BIT) \ 68 if (current->personality & ADDR_LIMIT_32BIT) \
69 regs->ARM_cpsr = USR_MODE; \ 69 regs->ARM_cpsr = USR_MODE; \
70 else \ 70 else \
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index a65413ba121d..f2cd18a0932b 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -209,9 +209,11 @@ struct meminfo {
209 struct membank bank[NR_BANKS]; 209 struct membank bank[NR_BANKS];
210}; 210};
211 211
212extern struct meminfo meminfo;
213
212#define for_each_nodebank(iter,mi,no) \ 214#define for_each_nodebank(iter,mi,no) \
213 for (iter = 0; iter < mi->nr_banks; iter++) \ 215 for (iter = 0; iter < (mi)->nr_banks; iter++) \
214 if (mi->bank[iter].node == no) 216 if ((mi)->bank[iter].node == no)
215 217
216#define bank_pfn_start(bank) __phys_to_pfn((bank)->start) 218#define bank_pfn_start(bank) __phys_to_pfn((bank)->start)
217#define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size) 219#define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size)
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 727b5c042e52..fad70da5911d 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -114,7 +114,7 @@ extern void local_timer_interrupt(void);
114/* 114/*
115 * Stop a local timer interrupt. 115 * Stop a local timer interrupt.
116 */ 116 */
117extern void local_timer_stop(unsigned int cpu); 117extern void local_timer_stop(void);
118 118
119/* 119/*
120 * Platform provides this to acknowledge a local timer IRQ 120 * Platform provides this to acknowledge a local timer IRQ
@@ -123,7 +123,7 @@ extern int local_timer_ack(void);
123 123
124#else 124#else
125 125
126static inline void local_timer_stop(unsigned int cpu) 126static inline void local_timer_stop(void)
127{ 127{
128} 128}
129 129
@@ -132,7 +132,7 @@ static inline void local_timer_stop(unsigned int cpu)
132/* 132/*
133 * Setup a local timer interrupt for a CPU. 133 * Setup a local timer interrupt for a CPU.
134 */ 134 */
135extern void local_timer_setup(unsigned int cpu); 135extern void local_timer_setup(void);
136 136
137/* 137/*
138 * show local interrupt info 138 * show local interrupt info
diff --git a/arch/arm/include/asm/string.h b/arch/arm/include/asm/string.h
index e50c4a39b699..cf4f3aad0fc1 100644
--- a/arch/arm/include/asm/string.h
+++ b/arch/arm/include/asm/string.h
@@ -21,7 +21,6 @@ extern void * memmove(void *, const void *, __kernel_size_t);
21#define __HAVE_ARCH_MEMCHR 21#define __HAVE_ARCH_MEMCHR
22extern void * memchr(const void *, int, __kernel_size_t); 22extern void * memchr(const void *, int, __kernel_size_t);
23 23
24#define __HAVE_ARCH_MEMZERO
25#define __HAVE_ARCH_MEMSET 24#define __HAVE_ARCH_MEMSET
26extern void * memset(void *, int, __kernel_size_t); 25extern void * memset(void *, int, __kernel_size_t);
27 26
@@ -39,12 +38,4 @@ extern void __memzero(void *ptr, __kernel_size_t n);
39 (__p); \ 38 (__p); \
40 }) 39 })
41 40
42#define memzero(p,n) \
43 ({ \
44 void *__p = (p); size_t __n = n; \
45 if ((__n) != 0) \
46 __memzero((__p),(__n)); \
47 (__p); \
48 })
49
50#endif 41#endif
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 568020b34e3e..811be55f338e 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -3,8 +3,6 @@
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6#include <asm/memory.h>
7
8#define CPU_ARCH_UNKNOWN 0 6#define CPU_ARCH_UNKNOWN 0
9#define CPU_ARCH_ARMv3 1 7#define CPU_ARCH_ARMv3 1
10#define CPU_ARCH_ARMv4 2 8#define CPU_ARCH_ARMv4 2
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index e98ec60b3400..7897464e0c24 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -11,7 +11,8 @@
11/* 11/*
12 * User space memory access functions 12 * User space memory access functions
13 */ 13 */
14#include <linux/sched.h> 14#include <linux/string.h>
15#include <linux/thread_info.h>
15#include <asm/errno.h> 16#include <asm/errno.h>
16#include <asm/memory.h> 17#include <asm/memory.h>
17#include <asm/domain.h> 18#include <asm/domain.h>
@@ -400,7 +401,7 @@ static inline unsigned long __must_check copy_from_user(void *to, const void __u
400 if (access_ok(VERIFY_READ, from, n)) 401 if (access_ok(VERIFY_READ, from, n))
401 n = __copy_from_user(to, from, n); 402 n = __copy_from_user(to, from, n);
402 else /* security hole - plug it */ 403 else /* security hole - plug it */
403 memzero(to, n); 404 memset(to, 0, n);
404 return n; 405 return n;
405} 406}
406 407
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index c74f766ffc12..53d0037a1e9d 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -8,6 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <linux/module.h> 10#include <linux/module.h>
11#include <linux/sched.h>
11#include <linux/string.h> 12#include <linux/string.h>
12#include <linux/cryptohash.h> 13#include <linux/cryptohash.h>
13#include <linux/delay.h> 14#include <linux/delay.h>
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index bde52df1c668..991952c644d1 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -18,7 +18,7 @@
18__switch_data: 18__switch_data:
19 .long __mmap_switched 19 .long __mmap_switched
20 .long __data_loc @ r4 20 .long __data_loc @ r4
21 .long __data_start @ r5 21 .long _data @ r5
22 .long __bss_start @ r6 22 .long __bss_start @ r6
23 .long _end @ r7 23 .long _end @ r7
24 .long processor_id @ r4 24 .long processor_id @ r4
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index b8d965dcd6fd..dab48f27263f 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -21,6 +21,7 @@
21#include <linux/string.h> 21#include <linux/string.h>
22 22
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
24#include <asm/sections.h>
24 25
25#ifdef CONFIG_XIP_KERNEL 26#ifdef CONFIG_XIP_KERNEL
26/* 27/*
@@ -29,9 +30,8 @@
29 * MODULES_VADDR is redefined here and not in asm/memory.h to avoid 30 * MODULES_VADDR is redefined here and not in asm/memory.h to avoid
30 * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. 31 * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
31 */ 32 */
32extern void _etext;
33#undef MODULES_VADDR 33#undef MODULES_VADDR
34#define MODULES_VADDR (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK) 34#define MODULES_VADDR (((unsigned long)_etext + ~PGDIR_MASK) & PGDIR_MASK)
35#endif 35#endif
36 36
37#ifdef CONFIG_MMU 37#ifdef CONFIG_MMU
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 1f1eecca7f55..7049815d66d5 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -29,6 +29,7 @@
29#include <asm/cputype.h> 29#include <asm/cputype.h>
30#include <asm/elf.h> 30#include <asm/elf.h>
31#include <asm/procinfo.h> 31#include <asm/procinfo.h>
32#include <asm/sections.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34#include <asm/cacheflush.h> 35#include <asm/cacheflush.h>
@@ -59,9 +60,8 @@ static int __init fpe_setup(char *line)
59__setup("fpe=", fpe_setup); 60__setup("fpe=", fpe_setup);
60#endif 61#endif
61 62
62extern void paging_init(struct meminfo *, struct machine_desc *desc); 63extern void paging_init(struct machine_desc *desc);
63extern void reboot_setup(char *str); 64extern void reboot_setup(char *str);
64extern void _text, _etext, __data_start, _edata, _end;
65 65
66unsigned int processor_id; 66unsigned int processor_id;
67EXPORT_SYMBOL(processor_id); 67EXPORT_SYMBOL(processor_id);
@@ -112,7 +112,6 @@ static struct stack stacks[NR_CPUS];
112char elf_platform[ELF_PLATFORM_SIZE]; 112char elf_platform[ELF_PLATFORM_SIZE];
113EXPORT_SYMBOL(elf_platform); 113EXPORT_SYMBOL(elf_platform);
114 114
115static struct meminfo meminfo __initdata = { 0, };
116static const char *cpu_name; 115static const char *cpu_name;
117static const char *machine_name; 116static const char *machine_name;
118static char __initdata command_line[COMMAND_LINE_SIZE]; 117static char __initdata command_line[COMMAND_LINE_SIZE];
@@ -367,21 +366,34 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
367 return list; 366 return list;
368} 367}
369 368
370static void __init arm_add_memory(unsigned long start, unsigned long size) 369static int __init arm_add_memory(unsigned long start, unsigned long size)
371{ 370{
372 struct membank *bank; 371 struct membank *bank = &meminfo.bank[meminfo.nr_banks];
372
373 if (meminfo.nr_banks >= NR_BANKS) {
374 printk(KERN_CRIT "NR_BANKS too low, "
375 "ignoring memory at %#lx\n", start);
376 return -EINVAL;
377 }
373 378
374 /* 379 /*
375 * Ensure that start/size are aligned to a page boundary. 380 * Ensure that start/size are aligned to a page boundary.
376 * Size is appropriately rounded down, start is rounded up. 381 * Size is appropriately rounded down, start is rounded up.
377 */ 382 */
378 size -= start & ~PAGE_MASK; 383 size -= start & ~PAGE_MASK;
379
380 bank = &meminfo.bank[meminfo.nr_banks++];
381
382 bank->start = PAGE_ALIGN(start); 384 bank->start = PAGE_ALIGN(start);
383 bank->size = size & PAGE_MASK; 385 bank->size = size & PAGE_MASK;
384 bank->node = PHYS_TO_NID(start); 386 bank->node = PHYS_TO_NID(start);
387
388 /*
389 * Check whether this memory region has non-zero size or
390 * invalid node number.
391 */
392 if (bank->size == 0 || bank->node >= MAX_NUMNODES)
393 return -EINVAL;
394
395 meminfo.nr_banks++;
396 return 0;
385} 397}
386 398
387/* 399/*
@@ -472,10 +484,10 @@ request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc)
472 struct resource *res; 484 struct resource *res;
473 int i; 485 int i;
474 486
475 kernel_code.start = virt_to_phys(&_text); 487 kernel_code.start = virt_to_phys(_text);
476 kernel_code.end = virt_to_phys(&_etext - 1); 488 kernel_code.end = virt_to_phys(_etext - 1);
477 kernel_data.start = virt_to_phys(&__data_start); 489 kernel_data.start = virt_to_phys(_data);
478 kernel_data.end = virt_to_phys(&_end - 1); 490 kernel_data.end = virt_to_phys(_end - 1);
479 491
480 for (i = 0; i < mi->nr_banks; i++) { 492 for (i = 0; i < mi->nr_banks; i++) {
481 if (mi->bank[i].size == 0) 493 if (mi->bank[i].size == 0)
@@ -539,14 +551,7 @@ __tagtable(ATAG_CORE, parse_tag_core);
539 551
540static int __init parse_tag_mem32(const struct tag *tag) 552static int __init parse_tag_mem32(const struct tag *tag)
541{ 553{
542 if (meminfo.nr_banks >= NR_BANKS) { 554 return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
543 printk(KERN_WARNING
544 "Ignoring memory bank 0x%08x size %dKB\n",
545 tag->u.mem.start, tag->u.mem.size / 1024);
546 return -EINVAL;
547 }
548 arm_add_memory(tag->u.mem.start, tag->u.mem.size);
549 return 0;
550} 555}
551 556
552__tagtable(ATAG_MEM, parse_tag_mem32); 557__tagtable(ATAG_MEM, parse_tag_mem32);
@@ -710,15 +715,15 @@ void __init setup_arch(char **cmdline_p)
710 parse_tags(tags); 715 parse_tags(tags);
711 } 716 }
712 717
713 init_mm.start_code = (unsigned long) &_text; 718 init_mm.start_code = (unsigned long) _text;
714 init_mm.end_code = (unsigned long) &_etext; 719 init_mm.end_code = (unsigned long) _etext;
715 init_mm.end_data = (unsigned long) &_edata; 720 init_mm.end_data = (unsigned long) _edata;
716 init_mm.brk = (unsigned long) &_end; 721 init_mm.brk = (unsigned long) _end;
717 722
718 memcpy(boot_command_line, from, COMMAND_LINE_SIZE); 723 memcpy(boot_command_line, from, COMMAND_LINE_SIZE);
719 boot_command_line[COMMAND_LINE_SIZE-1] = '\0'; 724 boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
720 parse_cmdline(cmdline_p, from); 725 parse_cmdline(cmdline_p, from);
721 paging_init(&meminfo, mdesc); 726 paging_init(mdesc);
722 request_standard_resources(&meminfo, mdesc); 727 request_standard_resources(&meminfo, mdesc);
723 728
724#ifdef CONFIG_SMP 729#ifdef CONFIG_SMP
@@ -772,6 +777,8 @@ static const char *hwcap_str[] = {
772 "java", 777 "java",
773 "iwmmxt", 778 "iwmmxt",
774 "crunch", 779 "crunch",
780 "thumbee",
781 "neon",
775 NULL 782 NULL
776}; 783};
777 784
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index e42a749a56dd..019237d21622 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -181,7 +181,7 @@ int __cpuexit __cpu_disable(void)
181 /* 181 /*
182 * Stop the local timer for this CPU. 182 * Stop the local timer for this CPU.
183 */ 183 */
184 local_timer_stop(cpu); 184 local_timer_stop();
185 185
186 /* 186 /*
187 * Flush user cache and TLB mappings, and then remove this CPU 187 * Flush user cache and TLB mappings, and then remove this CPU
@@ -284,7 +284,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
284 /* 284 /*
285 * Setup local timer for this CPU. 285 * Setup local timer for this CPU.
286 */ 286 */
287 local_timer_setup(cpu); 287 local_timer_setup();
288 288
289 calibrate_delay(); 289 calibrate_delay();
290 290
diff --git a/arch/arm/kernel/thumbee.c b/arch/arm/kernel/thumbee.c
index df3f6b7ebcea..9cb7aaca159f 100644
--- a/arch/arm/kernel/thumbee.c
+++ b/arch/arm/kernel/thumbee.c
@@ -25,7 +25,7 @@
25/* 25/*
26 * Access to the ThumbEE Handler Base register 26 * Access to the ThumbEE Handler Base register
27 */ 27 */
28static inline unsigned long teehbr_read() 28static inline unsigned long teehbr_read(void)
29{ 29{
30 unsigned long v; 30 unsigned long v;
31 asm("mrc p14, 6, %0, c1, c0, 0\n" : "=r" (v)); 31 asm("mrc p14, 6, %0, c1, c0, 0\n" : "=r" (v));
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 4898bdcfe7dd..00216071eaf7 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -119,7 +119,7 @@ SECTIONS
119#endif 119#endif
120 120
121 .data : AT(__data_loc) { 121 .data : AT(__data_loc) {
122 __data_start = .; /* address in memory */ 122 _data = .; /* address in memory */
123 123
124 /* 124 /*
125 * first, the init task union, aligned 125 * first, the init task union, aligned
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 30351cd4560d..866f84a586ff 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -38,7 +38,6 @@ else
38endif 38endif
39 39
40lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o 40lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o
41lib-$(CONFIG_ARCH_CLPS7500) += io-acorn.o
42lib-$(CONFIG_ARCH_L7200) += io-acorn.o 41lib-$(CONFIG_ARCH_L7200) += io-acorn.o
43lib-$(CONFIG_ARCH_SHARK) += io-shark.o 42lib-$(CONFIG_ARCH_SHARK) += io-shark.o
44 43
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index 761eefa76243..650d5923ab83 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -25,7 +25,7 @@
25 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) 25 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
26/* 26/*
27 * The pointer is now aligned and the length is adjusted. Try doing the 27 * The pointer is now aligned and the length is adjusted. Try doing the
28 * memzero again. 28 * memset again.
29 */ 29 */
30 30
31ENTRY(memset) 31ENTRY(memset)
diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile
index a8e462f58bc9..20ec83896c37 100644
--- a/arch/arm/mach-aaec2000/Makefile
+++ b/arch/arm/mach-aaec2000/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common support (must be linked before board specific support) 5# Common support (must be linked before board specific support)
6obj-y += core.o clock.o 6obj-y += core.o
7 7
8# Specific board support 8# Specific board support
9obj-$(CONFIG_MACH_AAED2000) += aaed2000.o 9obj-$(CONFIG_MACH_AAED2000) += aaed2000.o
diff --git a/arch/arm/mach-aaec2000/clock.c b/arch/arm/mach-aaec2000/clock.c
deleted file mode 100644
index e10ee158d720..000000000000
--- a/arch/arm/mach-aaec2000/clock.c
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * linux/arch/arm/mach-aaec2000/clock.c
3 *
4 * Copyright (C) 2005 Nicolas Bellido Y Ortega
5 *
6 * Based on linux/arch/arm/mach-integrator/clock.c
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/list.h>
15#include <linux/errno.h>
16#include <linux/err.h>
17#include <linux/string.h>
18#include <linux/clk.h>
19#include <linux/mutex.h>
20
21#include "clock.h"
22
23static LIST_HEAD(clocks);
24static DEFINE_MUTEX(clocks_mutex);
25
26struct clk *clk_get(struct device *dev, const char *id)
27{
28 struct clk *p, *clk = ERR_PTR(-ENOENT);
29
30 mutex_lock(&clocks_mutex);
31 list_for_each_entry(p, &clocks, node) {
32 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
33 clk = p;
34 break;
35 }
36 }
37 mutex_unlock(&clocks_mutex);
38
39 return clk;
40}
41EXPORT_SYMBOL(clk_get);
42
43void clk_put(struct clk *clk)
44{
45 module_put(clk->owner);
46}
47EXPORT_SYMBOL(clk_put);
48
49int clk_enable(struct clk *clk)
50{
51 return 0;
52}
53EXPORT_SYMBOL(clk_enable);
54
55void clk_disable(struct clk *clk)
56{
57}
58EXPORT_SYMBOL(clk_disable);
59
60unsigned long clk_get_rate(struct clk *clk)
61{
62 return clk->rate;
63}
64EXPORT_SYMBOL(clk_get_rate);
65
66long clk_round_rate(struct clk *clk, unsigned long rate)
67{
68 return rate;
69}
70EXPORT_SYMBOL(clk_round_rate);
71
72int clk_set_rate(struct clk *clk, unsigned long rate)
73{
74 return 0;
75}
76EXPORT_SYMBOL(clk_set_rate);
77
78int clk_register(struct clk *clk)
79{
80 mutex_lock(&clocks_mutex);
81 list_add(&clk->node, &clocks);
82 mutex_unlock(&clocks_mutex);
83 return 0;
84}
85EXPORT_SYMBOL(clk_register);
86
87void clk_unregister(struct clk *clk)
88{
89 mutex_lock(&clocks_mutex);
90 list_del(&clk->node);
91 mutex_unlock(&clocks_mutex);
92}
93EXPORT_SYMBOL(clk_unregister);
94
95static int __init clk_init(void)
96{
97 return 0;
98}
99arch_initcall(clk_init);
diff --git a/arch/arm/mach-aaec2000/clock.h b/arch/arm/mach-aaec2000/clock.h
deleted file mode 100644
index d4bb74ff613f..000000000000
--- a/arch/arm/mach-aaec2000/clock.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * linux/arch/arm/mach-aaec2000/clock.h
3 *
4 * Copyright (C) 2005 Nicolas Bellido Y Ortega
5 *
6 * Based on linux/arch/arm/mach-integrator/clock.h
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12struct module;
13
14struct clk {
15 struct list_head node;
16 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 void *data;
20};
21
22int clk_register(struct clk *clk);
23void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
index dfb26bc23d1a..50e13965dfed 100644
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -19,6 +19,7 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/timex.h> 20#include <linux/timex.h>
21#include <linux/signal.h> 21#include <linux/signal.h>
22#include <linux/clk.h>
22 23
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <asm/irq.h> 25#include <asm/irq.h>
@@ -30,7 +31,6 @@
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
31 32
32#include "core.h" 33#include "core.h"
33#include "clock.h"
34 34
35/* 35/*
36 * Common I/O mapping: 36 * Common I/O mapping:
@@ -229,9 +229,28 @@ static struct amba_device *amba_devs[] __initdata = {
229 &clcd_device, 229 &clcd_device,
230}; 230};
231 231
232static struct clk aaec2000_clcd_clk = { 232void clk_disable(struct clk *clk)
233 .name = "CLCDCLK", 233{
234}; 234}
235
236int clk_set_rate(struct clk *clk, unsigned long rate)
237{
238 return 0;
239}
240
241int clk_enable(struct clk *clk)
242{
243 return 0;
244}
245
246struct clk *clk_get(struct device *dev, const char *id)
247{
248 return dev && strcmp(dev_name(dev), "mb:16") == 0 ? NULL : ERR_PTR(-ENOENT);
249}
250
251void clk_put(struct clk *clk)
252{
253}
235 254
236void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd) 255void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd)
237{ 256{
@@ -265,8 +284,6 @@ static int __init aaec2000_init(void)
265{ 284{
266 int i; 285 int i;
267 286
268 clk_register(&aaec2000_clcd_clk);
269
270 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 287 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
271 struct amba_device *d = amba_devs[i]; 288 struct amba_device *d = amba_devs[i];
272 amba_device_register(d, &iomem_resource); 289 amba_device_register(d, &iomem_resource);
diff --git a/arch/arm/mach-aaec2000/include/mach/dma.h b/arch/arm/mach-aaec2000/include/mach/dma.h
deleted file mode 100644
index 2da846c72fe7..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/dma.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
diff --git a/arch/arm/mach-aaec2000/include/mach/io.h b/arch/arm/mach-aaec2000/include/mach/io.h
index c87c24de1110..ab4fe5d20eaf 100644
--- a/arch/arm/mach-aaec2000/include/mach/io.h
+++ b/arch/arm/mach-aaec2000/include/mach/io.h
@@ -6,15 +6,13 @@
6#ifndef __ASM_ARM_ARCH_IO_H 6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H 7#define __ASM_ARM_ARCH_IO_H
8 8
9#include <mach/hardware.h>
10
11#define IO_SPACE_LIMIT 0xffffffff 9#define IO_SPACE_LIMIT 0xffffffff
12 10
13/* 11/*
14 * We don't actually have real ISA nor PCI buses, but there is so many 12 * We don't actually have real ISA nor PCI buses, but there is so many
15 * drivers out there that might just work if we fake them... 13 * drivers out there that might just work if we fake them...
16 */ 14 */
17#define __io(a) ((void __iomem *)(a)) 15#define __io(a) __typesafe_io(a)
18#define __mem_pci(a) (a) 16#define __mem_pci(a) (a)
19 17
20#endif 18#endif
diff --git a/arch/arm/mach-aaec2000/include/mach/memory.h b/arch/arm/mach-aaec2000/include/mach/memory.h
index 56ae900a482e..c00822543d9f 100644
--- a/arch/arm/mach-aaec2000/include/mach/memory.h
+++ b/arch/arm/mach-aaec2000/include/mach/memory.h
@@ -14,9 +14,6 @@
14 14
15#define PHYS_OFFSET UL(0xf0000000) 15#define PHYS_OFFSET UL(0xf0000000)
16 16
17#define __virt_to_bus(x) __virt_to_phys(x)
18#define __bus_to_virt(x) __phys_to_virt(x)
19
20/* 17/*
21 * The nodes are the followings: 18 * The nodes are the followings:
22 * 19 *
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 5aafb2e2ca7a..323b47f2b52f 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -7,36 +7,43 @@ choice
7 7
8config ARCH_AT91RM9200 8config ARCH_AT91RM9200
9 bool "AT91RM9200" 9 bool "AT91RM9200"
10 select CPU_ARM920T
10 select GENERIC_TIME 11 select GENERIC_TIME
11 select GENERIC_CLOCKEVENTS 12 select GENERIC_CLOCKEVENTS
12 13
13config ARCH_AT91SAM9260 14config ARCH_AT91SAM9260
14 bool "AT91SAM9260 or AT91SAM9XE" 15 bool "AT91SAM9260 or AT91SAM9XE"
16 select CPU_ARM926T
15 select GENERIC_TIME 17 select GENERIC_TIME
16 select GENERIC_CLOCKEVENTS 18 select GENERIC_CLOCKEVENTS
17 19
18config ARCH_AT91SAM9261 20config ARCH_AT91SAM9261
19 bool "AT91SAM9261" 21 bool "AT91SAM9261"
22 select CPU_ARM926T
20 select GENERIC_TIME 23 select GENERIC_TIME
21 select GENERIC_CLOCKEVENTS 24 select GENERIC_CLOCKEVENTS
22 25
23config ARCH_AT91SAM9263 26config ARCH_AT91SAM9263
24 bool "AT91SAM9263" 27 bool "AT91SAM9263"
28 select CPU_ARM926T
25 select GENERIC_TIME 29 select GENERIC_TIME
26 select GENERIC_CLOCKEVENTS 30 select GENERIC_CLOCKEVENTS
27 31
28config ARCH_AT91SAM9RL 32config ARCH_AT91SAM9RL
29 bool "AT91SAM9RL" 33 bool "AT91SAM9RL"
34 select CPU_ARM926T
30 select GENERIC_TIME 35 select GENERIC_TIME
31 select GENERIC_CLOCKEVENTS 36 select GENERIC_CLOCKEVENTS
32 37
33config ARCH_AT91SAM9G20 38config ARCH_AT91SAM9G20
34 bool "AT91SAM9G20" 39 bool "AT91SAM9G20"
40 select CPU_ARM926T
35 select GENERIC_TIME 41 select GENERIC_TIME
36 select GENERIC_CLOCKEVENTS 42 select GENERIC_CLOCKEVENTS
37 43
38config ARCH_AT91CAP9 44config ARCH_AT91CAP9
39 bool "AT91CAP9" 45 bool "AT91CAP9"
46 select CPU_ARM926T
40 select GENERIC_TIME 47 select GENERIC_TIME
41 select GENERIC_CLOCKEVENTS 48 select GENERIC_CLOCKEVENTS
42 49
@@ -235,6 +242,12 @@ config MACH_USB_A9263
235 Select this if you are using a Calao Systems USB-A9263. 242 Select this if you are using a Calao Systems USB-A9263.
236 <http://www.calao-systems.com> 243 <http://www.calao-systems.com>
237 244
245config MACH_NEOCORE926
246 bool "Adeneo NEOCORE926"
247 depends on ARCH_AT91SAM9263
248 help
249 Select this if you are using the Adeneo Neocore 926 board.
250
238endif 251endif
239 252
240# ---------------------------------------------------------- 253# ----------------------------------------------------------
@@ -302,7 +315,7 @@ comment "AT91 Board Options"
302 315
303config MTD_AT91_DATAFLASH_CARD 316config MTD_AT91_DATAFLASH_CARD
304 bool "Enable DataFlash Card support" 317 bool "Enable DataFlash Card support"
305 depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK) 318 depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK || MACH_NEOCORE926)
306 help 319 help
307 Enable support for the DataFlash card. 320 Enable support for the DataFlash card.
308 321
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index cca612d97ca2..c69ff237fd14 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -11,12 +11,12 @@ obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
11 11
12# CPU-specific support 12# CPU-specific support
13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o 13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o 14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o 15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
16obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o 16obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
17obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o 17obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
18obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o 18obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
19obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o 19obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
20obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o 20obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
21 21
22# AT91RM9200 board-specific support 22# AT91RM9200 board-specific support
@@ -47,6 +47,7 @@ obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
47# AT91SAM9263 board-specific support 47# AT91SAM9263 board-specific support
48obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o 48obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
49obj-$(CONFIG_MACH_USB_A9263) += board-usb-a9263.o 49obj-$(CONFIG_MACH_USB_A9263) += board-usb-a9263.o
50obj-$(CONFIG_MACH_NEOCORE926) += board-neocore926.o
50 51
51# AT91SAM9RL board-specific support 52# AT91SAM9RL board-specific support
52obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o 53obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 0fc0adaebd58..0a38c69fdbc4 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -17,6 +17,8 @@
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 19#include <asm/mach/map.h>
20
21#include <mach/cpu.h>
20#include <mach/at91cap9.h> 22#include <mach/at91cap9.h>
21#include <mach/at91_pmc.h> 23#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 24#include <mach/at91_rstc.h>
@@ -317,6 +319,12 @@ void __init at91cap9_initialize(unsigned long main_clock)
317 319
318 /* Register GPIO subsystem */ 320 /* Register GPIO subsystem */
319 at91_gpio_init(at91cap9_gpio, 4); 321 at91_gpio_init(at91cap9_gpio, 4);
322
323 /* Remember the silicon revision */
324 if (cpu_is_at91cap9_revB())
325 system_rev = 0xB;
326 else if (cpu_is_at91cap9_revC())
327 system_rev = 0xC;
320} 328}
321 329
322/* -------------------------------------------------------------------- 330/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 5ebd4273d353..9eca2209cde6 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -13,6 +13,7 @@
13 */ 13 */
14#include <asm/mach/arch.h> 14#include <asm/mach/arch.h>
15#include <asm/mach/map.h> 15#include <asm/mach/map.h>
16#include <asm/mach/irq.h>
16 17
17#include <linux/dma-mapping.h> 18#include <linux/dma-mapping.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
@@ -21,6 +22,7 @@
21#include <video/atmel_lcdc.h> 22#include <video/atmel_lcdc.h>
22 23
23#include <mach/board.h> 24#include <mach/board.h>
25#include <mach/cpu.h>
24#include <mach/gpio.h> 26#include <mach/gpio.h>
25#include <mach/at91cap9.h> 27#include <mach/at91cap9.h>
26#include <mach/at91cap9_matrix.h> 28#include <mach/at91cap9_matrix.h>
@@ -69,6 +71,9 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
69 if (!data) 71 if (!data)
70 return; 72 return;
71 73
74 if (cpu_is_at91cap9_revB())
75 set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
76
72 /* Enable VBus control for UHP ports */ 77 /* Enable VBus control for UHP ports */
73 for (i = 0; i < data->ports; i++) { 78 for (i = 0; i < data->ports; i++) {
74 if (data->vbus_pin[i]) 79 if (data->vbus_pin[i])
@@ -151,8 +156,13 @@ static struct platform_device at91_usba_udc_device = {
151 156
152void __init at91_add_device_usba(struct usba_platform_data *data) 157void __init at91_add_device_usba(struct usba_platform_data *data)
153{ 158{
154 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | 159 if (cpu_is_at91cap9_revB()) {
155 AT91_MATRIX_UDPHS_BYPASS_LOCK); 160 set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
161 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
162 AT91_MATRIX_UDPHS_BYPASS_LOCK);
163 }
164 else
165 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
156 166
157 /* 167 /*
158 * Invalid pins are 0 on AT91, but the usba driver is shared 168 * Invalid pins are 0 on AT91, but the usba driver is shared
@@ -406,28 +416,13 @@ static struct platform_device at91cap9_nand_device = {
406 416
407void __init at91_add_device_nand(struct atmel_nand_data *data) 417void __init at91_add_device_nand(struct atmel_nand_data *data)
408{ 418{
409 unsigned long csa, mode; 419 unsigned long csa;
410 420
411 if (!data) 421 if (!data)
412 return; 422 return;
413 423
414 csa = at91_sys_read(AT91_MATRIX_EBICSA); 424 csa = at91_sys_read(AT91_MATRIX_EBICSA);
415 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); 425 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
416
417 /* set the bus interface characteristics */
418 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1)
419 | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1));
420
421 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6)
422 | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6));
423
424 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8));
425
426 if (data->bus_width_16)
427 mode = AT91_SMC_DBW_16;
428 else
429 mode = AT91_SMC_DBW_8;
430 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
431 426
432 /* enable pin */ 427 /* enable pin */
433 if (data->enable_pin) 428 if (data->enable_pin)
@@ -865,6 +860,9 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
865 if (!data) 860 if (!data)
866 return; 861 return;
867 862
863 if (cpu_is_at91cap9_revB())
864 set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
865
868 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ 866 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
869 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ 867 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
870 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ 868 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 7774d17dde74..fdde1ea21b07 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -313,7 +313,7 @@ static struct platform_device at91sam9260_nand_device = {
313 313
314void __init at91_add_device_nand(struct atmel_nand_data *data) 314void __init at91_add_device_nand(struct atmel_nand_data *data)
315{ 315{
316 unsigned long csa, mode; 316 unsigned long csa;
317 317
318 if (!data) 318 if (!data)
319 return; 319 return;
@@ -321,42 +321,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
321 csa = at91_sys_read(AT91_MATRIX_EBICSA); 321 csa = at91_sys_read(AT91_MATRIX_EBICSA);
322 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 322 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
323 323
324 if (cpu_is_at91sam9260()) {
325 /* Timing for sam9260 */
326 /* set the bus interface characteristics */
327 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
328 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
329
330 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
331 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
332
333 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
334
335 if (data->bus_width_16)
336 mode = AT91_SMC_DBW_16;
337 else
338 mode = AT91_SMC_DBW_8;
339 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
340 }
341
342 if (cpu_is_at91sam9g20()) {
343 /* Timing for sam9g20 */
344 /* set the bus interface characteristics */
345 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0)
346 | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
347
348 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(4)
349 | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(4));
350
351 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
352
353 if (data->bus_width_16)
354 mode = AT91_SMC_DBW_16;
355 else
356 mode = AT91_SMC_DBW_8;
357 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(3));
358 }
359
360 /* enable pin */ 324 /* enable pin */
361 if (data->enable_pin) 325 if (data->enable_pin)
362 at91_set_gpio_output(data->enable_pin, 1); 326 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 6b89172310c7..17289756f80f 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -223,7 +223,7 @@ static struct platform_device atmel_nand_device = {
223 223
224void __init at91_add_device_nand(struct atmel_nand_data *data) 224void __init at91_add_device_nand(struct atmel_nand_data *data)
225{ 225{
226 unsigned long csa, mode; 226 unsigned long csa;
227 227
228 if (!data) 228 if (!data)
229 return; 229 return;
@@ -231,21 +231,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
231 csa = at91_sys_read(AT91_MATRIX_EBICSA); 231 csa = at91_sys_read(AT91_MATRIX_EBICSA);
232 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 232 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
233 233
234 /* set the bus interface characteristics */
235 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
236 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
237
238 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
239 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
240
241 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
242
243 if (data->bus_width_16)
244 mode = AT91_SMC_DBW_16;
245 else
246 mode = AT91_SMC_DBW_8;
247 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
248
249 /* enable pin */ 234 /* enable pin */
250 if (data->enable_pin) 235 if (data->enable_pin)
251 at91_set_gpio_output(data->enable_pin, 1); 236 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 8b884083f76d..b753cb879d8e 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -382,7 +382,7 @@ static struct platform_device at91sam9263_nand_device = {
382 382
383void __init at91_add_device_nand(struct atmel_nand_data *data) 383void __init at91_add_device_nand(struct atmel_nand_data *data)
384{ 384{
385 unsigned long csa, mode; 385 unsigned long csa;
386 386
387 if (!data) 387 if (!data)
388 return; 388 return;
@@ -390,21 +390,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
390 csa = at91_sys_read(AT91_MATRIX_EBI0CSA); 390 csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
391 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); 391 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
392 392
393 /* set the bus interface characteristics */
394 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
395 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
396
397 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
398 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
399
400 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
401
402 if (data->bus_width_16)
403 mode = AT91_SMC_DBW_16;
404 else
405 mode = AT91_SMC_DBW_8;
406 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
407
408 /* enable pin */ 393 /* enable pin */
409 if (data->enable_pin) 394 if (data->enable_pin)
410 at91_set_gpio_output(data->enable_pin, 1); 395 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 87deb1e1b529..145324f4ec56 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -232,17 +232,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
232 csa = at91_sys_read(AT91_MATRIX_EBICSA); 232 csa = at91_sys_read(AT91_MATRIX_EBICSA);
233 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 233 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
234 234
235 /* set the bus interface characteristics */
236 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
237 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
238
239 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
240 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
241
242 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
243
244 at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
245
246 /* enable pin */ 235 /* enable pin */
247 if (data->enable_pin) 236 if (data->enable_pin)
248 at91_set_gpio_output(data->enable_pin, 1); 237 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index cdddca54b938..d3ba29c5d8c8 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -39,7 +39,9 @@
39 39
40#include <mach/board.h> 40#include <mach/board.h>
41#include <mach/gpio.h> 41#include <mach/gpio.h>
42#include <mach/at91sam9_smc.h>
42 43
44#include "sam9_smc.h"
43#include "generic.h" 45#include "generic.h"
44 46
45 47
@@ -151,6 +153,32 @@ static struct atmel_nand_data __initdata cam60_nand_data = {
151 .partition_info = nand_partitions, 153 .partition_info = nand_partitions,
152}; 154};
153 155
156static struct sam9_smc_config __initdata cam60_nand_smc_config = {
157 .ncs_read_setup = 0,
158 .nrd_setup = 1,
159 .ncs_write_setup = 0,
160 .nwe_setup = 1,
161
162 .ncs_read_pulse = 3,
163 .nrd_pulse = 3,
164 .ncs_write_pulse = 3,
165 .nwe_pulse = 3,
166
167 .read_cycle = 5,
168 .write_cycle = 5,
169
170 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
171 .tdf_cycles = 2,
172};
173
174static void __init cam60_add_device_nand(void)
175{
176 /* configure chip-select 3 (NAND) */
177 sam9_smc_configure(3, &cam60_nand_smc_config);
178
179 at91_add_device_nand(&cam60_nand_data);
180}
181
154 182
155static void __init cam60_board_init(void) 183static void __init cam60_board_init(void)
156{ 184{
@@ -165,7 +193,7 @@ static void __init cam60_board_init(void)
165 at91_set_gpio_output(AT91_PIN_PB18, 1); 193 at91_set_gpio_output(AT91_PIN_PB18, 1);
166 at91_add_device_usbh(&cam60_usbh_data); 194 at91_add_device_usbh(&cam60_usbh_data);
167 /* NAND */ 195 /* NAND */
168 at91_add_device_nand(&cam60_nand_data); 196 cam60_add_device_nand();
169} 197}
170 198
171MACHINE_START(CAM60, "KwikByte CAM60") 199MACHINE_START(CAM60, "KwikByte CAM60")
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 201b89392dcc..83a1a0fef47b 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -36,17 +36,16 @@
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <asm/setup.h> 37#include <asm/setup.h>
38#include <asm/mach-types.h> 38#include <asm/mach-types.h>
39#include <asm/irq.h>
40 39
41#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
42#include <asm/mach/map.h> 41#include <asm/mach/map.h>
43#include <asm/mach/irq.h>
44 42
45#include <mach/board.h> 43#include <mach/board.h>
46#include <mach/gpio.h> 44#include <mach/gpio.h>
47#include <mach/at91cap9_matrix.h> 45#include <mach/at91cap9_matrix.h>
48#include <mach/at91sam9_smc.h> 46#include <mach/at91sam9_smc.h>
49 47
48#include "sam9_smc.h"
50#include "generic.h" 49#include "generic.h"
51 50
52 51
@@ -195,6 +194,43 @@ static struct atmel_nand_data __initdata cap9adk_nand_data = {
195#endif 194#endif
196}; 195};
197 196
197static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
198 .ncs_read_setup = 1,
199 .nrd_setup = 2,
200 .ncs_write_setup = 1,
201 .nwe_setup = 2,
202
203 .ncs_read_pulse = 6,
204 .nrd_pulse = 4,
205 .ncs_write_pulse = 6,
206 .nwe_pulse = 4,
207
208 .read_cycle = 8,
209 .write_cycle = 8,
210
211 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
212 .tdf_cycles = 1,
213};
214
215static void __init cap9adk_add_device_nand(void)
216{
217 unsigned long csa;
218
219 csa = at91_sys_read(AT91_MATRIX_EBICSA);
220 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
221
222 /* setup bus-width (8 or 16) */
223 if (cap9adk_nand_data.bus_width_16)
224 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
225 else
226 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
227
228 /* configure chip-select 3 (NAND) */
229 sam9_smc_configure(3, &cap9adk_nand_smc_config);
230
231 at91_add_device_nand(&cap9adk_nand_data);
232}
233
198 234
199/* 235/*
200 * NOR flash 236 * NOR flash
@@ -234,6 +270,24 @@ static struct platform_device cap9adk_nor_flash = {
234 .num_resources = ARRAY_SIZE(nor_flash_resources), 270 .num_resources = ARRAY_SIZE(nor_flash_resources),
235}; 271};
236 272
273static struct sam9_smc_config __initdata cap9adk_nor_smc_config = {
274 .ncs_read_setup = 2,
275 .nrd_setup = 4,
276 .ncs_write_setup = 2,
277 .nwe_setup = 4,
278
279 .ncs_read_pulse = 10,
280 .nrd_pulse = 8,
281 .ncs_write_pulse = 10,
282 .nwe_pulse = 8,
283
284 .read_cycle = 16,
285 .write_cycle = 16,
286
287 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
288 .tdf_cycles = 1,
289};
290
237static __init void cap9adk_add_device_nor(void) 291static __init void cap9adk_add_device_nor(void)
238{ 292{
239 unsigned long csa; 293 unsigned long csa;
@@ -241,18 +295,8 @@ static __init void cap9adk_add_device_nor(void)
241 csa = at91_sys_read(AT91_MATRIX_EBICSA); 295 csa = at91_sys_read(AT91_MATRIX_EBICSA);
242 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); 296 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
243 297
244 /* set the bus interface characteristics */ 298 /* configure chip-select 0 (NOR) */
245 at91_sys_write(AT91_SMC_SETUP(0), AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2) 299 sam9_smc_configure(0, &cap9adk_nor_smc_config);
246 | AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2));
247
248 at91_sys_write(AT91_SMC_PULSE(0), AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10)
249 | AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10));
250
251 at91_sys_write(AT91_SMC_CYCLE(0), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
252
253 at91_sys_write(AT91_SMC_MODE(0), AT91_SMC_READMODE | AT91_SMC_WRITEMODE
254 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
255 | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
256 300
257 platform_device_register(&cap9adk_nor_flash); 301 platform_device_register(&cap9adk_nor_flash);
258} 302}
@@ -330,10 +374,8 @@ static void __init cap9adk_board_init(void)
330 /* Serial */ 374 /* Serial */
331 at91_add_device_serial(); 375 at91_add_device_serial();
332 /* USB Host */ 376 /* USB Host */
333 set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
334 at91_add_device_usbh(&cap9adk_usbh_data); 377 at91_add_device_usbh(&cap9adk_usbh_data);
335 /* USB HS */ 378 /* USB HS */
336 set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
337 at91_add_device_usba(&cap9adk_usba_udc_data); 379 at91_add_device_usba(&cap9adk_usba_udc_data);
338 /* SPI */ 380 /* SPI */
339 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); 381 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
@@ -344,13 +386,12 @@ static void __init cap9adk_board_init(void)
344 /* Ethernet */ 386 /* Ethernet */
345 at91_add_device_eth(&cap9adk_macb_data); 387 at91_add_device_eth(&cap9adk_macb_data);
346 /* NAND */ 388 /* NAND */
347 at91_add_device_nand(&cap9adk_nand_data); 389 cap9adk_add_device_nand();
348 /* NOR Flash */ 390 /* NOR Flash */
349 cap9adk_add_device_nor(); 391 cap9adk_add_device_nor();
350 /* I2C */ 392 /* I2C */
351 at91_add_device_i2c(NULL, 0); 393 at91_add_device_i2c(NULL, 0);
352 /* LCD Controller */ 394 /* LCD Controller */
353 set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
354 at91_add_device_lcdc(&cap9adk_lcdc_data); 395 at91_add_device_lcdc(&cap9adk_lcdc_data);
355 /* AC97 */ 396 /* AC97 */
356 at91_add_device_ac97(&cap9adk_ac97_data); 397 at91_add_device_ac97(&cap9adk_ac97_data);
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
new file mode 100644
index 000000000000..9ba7ba2cc3b1
--- /dev/null
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -0,0 +1,397 @@
1/*
2 * linux/arch/arm/mach-at91/board-neocore926.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2007 Atmel Corporation
6 * Copyright (C) 2008 ADENEO.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/types.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29#include <linux/spi/ads7846.h>
30#include <linux/fb.h>
31#include <linux/gpio_keys.h>
32#include <linux/input.h>
33
34#include <video/atmel_lcdc.h>
35
36#include <asm/setup.h>
37#include <asm/mach-types.h>
38#include <asm/irq.h>
39#include <asm/sizes.h>
40
41#include <asm/mach/arch.h>
42#include <asm/mach/map.h>
43#include <asm/mach/irq.h>
44
45#include <mach/hardware.h>
46#include <mach/board.h>
47#include <mach/gpio.h>
48#include <mach/at91sam9_smc.h>
49
50#include "sam9_smc.h"
51#include "generic.h"
52
53
54static void __init neocore926_map_io(void)
55{
56 /* Initialize processor: 20 MHz crystal */
57 at91sam9263_initialize(20000000);
58
59 /* DGBU on ttyS0. (Rx & Tx only) */
60 at91_register_uart(0, 0, 0);
61
62 /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
63 at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
64
65 /* set serial console to ttyS0 (ie, DBGU) */
66 at91_set_serial_console(0);
67}
68
69static void __init neocore926_init_irq(void)
70{
71 at91sam9263_init_interrupts(NULL);
72}
73
74
75/*
76 * USB Host port
77 */
78static struct at91_usbh_data __initdata neocore926_usbh_data = {
79 .ports = 2,
80 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
81};
82
83/*
84 * USB Device port
85 */
86static struct at91_udc_data __initdata neocore926_udc_data = {
87 .vbus_pin = AT91_PIN_PA25,
88 .pullup_pin = 0, /* pull-up driven by UDC */
89};
90
91
92/*
93 * ADS7846 Touchscreen
94 */
95#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
96static int ads7843_pendown_state(void)
97{
98 return !at91_get_gpio_value(AT91_PIN_PA15); /* Touchscreen PENIRQ */
99}
100
101static struct ads7846_platform_data ads_info = {
102 .model = 7843,
103 .x_min = 150,
104 .x_max = 3830,
105 .y_min = 190,
106 .y_max = 3830,
107 .vref_delay_usecs = 100,
108 .x_plate_ohms = 450,
109 .y_plate_ohms = 250,
110 .pressure_max = 15000,
111 .debounce_max = 1,
112 .debounce_rep = 0,
113 .debounce_tol = (~0),
114 .get_pendown_state = ads7843_pendown_state,
115};
116
117static void __init neocore926_add_device_ts(void)
118{
119 at91_set_B_periph(AT91_PIN_PA15, 1); /* External IRQ1, with pullup */
120 at91_set_gpio_input(AT91_PIN_PC13, 1); /* Touchscreen BUSY signal */
121}
122#else
123static void __init neocore926_add_device_ts(void) {}
124#endif
125
126/*
127 * SPI devices.
128 */
129static struct spi_board_info neocore926_spi_devices[] = {
130#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
131 { /* DataFlash card */
132 .modalias = "mtd_dataflash",
133 .chip_select = 0,
134 .max_speed_hz = 15 * 1000 * 1000,
135 .bus_num = 0,
136 },
137#endif
138#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
139 {
140 .modalias = "ads7846",
141 .chip_select = 1,
142 .max_speed_hz = 125000 * 16,
143 .bus_num = 0,
144 .platform_data = &ads_info,
145 .irq = AT91SAM9263_ID_IRQ1,
146 },
147#endif
148};
149
150
151/*
152 * MCI (SD/MMC)
153 */
154static struct at91_mmc_data __initdata neocore926_mmc_data = {
155 .wire4 = 1,
156 .det_pin = AT91_PIN_PE18,
157 .wp_pin = AT91_PIN_PE19,
158};
159
160
161/*
162 * MACB Ethernet device
163 */
164static struct at91_eth_data __initdata neocore926_macb_data = {
165 .phy_irq_pin = AT91_PIN_PE31,
166 .is_rmii = 1,
167};
168
169
170/*
171 * NAND flash
172 */
173static struct mtd_partition __initdata neocore926_nand_partition[] = {
174 {
175 .name = "Linux Kernel", /* "Partition 1", */
176 .offset = 0,
177 .size = SZ_8M,
178 },
179 {
180 .name = "Filesystem", /* "Partition 2", */
181 .offset = MTDPART_OFS_NXTBLK,
182 .size = SZ_32M,
183 },
184 {
185 .name = "Free", /* "Partition 3", */
186 .offset = MTDPART_OFS_NXTBLK,
187 .size = MTDPART_SIZ_FULL,
188 },
189};
190
191static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
192{
193 *num_partitions = ARRAY_SIZE(neocore926_nand_partition);
194 return neocore926_nand_partition;
195}
196
197static struct atmel_nand_data __initdata neocore926_nand_data = {
198 .ale = 21,
199 .cle = 22,
200 .rdy_pin = AT91_PIN_PB19,
201 .rdy_pin_active_low = 1,
202 .enable_pin = AT91_PIN_PD15,
203 .partition_info = nand_partitions,
204};
205
206static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
207 .ncs_read_setup = 0,
208 .nrd_setup = 1,
209 .ncs_write_setup = 0,
210 .nwe_setup = 1,
211
212 .ncs_read_pulse = 4,
213 .nrd_pulse = 4,
214 .ncs_write_pulse = 4,
215 .nwe_pulse = 4,
216
217 .read_cycle = 6,
218 .write_cycle = 6,
219
220 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
221 .tdf_cycles = 2,
222};
223
224static void __init neocore926_add_device_nand(void)
225{
226 /* configure chip-select 3 (NAND) */
227 sam9_smc_configure(3, &neocore926_nand_smc_config);
228
229 at91_add_device_nand(&neocore926_nand_data);
230}
231
232
233/*
234 * LCD Controller
235 */
236#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
237static struct fb_videomode at91_tft_vga_modes[] = {
238 {
239 .name = "TX09D50VM1CCA @ 60",
240 .refresh = 60,
241 .xres = 240, .yres = 320,
242 .pixclock = KHZ2PICOS(5000),
243
244 .left_margin = 1, .right_margin = 33,
245 .upper_margin = 1, .lower_margin = 0,
246 .hsync_len = 5, .vsync_len = 1,
247
248 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
249 .vmode = FB_VMODE_NONINTERLACED,
250 },
251};
252
253static struct fb_monspecs at91fb_default_monspecs = {
254 .manufacturer = "HIT",
255 .monitor = "TX09D70VM1CCA",
256
257 .modedb = at91_tft_vga_modes,
258 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
259 .hfmin = 15000,
260 .hfmax = 64000,
261 .vfmin = 50,
262 .vfmax = 150,
263};
264
265#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
266 | ATMEL_LCDC_DISTYPE_TFT \
267 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
268
269static void at91_lcdc_power_control(int on)
270{
271 at91_set_gpio_value(AT91_PIN_PA30, on);
272}
273
274/* Driver datas */
275static struct atmel_lcdfb_info __initdata neocore926_lcdc_data = {
276 .lcdcon_is_backlight = true,
277 .default_bpp = 16,
278 .default_dmacon = ATMEL_LCDC_DMAEN,
279 .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2,
280 .default_monspecs = &at91fb_default_monspecs,
281 .atmel_lcdfb_power_control = at91_lcdc_power_control,
282 .guard_time = 1,
283 .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB555,
284};
285
286#else
287static struct atmel_lcdfb_info __initdata neocore926_lcdc_data;
288#endif
289
290
291/*
292 * GPIO Buttons
293 */
294#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
295static struct gpio_keys_button neocore926_buttons[] = {
296 { /* BP1, "leftclic" */
297 .code = BTN_LEFT,
298 .gpio = AT91_PIN_PC5,
299 .active_low = 1,
300 .desc = "left_click",
301 .wakeup = 1,
302 },
303 { /* BP2, "rightclic" */
304 .code = BTN_RIGHT,
305 .gpio = AT91_PIN_PC4,
306 .active_low = 1,
307 .desc = "right_click",
308 .wakeup = 1,
309 },
310};
311
312static struct gpio_keys_platform_data neocore926_button_data = {
313 .buttons = neocore926_buttons,
314 .nbuttons = ARRAY_SIZE(neocore926_buttons),
315};
316
317static struct platform_device neocore926_button_device = {
318 .name = "gpio-keys",
319 .id = -1,
320 .num_resources = 0,
321 .dev = {
322 .platform_data = &neocore926_button_data,
323 }
324};
325
326static void __init neocore926_add_device_buttons(void)
327{
328 at91_set_GPIO_periph(AT91_PIN_PC5, 0); /* left button */
329 at91_set_deglitch(AT91_PIN_PC5, 1);
330 at91_set_GPIO_periph(AT91_PIN_PC4, 0); /* right button */
331 at91_set_deglitch(AT91_PIN_PC4, 1);
332
333 platform_device_register(&neocore926_button_device);
334}
335#else
336static void __init neocore926_add_device_buttons(void) {}
337#endif
338
339
340/*
341 * AC97
342 */
343static struct atmel_ac97_data neocore926_ac97_data = {
344 .reset_pin = AT91_PIN_PA13,
345};
346
347
348static void __init neocore926_board_init(void)
349{
350 /* Serial */
351 at91_add_device_serial();
352
353 /* USB Host */
354 at91_add_device_usbh(&neocore926_usbh_data);
355
356 /* USB Device */
357 at91_add_device_udc(&neocore926_udc_data);
358
359 /* SPI */
360 at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */
361 at91_add_device_spi(neocore926_spi_devices, ARRAY_SIZE(neocore926_spi_devices));
362
363 /* Touchscreen */
364 neocore926_add_device_ts();
365
366 /* MMC */
367 at91_add_device_mmc(1, &neocore926_mmc_data);
368
369 /* Ethernet */
370 at91_add_device_eth(&neocore926_macb_data);
371
372 /* NAND */
373 neocore926_add_device_nand();
374
375 /* I2C */
376 at91_add_device_i2c(NULL, 0);
377
378 /* LCD Controller */
379 at91_add_device_lcdc(&neocore926_lcdc_data);
380
381 /* Push Buttons */
382 neocore926_add_device_buttons();
383
384 /* AC97 */
385 at91_add_device_ac97(&neocore926_ac97_data);
386}
387
388MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")
389 /* Maintainer: ADENEO */
390 .phys_io = AT91_BASE_SYS,
391 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
392 .boot_params = AT91_SDRAM_BASE + 0x100,
393 .timer = &at91sam926x_timer,
394 .map_io = neocore926_map_io,
395 .init_irq = neocore926_init_irq,
396 .init_machine = neocore926_board_init,
397MACHINE_END
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index cfb4571a2e27..4cff9a7e61d2 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -41,8 +41,10 @@
41#include <mach/hardware.h> 41#include <mach/hardware.h>
42#include <mach/board.h> 42#include <mach/board.h>
43#include <mach/gpio.h> 43#include <mach/gpio.h>
44#include <mach/at91sam9_smc.h>
44#include <mach/at91_shdwc.h> 45#include <mach/at91_shdwc.h>
45 46
47#include "sam9_smc.h"
46#include "generic.h" 48#include "generic.h"
47 49
48 50
@@ -147,13 +149,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
147 .rdy_pin = AT91_PIN_PC13, 149 .rdy_pin = AT91_PIN_PC13,
148 .enable_pin = AT91_PIN_PC14, 150 .enable_pin = AT91_PIN_PC14,
149 .partition_info = nand_partitions, 151 .partition_info = nand_partitions,
150#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
151 .bus_width_16 = 1,
152#else
153 .bus_width_16 = 0,
154#endif
155}; 152};
156 153
154static struct sam9_smc_config __initdata ek_nand_smc_config = {
155 .ncs_read_setup = 0,
156 .nrd_setup = 1,
157 .ncs_write_setup = 0,
158 .nwe_setup = 1,
159
160 .ncs_read_pulse = 3,
161 .nrd_pulse = 3,
162 .ncs_write_pulse = 3,
163 .nwe_pulse = 3,
164
165 .read_cycle = 5,
166 .write_cycle = 5,
167
168 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
169 .tdf_cycles = 2,
170};
171
172static void __init ek_add_device_nand(void)
173{
174 /* configure chip-select 3 (NAND) */
175 sam9_smc_configure(3, &ek_nand_smc_config);
176
177 at91_add_device_nand(&ek_nand_data);
178}
179
157/* 180/*
158 * MCI (SD/MMC) 181 * MCI (SD/MMC)
159 */ 182 */
@@ -227,7 +250,7 @@ static void __init ek_board_init(void)
227 /* SPI */ 250 /* SPI */
228 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 251 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
229 /* NAND */ 252 /* NAND */
230 at91_add_device_nand(&ek_nand_data); 253 ek_add_device_nand();
231 /* I2C */ 254 /* I2C */
232 at91_add_device_i2c(NULL, 0); 255 at91_add_device_i2c(NULL, 0);
233 /* Ethernet */ 256 /* Ethernet */
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 99bb4cc23a09..b48346977534 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -38,7 +38,9 @@
38 38
39#include <mach/board.h> 39#include <mach/board.h>
40#include <mach/gpio.h> 40#include <mach/gpio.h>
41#include <mach/at91sam9_smc.h>
41 42
43#include "sam9_smc.h"
42#include "generic.h" 44#include "generic.h"
43 45
44 46
@@ -148,13 +150,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
148 .rdy_pin = AT91_PIN_PC13, 150 .rdy_pin = AT91_PIN_PC13,
149 .enable_pin = AT91_PIN_PC14, 151 .enable_pin = AT91_PIN_PC14,
150 .partition_info = nand_partitions, 152 .partition_info = nand_partitions,
151#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
152 .bus_width_16 = 1,
153#else
154 .bus_width_16 = 0,
155#endif
156}; 153};
157 154
155static struct sam9_smc_config __initdata ek_nand_smc_config = {
156 .ncs_read_setup = 0,
157 .nrd_setup = 1,
158 .ncs_write_setup = 0,
159 .nwe_setup = 1,
160
161 .ncs_read_pulse = 3,
162 .nrd_pulse = 3,
163 .ncs_write_pulse = 3,
164 .nwe_pulse = 3,
165
166 .read_cycle = 5,
167 .write_cycle = 5,
168
169 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
170 .tdf_cycles = 2,
171};
172
173static void __init ek_add_device_nand(void)
174{
175 /* configure chip-select 3 (NAND) */
176 sam9_smc_configure(3, &ek_nand_smc_config);
177
178 at91_add_device_nand(&ek_nand_data);
179}
180
158 181
159/* 182/*
160 * MCI (SD/MMC) 183 * MCI (SD/MMC)
@@ -178,7 +201,7 @@ static void __init ek_board_init(void)
178 /* SPI */ 201 /* SPI */
179 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 202 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
180 /* NAND */ 203 /* NAND */
181 at91_add_device_nand(&ek_nand_data); 204 ek_add_device_nand();
182 /* Ethernet */ 205 /* Ethernet */
183 at91_add_device_eth(&ek_macb_data); 206 at91_add_device_eth(&ek_macb_data);
184 /* MMC */ 207 /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index b49eb6e4918a..93a0f8b100eb 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -42,7 +42,10 @@
42#include <mach/hardware.h> 42#include <mach/hardware.h>
43#include <mach/board.h> 43#include <mach/board.h>
44#include <mach/gpio.h> 44#include <mach/gpio.h>
45#include <mach/at91sam9_smc.h>
46#include <mach/at91_shdwc.h>
45 47
48#include "sam9_smc.h"
46#include "generic.h" 49#include "generic.h"
47 50
48 51
@@ -195,6 +198,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
195#endif 198#endif
196}; 199};
197 200
201static struct sam9_smc_config __initdata ek_nand_smc_config = {
202 .ncs_read_setup = 0,
203 .nrd_setup = 1,
204 .ncs_write_setup = 0,
205 .nwe_setup = 1,
206
207 .ncs_read_pulse = 3,
208 .nrd_pulse = 3,
209 .ncs_write_pulse = 3,
210 .nwe_pulse = 3,
211
212 .read_cycle = 5,
213 .write_cycle = 5,
214
215 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
216 .tdf_cycles = 2,
217};
218
219static void __init ek_add_device_nand(void)
220{
221 /* setup bus-width (8 or 16) */
222 if (ek_nand_data.bus_width_16)
223 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
224 else
225 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
226
227 /* configure chip-select 3 (NAND) */
228 sam9_smc_configure(3, &ek_nand_smc_config);
229
230 at91_add_device_nand(&ek_nand_data);
231}
232
198 233
199/* 234/*
200 * MCI (SD/MMC) 235 * MCI (SD/MMC)
@@ -303,7 +338,7 @@ static void __init ek_board_init(void)
303 /* SPI */ 338 /* SPI */
304 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 339 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
305 /* NAND */ 340 /* NAND */
306 at91_add_device_nand(&ek_nand_data); 341 ek_add_device_nand();
307 /* Ethernet */ 342 /* Ethernet */
308 at91_add_device_eth(&ek_macb_data); 343 at91_add_device_eth(&ek_macb_data);
309 /* MMC */ 344 /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 4977409d4fc6..d5266da55311 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -47,7 +47,9 @@
47#include <mach/board.h> 47#include <mach/board.h>
48#include <mach/gpio.h> 48#include <mach/gpio.h>
49#include <mach/at91sam9_smc.h> 49#include <mach/at91sam9_smc.h>
50#include <mach/at91_shdwc.h>
50 51
52#include "sam9_smc.h"
51#include "generic.h" 53#include "generic.h"
52 54
53 55
@@ -76,7 +78,7 @@ static void __init ek_init_irq(void)
76 * DM9000 ethernet device 78 * DM9000 ethernet device
77 */ 79 */
78#if defined(CONFIG_DM9000) 80#if defined(CONFIG_DM9000)
79static struct resource at91sam9261_dm9000_resource[] = { 81static struct resource dm9000_resource[] = {
80 [0] = { 82 [0] = {
81 .start = AT91_CHIPSELECT_2, 83 .start = AT91_CHIPSELECT_2,
82 .end = AT91_CHIPSELECT_2 + 3, 84 .end = AT91_CHIPSELECT_2 + 3,
@@ -98,27 +100,42 @@ static struct dm9000_plat_data dm9000_platdata = {
98 .flags = DM9000_PLATF_16BITONLY, 100 .flags = DM9000_PLATF_16BITONLY,
99}; 101};
100 102
101static struct platform_device at91sam9261_dm9000_device = { 103static struct platform_device dm9000_device = {
102 .name = "dm9000", 104 .name = "dm9000",
103 .id = 0, 105 .id = 0,
104 .num_resources = ARRAY_SIZE(at91sam9261_dm9000_resource), 106 .num_resources = ARRAY_SIZE(dm9000_resource),
105 .resource = at91sam9261_dm9000_resource, 107 .resource = dm9000_resource,
106 .dev = { 108 .dev = {
107 .platform_data = &dm9000_platdata, 109 .platform_data = &dm9000_platdata,
108 } 110 }
109}; 111};
110 112
113/*
114 * SMC timings for the DM9000.
115 * Note: These timings were calculated for MASTER_CLOCK = 100000000 according to the DM9000 timings.
116 */
117static struct sam9_smc_config __initdata dm9000_smc_config = {
118 .ncs_read_setup = 0,
119 .nrd_setup = 2,
120 .ncs_write_setup = 0,
121 .nwe_setup = 2,
122
123 .ncs_read_pulse = 8,
124 .nrd_pulse = 4,
125 .ncs_write_pulse = 8,
126 .nwe_pulse = 4,
127
128 .read_cycle = 16,
129 .write_cycle = 16,
130
131 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
132 .tdf_cycles = 1,
133};
134
111static void __init ek_add_device_dm9000(void) 135static void __init ek_add_device_dm9000(void)
112{ 136{
113 /* 137 /* Configure chip-select 2 (DM9000) */
114 * Configure Chip-Select 2 on SMC for the DM9000. 138 sam9_smc_configure(2, &dm9000_smc_config);
115 * Note: These timings were calculated for MASTER_CLOCK = 100000000
116 * according to the DM9000 timings.
117 */
118 at91_sys_write(AT91_SMC_SETUP(2), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
119 at91_sys_write(AT91_SMC_PULSE(2), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
120 at91_sys_write(AT91_SMC_CYCLE(2), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
121 at91_sys_write(AT91_SMC_MODE(2), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
122 139
123 /* Configure Reset signal as output */ 140 /* Configure Reset signal as output */
124 at91_set_gpio_output(AT91_PIN_PC10, 0); 141 at91_set_gpio_output(AT91_PIN_PC10, 0);
@@ -126,7 +143,7 @@ static void __init ek_add_device_dm9000(void)
126 /* Configure Interrupt pin as input, no pull-up */ 143 /* Configure Interrupt pin as input, no pull-up */
127 at91_set_gpio_input(AT91_PIN_PC11, 0); 144 at91_set_gpio_input(AT91_PIN_PC11, 0);
128 145
129 platform_device_register(&at91sam9261_dm9000_device); 146 platform_device_register(&dm9000_device);
130} 147}
131#else 148#else
132static void __init ek_add_device_dm9000(void) {} 149static void __init ek_add_device_dm9000(void) {}
@@ -197,6 +214,39 @@ static struct atmel_nand_data __initdata ek_nand_data = {
197#endif 214#endif
198}; 215};
199 216
217static struct sam9_smc_config __initdata ek_nand_smc_config = {
218 .ncs_read_setup = 0,
219 .nrd_setup = 1,
220 .ncs_write_setup = 0,
221 .nwe_setup = 1,
222
223 .ncs_read_pulse = 3,
224 .nrd_pulse = 3,
225 .ncs_write_pulse = 3,
226 .nwe_pulse = 3,
227
228 .read_cycle = 5,
229 .write_cycle = 5,
230
231 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
232 .tdf_cycles = 2,
233};
234
235static void __init ek_add_device_nand(void)
236{
237 /* setup bus-width (8 or 16) */
238 if (ek_nand_data.bus_width_16)
239 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
240 else
241 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
242
243 /* configure chip-select 3 (NAND) */
244 sam9_smc_configure(3, &ek_nand_smc_config);
245
246 at91_add_device_nand(&ek_nand_data);
247}
248
249
200/* 250/*
201 * ADS7846 Touchscreen 251 * ADS7846 Touchscreen
202 */ 252 */
@@ -525,7 +575,7 @@ static void __init ek_board_init(void)
525 /* I2C */ 575 /* I2C */
526 at91_add_device_i2c(NULL, 0); 576 at91_add_device_i2c(NULL, 0);
527 /* NAND */ 577 /* NAND */
528 at91_add_device_nand(&ek_nand_data); 578 ek_add_device_nand();
529 /* DM9000 ethernet */ 579 /* DM9000 ethernet */
530 ek_add_device_dm9000(); 580 ek_add_device_dm9000();
531 581
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 8354015c6a23..57d52528f224 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -46,7 +46,9 @@
46#include <mach/board.h> 46#include <mach/board.h>
47#include <mach/gpio.h> 47#include <mach/gpio.h>
48#include <mach/at91sam9_smc.h> 48#include <mach/at91sam9_smc.h>
49#include <mach/at91_shdwc.h>
49 50
51#include "sam9_smc.h"
50#include "generic.h" 52#include "generic.h"
51 53
52 54
@@ -203,6 +205,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
203#endif 205#endif
204}; 206};
205 207
208static struct sam9_smc_config __initdata ek_nand_smc_config = {
209 .ncs_read_setup = 0,
210 .nrd_setup = 1,
211 .ncs_write_setup = 0,
212 .nwe_setup = 1,
213
214 .ncs_read_pulse = 3,
215 .nrd_pulse = 3,
216 .ncs_write_pulse = 3,
217 .nwe_pulse = 3,
218
219 .read_cycle = 5,
220 .write_cycle = 5,
221
222 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
223 .tdf_cycles = 2,
224};
225
226static void __init ek_add_device_nand(void)
227{
228 /* setup bus-width (8 or 16) */
229 if (ek_nand_data.bus_width_16)
230 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
231 else
232 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
233
234 /* configure chip-select 3 (NAND) */
235 sam9_smc_configure(3, &ek_nand_smc_config);
236
237 at91_add_device_nand(&ek_nand_data);
238}
239
206 240
207/* 241/*
208 * I2C devices 242 * I2C devices
@@ -385,7 +419,7 @@ static void __init ek_board_init(void)
385 /* Ethernet */ 419 /* Ethernet */
386 at91_add_device_eth(&ek_macb_data); 420 at91_add_device_eth(&ek_macb_data);
387 /* NAND */ 421 /* NAND */
388 at91_add_device_nand(&ek_nand_data); 422 ek_add_device_nand();
389 /* I2C */ 423 /* I2C */
390 at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices)); 424 at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
391 /* LCD Controller */ 425 /* LCD Controller */
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index b588ead14d68..81439fe6fb3d 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -37,7 +37,9 @@
37 37
38#include <mach/board.h> 38#include <mach/board.h>
39#include <mach/gpio.h> 39#include <mach/gpio.h>
40#include <mach/at91sam9_smc.h>
40 41
42#include "sam9_smc.h"
41#include "generic.h" 43#include "generic.h"
42 44
43 45
@@ -156,6 +158,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
156#endif 158#endif
157}; 159};
158 160
161static struct sam9_smc_config __initdata ek_nand_smc_config = {
162 .ncs_read_setup = 0,
163 .nrd_setup = 2,
164 .ncs_write_setup = 0,
165 .nwe_setup = 2,
166
167 .ncs_read_pulse = 4,
168 .nrd_pulse = 4,
169 .ncs_write_pulse = 4,
170 .nwe_pulse = 4,
171
172 .read_cycle = 7,
173 .write_cycle = 7,
174
175 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
176 .tdf_cycles = 3,
177};
178
179static void __init ek_add_device_nand(void)
180{
181 /* setup bus-width (8 or 16) */
182 if (ek_nand_data.bus_width_16)
183 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
184 else
185 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
186
187 /* configure chip-select 3 (NAND) */
188 sam9_smc_configure(3, &ek_nand_smc_config);
189
190 at91_add_device_nand(&ek_nand_data);
191}
192
159 193
160/* 194/*
161 * MCI (SD/MMC) 195 * MCI (SD/MMC)
@@ -195,7 +229,7 @@ static void __init ek_board_init(void)
195 /* SPI */ 229 /* SPI */
196 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 230 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
197 /* NAND */ 231 /* NAND */
198 at91_add_device_nand(&ek_nand_data); 232 ek_add_device_nand();
199 /* Ethernet */ 233 /* Ethernet */
200 at91_add_device_eth(&ek_macb_data); 234 at91_add_device_eth(&ek_macb_data);
201 /* MMC */ 235 /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 270851864308..9b937ee4815a 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -29,8 +29,9 @@
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/board.h> 30#include <mach/board.h>
31#include <mach/gpio.h> 31#include <mach/gpio.h>
32#include <mach/at91sam9_smc.h> 32#include <mach/at91_shdwc.h>
33 33
34#include "sam9_smc.h"
34#include "generic.h" 35#include "generic.h"
35 36
36 37
@@ -103,9 +104,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
103 .rdy_pin = AT91_PIN_PD17, 104 .rdy_pin = AT91_PIN_PD17,
104 .enable_pin = AT91_PIN_PB6, 105 .enable_pin = AT91_PIN_PB6,
105 .partition_info = nand_partitions, 106 .partition_info = nand_partitions,
106 .bus_width_16 = 0,
107}; 107};
108 108
109static struct sam9_smc_config __initdata ek_nand_smc_config = {
110 .ncs_read_setup = 0,
111 .nrd_setup = 1,
112 .ncs_write_setup = 0,
113 .nwe_setup = 1,
114
115 .ncs_read_pulse = 3,
116 .nrd_pulse = 3,
117 .ncs_write_pulse = 3,
118 .nwe_pulse = 3,
119
120 .read_cycle = 5,
121 .write_cycle = 5,
122
123 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
124 .tdf_cycles = 2,
125};
126
127static void __init ek_add_device_nand(void)
128{
129 /* configure chip-select 3 (NAND) */
130 sam9_smc_configure(3, &ek_nand_smc_config);
131
132 at91_add_device_nand(&ek_nand_data);
133}
134
109 135
110/* 136/*
111 * SPI devices 137 * SPI devices
@@ -188,7 +214,7 @@ static void __init ek_board_init(void)
188 /* I2C */ 214 /* I2C */
189 at91_add_device_i2c(NULL, 0); 215 at91_add_device_i2c(NULL, 0);
190 /* NAND */ 216 /* NAND */
191 at91_add_device_nand(&ek_nand_data); 217 ek_add_device_nand();
192 /* SPI */ 218 /* SPI */
193 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 219 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
194 /* MMC */ 220 /* MMC */
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index 7c350357333a..d13304c0bc45 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -41,8 +41,10 @@
41#include <mach/hardware.h> 41#include <mach/hardware.h>
42#include <mach/board.h> 42#include <mach/board.h>
43#include <mach/gpio.h> 43#include <mach/gpio.h>
44#include <mach/at91sam9_smc.h>
44#include <mach/at91_shdwc.h> 45#include <mach/at91_shdwc.h>
45 46
47#include "sam9_smc.h"
46#include "generic.h" 48#include "generic.h"
47 49
48 50
@@ -121,13 +123,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
121 .rdy_pin = AT91_PIN_PC13, 123 .rdy_pin = AT91_PIN_PC13,
122 .enable_pin = AT91_PIN_PC14, 124 .enable_pin = AT91_PIN_PC14,
123 .partition_info = nand_partitions, 125 .partition_info = nand_partitions,
124#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
125 .bus_width_16 = 1,
126#else
127 .bus_width_16 = 0,
128#endif
129}; 126};
130 127
128static struct sam9_smc_config __initdata ek_nand_smc_config = {
129 .ncs_read_setup = 0,
130 .nrd_setup = 1,
131 .ncs_write_setup = 0,
132 .nwe_setup = 1,
133
134 .ncs_read_pulse = 3,
135 .nrd_pulse = 3,
136 .ncs_write_pulse = 3,
137 .nwe_pulse = 3,
138
139 .read_cycle = 5,
140 .write_cycle = 5,
141
142 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
143 .tdf_cycles = 2,
144};
145
146static void __init ek_add_device_nand(void)
147{
148 /* configure chip-select 3 (NAND) */
149 sam9_smc_configure(3, &ek_nand_smc_config);
150
151 at91_add_device_nand(&ek_nand_data);
152}
153
131/* 154/*
132 * GPIO Buttons 155 * GPIO Buttons
133 */ 156 */
@@ -189,7 +212,7 @@ static void __init ek_board_init(void)
189 /* USB Device */ 212 /* USB Device */
190 at91_add_device_udc(&ek_udc_data); 213 at91_add_device_udc(&ek_udc_data);
191 /* NAND */ 214 /* NAND */
192 at91_add_device_nand(&ek_nand_data); 215 ek_add_device_nand();
193 /* I2C */ 216 /* I2C */
194 at91_add_device_i2c(NULL, 0); 217 at91_add_device_i2c(NULL, 0);
195 /* Ethernet */ 218 /* Ethernet */
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index 391b566c4571..d96405b7d578 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -40,8 +40,10 @@
40#include <mach/hardware.h> 40#include <mach/hardware.h>
41#include <mach/board.h> 41#include <mach/board.h>
42#include <mach/gpio.h> 42#include <mach/gpio.h>
43#include <mach/at91sam9_smc.h>
43#include <mach/at91_shdwc.h> 44#include <mach/at91_shdwc.h>
44 45
46#include "sam9_smc.h"
45#include "generic.h" 47#include "generic.h"
46 48
47 49
@@ -134,13 +136,35 @@ static struct atmel_nand_data __initdata ek_nand_data = {
134 .rdy_pin = AT91_PIN_PA22, 136 .rdy_pin = AT91_PIN_PA22,
135 .enable_pin = AT91_PIN_PD15, 137 .enable_pin = AT91_PIN_PD15,
136 .partition_info = nand_partitions, 138 .partition_info = nand_partitions,
137#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
138 .bus_width_16 = 1,
139#else
140 .bus_width_16 = 0,
141#endif
142}; 139};
143 140
141static struct sam9_smc_config __initdata ek_nand_smc_config = {
142 .ncs_read_setup = 0,
143 .nrd_setup = 1,
144 .ncs_write_setup = 0,
145 .nwe_setup = 1,
146
147 .ncs_read_pulse = 3,
148 .nrd_pulse = 3,
149 .ncs_write_pulse = 3,
150 .nwe_pulse = 3,
151
152 .read_cycle = 5,
153 .write_cycle = 5,
154
155 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
156 .tdf_cycles = 2,
157};
158
159static void __init ek_add_device_nand(void)
160{
161 /* configure chip-select 3 (NAND) */
162 sam9_smc_configure(3, &ek_nand_smc_config);
163
164 at91_add_device_nand(&ek_nand_data);
165}
166
167
144/* 168/*
145 * GPIO Buttons 169 * GPIO Buttons
146 */ 170 */
@@ -206,7 +230,7 @@ static void __init ek_board_init(void)
206 /* Ethernet */ 230 /* Ethernet */
207 at91_add_device_eth(&ek_macb_data); 231 at91_add_device_eth(&ek_macb_data);
208 /* NAND */ 232 /* NAND */
209 at91_add_device_nand(&ek_nand_data); 233 ek_add_device_nand();
210 /* I2C */ 234 /* I2C */
211 at91_add_device_i2c(NULL, 0); 235 at91_add_device_i2c(NULL, 0);
212 /* Push Buttons */ 236 /* Push Buttons */
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 2e3f2894b704..9561e33b8a9a 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -23,6 +23,7 @@
23#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ 23#define AT91_PMC_PCK (1 << 0) /* Processor Clock */
24#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ 24#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
25#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ 25#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
26#define AT91CAP9_PMC_DDR (1 << 2) /* DDR Clock [AT91CAP9 revC only] */
26#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ 27#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */
27#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ 28#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */
28#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ 29#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */
@@ -102,10 +103,16 @@
102#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ 103#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
103#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ 104#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */
104#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */ 105#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */
106#define AT91_PMC_OSCSEL (1 << 7) /* Slow Clock Oscillator [AT91CAP9 revC only] */
105#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ 107#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
106#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ 108#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
107#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ 109#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
108#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ 110#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */
109#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ 111#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */
110 112
113#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */
114#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */
115
116#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */
117
111#endif 118#endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 4a4b64135a92..d8c1ededaa75 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -101,7 +101,9 @@
101#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) 101#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
102#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) 102#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
103#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) 103#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
104#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 104#define AT91_GPBR (cpu_is_at91cap9_revB() ? \
105 (0xfffffd50 - AT91_BASE_SYS) : \
106 (0xfffffd60 - AT91_BASE_SYS))
105 107
106#define AT91_USART0 AT91CAP9_BASE_US0 108#define AT91_USART0 AT91CAP9_BASE_US0
107#define AT91_USART1 AT91CAP9_BASE_US1 109#define AT91_USART1 AT91CAP9_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index dbfd9f73f80b..c554c3e4d553 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -49,6 +49,17 @@ static inline unsigned long at91_arch_identify(void)
49 return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH); 49 return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
50} 50}
51 51
52#ifdef CONFIG_ARCH_AT91CAP9
53#include <mach/at91_pmc.h>
54
55#define ARCH_REVISION_CAP9_B 0x399
56#define ARCH_REVISION_CAP9_C 0x601
57
58static inline unsigned long at91cap9_rev_identify(void)
59{
60 return (at91_sys_read(AT91_PMC_VER));
61}
62#endif
52 63
53#ifdef CONFIG_ARCH_AT91RM9200 64#ifdef CONFIG_ARCH_AT91RM9200
54#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) 65#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
@@ -90,8 +101,12 @@ static inline unsigned long at91_arch_identify(void)
90 101
91#ifdef CONFIG_ARCH_AT91CAP9 102#ifdef CONFIG_ARCH_AT91CAP9
92#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9) 103#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9)
104#define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
105#define cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
93#else 106#else
94#define cpu_is_at91cap9() (0) 107#define cpu_is_at91cap9() (0)
108#define cpu_is_at91cap9_revB() (0)
109#define cpu_is_at91cap9_revC() (0)
95#endif 110#endif
96 111
97/* 112/*
diff --git a/arch/arm/mach-at91/include/mach/dma.h b/arch/arm/mach-at91/include/mach/dma.h
deleted file mode 100644
index e4f90c177616..000000000000
--- a/arch/arm/mach-at91/include/mach/dma.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/dma.h
3 *
4 * Copyright (C) 2003 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 1611bd03f528..0b0cccc46e68 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -23,8 +23,8 @@
23 23
24#define IO_SPACE_LIMIT 0xFFFFFFFF 24#define IO_SPACE_LIMIT 0xFFFFFFFF
25 25
26#define __io(a) ((void __iomem *)(a)) 26#define __io(a) __typesafe_io(a)
27#define __mem_pci(a) (a) 27#define __mem_pci(a) (a)
28 28
29 29
30#ifndef __ASSEMBLY__ 30#ifndef __ASSEMBLY__
diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h
index 9dd1b8c79b08..14f4ef4b6a9e 100644
--- a/arch/arm/mach-at91/include/mach/memory.h
+++ b/arch/arm/mach-at91/include/mach/memory.h
@@ -25,15 +25,4 @@
25 25
26#define PHYS_OFFSET (AT91_SDRAM_BASE) 26#define PHYS_OFFSET (AT91_SDRAM_BASE)
27 27
28
29/*
30 * Virtual view <-> DMA view memory address translations
31 * virt_to_bus: Used to translate the virtual address to an
32 * address suitable to be passed to set_dma_addr
33 * bus_to_virt: Used to convert an address for DMA operations
34 * to an address that the kernel can use.
35 */
36#define __virt_to_bus(x) __virt_to_phys(x)
37#define __bus_to_virt(x) __phys_to_virt(x)
38
39#endif 28#endif
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
new file mode 100644
index 000000000000..5eab6aa621d0
--- /dev/null
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -0,0 +1,47 @@
1/*
2 * linux/arch/arm/mach-at91/sam9_smc.c
3 *
4 * Copyright (C) 2008 Andrew Victor
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/io.h>
13
14#include <mach/at91sam9_smc.h>
15
16#include "sam9_smc.h"
17
18void __init sam9_smc_configure(int cs, struct sam9_smc_config* config)
19{
20 /* Setup register */
21 at91_sys_write(AT91_SMC_SETUP(cs),
22 AT91_SMC_NWESETUP_(config->nwe_setup)
23 | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
24 | AT91_SMC_NRDSETUP_(config->nrd_setup)
25 | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup)
26 );
27
28 /* Pulse register */
29 at91_sys_write(AT91_SMC_PULSE(cs),
30 AT91_SMC_NWEPULSE_(config->nwe_pulse)
31 | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
32 | AT91_SMC_NRDPULSE_(config->nrd_pulse)
33 | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse)
34 );
35
36 /* Cycle register */
37 at91_sys_write(AT91_SMC_CYCLE(cs),
38 AT91_SMC_NWECYCLE_(config->write_cycle)
39 | AT91_SMC_NRDCYCLE_(config->read_cycle)
40 );
41
42 /* Mode register */
43 at91_sys_write(AT91_SMC_MODE(cs),
44 config->mode
45 | AT91_SMC_TDF_(config->tdf_cycles)
46 );
47}
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
new file mode 100644
index 000000000000..bf72cfb3455b
--- /dev/null
+++ b/arch/arm/mach-at91/sam9_smc.h
@@ -0,0 +1,33 @@
1/*
2 * linux/arch/arm/mach-at91/sam9_smc.
3 *
4 * Copyright (C) 2008 Andrew Victor
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11struct sam9_smc_config {
12 /* Setup register */
13 u8 ncs_read_setup;
14 u8 nrd_setup;
15 u8 ncs_write_setup;
16 u8 nwe_setup;
17
18 /* Pulse register */
19 u8 ncs_read_pulse;
20 u8 nrd_pulse;
21 u8 ncs_write_pulse;
22 u8 nwe_pulse;
23
24 /* Cycle register */
25 u16 read_cycle;
26 u16 write_cycle;
27
28 /* Mode register */
29 u32 mode;
30 u8 tdf_cycles:4;
31};
32
33extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config);
diff --git a/arch/arm/mach-clps711x/include/mach/dma.h b/arch/arm/mach-clps711x/include/mach/dma.h
deleted file mode 100644
index 0d620e869536..000000000000
--- a/arch/arm/mach-clps711x/include/mach/dma.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-clps711x/include/mach/dma.h
3 *
4 * Copyright (C) 1997,1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
diff --git a/arch/arm/mach-clps711x/include/mach/io.h b/arch/arm/mach-clps711x/include/mach/io.h
index 4c8440087679..2e0b3ced8f07 100644
--- a/arch/arm/mach-clps711x/include/mach/io.h
+++ b/arch/arm/mach-clps711x/include/mach/io.h
@@ -20,12 +20,10 @@
20#ifndef __ASM_ARM_ARCH_IO_H 20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H 21#define __ASM_ARM_ARCH_IO_H
22 22
23#include <mach/hardware.h>
24
25#define IO_SPACE_LIMIT 0xffffffff 23#define IO_SPACE_LIMIT 0xffffffff
26 24
27#define __io(a) ((void __iomem *)(a)) 25#define __io(a) __typesafe_io(a)
28#define __mem_pci(a) (a) 26#define __mem_pci(a) (a)
29 27
30/* 28/*
31 * We don't support ins[lb]/outs[lb]. Make them fault. 29 * We don't support ins[lb]/outs[lb]. Make them fault.
diff --git a/arch/arm/mach-clps711x/include/mach/memory.h b/arch/arm/mach-clps711x/include/mach/memory.h
index 98ec30c97bbe..e522b20bcbc2 100644
--- a/arch/arm/mach-clps711x/include/mach/memory.h
+++ b/arch/arm/mach-clps711x/include/mach/memory.h
@@ -26,25 +26,7 @@
26 */ 26 */
27#define PHYS_OFFSET UL(0xc0000000) 27#define PHYS_OFFSET UL(0xc0000000)
28 28
29/* 29#if !defined(CONFIG_ARCH_CDB89712) && !defined (CONFIG_ARCH_AUTCPU12)
30 * Virtual view <-> DMA view memory address translations
31 * virt_to_bus: Used to translate the virtual address to an
32 * address suitable to be passed to set_dma_addr
33 * bus_to_virt: Used to convert an address for DMA operations
34 * to an address that the kernel can use.
35 */
36
37#if defined(CONFIG_ARCH_CDB89712)
38
39#define __virt_to_bus(x) (x)
40#define __bus_to_virt(x) (x)
41
42#elif defined (CONFIG_ARCH_AUTCPU12)
43
44#define __virt_to_bus(x) (x)
45#define __bus_to_virt(x) (x)
46
47#else
48 30
49#define __virt_to_bus(x) ((x) - PAGE_OFFSET) 31#define __virt_to_bus(x) ((x) - PAGE_OFFSET)
50#define __bus_to_virt(x) ((x) + PAGE_OFFSET) 32#define __bus_to_virt(x) ((x) + PAGE_OFFSET)
diff --git a/arch/arm/mach-clps7500/Makefile b/arch/arm/mach-clps7500/Makefile
deleted file mode 100644
index 4bd8ebd70e7b..000000000000
--- a/arch/arm/mach-clps7500/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Object file lists.
6
7obj-y := core.o
8obj-m :=
9obj-n :=
10obj- :=
11
diff --git a/arch/arm/mach-clps7500/Makefile.boot b/arch/arm/mach-clps7500/Makefile.boot
deleted file mode 100644
index fe16506c1540..000000000000
--- a/arch/arm/mach-clps7500/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
1 zreladdr-y := 0x10008000
2
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
deleted file mode 100644
index 7e247c04d41c..000000000000
--- a/arch/arm/mach-clps7500/core.c
+++ /dev/null
@@ -1,395 +0,0 @@
1/*
2 * linux/arch/arm/mach-clps7500/core.c
3 *
4 * Copyright (C) 1998 Russell King
5 * Copyright (C) 1999 Nexus Electronics Ltd
6 *
7 * Extra MM routines for CL7500 architecture
8 */
9#include <linux/kernel.h>
10#include <linux/types.h>
11#include <linux/interrupt.h>
12#include <linux/irq.h>
13#include <linux/list.h>
14#include <linux/sched.h>
15#include <linux/init.h>
16#include <linux/device.h>
17#include <linux/serial_8250.h>
18#include <linux/io.h>
19
20#include <asm/mach/arch.h>
21#include <asm/mach/map.h>
22#include <asm/mach/irq.h>
23#include <asm/mach/time.h>
24
25#include <mach/hardware.h>
26#include <asm/hardware/iomd.h>
27#include <asm/irq.h>
28#include <asm/mach-types.h>
29
30unsigned int vram_size;
31
32static void cl7500_ack_irq_a(unsigned int irq)
33{
34 unsigned int val, mask;
35
36 mask = 1 << irq;
37 val = iomd_readb(IOMD_IRQMASKA);
38 iomd_writeb(val & ~mask, IOMD_IRQMASKA);
39 iomd_writeb(mask, IOMD_IRQCLRA);
40}
41
42static void cl7500_mask_irq_a(unsigned int irq)
43{
44 unsigned int val, mask;
45
46 mask = 1 << irq;
47 val = iomd_readb(IOMD_IRQMASKA);
48 iomd_writeb(val & ~mask, IOMD_IRQMASKA);
49}
50
51static void cl7500_unmask_irq_a(unsigned int irq)
52{
53 unsigned int val, mask;
54
55 mask = 1 << irq;
56 val = iomd_readb(IOMD_IRQMASKA);
57 iomd_writeb(val | mask, IOMD_IRQMASKA);
58}
59
60static struct irq_chip clps7500_a_chip = {
61 .ack = cl7500_ack_irq_a,
62 .mask = cl7500_mask_irq_a,
63 .unmask = cl7500_unmask_irq_a,
64};
65
66static void cl7500_mask_irq_b(unsigned int irq)
67{
68 unsigned int val, mask;
69
70 mask = 1 << (irq & 7);
71 val = iomd_readb(IOMD_IRQMASKB);
72 iomd_writeb(val & ~mask, IOMD_IRQMASKB);
73}
74
75static void cl7500_unmask_irq_b(unsigned int irq)
76{
77 unsigned int val, mask;
78
79 mask = 1 << (irq & 7);
80 val = iomd_readb(IOMD_IRQMASKB);
81 iomd_writeb(val | mask, IOMD_IRQMASKB);
82}
83
84static struct irq_chip clps7500_b_chip = {
85 .ack = cl7500_mask_irq_b,
86 .mask = cl7500_mask_irq_b,
87 .unmask = cl7500_unmask_irq_b,
88};
89
90static void cl7500_mask_irq_c(unsigned int irq)
91{
92 unsigned int val, mask;
93
94 mask = 1 << (irq & 7);
95 val = iomd_readb(IOMD_IRQMASKC);
96 iomd_writeb(val & ~mask, IOMD_IRQMASKC);
97}
98
99static void cl7500_unmask_irq_c(unsigned int irq)
100{
101 unsigned int val, mask;
102
103 mask = 1 << (irq & 7);
104 val = iomd_readb(IOMD_IRQMASKC);
105 iomd_writeb(val | mask, IOMD_IRQMASKC);
106}
107
108static struct irq_chip clps7500_c_chip = {
109 .ack = cl7500_mask_irq_c,
110 .mask = cl7500_mask_irq_c,
111 .unmask = cl7500_unmask_irq_c,
112};
113
114static void cl7500_mask_irq_d(unsigned int irq)
115{
116 unsigned int val, mask;
117
118 mask = 1 << (irq & 7);
119 val = iomd_readb(IOMD_IRQMASKD);
120 iomd_writeb(val & ~mask, IOMD_IRQMASKD);
121}
122
123static void cl7500_unmask_irq_d(unsigned int irq)
124{
125 unsigned int val, mask;
126
127 mask = 1 << (irq & 7);
128 val = iomd_readb(IOMD_IRQMASKD);
129 iomd_writeb(val | mask, IOMD_IRQMASKD);
130}
131
132static struct irq_chip clps7500_d_chip = {
133 .ack = cl7500_mask_irq_d,
134 .mask = cl7500_mask_irq_d,
135 .unmask = cl7500_unmask_irq_d,
136};
137
138static void cl7500_mask_irq_dma(unsigned int irq)
139{
140 unsigned int val, mask;
141
142 mask = 1 << (irq & 7);
143 val = iomd_readb(IOMD_DMAMASK);
144 iomd_writeb(val & ~mask, IOMD_DMAMASK);
145}
146
147static void cl7500_unmask_irq_dma(unsigned int irq)
148{
149 unsigned int val, mask;
150
151 mask = 1 << (irq & 7);
152 val = iomd_readb(IOMD_DMAMASK);
153 iomd_writeb(val | mask, IOMD_DMAMASK);
154}
155
156static struct irq_chip clps7500_dma_chip = {
157 .ack = cl7500_mask_irq_dma,
158 .mask = cl7500_mask_irq_dma,
159 .unmask = cl7500_unmask_irq_dma,
160};
161
162static void cl7500_mask_irq_fiq(unsigned int irq)
163{
164 unsigned int val, mask;
165
166 mask = 1 << (irq & 7);
167 val = iomd_readb(IOMD_FIQMASK);
168 iomd_writeb(val & ~mask, IOMD_FIQMASK);
169}
170
171static void cl7500_unmask_irq_fiq(unsigned int irq)
172{
173 unsigned int val, mask;
174
175 mask = 1 << (irq & 7);
176 val = iomd_readb(IOMD_FIQMASK);
177 iomd_writeb(val | mask, IOMD_FIQMASK);
178}
179
180static struct irq_chip clps7500_fiq_chip = {
181 .ack = cl7500_mask_irq_fiq,
182 .mask = cl7500_mask_irq_fiq,
183 .unmask = cl7500_unmask_irq_fiq,
184};
185
186static void cl7500_no_action(unsigned int irq)
187{
188}
189
190static struct irq_chip clps7500_no_chip = {
191 .ack = cl7500_no_action,
192 .mask = cl7500_no_action,
193 .unmask = cl7500_no_action,
194};
195
196static struct irqaction irq_isa = {
197 .handler = no_action,
198 .mask = CPU_MASK_NONE,
199 .name = "isa",
200};
201
202static void __init clps7500_init_irq(void)
203{
204 unsigned int irq, flags;
205
206 iomd_writeb(0, IOMD_IRQMASKA);
207 iomd_writeb(0, IOMD_IRQMASKB);
208 iomd_writeb(0, IOMD_FIQMASK);
209 iomd_writeb(0, IOMD_DMAMASK);
210
211 for (irq = 0; irq < NR_IRQS; irq++) {
212 flags = IRQF_VALID;
213
214 if (irq <= 6 || (irq >= 9 && irq <= 15) ||
215 (irq >= 48 && irq <= 55))
216 flags |= IRQF_PROBE;
217
218 switch (irq) {
219 case 0 ... 7:
220 set_irq_chip(irq, &clps7500_a_chip);
221 set_irq_handler(irq, handle_level_irq);
222 set_irq_flags(irq, flags);
223 break;
224
225 case 8 ... 15:
226 set_irq_chip(irq, &clps7500_b_chip);
227 set_irq_handler(irq, handle_level_irq);
228 set_irq_flags(irq, flags);
229 break;
230
231 case 16 ... 22:
232 set_irq_chip(irq, &clps7500_dma_chip);
233 set_irq_handler(irq, handle_level_irq);
234 set_irq_flags(irq, flags);
235 break;
236
237 case 24 ... 31:
238 set_irq_chip(irq, &clps7500_c_chip);
239 set_irq_handler(irq, handle_level_irq);
240 set_irq_flags(irq, flags);
241 break;
242
243 case 40 ... 47:
244 set_irq_chip(irq, &clps7500_d_chip);
245 set_irq_handler(irq, handle_level_irq);
246 set_irq_flags(irq, flags);
247 break;
248
249 case 48 ... 55:
250 set_irq_chip(irq, &clps7500_no_chip);
251 set_irq_handler(irq, handle_level_irq);
252 set_irq_flags(irq, flags);
253 break;
254
255 case 64 ... 72:
256 set_irq_chip(irq, &clps7500_fiq_chip);
257 set_irq_handler(irq, handle_level_irq);
258 set_irq_flags(irq, flags);
259 break;
260 }
261 }
262
263 setup_irq(IRQ_ISA, &irq_isa);
264}
265
266static struct map_desc cl7500_io_desc[] __initdata = {
267 { /* IO space */
268 .virtual = (unsigned long)IO_BASE,
269 .pfn = __phys_to_pfn(IO_START),
270 .length = IO_SIZE,
271 .type = MT_DEVICE
272 }, { /* ISA space */
273 .virtual = ISA_BASE,
274 .pfn = __phys_to_pfn(ISA_START),
275 .length = ISA_SIZE,
276 .type = MT_DEVICE
277 }, { /* Flash */
278 .virtual = CLPS7500_FLASH_BASE,
279 .pfn = __phys_to_pfn(CLPS7500_FLASH_START),
280 .length = CLPS7500_FLASH_SIZE,
281 .type = MT_DEVICE
282 }, { /* LED */
283 .virtual = LED_BASE,
284 .pfn = __phys_to_pfn(LED_START),
285 .length = LED_SIZE,
286 .type = MT_DEVICE
287 }
288};
289
290static void __init clps7500_map_io(void)
291{
292 iotable_init(cl7500_io_desc, ARRAY_SIZE(cl7500_io_desc));
293}
294
295extern void ioctime_init(void);
296extern unsigned long ioc_timer_gettimeoffset(void);
297
298static irqreturn_t
299clps7500_timer_interrupt(int irq, void *dev_id)
300{
301 timer_tick();
302
303 /* Why not using do_leds interface?? */
304 {
305 /* Twinkle the lights. */
306 static int count, state = 0xff00;
307 if (count-- == 0) {
308 state ^= 0x100;
309 count = 25;
310 *((volatile unsigned int *)LED_ADDRESS) = state;
311 }
312 }
313
314 return IRQ_HANDLED;
315}
316
317static struct irqaction clps7500_timer_irq = {
318 .name = "CLPS7500 Timer Tick",
319 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
320 .handler = clps7500_timer_interrupt,
321};
322
323/*
324 * Set up timer interrupt.
325 */
326static void __init clps7500_timer_init(void)
327{
328 ioctime_init();
329 setup_irq(IRQ_TIMER, &clps7500_timer_irq);
330}
331
332static struct sys_timer clps7500_timer = {
333 .init = clps7500_timer_init,
334 .offset = ioc_timer_gettimeoffset,
335};
336
337static struct plat_serial8250_port serial_platform_data[] = {
338 {
339 .mapbase = 0x03010fe0,
340 .irq = 10,
341 .uartclk = 1843200,
342 .regshift = 2,
343 .iotype = UPIO_MEM,
344 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
345 },
346 {
347 .mapbase = 0x03010be0,
348 .irq = 0,
349 .uartclk = 1843200,
350 .regshift = 2,
351 .iotype = UPIO_MEM,
352 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
353 },
354 {
355 .iobase = ISASLOT_IO + 0x2e8,
356 .irq = 41,
357 .uartclk = 1843200,
358 .regshift = 0,
359 .iotype = UPIO_PORT,
360 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
361 },
362 {
363 .iobase = ISASLOT_IO + 0x3e8,
364 .irq = 40,
365 .uartclk = 1843200,
366 .regshift = 0,
367 .iotype = UPIO_PORT,
368 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
369 },
370 { },
371};
372
373static struct platform_device serial_device = {
374 .name = "serial8250",
375 .id = PLAT8250_DEV_PLATFORM,
376 .dev = {
377 .platform_data = serial_platform_data,
378 },
379};
380
381static void __init clps7500_init(void)
382{
383 platform_device_register(&serial_device);
384}
385
386MACHINE_START(CLPS7500, "CL-PS7500")
387 /* Maintainer: Philip Blundell */
388 .phys_io = 0x03000000,
389 .io_pg_offst = ((0xe0000000) >> 18) & 0xfffc,
390 .map_io = clps7500_map_io,
391 .init_irq = clps7500_init_irq,
392 .init_machine = clps7500_init,
393 .timer = &clps7500_timer,
394MACHINE_END
395
diff --git a/arch/arm/mach-clps7500/include/mach/acornfb.h b/arch/arm/mach-clps7500/include/mach/acornfb.h
deleted file mode 100644
index aea6330c9745..000000000000
--- a/arch/arm/mach-clps7500/include/mach/acornfb.h
+++ /dev/null
@@ -1,33 +0,0 @@
1#define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119)
2
3static inline void
4acornfb_vidc20_find_rates(struct vidc_timing *vidc,
5 struct fb_var_screeninfo *var)
6{
7 u_int bandwidth;
8
9 vidc->control |= VIDC20_CTRL_PIX_CK;
10
11 /* Calculate bandwidth */
12 bandwidth = var->pixclock * 8 / var->bits_per_pixel;
13
14 /* Encode bandwidth as VIDC20 setting */
15 if (bandwidth > 16667*2)
16 vidc->control |= VIDC20_CTRL_FIFO_16;
17 else if (bandwidth > 13333*2)
18 vidc->control |= VIDC20_CTRL_FIFO_20;
19 else if (bandwidth > 11111*2)
20 vidc->control |= VIDC20_CTRL_FIFO_24;
21 else
22 vidc->control |= VIDC20_CTRL_FIFO_28;
23
24 vidc->pll_ctl = 0x2020;
25}
26
27#ifdef CONFIG_CHRONTEL_7003
28#define acornfb_default_control() VIDC20_CTRL_PIX_HCLK
29#else
30#define acornfb_default_control() VIDC20_CTRL_PIX_VCLK
31#endif
32
33#define acornfb_default_econtrol() VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK
diff --git a/arch/arm/mach-clps7500/include/mach/debug-macro.S b/arch/arm/mach-clps7500/include/mach/debug-macro.S
deleted file mode 100644
index af4104e7e84a..000000000000
--- a/arch/arm/mach-clps7500/include/mach/debug-macro.S
+++ /dev/null
@@ -1,21 +0,0 @@
1/* arch/arm/mach-clps7500/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14 .macro addruart,rx
15 mov \rx, #0xe0000000
16 orr \rx, \rx, #0x00010000
17 orr \rx, \rx, #0x00000be0
18 .endm
19
20#define UART_SHIFT 2
21#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-clps7500/include/mach/dma.h b/arch/arm/mach-clps7500/include/mach/dma.h
deleted file mode 100644
index 63fcde505498..000000000000
--- a/arch/arm/mach-clps7500/include/mach/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/dma.h
3 *
4 * Copyright (C) 1999 Nexus Electronics Ltd.
5 */
6
7#ifndef __ASM_ARCH_DMA_H
8#define __ASM_ARCH_DMA_H
9
10/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
11
12/*
13 * This is the maximum DMA address that can be DMAd to.
14 * There should not be more than (0xd0000000 - 0xc0000000)
15 * bytes of RAM.
16 */
17#define MAX_DMA_ADDRESS 0xd0000000
18
19#define DMA_S0 0
20
21#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-clps7500/include/mach/entry-macro.S b/arch/arm/mach-clps7500/include/mach/entry-macro.S
deleted file mode 100644
index 4e7e54144093..000000000000
--- a/arch/arm/mach-clps7500/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
1#include <mach/hardware.h>
2#include <asm/hardware/entry-macro-iomd.S>
3
4 .equ ioc_base_high, IOC_BASE & 0xff000000
5 .equ ioc_base_low, IOC_BASE & 0x00ff0000
6
7 .macro get_irqnr_preamble, base, tmp
8 mov \base, #ioc_base_high @ point at IOC
9 .if ioc_base_low
10 orr \base, \base, #ioc_base_low
11 .endif
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
16
diff --git a/arch/arm/mach-clps7500/include/mach/hardware.h b/arch/arm/mach-clps7500/include/mach/hardware.h
deleted file mode 100644
index a6ad1d44badf..000000000000
--- a/arch/arm/mach-clps7500/include/mach/hardware.h
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/hardware.h
3 *
4 * Copyright (C) 1996-1999 Russell King.
5 * Copyright (C) 1999 Nexus Electronics Ltd.
6 *
7 * This file contains the hardware definitions of the
8 * CL7500 evaluation board.
9 */
10#ifndef __ASM_ARCH_HARDWARE_H
11#define __ASM_ARCH_HARDWARE_H
12
13#include <mach/memory.h>
14#include <asm/hardware/iomd.h>
15
16#ifdef __ASSEMBLY__
17#define IOMEM(x) x
18#else
19#define IOMEM(x) ((void __iomem *)(x))
20#endif
21
22/*
23 * What hardware must be present
24 */
25#define HAS_IOMD
26#define HAS_VIDC20
27
28/* Hardware addresses of major areas.
29 * *_START is the physical address
30 * *_SIZE is the size of the region
31 * *_BASE is the virtual address
32 */
33
34#define IO_START 0x03000000 /* I/O */
35#define IO_SIZE 0x01000000
36#define IO_BASE IOMEM(0xe0000000)
37
38#define ISA_START 0x0c000000 /* ISA */
39#define ISA_SIZE 0x00010000
40#define ISA_BASE 0xe1000000
41
42#define CLPS7500_FLASH_START 0x01000000 /* XXX */
43#define CLPS7500_FLASH_SIZE 0x01000000
44#define CLPS7500_FLASH_BASE 0xe2000000
45
46#define LED_START 0x0302B000
47#define LED_SIZE 0x00001000
48#define LED_BASE 0xe3000000
49#define LED_ADDRESS (LED_BASE + 0xa00)
50
51/* Let's define SCREEN_START for CL7500, even though it's a lie. */
52#define SCREEN_START 0x02000000 /* VRAM */
53#define SCREEN_END 0xdfc00000
54#define SCREEN_BASE 0xdf800000
55
56#define VIDC_BASE (void __iomem *)0xe0400000
57#define IOMD_BASE IOMEM(0xe0200000)
58#define IOC_BASE IOMEM(0xe0200000)
59#define FLOPPYDMA_BASE IOMEM(0xe002a000)
60#define PCIO_BASE IOMEM(0xe0010000)
61
62#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
63
64/* in/out bias for the ISA slot region */
65#define ISASLOT_IO 0x80400000
66
67#endif
diff --git a/arch/arm/mach-clps7500/include/mach/io.h b/arch/arm/mach-clps7500/include/mach/io.h
deleted file mode 100644
index 2ff2860889ed..000000000000
--- a/arch/arm/mach-clps7500/include/mach/io.h
+++ /dev/null
@@ -1,255 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/io.h
3 * from arch/arm/mach-rpc/include/mach/io.h
4 *
5 * Copyright (C) 1997 Russell King
6 *
7 * Modifications:
8 * 06-Dec-1997 RMK Created.
9 */
10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H
12
13#include <mach/hardware.h>
14
15#define IO_SPACE_LIMIT 0xffffffff
16
17/*
18 * GCC is totally crap at loading/storing data. We try to persuade it
19 * to do the right thing by using these whereever possible instead of
20 * the above.
21 */
22#define __arch_base_getb(b,o) \
23 ({ \
24 unsigned int v, r = (b); \
25 __asm__ __volatile__( \
26 "ldrb %0, [%1, %2]" \
27 : "=r" (v) \
28 : "r" (r), "Ir" (o)); \
29 v; \
30 })
31
32#define __arch_base_getl(b,o) \
33 ({ \
34 unsigned int v, r = (b); \
35 __asm__ __volatile__( \
36 "ldr %0, [%1, %2]" \
37 : "=r" (v) \
38 : "r" (r), "Ir" (o)); \
39 v; \
40 })
41
42#define __arch_base_putb(v,b,o) \
43 ({ \
44 unsigned int r = (b); \
45 __asm__ __volatile__( \
46 "strb %0, [%1, %2]" \
47 : \
48 : "r" (v), "r" (r), "Ir" (o)); \
49 })
50
51#define __arch_base_putl(v,b,o) \
52 ({ \
53 unsigned int r = (b); \
54 __asm__ __volatile__( \
55 "str %0, [%1, %2]" \
56 : \
57 : "r" (v), "r" (r), "Ir" (o)); \
58 })
59
60/*
61 * We use two different types of addressing - PC style addresses, and ARM
62 * addresses. PC style accesses the PC hardware with the normal PC IO
63 * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
64 * and are translated to the start of IO. Note that all addresses are
65 * shifted left!
66 */
67#define __PORT_PCIO(x) (!((x) & 0x80000000))
68
69/*
70 * Dynamic IO functions - let the compiler
71 * optimize the expressions
72 */
73static inline void __outb (unsigned int value, unsigned int port)
74{
75 unsigned long temp;
76 __asm__ __volatile__(
77 "tst %2, #0x80000000\n\t"
78 "mov %0, %4\n\t"
79 "addeq %0, %0, %3\n\t"
80 "strb %1, [%0, %2, lsl #2] @ outb"
81 : "=&r" (temp)
82 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
83 : "cc");
84}
85
86static inline void __outw (unsigned int value, unsigned int port)
87{
88 unsigned long temp;
89 __asm__ __volatile__(
90 "tst %2, #0x80000000\n\t"
91 "mov %0, %4\n\t"
92 "addeq %0, %0, %3\n\t"
93 "str %1, [%0, %2, lsl #2] @ outw"
94 : "=&r" (temp)
95 : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
96 : "cc");
97}
98
99static inline void __outl (unsigned int value, unsigned int port)
100{
101 unsigned long temp;
102 __asm__ __volatile__(
103 "tst %2, #0x80000000\n\t"
104 "mov %0, %4\n\t"
105 "addeq %0, %0, %3\n\t"
106 "str %1, [%0, %2, lsl #2] @ outl"
107 : "=&r" (temp)
108 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
109 : "cc");
110}
111
112#define DECLARE_DYN_IN(sz,fnsuffix,instr) \
113static inline unsigned sz __in##fnsuffix (unsigned int port) \
114{ \
115 unsigned long temp, value; \
116 __asm__ __volatile__( \
117 "tst %2, #0x80000000\n\t" \
118 "mov %0, %4\n\t" \
119 "addeq %0, %0, %3\n\t" \
120 "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \
121 : "=&r" (temp), "=r" (value) \
122 : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
123 : "cc"); \
124 return (unsigned sz)value; \
125}
126
127static inline unsigned int __ioaddr (unsigned int port) \
128{ \
129 if (__PORT_PCIO(port)) \
130 return (unsigned int)(PCIO_BASE + (port << 2)); \
131 else \
132 return (unsigned int)(IO_BASE + (port << 2)); \
133}
134
135#define DECLARE_IO(sz,fnsuffix,instr) \
136 DECLARE_DYN_IN(sz,fnsuffix,instr)
137
138DECLARE_IO(char,b,"b")
139DECLARE_IO(short,w,"")
140DECLARE_IO(int,l,"")
141
142#undef DECLARE_IO
143#undef DECLARE_DYN_IN
144
145/*
146 * Constant address IO functions
147 *
148 * These have to be macros for the 'J' constraint to work -
149 * +/-4096 immediate operand.
150 */
151#define __outbc(value,port) \
152({ \
153 if (__PORT_PCIO((port))) \
154 __asm__ __volatile__( \
155 "strb %0, [%1, %2] @ outbc" \
156 : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
157 else \
158 __asm__ __volatile__( \
159 "strb %0, [%1, %2] @ outbc" \
160 : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \
161})
162
163#define __inbc(port) \
164({ \
165 unsigned char result; \
166 if (__PORT_PCIO((port))) \
167 __asm__ __volatile__( \
168 "ldrb %0, [%1, %2] @ inbc" \
169 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
170 else \
171 __asm__ __volatile__( \
172 "ldrb %0, [%1, %2] @ inbc" \
173 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
174 result; \
175})
176
177#define __outwc(value,port) \
178({ \
179 unsigned long v = value; \
180 if (__PORT_PCIO((port))) \
181 __asm__ __volatile__( \
182 "str %0, [%1, %2] @ outwc" \
183 : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
184 else \
185 __asm__ __volatile__( \
186 "str %0, [%1, %2] @ outwc" \
187 : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \
188})
189
190#define __inwc(port) \
191({ \
192 unsigned short result; \
193 if (__PORT_PCIO((port))) \
194 __asm__ __volatile__( \
195 "ldr %0, [%1, %2] @ inwc" \
196 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
197 else \
198 __asm__ __volatile__( \
199 "ldr %0, [%1, %2] @ inwc" \
200 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
201 result & 0xffff; \
202})
203
204#define __outlc(value,port) \
205({ \
206 unsigned long v = value; \
207 if (__PORT_PCIO((port))) \
208 __asm__ __volatile__( \
209 "str %0, [%1, %2] @ outlc" \
210 : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
211 else \
212 __asm__ __volatile__( \
213 "str %0, [%1, %2] @ outlc" \
214 : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \
215})
216
217#define __inlc(port) \
218({ \
219 unsigned long result; \
220 if (__PORT_PCIO((port))) \
221 __asm__ __volatile__( \
222 "ldr %0, [%1, %2] @ inlc" \
223 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
224 else \
225 __asm__ __volatile__( \
226 "ldr %0, [%1, %2] @ inlc" \
227 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
228 result; \
229})
230
231#define __ioaddrc(port) \
232 (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2))
233
234#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
235#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
236#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
237#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
238#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
239#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
240#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))
241/* the following macro is deprecated */
242#define ioaddr(port) __ioaddr((port))
243
244#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)
245#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)
246
247#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l)
248#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
249
250/*
251 * 1:1 mapping for ioremapped regions.
252 */
253#define __mem_pci(x) (x)
254
255#endif
diff --git a/arch/arm/mach-clps7500/include/mach/irq.h b/arch/arm/mach-clps7500/include/mach/irq.h
deleted file mode 100644
index d02fcf28ee05..000000000000
--- a/arch/arm/mach-clps7500/include/mach/irq.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/irq.h
3 *
4 * Copyright (C) 1996 Russell King
5 * Copyright (C) 1999, 2001 Nexus Electronics Ltd.
6 *
7 * Changelog:
8 * 10-10-1996 RMK Brought up to date with arch-sa110eval
9 * 22-08-1998 RMK Restructured IRQ routines
10 * 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code
11 */
12
13#include <linux/io.h>
14#include <asm/hardware/iomd.h>
15
16static inline int fixup_irq(unsigned int irq)
17{
18 if (irq == IRQ_ISA) {
19 int isabits = *((volatile unsigned int *)0xe002b700);
20 if (isabits == 0) {
21 printk("Spurious ISA IRQ!\n");
22 return irq;
23 }
24 irq = IRQ_ISA_BASE;
25 while (!(isabits & 1)) {
26 irq++;
27 isabits >>= 1;
28 }
29 }
30
31 return irq;
32}
diff --git a/arch/arm/mach-clps7500/include/mach/irqs.h b/arch/arm/mach-clps7500/include/mach/irqs.h
deleted file mode 100644
index bee66b487f59..000000000000
--- a/arch/arm/mach-clps7500/include/mach/irqs.h
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/irqs.h
3 *
4 * Copyright (C) 1999 Nexus Electronics Ltd
5 */
6
7#define IRQ_INT2 0
8#define IRQ_INT1 2
9#define IRQ_VSYNCPULSE 3
10#define IRQ_POWERON 4
11#define IRQ_TIMER0 5
12#define IRQ_TIMER1 6
13#define IRQ_FORCE 7
14#define IRQ_INT8 8
15#define IRQ_ISA 9
16#define IRQ_INT6 10
17#define IRQ_INT5 11
18#define IRQ_INT4 12
19#define IRQ_INT3 13
20#define IRQ_KEYBOARDTX 14
21#define IRQ_KEYBOARDRX 15
22
23#define IRQ_DMA0 16
24#define IRQ_DMA1 17
25#define IRQ_DMA2 18
26#define IRQ_DMA3 19
27#define IRQ_DMAS0 20
28#define IRQ_DMAS1 21
29
30#define IRQ_IOP0 24
31#define IRQ_IOP1 25
32#define IRQ_IOP2 26
33#define IRQ_IOP3 27
34#define IRQ_IOP4 28
35#define IRQ_IOP5 29
36#define IRQ_IOP6 30
37#define IRQ_IOP7 31
38
39#define IRQ_MOUSERX 40
40#define IRQ_MOUSETX 41
41#define IRQ_ADC 42
42#define IRQ_EVENT1 43
43#define IRQ_EVENT2 44
44
45#define IRQ_ISA_BASE 48
46#define IRQ_ISA_3 48
47#define IRQ_ISA_4 49
48#define IRQ_ISA_5 50
49#define IRQ_ISA_7 51
50#define IRQ_ISA_9 52
51#define IRQ_ISA_10 53
52#define IRQ_ISA_11 54
53#define IRQ_ISA_14 55
54
55#define FIQ_INT9 0
56#define FIQ_INT5 1
57#define FIQ_INT6 4
58#define FIQ_INT8 6
59#define FIQ_FORCE 7
60
61/*
62 * This is the offset of the FIQ "IRQ" numbers
63 */
64#define FIQ_START 64
65
66#define IRQ_TIMER IRQ_TIMER0
diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h
deleted file mode 100644
index 87b32db470c8..000000000000
--- a/arch/arm/mach-clps7500/include/mach/memory.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/memory.h
3 *
4 * Copyright (c) 1996,1997,1998 Russell King.
5 *
6 * Changelog:
7 * 20-Oct-1996 RMK Created
8 * 31-Dec-1997 RMK Fixed definitions to reduce warnings
9 * 11-Jan-1998 RMK Uninlined to reduce hits on cache
10 * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt
11 * 21-Mar-1999 RMK Renamed to memory.h
12 * RMK Added TASK_SIZE and PAGE_OFFSET
13 */
14#ifndef __ASM_ARCH_MEMORY_H
15#define __ASM_ARCH_MEMORY_H
16
17/*
18 * Physical DRAM offset.
19 */
20#define PHYS_OFFSET UL(0x10000000)
21
22/*
23 * These are exactly the same on the RiscPC as the
24 * physical memory view.
25 */
26#define __virt_to_bus(x) __virt_to_phys(x)
27#define __bus_to_virt(x) __phys_to_virt(x)
28
29/*
30 * Cache flushing area - ROM
31 */
32#define FLUSH_BASE_PHYS 0x00000000
33#define FLUSH_BASE 0xdf000000
34
35/*
36 * Sparsemem support. Each section is a maximum of 64MB. The sections
37 * are offset by 128MB and can cover 128MB, so that gives us a maximum
38 * of 29 physmem bits.
39 */
40#define MAX_PHYSMEM_BITS 29
41#define SECTION_SIZE_BITS 26
42
43#endif
diff --git a/arch/arm/mach-clps7500/include/mach/system.h b/arch/arm/mach-clps7500/include/mach/system.h
deleted file mode 100644
index 6d325fbe8b08..000000000000
--- a/arch/arm/mach-clps7500/include/mach/system.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/system.h
3 *
4 * Copyright (c) 1999 Nexus Electronics Ltd.
5 */
6#ifndef __ASM_ARCH_SYSTEM_H
7#define __ASM_ARCH_SYSTEM_H
8
9#include <linux/io.h>
10#include <asm/hardware/iomd.h>
11
12static inline void arch_idle(void)
13{
14 iomd_writeb(0, IOMD_SUSMODE);
15}
16
17#define arch_reset(mode) \
18 do { \
19 iomd_writeb(0, IOMD_ROMCR0); \
20 cpu_reset(0); \
21 } while (0)
22
23#endif
diff --git a/arch/arm/mach-clps7500/include/mach/timex.h b/arch/arm/mach-clps7500/include/mach/timex.h
deleted file mode 100644
index dfaa9b425757..000000000000
--- a/arch/arm/mach-clps7500/include/mach/timex.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/timex.h
3 *
4 * CL7500 architecture timex specifications
5 *
6 * Copyright (C) 1999 Nexus Electronics Ltd
7 */
8
9/*
10 * On the ARM7500, the clock ticks at 2MHz.
11 */
12#define CLOCK_TICK_RATE 2000000
13
diff --git a/arch/arm/mach-clps7500/include/mach/uncompress.h b/arch/arm/mach-clps7500/include/mach/uncompress.h
deleted file mode 100644
index d7d0af4b49fc..000000000000
--- a/arch/arm/mach-clps7500/include/mach/uncompress.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/uncompress.h
3 *
4 * Copyright (C) 1999, 2000 Nexus Electronics Ltd.
5 */
6#define BASE 0x03010000
7#define SERBASE (BASE + (0x2f8 << 2))
8
9static inline void putc(char c)
10{
11 while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20))
12 barrier();
13
14 *((volatile unsigned int *)(SERBASE)) = c;
15}
16
17static inline void flush(void)
18{
19}
20
21static __inline__ void arch_decomp_setup(void)
22{
23 int baud = 3686400 / (9600 * 32);
24
25 *((volatile unsigned int *)(SERBASE + 0xC)) = 0x80;
26 *((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff;
27 *((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8;
28 *((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */
29 *((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */
30}
31
32/*
33 * nothing to do
34 */
35#define arch_decomp_wdog()
diff --git a/arch/arm/mach-clps7500/include/mach/vmalloc.h b/arch/arm/mach-clps7500/include/mach/vmalloc.h
deleted file mode 100644
index 8fc5406d1b6d..000000000000
--- a/arch/arm/mach-clps7500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/vmalloc.h
3 */
4#define VMALLOC_END (PAGE_OFFSET + 0x1c000000)
diff --git a/arch/arm/mach-davinci/include/mach/dma.h b/arch/arm/mach-davinci/include/mach/dma.h
deleted file mode 100644
index 8e2f2d0ba667..000000000000
--- a/arch/arm/mach-davinci/include/mach/dma.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * DaVinci DMA definitions
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H
13
14#define MAX_DMA_ADDRESS 0xffffffff
15
16#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index b78ee9140496..a48795fd2417 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -29,8 +29,7 @@
29 * We don't actually have real ISA nor PCI buses, but there is so many 29 * We don't actually have real ISA nor PCI buses, but there is so many
30 * drivers out there that might just work if we fake them... 30 * drivers out there that might just work if we fake them...
31 */ 31 */
32#define PCIO_BASE 0 32#define __io(a) __typesafe_io(a)
33#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
34#define __mem_pci(a) (a) 33#define __mem_pci(a) (a)
35#define __mem_isa(a) (a) 34#define __mem_isa(a) (a)
36 35
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
index dd1625c23cf4..86c25c7f3ce3 100644
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ b/arch/arm/mach-davinci/include/mach/memory.h
@@ -52,13 +52,8 @@ __arch_adjust_zones(int node, unsigned long *size, unsigned long *holes)
52 if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes) 52 if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes)
53 53
54#define ISA_DMA_THRESHOLD (PHYS_OFFSET + (128<<20) - 1) 54#define ISA_DMA_THRESHOLD (PHYS_OFFSET + (128<<20) - 1)
55#define MAX_DMA_ADDRESS (PAGE_OFFSET + (128<<20))
55 56
56#endif 57#endif
57 58
58/*
59 * Bus address is physical address
60 */
61#define __virt_to_bus(x) __virt_to_phys(x)
62#define __bus_to_virt(x) __phys_to_virt(x)
63
64#endif /* __ASM_ARCH_MEMORY_H */ 59#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-davinci/include/mach/vmalloc.h b/arch/arm/mach-davinci/include/mach/vmalloc.h
index b98bd9e92fd6..ad51625b6609 100644
--- a/arch/arm/mach-davinci/include/mach/vmalloc.h
+++ b/arch/arm/mach-davinci/include/mach/vmalloc.h
@@ -8,7 +8,6 @@
8 * is licensed "as is" without any warranty of any kind, whether express 8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied. 9 * or implied.
10 */ 10 */
11#include <asm/memory.h>
12#include <mach/io.h> 11#include <mach/io.h>
13 12
14/* Allow vmalloc range until the IO virtual range minus a 2M "hole" */ 13/* Allow vmalloc range until the IO virtual range minus a 2M "hole" */
diff --git a/arch/arm/mach-ebsa110/include/mach/dma.h b/arch/arm/mach-ebsa110/include/mach/dma.h
deleted file mode 100644
index 780a04c8bbe9..000000000000
--- a/arch/arm/mach-ebsa110/include/mach/dma.h
+++ /dev/null
@@ -1,11 +0,0 @@
1/*
2 * arch/arm/mach-ebsa110/include/mach/dma.h
3 *
4 * Copyright (C) 1997,1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * EBSA110 DMA definitions
11 */
diff --git a/arch/arm/mach-ebsa110/include/mach/memory.h b/arch/arm/mach-ebsa110/include/mach/memory.h
index eea4b75b657b..0ca66d080c69 100644
--- a/arch/arm/mach-ebsa110/include/mach/memory.h
+++ b/arch/arm/mach-ebsa110/include/mach/memory.h
@@ -22,13 +22,6 @@
22#define PHYS_OFFSET UL(0x00000000) 22#define PHYS_OFFSET UL(0x00000000)
23 23
24/* 24/*
25 * We keep this 1:1 so that we don't interfere
26 * with the PCMCIA memory regions
27 */
28#define __virt_to_bus(x) (x)
29#define __bus_to_virt(x) (x)
30
31/*
32 * Cache flushing area - SRAM 25 * Cache flushing area - SRAM
33 */ 26 */
34#define FLUSH_BASE_PHYS 0x40000000 27#define FLUSH_BASE_PHYS 0x40000000
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 5a1b8c05c958..56bddcef6905 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -33,6 +33,12 @@ config MACH_EDB9307
33 Say 'Y' here if you want your kernel to support the Cirrus 33 Say 'Y' here if you want your kernel to support the Cirrus
34 Logic EDB9307 Evaluation Board. 34 Logic EDB9307 Evaluation Board.
35 35
36config MACH_EDB9307A
37 bool "Support Cirrus Logic EDB9307A"
38 help
39 Say 'Y' here if you want your kernel to support the Cirrus
40 Logic EDB9307A Evaluation Board.
41
36config MACH_EDB9312 42config MACH_EDB9312
37 bool "Support Cirrus Logic EDB9312" 43 bool "Support Cirrus Logic EDB9312"
38 help 44 help
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index c1252ca9648e..944e42d51646 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_MACH_ADSSPHERE) += adssphere.o
10obj-$(CONFIG_MACH_EDB9302) += edb9302.o 10obj-$(CONFIG_MACH_EDB9302) += edb9302.o
11obj-$(CONFIG_MACH_EDB9302A) += edb9302a.o 11obj-$(CONFIG_MACH_EDB9302A) += edb9302a.o
12obj-$(CONFIG_MACH_EDB9307) += edb9307.o 12obj-$(CONFIG_MACH_EDB9307) += edb9307.o
13obj-$(CONFIG_MACH_EDB9307A) += edb9307a.o
13obj-$(CONFIG_MACH_EDB9312) += edb9312.o 14obj-$(CONFIG_MACH_EDB9312) += edb9312.o
14obj-$(CONFIG_MACH_EDB9315) += edb9315.o 15obj-$(CONFIG_MACH_EDB9315) += edb9315.o
15obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o 16obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 561db73ec1ae..3fbd9b0fbe24 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -19,6 +19,7 @@
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/i2c.h>
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/mach-types.h> 24#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data adssphere_flash_data = {
28}; 29};
29 30
30static struct resource adssphere_flash_resource = { 31static struct resource adssphere_flash_resource = {
31 .start = 0x60000000, 32 .start = EP93XX_CS6_PHYS_BASE,
32 .end = 0x61ffffff, 33 .end = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
33 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
34}; 35};
35 36
@@ -59,7 +60,7 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
59 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 60 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
60 .phys_io = EP93XX_APB_PHYS_BASE, 61 .phys_io = EP93XX_APB_PHYS_BASE,
61 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 62 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
62 .boot_params = 0x00000100, 63 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
63 .map_io = ep93xx_map_io, 64 .map_io = ep93xx_map_io,
64 .init_irq = ep93xx_init_irq, 65 .init_irq = ep93xx_init_irq,
65 .timer = &ep93xx_timer, 66 .timer = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 8c9f2491dccc..96049283a10a 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -16,11 +16,12 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/string.h> 17#include <linux/string.h>
18#include <linux/io.h> 18#include <linux/io.h>
19
20#include <asm/clkdev.h>
19#include <asm/div64.h> 21#include <asm/div64.h>
20#include <mach/hardware.h> 22#include <mach/hardware.h>
21 23
22struct clk { 24struct clk {
23 char *name;
24 unsigned long rate; 25 unsigned long rate;
25 int users; 26 int users;
26 u32 enable_reg; 27 u32 enable_reg;
@@ -28,53 +29,33 @@ struct clk {
28}; 29};
29 30
30static struct clk clk_uart = { 31static struct clk clk_uart = {
31 .name = "UARTCLK",
32 .rate = 14745600, 32 .rate = 14745600,
33}; 33};
34static struct clk clk_pll1 = { 34static struct clk clk_pll1;
35 .name = "pll1", 35static struct clk clk_f;
36}; 36static struct clk clk_h;
37static struct clk clk_f = { 37static struct clk clk_p;
38 .name = "fclk", 38static struct clk clk_pll2;
39};
40static struct clk clk_h = {
41 .name = "hclk",
42};
43static struct clk clk_p = {
44 .name = "pclk",
45};
46static struct clk clk_pll2 = {
47 .name = "pll2",
48};
49static struct clk clk_usb_host = { 39static struct clk clk_usb_host = {
50 .name = "usb_host",
51 .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, 40 .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL,
52 .enable_mask = EP93XX_SYSCON_CLOCK_USH_EN, 41 .enable_mask = EP93XX_SYSCON_CLOCK_USH_EN,
53}; 42};
54 43
55 44#define INIT_CK(dev,con,ck) \
56static struct clk *clocks[] = { 45 { .dev_id = dev, .con_id = con, .clk = ck }
57 &clk_uart, 46
58 &clk_pll1, 47static struct clk_lookup clocks[] = {
59 &clk_f, 48 INIT_CK("apb:uart1", NULL, &clk_uart),
60 &clk_h, 49 INIT_CK("apb:uart2", NULL, &clk_uart),
61 &clk_p, 50 INIT_CK("apb:uart3", NULL, &clk_uart),
62 &clk_pll2, 51 INIT_CK(NULL, "pll1", &clk_pll1),
63 &clk_usb_host, 52 INIT_CK(NULL, "fclk", &clk_f),
53 INIT_CK(NULL, "hclk", &clk_h),
54 INIT_CK(NULL, "pclk", &clk_p),
55 INIT_CK(NULL, "pll2", &clk_pll2),
56 INIT_CK(NULL, "usb_host", &clk_usb_host),
64}; 57};
65 58
66struct clk *clk_get(struct device *dev, const char *id)
67{
68 int i;
69
70 for (i = 0; i < ARRAY_SIZE(clocks); i++) {
71 if (!strcmp(clocks[i]->name, id))
72 return clocks[i];
73 }
74
75 return ERR_PTR(-ENOENT);
76}
77EXPORT_SYMBOL(clk_get);
78 59
79int clk_enable(struct clk *clk) 60int clk_enable(struct clk *clk)
80{ 61{
@@ -106,12 +87,6 @@ unsigned long clk_get_rate(struct clk *clk)
106} 87}
107EXPORT_SYMBOL(clk_get_rate); 88EXPORT_SYMBOL(clk_get_rate);
108 89
109void clk_put(struct clk *clk)
110{
111}
112EXPORT_SYMBOL(clk_put);
113
114
115 90
116static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; 91static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
117static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 }; 92static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
@@ -138,6 +113,7 @@ static unsigned long calc_pll_rate(u32 config_word)
138static int __init ep93xx_clock_init(void) 113static int __init ep93xx_clock_init(void)
139{ 114{
140 u32 value; 115 u32 value;
116 int i;
141 117
142 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); 118 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
143 if (!(value & 0x00800000)) { /* PLL1 bypassed? */ 119 if (!(value & 0x00800000)) { /* PLL1 bypassed? */
@@ -165,6 +141,8 @@ static int __init ep93xx_clock_init(void)
165 clk_f.rate / 1000000, clk_h.rate / 1000000, 141 clk_f.rate / 1000000, clk_h.rate / 1000000,
166 clk_p.rate / 1000000); 142 clk_p.rate / 1000000);
167 143
144 for (i = 0; i < ARRAY_SIZE(clocks); i++)
145 clkdev_add(&clocks[i]);
168 return 0; 146 return 0;
169} 147}
170arch_initcall(ep93xx_clock_init); 148arch_initcall(ep93xx_clock_init);
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 48345fb34613..4781f323703b 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -34,6 +34,8 @@
34#include <linux/amba/bus.h> 34#include <linux/amba/bus.h>
35#include <linux/amba/serial.h> 35#include <linux/amba/serial.h>
36#include <linux/io.h> 36#include <linux/io.h>
37#include <linux/i2c.h>
38#include <linux/i2c-gpio.h>
37 39
38#include <asm/types.h> 40#include <asm/types.h>
39#include <asm/setup.h> 41#include <asm/setup.h>
@@ -153,12 +155,14 @@ static unsigned char gpio_int_unmasked[3];
153static unsigned char gpio_int_enabled[3]; 155static unsigned char gpio_int_enabled[3];
154static unsigned char gpio_int_type1[3]; 156static unsigned char gpio_int_type1[3];
155static unsigned char gpio_int_type2[3]; 157static unsigned char gpio_int_type2[3];
158static unsigned char gpio_int_debouce[3];
156 159
157/* Port ordering is: A B F */ 160/* Port ordering is: A B F */
158static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c }; 161static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c };
159static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 }; 162static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 };
160static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 }; 163static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 };
161static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 }; 164static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 };
165static const u8 int_debounce_register_offset[3] = { 0xa8, 0xc4, 0x64 };
162 166
163void ep93xx_gpio_update_int_params(unsigned port) 167void ep93xx_gpio_update_int_params(unsigned port)
164{ 168{
@@ -181,6 +185,22 @@ void ep93xx_gpio_int_mask(unsigned line)
181 gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7)); 185 gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7));
182} 186}
183 187
188void ep93xx_gpio_int_debounce(unsigned int irq, int enable)
189{
190 int line = irq_to_gpio(irq);
191 int port = line >> 3;
192 int port_mask = 1 << (line & 7);
193
194 if (enable)
195 gpio_int_debouce[port] |= port_mask;
196 else
197 gpio_int_debouce[port] &= ~port_mask;
198
199 __raw_writeb(gpio_int_debouce[port],
200 EP93XX_GPIO_REG(int_debounce_register_offset[port]));
201}
202EXPORT_SYMBOL(ep93xx_gpio_int_debounce);
203
184/************************************************************************* 204/*************************************************************************
185 * EP93xx IRQ handling 205 * EP93xx IRQ handling
186 *************************************************************************/ 206 *************************************************************************/
@@ -497,6 +517,26 @@ void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
497 platform_device_register(&ep93xx_eth_device); 517 platform_device_register(&ep93xx_eth_device);
498} 518}
499 519
520static struct i2c_gpio_platform_data ep93xx_i2c_data = {
521 .sda_pin = EP93XX_GPIO_LINE_EEDAT,
522 .sda_is_open_drain = 0,
523 .scl_pin = EP93XX_GPIO_LINE_EECLK,
524 .scl_is_open_drain = 0,
525 .udelay = 2,
526};
527
528static struct platform_device ep93xx_i2c_device = {
529 .name = "i2c-gpio",
530 .id = 0,
531 .dev.platform_data = &ep93xx_i2c_data,
532};
533
534void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
535{
536 i2c_register_board_info(0, devices, num);
537 platform_device_register(&ep93xx_i2c_device);
538}
539
500extern void ep93xx_gpio_init(void); 540extern void ep93xx_gpio_init(void);
501 541
502void __init ep93xx_init_devices(void) 542void __init ep93xx_init_devices(void)
diff --git a/arch/arm/mach-ep93xx/edb9302.c b/arch/arm/mach-ep93xx/edb9302.c
index e4add5bdccfd..8bf8d7c78f1a 100644
--- a/arch/arm/mach-ep93xx/edb9302.c
+++ b/arch/arm/mach-ep93xx/edb9302.c
@@ -19,6 +19,7 @@
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/i2c.h>
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/mach-types.h> 24#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9302_flash_data = {
28}; 29};
29 30
30static struct resource edb9302_flash_resource = { 31static struct resource edb9302_flash_resource = {
31 .start = 0x60000000, 32 .start = EP93XX_CS6_PHYS_BASE,
32 .end = 0x60ffffff, 33 .end = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
33 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
34}; 35};
35 36
@@ -59,7 +60,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
59 /* Maintainer: George Kashperko <george@chas.com.ua> */ 60 /* Maintainer: George Kashperko <george@chas.com.ua> */
60 .phys_io = EP93XX_APB_PHYS_BASE, 61 .phys_io = EP93XX_APB_PHYS_BASE,
61 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 62 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
62 .boot_params = 0x00000100, 63 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
63 .map_io = ep93xx_map_io, 64 .map_io = ep93xx_map_io,
64 .init_irq = ep93xx_init_irq, 65 .init_irq = ep93xx_init_irq,
65 .timer = &ep93xx_timer, 66 .timer = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9302a.c b/arch/arm/mach-ep93xx/edb9302a.c
index 02c4405afed7..a352c57c7b46 100644
--- a/arch/arm/mach-ep93xx/edb9302a.c
+++ b/arch/arm/mach-ep93xx/edb9302a.c
@@ -19,6 +19,7 @@
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/i2c.h>
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/mach-types.h> 24#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9302a_flash_data = {
28}; 29};
29 30
30static struct resource edb9302a_flash_resource = { 31static struct resource edb9302a_flash_resource = {
31 .start = 0x60000000, 32 .start = EP93XX_CS6_PHYS_BASE,
32 .end = 0x60ffffff, 33 .end = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
33 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
34}; 35};
35 36
@@ -44,7 +45,7 @@ static struct platform_device edb9302a_flash = {
44}; 45};
45 46
46static struct ep93xx_eth_data edb9302a_eth_data = { 47static struct ep93xx_eth_data edb9302a_eth_data = {
47 .phy_id = 1, 48 .phy_id = 1,
48}; 49};
49 50
50static void __init edb9302a_init_machine(void) 51static void __init edb9302a_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
59 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 60 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
60 .phys_io = EP93XX_APB_PHYS_BASE, 61 .phys_io = EP93XX_APB_PHYS_BASE,
61 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 62 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
62 .boot_params = 0xc0000100, 63 .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
63 .map_io = ep93xx_map_io, 64 .map_io = ep93xx_map_io,
64 .init_irq = ep93xx_init_irq, 65 .init_irq = ep93xx_init_irq,
65 .timer = &ep93xx_timer, 66 .timer = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9307.c b/arch/arm/mach-ep93xx/edb9307.c
index 040edbd2ea05..5ab22f63a4eb 100644
--- a/arch/arm/mach-ep93xx/edb9307.c
+++ b/arch/arm/mach-ep93xx/edb9307.c
@@ -19,6 +19,7 @@
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/i2c.h>
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/mach-types.h> 24#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9307_flash_data = {
28}; 29};
29 30
30static struct resource edb9307_flash_resource = { 31static struct resource edb9307_flash_resource = {
31 .start = 0x60000000, 32 .start = EP93XX_CS6_PHYS_BASE,
32 .end = 0x61ffffff, 33 .end = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
33 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
34}; 35};
35 36
@@ -44,7 +45,7 @@ static struct platform_device edb9307_flash = {
44}; 45};
45 46
46static struct ep93xx_eth_data edb9307_eth_data = { 47static struct ep93xx_eth_data edb9307_eth_data = {
47 .phy_id = 1, 48 .phy_id = 1,
48}; 49};
49 50
50static void __init edb9307_init_machine(void) 51static void __init edb9307_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
59 /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */ 60 /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */
60 .phys_io = EP93XX_APB_PHYS_BASE, 61 .phys_io = EP93XX_APB_PHYS_BASE,
61 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 62 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
62 .boot_params = 0x00000100, 63 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
63 .map_io = ep93xx_map_io, 64 .map_io = ep93xx_map_io,
64 .init_irq = ep93xx_init_irq, 65 .init_irq = ep93xx_init_irq,
65 .timer = &ep93xx_timer, 66 .timer = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9307a.c b/arch/arm/mach-ep93xx/edb9307a.c
new file mode 100644
index 000000000000..5b5c22b681be
--- /dev/null
+++ b/arch/arm/mach-ep93xx/edb9307a.c
@@ -0,0 +1,68 @@
1/*
2 * arch/arm/mach-ep93xx/edb9307a.c
3 * Cirrus Logic EDB9307A support.
4 *
5 * Copyright (C) 2008 H Hartley Sweeten <hsweeten@visionengravers.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/mm.h>
16#include <linux/sched.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h>
21#include <linux/io.h>
22#include <linux/i2c.h>
23#include <mach/hardware.h>
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26
27static struct physmap_flash_data edb9307a_flash_data = {
28 .width = 2,
29};
30
31static struct resource edb9307a_flash_resource = {
32 .start = EP93XX_CS6_PHYS_BASE,
33 .end = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
34 .flags = IORESOURCE_MEM,
35};
36
37static struct platform_device edb9307a_flash = {
38 .name = "physmap-flash",
39 .id = 0,
40 .dev = {
41 .platform_data = &edb9307a_flash_data,
42 },
43 .num_resources = 1,
44 .resource = &edb9307a_flash_resource,
45};
46
47static struct ep93xx_eth_data edb9307a_eth_data = {
48 .phy_id = 1,
49};
50
51static void __init edb9307a_init_machine(void)
52{
53 ep93xx_init_devices();
54 platform_device_register(&edb9307a_flash);
55
56 ep93xx_register_eth(&edb9307a_eth_data, 1);
57}
58
59MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
60 /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
61 .phys_io = EP93XX_APB_PHYS_BASE,
62 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
63 .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
64 .map_io = ep93xx_map_io,
65 .init_irq = ep93xx_init_irq,
66 .timer = &ep93xx_timer,
67 .init_machine = edb9307a_init_machine,
68MACHINE_END
diff --git a/arch/arm/mach-ep93xx/edb9312.c b/arch/arm/mach-ep93xx/edb9312.c
index 6853e302bc3a..d7179f66d804 100644
--- a/arch/arm/mach-ep93xx/edb9312.c
+++ b/arch/arm/mach-ep93xx/edb9312.c
@@ -20,6 +20,7 @@
20#include <linux/mtd/physmap.h> 20#include <linux/mtd/physmap.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/i2c.h>
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
@@ -29,8 +30,8 @@ static struct physmap_flash_data edb9312_flash_data = {
29}; 30};
30 31
31static struct resource edb9312_flash_resource = { 32static struct resource edb9312_flash_resource = {
32 .start = 0x60000000, 33 .start = EP93XX_CS6_PHYS_BASE,
33 .end = 0x61ffffff, 34 .end = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
34 .flags = IORESOURCE_MEM, 35 .flags = IORESOURCE_MEM,
35}; 36};
36 37
@@ -45,7 +46,7 @@ static struct platform_device edb9312_flash = {
45}; 46};
46 47
47static struct ep93xx_eth_data edb9312_eth_data = { 48static struct ep93xx_eth_data edb9312_eth_data = {
48 .phy_id = 1, 49 .phy_id = 1,
49}; 50};
50 51
51static void __init edb9312_init_machine(void) 52static void __init edb9312_init_machine(void)
@@ -60,7 +61,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
60 /* Maintainer: Toufeeq Hussain <toufeeq_hussain@infosys.com> */ 61 /* Maintainer: Toufeeq Hussain <toufeeq_hussain@infosys.com> */
61 .phys_io = EP93XX_APB_PHYS_BASE, 62 .phys_io = EP93XX_APB_PHYS_BASE,
62 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 63 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
63 .boot_params = 0x00000100, 64 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
64 .map_io = ep93xx_map_io, 65 .map_io = ep93xx_map_io,
65 .init_irq = ep93xx_init_irq, 66 .init_irq = ep93xx_init_irq,
66 .timer = &ep93xx_timer, 67 .timer = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9315.c b/arch/arm/mach-ep93xx/edb9315.c
index 9469b350d253..025af6eaca10 100644
--- a/arch/arm/mach-ep93xx/edb9315.c
+++ b/arch/arm/mach-ep93xx/edb9315.c
@@ -19,6 +19,7 @@
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/i2c.h>
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/mach-types.h> 24#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9315_flash_data = {
28}; 29};
29 30
30static struct resource edb9315_flash_resource = { 31static struct resource edb9315_flash_resource = {
31 .start = 0x60000000, 32 .start = EP93XX_CS6_PHYS_BASE,
32 .end = 0x61ffffff, 33 .end = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
33 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
34}; 35};
35 36
@@ -44,7 +45,7 @@ static struct platform_device edb9315_flash = {
44}; 45};
45 46
46static struct ep93xx_eth_data edb9315_eth_data = { 47static struct ep93xx_eth_data edb9315_eth_data = {
47 .phy_id = 1, 48 .phy_id = 1,
48}; 49};
49 50
50static void __init edb9315_init_machine(void) 51static void __init edb9315_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
59 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 60 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
60 .phys_io = EP93XX_APB_PHYS_BASE, 61 .phys_io = EP93XX_APB_PHYS_BASE,
61 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 62 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
62 .boot_params = 0x00000100, 63 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
63 .map_io = ep93xx_map_io, 64 .map_io = ep93xx_map_io,
64 .init_irq = ep93xx_init_irq, 65 .init_irq = ep93xx_init_irq,
65 .timer = &ep93xx_timer, 66 .timer = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9315a.c b/arch/arm/mach-ep93xx/edb9315a.c
index 584457ce7c80..4c9cc8a39f5c 100644
--- a/arch/arm/mach-ep93xx/edb9315a.c
+++ b/arch/arm/mach-ep93xx/edb9315a.c
@@ -19,6 +19,7 @@
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/i2c.h>
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/mach-types.h> 24#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9315a_flash_data = {
28}; 29};
29 30
30static struct resource edb9315a_flash_resource = { 31static struct resource edb9315a_flash_resource = {
31 .start = 0x60000000, 32 .start = EP93XX_CS6_PHYS_BASE,
32 .end = 0x60ffffff, 33 .end = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
33 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
34}; 35};
35 36
@@ -44,7 +45,7 @@ static struct platform_device edb9315a_flash = {
44}; 45};
45 46
46static struct ep93xx_eth_data edb9315a_eth_data = { 47static struct ep93xx_eth_data edb9315a_eth_data = {
47 .phy_id = 1, 48 .phy_id = 1,
48}; 49};
49 50
50static void __init edb9315a_init_machine(void) 51static void __init edb9315a_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
59 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 60 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
60 .phys_io = EP93XX_APB_PHYS_BASE, 61 .phys_io = EP93XX_APB_PHYS_BASE,
61 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 62 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
62 .boot_params = 0xc0000100, 63 .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
63 .map_io = ep93xx_map_io, 64 .map_io = ep93xx_map_io,
64 .init_irq = ep93xx_init_irq, 65 .init_irq = ep93xx_init_irq,
65 .timer = &ep93xx_timer, 66 .timer = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 035b24e31b64..3bad500b71b6 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -19,6 +19,7 @@
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/i2c.h>
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/mach-types.h> 24#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data gesbc9312_flash_data = {
28}; 29};
29 30
30static struct resource gesbc9312_flash_resource = { 31static struct resource gesbc9312_flash_resource = {
31 .start = 0x60000000, 32 .start = EP93XX_CS6_PHYS_BASE,
32 .end = 0x607fffff, 33 .end = EP93XX_CS6_PHYS_BASE + SZ_8M - 1,
33 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
34}; 35};
35 36
@@ -59,7 +60,7 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
59 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 60 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
60 .phys_io = EP93XX_APB_PHYS_BASE, 61 .phys_io = EP93XX_APB_PHYS_BASE,
61 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 62 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
62 .boot_params = 0x00000100, 63 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
63 .map_io = ep93xx_map_io, 64 .map_io = ep93xx_map_io,
64 .init_irq = ep93xx_init_irq, 65 .init_irq = ep93xx_init_irq,
65 .timer = &ep93xx_timer, 66 .timer = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/include/mach/clkdev.h b/arch/arm/mach-ep93xx/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h
deleted file mode 100644
index d0fa9656e92f..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/dma.h
+++ /dev/null
@@ -1,3 +0,0 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/dma.h
3 */
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h
index f7020414c5df..0a1498ae899a 100644
--- a/arch/arm/mach-ep93xx/include/mach/gpio.h
+++ b/arch/arm/mach-ep93xx/include/mach/gpio.h
@@ -99,6 +99,8 @@
99/* maximum value for irq capable line identifiers */ 99/* maximum value for irq capable line identifiers */
100#define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7) 100#define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7)
101 101
102extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable);
103
102/* new generic GPIO API - see Documentation/gpio.txt */ 104/* new generic GPIO API - see Documentation/gpio.txt */
103 105
104#include <asm-generic/gpio.h> 106#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h
index 1ab9a90ad339..fd5f081cc8b7 100644
--- a/arch/arm/mach-ep93xx/include/mach/io.h
+++ b/arch/arm/mach-ep93xx/include/mach/io.h
@@ -4,5 +4,5 @@
4 4
5#define IO_SPACE_LIMIT 0xffffffff 5#define IO_SPACE_LIMIT 0xffffffff
6 6
7#define __io(p) ((void __iomem *)(p)) 7#define __io(p) __typesafe_io(p)
8#define __mem_pci(p) (p) 8#define __mem_pci(p) (p)
diff --git a/arch/arm/mach-ep93xx/include/mach/memory.h b/arch/arm/mach-ep93xx/include/mach/memory.h
index f1b633590752..5c80c3c8158d 100644
--- a/arch/arm/mach-ep93xx/include/mach/memory.h
+++ b/arch/arm/mach-ep93xx/include/mach/memory.h
@@ -7,8 +7,4 @@
7 7
8#define PHYS_OFFSET UL(0x00000000) 8#define PHYS_OFFSET UL(0x00000000)
9 9
10#define __bus_to_virt(x) __phys_to_virt(x)
11#define __virt_to_bus(x) __virt_to_phys(x)
12
13
14#endif 10#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index db2489d3bda7..88f7e88f152f 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -14,6 +14,7 @@ void ep93xx_map_io(void);
14void ep93xx_init_irq(void); 14void ep93xx_init_irq(void);
15void ep93xx_init_time(unsigned long); 15void ep93xx_init_time(unsigned long);
16void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr); 16void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
17void ep93xx_register_i2c(struct i2c_board_info *devices, int num);
17void ep93xx_init_devices(void); 18void ep93xx_init_devices(void);
18extern struct sys_timer ep93xx_timer; 19extern struct sys_timer ep93xx_timer;
19 20
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index c2197236b632..15d6815d78c4 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -17,6 +17,7 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/sched.h> 18#include <linux/sched.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/i2c.h>
20#include <linux/mtd/physmap.h> 21#include <linux/mtd/physmap.h>
21 22
22#include <mach/hardware.h> 23#include <mach/hardware.h>
@@ -25,7 +26,7 @@
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
26 27
27static struct ep93xx_eth_data micro9_eth_data = { 28static struct ep93xx_eth_data micro9_eth_data = {
28 .phy_id = 0x1f, 29 .phy_id = 0x1f,
29}; 30};
30 31
31static void __init micro9_init(void) 32static void __init micro9_init(void)
@@ -38,46 +39,46 @@ static void __init micro9_init(void)
38 */ 39 */
39#ifdef CONFIG_MACH_MICRO9H 40#ifdef CONFIG_MACH_MICRO9H
40static struct physmap_flash_data micro9h_flash_data = { 41static struct physmap_flash_data micro9h_flash_data = {
41 .width = 4, 42 .width = 4,
42}; 43};
43 44
44static struct resource micro9h_flash_resource = { 45static struct resource micro9h_flash_resource = {
45 .start = 0x10000000, 46 .start = EP93XX_CS1_PHYS_BASE,
46 .end = 0x13ffffff, 47 .end = EP93XX_CS1_PHYS_BASE + SZ_64M - 1,
47 .flags = IORESOURCE_MEM, 48 .flags = IORESOURCE_MEM,
48}; 49};
49 50
50static struct platform_device micro9h_flash = { 51static struct platform_device micro9h_flash = {
51 .name = "physmap-flash", 52 .name = "physmap-flash",
52 .id = 0, 53 .id = 0,
53 .dev = { 54 .dev = {
54 .platform_data = &micro9h_flash_data, 55 .platform_data = &micro9h_flash_data,
55 }, 56 },
56 .num_resources = 1, 57 .num_resources = 1,
57 .resource = &micro9h_flash_resource, 58 .resource = &micro9h_flash_resource,
58}; 59};
59 60
60static void __init micro9h_init(void) 61static void __init micro9h_init(void)
61{ 62{
62 platform_device_register(&micro9h_flash); 63 platform_device_register(&micro9h_flash);
63} 64}
64 65
65static void __init micro9h_init_machine(void) 66static void __init micro9h_init_machine(void)
66{ 67{
67 ep93xx_init_devices(); 68 ep93xx_init_devices();
68 micro9_init(); 69 micro9_init();
69 micro9h_init(); 70 micro9h_init();
70} 71}
71 72
72MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H") 73MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H")
73 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */ 74 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
74 .phys_io = EP93XX_APB_PHYS_BASE, 75 .phys_io = EP93XX_APB_PHYS_BASE,
75 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 76 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
76 .boot_params = 0x00000100, 77 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
77 .map_io = ep93xx_map_io, 78 .map_io = ep93xx_map_io,
78 .init_irq = ep93xx_init_irq, 79 .init_irq = ep93xx_init_irq,
79 .timer = &ep93xx_timer, 80 .timer = &ep93xx_timer,
80 .init_machine = micro9h_init_machine, 81 .init_machine = micro9h_init_machine,
81MACHINE_END 82MACHINE_END
82#endif 83#endif
83 84
@@ -87,19 +88,19 @@ MACHINE_END
87#ifdef CONFIG_MACH_MICRO9M 88#ifdef CONFIG_MACH_MICRO9M
88static void __init micro9m_init_machine(void) 89static void __init micro9m_init_machine(void)
89{ 90{
90 ep93xx_init_devices(); 91 ep93xx_init_devices();
91 micro9_init(); 92 micro9_init();
92} 93}
93 94
94MACHINE_START(MICRO9M, "Contec Hypercontrol Micro9-M") 95MACHINE_START(MICRO9M, "Contec Hypercontrol Micro9-M")
95 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */ 96 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
96 .phys_io = EP93XX_APB_PHYS_BASE, 97 .phys_io = EP93XX_APB_PHYS_BASE,
97 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 98 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
98 .boot_params = 0x00000100, 99 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
99 .map_io = ep93xx_map_io, 100 .map_io = ep93xx_map_io,
100 .init_irq = ep93xx_init_irq, 101 .init_irq = ep93xx_init_irq,
101 .timer = &ep93xx_timer, 102 .timer = &ep93xx_timer,
102 .init_machine = micro9m_init_machine, 103 .init_machine = micro9m_init_machine,
103MACHINE_END 104MACHINE_END
104#endif 105#endif
105 106
@@ -109,19 +110,19 @@ MACHINE_END
109#ifdef CONFIG_MACH_MICRO9L 110#ifdef CONFIG_MACH_MICRO9L
110static void __init micro9l_init_machine(void) 111static void __init micro9l_init_machine(void)
111{ 112{
112 ep93xx_init_devices(); 113 ep93xx_init_devices();
113 micro9_init(); 114 micro9_init();
114} 115}
115 116
116MACHINE_START(MICRO9L, "Contec Hypercontrol Micro9-L") 117MACHINE_START(MICRO9L, "Contec Hypercontrol Micro9-L")
117 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */ 118 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
118 .phys_io = EP93XX_APB_PHYS_BASE, 119 .phys_io = EP93XX_APB_PHYS_BASE,
119 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 120 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
120 .boot_params = 0x00000100, 121 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
121 .map_io = ep93xx_map_io, 122 .map_io = ep93xx_map_io,
122 .init_irq = ep93xx_init_irq, 123 .init_irq = ep93xx_init_irq,
123 .timer = &ep93xx_timer, 124 .timer = &ep93xx_timer,
124 .init_machine = micro9l_init_machine, 125 .init_machine = micro9l_init_machine,
125MACHINE_END 126MACHINE_END
126#endif 127#endif
127 128
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index b4aa4c054276..7ee024d34829 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -20,6 +20,7 @@
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/m48t86.h> 21#include <linux/m48t86.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/i2c.h>
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
@@ -117,7 +118,7 @@ static struct physmap_flash_data ts72xx_flash_data = {
117 118
118static struct resource ts72xx_flash_resource = { 119static struct resource ts72xx_flash_resource = {
119 .start = TS72XX_NOR_PHYS_BASE, 120 .start = TS72XX_NOR_PHYS_BASE,
120 .end = TS72XX_NOR_PHYS_BASE + 0x00ffffff, 121 .end = TS72XX_NOR_PHYS_BASE + SZ_16M - 1,
121 .flags = IORESOURCE_MEM, 122 .flags = IORESOURCE_MEM,
122}; 123};
123 124
@@ -144,21 +145,21 @@ static void ts72xx_rtc_writebyte(unsigned char value, unsigned long addr)
144} 145}
145 146
146static struct m48t86_ops ts72xx_rtc_ops = { 147static struct m48t86_ops ts72xx_rtc_ops = {
147 .readbyte = ts72xx_rtc_readbyte, 148 .readbyte = ts72xx_rtc_readbyte,
148 .writebyte = ts72xx_rtc_writebyte, 149 .writebyte = ts72xx_rtc_writebyte,
149}; 150};
150 151
151static struct platform_device ts72xx_rtc_device = { 152static struct platform_device ts72xx_rtc_device = {
152 .name = "rtc-m48t86", 153 .name = "rtc-m48t86",
153 .id = -1, 154 .id = -1,
154 .dev = { 155 .dev = {
155 .platform_data = &ts72xx_rtc_ops, 156 .platform_data = &ts72xx_rtc_ops,
156 }, 157 },
157 .num_resources = 0, 158 .num_resources = 0,
158}; 159};
159 160
160static struct ep93xx_eth_data ts72xx_eth_data = { 161static struct ep93xx_eth_data ts72xx_eth_data = {
161 .phy_id = 1, 162 .phy_id = 1,
162}; 163};
163 164
164static void __init ts72xx_init_machine(void) 165static void __init ts72xx_init_machine(void)
@@ -175,7 +176,7 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
175 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 176 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
176 .phys_io = EP93XX_APB_PHYS_BASE, 177 .phys_io = EP93XX_APB_PHYS_BASE,
177 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 178 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
178 .boot_params = 0x00000100, 179 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
179 .map_io = ts72xx_map_io, 180 .map_io = ts72xx_map_io,
180 .init_irq = ep93xx_init_irq, 181 .init_irq = ep93xx_init_irq,
181 .timer = &ep93xx_timer, 182 .timer = &ep93xx_timer,
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 6a5b437ab86f..1b996b26d2e0 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -10,6 +10,7 @@
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/screen_info.h> 11#include <linux/screen_info.h>
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/spinlock.h>
13 14
14#include <asm/hardware/dec21285.h> 15#include <asm/hardware/dec21285.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 818014e09f4a..36ff06d4df15 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -14,6 +14,7 @@
14#include <linux/list.h> 14#include <linux/list.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/spinlock.h>
17 18
18#include <asm/pgtable.h> 19#include <asm/pgtable.h>
19#include <asm/page.h> 20#include <asm/page.h>
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index b2a21189dd81..da35bc5c5ccc 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -7,6 +7,7 @@
7#include <linux/init.h> 7#include <linux/init.h>
8#include <linux/interrupt.h> 8#include <linux/interrupt.h>
9#include <linux/irq.h> 9#include <linux/irq.h>
10#include <linux/spinlock.h>
10 11
11#include <asm/irq.h> 12#include <asm/irq.h>
12 13
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index d4c1e526f59c..133086019e3e 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -17,6 +17,7 @@
17#include <linux/ioport.h> 17#include <linux/ioport.h>
18#include <linux/irq.h> 18#include <linux/irq.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/spinlock.h>
20 21
21#include <asm/irq.h> 22#include <asm/irq.h>
22#include <asm/system.h> 23#include <asm/system.h>
diff --git a/arch/arm/mach-footbridge/dma.c b/arch/arm/mach-footbridge/dma.c
index b653e9cfa3f7..4f3506346969 100644
--- a/arch/arm/mach-footbridge/dma.c
+++ b/arch/arm/mach-footbridge/dma.c
@@ -12,6 +12,7 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/spinlock.h>
15 16
16#include <asm/dma.h> 17#include <asm/dma.h>
17#include <asm/scatterlist.h> 18#include <asm/scatterlist.h>
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index b1d3bf20a41e..30040fd588cc 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -4,6 +4,7 @@
4 * EBSA285 machine fixup 4 * EBSA285 machine fixup
5 */ 5 */
6#include <linux/init.h> 6#include <linux/init.h>
7#include <linux/spinlock.h>
7 8
8#include <asm/hardware/dec21285.h> 9#include <asm/hardware/dec21285.h>
9#include <asm/mach-types.h> 10#include <asm/mach-types.h>
diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
index ffaea90486f9..51dd902043ad 100644
--- a/arch/arm/mach-footbridge/include/mach/hardware.h
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -12,8 +12,6 @@
12#ifndef __ASM_ARCH_HARDWARE_H 12#ifndef __ASM_ARCH_HARDWARE_H
13#define __ASM_ARCH_HARDWARE_H 13#define __ASM_ARCH_HARDWARE_H
14 14
15#include <mach/memory.h>
16
17/* Virtual Physical Size 15/* Virtual Physical Size
18 * 0xff800000 0x40000000 1MB X-Bus 16 * 0xff800000 0x40000000 1MB X-Bus
19 * 0xff000000 0x7c000000 1MB PCI I/O space 17 * 0xff000000 0x7c000000 1MB PCI I/O space
@@ -28,9 +26,6 @@
28#define XBUS_SIZE 0x00100000 26#define XBUS_SIZE 0x00100000
29#define XBUS_BASE 0xff800000 27#define XBUS_BASE 0xff800000
30 28
31#define PCIO_SIZE 0x00100000
32#define PCIO_BASE 0xff000000
33
34#define ARMCSR_SIZE 0x00100000 29#define ARMCSR_SIZE 0x00100000
35#define ARMCSR_BASE 0xfe000000 30#define ARMCSR_BASE 0xfe000000
36 31
@@ -91,10 +86,11 @@
91#define CPLD_FLASH_WR_ENABLE 1 86#define CPLD_FLASH_WR_ENABLE 1
92 87
93#ifndef __ASSEMBLY__ 88#ifndef __ASSEMBLY__
94extern void gpio_modify_op(int mask, int set); 89extern spinlock_t nw_gpio_lock;
95extern void gpio_modify_io(int mask, int in); 90extern void nw_gpio_modify_op(unsigned int mask, unsigned int set);
96extern int gpio_read(void); 91extern void nw_gpio_modify_io(unsigned int mask, unsigned int in);
97extern void cpld_modify(int mask, int set); 92extern unsigned int nw_gpio_read(void);
93extern void nw_cpld_modify(unsigned int mask, unsigned int set);
98#endif 94#endif
99 95
100#define pcibios_assign_all_busses() 1 96#define pcibios_assign_all_busses() 1
diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
index a7b066239996..101a4fe90bde 100644
--- a/arch/arm/mach-footbridge/include/mach/io.h
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -14,7 +14,8 @@
14#ifndef __ASM_ARM_ARCH_IO_H 14#ifndef __ASM_ARM_ARCH_IO_H
15#define __ASM_ARM_ARCH_IO_H 15#define __ASM_ARM_ARCH_IO_H
16 16
17#include <mach/hardware.h> 17#define PCIO_SIZE 0x00100000
18#define PCIO_BASE 0xff000000
18 19
19#define IO_SPACE_LIMIT 0xffff 20#define IO_SPACE_LIMIT 0xffff
20 21
diff --git a/arch/arm/mach-footbridge/include/mach/dma.h b/arch/arm/mach-footbridge/include/mach/isa-dma.h
index 62afd213effb..5bd4a0d338a8 100644
--- a/arch/arm/mach-footbridge/include/mach/dma.h
+++ b/arch/arm/mach-footbridge/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-footbridge/include/mach/dma.h 2 * arch/arm/mach-footbridge/include/mach/isa-dma.h
3 * 3 *
4 * Architecture DMA routines 4 * Architecture DMA routines
5 * 5 *
diff --git a/arch/arm/mach-footbridge/include/mach/memory.h b/arch/arm/mach-footbridge/include/mach/memory.h
index 6ae2f1a07ab9..cb16e59d87b6 100644
--- a/arch/arm/mach-footbridge/include/mach/memory.h
+++ b/arch/arm/mach-footbridge/include/mach/memory.h
@@ -30,9 +30,18 @@
30extern unsigned long __virt_to_bus(unsigned long); 30extern unsigned long __virt_to_bus(unsigned long);
31extern unsigned long __bus_to_virt(unsigned long); 31extern unsigned long __bus_to_virt(unsigned long);
32#endif 32#endif
33#define __virt_to_bus __virt_to_bus
34#define __bus_to_virt __bus_to_virt
33 35
34#elif defined(CONFIG_FOOTBRIDGE_HOST) 36#elif defined(CONFIG_FOOTBRIDGE_HOST)
35 37
38/*
39 * The footbridge is programmed to expose the system RAM at the corresponding
40 * address. So, if PAGE_OFFSET is 0xc0000000, RAM appears at 0xe0000000.
41 * If 0x80000000, then its exposed at 0xa0000000 on the bus. etc.
42 * The only requirement is that the RAM isn't placed at bus address 0 which
43 * would clash with VGA cards.
44 */
36#define __virt_to_bus(x) ((x) - 0xe0000000) 45#define __virt_to_bus(x) ((x) - 0xe0000000)
37#define __bus_to_virt(x) ((x) + 0xe0000000) 46#define __bus_to_virt(x) ((x) + 0xe0000000)
38 47
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index 54fec9ae28b9..9ee80a211d3c 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -19,6 +19,7 @@
19#include <linux/list.h> 19#include <linux/list.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/spinlock.h>
22 23
23#include <asm/mach/irq.h> 24#include <asm/mach/irq.h>
24 25
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 00b0ddcac283..ac7ffa6fc413 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -11,6 +11,7 @@
11#include <linux/delay.h> 11#include <linux/delay.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/io.h> 13#include <linux/io.h>
14#include <linux/spinlock.h>
14 15
15#include <asm/hardware/dec21285.h> 16#include <asm/hardware/dec21285.h>
16#include <asm/leds.h> 17#include <asm/leds.h>
@@ -67,13 +68,14 @@ static inline void wb977_ww(int reg, int val)
67/* 68/*
68 * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE 69 * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
69 */ 70 */
70DEFINE_SPINLOCK(gpio_lock); 71DEFINE_SPINLOCK(nw_gpio_lock);
72EXPORT_SYMBOL(nw_gpio_lock);
71 73
72static unsigned int current_gpio_op; 74static unsigned int current_gpio_op;
73static unsigned int current_gpio_io; 75static unsigned int current_gpio_io;
74static unsigned int current_cpld; 76static unsigned int current_cpld;
75 77
76void gpio_modify_op(int mask, int set) 78void nw_gpio_modify_op(unsigned int mask, unsigned int set)
77{ 79{
78 unsigned int new_gpio, changed; 80 unsigned int new_gpio, changed;
79 81
@@ -86,6 +88,7 @@ void gpio_modify_op(int mask, int set)
86 if (changed & 0xff00) 88 if (changed & 0xff00)
87 outb(new_gpio >> 8, GP2_IO_BASE); 89 outb(new_gpio >> 8, GP2_IO_BASE);
88} 90}
91EXPORT_SYMBOL(nw_gpio_modify_op);
89 92
90static inline void __gpio_modify_io(int mask, int in) 93static inline void __gpio_modify_io(int mask, int in)
91{ 94{
@@ -118,7 +121,7 @@ static inline void __gpio_modify_io(int mask, int in)
118 } 121 }
119} 122}
120 123
121void gpio_modify_io(int mask, int in) 124void nw_gpio_modify_io(unsigned int mask, unsigned int in)
122{ 125{
123 /* Open up the SuperIO chip */ 126 /* Open up the SuperIO chip */
124 wb977_open(); 127 wb977_open();
@@ -128,11 +131,13 @@ void gpio_modify_io(int mask, int in)
128 /* Close up the EFER gate */ 131 /* Close up the EFER gate */
129 wb977_close(); 132 wb977_close();
130} 133}
134EXPORT_SYMBOL(nw_gpio_modify_io);
131 135
132int gpio_read(void) 136unsigned int nw_gpio_read(void)
133{ 137{
134 return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8; 138 return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8;
135} 139}
140EXPORT_SYMBOL(nw_gpio_read);
136 141
137/* 142/*
138 * Initialise the Winbond W83977F global registers 143 * Initialise the Winbond W83977F global registers
@@ -322,9 +327,9 @@ static inline void wb977_init_gpio(void)
322 /* 327 /*
323 * Set Group1/Group2 outputs 328 * Set Group1/Group2 outputs
324 */ 329 */
325 spin_lock_irqsave(&gpio_lock, flags); 330 spin_lock_irqsave(&nw_gpio_lock, flags);
326 gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN); 331 nw_gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
327 spin_unlock_irqrestore(&gpio_lock, flags); 332 spin_unlock_irqrestore(&nw_gpio_lock, flags);
328} 333}
329 334
330/* 335/*
@@ -359,34 +364,35 @@ static void __init wb977_init(void)
359 wb977_close(); 364 wb977_close();
360} 365}
361 366
362void cpld_modify(int mask, int set) 367void nw_cpld_modify(unsigned int mask, unsigned int set)
363{ 368{
364 int msk; 369 int msk;
365 370
366 current_cpld = (current_cpld & ~mask) | set; 371 current_cpld = (current_cpld & ~mask) | set;
367 372
368 gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0); 373 nw_gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
369 gpio_modify_op(GPIO_IOLOAD, 0); 374 nw_gpio_modify_op(GPIO_IOLOAD, 0);
370 375
371 for (msk = 8; msk; msk >>= 1) { 376 for (msk = 8; msk; msk >>= 1) {
372 int bit = current_cpld & msk; 377 int bit = current_cpld & msk;
373 378
374 gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0); 379 nw_gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
375 gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK); 380 nw_gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
376 } 381 }
377 382
378 gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0); 383 nw_gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
379 gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK); 384 nw_gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
380 gpio_modify_op(GPIO_IOLOAD, 0); 385 nw_gpio_modify_op(GPIO_IOLOAD, 0);
381} 386}
387EXPORT_SYMBOL(nw_cpld_modify);
382 388
383static void __init cpld_init(void) 389static void __init cpld_init(void)
384{ 390{
385 unsigned long flags; 391 unsigned long flags;
386 392
387 spin_lock_irqsave(&gpio_lock, flags); 393 spin_lock_irqsave(&nw_gpio_lock, flags);
388 cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE); 394 nw_cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
389 spin_unlock_irqrestore(&gpio_lock, flags); 395 spin_unlock_irqrestore(&nw_gpio_lock, flags);
390} 396}
391 397
392static unsigned char rwa_unlock[] __initdata = 398static unsigned char rwa_unlock[] __initdata =
@@ -596,12 +602,6 @@ static void __init rwa010_init(void)
596 rwa010_soundblaster_reset(); 602 rwa010_soundblaster_reset();
597} 603}
598 604
599EXPORT_SYMBOL(gpio_lock);
600EXPORT_SYMBOL(gpio_modify_op);
601EXPORT_SYMBOL(gpio_modify_io);
602EXPORT_SYMBOL(cpld_modify);
603EXPORT_SYMBOL(gpio_read);
604
605/* 605/*
606 * Initialise any other hardware after we've got the PCI bus 606 * Initialise any other hardware after we've got the PCI bus
607 * initialised. We may need the PCI bus to talk to this other 607 * initialised. We may need the PCI bus to talk to this other
@@ -616,9 +616,9 @@ static int __init nw_hw_init(void)
616 cpld_init(); 616 cpld_init();
617 rwa010_init(); 617 rwa010_init();
618 618
619 spin_lock_irqsave(&gpio_lock, flags); 619 spin_lock_irqsave(&nw_gpio_lock, flags);
620 gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS); 620 nw_gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
621 spin_unlock_irqrestore(&gpio_lock, flags); 621 spin_unlock_irqrestore(&nw_gpio_lock, flags);
622 } 622 }
623 return 0; 623 return 0;
624} 624}
diff --git a/arch/arm/mach-footbridge/netwinder-leds.c b/arch/arm/mach-footbridge/netwinder-leds.c
index d91a4f4a32dc..00269fe0be8a 100644
--- a/arch/arm/mach-footbridge/netwinder-leds.c
+++ b/arch/arm/mach-footbridge/netwinder-leds.c
@@ -32,7 +32,6 @@ static char led_state;
32static char hw_led_state; 32static char hw_led_state;
33 33
34static DEFINE_SPINLOCK(leds_lock); 34static DEFINE_SPINLOCK(leds_lock);
35extern spinlock_t gpio_lock;
36 35
37static void netwinder_leds_event(led_event_t evt) 36static void netwinder_leds_event(led_event_t evt)
38{ 37{
@@ -121,9 +120,9 @@ static void netwinder_leds_event(led_event_t evt)
121 spin_unlock_irqrestore(&leds_lock, flags); 120 spin_unlock_irqrestore(&leds_lock, flags);
122 121
123 if (led_state & LED_STATE_ENABLED) { 122 if (led_state & LED_STATE_ENABLED) {
124 spin_lock_irqsave(&gpio_lock, flags); 123 spin_lock_irqsave(&nw_gpio_lock, flags);
125 gpio_modify_op(GPIO_RED_LED | GPIO_GREEN_LED, hw_led_state); 124 nw_gpio_modify_op(GPIO_RED_LED | GPIO_GREEN_LED, hw_led_state);
126 spin_unlock_irqrestore(&gpio_lock, flags); 125 spin_unlock_irqrestore(&nw_gpio_lock, flags);
127 } 126 }
128} 127}
129 128
diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c
index c4f843fc099d..e2c9f0690b16 100644
--- a/arch/arm/mach-footbridge/personal.c
+++ b/arch/arm/mach-footbridge/personal.c
@@ -4,6 +4,7 @@
4 * Personal server (Skiff) machine fixup 4 * Personal server (Skiff) machine fixup
5 */ 5 */
6#include <linux/init.h> 6#include <linux/init.h>
7#include <linux/spinlock.h>
7 8
8#include <asm/hardware/dec21285.h> 9#include <asm/hardware/dec21285.h>
9#include <asm/mach-types.h> 10#include <asm/mach-types.h>
diff --git a/arch/arm/mach-h720x/include/mach/io.h b/arch/arm/mach-h720x/include/mach/io.h
index 1dab74ce88c6..2c8659c21a93 100644
--- a/arch/arm/mach-h720x/include/mach/io.h
+++ b/arch/arm/mach-h720x/include/mach/io.h
@@ -14,11 +14,9 @@
14#ifndef __ASM_ARM_ARCH_IO_H 14#ifndef __ASM_ARM_ARCH_IO_H
15#define __ASM_ARM_ARCH_IO_H 15#define __ASM_ARM_ARCH_IO_H
16 16
17#include <mach/hardware.h>
18
19#define IO_SPACE_LIMIT 0xffffffff 17#define IO_SPACE_LIMIT 0xffffffff
20 18
21#define __io(a) ((void __iomem *)(a)) 19#define __io(a) __typesafe_io(a)
22#define __mem_pci(a) (a) 20#define __mem_pci(a) (a)
23 21
24#endif 22#endif
diff --git a/arch/arm/mach-h720x/include/mach/dma.h b/arch/arm/mach-h720x/include/mach/isa-dma.h
index 0a9d86ee84fe..3eafb3f163c0 100644
--- a/arch/arm/mach-h720x/include/mach/dma.h
+++ b/arch/arm/mach-h720x/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-h720x/include/mach/dma.h 2 * arch/arm/mach-h720x/include/mach/isa-dma.h
3 * 3 *
4 * Architecture DMA routes 4 * Architecture DMA routes
5 * 5 *
@@ -8,13 +8,6 @@
8#ifndef __ASM_ARCH_DMA_H 8#ifndef __ASM_ARCH_DMA_H
9#define __ASM_ARCH_DMA_H 9#define __ASM_ARCH_DMA_H
10 10
11/*
12 * This is the maximum DMA address that can be DMAd to.
13 * There should not be more than (0xd0000000 - 0xc0000000)
14 * bytes of RAM.
15 */
16#define MAX_DMA_ADDRESS 0xd0000000
17
18#if defined (CONFIG_CPU_H7201) 11#if defined (CONFIG_CPU_H7201)
19#define MAX_DMA_CHANNELS 3 12#define MAX_DMA_CHANNELS 3
20#elif defined (CONFIG_CPU_H7202) 13#elif defined (CONFIG_CPU_H7202)
diff --git a/arch/arm/mach-h720x/include/mach/memory.h b/arch/arm/mach-h720x/include/mach/memory.h
index cb26f49cc4e1..ef4c1e26f18e 100644
--- a/arch/arm/mach-h720x/include/mach/memory.h
+++ b/arch/arm/mach-h720x/include/mach/memory.h
@@ -7,23 +7,13 @@
7#ifndef __ASM_ARCH_MEMORY_H 7#ifndef __ASM_ARCH_MEMORY_H
8#define __ASM_ARCH_MEMORY_H 8#define __ASM_ARCH_MEMORY_H
9 9
10/*
11 * Page offset:
12 * ( 0xc0000000UL )
13 */
14#define PHYS_OFFSET UL(0x40000000) 10#define PHYS_OFFSET UL(0x40000000)
15
16/* 11/*
17 * Virtual view <-> DMA view memory address translations 12 * This is the maximum DMA address that can be DMAd to.
18 * virt_to_bus: Used to translate the virtual address to an 13 * There should not be more than (0xd0000000 - 0xc0000000)
19 * address suitable to be passed to set_dma_addr 14 * bytes of RAM.
20 * bus_to_virt: Used to convert an address for DMA operations
21 * to an address that the kernel can use.
22 *
23 * There is something to do here later !, Mar 2000, Jungjun Kim
24 */ 15 */
25 16#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_256M - 1)
26#define __virt_to_bus(x) __virt_to_phys(x) 17#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_256M)
27#define __bus_to_virt(x) __phys_to_virt(x)
28 18
29#endif 19#endif
diff --git a/arch/arm/mach-imx/dma.c b/arch/arm/mach-imx/dma.c
index c10810c936b3..1536583eece0 100644
--- a/arch/arm/mach-imx/dma.c
+++ b/arch/arm/mach-imx/dma.c
@@ -28,10 +28,11 @@
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/errno.h> 29#include <linux/errno.h>
30 30
31#include <asm/scatterlist.h>
31#include <asm/system.h> 32#include <asm/system.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <mach/hardware.h> 34#include <mach/hardware.h>
34#include <asm/dma.h> 35#include <mach/dma.h>
35#include <mach/imx-dma.h> 36#include <mach/imx-dma.h>
36 37
37struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; 38struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
@@ -138,7 +139,7 @@ imx_dma_setup_sg_base(imx_dmach_t dma_ch,
138int 139int
139imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address, 140imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
140 unsigned int dma_length, unsigned int dev_addr, 141 unsigned int dma_length, unsigned int dev_addr,
141 dmamode_t dmamode) 142 unsigned int dmamode)
142{ 143{
143 struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; 144 struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
144 145
@@ -223,7 +224,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
223int 224int
224imx_dma_setup_sg(imx_dmach_t dma_ch, 225imx_dma_setup_sg(imx_dmach_t dma_ch,
225 struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length, 226 struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length,
226 unsigned int dev_addr, dmamode_t dmamode) 227 unsigned int dev_addr, unsigned int dmamode)
227{ 228{
228 int res; 229 int res;
229 struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; 230 struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
diff --git a/arch/arm/mach-imx/include/mach/imx-dma.h b/arch/arm/mach-imx/include/mach/imx-dma.h
index 44d89c35539a..bbe54df7f0de 100644
--- a/arch/arm/mach-imx/include/mach/imx-dma.h
+++ b/arch/arm/mach-imx/include/mach/imx-dma.h
@@ -18,7 +18,7 @@
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#include <asm/dma.h> 21#include <mach/dma.h>
22 22
23#ifndef __ASM_ARCH_IMX_DMA_H 23#ifndef __ASM_ARCH_IMX_DMA_H
24#define __ASM_ARCH_IMX_DMA_H 24#define __ASM_ARCH_IMX_DMA_H
@@ -48,7 +48,7 @@ struct imx_dma_channel {
48 void (*irq_handler) (int, void *); 48 void (*irq_handler) (int, void *);
49 void (*err_handler) (int, void *, int errcode); 49 void (*err_handler) (int, void *, int errcode);
50 void *data; 50 void *data;
51 dmamode_t dma_mode; 51 unsigned int dma_mode;
52 struct scatterlist *sg; 52 struct scatterlist *sg;
53 unsigned int sgbc; 53 unsigned int sgbc;
54 unsigned int sgcount; 54 unsigned int sgcount;
@@ -66,14 +66,18 @@ extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
66/* The type to distinguish channel numbers parameter from ordinal int type */ 66/* The type to distinguish channel numbers parameter from ordinal int type */
67typedef int imx_dmach_t; 67typedef int imx_dmach_t;
68 68
69#define DMA_MODE_READ 0
70#define DMA_MODE_WRITE 1
71#define DMA_MODE_MASK 1
72
69int 73int
70imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address, 74imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
71 unsigned int dma_length, unsigned int dev_addr, dmamode_t dmamode); 75 unsigned int dma_length, unsigned int dev_addr, unsigned int dmamode);
72 76
73int 77int
74imx_dma_setup_sg(imx_dmach_t dma_ch, 78imx_dma_setup_sg(imx_dmach_t dma_ch,
75 struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length, 79 struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length,
76 unsigned int dev_addr, dmamode_t dmamode); 80 unsigned int dev_addr, unsigned int dmamode);
77 81
78int 82int
79imx_dma_setup_handlers(imx_dmach_t dma_ch, 83imx_dma_setup_handlers(imx_dmach_t dma_ch,
diff --git a/arch/arm/mach-imx/include/mach/io.h b/arch/arm/mach-imx/include/mach/io.h
index c50c5fa6fb81..9e197ae4590f 100644
--- a/arch/arm/mach-imx/include/mach/io.h
+++ b/arch/arm/mach-imx/include/mach/io.h
@@ -20,11 +20,9 @@
20#ifndef __ASM_ARM_ARCH_IO_H 20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H 21#define __ASM_ARM_ARCH_IO_H
22 22
23#include <mach/hardware.h>
24
25#define IO_SPACE_LIMIT 0xffffffff 23#define IO_SPACE_LIMIT 0xffffffff
26 24
27#define __io(a) ((void __iomem *)(a)) 25#define __io(a) __typesafe_io(a)
28#define __mem_pci(a) (a) 26#define __mem_pci(a) (a)
29 27
30#endif 28#endif
diff --git a/arch/arm/mach-imx/include/mach/memory.h b/arch/arm/mach-imx/include/mach/memory.h
index 5c453063c0ed..a93df7cba694 100644
--- a/arch/arm/mach-imx/include/mach/memory.h
+++ b/arch/arm/mach-imx/include/mach/memory.h
@@ -23,14 +23,4 @@
23 23
24#define PHYS_OFFSET UL(0x08000000) 24#define PHYS_OFFSET UL(0x08000000)
25 25
26/*
27 * Virtual view <-> DMA view memory address translations
28 * virt_to_bus: Used to translate the virtual address to an
29 * address suitable to be passed to set_dma_addr
30 * bus_to_virt: Used to convert an address for DMA operations
31 * to an address that the kernel can use.
32 */
33#define __virt_to_bus(x) (x - PAGE_OFFSET + PHYS_OFFSET)
34#define __bus_to_virt(x) (x - PHYS_OFFSET + PAGE_OFFSET)
35
36#endif 26#endif
diff --git a/arch/arm/mach-integrator/clock.c b/arch/arm/mach-integrator/clock.c
index 8d761fdd2ecd..989ecf5f5c46 100644
--- a/arch/arm/mach-integrator/clock.c
+++ b/arch/arm/mach-integrator/clock.c
@@ -10,42 +10,12 @@
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/list.h>
14#include <linux/errno.h> 13#include <linux/errno.h>
15#include <linux/err.h>
16#include <linux/string.h>
17#include <linux/clk.h> 14#include <linux/clk.h>
18#include <linux/mutex.h> 15#include <linux/mutex.h>
19 16
20#include <asm/hardware/icst525.h> 17#include <asm/clkdev.h>
21 18#include <mach/clkdev.h>
22#include "clock.h"
23
24static LIST_HEAD(clocks);
25static DEFINE_MUTEX(clocks_mutex);
26
27struct clk *clk_get(struct device *dev, const char *id)
28{
29 struct clk *p, *clk = ERR_PTR(-ENOENT);
30
31 mutex_lock(&clocks_mutex);
32 list_for_each_entry(p, &clocks, node) {
33 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
34 clk = p;
35 break;
36 }
37 }
38 mutex_unlock(&clocks_mutex);
39
40 return clk;
41}
42EXPORT_SYMBOL(clk_get);
43
44void clk_put(struct clk *clk)
45{
46 module_put(clk->owner);
47}
48EXPORT_SYMBOL(clk_put);
49 19
50int clk_enable(struct clk *clk) 20int clk_enable(struct clk *clk)
51{ 21{
@@ -67,7 +37,6 @@ EXPORT_SYMBOL(clk_get_rate);
67long clk_round_rate(struct clk *clk, unsigned long rate) 37long clk_round_rate(struct clk *clk, unsigned long rate)
68{ 38{
69 struct icst525_vco vco; 39 struct icst525_vco vco;
70
71 vco = icst525_khz_to_vco(clk->params, rate / 1000); 40 vco = icst525_khz_to_vco(clk->params, rate / 1000);
72 return icst525_khz(clk->params, vco) * 1000; 41 return icst525_khz(clk->params, vco) * 1000;
73} 42}
@@ -76,56 +45,15 @@ EXPORT_SYMBOL(clk_round_rate);
76int clk_set_rate(struct clk *clk, unsigned long rate) 45int clk_set_rate(struct clk *clk, unsigned long rate)
77{ 46{
78 int ret = -EIO; 47 int ret = -EIO;
48
79 if (clk->setvco) { 49 if (clk->setvco) {
80 struct icst525_vco vco; 50 struct icst525_vco vco;
81 51
82 vco = icst525_khz_to_vco(clk->params, rate / 1000); 52 vco = icst525_khz_to_vco(clk->params, rate / 1000);
83 clk->rate = icst525_khz(clk->params, vco) * 1000; 53 clk->rate = icst525_khz(clk->params, vco) * 1000;
84
85 printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
86 clk->name, vco.s, vco.r, vco.v);
87
88 clk->setvco(clk, vco); 54 clk->setvco(clk, vco);
89 ret = 0; 55 ret = 0;
90 } 56 }
91 return 0; 57 return ret;
92} 58}
93EXPORT_SYMBOL(clk_set_rate); 59EXPORT_SYMBOL(clk_set_rate);
94
95/*
96 * These are fixed clocks.
97 */
98static struct clk kmi_clk = {
99 .name = "KMIREFCLK",
100 .rate = 24000000,
101};
102
103static struct clk uart_clk = {
104 .name = "UARTCLK",
105 .rate = 14745600,
106};
107
108int clk_register(struct clk *clk)
109{
110 mutex_lock(&clocks_mutex);
111 list_add(&clk->node, &clocks);
112 mutex_unlock(&clocks_mutex);
113 return 0;
114}
115EXPORT_SYMBOL(clk_register);
116
117void clk_unregister(struct clk *clk)
118{
119 mutex_lock(&clocks_mutex);
120 list_del(&clk->node);
121 mutex_unlock(&clocks_mutex);
122}
123EXPORT_SYMBOL(clk_unregister);
124
125static int __init clk_init(void)
126{
127 clk_register(&kmi_clk);
128 clk_register(&uart_clk);
129 return 0;
130}
131arch_initcall(clk_init);
diff --git a/arch/arm/mach-integrator/clock.h b/arch/arm/mach-integrator/clock.h
index 09e6328ceba9..e69de29bb2d1 100644
--- a/arch/arm/mach-integrator/clock.h
+++ b/arch/arm/mach-integrator/clock.h
@@ -1,25 +0,0 @@
1/*
2 * linux/arch/arm/mach-integrator/clock.h
3 *
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11struct module;
12struct icst525_params;
13
14struct clk {
15 struct list_head node;
16 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 const struct icst525_params *params;
20 void *data;
21 void (*setvco)(struct clk *, struct icst525_vco vco);
22};
23
24int clk_register(struct clk *clk);
25void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 595b7392ee4e..c89c949b4d45 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -21,6 +21,8 @@
21#include <linux/amba/serial.h> 21#include <linux/amba/serial.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <asm/clkdev.h>
25#include <mach/clkdev.h>
24#include <mach/hardware.h> 26#include <mach/hardware.h>
25#include <asm/irq.h> 27#include <asm/irq.h>
26#include <asm/hardware/arm_timer.h> 28#include <asm/hardware/arm_timer.h>
@@ -108,10 +110,43 @@ static struct amba_device *amba_devs[] __initdata = {
108 &kmi1_device, 110 &kmi1_device,
109}; 111};
110 112
113/*
114 * These are fixed clocks.
115 */
116static struct clk clk24mhz = {
117 .rate = 24000000,
118};
119
120static struct clk uartclk = {
121 .rate = 14745600,
122};
123
124static struct clk_lookup lookups[] __initdata = {
125 { /* UART0 */
126 .dev_id = "mb:16",
127 .clk = &uartclk,
128 }, { /* UART1 */
129 .dev_id = "mb:17",
130 .clk = &uartclk,
131 }, { /* KMI0 */
132 .dev_id = "mb:18",
133 .clk = &clk24mhz,
134 }, { /* KMI1 */
135 .dev_id = "mb:19",
136 .clk = &clk24mhz,
137 }, { /* MMCI - IntegratorCP */
138 .dev_id = "mb:1c",
139 .clk = &uartclk,
140 }
141};
142
111static int __init integrator_init(void) 143static int __init integrator_init(void)
112{ 144{
113 int i; 145 int i;
114 146
147 for (i = 0; i < ARRAY_SIZE(lookups); i++)
148 clkdev_add(&lookups[i]);
149
115 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 150 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
116 struct amba_device *d = amba_devs[i]; 151 struct amba_device *d = amba_devs[i];
117 amba_device_register(d, &iomem_resource); 152 amba_device_register(d, &iomem_resource);
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 172299a78302..0058c937719e 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -22,13 +22,13 @@
22#include <linux/amba/clcd.h> 22#include <linux/amba/clcd.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <asm/clkdev.h>
26#include <mach/clkdev.h>
25#include <asm/hardware/icst525.h> 27#include <asm/hardware/icst525.h>
26#include <mach/lm.h> 28#include <mach/lm.h>
27#include <mach/impd1.h> 29#include <mach/impd1.h>
28#include <asm/sizes.h> 30#include <asm/sizes.h>
29 31
30#include "clock.h"
31
32static int module_id; 32static int module_id;
33 33
34module_param_named(lmid, module_id, int, 0444); 34module_param_named(lmid, module_id, int, 0444);
@@ -37,6 +37,7 @@ MODULE_PARM_DESC(lmid, "logic module stack position");
37struct impd1_module { 37struct impd1_module {
38 void __iomem *base; 38 void __iomem *base;
39 struct clk vcos[2]; 39 struct clk vcos[2];
40 struct clk_lookup *clks[3];
40}; 41};
41 42
42static const struct icst525_params impd1_vco_params = { 43static const struct icst525_params impd1_vco_params = {
@@ -339,9 +340,8 @@ static struct impd1_device impd1_devs[] = {
339 } 340 }
340}; 341};
341 342
342static const char *impd1_vconames[2] = { 343static struct clk fixed_14745600 = {
343 "CLCDCLK", 344 .rate = 14745600,
344 "AUXVCO2",
345}; 345};
346 346
347static int impd1_probe(struct lm_device *dev) 347static int impd1_probe(struct lm_device *dev)
@@ -374,14 +374,20 @@ static int impd1_probe(struct lm_device *dev)
374 374
375 for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) { 375 for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) {
376 impd1->vcos[i].owner = THIS_MODULE, 376 impd1->vcos[i].owner = THIS_MODULE,
377 impd1->vcos[i].name = impd1_vconames[i],
378 impd1->vcos[i].params = &impd1_vco_params, 377 impd1->vcos[i].params = &impd1_vco_params,
379 impd1->vcos[i].data = impd1, 378 impd1->vcos[i].data = impd1,
380 impd1->vcos[i].setvco = impd1_setvco; 379 impd1->vcos[i].setvco = impd1_setvco;
381
382 clk_register(&impd1->vcos[i]);
383 } 380 }
384 381
382 impd1->clks[0] = clkdev_alloc(&impd1->vcos[0], NULL, "lm%x:01000",
383 dev->id);
384 impd1->clks[1] = clkdev_alloc(&fixed_14745600, NULL, "lm%x:00100",
385 dev->id);
386 impd1->clks[2] = clkdev_alloc(&fixed_14745600, NULL, "lm%x:00200",
387 dev->id);
388 for (i = 0; i < ARRAY_SIZE(impd1->clks); i++)
389 clkdev_add(impd1->clks[i]);
390
385 for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) { 391 for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) {
386 struct impd1_device *idev = impd1_devs + i; 392 struct impd1_device *idev = impd1_devs + i;
387 struct amba_device *d; 393 struct amba_device *d;
@@ -434,8 +440,8 @@ static void impd1_remove(struct lm_device *dev)
434 440
435 device_for_each_child(&dev->dev, NULL, impd1_remove_one); 441 device_for_each_child(&dev->dev, NULL, impd1_remove_one);
436 442
437 for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) 443 for (i = 0; i < ARRAY_SIZE(impd1->clks); i++)
438 clk_unregister(&impd1->vcos[i]); 444 clkdev_drop(impd1->clks[i]);
439 445
440 lm_set_drvdata(dev, NULL); 446 lm_set_drvdata(dev, NULL);
441 447
diff --git a/arch/arm/mach-integrator/include/mach/clkdev.h b/arch/arm/mach-integrator/include/mach/clkdev.h
new file mode 100644
index 000000000000..9293e410832a
--- /dev/null
+++ b/arch/arm/mach-integrator/include/mach/clkdev.h
@@ -0,0 +1,25 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#include <linux/module.h>
5#include <asm/hardware/icst525.h>
6
7struct clk {
8 unsigned long rate;
9 struct module *owner;
10 const struct icst525_params *params;
11 void *data;
12 void (*setvco)(struct clk *, struct icst525_vco vco);
13};
14
15static inline int __clk_get(struct clk *clk)
16{
17 return try_module_get(clk->owner);
18}
19
20static inline void __clk_put(struct clk *clk)
21{
22 module_put(clk->owner);
23}
24
25#endif
diff --git a/arch/arm/mach-integrator/include/mach/dma.h b/arch/arm/mach-integrator/include/mach/dma.h
deleted file mode 100644
index fbebe85a2db7..000000000000
--- a/arch/arm/mach-integrator/include/mach/dma.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-integrator/include/mach/dma.h
3 *
4 * Copyright (C) 1997,1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
diff --git a/arch/arm/mach-integrator/include/mach/memory.h b/arch/arm/mach-integrator/include/mach/memory.h
index be7e63c21d25..2b2e7a110724 100644
--- a/arch/arm/mach-integrator/include/mach/memory.h
+++ b/arch/arm/mach-integrator/include/mach/memory.h
@@ -24,16 +24,9 @@
24 * Physical DRAM offset. 24 * Physical DRAM offset.
25 */ 25 */
26#define PHYS_OFFSET UL(0x00000000) 26#define PHYS_OFFSET UL(0x00000000)
27#define BUS_OFFSET UL(0x80000000)
28 27
29/* 28#define BUS_OFFSET UL(0x80000000)
30 * Virtual view <-> DMA view memory address translations 29#define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET)
31 * virt_to_bus: Used to translate the virtual address to an 30#define __bus_to_virt(x) ((x) - BUS_OFFSET + PAGE_OFFSET)
32 * address suitable to be passed to set_dma_addr
33 * bus_to_virt: Used to convert an address for DMA operations
34 * to an address that the kernel can use.
35 */
36#define __virt_to_bus(x) (x - PAGE_OFFSET + BUS_OFFSET)
37#define __bus_to_virt(x) (x - BUS_OFFSET + PAGE_OFFSET)
38 31
39#endif 32#endif
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 88026ccd5ac9..427c2d8dc123 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -21,6 +21,8 @@
21#include <linux/amba/clcd.h> 21#include <linux/amba/clcd.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <asm/clkdev.h>
25#include <mach/clkdev.h>
24#include <mach/hardware.h> 26#include <mach/hardware.h>
25#include <asm/irq.h> 27#include <asm/irq.h>
26#include <asm/setup.h> 28#include <asm/setup.h>
@@ -38,7 +40,6 @@
38#include <asm/mach/time.h> 40#include <asm/mach/time.h>
39 41
40#include "common.h" 42#include "common.h"
41#include "clock.h"
42 43
43#define INTCP_PA_MMC_BASE 0x1c000000 44#define INTCP_PA_MMC_BASE 0x1c000000
44#define INTCP_PA_AACI_BASE 0x1d000000 45#define INTCP_PA_AACI_BASE 0x1d000000
@@ -289,15 +290,16 @@ static void cp_auxvco_set(struct clk *clk, struct icst525_vco vco)
289 writel(0, CM_LOCK); 290 writel(0, CM_LOCK);
290} 291}
291 292
292static struct clk cp_clcd_clk = { 293static struct clk cp_auxclk = {
293 .name = "CLCDCLK",
294 .params = &cp_auxvco_params, 294 .params = &cp_auxvco_params,
295 .setvco = cp_auxvco_set, 295 .setvco = cp_auxvco_set,
296}; 296};
297 297
298static struct clk cp_mmci_clk = { 298static struct clk_lookup cp_lookups[] = {
299 .name = "MCLK", 299 { /* CLCD */
300 .rate = 14745600, 300 .dev_id = "mb:c0",
301 .clk = &cp_auxclk,
302 },
301}; 303};
302 304
303/* 305/*
@@ -554,8 +556,8 @@ static void __init intcp_init(void)
554{ 556{
555 int i; 557 int i;
556 558
557 clk_register(&cp_clcd_clk); 559 for (i = 0; i < ARRAY_SIZE(cp_lookups); i++)
558 clk_register(&cp_mmci_clk); 560 clkdev_add(&cp_lookups[i]);
559 561
560 platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs)); 562 platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
561 563
diff --git a/arch/arm/mach-iop13xx/include/mach/dma.h b/arch/arm/mach-iop13xx/include/mach/dma.h
deleted file mode 100644
index d79846fbb394..000000000000
--- a/arch/arm/mach-iop13xx/include/mach/dma.h
+++ /dev/null
@@ -1,3 +0,0 @@
1#ifndef _IOP13XX_DMA_H
2#define _IOP13XX_DMA_H
3#endif
diff --git a/arch/arm/mach-iop13xx/include/mach/memory.h b/arch/arm/mach-iop13xx/include/mach/memory.h
index b82602d529bf..e012bf13c955 100644
--- a/arch/arm/mach-iop13xx/include/mach/memory.h
+++ b/arch/arm/mach-iop13xx/include/mach/memory.h
@@ -16,18 +16,6 @@
16#define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE) 16#define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE)
17#define IOP13XX_PMMR_P_END (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE) 17#define IOP13XX_PMMR_P_END (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE)
18 18
19/*
20 * Virtual view <-> PCI DMA view memory address translations
21 * virt_to_bus: Used to translate the virtual address to an
22 * address suitable to be passed to set_dma_addr
23 * bus_to_virt: Used to convert an address for DMA operations
24 * to an address that the kernel can use.
25 */
26
27/* RAM has 1:1 mapping on the PCIe/x Busses */
28#define __virt_to_bus(x) (__virt_to_phys(x))
29#define __bus_to_virt(x) (__phys_to_virt(x))
30
31static inline dma_addr_t __virt_to_lbus(unsigned long x) 19static inline dma_addr_t __virt_to_lbus(unsigned long x)
32{ 20{
33 return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE; 21 return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE;
@@ -55,7 +43,7 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x)
55 if (is_lbus_device(dev) && __is_lbus_dma(__dma)) \ 43 if (is_lbus_device(dev) && __is_lbus_dma(__dma)) \
56 __virt = __lbus_to_virt(__dma); \ 44 __virt = __lbus_to_virt(__dma); \
57 else \ 45 else \
58 __virt = __bus_to_virt(__dma); \ 46 __virt = __phys_to_virt(__dma); \
59 (void *)__virt; \ 47 (void *)__virt; \
60 }) 48 })
61 49
@@ -66,7 +54,7 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x)
66 if (is_lbus_device(dev) && __is_lbus_virt(__virt)) \ 54 if (is_lbus_device(dev) && __is_lbus_virt(__virt)) \
67 __dma = __virt_to_lbus(__virt); \ 55 __dma = __virt_to_lbus(__virt); \
68 else \ 56 else \
69 __dma = __virt_to_bus(__virt); \ 57 __dma = __virt_to_phys(__virt); \
70 __dma; \ 58 __dma; \
71 }) 59 })
72 60
diff --git a/arch/arm/mach-iop13xx/include/mach/timex.h b/arch/arm/mach-iop13xx/include/mach/timex.h
index 5b1f1c8a8270..45fb2745bb54 100644
--- a/arch/arm/mach-iop13xx/include/mach/timex.h
+++ b/arch/arm/mach-iop13xx/include/mach/timex.h
@@ -1,3 +1 @@
1#include <mach/hardware.h>
2
3#define CLOCK_TICK_RATE (100 * HZ) #define CLOCK_TICK_RATE (100 * HZ)
diff --git a/arch/arm/mach-iop32x/include/mach/dma.h b/arch/arm/mach-iop32x/include/mach/dma.h
deleted file mode 100644
index f8bd817f205d..000000000000
--- a/arch/arm/mach-iop32x/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * arch/arm/mach-iop32x/include/mach/dma.h
3 *
4 * Copyright (C) 2004 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
index ce54705ba3d4..339e5854728b 100644
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -11,7 +11,7 @@
11#ifndef __IO_H 11#ifndef __IO_H
12#define __IO_H 12#define __IO_H
13 13
14#include <mach/hardware.h> 14#include <asm/hardware/iop3xx.h>
15 15
16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, 16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
17 unsigned int mtype); 17 unsigned int mtype);
diff --git a/arch/arm/mach-iop32x/include/mach/memory.h b/arch/arm/mach-iop32x/include/mach/memory.h
index 42cd4bf3148c..c30f6450ad50 100644
--- a/arch/arm/mach-iop32x/include/mach/memory.h
+++ b/arch/arm/mach-iop32x/include/mach/memory.h
@@ -5,22 +5,9 @@
5#ifndef __MEMORY_H 5#ifndef __MEMORY_H
6#define __MEMORY_H 6#define __MEMORY_H
7 7
8#include <mach/hardware.h>
9
10/* 8/*
11 * Physical DRAM offset. 9 * Physical DRAM offset.
12 */ 10 */
13#define PHYS_OFFSET UL(0xa0000000) 11#define PHYS_OFFSET UL(0xa0000000)
14 12
15/*
16 * Virtual view <-> PCI DMA view memory address translations
17 * virt_to_bus: Used to translate the virtual address to an
18 * address suitable to be passed to set_dma_addr
19 * bus_to_virt: Used to convert an address for DMA operations
20 * to an address that the kernel can use.
21 */
22#define __virt_to_bus(x) (__virt_to_phys(x))
23#define __bus_to_virt(x) (__phys_to_virt(x))
24
25
26#endif 13#endif
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
index 20f923e54f46..32d9e5b0a28d 100644
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ b/arch/arm/mach-iop32x/include/mach/system.h
@@ -7,8 +7,9 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10
11#include <asm/mach-types.h> 10#include <asm/mach-types.h>
11#include <asm/hardware/iop3xx.h>
12#include <mach/n2100.h>
12 13
13static inline void arch_idle(void) 14static inline void arch_idle(void)
14{ 15{
diff --git a/arch/arm/mach-iop32x/include/mach/timex.h b/arch/arm/mach-iop32x/include/mach/timex.h
index a541afced3cb..7262ab81419d 100644
--- a/arch/arm/mach-iop32x/include/mach/timex.h
+++ b/arch/arm/mach-iop32x/include/mach/timex.h
@@ -3,7 +3,4 @@
3 * 3 *
4 * IOP32x architecture timex specifications 4 * IOP32x architecture timex specifications
5 */ 5 */
6
7#include <mach/hardware.h>
8
9#define CLOCK_TICK_RATE (100 * HZ) 6#define CLOCK_TICK_RATE (100 * HZ)
diff --git a/arch/arm/mach-iop33x/include/mach/dma.h b/arch/arm/mach-iop33x/include/mach/dma.h
deleted file mode 100644
index d8b42232931d..000000000000
--- a/arch/arm/mach-iop33x/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * arch/arm/mach-iop33x/include/mach/dma.h
3 *
4 * Copyright (C) 2004 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
index 158874631217..e99a7ed6d050 100644
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ b/arch/arm/mach-iop33x/include/mach/io.h
@@ -11,7 +11,7 @@
11#ifndef __IO_H 11#ifndef __IO_H
12#define __IO_H 12#define __IO_H
13 13
14#include <mach/hardware.h> 14#include <asm/hardware/iop3xx.h>
15 15
16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, 16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
17 unsigned int mtype); 17 unsigned int mtype);
diff --git a/arch/arm/mach-iop33x/include/mach/memory.h b/arch/arm/mach-iop33x/include/mach/memory.h
index 2cef0bbb354f..a30a96aa6d2d 100644
--- a/arch/arm/mach-iop33x/include/mach/memory.h
+++ b/arch/arm/mach-iop33x/include/mach/memory.h
@@ -5,22 +5,9 @@
5#ifndef __MEMORY_H 5#ifndef __MEMORY_H
6#define __MEMORY_H 6#define __MEMORY_H
7 7
8#include <mach/hardware.h>
9
10/* 8/*
11 * Physical DRAM offset. 9 * Physical DRAM offset.
12 */ 10 */
13#define PHYS_OFFSET UL(0x00000000) 11#define PHYS_OFFSET UL(0x00000000)
14 12
15/*
16 * Virtual view <-> PCI DMA view memory address translations
17 * virt_to_bus: Used to translate the virtual address to an
18 * address suitable to be passed to set_dma_addr
19 * bus_to_virt: Used to convert an address for DMA operations
20 * to an address that the kernel can use.
21 */
22#define __virt_to_bus(x) (__virt_to_phys(x))
23#define __bus_to_virt(x) (__phys_to_virt(x))
24
25
26#endif 13#endif
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
index 7bf3bfb49446..0cb3ad862acd 100644
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ b/arch/arm/mach-iop33x/include/mach/system.h
@@ -7,6 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <asm/hardware/iop3xx.h>
10 11
11static inline void arch_idle(void) 12static inline void arch_idle(void)
12{ 13{
diff --git a/arch/arm/mach-iop33x/include/mach/timex.h b/arch/arm/mach-iop33x/include/mach/timex.h
index c75760844d49..54c589091d6e 100644
--- a/arch/arm/mach-iop33x/include/mach/timex.h
+++ b/arch/arm/mach-iop33x/include/mach/timex.h
@@ -3,7 +3,4 @@
3 * 3 *
4 * IOP3xx architecture timex specifications 4 * IOP3xx architecture timex specifications
5 */ 5 */
6
7#include <mach/hardware.h>
8
9#define CLOCK_TICK_RATE (100 * HZ) 6#define CLOCK_TICK_RATE (100 * HZ)
diff --git a/arch/arm/mach-ixp2000/include/mach/dma.h b/arch/arm/mach-ixp2000/include/mach/dma.h
deleted file mode 100644
index 26063d60f622..000000000000
--- a/arch/arm/mach-ixp2000/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * arch/arm/mach-ixp2000/include/mach/dma.h
3 *
4 * Copyright (C) 2002 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
diff --git a/arch/arm/mach-ixp2000/include/mach/memory.h b/arch/arm/mach-ixp2000/include/mach/memory.h
index 241529a7c52d..aee7eb8a71b2 100644
--- a/arch/arm/mach-ixp2000/include/mach/memory.h
+++ b/arch/arm/mach-ixp2000/include/mach/memory.h
@@ -15,13 +15,6 @@
15 15
16#define PHYS_OFFSET UL(0x00000000) 16#define PHYS_OFFSET UL(0x00000000)
17 17
18/*
19 * Virtual view <-> DMA view memory address translations
20 * virt_to_bus: Used to translate the virtual address to an
21 * address suitable to be passed to set_dma_addr
22 * bus_to_virt: Used to convert an address for DMA operations
23 * to an address that the kernel can use.
24 */
25#include <mach/ixp2000-regs.h> 18#include <mach/ixp2000-regs.h>
26 19
27#define __virt_to_bus(v) \ 20#define __virt_to_bus(v) \
diff --git a/arch/arm/mach-ixp23xx/include/mach/dma.h b/arch/arm/mach-ixp23xx/include/mach/dma.h
deleted file mode 100644
index 8886544b93f7..000000000000
--- a/arch/arm/mach-ixp23xx/include/mach/dma.h
+++ /dev/null
@@ -1,3 +0,0 @@
1/*
2 * arch/arm/mach-ixp23xx/include/mach/dma.h
3 */
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h
index 305ea1808c71..fd9ef8e519f7 100644
--- a/arch/arm/mach-ixp23xx/include/mach/io.h
+++ b/arch/arm/mach-ixp23xx/include/mach/io.h
@@ -20,8 +20,6 @@
20#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) 20#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
21#define __mem_pci(a) (a) 21#define __mem_pci(a) (a)
22 22
23#include <linux/kernel.h> /* For BUG */
24
25static inline void __iomem * 23static inline void __iomem *
26ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype) 24ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype)
27{ 25{
diff --git a/arch/arm/mach-ixp23xx/include/mach/memory.h b/arch/arm/mach-ixp23xx/include/mach/memory.h
index 9d40115f7ebe..fdd138706c70 100644
--- a/arch/arm/mach-ixp23xx/include/mach/memory.h
+++ b/arch/arm/mach-ixp23xx/include/mach/memory.h
@@ -19,16 +19,6 @@
19 */ 19 */
20#define PHYS_OFFSET (0x00000000) 20#define PHYS_OFFSET (0x00000000)
21 21
22
23/*
24 * Virtual view <-> DMA view memory address translations
25 * virt_to_bus: Used to translate the virtual address to an
26 * address suitable to be passed to set_dma_addr
27 * bus_to_virt: Used to convert an address for DMA operations
28 * to an address that the kernel can use.
29 */
30#ifndef __ASSEMBLY__
31
32#define __virt_to_bus(v) \ 22#define __virt_to_bus(v) \
33 ({ unsigned int ret; \ 23 ({ unsigned int ret; \
34 ret = ((__virt_to_phys(v) - 0x00000000) + \ 24 ret = ((__virt_to_phys(v) - 0x00000000) + \
@@ -43,6 +33,3 @@
43#define arch_is_coherent() 1 33#define arch_is_coherent() 1
44 34
45#endif 35#endif
46
47
48#endif
diff --git a/arch/arm/mach-ixp4xx/include/mach/dma.h b/arch/arm/mach-ixp4xx/include/mach/dma.h
deleted file mode 100644
index 00c5070c0201..000000000000
--- a/arch/arm/mach-ixp4xx/include/mach/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-ixp4xx/include/mach/dma.h
3 *
4 * Copyright (C) 2001-2004 MontaVista Software, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H
13
14#include <linux/device.h>
15#include <asm/page.h>
16#include <asm/sizes.h>
17#include <mach/hardware.h>
18
19#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M)
20
21#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 319948e31bec..ce63048d45eb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -49,8 +49,6 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
49 49
50#else 50#else
51 51
52#include <linux/mm.h>
53
54/* 52/*
55 * In the case of using indirect PCI, we simply return the actual PCI 53 * In the case of using indirect PCI, we simply return the actual PCI
56 * address and our read/write implementation use that to drive the 54 * address and our read/write implementation use that to drive the
@@ -241,7 +239,7 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
241 239
242#ifndef CONFIG_PCI 240#ifndef CONFIG_PCI
243 241
244#define __io(v) v 242#define __io(v) __typesafe_io(v)
245 243
246#else 244#else
247 245
diff --git a/arch/arm/mach-ixp4xx/include/mach/memory.h b/arch/arm/mach-ixp4xx/include/mach/memory.h
index c4d2830ac987..98f5e5e20980 100644
--- a/arch/arm/mach-ixp4xx/include/mach/memory.h
+++ b/arch/arm/mach-ixp4xx/include/mach/memory.h
@@ -22,19 +22,8 @@ void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes);
22 ixp4xx_adjust_zones(node, size, holes) 22 ixp4xx_adjust_zones(node, size, holes)
23 23
24#define ISA_DMA_THRESHOLD (SZ_64M - 1) 24#define ISA_DMA_THRESHOLD (SZ_64M - 1)
25#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M)
25 26
26#endif 27#endif
27 28
28/*
29 * Virtual view <-> DMA view memory address translations
30 * virt_to_bus: Used to translate the virtual address to an
31 * address suitable to be passed to set_dma_addr
32 * bus_to_virt: Used to convert an address for DMA operations
33 * to an address that the kernel can use.
34 *
35 * These are dummies for now.
36 */
37#define __virt_to_bus(x) __virt_to_phys(x)
38#define __bus_to_virt(x) __phys_to_virt(x)
39
40#endif 29#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/dma.h b/arch/arm/mach-kirkwood/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-kirkwood/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/arm/mach-kirkwood/include/mach/memory.h b/arch/arm/mach-kirkwood/include/mach/memory.h
index b5fb34bdccd5..45431e131465 100644
--- a/arch/arm/mach-kirkwood/include/mach/memory.h
+++ b/arch/arm/mach-kirkwood/include/mach/memory.h
@@ -7,8 +7,4 @@
7 7
8#define PHYS_OFFSET UL(0x00000000) 8#define PHYS_OFFSET UL(0x00000000)
9 9
10#define __virt_to_bus(x) __virt_to_phys(x)
11#define __bus_to_virt(x) __phys_to_virt(x)
12
13
14#endif 10#endif
diff --git a/arch/arm/mach-ks8695/include/mach/dma.h b/arch/arm/mach-ks8695/include/mach/dma.h
deleted file mode 100644
index 561206280089..000000000000
--- a/arch/arm/mach-ks8695/include/mach/dma.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * arch/arm/mach-ks8695/include/mach/dma.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
diff --git a/arch/arm/mach-ks8695/include/mach/io.h b/arch/arm/mach-ks8695/include/mach/io.h
index f364f24ffe1e..a7a63ac3ba4e 100644
--- a/arch/arm/mach-ks8695/include/mach/io.h
+++ b/arch/arm/mach-ks8695/include/mach/io.h
@@ -13,7 +13,7 @@
13 13
14#define IO_SPACE_LIMIT 0xffffffff 14#define IO_SPACE_LIMIT 0xffffffff
15 15
16#define __io(a) ((void __iomem *)(a)) 16#define __io(a) __typesafe_io(a)
17#define __mem_pci(a) (a) 17#define __mem_pci(a) (a)
18 18
19#endif 19#endif
diff --git a/arch/arm/mach-ks8695/include/mach/memory.h b/arch/arm/mach-ks8695/include/mach/memory.h
index 8fbc4c76c38b..6d5887cf5742 100644
--- a/arch/arm/mach-ks8695/include/mach/memory.h
+++ b/arch/arm/mach-ks8695/include/mach/memory.h
@@ -37,11 +37,6 @@ extern struct bus_type platform_bus_type;
37 (dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); }) 37 (dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); })
38#define __arch_page_to_dma(dev, x) __arch_virt_to_dma(dev, page_address(x)) 38#define __arch_page_to_dma(dev, x) __arch_virt_to_dma(dev, page_address(x))
39 39
40#else
41
42#define __virt_to_bus(x) __virt_to_phys(x)
43#define __bus_to_virt(x) __phys_to_virt(x)
44
45#endif 40#endif
46 41
47#endif 42#endif
diff --git a/arch/arm/mach-l7200/include/mach/dma.h b/arch/arm/mach-l7200/include/mach/dma.h
deleted file mode 100644
index c7e48bd4590c..000000000000
--- a/arch/arm/mach-l7200/include/mach/dma.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/arm/mach-l7200/include/mach/dma.h
3 *
4 * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
5 *
6 * Changelog:
7 * 08-29-2000 SJH Created
8 */
9#ifndef __ASM_ARCH_DMA_H
10#define __ASM_ARCH_DMA_H
11
12/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
13
14/*
15 * This is the maximum DMA address that can be DMAd to.
16 * There should not be more than (0xd0000000 - 0xc0000000)
17 * bytes of RAM.
18 */
19#define MAX_DMA_ADDRESS 0xd0000000
20
21#define DMA_S0 0
22
23#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-l7200/include/mach/io.h b/arch/arm/mach-l7200/include/mach/io.h
index d432ba9e5dff..a770a89fb708 100644
--- a/arch/arm/mach-l7200/include/mach/io.h
+++ b/arch/arm/mach-l7200/include/mach/io.h
@@ -10,18 +10,12 @@
10#ifndef __ASM_ARM_ARCH_IO_H 10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H 11#define __ASM_ARM_ARCH_IO_H
12 12
13#include <mach/hardware.h>
14
15#define IO_SPACE_LIMIT 0xffffffff 13#define IO_SPACE_LIMIT 0xffffffff
16 14
17/* 15/*
18 * There are not real ISA nor PCI buses, so we fake it. 16 * There are not real ISA nor PCI buses, so we fake it.
19 */ 17 */
20static inline void __iomem *__io(unsigned long addr) 18#define __io(a) __typesafe_io(a)
21{ 19#define __mem_pci(a) (a)
22 return (void __iomem *)addr;
23}
24#define __io(a) __io(a)
25#define __mem_pci(a) (a)
26 20
27#endif 21#endif
diff --git a/arch/arm/mach-l7200/include/mach/memory.h b/arch/arm/mach-l7200/include/mach/memory.h
index f338cf3ffd93..9fb40ed2f03b 100644
--- a/arch/arm/mach-l7200/include/mach/memory.h
+++ b/arch/arm/mach-l7200/include/mach/memory.h
@@ -17,9 +17,6 @@
17 */ 17 */
18#define PHYS_OFFSET UL(0xf0000000) 18#define PHYS_OFFSET UL(0xf0000000)
19 19
20#define __virt_to_bus(x) __virt_to_phys(x)
21#define __bus_to_virt(x) __phys_to_virt(x)
22
23/* 20/*
24 * Cache flushing area - ROM 21 * Cache flushing area - ROM
25 */ 22 */
diff --git a/arch/arm/mach-lh7a40x/clocks.c b/arch/arm/mach-lh7a40x/clocks.c
index 4fb23ac6b5ac..6182f5410b4d 100644
--- a/arch/arm/mach-lh7a40x/clocks.c
+++ b/arch/arm/mach-lh7a40x/clocks.c
@@ -14,21 +14,14 @@
14#include <linux/err.h> 14#include <linux/err.h>
15 15
16struct module; 16struct module;
17struct icst525_params;
18 17
19struct clk { 18struct clk {
20 struct list_head node; 19 struct list_head node;
21 unsigned long rate; 20 unsigned long rate;
22 struct module *owner; 21 struct module *owner;
23 const char *name; 22 const char *name;
24// void *data;
25// const struct icst525_params *params;
26// void (*setvco)(struct clk *, struct icst525_vco vco);
27}; 23};
28 24
29int clk_register(struct clk *clk);
30void clk_unregister(struct clk *clk);
31
32/* ----- */ 25/* ----- */
33 26
34#define MAINDIV1(c) (((c) >> 7) & 0x0f) 27#define MAINDIV1(c) (((c) >> 7) & 0x0f)
@@ -79,31 +72,15 @@ unsigned int pclkfreq_get (void)
79 72
80/* ----- */ 73/* ----- */
81 74
82static LIST_HEAD(clocks);
83static DECLARE_MUTEX(clocks_sem);
84
85struct clk *clk_get (struct device *dev, const char *id) 75struct clk *clk_get (struct device *dev, const char *id)
86{ 76{
87 struct clk *p; 77 return dev && strcmp(dev_name(dev), "cldc-lh7a40x") == 0
88 struct clk *clk = ERR_PTR(-ENOENT); 78 ? NULL : ERR_PTR(-ENOENT);
89
90 down (&clocks_sem);
91 list_for_each_entry (p, &clocks, node) {
92 if (strcmp (id, p->name) == 0
93 && try_module_get(p->owner)) {
94 clk = p;
95 break;
96 }
97 }
98 up (&clocks_sem);
99
100 return clk;
101} 79}
102EXPORT_SYMBOL(clk_get); 80EXPORT_SYMBOL(clk_get);
103 81
104void clk_put (struct clk *clk) 82void clk_put (struct clk *clk)
105{ 83{
106 module_put(clk->owner);
107} 84}
108EXPORT_SYMBOL(clk_put); 85EXPORT_SYMBOL(clk_put);
109 86
@@ -118,20 +95,9 @@ void clk_disable (struct clk *clk)
118} 95}
119EXPORT_SYMBOL(clk_disable); 96EXPORT_SYMBOL(clk_disable);
120 97
121int clk_use (struct clk *clk)
122{
123 return 0;
124}
125EXPORT_SYMBOL(clk_use);
126
127void clk_unuse (struct clk *clk)
128{
129}
130EXPORT_SYMBOL(clk_unuse);
131
132unsigned long clk_get_rate (struct clk *clk) 98unsigned long clk_get_rate (struct clk *clk)
133{ 99{
134 return clk->rate; 100 return 0;
135} 101}
136EXPORT_SYMBOL(clk_get_rate); 102EXPORT_SYMBOL(clk_get_rate);
137 103
@@ -143,56 +109,6 @@ EXPORT_SYMBOL(clk_round_rate);
143 109
144int clk_set_rate (struct clk *clk, unsigned long rate) 110int clk_set_rate (struct clk *clk, unsigned long rate)
145{ 111{
146 int ret = -EIO; 112 return -EIO;
147 return ret;
148} 113}
149EXPORT_SYMBOL(clk_set_rate); 114EXPORT_SYMBOL(clk_set_rate);
150
151#if 0
152/*
153 * These are fixed clocks.
154 */
155static struct clk kmi_clk = {
156 .name = "KMIREFCLK",
157 .rate = 24000000,
158};
159
160static struct clk uart_clk = {
161 .name = "UARTCLK",
162 .rate = 24000000,
163};
164
165static struct clk mmci_clk = {
166 .name = "MCLK",
167 .rate = 33000000,
168};
169#endif
170
171static struct clk clcd_clk = {
172 .name = "CLCDCLK",
173 .rate = 0,
174};
175
176int clk_register (struct clk *clk)
177{
178 down (&clocks_sem);
179 list_add (&clk->node, &clocks);
180 up (&clocks_sem);
181 return 0;
182}
183EXPORT_SYMBOL(clk_register);
184
185void clk_unregister (struct clk *clk)
186{
187 down (&clocks_sem);
188 list_del (&clk->node);
189 up (&clocks_sem);
190}
191EXPORT_SYMBOL(clk_unregister);
192
193static int __init clk_init (void)
194{
195 clk_register(&clcd_clk);
196 return 0;
197}
198arch_initcall(clk_init);
diff --git a/arch/arm/mach-lh7a40x/include/mach/io.h b/arch/arm/mach-lh7a40x/include/mach/io.h
index 031d26f9163c..6ece45911cbc 100644
--- a/arch/arm/mach-lh7a40x/include/mach/io.h
+++ b/arch/arm/mach-lh7a40x/include/mach/io.h
@@ -11,12 +11,10 @@
11#ifndef __ASM_ARCH_IO_H 11#ifndef __ASM_ARCH_IO_H
12#define __ASM_ARCH_IO_H 12#define __ASM_ARCH_IO_H
13 13
14#include <mach/hardware.h>
15
16#define IO_SPACE_LIMIT 0xffffffff 14#define IO_SPACE_LIMIT 0xffffffff
17 15
18/* No ISA or PCI bus on this machine. */ 16/* No ISA or PCI bus on this machine. */
19#define __io(a) ((void __iomem *)(a)) 17#define __io(a) __typesafe_io(a)
20#define __mem_pci(a) (a) 18#define __mem_pci(a) (a)
21 19
22#endif /* __ASM_ARCH_IO_H */ 20#endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-lh7a40x/include/mach/memory.h b/arch/arm/mach-lh7a40x/include/mach/memory.h
index 1da14ff66c93..189d20e543e7 100644
--- a/arch/arm/mach-lh7a40x/include/mach/memory.h
+++ b/arch/arm/mach-lh7a40x/include/mach/memory.h
@@ -19,16 +19,6 @@
19 */ 19 */
20#define PHYS_OFFSET UL(0xc0000000) 20#define PHYS_OFFSET UL(0xc0000000)
21 21
22/*
23 * Virtual view <-> DMA view memory address translations
24 * virt_to_bus: Used to translate the virtual address to an
25 * address suitable to be passed to set_dma_addr
26 * bus_to_virt: Used to convert an address for DMA operations
27 * to an address that the kernel can use.
28 */
29#define __virt_to_bus(x) __virt_to_phys(x)
30#define __bus_to_virt(x) __phys_to_virt(x)
31
32#ifdef CONFIG_DISCONTIGMEM 22#ifdef CONFIG_DISCONTIGMEM
33 23
34/* 24/*
diff --git a/arch/arm/mach-loki/include/mach/dma.h b/arch/arm/mach-loki/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-loki/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/arm/mach-loki/include/mach/memory.h b/arch/arm/mach-loki/include/mach/memory.h
index a39533ab489d..2ed7e6e732c2 100644
--- a/arch/arm/mach-loki/include/mach/memory.h
+++ b/arch/arm/mach-loki/include/mach/memory.h
@@ -7,8 +7,4 @@
7 7
8#define PHYS_OFFSET UL(0x00000000) 8#define PHYS_OFFSET UL(0x00000000)
9 9
10#define __virt_to_bus(x) __virt_to_phys(x)
11#define __bus_to_virt(x) __phys_to_virt(x)
12
13
14#endif 10#endif
diff --git a/arch/arm/mach-msm/include/mach/io.h b/arch/arm/mach-msm/include/mach/io.h
index c6a2feb268b0..aab964591db4 100644
--- a/arch/arm/mach-msm/include/mach/io.h
+++ b/arch/arm/mach-msm/include/mach/io.h
@@ -23,11 +23,7 @@
23 23
24void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype); 24void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
25 25
26static inline void __iomem *__io(unsigned long addr) 26#define __io(a) __typesafe_io(a)
27{
28 return (void __iomem *)addr;
29}
30#define __io(a) __io(a)
31#define __mem_pci(a) (a) 27#define __mem_pci(a) (a)
32 28
33#endif 29#endif
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
index 63fd47f2e62e..f4698baec976 100644
--- a/arch/arm/mach-msm/include/mach/memory.h
+++ b/arch/arm/mach-msm/include/mach/memory.h
@@ -19,9 +19,5 @@
19/* physical offset of RAM */ 19/* physical offset of RAM */
20#define PHYS_OFFSET UL(0x10000000) 20#define PHYS_OFFSET UL(0x10000000)
21 21
22/* bus address and physical addresses are identical */
23#define __virt_to_bus(x) __virt_to_phys(x)
24#define __bus_to_virt(x) __phys_to_virt(x)
25
26#endif 22#endif
27 23
diff --git a/arch/arm/mach-mv78xx0/include/mach/dma.h b/arch/arm/mach-mv78xx0/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-mv78xx0/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/arm/mach-mv78xx0/include/mach/memory.h b/arch/arm/mach-mv78xx0/include/mach/memory.h
index 9e47a140ff7a..e663042d307f 100644
--- a/arch/arm/mach-mv78xx0/include/mach/memory.h
+++ b/arch/arm/mach-mv78xx0/include/mach/memory.h
@@ -7,8 +7,4 @@
7 7
8#define PHYS_OFFSET UL(0x00000000) 8#define PHYS_OFFSET UL(0x00000000)
9 9
10#define __virt_to_bus(x) __virt_to_phys(x)
11#define __bus_to_virt(x) __phys_to_virt(x)
12
13
14#endif 10#endif
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c
index 24c79650f9f3..8f1f992f002e 100644
--- a/arch/arm/mach-netx/fb.c
+++ b/arch/arm/mach-netx/fb.c
@@ -22,14 +22,11 @@
22#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
23#include <linux/amba/bus.h> 23#include <linux/amba/bus.h>
24#include <linux/amba/clcd.h> 24#include <linux/amba/clcd.h>
25#include <linux/err.h>
25 26
26#include <mach/netx-regs.h> 27#include <mach/netx-regs.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28 29
29struct clk {};
30
31static struct clk fb_clk;
32
33static struct clcd_panel *netx_panel; 30static struct clcd_panel *netx_panel;
34 31
35void netx_clcd_enable(struct clcd_fb *fb) 32void netx_clcd_enable(struct clcd_fb *fb)
@@ -85,7 +82,7 @@ int clk_enable(struct clk *clk)
85 82
86struct clk *clk_get(struct device *dev, const char *id) 83struct clk *clk_get(struct device *dev, const char *id)
87{ 84{
88 return &fb_clk; 85 return dev && strcmp(dev_name(dev), "fb") == 0 ? NULL : ERR_PTR(-ENOENT);
89} 86}
90 87
91void clk_put(struct clk *clk) 88void clk_put(struct clk *clk)
diff --git a/arch/arm/mach-netx/include/mach/dma.h b/arch/arm/mach-netx/include/mach/dma.h
deleted file mode 100644
index 690b3ebc43ac..000000000000
--- a/arch/arm/mach-netx/include/mach/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-netx/include/mach/dma.h
3 *
4 * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#define MAX_DMA_CHANNELS 0
21#define MAX_DMA_ADDRESS ~0
diff --git a/arch/arm/mach-netx/include/mach/io.h b/arch/arm/mach-netx/include/mach/io.h
index 468b92a82585..c3921cb3b6a6 100644
--- a/arch/arm/mach-netx/include/mach/io.h
+++ b/arch/arm/mach-netx/include/mach/io.h
@@ -22,7 +22,7 @@
22 22
23#define IO_SPACE_LIMIT 0xffffffff 23#define IO_SPACE_LIMIT 0xffffffff
24 24
25#define __io(a) ((void __iomem *)(a)) 25#define __io(a) __typesafe_io(a)
26#define __mem_pci(a) (a) 26#define __mem_pci(a) (a)
27 27
28#endif 28#endif
diff --git a/arch/arm/mach-netx/include/mach/memory.h b/arch/arm/mach-netx/include/mach/memory.h
index 53745a1378de..9a363f297f90 100644
--- a/arch/arm/mach-netx/include/mach/memory.h
+++ b/arch/arm/mach-netx/include/mach/memory.h
@@ -22,15 +22,5 @@
22 22
23#define PHYS_OFFSET UL(0x80000000) 23#define PHYS_OFFSET UL(0x80000000)
24 24
25/*
26 * Virtual view <-> DMA view memory address translations
27 * virt_to_bus: Used to translate the virtual address to an
28 * address suitable to be passed to set_dma_addr
29 * bus_to_virt: Used to convert an address for DMA operations
30 * to an address that the kernel can use.
31 */
32#define __virt_to_bus(x) __virt_to_phys(x)
33#define __bus_to_virt(x) __phys_to_virt(x)
34
35#endif 25#endif
36 26
diff --git a/arch/arm/mach-ns9xxx/include/mach/dma.h b/arch/arm/mach-ns9xxx/include/mach/dma.h
deleted file mode 100644
index 3f50d8c9e5c7..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/dma.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/dma.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H
13
14#endif /* ifndef __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/hardware.h b/arch/arm/mach-ns9xxx/include/mach/hardware.h
index 6dbb2030f563..76631128e11c 100644
--- a/arch/arm/mach-ns9xxx/include/mach/hardware.h
+++ b/arch/arm/mach-ns9xxx/include/mach/hardware.h
@@ -11,8 +11,6 @@
11#ifndef __ASM_ARCH_HARDWARE_H 11#ifndef __ASM_ARCH_HARDWARE_H
12#define __ASM_ARCH_HARDWARE_H 12#define __ASM_ARCH_HARDWARE_H
13 13
14#include <asm/memory.h>
15
16/* 14/*
17 * NetSilicon NS9xxx internal mapping: 15 * NetSilicon NS9xxx internal mapping:
18 * 16 *
diff --git a/arch/arm/mach-ns9xxx/include/mach/io.h b/arch/arm/mach-ns9xxx/include/mach/io.h
index 027bf649645a..f08451d2e1bc 100644
--- a/arch/arm/mach-ns9xxx/include/mach/io.h
+++ b/arch/arm/mach-ns9xxx/include/mach/io.h
@@ -13,7 +13,7 @@
13 13
14#define IO_SPACE_LIMIT 0xffffffff /* XXX */ 14#define IO_SPACE_LIMIT 0xffffffff /* XXX */
15 15
16#define __io(a) ((void __iomem *)(a)) 16#define __io(a) __typesafe_io(a)
17#define __mem_pci(a) (a) 17#define __mem_pci(a) (a)
18#define __mem_isa(a) (IO_BASE + (a)) 18#define __mem_isa(a) (IO_BASE + (a))
19 19
diff --git a/arch/arm/mach-ns9xxx/include/mach/memory.h b/arch/arm/mach-ns9xxx/include/mach/memory.h
index 649ee6235b94..6107193adbfe 100644
--- a/arch/arm/mach-ns9xxx/include/mach/memory.h
+++ b/arch/arm/mach-ns9xxx/include/mach/memory.h
@@ -21,7 +21,4 @@
21 21
22#define PHYS_OFFSET UL(0x00000000) 22#define PHYS_OFFSET UL(0x00000000)
23 23
24#define __virt_to_bus(x) __virt_to_phys(x)
25#define __bus_to_virt(x) __phys_to_virt(x)
26
27#endif 24#endif
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 79f0b1f8497b..10a301e32434 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -4,16 +4,19 @@ comment "OMAP Core Type"
4config ARCH_OMAP730 4config ARCH_OMAP730
5 depends on ARCH_OMAP1 5 depends on ARCH_OMAP1
6 bool "OMAP730 Based System" 6 bool "OMAP730 Based System"
7 select CPU_ARM926T
7 select ARCH_OMAP_OTG 8 select ARCH_OMAP_OTG
8 9
9config ARCH_OMAP15XX 10config ARCH_OMAP15XX
10 depends on ARCH_OMAP1 11 depends on ARCH_OMAP1
11 default y 12 default y
12 bool "OMAP15xx Based System" 13 bool "OMAP15xx Based System"
14 select CPU_ARM925T
13 15
14config ARCH_OMAP16XX 16config ARCH_OMAP16XX
15 depends on ARCH_OMAP1 17 depends on ARCH_OMAP1
16 bool "OMAP16xx Based System" 18 bool "OMAP16xx Based System"
19 select CPU_ARM926T
17 select ARCH_OMAP_OTG 20 select ARCH_OMAP_OTG
18 21
19comment "OMAP Board Type" 22comment "OMAP Board Type"
diff --git a/arch/arm/mach-orion5x/include/mach/dma.h b/arch/arm/mach-orion5x/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-orion5x/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
index f24b2513f7f3..c47b033bd999 100644
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -38,14 +38,9 @@ __arch_iounmap(void __iomem *addr)
38 __iounmap(addr); 38 __iounmap(addr);
39} 39}
40 40
41static inline void __iomem *__io(unsigned long addr)
42{
43 return (void __iomem *)addr;
44}
45
46#define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m) 41#define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m)
47#define __arch_iounmap(a) __arch_iounmap(a) 42#define __arch_iounmap(a) __arch_iounmap(a)
48#define __io(a) __io(a) 43#define __io(a) __typesafe_io(a)
49#define __mem_pci(a) (a) 44#define __mem_pci(a) (a)
50 45
51 46
diff --git a/arch/arm/mach-orion5x/include/mach/memory.h b/arch/arm/mach-orion5x/include/mach/memory.h
index 54dd76b013f2..52a2955d0f87 100644
--- a/arch/arm/mach-orion5x/include/mach/memory.h
+++ b/arch/arm/mach-orion5x/include/mach/memory.h
@@ -9,8 +9,4 @@
9 9
10#define PHYS_OFFSET UL(0x00000000) 10#define PHYS_OFFSET UL(0x00000000)
11 11
12#define __virt_to_bus(x) __virt_to_phys(x)
13#define __bus_to_virt(x) __phys_to_virt(x)
14
15
16#endif 12#endif
diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c
index ac2f70eddb9e..425f7188505e 100644
--- a/arch/arm/mach-pnx4008/dma.c
+++ b/arch/arm/mach-pnx4008/dma.c
@@ -25,9 +25,8 @@
25 25
26#include <asm/system.h> 26#include <asm/system.h>
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <asm/dma.h> 28#include <mach/dma.h>
29#include <asm/dma-mapping.h> 29#include <asm/dma-mapping.h>
30#include <asm/mach/dma.h>
31#include <mach/clock.h> 30#include <mach/clock.h>
32 31
33static struct dma_channel { 32static struct dma_channel {
diff --git a/arch/arm/mach-pnx4008/include/mach/dma.h b/arch/arm/mach-pnx4008/include/mach/dma.h
index 5442d04fc575..f094bf8bfb18 100644
--- a/arch/arm/mach-pnx4008/include/mach/dma.h
+++ b/arch/arm/mach-pnx4008/include/mach/dma.h
@@ -16,8 +16,6 @@
16 16
17#include "platform.h" 17#include "platform.h"
18 18
19#define MAX_DMA_ADDRESS 0xffffffff
20
21#define MAX_DMA_CHANNELS 8 19#define MAX_DMA_CHANNELS 8
22 20
23#define DMAC_BASE IO_ADDRESS(PNX4008_DMA_CONFIG_BASE) 21#define DMAC_BASE IO_ADDRESS(PNX4008_DMA_CONFIG_BASE)
diff --git a/arch/arm/mach-pnx4008/include/mach/io.h b/arch/arm/mach-pnx4008/include/mach/io.h
index c6206f25839d..cbf0904540ea 100644
--- a/arch/arm/mach-pnx4008/include/mach/io.h
+++ b/arch/arm/mach-pnx4008/include/mach/io.h
@@ -15,7 +15,7 @@
15 15
16#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
17 17
18#define __io(a) ((void __iomem *)(a)) 18#define __io(a) __typesafe_io(a)
19#define __mem_pci(a) (a) 19#define __mem_pci(a) (a)
20 20
21#endif 21#endif
diff --git a/arch/arm/mach-pnx4008/include/mach/memory.h b/arch/arm/mach-pnx4008/include/mach/memory.h
index 5789a2d16f5a..0e8770081058 100644
--- a/arch/arm/mach-pnx4008/include/mach/memory.h
+++ b/arch/arm/mach-pnx4008/include/mach/memory.h
@@ -16,9 +16,6 @@
16/* 16/*
17 * Physical DRAM offset. 17 * Physical DRAM offset.
18 */ 18 */
19#define PHYS_OFFSET (0x80000000) 19#define PHYS_OFFSET UL(0x80000000)
20
21#define __virt_to_bus(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
22#define __bus_to_virt(x) ((x) + PAGE_OFFSET - PHYS_OFFSET)
23 20
24#endif 21#endif
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index a062235e83a8..6755c7d6bb31 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -19,6 +19,9 @@ config CPU_PXA320
19config CPU_PXA930 19config CPU_PXA930
20 bool "PXA930 (codename Tavor-P)" 20 bool "PXA930 (codename Tavor-P)"
21 21
22config CPU_PXA935
23 bool "PXA935 (codename Tavor-P65)"
24
22endmenu 25endmenu
23 26
24endif 27endif
@@ -199,6 +202,10 @@ config MACH_E800
199config TRIZEPS_PXA 202config TRIZEPS_PXA
200 bool "PXA based Keith und Koep Trizeps DIMM-Modules" 203 bool "PXA based Keith und Koep Trizeps DIMM-Modules"
201 204
205config MACH_H5000
206 bool "HP iPAQ h5000"
207 select PXA25x
208
202config MACH_TRIZEPS4 209config MACH_TRIZEPS4
203 bool "Keith und Koep Trizeps4 DIMM-Module" 210 bool "Keith und Koep Trizeps4 DIMM-Module"
204 depends on TRIZEPS_PXA 211 depends on TRIZEPS_PXA
@@ -283,7 +290,6 @@ config MACH_MIOA701
283 bool "Mitac Mio A701 Support" 290 bool "Mitac Mio A701 Support"
284 select PXA27x 291 select PXA27x
285 select IWMMXT 292 select IWMMXT
286 select LEDS_GPIO
287 select HAVE_PWM 293 select HAVE_PWM
288 select GPIO_SYSFS 294 select GPIO_SYSFS
289 help 295 help
@@ -386,16 +392,25 @@ endmenu
386 392
387config PXA25x 393config PXA25x
388 bool 394 bool
395 select CPU_XSCALE
389 help 396 help
390 Select code specific to PXA21x/25x/26x variants 397 Select code specific to PXA21x/25x/26x variants
391 398
392config PXA27x 399config PXA27x
393 bool 400 bool
401 select CPU_XSCALE
394 help 402 help
395 Select code specific to PXA27x variants 403 Select code specific to PXA27x variants
396 404
405config CPU_PXA26x
406 bool
407 select PXA25x
408 help
409 Select code specific to PXA26x (codename Dalhart)
410
397config PXA3xx 411config PXA3xx
398 bool 412 bool
413 select CPU_XSC3
399 help 414 help
400 Select code specific to PXA3xx variants 415 Select code specific to PXA3xx variants
401 416
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index d64c68b232e3..dc184eae5109 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_MACH_MP900C) += mp900.o
35obj-$(CONFIG_ARCH_PXA_IDP) += idp.o 35obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
36obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o 36obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
37obj-$(CONFIG_MACH_COLIBRI) += colibri.o 37obj-$(CONFIG_MACH_COLIBRI) += colibri.o
38obj-$(CONFIG_MACH_H5000) += h5000.o
38obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o 39obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o
39obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o 40obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o
40obj-$(CONFIG_CORGI_SSP_DEPRECATED) += corgi_ssp.o corgi_lcd.o 41obj-$(CONFIG_CORGI_SSP_DEPRECATED) += corgi_ssp.o corgi_lcd.o
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index b965085a37b9..3a4f8d855a52 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -30,8 +30,12 @@
30#include <linux/irq.h> 30#include <linux/irq.h>
31#include <linux/gpio.h> 31#include <linux/gpio.h>
32 32
33#include <mach/gumstix.h>
34#include <mach/mfp-pxa25x.h>
33#include <mach/pxafb.h> 35#include <mach/pxafb.h>
34 36
37#include "generic.h"
38
35#include <video/metronomefb.h> 39#include <video/metronomefb.h>
36 40
37static unsigned int panel_type = 6; 41static unsigned int panel_type = 6;
@@ -331,6 +335,15 @@ static struct metronome_board am200_board = {
331 .cleanup = am200_cleanup, 335 .cleanup = am200_cleanup,
332}; 336};
333 337
338static unsigned long am200_pin_config[] __initdata = {
339 GPIO51_GPIO,
340 GPIO49_GPIO,
341 GPIO48_GPIO,
342 GPIO32_GPIO,
343 GPIO17_GPIO,
344 GPIO16_GPIO,
345};
346
334static int __init am200_init(void) 347static int __init am200_init(void)
335{ 348{
336 int ret; 349 int ret;
@@ -339,6 +352,8 @@ static int __init am200_init(void)
339 * creation events */ 352 * creation events */
340 fb_register_client(&am200_fb_notif); 353 fb_register_client(&am200_fb_notif);
341 354
355 pxa2xx_mfp_config(ARRAY_AND_SIZE(am200_pin_config));
356
342 /* request our platform independent driver */ 357 /* request our platform independent driver */
343 request_module("metronomefb"); 358 request_module("metronomefb");
344 359
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index ca8e20538157..40b774084514 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -12,53 +12,16 @@
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/delay.h> 13#include <linux/delay.h>
14 14
15#include <asm/clkdev.h>
15#include <mach/pxa2xx-regs.h> 16#include <mach/pxa2xx-regs.h>
16#include <mach/pxa2xx-gpio.h>
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18 18
19#include "devices.h" 19#include "devices.h"
20#include "generic.h" 20#include "generic.h"
21#include "clock.h" 21#include "clock.h"
22 22
23static LIST_HEAD(clocks);
24static DEFINE_MUTEX(clocks_mutex);
25static DEFINE_SPINLOCK(clocks_lock); 23static DEFINE_SPINLOCK(clocks_lock);
26 24
27static struct clk *clk_lookup(struct device *dev, const char *id)
28{
29 struct clk *p;
30
31 list_for_each_entry(p, &clocks, node)
32 if (strcmp(id, p->name) == 0 && p->dev == dev)
33 return p;
34
35 return NULL;
36}
37
38struct clk *clk_get(struct device *dev, const char *id)
39{
40 struct clk *p, *clk = ERR_PTR(-ENOENT);
41
42 mutex_lock(&clocks_mutex);
43 p = clk_lookup(dev, id);
44 if (!p)
45 p = clk_lookup(NULL, id);
46 if (p)
47 clk = p;
48 mutex_unlock(&clocks_mutex);
49
50 if (!IS_ERR(clk) && clk->ops == NULL)
51 clk = clk->other;
52
53 return clk;
54}
55EXPORT_SYMBOL(clk_get);
56
57void clk_put(struct clk *clk)
58{
59}
60EXPORT_SYMBOL(clk_put);
61
62int clk_enable(struct clk *clk) 25int clk_enable(struct clk *clk)
63{ 26{
64 unsigned long flags; 27 unsigned long flags;
@@ -116,37 +79,27 @@ const struct clkops clk_cken_ops = {
116 .disable = clk_cken_disable, 79 .disable = clk_cken_disable,
117}; 80};
118 81
119void clks_register(struct clk *clks, size_t num) 82void clks_register(struct clk_lookup *clks, size_t num)
120{ 83{
121 int i; 84 int i;
122 85
123 mutex_lock(&clocks_mutex);
124 for (i = 0; i < num; i++) 86 for (i = 0; i < num; i++)
125 list_add(&clks[i].node, &clocks); 87 clkdev_add(&clks[i]);
126 mutex_unlock(&clocks_mutex);
127} 88}
128 89
129int clk_add_alias(char *alias, struct device *alias_dev, char *id, 90int clk_add_alias(char *alias, struct device *alias_dev, char *id,
130 struct device *dev) 91 struct device *dev)
131{ 92{
132 struct clk *r = clk_lookup(dev, id); 93 struct clk *r = clk_get(dev, id);
133 struct clk *new; 94 struct clk_lookup *l;
134 95
135 if (!r) 96 if (!r)
136 return -ENODEV; 97 return -ENODEV;
137 98
138 new = kzalloc(sizeof(struct clk), GFP_KERNEL); 99 l = clkdev_alloc(r, alias, alias_dev ? dev_name(alias_dev) : NULL);
139 100 clk_put(r);
140 if (!new) 101 if (!l)
141 return -ENOMEM; 102 return -ENODEV;
142 103 clkdev_add(l);
143 new->name = alias;
144 new->dev = alias_dev;
145 new->other = r;
146
147 mutex_lock(&clocks_mutex);
148 list_add(&new->node, &clocks);
149 mutex_unlock(&clocks_mutex);
150
151 return 0; 104 return 0;
152} 105}
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index 73be795fe3bf..4e9c613c6767 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -1,6 +1,4 @@
1#include <linux/list.h> 1#include <asm/clkdev.h>
2
3struct clk;
4 2
5struct clkops { 3struct clkops {
6 void (*enable)(struct clk *); 4 void (*enable)(struct clk *);
@@ -9,9 +7,6 @@ struct clkops {
9}; 7};
10 8
11struct clk { 9struct clk {
12 struct list_head node;
13 const char *name;
14 struct device *dev;
15 const struct clkops *ops; 10 const struct clkops *ops;
16 unsigned long rate; 11 unsigned long rate;
17 unsigned int cken; 12 unsigned int cken;
@@ -20,41 +15,31 @@ struct clk {
20 struct clk *other; 15 struct clk *other;
21}; 16};
22 17
23#define INIT_CKEN(_name, _cken, _rate, _delay, _dev) \ 18#define INIT_CLKREG(_clk,_devname,_conname) \
24 { \ 19 { \
25 .name = _name, \ 20 .clk = _clk, \
26 .dev = _dev, \ 21 .dev_id = _devname, \
22 .con_id = _conname, \
23 }
24
25#define DEFINE_CKEN(_name, _cken, _rate, _delay) \
26struct clk clk_##_name = { \
27 .ops = &clk_cken_ops, \ 27 .ops = &clk_cken_ops, \
28 .rate = _rate, \ 28 .rate = _rate, \
29 .cken = CKEN_##_cken, \ 29 .cken = CKEN_##_cken, \
30 .delay = _delay, \ 30 .delay = _delay, \
31 } 31 }
32 32
33#define INIT_CK(_name, _cken, _ops, _dev) \ 33#define DEFINE_CK(_name, _cken, _ops) \
34 { \ 34struct clk clk_##_name = { \
35 .name = _name, \
36 .dev = _dev, \
37 .ops = _ops, \ 35 .ops = _ops, \
38 .cken = CKEN_##_cken, \ 36 .cken = CKEN_##_cken, \
39 } 37 }
40 38
41/* 39#define DEFINE_CLK(_name, _ops, _rate, _delay) \
42 * This is a placeholder to alias one clock device+name pair 40struct clk clk_##_name = { \
43 * to another struct clk. 41 .ops = _ops, \
44 */ 42 .rate = _rate, \
45#define INIT_CKOTHER(_name, _other, _dev) \
46 { \
47 .name = _name, \
48 .dev = _dev, \
49 .other = _other, \
50 }
51
52#define INIT_CLK(_name, _ops, _rate, _delay, _dev) \
53 { \
54 .name = _name, \
55 .dev = _dev, \
56 .ops = _ops, \
57 .rate = _rate, \
58 .delay = _delay, \ 43 .delay = _delay, \
59 } 44 }
60 45
@@ -64,20 +49,16 @@ void clk_cken_enable(struct clk *clk);
64void clk_cken_disable(struct clk *clk); 49void clk_cken_disable(struct clk *clk);
65 50
66#ifdef CONFIG_PXA3xx 51#ifdef CONFIG_PXA3xx
67#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \ 52#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \
68 { \ 53struct clk clk_##_name = { \
69 .name = _name, \
70 .dev = _dev, \
71 .ops = &clk_pxa3xx_cken_ops, \ 54 .ops = &clk_pxa3xx_cken_ops, \
72 .rate = _rate, \ 55 .rate = _rate, \
73 .cken = CKEN_##_cken, \ 56 .cken = CKEN_##_cken, \
74 .delay = _delay, \ 57 .delay = _delay, \
75 } 58 }
76 59
77#define PXA3xx_CK(_name, _cken, _ops, _dev) \ 60#define DEFINE_PXA3_CK(_name, _cken, _ops) \
78 { \ 61struct clk clk_##_name = { \
79 .name = _name, \
80 .dev = _dev, \
81 .ops = _ops, \ 62 .ops = _ops, \
82 .cken = CKEN_##_cken, \ 63 .cken = CKEN_##_cken, \
83 } 64 }
@@ -87,7 +68,7 @@ extern void clk_pxa3xx_cken_enable(struct clk *);
87extern void clk_pxa3xx_cken_disable(struct clk *); 68extern void clk_pxa3xx_cken_disable(struct clk *);
88#endif 69#endif
89 70
90void clks_register(struct clk *clks, size_t num); 71void clks_register(struct clk_lookup *clks, size_t num);
91int clk_add_alias(char *alias, struct device *alias_dev, char *id, 72int clk_add_alias(char *alias, struct device *alias_dev, char *id,
92 struct device *dev); 73 struct device *dev);
93 74
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index deb46cd144bf..ff0c577cd1ac 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -31,7 +31,6 @@
31#include <mach/mfp-pxa300.h> 31#include <mach/mfp-pxa300.h>
32 32
33#include <mach/hardware.h> 33#include <mach/hardware.h>
34#include <mach/gpio.h>
35#include <mach/pxafb.h> 34#include <mach/pxafb.h>
36#include <mach/mmc.h> 35#include <mach/mmc.h>
37#include <mach/ohci.h> 36#include <mach/ohci.h>
@@ -137,6 +136,10 @@ static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
137 GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */ 136 GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */
138 GPIO85_GPIO, /* MMC WP */ 137 GPIO85_GPIO, /* MMC WP */
139 GPIO99_GPIO, /* Ethernet IRQ */ 138 GPIO99_GPIO, /* Ethernet IRQ */
139
140 /* Standard I2C */
141 GPIO21_I2C_SCL,
142 GPIO22_I2C_SDA,
140}; 143};
141 144
142#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) 145#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 65558d6aa220..c5e28a46b292 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -19,6 +19,7 @@
19#include <linux/fs.h> 19#include <linux/fs.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/mmc/host.h> 21#include <linux/mmc/host.h>
22#include <linux/mtd/physmap.h>
22#include <linux/pm.h> 23#include <linux/pm.h>
23#include <linux/gpio.h> 24#include <linux/gpio.h>
24#include <linux/backlight.h> 25#include <linux/backlight.h>
@@ -541,11 +542,42 @@ err_free_1:
541static inline void corgi_init_spi(void) {} 542static inline void corgi_init_spi(void) {}
542#endif 543#endif
543 544
545static struct mtd_partition sharpsl_rom_parts[] = {
546 {
547 .name ="Boot PROM Filesystem",
548 .offset = 0x00120000,
549 .size = MTDPART_SIZ_FULL,
550 },
551};
552
553static struct physmap_flash_data sharpsl_rom_data = {
554 .width = 2,
555 .nr_parts = ARRAY_SIZE(sharpsl_rom_parts),
556 .parts = sharpsl_rom_parts,
557};
558
559static struct resource sharpsl_rom_resources[] = {
560 {
561 .start = 0x00000000,
562 .end = 0x007fffff,
563 .flags = IORESOURCE_MEM,
564 },
565};
566
567static struct platform_device sharpsl_rom_device = {
568 .name = "physmap-flash",
569 .id = -1,
570 .resource = sharpsl_rom_resources,
571 .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
572 .dev.platform_data = &sharpsl_rom_data,
573};
574
544static struct platform_device *devices[] __initdata = { 575static struct platform_device *devices[] __initdata = {
545 &corgiscoop_device, 576 &corgiscoop_device,
546 &corgifb_device, 577 &corgifb_device,
547 &corgikbd_device, 578 &corgikbd_device,
548 &corgiled_device, 579 &corgiled_device,
580 &sharpsl_rom_device,
549}; 581};
550 582
551static void corgi_poweroff(void) 583static void corgi_poweroff(void)
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 1f272ea83f36..771dd4eac935 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -64,7 +64,7 @@ typedef struct {
64 64
65/* Define the refresh period in mSec for the SDRAM and the number of rows */ 65/* Define the refresh period in mSec for the SDRAM and the number of rows */
66#define SDRAM_TREF 64 /* standard 64ms SDRAM */ 66#define SDRAM_TREF 64 /* standard 64ms SDRAM */
67#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */ 67static unsigned int sdram_rows;
68 68
69#define CCLKCFG_TURBO 0x1 69#define CCLKCFG_TURBO 0x1
70#define CCLKCFG_FCS 0x2 70#define CCLKCFG_FCS 0x2
@@ -73,6 +73,9 @@ typedef struct {
73#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2) 73#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
74#define MDREFR_DRI_MASK 0xFFF 74#define MDREFR_DRI_MASK 0xFFF
75 75
76#define MDCNFG_DRAC2(mdcnfg) (((mdcnfg) >> 21) & 0x3)
77#define MDCNFG_DRAC0(mdcnfg) (((mdcnfg) >> 5) & 0x3)
78
76/* 79/*
77 * PXA255 definitions 80 * PXA255 definitions
78 */ 81 */
@@ -109,6 +112,10 @@ static struct cpufreq_frequency_table
109static struct cpufreq_frequency_table 112static struct cpufreq_frequency_table
110 pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1]; 113 pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1];
111 114
115static unsigned int pxa255_turbo_table;
116module_param(pxa255_turbo_table, uint, 0);
117MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table, !0 = turbo table)");
118
112/* 119/*
113 * PXA270 definitions 120 * PXA270 definitions
114 * 121 *
@@ -158,22 +165,16 @@ static struct cpufreq_frequency_table
158 165
159extern unsigned get_clk_frequency_khz(int info); 166extern unsigned get_clk_frequency_khz(int info);
160 167
161static void find_freq_tables(struct cpufreq_policy *policy, 168static void find_freq_tables(struct cpufreq_frequency_table **freq_table,
162 struct cpufreq_frequency_table **freq_table,
163 pxa_freqs_t **pxa_freqs) 169 pxa_freqs_t **pxa_freqs)
164{ 170{
165 if (cpu_is_pxa25x()) { 171 if (cpu_is_pxa25x()) {
166 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 172 if (!pxa255_turbo_table) {
167 *pxa_freqs = pxa255_run_freqs; 173 *pxa_freqs = pxa255_run_freqs;
168 *freq_table = pxa255_run_freq_table; 174 *freq_table = pxa255_run_freq_table;
169 } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) { 175 } else {
170 *pxa_freqs = pxa255_turbo_freqs; 176 *pxa_freqs = pxa255_turbo_freqs;
171 *freq_table = pxa255_turbo_freq_table; 177 *freq_table = pxa255_turbo_freq_table;
172 } else {
173 printk("CPU PXA: Unknown policy found. "
174 "Using CPUFREQ_POLICY_PERFORMANCE\n");
175 *pxa_freqs = pxa255_run_freqs;
176 *freq_table = pxa255_run_freq_table;
177 } 178 }
178 } 179 }
179 if (cpu_is_pxa27x()) { 180 if (cpu_is_pxa27x()) {
@@ -194,14 +195,28 @@ static void pxa27x_guess_max_freq(void)
194 } 195 }
195} 196}
196 197
198static void init_sdram_rows(void)
199{
200 uint32_t mdcnfg = MDCNFG;
201 unsigned int drac2 = 0, drac0 = 0;
202
203 if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3))
204 drac2 = MDCNFG_DRAC2(mdcnfg);
205
206 if (mdcnfg & (MDCNFG_DE0 | MDCNFG_DE1))
207 drac0 = MDCNFG_DRAC0(mdcnfg);
208
209 sdram_rows = 1 << (11 + max(drac0, drac2));
210}
211
197static u32 mdrefr_dri(unsigned int freq) 212static u32 mdrefr_dri(unsigned int freq)
198{ 213{
199 u32 dri = 0; 214 u32 dri = 0;
200 215
201 if (cpu_is_pxa25x()) 216 if (cpu_is_pxa25x())
202 dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS * 32)); 217 dri = ((freq * SDRAM_TREF) / (sdram_rows * 32));
203 if (cpu_is_pxa27x()) 218 if (cpu_is_pxa27x())
204 dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS - 31)) / 32; 219 dri = ((freq * SDRAM_TREF) / (sdram_rows - 31)) / 32;
205 return dri; 220 return dri;
206} 221}
207 222
@@ -212,7 +227,7 @@ static int pxa_verify_policy(struct cpufreq_policy *policy)
212 pxa_freqs_t *pxa_freqs; 227 pxa_freqs_t *pxa_freqs;
213 int ret; 228 int ret;
214 229
215 find_freq_tables(policy, &pxa_freqs_table, &pxa_freqs); 230 find_freq_tables(&pxa_freqs_table, &pxa_freqs);
216 ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table); 231 ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table);
217 232
218 if (freq_debug) 233 if (freq_debug)
@@ -240,7 +255,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
240 unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg; 255 unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg;
241 256
242 /* Get the current policy */ 257 /* Get the current policy */
243 find_freq_tables(policy, &pxa_freqs_table, &pxa_freq_settings); 258 find_freq_tables(&pxa_freqs_table, &pxa_freq_settings);
244 259
245 /* Lookup the next frequency */ 260 /* Lookup the next frequency */
246 if (cpufreq_frequency_table_target(policy, pxa_freqs_table, 261 if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
@@ -329,11 +344,15 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
329{ 344{
330 int i; 345 int i;
331 unsigned int freq; 346 unsigned int freq;
347 struct cpufreq_frequency_table *pxa255_freq_table;
348 pxa_freqs_t *pxa255_freqs;
332 349
333 /* try to guess pxa27x cpu */ 350 /* try to guess pxa27x cpu */
334 if (cpu_is_pxa27x()) 351 if (cpu_is_pxa27x())
335 pxa27x_guess_max_freq(); 352 pxa27x_guess_max_freq();
336 353
354 init_sdram_rows();
355
337 /* set default policy and cpuinfo */ 356 /* set default policy and cpuinfo */
338 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ 357 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
339 policy->cur = get_clk_frequency_khz(0); /* current freq */ 358 policy->cur = get_clk_frequency_khz(0); /* current freq */
@@ -354,6 +373,8 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
354 } 373 }
355 pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; 374 pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
356 375
376 pxa255_turbo_table = !!pxa255_turbo_table;
377
357 /* Generate the pxa27x cpufreq_frequency_table struct */ 378 /* Generate the pxa27x cpufreq_frequency_table struct */
358 for (i = 0; i < NUM_PXA27x_FREQS; i++) { 379 for (i = 0; i < NUM_PXA27x_FREQS; i++) {
359 freq = pxa27x_freqs[i].khz; 380 freq = pxa27x_freqs[i].khz;
@@ -368,8 +389,12 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
368 * Set the policy's minimum and maximum frequencies from the tables 389 * Set the policy's minimum and maximum frequencies from the tables
369 * just constructed. This sets cpuinfo.mxx_freq, min and max. 390 * just constructed. This sets cpuinfo.mxx_freq, min and max.
370 */ 391 */
371 if (cpu_is_pxa25x()) 392 if (cpu_is_pxa25x()) {
372 cpufreq_frequency_table_cpuinfo(policy, pxa255_run_freq_table); 393 find_freq_tables(&pxa255_freq_table, &pxa255_freqs);
394 pr_info("PXA255 cpufreq using %s frequency table\n",
395 pxa255_turbo_table ? "turbo" : "run");
396 cpufreq_frequency_table_cpuinfo(policy, pxa255_freq_table);
397 }
373 else if (cpu_is_pxa27x()) 398 else if (cpu_is_pxa27x())
374 cpufreq_frequency_table_cpuinfo(policy, pxa27x_freq_table); 399 cpufreq_frequency_table_cpuinfo(policy, pxa27x_freq_table);
375 400
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 35736fc08634..e16f8e3d58d3 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -4,13 +4,12 @@
4#include <linux/platform_device.h> 4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h> 5#include <linux/dma-mapping.h>
6 6
7#include <mach/gpio.h> 7#include <mach/pxa-regs.h>
8#include <mach/udc.h> 8#include <mach/udc.h>
9#include <mach/pxafb.h> 9#include <mach/pxafb.h>
10#include <mach/mmc.h> 10#include <mach/mmc.h>
11#include <mach/irda.h> 11#include <mach/irda.h>
12#include <mach/i2c.h> 12#include <mach/i2c.h>
13#include <mach/mfp-pxa27x.h>
14#include <mach/ohci.h> 13#include <mach/ohci.h>
15#include <mach/pxa27x_keypad.h> 14#include <mach/pxa27x_keypad.h>
16#include <mach/pxa2xx_spi.h> 15#include <mach/pxa2xx_spi.h>
@@ -156,8 +155,8 @@ void __init set_pxa_fb_parent(struct device *parent_dev)
156 155
157static struct resource pxa_resource_ffuart[] = { 156static struct resource pxa_resource_ffuart[] = {
158 { 157 {
159 .start = __PREG(FFUART), 158 .start = 0x40100000,
160 .end = __PREG(FFUART) + 35, 159 .end = 0x40100023,
161 .flags = IORESOURCE_MEM, 160 .flags = IORESOURCE_MEM,
162 }, { 161 }, {
163 .start = IRQ_FFUART, 162 .start = IRQ_FFUART,
@@ -175,8 +174,8 @@ struct platform_device pxa_device_ffuart= {
175 174
176static struct resource pxa_resource_btuart[] = { 175static struct resource pxa_resource_btuart[] = {
177 { 176 {
178 .start = __PREG(BTUART), 177 .start = 0x40200000,
179 .end = __PREG(BTUART) + 35, 178 .end = 0x40200023,
180 .flags = IORESOURCE_MEM, 179 .flags = IORESOURCE_MEM,
181 }, { 180 }, {
182 .start = IRQ_BTUART, 181 .start = IRQ_BTUART,
@@ -194,8 +193,8 @@ struct platform_device pxa_device_btuart = {
194 193
195static struct resource pxa_resource_stuart[] = { 194static struct resource pxa_resource_stuart[] = {
196 { 195 {
197 .start = __PREG(STUART), 196 .start = 0x40700000,
198 .end = __PREG(STUART) + 35, 197 .end = 0x40700023,
199 .flags = IORESOURCE_MEM, 198 .flags = IORESOURCE_MEM,
200 }, { 199 }, {
201 .start = IRQ_STUART, 200 .start = IRQ_STUART,
@@ -213,8 +212,8 @@ struct platform_device pxa_device_stuart = {
213 212
214static struct resource pxa_resource_hwuart[] = { 213static struct resource pxa_resource_hwuart[] = {
215 { 214 {
216 .start = __PREG(HWUART), 215 .start = 0x41600000,
217 .end = __PREG(HWUART) + 47, 216 .end = 0x4160002F,
218 .flags = IORESOURCE_MEM, 217 .flags = IORESOURCE_MEM,
219 }, { 218 }, {
220 .start = IRQ_HWUART, 219 .start = IRQ_HWUART,
@@ -249,18 +248,53 @@ struct platform_device pxa_device_i2c = {
249 .num_resources = ARRAY_SIZE(pxai2c_resources), 248 .num_resources = ARRAY_SIZE(pxai2c_resources),
250}; 249};
251 250
252static unsigned long pxa27x_i2c_mfp_cfg[] = {
253 GPIO117_I2C_SCL,
254 GPIO118_I2C_SDA,
255};
256
257void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) 251void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
258{ 252{
259 if (cpu_is_pxa27x())
260 pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
261 pxa_register_device(&pxa_device_i2c, info); 253 pxa_register_device(&pxa_device_i2c, info);
262} 254}
263 255
256#ifdef CONFIG_PXA27x
257static struct resource pxa27x_resources_i2c_power[] = {
258 {
259 .start = 0x40f00180,
260 .end = 0x40f001a3,
261 .flags = IORESOURCE_MEM,
262 }, {
263 .start = IRQ_PWRI2C,
264 .end = IRQ_PWRI2C,
265 .flags = IORESOURCE_IRQ,
266 },
267};
268
269struct platform_device pxa27x_device_i2c_power = {
270 .name = "pxa2xx-i2c",
271 .id = 1,
272 .resource = pxa27x_resources_i2c_power,
273 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
274};
275#endif
276
277#ifdef CONFIG_PXA3xx
278static struct resource pxa3xx_resources_i2c_power[] = {
279 {
280 .start = 0x40f500c0,
281 .end = 0x40f500d3,
282 .flags = IORESOURCE_MEM,
283 }, {
284 .start = IRQ_PWRI2C,
285 .end = IRQ_PWRI2C,
286 .flags = IORESOURCE_IRQ,
287 },
288};
289
290struct platform_device pxa3xx_device_i2c_power = {
291 .name = "pxa2xx-i2c",
292 .id = 1,
293 .resource = pxa3xx_resources_i2c_power,
294 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
295};
296#endif
297
264static struct resource pxai2s_resources[] = { 298static struct resource pxai2s_resources[] = {
265 { 299 {
266 .start = 0x40400000, 300 .start = 0x40400000,
@@ -296,11 +330,36 @@ void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
296 pxa_register_device(&pxa_device_ficp, info); 330 pxa_register_device(&pxa_device_ficp, info);
297} 331}
298 332
299struct platform_device pxa_device_rtc = { 333static struct resource pxa_rtc_resources[] = {
334 [0] = {
335 .start = 0x40900000,
336 .end = 0x40900000 + 0x3b,
337 .flags = IORESOURCE_MEM,
338 },
339 [1] = {
340 .start = IRQ_RTC1Hz,
341 .end = IRQ_RTC1Hz,
342 .flags = IORESOURCE_IRQ,
343 },
344 [2] = {
345 .start = IRQ_RTCAlrm,
346 .end = IRQ_RTCAlrm,
347 .flags = IORESOURCE_IRQ,
348 },
349};
350
351struct platform_device sa1100_device_rtc = {
300 .name = "sa1100-rtc", 352 .name = "sa1100-rtc",
301 .id = -1, 353 .id = -1,
302}; 354};
303 355
356struct platform_device pxa_device_rtc = {
357 .name = "pxa-rtc",
358 .id = -1,
359 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
360 .resource = pxa_rtc_resources,
361};
362
304static struct resource pxa_ac97_resources[] = { 363static struct resource pxa_ac97_resources[] = {
305 [0] = { 364 [0] = {
306 .start = 0x40500000, 365 .start = 0x40500000,
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index bb04af4b0aa3..ecc24a4dca6d 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -11,6 +11,7 @@ extern struct platform_device pxa_device_hwuart;
11extern struct platform_device pxa_device_i2c; 11extern struct platform_device pxa_device_i2c;
12extern struct platform_device pxa_device_i2s; 12extern struct platform_device pxa_device_i2s;
13extern struct platform_device pxa_device_ficp; 13extern struct platform_device pxa_device_ficp;
14extern struct platform_device sa1100_device_rtc;
14extern struct platform_device pxa_device_rtc; 15extern struct platform_device pxa_device_rtc;
15extern struct platform_device pxa_device_ac97; 16extern struct platform_device pxa_device_ac97;
16 17
diff --git a/arch/arm/mach-pxa/dma.c b/arch/arm/mach-pxa/dma.c
index c0be17e0ab82..b1514fb20d3a 100644
--- a/arch/arm/mach-pxa/dma.c
+++ b/arch/arm/mach-pxa/dma.c
@@ -21,7 +21,7 @@
21#include <asm/system.h> 21#include <asm/system.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/dma.h> 24#include <mach/dma.h>
25 25
26#include <mach/pxa-regs.h> 26#include <mach/pxa-regs.h>
27 27
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index cc3d850cc0b6..3e6aa33a2c7c 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -21,6 +21,7 @@
21#include <mach/pxafb.h> 21#include <mach/pxafb.h>
22#include <mach/ohci.h> 22#include <mach/ohci.h>
23#include <mach/i2c.h> 23#include <mach/i2c.h>
24#include <mach/hardware.h>
24 25
25#include <mach/mfp-pxa27x.h> 26#include <mach/mfp-pxa27x.h>
26#include <mach/pxa-regs.h> 27#include <mach/pxa-regs.h>
@@ -112,6 +113,10 @@ static unsigned long ezx_pin_config[] __initdata = {
112 GPIO91_USB_P3_1, /* ICL_XRXD */ 113 GPIO91_USB_P3_1, /* ICL_XRXD */
113 GPIO56_USB_P3_4, /* ICL_VMOUT */ 114 GPIO56_USB_P3_4, /* ICL_VMOUT */
114 GPIO113_USB_P3_3, /* /ICL_VMIN */ 115 GPIO113_USB_P3_3, /* /ICL_VMIN */
116
117 /* I2C */
118 GPIO117_I2C_SCL,
119 GPIO118_I2C_SDA,
115}; 120};
116 121
117static void __init ezx_init(void) 122static void __init ezx_init(void)
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c
index 14930cf8be7b..5fec1e479cb3 100644
--- a/arch/arm/mach-pxa/gpio.c
+++ b/arch/arm/mach-pxa/gpio.c
@@ -25,6 +25,18 @@
25 25
26#include "generic.h" 26#include "generic.h"
27 27
28#define GPIO0_BASE ((void __iomem *)io_p2v(0x40E00000))
29#define GPIO1_BASE ((void __iomem *)io_p2v(0x40E00004))
30#define GPIO2_BASE ((void __iomem *)io_p2v(0x40E00008))
31#define GPIO3_BASE ((void __iomem *)io_p2v(0x40E00100))
32
33#define GPLR_OFFSET 0x00
34#define GPDR_OFFSET 0x0C
35#define GPSR_OFFSET 0x18
36#define GPCR_OFFSET 0x24
37#define GRER_OFFSET 0x30
38#define GFER_OFFSET 0x3C
39#define GEDR_OFFSET 0x48
28 40
29struct pxa_gpio_chip { 41struct pxa_gpio_chip {
30 struct gpio_chip chip; 42 struct gpio_chip chip;
@@ -33,6 +45,18 @@ struct pxa_gpio_chip {
33 45
34int pxa_last_gpio; 46int pxa_last_gpio;
35 47
48#ifdef CONFIG_CPU_PXA26x
49/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
50 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
51 */
52static int __gpio_is_inverted(unsigned gpio)
53{
54 return cpu_is_pxa25x() && gpio > 85;
55}
56#else
57#define __gpio_is_inverted(gpio) (0)
58#endif
59
36/* 60/*
37 * Configure pins for GPIO or other functions 61 * Configure pins for GPIO or other functions
38 */ 62 */
@@ -75,7 +99,10 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
75 gpdr = pxa->regbase + GPDR_OFFSET; 99 gpdr = pxa->regbase + GPDR_OFFSET;
76 local_irq_save(flags); 100 local_irq_save(flags);
77 value = __raw_readl(gpdr); 101 value = __raw_readl(gpdr);
78 value &= ~mask; 102 if (__gpio_is_inverted(chip->base + offset))
103 value |= mask;
104 else
105 value &= ~mask;
79 __raw_writel(value, gpdr); 106 __raw_writel(value, gpdr);
80 local_irq_restore(flags); 107 local_irq_restore(flags);
81 108
@@ -97,7 +124,10 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
97 gpdr = pxa->regbase + GPDR_OFFSET; 124 gpdr = pxa->regbase + GPDR_OFFSET;
98 local_irq_save(flags); 125 local_irq_save(flags);
99 tmp = __raw_readl(gpdr); 126 tmp = __raw_readl(gpdr);
100 tmp |= mask; 127 if (__gpio_is_inverted(chip->base + offset))
128 tmp &= ~mask;
129 else
130 tmp |= mask;
101 __raw_writel(tmp, gpdr); 131 __raw_writel(tmp, gpdr);
102 local_irq_restore(flags); 132 local_irq_restore(flags);
103 133
@@ -173,10 +203,17 @@ static unsigned long GPIO_IRQ_mask[4];
173 */ 203 */
174static int __gpio_is_occupied(unsigned gpio) 204static int __gpio_is_occupied(unsigned gpio)
175{ 205{
176 if (cpu_is_pxa25x() || cpu_is_pxa27x()) 206 if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
177 return GAFR(gpio) & (0x3 << (((gpio) & 0xf) * 2)); 207 int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
178 else 208 int dir = GPDR(gpio) & GPIO_bit(gpio);
179 return 0; 209
210 if (__gpio_is_inverted(gpio))
211 return af != 1 || dir == 0;
212 else
213 return af != 0 || dir != 0;
214 }
215
216 return 0;
180} 217}
181 218
182static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) 219static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
@@ -190,9 +227,8 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
190 /* Don't mess with enabled GPIOs using preconfigured edges or 227 /* Don't mess with enabled GPIOs using preconfigured edges or
191 * GPIOs set to alternate function or to output during probe 228 * GPIOs set to alternate function or to output during probe
192 */ 229 */
193 if ((GPIO_IRQ_rising_edge[idx] | 230 if ((GPIO_IRQ_rising_edge[idx] & GPIO_bit(gpio)) ||
194 GPIO_IRQ_falling_edge[idx] | 231 (GPIO_IRQ_falling_edge[idx] & GPIO_bit(gpio)))
195 GPDR(gpio)) & GPIO_bit(gpio))
196 return 0; 232 return 0;
197 233
198 if (__gpio_is_occupied(gpio)) 234 if (__gpio_is_occupied(gpio))
@@ -201,7 +237,10 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
201 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; 237 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
202 } 238 }
203 239
204 GPDR(gpio) &= ~GPIO_bit(gpio); 240 if (__gpio_is_inverted(gpio))
241 GPDR(gpio) |= GPIO_bit(gpio);
242 else
243 GPDR(gpio) &= ~GPIO_bit(gpio);
205 244
206 if (type & IRQ_TYPE_EDGE_RISING) 245 if (type & IRQ_TYPE_EDGE_RISING)
207 __set_bit(gpio, GPIO_IRQ_rising_edge); 246 __set_bit(gpio, GPIO_IRQ_rising_edge);
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index d8962a0fb98d..06bc6674b015 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -184,13 +184,6 @@ static unsigned long gumstix_pin_config[] __initdata = {
184 GPIO6_MMC_CLK, 184 GPIO6_MMC_CLK,
185 GPIO53_MMC_CLK, 185 GPIO53_MMC_CLK,
186 GPIO8_MMC_CS0, 186 GPIO8_MMC_CS0,
187 /* these are used by AM200EPD */
188 GPIO51_GPIO,
189 GPIO49_GPIO,
190 GPIO48_GPIO,
191 GPIO32_GPIO,
192 GPIO17_GPIO,
193 GPIO16_GPIO,
194}; 187};
195 188
196static void __init gumstix_init(void) 189static void __init gumstix_init(void)
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
new file mode 100644
index 000000000000..da6e4422c0f3
--- /dev/null
+++ b/arch/arm/mach-pxa/h5000.c
@@ -0,0 +1,200 @@
1/*
2 * Hardware definitions for HP iPAQ h5xxx Handheld Computers
3 *
4 * Copyright 2000-2003 Hewlett-Packard Company.
5 * Copyright 2002 Jamey Hicks <jamey.hicks@hp.com>
6 * Copyright 2004-2005 Phil Blundell <pb@handhelds.org>
7 * Copyright 2007-2008 Anton Vorontsov <cbouatmailru@gmail.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
15 * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
16 * FITNESS FOR ANY PARTICULAR PURPOSE.
17 *
18 * Author: Jamey Hicks.
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/partitions.h>
26#include <linux/mtd/physmap.h>
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <mach/h5000.h>
31#include <mach/pxa-regs.h>
32#include <mach/pxa2xx-regs.h>
33#include <mach/mfp-pxa25x.h>
34#include <mach/udc.h>
35#include "generic.h"
36
37/*
38 * Flash
39 */
40
41static struct mtd_partition h5000_flash0_partitions[] = {
42 {
43 .name = "bootldr",
44 .size = 0x00040000,
45 .offset = 0,
46 .mask_flags = MTD_WRITEABLE,
47 },
48 {
49 .name = "root",
50 .size = MTDPART_SIZ_FULL,
51 .offset = MTDPART_OFS_APPEND,
52 },
53};
54
55static struct mtd_partition h5000_flash1_partitions[] = {
56 {
57 .name = "second root",
58 .size = SZ_16M - 0x00040000,
59 .offset = 0,
60 },
61 {
62 .name = "asset",
63 .size = MTDPART_SIZ_FULL,
64 .offset = MTDPART_OFS_APPEND,
65 .mask_flags = MTD_WRITEABLE,
66 },
67};
68
69static struct physmap_flash_data h5000_flash0_data = {
70 .width = 4,
71 .parts = h5000_flash0_partitions,
72 .nr_parts = ARRAY_SIZE(h5000_flash0_partitions),
73};
74
75static struct physmap_flash_data h5000_flash1_data = {
76 .width = 4,
77 .parts = h5000_flash1_partitions,
78 .nr_parts = ARRAY_SIZE(h5000_flash1_partitions),
79};
80
81static struct resource h5000_flash0_resources = {
82 .start = PXA_CS0_PHYS,
83 .end = PXA_CS0_PHYS + SZ_32M - 1,
84 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
85};
86
87static struct resource h5000_flash1_resources = {
88 .start = PXA_CS0_PHYS + SZ_32M,
89 .end = PXA_CS0_PHYS + SZ_32M + SZ_16M - 1,
90 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
91};
92
93static struct platform_device h5000_flash[] = {
94 {
95 .name = "physmap-flash",
96 .id = 0,
97 .resource = &h5000_flash0_resources,
98 .num_resources = 1,
99 .dev = {
100 .platform_data = &h5000_flash0_data,
101 },
102 },
103 {
104 .name = "physmap-flash",
105 .id = 1,
106 .resource = &h5000_flash1_resources,
107 .num_resources = 1,
108 .dev = {
109 .platform_data = &h5000_flash1_data,
110 },
111 },
112};
113
114/*
115 * USB Device Controller
116 */
117
118static struct pxa2xx_udc_mach_info h5000_udc_mach_info __initdata = {
119 .gpio_pullup = H5000_GPIO_USB_PULLUP,
120};
121
122/*
123 * GPIO setup
124 */
125
126static unsigned long h5000_pin_config[] __initdata = {
127 /* Crystal and Clock Signals */
128 GPIO12_32KHz,
129
130 /* SDRAM and Static Memory I/O Signals */
131 GPIO15_nCS_1,
132 GPIO78_nCS_2,
133 GPIO79_nCS_3,
134 GPIO80_nCS_4,
135
136 /* FFUART */
137 GPIO34_FFUART_RXD,
138 GPIO35_FFUART_CTS,
139 GPIO36_FFUART_DCD,
140 GPIO37_FFUART_DSR,
141 GPIO38_FFUART_RI,
142 GPIO39_FFUART_TXD,
143 GPIO40_FFUART_DTR,
144 GPIO41_FFUART_RTS,
145
146 /* BTUART */
147 GPIO42_BTUART_RXD,
148 GPIO43_BTUART_TXD,
149 GPIO44_BTUART_CTS,
150 GPIO45_BTUART_RTS,
151
152 /* SSP1 */
153 GPIO23_SSP1_SCLK,
154 GPIO25_SSP1_TXD,
155 GPIO26_SSP1_RXD,
156};
157
158/*
159 * Localbus setup:
160 * CS0: Flash;
161 * CS1: MediaQ chip, select 16-bit bus and vlio;
162 * CS5: SAMCOP.
163 */
164
165static void fix_msc(void)
166{
167 MSC0 = 0x129c24f2;
168 MSC1 = 0x7ff424fa;
169 MSC2 = 0x7ff47ff4;
170
171 MDREFR |= 0x02080000;
172}
173
174/*
175 * Platform devices
176 */
177
178static struct platform_device *devices[] __initdata = {
179 &h5000_flash[0],
180 &h5000_flash[1],
181};
182
183static void __init h5000_init(void)
184{
185 fix_msc();
186
187 pxa2xx_mfp_config(ARRAY_AND_SIZE(h5000_pin_config));
188 pxa_set_udc_info(&h5000_udc_mach_info);
189 platform_add_devices(ARRAY_AND_SIZE(devices));
190}
191
192MACHINE_START(H5400, "HP iPAQ H5000")
193 .phys_io = 0x40000000,
194 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
195 .boot_params = 0xa0000100,
196 .map_io = pxa_map_io,
197 .init_irq = pxa25x_init_irq,
198 .timer = &pxa_timer,
199 .init_machine = h5000_init,
200MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/clkdev.h b/arch/arm/mach-pxa/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif
diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h
index 955bfe606067..7804637a6df3 100644
--- a/arch/arm/mach-pxa/include/mach/dma.h
+++ b/arch/arm/mach-pxa/include/mach/dma.h
@@ -30,10 +30,6 @@ typedef enum {
30 DMA_PRIO_LOW = 2 30 DMA_PRIO_LOW = 2
31} pxa_dma_prio; 31} pxa_dma_prio;
32 32
33#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
34#define HAVE_ARCH_PCI_SET_DMA_MASK 1
35#endif
36
37/* 33/*
38 * DMA registration 34 * DMA registration
39 */ 35 */
diff --git a/arch/arm/mach-pxa/include/mach/h5000.h b/arch/arm/mach-pxa/include/mach/h5000.h
new file mode 100644
index 000000000000..2a5ae3802787
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/h5000.h
@@ -0,0 +1,113 @@
1/*
2 * Hardware definitions for HP iPAQ h5xxx Handheld Computers
3 *
4 * Copyright(20)02 Hewlett-Packard Company.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
12 * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
13 * FITNESS FOR ANY PARTICULAR PURPOSE.
14 *
15 * Author: Jamey Hicks
16 */
17
18#ifndef __ASM_ARCH_H5000_H
19#define __ASM_ARCH_H5000_H
20
21#include <mach/mfp-pxa25x.h>
22
23/*
24 * CPU GPIOs
25 */
26
27#define H5000_GPIO_POWER_BUTTON (0)
28#define H5000_GPIO_RESET_BUTTON_N (1)
29#define H5000_GPIO_OPT_INT (2)
30#define H5000_GPIO_BACKUP_POWER (3)
31#define H5000_GPIO_ACTION_BUTTON (4)
32#define H5000_GPIO_COM_DCD_SOMETHING (5) /* what is this really ? */
33/* 6 not connected */
34#define H5000_GPIO_RESET_BUTTON_AGAIN_N (7) /* connected to gpio 1 as well */
35/* 8 not connected */
36#define H5000_GPIO_RSO_N (9) /* reset output from max1702 which regulates 3.3 and 2.5 */
37#define H5000_GPIO_ASIC_INT_N (10) /* from companion asic */
38#define H5000_GPIO_BT_ENV_0 (11) /* to LMX9814, set to 1 according to regdump */
39/*(12) not connected */
40#define H5000_GPIO_BT_ENV_1 (13) /* to LMX9814, set to 1 according to regdump */
41#define H5000_GPIO_BT_WU (14) /* from LMX9814, Defined as HOST_WAKEUP in the LMX9820 data sheet */
42/*(15) is CS1# */
43/*(16) not connected */
44/*(17) not connected */
45/*(18) is pcmcia ready */
46/*(19) is dreq1 */
47/*(20) is dreq0 */
48#define H5000_GPIO_OE_RD_NWR (21) /* output enable on rd/nwr signal to companion asic */
49/*(22) is not connected */
50#define H5000_GPIO_OPT_SPI_CLK (23) /* to extension pack */
51#define H5000_GPIO_OPT_SPI_CS_N (24) /* to extension pack */
52#define H5000_GPIO_OPT_SPI_DOUT (25) /* to extension pack */
53#define H5000_GPIO_OPT_SPI_DIN (26) /* to extension pack */
54/*(27) not connected */
55#define H5000_GPIO_I2S_BITCLK (28) /* connected to AC97 codec */
56#define H5000_GPIO_I2S_DATAOUT (29) /* connected to AC97 codec */
57#define H5000_GPIO_I2S_DATAIN (30) /* connected to AC97 codec */
58#define H5000_GPIO_I2S_LRCLK (31) /* connected to AC97 codec */
59#define H5000_GPIO_I2S_SYSCLK (32) /* connected to AC97 codec */
60/*(33) is CS5# */
61#define H5000_GPIO_COM_RXD (34) /* connected to cradle/cable connector */
62#define H5000_GPIO_COM_CTS (35) /* connected to cradle/cable connector */
63#define H5000_GPIO_COM_DCD (36) /* connected to cradle/cable connector */
64#define H5000_GPIO_COM_DSR (37) /* connected to cradle/cable connector */
65#define H5000_GPIO_COM_RI (38) /* connected to cradle/cable connector */
66#define H5000_GPIO_COM_TXD (39) /* connected to cradle/cable connector */
67#define H5000_GPIO_COM_DTR (40) /* connected to cradle/cable connector */
68#define H5000_GPIO_COM_RTS (41) /* connected to cradle/cable connector */
69
70#define H5000_GPIO_BT_RXD (42) /* connected to BT (LMX9814) */
71#define H5000_GPIO_BT_TXD (43) /* connected to BT (LMX9814) */
72#define H5000_GPIO_BT_CTS (44) /* connected to BT (LMX9814) */
73#define H5000_GPIO_BT_RTS (45) /* connected to BT (LMX9814) */
74
75#define H5000_GPIO_IRDA_RXD (46)
76#define H5000_GPIO_IRDA_TXD (47)
77
78#define H5000_GPIO_POE_N (48) /* used for pcmcia */
79#define H5000_GPIO_PWE_N (49) /* used for pcmcia */
80#define H5000_GPIO_PIOR_N (50) /* used for pcmcia */
81#define H5000_GPIO_PIOW_N (51) /* used for pcmcia */
82#define H5000_GPIO_PCE1_N (52) /* used for pcmcia */
83#define H5000_GPIO_PCE2_N (53) /* used for pcmcia */
84#define H5000_GPIO_PSKTSEL (54) /* used for pcmcia */
85#define H5000_GPIO_PREG_N (55) /* used for pcmcia */
86#define H5000_GPIO_PWAIT_N (56) /* used for pcmcia */
87#define H5000_GPIO_IOIS16_N (57) /* used for pcmcia */
88
89#define H5000_GPIO_IRDA_SD (58) /* to hsdl3002 sd */
90/*(59) not connected */
91#define H5000_GPIO_POWER_SD_N (60) /* controls power to SD */
92#define H5000_GPIO_POWER_RS232_N (61) /* inverted FORCEON to rs232 transceiver */
93#define H5000_GPIO_POWER_ACCEL_N (62) /* controls power to accel */
94/*(63) is not connected */
95#define H5000_GPIO_OPT_NVRAM (64) /* controls power to expansion pack */
96#define H5000_GPIO_CHG_EN (65) /* to sc801 en */
97#define H5000_GPIO_USB_PULLUP (66) /* USB d+ pullup via 1.5K resistor */
98#define H5000_GPIO_BT_2V8_N (67) /* 2.8V used by bluetooth */
99#define H5000_GPIO_EXT_CHG_RATE (68) /* enables external charging rate */
100/*(69) is not connected */
101#define H5000_GPIO_CIR_RESET (70) /* consumer IR reset */
102#define H5000_GPIO_POWER_LIGHT_SENSOR_N (71)
103#define H5000_GPIO_BT_M_RESET (72)
104#define H5000_GPIO_STD_CHG_RATE (73)
105#define H5000_GPIO_SD_WP_N (74)
106#define H5000_GPIO_MOTOR_ON_N (75) /* external pullup on this */
107#define H5000_GPIO_HEADPHONE_DETECT (76)
108#define H5000_GPIO_USB_CHG_RATE (77) /* select rate for charging via usb */
109/*(78) is CS2# */
110/*(79) is CS3# */
111/*(80) is CS4# */
112
113#endif /* __ASM_ARCH_H5000_H */
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index a582a6d9b92b..4e782ec38668 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -102,6 +102,9 @@
102 * PXA930 B0 0x69056835 0x5E643013 102 * PXA930 B0 0x69056835 0x5E643013
103 * PXA930 B1 0x69056837 0x7E643013 103 * PXA930 B1 0x69056837 0x7E643013
104 * PXA930 B2 0x69056838 0x8E643013 104 * PXA930 B2 0x69056838 0x8E643013
105 *
106 * PXA935 A0 0x56056931 0x1E653013
107 * PXA935 B0 0x56056936 0x6E653013
105 */ 108 */
106#ifdef CONFIG_PXA25x 109#ifdef CONFIG_PXA25x
107#define __cpu_is_pxa210(id) \ 110#define __cpu_is_pxa210(id) \
@@ -178,12 +181,22 @@
178#define __cpu_is_pxa930(id) \ 181#define __cpu_is_pxa930(id) \
179 ({ \ 182 ({ \
180 unsigned int _id = (id) >> 4 & 0xfff; \ 183 unsigned int _id = (id) >> 4 & 0xfff; \
181 _id == 0x683; \ 184 _id == 0x683; \
182 }) 185 })
183#else 186#else
184#define __cpu_is_pxa930(id) (0) 187#define __cpu_is_pxa930(id) (0)
185#endif 188#endif
186 189
190#ifdef CONFIG_CPU_PXA935
191#define __cpu_is_pxa935(id) \
192 ({ \
193 unsigned int _id = (id) >> 4 & 0xfff; \
194 _id == 0x693; \
195 })
196#else
197#define __cpu_is_pxa935(id) (0)
198#endif
199
187#define cpu_is_pxa210() \ 200#define cpu_is_pxa210() \
188 ({ \ 201 ({ \
189 __cpu_is_pxa210(read_cpuid_id()); \ 202 __cpu_is_pxa210(read_cpuid_id()); \
@@ -204,8 +217,6 @@
204 __cpu_is_pxa25x(read_cpuid_id()); \ 217 __cpu_is_pxa25x(read_cpuid_id()); \
205 }) 218 })
206 219
207extern int cpu_is_pxa26x(void);
208
209#define cpu_is_pxa27x() \ 220#define cpu_is_pxa27x() \
210 ({ \ 221 ({ \
211 __cpu_is_pxa27x(read_cpuid_id()); \ 222 __cpu_is_pxa27x(read_cpuid_id()); \
@@ -232,6 +243,12 @@ extern int cpu_is_pxa26x(void);
232 __cpu_is_pxa930(id); \ 243 __cpu_is_pxa930(id); \
233 }) 244 })
234 245
246#define cpu_is_pxa935() \
247 ({ \
248 unsigned int id = read_cpuid(CPUID_ID); \
249 __cpu_is_pxa935(id); \
250 })
251
235/* 252/*
236 * CPUID Core Generation Bit 253 * CPUID Core Generation Bit
237 * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x 254 * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
@@ -249,6 +266,12 @@ extern int cpu_is_pxa26x(void);
249 _id == 0x3; \ 266 _id == 0x3; \
250 }) 267 })
251 268
269#define __cpu_is_pxa9xx(id) \
270 ({ \
271 unsigned int _id = (id) >> 4 & 0xfff; \
272 _id == 0x683 || _id == 0x693; \
273 })
274
252#define cpu_is_pxa2xx() \ 275#define cpu_is_pxa2xx() \
253 ({ \ 276 ({ \
254 __cpu_is_pxa2xx(read_cpuid_id()); \ 277 __cpu_is_pxa2xx(read_cpuid_id()); \
@@ -259,21 +282,10 @@ extern int cpu_is_pxa26x(void);
259 __cpu_is_pxa3xx(read_cpuid_id()); \ 282 __cpu_is_pxa3xx(read_cpuid_id()); \
260 }) 283 })
261 284
262/* 285#define cpu_is_pxa9xx() \
263 * Handy routine to set GPIO alternate functions 286 ({ \
264 */ 287 __cpu_is_pxa9xx(read_cpuid_id()); \
265extern int pxa_gpio_mode( int gpio_mode ); 288 })
266
267/*
268 * Return GPIO level, nonzero means high, zero is low
269 */
270extern int pxa_gpio_get_value(unsigned gpio);
271
272/*
273 * Set output GPIO level
274 */
275extern void pxa_gpio_set_value(unsigned gpio, int value);
276
277/* 289/*
278 * return current memory and LCD clock frequency in units of 10kHz 290 * return current memory and LCD clock frequency in units of 10kHz
279 */ 291 */
@@ -285,6 +297,8 @@ extern unsigned int get_memclk_frequency_10khz(void);
285#define PCIBIOS_MIN_IO 0 297#define PCIBIOS_MIN_IO 0
286#define PCIBIOS_MIN_MEM 0 298#define PCIBIOS_MIN_MEM 0
287#define pcibios_assign_all_busses() 1 299#define pcibios_assign_all_busses() 1
300#define HAVE_ARCH_PCI_SET_DMA_MASK 1
288#endif 301#endif
289 302
303
290#endif /* _ASM_ARCH_HARDWARE_H */ 304#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-pxa/include/mach/io.h b/arch/arm/mach-pxa/include/mach/io.h
index 600fd4f76603..262691fb97d8 100644
--- a/arch/arm/mach-pxa/include/mach/io.h
+++ b/arch/arm/mach-pxa/include/mach/io.h
@@ -6,15 +6,13 @@
6#ifndef __ASM_ARM_ARCH_IO_H 6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H 7#define __ASM_ARM_ARCH_IO_H
8 8
9#include <mach/hardware.h>
10
11#define IO_SPACE_LIMIT 0xffffffff 9#define IO_SPACE_LIMIT 0xffffffff
12 10
13/* 11/*
14 * We don't actually have real ISA nor PCI buses, but there is so many 12 * We don't actually have real ISA nor PCI buses, but there is so many
15 * drivers out there that might just work if we fake them... 13 * drivers out there that might just work if we fake them...
16 */ 14 */
17#define __io(a) ((void __iomem *)(a)) 15#define __io(a) __typesafe_io(a)
18#define __mem_pci(a) (a) 16#define __mem_pci(a) (a)
19 17
20#endif 18#endif
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h
index 59aef89808d6..f626730ee42e 100644
--- a/arch/arm/mach-pxa/include/mach/memory.h
+++ b/arch/arm/mach-pxa/include/mach/memory.h
@@ -18,16 +18,6 @@
18#define PHYS_OFFSET UL(0xa0000000) 18#define PHYS_OFFSET UL(0xa0000000)
19 19
20/* 20/*
21 * Virtual view <-> DMA view memory address translations
22 * virt_to_bus: Used to translate the virtual address to an
23 * address suitable to be passed to set_dma_addr
24 * bus_to_virt: Used to convert an address for DMA operations
25 * to an address that the kernel can use.
26 */
27#define __virt_to_bus(x) __virt_to_phys(x)
28#define __bus_to_virt(x) __phys_to_virt(x)
29
30/*
31 * The nodes are matched with the physical SDRAM banks as follows: 21 * The nodes are matched with the physical SDRAM banks as follows:
32 * 22 *
33 * node 0: 0xa0000000-0xa3ffffff --> 0xc0000000-0xc3ffffff 23 * node 0: 0xa0000000-0xa3ffffff --> 0xc0000000-0xc3ffffff
@@ -47,6 +37,7 @@ void cmx2xx_pci_adjust_zones(int node, unsigned long *size,
47 cmx2xx_pci_adjust_zones(node, size, holes) 37 cmx2xx_pci_adjust_zones(node, size, holes)
48 38
49#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1) 39#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1)
40#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M)
50#endif 41#endif
51 42
52#endif 43#endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
index 617cab2cc8d0..a72869b73ee3 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
@@ -158,4 +158,35 @@
158#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW) 158#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW)
159#define GPIO77_LCD_BIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW) 159#define GPIO77_LCD_BIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
160 160
161#ifdef CONFIG_CPU_PXA26x
162/* GPIO */
163#define GPIO85_GPIO MFP_CFG_IN(GPIO85, AF0)
164#define GPIO86_GPIO MFP_CFG_IN(GPIO86, AF1)
165#define GPIO87_GPIO MFP_CFG_IN(GPIO87, AF1)
166#define GPIO88_GPIO MFP_CFG_IN(GPIO88, AF1)
167#define GPIO89_GPIO MFP_CFG_IN(GPIO89, AF1)
168
169/* SDRAM */
170#define GPIO86_nSDCS2 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH)
171#define GPIO87_nSDCS3 MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH)
172#define GPIO88_RDnWR MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH)
173#define GPIO89_nACRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
174
175/* USB */
176#define GPIO9_USB_RCV MFP_CFG_IN(GPIO9, AF1)
177#define GPIO32_USB_VP MFP_CFG_IN(GPIO32, AF2)
178#define GPIO34_USB_VM MFP_CFG_IN(GPIO34, AF2)
179#define GPIO39_USB_VPO MFP_CFG_OUT(GPIO39, AF3, DRIVE_LOW)
180#define GPIO56_USB_VMO MFP_CFG_OUT(GPIO56, AF1, DRIVE_LOW)
181#define GPIO57_USB_nOE MFP_CFG_OUT(GPIO57, AF1, DRIVE_HIGH)
182
183/* ASSP */
184#define GPIO28_ASSP_BITCLK_IN MFP_CFG_IN(GPIO28, AF3)
185#define GPIO28_ASSP_BITCLK_OUT MFP_CFG_OUT(GPIO28, AF3, DRIVE_LOW)
186#define GPIO29_ASSP_RXD MFP_CFG_IN(GPIO29, AF3)
187#define GPIO30_ASSP_TXD MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW)
188#define GPIO31_ASSP_SFRM_IN MFP_CFG_IN(GPIO31, AF1)
189#define GPIO31_ASSP_SFRM_OUT MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW)
190#endif
191
161#endif /* __ASM_ARCH_MFP_PXA25X_H */ 192#endif /* __ASM_ARCH_MFP_PXA25X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
index 122bdbd53182..da4f85a4f990 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -11,6 +11,12 @@
11#include <mach/mfp.h> 11#include <mach/mfp.h>
12#include <mach/mfp-pxa2xx.h> 12#include <mach/mfp-pxa2xx.h>
13 13
14/* Note: GPIO3/GPIO4 will be driven by Power I2C when PCFR/PI2C_EN
15 * bit is set, regardless of the GPIO configuration
16 */
17#define GPIO3_GPIO MFP_CFG_IN(GPIO3, AF0)
18#define GPIO4_GPIO MFP_CFG_IN(GPIO4, AF0)
19
14/* GPIO */ 20/* GPIO */
15#define GPIO85_GPIO MFP_CFG_IN(GPIO85, AF0) 21#define GPIO85_GPIO MFP_CFG_IN(GPIO85, AF0)
16#define GPIO86_GPIO MFP_CFG_IN(GPIO86, AF0) 22#define GPIO86_GPIO MFP_CFG_IN(GPIO86, AF0)
diff --git a/arch/arm/mach-pxa/include/mach/mioa701.h b/arch/arm/mach-pxa/include/mach/mioa701.h
index 8483cb511831..02868447b0b1 100644
--- a/arch/arm/mach-pxa/include/mach/mioa701.h
+++ b/arch/arm/mach-pxa/include/mach/mioa701.h
@@ -10,12 +10,14 @@
10 (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state)) 10 (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state))
11 11
12/* Global GPIOs */ 12/* Global GPIOs */
13#define GPIO9_CHARGE_nEN 9 13#define GPIO9_CHARGE_EN 9
14#define GPIO18_POWEROFF 18 14#define GPIO18_POWEROFF 18
15#define GPIO87_LCD_POWER 87 15#define GPIO87_LCD_POWER 87
16#define GPIO96_AC_DETECT 96
17#define GPIO80_MAYBE_CHARGE_VDROP 80 /* Drop of 88mV */
16 18
17/* USB */ 19/* USB */
18#define GPIO13_USB_DETECT 13 20#define GPIO13_nUSB_DETECT 13
19#define GPIO22_USB_ENABLE 22 21#define GPIO22_USB_ENABLE 22
20 22
21/* SDIO bits */ 23/* SDIO bits */
@@ -24,7 +26,10 @@
24#define GPIO91_SDIO_EN 91 26#define GPIO91_SDIO_EN 91
25 27
26/* Bluetooth */ 28/* Bluetooth */
29#define GPIO14_BT_nACTIVITY 14
27#define GPIO83_BT_ON 83 30#define GPIO83_BT_ON 83
31#define GPIO77_BT_UNKNOWN1 77
32#define GPIO86_BT_MAYBE_nRESET 86
28 33
29/* GPS */ 34/* GPS */
30#define GPIO23_GPS_UNKNOWN1 23 35#define GPIO23_GPS_UNKNOWN1 23
diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h
index 15295d960000..31d615aa7723 100644
--- a/arch/arm/mach-pxa/include/mach/pxa-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa-regs.h
@@ -13,6 +13,7 @@
13#ifndef __PXA_REGS_H 13#ifndef __PXA_REGS_H
14#define __PXA_REGS_H 14#define __PXA_REGS_H
15 15
16#include <mach/hardware.h>
16 17
17/* 18/*
18 * PXA Chip selects 19 * PXA Chip selects
@@ -123,298 +124,6 @@
123#define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */ 124#define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */
124#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ 125#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
125 126
126
127/*
128 * UARTs
129 */
130
131/* Full Function UART (FFUART) */
132#define FFUART FFRBR
133#define FFRBR __REG(0x40100000) /* Receive Buffer Register (read only) */
134#define FFTHR __REG(0x40100000) /* Transmit Holding Register (write only) */
135#define FFIER __REG(0x40100004) /* Interrupt Enable Register (read/write) */
136#define FFIIR __REG(0x40100008) /* Interrupt ID Register (read only) */
137#define FFFCR __REG(0x40100008) /* FIFO Control Register (write only) */
138#define FFLCR __REG(0x4010000C) /* Line Control Register (read/write) */
139#define FFMCR __REG(0x40100010) /* Modem Control Register (read/write) */
140#define FFLSR __REG(0x40100014) /* Line Status Register (read only) */
141#define FFMSR __REG(0x40100018) /* Modem Status Register (read only) */
142#define FFSPR __REG(0x4010001C) /* Scratch Pad Register (read/write) */
143#define FFISR __REG(0x40100020) /* Infrared Selection Register (read/write) */
144#define FFDLL __REG(0x40100000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
145#define FFDLH __REG(0x40100004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
146
147/* Bluetooth UART (BTUART) */
148#define BTUART BTRBR
149#define BTRBR __REG(0x40200000) /* Receive Buffer Register (read only) */
150#define BTTHR __REG(0x40200000) /* Transmit Holding Register (write only) */
151#define BTIER __REG(0x40200004) /* Interrupt Enable Register (read/write) */
152#define BTIIR __REG(0x40200008) /* Interrupt ID Register (read only) */
153#define BTFCR __REG(0x40200008) /* FIFO Control Register (write only) */
154#define BTLCR __REG(0x4020000C) /* Line Control Register (read/write) */
155#define BTMCR __REG(0x40200010) /* Modem Control Register (read/write) */
156#define BTLSR __REG(0x40200014) /* Line Status Register (read only) */
157#define BTMSR __REG(0x40200018) /* Modem Status Register (read only) */
158#define BTSPR __REG(0x4020001C) /* Scratch Pad Register (read/write) */
159#define BTISR __REG(0x40200020) /* Infrared Selection Register (read/write) */
160#define BTDLL __REG(0x40200000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
161#define BTDLH __REG(0x40200004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
162
163/* Standard UART (STUART) */
164#define STUART STRBR
165#define STRBR __REG(0x40700000) /* Receive Buffer Register (read only) */
166#define STTHR __REG(0x40700000) /* Transmit Holding Register (write only) */
167#define STIER __REG(0x40700004) /* Interrupt Enable Register (read/write) */
168#define STIIR __REG(0x40700008) /* Interrupt ID Register (read only) */
169#define STFCR __REG(0x40700008) /* FIFO Control Register (write only) */
170#define STLCR __REG(0x4070000C) /* Line Control Register (read/write) */
171#define STMCR __REG(0x40700010) /* Modem Control Register (read/write) */
172#define STLSR __REG(0x40700014) /* Line Status Register (read only) */
173#define STMSR __REG(0x40700018) /* Reserved */
174#define STSPR __REG(0x4070001C) /* Scratch Pad Register (read/write) */
175#define STISR __REG(0x40700020) /* Infrared Selection Register (read/write) */
176#define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
177#define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
178
179/* Hardware UART (HWUART) */
180#define HWUART HWRBR
181#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */
182#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */
183#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */
184#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */
185#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */
186#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */
187#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */
188#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */
189#define HWMSR __REG(0x41600018) /* Modem Status Register (read only) */
190#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */
191#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */
192#define HWFOR __REG(0x41600024) /* Receive FIFO Occupancy Register (read only) */
193#define HWABR __REG(0x41600028) /* Auto-Baud Control Register (read/write) */
194#define HWACR __REG(0x4160002C) /* Auto-Baud Count Register (read only) */
195#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
196#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
197
198#define IER_DMAE (1 << 7) /* DMA Requests Enable */
199#define IER_UUE (1 << 6) /* UART Unit Enable */
200#define IER_NRZE (1 << 5) /* NRZ coding Enable */
201#define IER_RTIOE (1 << 4) /* Receiver Time Out Interrupt Enable */
202#define IER_MIE (1 << 3) /* Modem Interrupt Enable */
203#define IER_RLSE (1 << 2) /* Receiver Line Status Interrupt Enable */
204#define IER_TIE (1 << 1) /* Transmit Data request Interrupt Enable */
205#define IER_RAVIE (1 << 0) /* Receiver Data Available Interrupt Enable */
206
207#define IIR_FIFOES1 (1 << 7) /* FIFO Mode Enable Status */
208#define IIR_FIFOES0 (1 << 6) /* FIFO Mode Enable Status */
209#define IIR_TOD (1 << 3) /* Time Out Detected */
210#define IIR_IID2 (1 << 2) /* Interrupt Source Encoded */
211#define IIR_IID1 (1 << 1) /* Interrupt Source Encoded */
212#define IIR_IP (1 << 0) /* Interrupt Pending (active low) */
213
214#define FCR_ITL2 (1 << 7) /* Interrupt Trigger Level */
215#define FCR_ITL1 (1 << 6) /* Interrupt Trigger Level */
216#define FCR_RESETTF (1 << 2) /* Reset Transmitter FIFO */
217#define FCR_RESETRF (1 << 1) /* Reset Receiver FIFO */
218#define FCR_TRFIFOE (1 << 0) /* Transmit and Receive FIFO Enable */
219#define FCR_ITL_1 (0)
220#define FCR_ITL_8 (FCR_ITL1)
221#define FCR_ITL_16 (FCR_ITL2)
222#define FCR_ITL_32 (FCR_ITL2|FCR_ITL1)
223
224#define LCR_DLAB (1 << 7) /* Divisor Latch Access Bit */
225#define LCR_SB (1 << 6) /* Set Break */
226#define LCR_STKYP (1 << 5) /* Sticky Parity */
227#define LCR_EPS (1 << 4) /* Even Parity Select */
228#define LCR_PEN (1 << 3) /* Parity Enable */
229#define LCR_STB (1 << 2) /* Stop Bit */
230#define LCR_WLS1 (1 << 1) /* Word Length Select */
231#define LCR_WLS0 (1 << 0) /* Word Length Select */
232
233#define LSR_FIFOE (1 << 7) /* FIFO Error Status */
234#define LSR_TEMT (1 << 6) /* Transmitter Empty */
235#define LSR_TDRQ (1 << 5) /* Transmit Data Request */
236#define LSR_BI (1 << 4) /* Break Interrupt */
237#define LSR_FE (1 << 3) /* Framing Error */
238#define LSR_PE (1 << 2) /* Parity Error */
239#define LSR_OE (1 << 1) /* Overrun Error */
240#define LSR_DR (1 << 0) /* Data Ready */
241
242#define MCR_LOOP (1 << 4)
243#define MCR_OUT2 (1 << 3) /* force MSR_DCD in loopback mode */
244#define MCR_OUT1 (1 << 2) /* force MSR_RI in loopback mode */
245#define MCR_RTS (1 << 1) /* Request to Send */
246#define MCR_DTR (1 << 0) /* Data Terminal Ready */
247
248#define MSR_DCD (1 << 7) /* Data Carrier Detect */
249#define MSR_RI (1 << 6) /* Ring Indicator */
250#define MSR_DSR (1 << 5) /* Data Set Ready */
251#define MSR_CTS (1 << 4) /* Clear To Send */
252#define MSR_DDCD (1 << 3) /* Delta Data Carrier Detect */
253#define MSR_TERI (1 << 2) /* Trailing Edge Ring Indicator */
254#define MSR_DDSR (1 << 1) /* Delta Data Set Ready */
255#define MSR_DCTS (1 << 0) /* Delta Clear To Send */
256
257/*
258 * IrSR (Infrared Selection Register)
259 */
260#define STISR_RXPL (1 << 4) /* Receive Data Polarity */
261#define STISR_TXPL (1 << 3) /* Transmit Data Polarity */
262#define STISR_XMODE (1 << 2) /* Transmit Pulse Width Select */
263#define STISR_RCVEIR (1 << 1) /* Receiver SIR Enable */
264#define STISR_XMITIR (1 << 0) /* Transmitter SIR Enable */
265
266
267/*
268 * I2C registers - moved into drivers/i2c/busses/i2c-pxa.c
269 */
270
271/*
272 * Serial Audio Controller - moved into sound/soc/pxa/pxa2xx-i2s.c
273 */
274
275/*
276 * AC97 Controller registers
277 */
278
279#define POCR __REG(0x40500000) /* PCM Out Control Register */
280#define POCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
281#define POCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
282
283#define PICR __REG(0x40500004) /* PCM In Control Register */
284#define PICR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
285#define PICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
286
287#define MCCR __REG(0x40500008) /* Mic In Control Register */
288#define MCCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
289#define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
290
291#define GCR __REG(0x4050000C) /* Global Control Register */
292#ifdef CONFIG_PXA3xx
293#define GCR_CLKBPB (1 << 31) /* Internal clock enable */
294#endif
295#define GCR_nDMAEN (1 << 24) /* non DMA Enable */
296#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */
297#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */
298#define GCR_SECRDY_IEN (1 << 9) /* Secondary Ready Interrupt Enable */
299#define GCR_PRIRDY_IEN (1 << 8) /* Primary Ready Interrupt Enable */
300#define GCR_SECRES_IEN (1 << 5) /* Secondary Resume Interrupt Enable */
301#define GCR_PRIRES_IEN (1 << 4) /* Primary Resume Interrupt Enable */
302#define GCR_ACLINK_OFF (1 << 3) /* AC-link Shut Off */
303#define GCR_WARM_RST (1 << 2) /* AC97 Warm Reset */
304#define GCR_COLD_RST (1 << 1) /* AC'97 Cold Reset (0 = active) */
305#define GCR_GIE (1 << 0) /* Codec GPI Interrupt Enable */
306
307#define POSR __REG(0x40500010) /* PCM Out Status Register */
308#define POSR_FIFOE (1 << 4) /* FIFO error */
309#define POSR_FSR (1 << 2) /* FIFO Service Request */
310
311#define PISR __REG(0x40500014) /* PCM In Status Register */
312#define PISR_FIFOE (1 << 4) /* FIFO error */
313#define PISR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */
314#define PISR_FSR (1 << 2) /* FIFO Service Request */
315
316#define MCSR __REG(0x40500018) /* Mic In Status Register */
317#define MCSR_FIFOE (1 << 4) /* FIFO error */
318#define MCSR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */
319#define MCSR_FSR (1 << 2) /* FIFO Service Request */
320
321#define GSR __REG(0x4050001C) /* Global Status Register */
322#define GSR_CDONE (1 << 19) /* Command Done */
323#define GSR_SDONE (1 << 18) /* Status Done */
324#define GSR_RDCS (1 << 15) /* Read Completion Status */
325#define GSR_BIT3SLT12 (1 << 14) /* Bit 3 of slot 12 */
326#define GSR_BIT2SLT12 (1 << 13) /* Bit 2 of slot 12 */
327#define GSR_BIT1SLT12 (1 << 12) /* Bit 1 of slot 12 */
328#define GSR_SECRES (1 << 11) /* Secondary Resume Interrupt */
329#define GSR_PRIRES (1 << 10) /* Primary Resume Interrupt */
330#define GSR_SCR (1 << 9) /* Secondary Codec Ready */
331#define GSR_PCR (1 << 8) /* Primary Codec Ready */
332#define GSR_MCINT (1 << 7) /* Mic In Interrupt */
333#define GSR_POINT (1 << 6) /* PCM Out Interrupt */
334#define GSR_PIINT (1 << 5) /* PCM In Interrupt */
335#define GSR_ACOFFD (1 << 3) /* AC-link Shut Off Done */
336#define GSR_MOINT (1 << 2) /* Modem Out Interrupt */
337#define GSR_MIINT (1 << 1) /* Modem In Interrupt */
338#define GSR_GSCI (1 << 0) /* Codec GPI Status Change Interrupt */
339
340#define CAR __REG(0x40500020) /* CODEC Access Register */
341#define CAR_CAIP (1 << 0) /* Codec Access In Progress */
342
343#define PCDR __REG(0x40500040) /* PCM FIFO Data Register */
344#define MCDR __REG(0x40500060) /* Mic-in FIFO Data Register */
345
346#define MOCR __REG(0x40500100) /* Modem Out Control Register */
347#define MOCR_FEIE (1 << 3) /* FIFO Error */
348#define MOCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
349
350#define MICR __REG(0x40500108) /* Modem In Control Register */
351#define MICR_FEIE (1 << 3) /* FIFO Error */
352#define MICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
353
354#define MOSR __REG(0x40500110) /* Modem Out Status Register */
355#define MOSR_FIFOE (1 << 4) /* FIFO error */
356#define MOSR_FSR (1 << 2) /* FIFO Service Request */
357
358#define MISR __REG(0x40500118) /* Modem In Status Register */
359#define MISR_FIFOE (1 << 4) /* FIFO error */
360#define MISR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */
361#define MISR_FSR (1 << 2) /* FIFO Service Request */
362
363#define MODR __REG(0x40500140) /* Modem FIFO Data Register */
364
365#define PAC_REG_BASE __REG(0x40500200) /* Primary Audio Codec */
366#define SAC_REG_BASE __REG(0x40500300) /* Secondary Audio Codec */
367#define PMC_REG_BASE __REG(0x40500400) /* Primary Modem Codec */
368#define SMC_REG_BASE __REG(0x40500500) /* Secondary Modem Codec */
369
370
371/*
372 * Fast Infrared Communication Port
373 */
374
375#define FICP __REG(0x40800000) /* Start of FICP area */
376#define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */
377#define ICCR1 __REG(0x40800004) /* ICP Control Register 1 */
378#define ICCR2 __REG(0x40800008) /* ICP Control Register 2 */
379#define ICDR __REG(0x4080000c) /* ICP Data Register */
380#define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */
381#define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */
382
383#define ICCR0_AME (1 << 7) /* Address match enable */
384#define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */
385#define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */
386#define ICCR0_RXE (1 << 4) /* Receive enable */
387#define ICCR0_TXE (1 << 3) /* Transmit enable */
388#define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */
389#define ICCR0_LBM (1 << 1) /* Loopback mode */
390#define ICCR0_ITR (1 << 0) /* IrDA transmission */
391
392#define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */
393#define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */
394#define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */
395#define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */
396#define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */
397#define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */
398
399#ifdef CONFIG_PXA27x
400#define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */
401#endif
402#define ICSR0_FRE (1 << 5) /* Framing error */
403#define ICSR0_RFS (1 << 4) /* Receive FIFO service request */
404#define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */
405#define ICSR0_RAB (1 << 2) /* Receiver abort */
406#define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */
407#define ICSR0_EIF (1 << 0) /* End/Error in FIFO */
408
409#define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */
410#define ICSR1_CRE (1 << 5) /* CRC error */
411#define ICSR1_EOF (1 << 4) /* End of frame */
412#define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */
413#define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */
414#define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */
415#define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */
416
417
418/* 127/*
419 * Real Time Clock 128 * Real Time Clock
420 */ 129 */
@@ -463,19 +172,6 @@
463 172
464 173
465/* 174/*
466 * Pulse Width Modulator
467 */
468
469#define PWM_CTRL0 __REG(0x40B00000) /* PWM 0 Control Register */
470#define PWM_PWDUTY0 __REG(0x40B00004) /* PWM 0 Duty Cycle Register */
471#define PWM_PERVAL0 __REG(0x40B00008) /* PWM 0 Period Control Register */
472
473#define PWM_CTRL1 __REG(0x40C00000) /* PWM 1Control Register */
474#define PWM_PWDUTY1 __REG(0x40C00004) /* PWM 1 Duty Cycle Register */
475#define PWM_PERVAL1 __REG(0x40C00008) /* PWM 1 Period Control Register */
476
477
478/*
479 * Interrupt Controller 175 * Interrupt Controller
480 */ 176 */
481 177
@@ -496,19 +192,6 @@
496 * General Purpose I/O 192 * General Purpose I/O
497 */ 193 */
498 194
499#define GPIO0_BASE ((void __iomem *)io_p2v(0x40E00000))
500#define GPIO1_BASE ((void __iomem *)io_p2v(0x40E00004))
501#define GPIO2_BASE ((void __iomem *)io_p2v(0x40E00008))
502#define GPIO3_BASE ((void __iomem *)io_p2v(0x40E00100))
503
504#define GPLR_OFFSET 0x00
505#define GPDR_OFFSET 0x0C
506#define GPSR_OFFSET 0x18
507#define GPCR_OFFSET 0x24
508#define GRER_OFFSET 0x30
509#define GFER_OFFSET 0x3C
510#define GEDR_OFFSET 0x48
511
512#define GPLR0 __REG(0x40E00000) /* GPIO Pin-Level Register GPIO<31:0> */ 195#define GPLR0 __REG(0x40E00000) /* GPIO Pin-Level Register GPIO<31:0> */
513#define GPLR1 __REG(0x40E00004) /* GPIO Pin-Level Register GPIO<63:32> */ 196#define GPLR1 __REG(0x40E00004) /* GPIO Pin-Level Register GPIO<63:32> */
514#define GPLR2 __REG(0x40E00008) /* GPIO Pin-Level Register GPIO<80:64> */ 197#define GPLR2 __REG(0x40E00008) /* GPIO Pin-Level Register GPIO<80:64> */
@@ -558,10 +241,6 @@
558 241
559#define GPIO_bit(x) (1 << ((x) & 0x1f)) 242#define GPIO_bit(x) (1 << ((x) & 0x1f))
560 243
561#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
562
563/* Interrupt Controller */
564
565#define _GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3) 244#define _GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3)
566#define _GPDR(x) __REG2(0x40E0000C, ((x) & 0x60) >> 3) 245#define _GPDR(x) __REG2(0x40E0000C, ((x) & 0x60) >> 3)
567#define _GPSR(x) __REG2(0x40E00018, ((x) & 0x60) >> 3) 246#define _GPSR(x) __REG2(0x40E00018, ((x) & 0x60) >> 3)
@@ -580,189 +259,5 @@
580#define GEDR(x) (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3)) 259#define GEDR(x) (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3))
581#define GAFR(x) (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \ 260#define GAFR(x) (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \
582 ((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U))) 261 ((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U)))
583#else
584
585#define GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3)
586#define GPDR(x) __REG2(0x40E0000C, ((x) & 0x60) >> 3)
587#define GPSR(x) __REG2(0x40E00018, ((x) & 0x60) >> 3)
588#define GPCR(x) __REG2(0x40E00024, ((x) & 0x60) >> 3)
589#define GRER(x) __REG2(0x40E00030, ((x) & 0x60) >> 3)
590#define GFER(x) __REG2(0x40E0003C, ((x) & 0x60) >> 3)
591#define GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3)
592#define GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2)
593
594#endif
595
596/*
597 * Power Manager - see pxa2xx-regs.h
598 */
599
600/*
601 * SSP Serial Port Registers - see arch/arm/mach-pxa/include/mach/regs-ssp.h
602 */
603
604/*
605 * MultiMediaCard (MMC) controller - see drivers/mmc/host/pxamci.h
606 */
607
608/*
609 * Core Clock - see arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
610 */
611
612#ifdef CONFIG_PXA27x
613
614/* Camera Interface */
615#define CICR0 __REG(0x50000000)
616#define CICR1 __REG(0x50000004)
617#define CICR2 __REG(0x50000008)
618#define CICR3 __REG(0x5000000C)
619#define CICR4 __REG(0x50000010)
620#define CISR __REG(0x50000014)
621#define CIFR __REG(0x50000018)
622#define CITOR __REG(0x5000001C)
623#define CIBR0 __REG(0x50000028)
624#define CIBR1 __REG(0x50000030)
625#define CIBR2 __REG(0x50000038)
626
627#define CICR0_DMAEN (1 << 31) /* DMA request enable */
628#define CICR0_PAR_EN (1 << 30) /* Parity enable */
629#define CICR0_SL_CAP_EN (1 << 29) /* Capture enable for slave mode */
630#define CICR0_ENB (1 << 28) /* Camera interface enable */
631#define CICR0_DIS (1 << 27) /* Camera interface disable */
632#define CICR0_SIM (0x7 << 24) /* Sensor interface mode mask */
633#define CICR0_TOM (1 << 9) /* Time-out mask */
634#define CICR0_RDAVM (1 << 8) /* Receive-data-available mask */
635#define CICR0_FEM (1 << 7) /* FIFO-empty mask */
636#define CICR0_EOLM (1 << 6) /* End-of-line mask */
637#define CICR0_PERRM (1 << 5) /* Parity-error mask */
638#define CICR0_QDM (1 << 4) /* Quick-disable mask */
639#define CICR0_CDM (1 << 3) /* Disable-done mask */
640#define CICR0_SOFM (1 << 2) /* Start-of-frame mask */
641#define CICR0_EOFM (1 << 1) /* End-of-frame mask */
642#define CICR0_FOM (1 << 0) /* FIFO-overrun mask */
643
644#define CICR1_TBIT (1 << 31) /* Transparency bit */
645#define CICR1_RGBT_CONV (0x3 << 29) /* RGBT conversion mask */
646#define CICR1_PPL (0x7ff << 15) /* Pixels per line mask */
647#define CICR1_RGB_CONV (0x7 << 12) /* RGB conversion mask */
648#define CICR1_RGB_F (1 << 11) /* RGB format */
649#define CICR1_YCBCR_F (1 << 10) /* YCbCr format */
650#define CICR1_RGB_BPP (0x7 << 7) /* RGB bis per pixel mask */
651#define CICR1_RAW_BPP (0x3 << 5) /* Raw bis per pixel mask */
652#define CICR1_COLOR_SP (0x3 << 3) /* Color space mask */
653#define CICR1_DW (0x7 << 0) /* Data width mask */
654
655#define CICR2_BLW (0xff << 24) /* Beginning-of-line pixel clock
656 wait count mask */
657#define CICR2_ELW (0xff << 16) /* End-of-line pixel clock
658 wait count mask */
659#define CICR2_HSW (0x3f << 10) /* Horizontal sync pulse width mask */
660#define CICR2_BFPW (0x3f << 3) /* Beginning-of-frame pixel clock
661 wait count mask */
662#define CICR2_FSW (0x7 << 0) /* Frame stabilization
663 wait count mask */
664
665#define CICR3_BFW (0xff << 24) /* Beginning-of-frame line clock
666 wait count mask */
667#define CICR3_EFW (0xff << 16) /* End-of-frame line clock
668 wait count mask */
669#define CICR3_VSW (0x3f << 10) /* Vertical sync pulse width mask */
670#define CICR3_BFPW (0x3f << 3) /* Beginning-of-frame pixel clock
671 wait count mask */
672#define CICR3_LPF (0x7ff << 0) /* Lines per frame mask */
673
674#define CICR4_MCLK_DLY (0x3 << 24) /* MCLK Data Capture Delay mask */
675#define CICR4_PCLK_EN (1 << 23) /* Pixel clock enable */
676#define CICR4_PCP (1 << 22) /* Pixel clock polarity */
677#define CICR4_HSP (1 << 21) /* Horizontal sync polarity */
678#define CICR4_VSP (1 << 20) /* Vertical sync polarity */
679#define CICR4_MCLK_EN (1 << 19) /* MCLK enable */
680#define CICR4_FR_RATE (0x7 << 8) /* Frame rate mask */
681#define CICR4_DIV (0xff << 0) /* Clock divisor mask */
682
683#define CISR_FTO (1 << 15) /* FIFO time-out */
684#define CISR_RDAV_2 (1 << 14) /* Channel 2 receive data available */
685#define CISR_RDAV_1 (1 << 13) /* Channel 1 receive data available */
686#define CISR_RDAV_0 (1 << 12) /* Channel 0 receive data available */
687#define CISR_FEMPTY_2 (1 << 11) /* Channel 2 FIFO empty */
688#define CISR_FEMPTY_1 (1 << 10) /* Channel 1 FIFO empty */
689#define CISR_FEMPTY_0 (1 << 9) /* Channel 0 FIFO empty */
690#define CISR_EOL (1 << 8) /* End of line */
691#define CISR_PAR_ERR (1 << 7) /* Parity error */
692#define CISR_CQD (1 << 6) /* Camera interface quick disable */
693#define CISR_CDD (1 << 5) /* Camera interface disable done */
694#define CISR_SOF (1 << 4) /* Start of frame */
695#define CISR_EOF (1 << 3) /* End of frame */
696#define CISR_IFO_2 (1 << 2) /* FIFO overrun for Channel 2 */
697#define CISR_IFO_1 (1 << 1) /* FIFO overrun for Channel 1 */
698#define CISR_IFO_0 (1 << 0) /* FIFO overrun for Channel 0 */
699
700#define CIFR_FLVL2 (0x7f << 23) /* FIFO 2 level mask */
701#define CIFR_FLVL1 (0x7f << 16) /* FIFO 1 level mask */
702#define CIFR_FLVL0 (0xff << 8) /* FIFO 0 level mask */
703#define CIFR_THL_0 (0x3 << 4) /* Threshold Level for Channel 0 FIFO */
704#define CIFR_RESET_F (1 << 3) /* Reset input FIFOs */
705#define CIFR_FEN2 (1 << 2) /* FIFO enable for channel 2 */
706#define CIFR_FEN1 (1 << 1) /* FIFO enable for channel 1 */
707#define CIFR_FEN0 (1 << 0) /* FIFO enable for channel 0 */
708
709#define SRAM_SIZE 0x40000 /* 4x64K */
710
711#define SRAM_MEM_PHYS 0x5C000000
712
713#define IMPMCR __REG(0x58000000) /* IM Power Management Control Reg */
714#define IMPMSR __REG(0x58000008) /* IM Power Management Status Reg */
715
716#define IMPMCR_PC3 (0x3 << 22) /* Bank 3 Power Control */
717#define IMPMCR_PC3_RUN_MODE (0x0 << 22) /* Run mode */
718#define IMPMCR_PC3_STANDBY_MODE (0x1 << 22) /* Standby mode */
719#define IMPMCR_PC3_AUTO_MODE (0x3 << 22) /* Automatically controlled */
720
721#define IMPMCR_PC2 (0x3 << 20) /* Bank 2 Power Control */
722#define IMPMCR_PC2_RUN_MODE (0x0 << 20) /* Run mode */
723#define IMPMCR_PC2_STANDBY_MODE (0x1 << 20) /* Standby mode */
724#define IMPMCR_PC2_AUTO_MODE (0x3 << 20) /* Automatically controlled */
725
726#define IMPMCR_PC1 (0x3 << 18) /* Bank 1 Power Control */
727#define IMPMCR_PC1_RUN_MODE (0x0 << 18) /* Run mode */
728#define IMPMCR_PC1_STANDBY_MODE (0x1 << 18) /* Standby mode */
729#define IMPMCR_PC1_AUTO_MODE (0x3 << 18) /* Automatically controlled */
730
731#define IMPMCR_PC0 (0x3 << 16) /* Bank 0 Power Control */
732#define IMPMCR_PC0_RUN_MODE (0x0 << 16) /* Run mode */
733#define IMPMCR_PC0_STANDBY_MODE (0x1 << 16) /* Standby mode */
734#define IMPMCR_PC0_AUTO_MODE (0x3 << 16) /* Automatically controlled */
735
736#define IMPMCR_AW3 (1 << 11) /* Bank 3 Automatic Wake-up enable */
737#define IMPMCR_AW2 (1 << 10) /* Bank 2 Automatic Wake-up enable */
738#define IMPMCR_AW1 (1 << 9) /* Bank 1 Automatic Wake-up enable */
739#define IMPMCR_AW0 (1 << 8) /* Bank 0 Automatic Wake-up enable */
740
741#define IMPMCR_DST (0xFF << 0) /* Delay Standby Time, ms */
742
743#define IMPMSR_PS3 (0x3 << 6) /* Bank 3 Power Status: */
744#define IMPMSR_PS3_RUN_MODE (0x0 << 6) /* Run mode */
745#define IMPMSR_PS3_STANDBY_MODE (0x1 << 6) /* Standby mode */
746
747#define IMPMSR_PS2 (0x3 << 4) /* Bank 2 Power Status: */
748#define IMPMSR_PS2_RUN_MODE (0x0 << 4) /* Run mode */
749#define IMPMSR_PS2_STANDBY_MODE (0x1 << 4) /* Standby mode */
750
751#define IMPMSR_PS1 (0x3 << 2) /* Bank 1 Power Status: */
752#define IMPMSR_PS1_RUN_MODE (0x0 << 2) /* Run mode */
753#define IMPMSR_PS1_STANDBY_MODE (0x1 << 2) /* Standby mode */
754
755#define IMPMSR_PS0 (0x3 << 0) /* Bank 0 Power Status: */
756#define IMPMSR_PS0_RUN_MODE (0x0 << 0) /* Run mode */
757#define IMPMSR_PS0_STANDBY_MODE (0x1 << 0) /* Standby mode */
758
759#endif
760
761/* PWRMODE register M field values */
762
763#define PWRMODE_IDLE 0x1
764#define PWRMODE_STANDBY 0x2
765#define PWRMODE_SLEEP 0x3
766#define PWRMODE_DEEPSLEEP 0x7
767 262
768#endif 263#endif
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
index 6ef1dd09970b..d83393e25273 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
@@ -365,4 +365,9 @@
365#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_IN) 365#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_IN)
366#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN) 366#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN)
367 367
368/*
369 * Handy routine to set GPIO alternate functions
370 */
371extern int pxa_gpio_mode( int gpio_mode );
372
368#endif /* __ASM_ARCH_PXA2XX_GPIO_H */ 373#endif /* __ASM_ARCH_PXA2XX_GPIO_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
index 806ecfea44bf..77102d695cc7 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
@@ -49,6 +49,11 @@
49#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */ 49#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
50#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */ 50#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
51 51
52#define MDCNFG_DE0 (1 << 0) /* SDRAM Bank 0 Enable */
53#define MDCNFG_DE1 (1 << 1) /* SDRAM Bank 1 Enable */
54#define MDCNFG_DE2 (1 << 16) /* SDRAM Bank 2 Enable */
55#define MDCNFG_DE3 (1 << 17) /* SDRAM Bank 3 Enable */
56
52#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */ 57#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
53#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ 58#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
54#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */ 59#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
@@ -243,4 +248,11 @@
243#define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */ 248#define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */
244#define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */ 249#define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */
245 250
251/* PWRMODE register M field values */
252
253#define PWRMODE_IDLE 0x1
254#define PWRMODE_STANDBY 0x2
255#define PWRMODE_SLEEP 0x3
256#define PWRMODE_DEEPSLEEP 0x7
257
246#endif 258#endif
diff --git a/arch/arm/mach-pxa/include/mach/regs-ac97.h b/arch/arm/mach-pxa/include/mach/regs-ac97.h
new file mode 100644
index 000000000000..e41b9d202b8c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/regs-ac97.h
@@ -0,0 +1,99 @@
1#ifndef __ASM_ARCH_REGS_AC97_H
2#define __ASM_ARCH_REGS_AC97_H
3
4/*
5 * AC97 Controller registers
6 */
7
8#define POCR __REG(0x40500000) /* PCM Out Control Register */
9#define POCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
10#define POCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
11
12#define PICR __REG(0x40500004) /* PCM In Control Register */
13#define PICR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
14#define PICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
15
16#define MCCR __REG(0x40500008) /* Mic In Control Register */
17#define MCCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
18#define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
19
20#define GCR __REG(0x4050000C) /* Global Control Register */
21#ifdef CONFIG_PXA3xx
22#define GCR_CLKBPB (1 << 31) /* Internal clock enable */
23#endif
24#define GCR_nDMAEN (1 << 24) /* non DMA Enable */
25#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */
26#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */
27#define GCR_SECRDY_IEN (1 << 9) /* Secondary Ready Interrupt Enable */
28#define GCR_PRIRDY_IEN (1 << 8) /* Primary Ready Interrupt Enable */
29#define GCR_SECRES_IEN (1 << 5) /* Secondary Resume Interrupt Enable */
30#define GCR_PRIRES_IEN (1 << 4) /* Primary Resume Interrupt Enable */
31#define GCR_ACLINK_OFF (1 << 3) /* AC-link Shut Off */
32#define GCR_WARM_RST (1 << 2) /* AC97 Warm Reset */
33#define GCR_COLD_RST (1 << 1) /* AC'97 Cold Reset (0 = active) */
34#define GCR_GIE (1 << 0) /* Codec GPI Interrupt Enable */
35
36#define POSR __REG(0x40500010) /* PCM Out Status Register */
37#define POSR_FIFOE (1 << 4) /* FIFO error */
38#define POSR_FSR (1 << 2) /* FIFO Service Request */
39
40#define PISR __REG(0x40500014) /* PCM In Status Register */
41#define PISR_FIFOE (1 << 4) /* FIFO error */
42#define PISR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */
43#define PISR_FSR (1 << 2) /* FIFO Service Request */
44
45#define MCSR __REG(0x40500018) /* Mic In Status Register */
46#define MCSR_FIFOE (1 << 4) /* FIFO error */
47#define MCSR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */
48#define MCSR_FSR (1 << 2) /* FIFO Service Request */
49
50#define GSR __REG(0x4050001C) /* Global Status Register */
51#define GSR_CDONE (1 << 19) /* Command Done */
52#define GSR_SDONE (1 << 18) /* Status Done */
53#define GSR_RDCS (1 << 15) /* Read Completion Status */
54#define GSR_BIT3SLT12 (1 << 14) /* Bit 3 of slot 12 */
55#define GSR_BIT2SLT12 (1 << 13) /* Bit 2 of slot 12 */
56#define GSR_BIT1SLT12 (1 << 12) /* Bit 1 of slot 12 */
57#define GSR_SECRES (1 << 11) /* Secondary Resume Interrupt */
58#define GSR_PRIRES (1 << 10) /* Primary Resume Interrupt */
59#define GSR_SCR (1 << 9) /* Secondary Codec Ready */
60#define GSR_PCR (1 << 8) /* Primary Codec Ready */
61#define GSR_MCINT (1 << 7) /* Mic In Interrupt */
62#define GSR_POINT (1 << 6) /* PCM Out Interrupt */
63#define GSR_PIINT (1 << 5) /* PCM In Interrupt */
64#define GSR_ACOFFD (1 << 3) /* AC-link Shut Off Done */
65#define GSR_MOINT (1 << 2) /* Modem Out Interrupt */
66#define GSR_MIINT (1 << 1) /* Modem In Interrupt */
67#define GSR_GSCI (1 << 0) /* Codec GPI Status Change Interrupt */
68
69#define CAR __REG(0x40500020) /* CODEC Access Register */
70#define CAR_CAIP (1 << 0) /* Codec Access In Progress */
71
72#define PCDR __REG(0x40500040) /* PCM FIFO Data Register */
73#define MCDR __REG(0x40500060) /* Mic-in FIFO Data Register */
74
75#define MOCR __REG(0x40500100) /* Modem Out Control Register */
76#define MOCR_FEIE (1 << 3) /* FIFO Error */
77#define MOCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
78
79#define MICR __REG(0x40500108) /* Modem In Control Register */
80#define MICR_FEIE (1 << 3) /* FIFO Error */
81#define MICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
82
83#define MOSR __REG(0x40500110) /* Modem Out Status Register */
84#define MOSR_FIFOE (1 << 4) /* FIFO error */
85#define MOSR_FSR (1 << 2) /* FIFO Service Request */
86
87#define MISR __REG(0x40500118) /* Modem In Status Register */
88#define MISR_FIFOE (1 << 4) /* FIFO error */
89#define MISR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */
90#define MISR_FSR (1 << 2) /* FIFO Service Request */
91
92#define MODR __REG(0x40500140) /* Modem FIFO Data Register */
93
94#define PAC_REG_BASE __REG(0x40500200) /* Primary Audio Codec */
95#define SAC_REG_BASE __REG(0x40500300) /* Secondary Audio Codec */
96#define PMC_REG_BASE __REG(0x40500400) /* Primary Modem Codec */
97#define SMC_REG_BASE __REG(0x40500500) /* Secondary Modem Codec */
98
99#endif /* __ASM_ARCH_REGS_AC97_H */
diff --git a/arch/arm/mach-pxa/include/mach/regs-uart.h b/arch/arm/mach-pxa/include/mach/regs-uart.h
new file mode 100644
index 000000000000..55aeb7fb72f6
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/regs-uart.h
@@ -0,0 +1,143 @@
1#ifndef __ASM_ARCH_REGS_UART_H
2#define __ASM_ARCH_REGS_UART_H
3
4/*
5 * UARTs
6 */
7
8/* Full Function UART (FFUART) */
9#define FFUART FFRBR
10#define FFRBR __REG(0x40100000) /* Receive Buffer Register (read only) */
11#define FFTHR __REG(0x40100000) /* Transmit Holding Register (write only) */
12#define FFIER __REG(0x40100004) /* Interrupt Enable Register (read/write) */
13#define FFIIR __REG(0x40100008) /* Interrupt ID Register (read only) */
14#define FFFCR __REG(0x40100008) /* FIFO Control Register (write only) */
15#define FFLCR __REG(0x4010000C) /* Line Control Register (read/write) */
16#define FFMCR __REG(0x40100010) /* Modem Control Register (read/write) */
17#define FFLSR __REG(0x40100014) /* Line Status Register (read only) */
18#define FFMSR __REG(0x40100018) /* Modem Status Register (read only) */
19#define FFSPR __REG(0x4010001C) /* Scratch Pad Register (read/write) */
20#define FFISR __REG(0x40100020) /* Infrared Selection Register (read/write) */
21#define FFDLL __REG(0x40100000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
22#define FFDLH __REG(0x40100004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
23
24/* Bluetooth UART (BTUART) */
25#define BTUART BTRBR
26#define BTRBR __REG(0x40200000) /* Receive Buffer Register (read only) */
27#define BTTHR __REG(0x40200000) /* Transmit Holding Register (write only) */
28#define BTIER __REG(0x40200004) /* Interrupt Enable Register (read/write) */
29#define BTIIR __REG(0x40200008) /* Interrupt ID Register (read only) */
30#define BTFCR __REG(0x40200008) /* FIFO Control Register (write only) */
31#define BTLCR __REG(0x4020000C) /* Line Control Register (read/write) */
32#define BTMCR __REG(0x40200010) /* Modem Control Register (read/write) */
33#define BTLSR __REG(0x40200014) /* Line Status Register (read only) */
34#define BTMSR __REG(0x40200018) /* Modem Status Register (read only) */
35#define BTSPR __REG(0x4020001C) /* Scratch Pad Register (read/write) */
36#define BTISR __REG(0x40200020) /* Infrared Selection Register (read/write) */
37#define BTDLL __REG(0x40200000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
38#define BTDLH __REG(0x40200004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
39
40/* Standard UART (STUART) */
41#define STUART STRBR
42#define STRBR __REG(0x40700000) /* Receive Buffer Register (read only) */
43#define STTHR __REG(0x40700000) /* Transmit Holding Register (write only) */
44#define STIER __REG(0x40700004) /* Interrupt Enable Register (read/write) */
45#define STIIR __REG(0x40700008) /* Interrupt ID Register (read only) */
46#define STFCR __REG(0x40700008) /* FIFO Control Register (write only) */
47#define STLCR __REG(0x4070000C) /* Line Control Register (read/write) */
48#define STMCR __REG(0x40700010) /* Modem Control Register (read/write) */
49#define STLSR __REG(0x40700014) /* Line Status Register (read only) */
50#define STMSR __REG(0x40700018) /* Reserved */
51#define STSPR __REG(0x4070001C) /* Scratch Pad Register (read/write) */
52#define STISR __REG(0x40700020) /* Infrared Selection Register (read/write) */
53#define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
54#define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
55
56/* Hardware UART (HWUART) */
57#define HWUART HWRBR
58#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */
59#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */
60#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */
61#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */
62#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */
63#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */
64#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */
65#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */
66#define HWMSR __REG(0x41600018) /* Modem Status Register (read only) */
67#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */
68#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */
69#define HWFOR __REG(0x41600024) /* Receive FIFO Occupancy Register (read only) */
70#define HWABR __REG(0x41600028) /* Auto-Baud Control Register (read/write) */
71#define HWACR __REG(0x4160002C) /* Auto-Baud Count Register (read only) */
72#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
73#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
74
75#define IER_DMAE (1 << 7) /* DMA Requests Enable */
76#define IER_UUE (1 << 6) /* UART Unit Enable */
77#define IER_NRZE (1 << 5) /* NRZ coding Enable */
78#define IER_RTIOE (1 << 4) /* Receiver Time Out Interrupt Enable */
79#define IER_MIE (1 << 3) /* Modem Interrupt Enable */
80#define IER_RLSE (1 << 2) /* Receiver Line Status Interrupt Enable */
81#define IER_TIE (1 << 1) /* Transmit Data request Interrupt Enable */
82#define IER_RAVIE (1 << 0) /* Receiver Data Available Interrupt Enable */
83
84#define IIR_FIFOES1 (1 << 7) /* FIFO Mode Enable Status */
85#define IIR_FIFOES0 (1 << 6) /* FIFO Mode Enable Status */
86#define IIR_TOD (1 << 3) /* Time Out Detected */
87#define IIR_IID2 (1 << 2) /* Interrupt Source Encoded */
88#define IIR_IID1 (1 << 1) /* Interrupt Source Encoded */
89#define IIR_IP (1 << 0) /* Interrupt Pending (active low) */
90
91#define FCR_ITL2 (1 << 7) /* Interrupt Trigger Level */
92#define FCR_ITL1 (1 << 6) /* Interrupt Trigger Level */
93#define FCR_RESETTF (1 << 2) /* Reset Transmitter FIFO */
94#define FCR_RESETRF (1 << 1) /* Reset Receiver FIFO */
95#define FCR_TRFIFOE (1 << 0) /* Transmit and Receive FIFO Enable */
96#define FCR_ITL_1 (0)
97#define FCR_ITL_8 (FCR_ITL1)
98#define FCR_ITL_16 (FCR_ITL2)
99#define FCR_ITL_32 (FCR_ITL2|FCR_ITL1)
100
101#define LCR_DLAB (1 << 7) /* Divisor Latch Access Bit */
102#define LCR_SB (1 << 6) /* Set Break */
103#define LCR_STKYP (1 << 5) /* Sticky Parity */
104#define LCR_EPS (1 << 4) /* Even Parity Select */
105#define LCR_PEN (1 << 3) /* Parity Enable */
106#define LCR_STB (1 << 2) /* Stop Bit */
107#define LCR_WLS1 (1 << 1) /* Word Length Select */
108#define LCR_WLS0 (1 << 0) /* Word Length Select */
109
110#define LSR_FIFOE (1 << 7) /* FIFO Error Status */
111#define LSR_TEMT (1 << 6) /* Transmitter Empty */
112#define LSR_TDRQ (1 << 5) /* Transmit Data Request */
113#define LSR_BI (1 << 4) /* Break Interrupt */
114#define LSR_FE (1 << 3) /* Framing Error */
115#define LSR_PE (1 << 2) /* Parity Error */
116#define LSR_OE (1 << 1) /* Overrun Error */
117#define LSR_DR (1 << 0) /* Data Ready */
118
119#define MCR_LOOP (1 << 4)
120#define MCR_OUT2 (1 << 3) /* force MSR_DCD in loopback mode */
121#define MCR_OUT1 (1 << 2) /* force MSR_RI in loopback mode */
122#define MCR_RTS (1 << 1) /* Request to Send */
123#define MCR_DTR (1 << 0) /* Data Terminal Ready */
124
125#define MSR_DCD (1 << 7) /* Data Carrier Detect */
126#define MSR_RI (1 << 6) /* Ring Indicator */
127#define MSR_DSR (1 << 5) /* Data Set Ready */
128#define MSR_CTS (1 << 4) /* Clear To Send */
129#define MSR_DDCD (1 << 3) /* Delta Data Carrier Detect */
130#define MSR_TERI (1 << 2) /* Trailing Edge Ring Indicator */
131#define MSR_DDSR (1 << 1) /* Delta Data Set Ready */
132#define MSR_DCTS (1 << 0) /* Delta Clear To Send */
133
134/*
135 * IrSR (Infrared Selection Register)
136 */
137#define STISR_RXPL (1 << 4) /* Receive Data Polarity */
138#define STISR_TXPL (1 << 3) /* Transmit Data Polarity */
139#define STISR_XMODE (1 << 2) /* Transmit Pulse Width Select */
140#define STISR_RCVEIR (1 << 1) /* Receiver SIR Enable */
141#define STISR_XMITIR (1 << 0) /* Transmitter SIR Enable */
142
143#endif /* __ASM_ARCH_REGS_UART_H */
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 21e3e890af98..a9a4f302b6ef 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -10,7 +10,7 @@
10 */ 10 */
11 11
12#include <linux/serial_reg.h> 12#include <linux/serial_reg.h>
13#include <mach/pxa-regs.h> 13#include <mach/regs-uart.h>
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15 15
16#define __REG(x) ((volatile unsigned long *)x) 16#define __REG(x) ((volatile unsigned long *)x)
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index b4d00aba0e31..5609f52e36b1 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/gpio.h>
23#include <linux/spi/spi.h> 24#include <linux/spi/spi.h>
24#include <linux/smc91x.h> 25#include <linux/smc91x.h>
25 26
@@ -36,7 +37,6 @@
36 37
37#include <mach/pxa-regs.h> 38#include <mach/pxa-regs.h>
38#include <mach/mfp-pxa300.h> 39#include <mach/mfp-pxa300.h>
39#include <mach/gpio.h>
40#include <mach/pxafb.h> 40#include <mach/pxafb.h>
41#include <mach/ssp.h> 41#include <mach/ssp.h>
42#include <mach/pxa2xx_spi.h> 42#include <mach/pxa2xx_spi.h>
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 519138bc5f85..bf59cec27def 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -123,6 +123,10 @@ static unsigned long magician_pin_config[] __initdata = {
123 GPIO107_GPIO, /* DS1WM_IRQ */ 123 GPIO107_GPIO, /* DS1WM_IRQ */
124 GPIO108_GPIO, /* GSM_READY */ 124 GPIO108_GPIO, /* GSM_READY */
125 GPIO115_GPIO, /* nPEN_IRQ */ 125 GPIO115_GPIO, /* nPEN_IRQ */
126
127 /* I2C */
128 GPIO117_I2C_SCL,
129 GPIO118_I2C_SDA,
126}; 130};
127 131
128/* 132/*
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index f2c7ad8f2b6b..5f224968043c 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -128,6 +128,10 @@ static unsigned long mainstone_pin_config[] = {
128 GPIO108_KP_MKOUT_5, 128 GPIO108_KP_MKOUT_5,
129 GPIO96_KP_MKOUT_6, 129 GPIO96_KP_MKOUT_6,
130 130
131 /* I2C */
132 GPIO117_I2C_SCL,
133 GPIO118_I2C_SDA,
134
131 /* GPIO */ 135 /* GPIO */
132 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, 136 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
133}; 137};
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 2061c00c8ead..33626de8cbf6 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -38,12 +38,13 @@ struct gpio_desc {
38 unsigned valid : 1; 38 unsigned valid : 1;
39 unsigned can_wakeup : 1; 39 unsigned can_wakeup : 1;
40 unsigned keypad_gpio : 1; 40 unsigned keypad_gpio : 1;
41 unsigned dir_inverted : 1;
41 unsigned int mask; /* bit mask in PWER or PKWR */ 42 unsigned int mask; /* bit mask in PWER or PKWR */
43 unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
42 unsigned long config; 44 unsigned long config;
43}; 45};
44 46
45static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1]; 47static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
46static int gpio_nr;
47 48
48static unsigned long gpdr_lpm[4]; 49static unsigned long gpdr_lpm[4];
49 50
@@ -54,7 +55,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
54 int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */ 55 int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
55 int shft = (gpio & 0xf) << 1; 56 int shft = (gpio & 0xf) << 1;
56 int fn = MFP_AF(c); 57 int fn = MFP_AF(c);
57 int dir = c & MFP_DIR_OUT; 58 int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
58 59
59 if (fn > 3) 60 if (fn > 3)
60 return -EINVAL; 61 return -EINVAL;
@@ -68,7 +69,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
68 else 69 else
69 GAFR_U(bank) = gafr; 70 GAFR_U(bank) = gafr;
70 71
71 if (dir == MFP_DIR_OUT) 72 if (is_out ^ gpio_desc[gpio].dir_inverted)
72 GPDR(gpio) |= mask; 73 GPDR(gpio) |= mask;
73 else 74 else
74 GPDR(gpio) &= ~mask; 75 GPDR(gpio) &= ~mask;
@@ -77,11 +78,11 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
77 switch (c & MFP_LPM_STATE_MASK) { 78 switch (c & MFP_LPM_STATE_MASK) {
78 case MFP_LPM_DRIVE_HIGH: 79 case MFP_LPM_DRIVE_HIGH:
79 PGSR(bank) |= mask; 80 PGSR(bank) |= mask;
80 dir = MFP_DIR_OUT; 81 is_out = 1;
81 break; 82 break;
82 case MFP_LPM_DRIVE_LOW: 83 case MFP_LPM_DRIVE_LOW:
83 PGSR(bank) &= ~mask; 84 PGSR(bank) &= ~mask;
84 dir = MFP_DIR_OUT; 85 is_out = 1;
85 break; 86 break;
86 case MFP_LPM_DEFAULT: 87 case MFP_LPM_DEFAULT:
87 break; 88 break;
@@ -92,7 +93,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
92 break; 93 break;
93 } 94 }
94 95
95 if (dir == MFP_DIR_OUT) 96 if (is_out ^ gpio_desc[gpio].dir_inverted)
96 gpdr_lpm[bank] |= mask; 97 gpdr_lpm[bank] |= mask;
97 else 98 else
98 gpdr_lpm[bank] &= ~mask; 99 gpdr_lpm[bank] &= ~mask;
@@ -106,7 +107,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
106 return -EINVAL; 107 return -EINVAL;
107 } 108 }
108 109
109 if ((c & MFP_LPM_CAN_WAKEUP) && (dir == MFP_DIR_OUT)) { 110 if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
110 pr_warning("%s: output GPIO%d unable to wakeup\n", 111 pr_warning("%s: output GPIO%d unable to wakeup\n",
111 __func__, gpio); 112 __func__, gpio);
112 return -EINVAL; 113 return -EINVAL;
@@ -169,7 +170,7 @@ void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
169int gpio_set_wake(unsigned int gpio, unsigned int on) 170int gpio_set_wake(unsigned int gpio, unsigned int on)
170{ 171{
171 struct gpio_desc *d; 172 struct gpio_desc *d;
172 unsigned long c; 173 unsigned long c, mux_taken;
173 174
174 if (gpio > mfp_to_gpio(MFP_PIN_GPIO127)) 175 if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
175 return -EINVAL; 176 return -EINVAL;
@@ -183,9 +184,13 @@ int gpio_set_wake(unsigned int gpio, unsigned int on)
183 if (d->keypad_gpio) 184 if (d->keypad_gpio)
184 return -EINVAL; 185 return -EINVAL;
185 186
187 mux_taken = (PWER & d->mux_mask) & (~d->mask);
188 if (on && mux_taken)
189 return -EBUSY;
190
186 if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) { 191 if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
187 if (on) { 192 if (on) {
188 PWER |= d->mask; 193 PWER = (PWER & ~d->mux_mask) | d->mask;
189 194
190 if (c & MFP_LPM_EDGE_RISE) 195 if (c & MFP_LPM_EDGE_RISE)
191 PRER |= d->mask; 196 PRER |= d->mask;
@@ -210,7 +215,7 @@ static void __init pxa25x_mfp_init(void)
210{ 215{
211 int i; 216 int i;
212 217
213 for (i = 0; i <= 84; i++) 218 for (i = 0; i <= pxa_last_gpio; i++)
214 gpio_desc[i].valid = 1; 219 gpio_desc[i].valid = 1;
215 220
216 for (i = 0; i <= 15; i++) { 221 for (i = 0; i <= 15; i++) {
@@ -218,7 +223,11 @@ static void __init pxa25x_mfp_init(void)
218 gpio_desc[i].mask = GPIO_bit(i); 223 gpio_desc[i].mask = GPIO_bit(i);
219 } 224 }
220 225
221 gpio_nr = 85; 226 /* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
227 * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
228 */
229 for (i = 86; i <= pxa_last_gpio; i++)
230 gpio_desc[i].dir_inverted = 1;
222} 231}
223#else 232#else
224static inline void pxa25x_mfp_init(void) {} 233static inline void pxa25x_mfp_init(void) {}
@@ -251,11 +260,27 @@ int keypad_set_wake(unsigned int on)
251 return 0; 260 return 0;
252} 261}
253 262
263#define PWER_WEMUX2_GPIO38 (1 << 16)
264#define PWER_WEMUX2_GPIO53 (2 << 16)
265#define PWER_WEMUX2_GPIO40 (3 << 16)
266#define PWER_WEMUX2_GPIO36 (4 << 16)
267#define PWER_WEMUX2_MASK (7 << 16)
268#define PWER_WEMUX3_GPIO31 (1 << 19)
269#define PWER_WEMUX3_GPIO113 (2 << 19)
270#define PWER_WEMUX3_MASK (3 << 19)
271
272#define INIT_GPIO_DESC_MUXED(mux, gpio) \
273do { \
274 gpio_desc[(gpio)].can_wakeup = 1; \
275 gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \
276 gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \
277} while (0)
278
254static void __init pxa27x_mfp_init(void) 279static void __init pxa27x_mfp_init(void)
255{ 280{
256 int i, gpio; 281 int i, gpio;
257 282
258 for (i = 0; i <= 120; i++) { 283 for (i = 0; i <= pxa_last_gpio; i++) {
259 /* skip GPIO2, 5, 6, 7, 8, they are not 284 /* skip GPIO2, 5, 6, 7, 8, they are not
260 * valid pins allow configuration 285 * valid pins allow configuration
261 */ 286 */
@@ -286,7 +311,12 @@ static void __init pxa27x_mfp_init(void)
286 gpio_desc[35].can_wakeup = 1; 311 gpio_desc[35].can_wakeup = 1;
287 gpio_desc[35].mask = PWER_WE35; 312 gpio_desc[35].mask = PWER_WE35;
288 313
289 gpio_nr = 121; 314 INIT_GPIO_DESC_MUXED(WEMUX3, 31);
315 INIT_GPIO_DESC_MUXED(WEMUX3, 113);
316 INIT_GPIO_DESC_MUXED(WEMUX2, 38);
317 INIT_GPIO_DESC_MUXED(WEMUX2, 53);
318 INIT_GPIO_DESC_MUXED(WEMUX2, 40);
319 INIT_GPIO_DESC_MUXED(WEMUX2, 36);
290} 320}
291#else 321#else
292static inline void pxa27x_mfp_init(void) {} 322static inline void pxa27x_mfp_init(void) {}
@@ -300,7 +330,7 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
300{ 330{
301 int i; 331 int i;
302 332
303 for (i = 0; i <= gpio_to_bank(gpio_nr); i++) { 333 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
304 334
305 saved_gafr[0][i] = GAFR_L(i); 335 saved_gafr[0][i] = GAFR_L(i);
306 saved_gafr[1][i] = GAFR_U(i); 336 saved_gafr[1][i] = GAFR_U(i);
@@ -315,7 +345,7 @@ static int pxa2xx_mfp_resume(struct sys_device *d)
315{ 345{
316 int i; 346 int i;
317 347
318 for (i = 0; i <= gpio_to_bank(gpio_nr); i++) { 348 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
319 GAFR_L(i) = saved_gafr[0][i]; 349 GAFR_L(i) = saved_gafr[0][i];
320 GAFR_U(i) = saved_gafr[1][i]; 350 GAFR_U(i) = saved_gafr[1][i];
321 GPDR(i * 32) = saved_gpdr[i]; 351 GPDR(i * 32) = saved_gpdr[i];
@@ -348,7 +378,7 @@ static int __init pxa2xx_mfp_init(void)
348 pxa27x_mfp_init(); 378 pxa27x_mfp_init();
349 379
350 /* initialize gafr_run[], pgsr_lpm[] from existing values */ 380 /* initialize gafr_run[], pgsr_lpm[] from existing values */
351 for (i = 0; i <= gpio_to_bank(gpio_nr); i++) 381 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
352 gpdr_lpm[i] = GPDR(i * 32); 382 gpdr_lpm[i] = GPDR(i * 32);
353 383
354 return sysdev_class_register(&pxa2xx_mfp_sysclass); 384 return sysdev_class_register(&pxa2xx_mfp_sysclass);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 782903fe9c6c..2b427e015b6f 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -34,7 +34,7 @@
34#include <linux/irq.h> 34#include <linux/irq.h>
35#include <linux/pda_power.h> 35#include <linux/pda_power.h>
36#include <linux/power_supply.h> 36#include <linux/power_supply.h>
37#include <linux/wm97xx.h> 37#include <linux/wm97xx_batt.h>
38#include <linux/mtd/physmap.h> 38#include <linux/mtd/physmap.h>
39 39
40#include <asm/mach-types.h> 40#include <asm/mach-types.h>
@@ -46,6 +46,9 @@
46#include <mach/mmc.h> 46#include <mach/mmc.h>
47#include <mach/udc.h> 47#include <mach/udc.h>
48#include <mach/pxa27x-udc.h> 48#include <mach/pxa27x-udc.h>
49#include <mach/i2c.h>
50#include <mach/camera.h>
51#include <media/soc_camera.h>
49 52
50#include <mach/mioa701.h> 53#include <mach/mioa701.h>
51 54
@@ -54,10 +57,11 @@
54 57
55static unsigned long mioa701_pin_config[] = { 58static unsigned long mioa701_pin_config[] = {
56 /* Mio global */ 59 /* Mio global */
57 MIO_CFG_OUT(GPIO9_CHARGE_nEN, AF0, DRIVE_LOW), 60 MIO_CFG_OUT(GPIO9_CHARGE_EN, AF0, DRIVE_LOW),
58 MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW), 61 MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW),
59 MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH), 62 MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH),
60 MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH), 63 MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH),
64 MIO_CFG_IN(GPIO80_MAYBE_CHARGE_VDROP, AF0),
61 65
62 /* Backlight PWM 0 */ 66 /* Backlight PWM 0 */
63 GPIO16_PWM0_OUT, 67 GPIO16_PWM0_OUT,
@@ -74,7 +78,7 @@ static unsigned long mioa701_pin_config[] = {
74 MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW), 78 MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW),
75 79
76 /* USB */ 80 /* USB */
77 MIO_CFG_IN(GPIO13_USB_DETECT, AF0), 81 MIO_CFG_IN(GPIO13_nUSB_DETECT, AF0),
78 MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW), 82 MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW),
79 83
80 /* LCD */ 84 /* LCD */
@@ -98,12 +102,29 @@ static unsigned long mioa701_pin_config[] = {
98 GPIO75_LCD_LCLK, 102 GPIO75_LCD_LCLK,
99 GPIO76_LCD_PCLK, 103 GPIO76_LCD_PCLK,
100 104
105 /* QCI */
106 GPIO12_CIF_DD_7,
107 GPIO17_CIF_DD_6,
108 GPIO50_CIF_DD_3,
109 GPIO51_CIF_DD_2,
110 GPIO52_CIF_DD_4,
111 GPIO53_CIF_MCLK,
112 GPIO54_CIF_PCLK,
113 GPIO55_CIF_DD_1,
114 GPIO81_CIF_DD_0,
115 GPIO82_CIF_DD_5,
116 GPIO84_CIF_FV,
117 GPIO85_CIF_LV,
118
101 /* Bluetooth */ 119 /* Bluetooth */
120 MIO_CFG_IN(GPIO14_BT_nACTIVITY, AF0),
102 GPIO44_BTUART_CTS, 121 GPIO44_BTUART_CTS,
103 GPIO42_BTUART_RXD, 122 GPIO42_BTUART_RXD,
104 GPIO45_BTUART_RTS, 123 GPIO45_BTUART_RTS,
105 GPIO43_BTUART_TXD, 124 GPIO43_BTUART_TXD,
106 MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW), 125 MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW),
126 MIO_CFG_OUT(GPIO77_BT_UNKNOWN1, AF0, DRIVE_HIGH),
127 MIO_CFG_OUT(GPIO86_BT_MAYBE_nRESET, AF0, DRIVE_HIGH),
107 128
108 /* GPS */ 129 /* GPS */
109 MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW), 130 MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW),
@@ -151,16 +172,16 @@ static unsigned long mioa701_pin_config[] = {
151 GPIO104_KP_MKOUT_1, 172 GPIO104_KP_MKOUT_1,
152 GPIO105_KP_MKOUT_2, 173 GPIO105_KP_MKOUT_2,
153 174
175 /* I2C */
176 GPIO117_I2C_SCL,
177 GPIO118_I2C_SDA,
178
154 /* Unknown */ 179 /* Unknown */
155 MFP_CFG_IN(GPIO14, AF0),
156 MFP_CFG_IN(GPIO20, AF0), 180 MFP_CFG_IN(GPIO20, AF0),
157 MFP_CFG_IN(GPIO21, AF0), 181 MFP_CFG_IN(GPIO21, AF0),
158 MFP_CFG_IN(GPIO33, AF0), 182 MFP_CFG_IN(GPIO33, AF0),
159 MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH), 183 MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH),
160 MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH), 184 MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH),
161 MFP_CFG_OUT(GPIO77, AF0, DRIVE_HIGH),
162 MFP_CFG_IN(GPIO80, AF0),
163 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH),
164 MFP_CFG_IN(GPIO96, AF0), 185 MFP_CFG_IN(GPIO96, AF0),
165 MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH), 186 MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH),
166}; 187};
@@ -407,7 +428,7 @@ static void udc_power_command(int cmd)
407 428
408static int is_usb_connected(void) 429static int is_usb_connected(void)
409{ 430{
410 return !!gpio_get_value(GPIO13_USB_DETECT); 431 return !gpio_get_value(GPIO13_nUSB_DETECT);
411} 432}
412 433
413static struct pxa2xx_udc_mach_info mioa701_udc_info = { 434static struct pxa2xx_udc_mach_info mioa701_udc_info = {
@@ -659,13 +680,19 @@ static char *supplicants[] = {
659 "mioa701_battery" 680 "mioa701_battery"
660}; 681};
661 682
683static int is_ac_connected(void)
684{
685 return gpio_get_value(GPIO96_AC_DETECT);
686}
687
662static void mioa701_set_charge(int flags) 688static void mioa701_set_charge(int flags)
663{ 689{
664 gpio_set_value(GPIO9_CHARGE_nEN, !flags); 690 gpio_set_value(GPIO9_CHARGE_EN, (flags == PDA_POWER_CHARGE_USB));
665} 691}
666 692
667static struct pda_power_pdata power_pdata = { 693static struct pda_power_pdata power_pdata = {
668 .is_ac_online = is_usb_connected, 694 .is_ac_online = is_ac_connected,
695 .is_usb_online = is_usb_connected,
669 .set_charge = mioa701_set_charge, 696 .set_charge = mioa701_set_charge,
670 .supplied_to = supplicants, 697 .supplied_to = supplicants,
671 .num_supplicants = ARRAY_SIZE(supplicants), 698 .num_supplicants = ARRAY_SIZE(supplicants),
@@ -674,8 +701,15 @@ static struct pda_power_pdata power_pdata = {
674static struct resource power_resources[] = { 701static struct resource power_resources[] = {
675 [0] = { 702 [0] = {
676 .name = "ac", 703 .name = "ac",
677 .start = gpio_to_irq(GPIO13_USB_DETECT), 704 .start = gpio_to_irq(GPIO96_AC_DETECT),
678 .end = gpio_to_irq(GPIO13_USB_DETECT), 705 .end = gpio_to_irq(GPIO96_AC_DETECT),
706 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
707 IORESOURCE_IRQ_LOWEDGE,
708 },
709 [1] = {
710 .name = "usb",
711 .start = gpio_to_irq(GPIO13_nUSB_DETECT),
712 .end = gpio_to_irq(GPIO13_nUSB_DETECT),
679 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 713 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
680 IORESOURCE_IRQ_LOWEDGE, 714 IORESOURCE_IRQ_LOWEDGE,
681 }, 715 },
@@ -691,120 +725,43 @@ static struct platform_device power_dev = {
691 }, 725 },
692}; 726};
693 727
694#if defined(CONFIG_PDA_POWER) && defined(CONFIG_TOUCHSCREEN_WM97XX) 728static struct wm97xx_batt_info mioa701_battery_data = {
695static struct wm97xx *battery_wm; 729 .batt_aux = WM97XX_AUX_ID1,
696 730 .temp_aux = -1,
697static enum power_supply_property battery_props[] = { 731 .charge_gpio = -1,
698 POWER_SUPPLY_PROP_STATUS, 732 .min_voltage = 0xc00,
699 POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, 733 .max_voltage = 0xfc0,
700 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, 734 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION,
701 POWER_SUPPLY_PROP_VOLTAGE_NOW, 735 .batt_div = 1,
702 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, /* Necessary for apm */ 736 .batt_mult = 1,
737 .batt_name = "mioa701_battery",
703}; 738};
704 739
705static int get_battery_voltage(void) 740/*
706{ 741 * Camera interface
707 int adc = -1; 742 */
708 743struct pxacamera_platform_data mioa701_pxacamera_platform_data = {
709 if (battery_wm) 744 .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
710 adc = wm97xx_read_aux_adc(battery_wm, WM97XX_AUX_ID1); 745 PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
711 return adc; 746 .mclk_10khz = 5000,
712}
713
714static int get_battery_status(struct power_supply *b)
715{
716 int status;
717
718 if (is_usb_connected())
719 status = POWER_SUPPLY_STATUS_CHARGING;
720 else
721 status = POWER_SUPPLY_STATUS_DISCHARGING;
722
723 return status;
724}
725
726static int get_property(struct power_supply *b,
727 enum power_supply_property psp,
728 union power_supply_propval *val)
729{
730 int rc = 0;
731
732 switch (psp) {
733 case POWER_SUPPLY_PROP_STATUS:
734 val->intval = get_battery_status(b);
735 break;
736 case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
737 val->intval = 0xfd0;
738 break;
739 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
740 val->intval = 0xc00;
741 break;
742 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
743 val->intval = get_battery_voltage();
744 break;
745 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
746 val->intval = 100;
747 break;
748 default:
749 val->intval = -1;
750 rc = -1;
751 }
752
753 return rc;
754}; 747};
755 748
756static struct power_supply battery_ps = { 749static struct soc_camera_link iclink = {
757 .name = "mioa701_battery", 750 .bus_id = 0, /* Must match id in pxa27x_device_camera in device.c */
758 .type = POWER_SUPPLY_TYPE_BATTERY,
759 .get_property = get_property,
760 .properties = battery_props,
761 .num_properties = ARRAY_SIZE(battery_props),
762}; 751};
763 752
764static int battery_probe(struct platform_device *pdev) 753/* Board I2C devices. */
765{ 754static struct i2c_board_info __initdata mioa701_i2c_devices[] = {
766 struct wm97xx *wm = platform_get_drvdata(pdev); 755 {
767 int rc; 756 /* Must initialize before the camera(s) */
768 757 I2C_BOARD_INFO("mt9m111", 0x5d),
769 battery_wm = wm; 758 .platform_data = &iclink,
770
771 rc = power_supply_register(NULL, &battery_ps);
772 if (rc)
773 dev_err(&pdev->dev,
774 "Could not register mioa701 battery -> %d\n", rc);
775 return rc;
776}
777
778static int battery_remove(struct platform_device *pdev)
779{
780 battery_wm = NULL;
781 return 0;
782}
783
784static struct platform_driver mioa701_battery_driver = {
785 .driver = {
786 .name = "wm97xx-battery",
787 }, 759 },
788 .probe = battery_probe,
789 .remove = battery_remove
790}; 760};
791 761
792static int __init mioa701_battery_init(void) 762struct i2c_pxa_platform_data i2c_pdata = {
793{ 763 .fast_mode = 1,
794 int rc; 764};
795
796 rc = platform_driver_register(&mioa701_battery_driver);
797 if (rc)
798 printk(KERN_ERR "Could not register mioa701 battery driver\n");
799 return rc;
800}
801
802#else
803static int __init mioa701_battery_init(void)
804{
805 return 0;
806}
807#endif
808 765
809/* 766/*
810 * Mio global 767 * Mio global
@@ -851,17 +808,17 @@ static void mioa701_machine_exit(void);
851static void mioa701_poweroff(void) 808static void mioa701_poweroff(void)
852{ 809{
853 mioa701_machine_exit(); 810 mioa701_machine_exit();
854 gpio_set_value(GPIO18_POWEROFF, 1); 811 arm_machine_restart('s');
855} 812}
856 813
857static void mioa701_restart(char c) 814static void mioa701_restart(char c)
858{ 815{
859 mioa701_machine_exit(); 816 mioa701_machine_exit();
860 arm_machine_restart(c); 817 arm_machine_restart('s');
861} 818}
862 819
863struct gpio_ress global_gpios[] = { 820struct gpio_ress global_gpios[] = {
864 MIO_GPIO_OUT(GPIO9_CHARGE_nEN, 1, "Charger enable"), 821 MIO_GPIO_OUT(GPIO9_CHARGE_EN, 1, "Charger enable"),
865 MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"), 822 MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"),
866 MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power") 823 MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power")
867}; 824};
@@ -879,12 +836,16 @@ static void __init mioa701_machine_init(void)
879 set_pxa_fb_info(&mioa701_pxafb_info); 836 set_pxa_fb_info(&mioa701_pxafb_info);
880 pxa_set_mci_info(&mioa701_mci_info); 837 pxa_set_mci_info(&mioa701_mci_info);
881 pxa_set_keypad_info(&mioa701_keypad_info); 838 pxa_set_keypad_info(&mioa701_keypad_info);
839 wm97xx_bat_set_pdata(&mioa701_battery_data);
882 udc_init(); 840 udc_init();
883 pm_power_off = mioa701_poweroff; 841 pm_power_off = mioa701_poweroff;
884 arm_pm_restart = mioa701_restart; 842 arm_pm_restart = mioa701_restart;
885 platform_add_devices(devices, ARRAY_SIZE(devices)); 843 platform_add_devices(devices, ARRAY_SIZE(devices));
886 gsm_init(); 844 gsm_init();
887 mioa701_battery_init(); 845
846 pxa_set_i2c_info(&i2c_pdata);
847 pxa_set_camera_info(&mioa701_pxacamera_platform_data);
848 i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices));
888} 849}
889 850
890static void mioa701_machine_exit(void) 851static void mioa701_machine_exit(void)
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index b36cec5c9eed..3ea01e0eac63 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -55,6 +55,10 @@ static unsigned long pcm990_pin_config[] __initdata = {
55 GPIO89_USBH1_PEN, 55 GPIO89_USBH1_PEN,
56 /* PWM0 */ 56 /* PWM0 */
57 GPIO16_PWM0_OUT, 57 GPIO16_PWM0_OUT,
58
59 /* I2C */
60 GPIO117_I2C_SCL,
61 GPIO118_I2C_SDA,
58}; 62};
59 63
60/* 64/*
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 2e3bd8b1523b..ae88855bf974 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -20,6 +20,7 @@
20#include <linux/fb.h> 20#include <linux/fb.h>
21#include <linux/pm.h> 21#include <linux/pm.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/mtd/physmap.h>
23#include <linux/gpio.h> 24#include <linux/gpio.h>
24#include <linux/spi/spi.h> 25#include <linux/spi/spi.h>
25#include <linux/spi/ads7846.h> 26#include <linux/spi/ads7846.h>
@@ -413,9 +414,40 @@ static struct pxafb_mach_info poodle_fb_info = {
413 .lcd_conn = LCD_COLOR_TFT_16BPP, 414 .lcd_conn = LCD_COLOR_TFT_16BPP,
414}; 415};
415 416
417static struct mtd_partition sharpsl_rom_parts[] = {
418 {
419 .name ="Boot PROM Filesystem",
420 .offset = 0x00120000,
421 .size = MTDPART_SIZ_FULL,
422 },
423};
424
425static struct physmap_flash_data sharpsl_rom_data = {
426 .width = 2,
427 .nr_parts = ARRAY_SIZE(sharpsl_rom_parts),
428 .parts = sharpsl_rom_parts,
429};
430
431static struct resource sharpsl_rom_resources[] = {
432 {
433 .start = 0x00000000,
434 .end = 0x007fffff,
435 .flags = IORESOURCE_MEM,
436 },
437};
438
439static struct platform_device sharpsl_rom_device = {
440 .name = "physmap-flash",
441 .id = -1,
442 .resource = sharpsl_rom_resources,
443 .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
444 .dev.platform_data = &sharpsl_rom_data,
445};
446
416static struct platform_device *devices[] __initdata = { 447static struct platform_device *devices[] __initdata = {
417 &poodle_locomo_device, 448 &poodle_locomo_device,
418 &poodle_scoop_device, 449 &poodle_scoop_device,
450 &sharpsl_rom_device,
419}; 451};
420 452
421static void poodle_poweroff(void) 453static void poodle_poweroff(void)
diff --git a/arch/arm/mach-pxa/pwm.c b/arch/arm/mach-pxa/pwm.c
index 74e2ead8cee8..3ca7ffc6904b 100644
--- a/arch/arm/mach-pxa/pwm.c
+++ b/arch/arm/mach-pxa/pwm.c
@@ -173,7 +173,7 @@ static struct pwm_device *pwm_probe(struct platform_device *pdev,
173 return ERR_PTR(-ENOMEM); 173 return ERR_PTR(-ENOMEM);
174 } 174 }
175 175
176 pwm->clk = clk_get(&pdev->dev, "PWMCLK"); 176 pwm->clk = clk_get(&pdev->dev, NULL);
177 if (IS_ERR(pwm->clk)) { 177 if (IS_ERR(pwm->clk)) {
178 ret = PTR_ERR(pwm->clk); 178 ret = PTR_ERR(pwm->clk);
179 goto err_free; 179 goto err_free;
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 25d17a1dab78..6c57522e2469 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -36,12 +36,6 @@
36#include "devices.h" 36#include "devices.h"
37#include "clock.h" 37#include "clock.h"
38 38
39int cpu_is_pxa26x(void)
40{
41 return cpu_is_pxa250() && ((BOOT_DEF & 0x8) == 0);
42}
43EXPORT_SYMBOL_GPL(cpu_is_pxa26x);
44
45/* 39/*
46 * Various clock factors driven by the CCCR register. 40 * Various clock factors driven by the CCCR register.
47 */ 41 */
@@ -167,36 +161,51 @@ static const struct clkops clk_pxa25x_gpio11_ops = {
167 * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz 161 * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
168 * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly) 162 * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
169 */ 163 */
170static struct clk pxa25x_hwuart_clk = 164static DEFINE_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
171 INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev) 165
172; 166static struct clk_lookup pxa25x_hwuart_clkreg =
167 INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
173 168
174/* 169/*
175 * PXA 2xx clock declarations. 170 * PXA 2xx clock declarations.
176 */ 171 */
177static struct clk pxa25x_clks[] = { 172static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
178 INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev), 173static DEFINE_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
179 INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev), 174static DEFINE_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
180 INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), 175static DEFINE_CKEN(pxa25x_stuart, STUART, 14745600, 1);
181 INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL), 176static DEFINE_CKEN(pxa25x_usb, USB, 47923000, 5);
182 INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev), 177static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
183 INIT_CLK("GPIO11_CLK", &clk_pxa25x_gpio11_ops, 3686400, 0, NULL), 178static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
184 INIT_CLK("GPIO12_CLK", &clk_pxa25x_gpio12_ops, 32768, 0, NULL), 179static DEFINE_CKEN(pxa25x_mmc, MMC, 19169000, 0);
185 INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev), 180static DEFINE_CKEN(pxa25x_i2c, I2C, 31949000, 0);
186 INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev), 181static DEFINE_CKEN(pxa25x_ssp, SSP, 3686400, 0);
187 182static DEFINE_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
188 INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev), 183static DEFINE_CKEN(pxa25x_assp, ASSP, 3686400, 0);
189 INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev), 184static DEFINE_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
190 INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev), 185static DEFINE_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
191 INIT_CKEN("PWMCLK", PWM0, 3686400, 0, &pxa25x_device_pwm0.dev), 186static DEFINE_CKEN(pxa25x_ac97, AC97, 24576000, 0);
192 INIT_CKEN("PWMCLK", PWM1, 3686400, 0, &pxa25x_device_pwm1.dev), 187static DEFINE_CKEN(pxa25x_i2s, I2S, 14745600, 0);
193 188static DEFINE_CKEN(pxa25x_ficp, FICP, 47923000, 0);
194 INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL), 189
195 190static struct clk_lookup pxa25x_clkregs[] = {
196 /* 191 INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
197 INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL), 192 INIT_CLKREG(&clk_pxa25x_ffuart, "pxa2xx-uart.0", NULL),
198 */ 193 INIT_CLKREG(&clk_pxa25x_btuart, "pxa2xx-uart.1", NULL),
199 INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL), 194 INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-uart.2", NULL),
195 INIT_CLKREG(&clk_pxa25x_usb, "pxa25x-udc", NULL),
196 INIT_CLKREG(&clk_pxa25x_mmc, "pxa2xx-mci.0", NULL),
197 INIT_CLKREG(&clk_pxa25x_i2c, "pxa2xx-i2c.0", NULL),
198 INIT_CLKREG(&clk_pxa25x_ssp, "pxa25x-ssp.0", NULL),
199 INIT_CLKREG(&clk_pxa25x_nssp, "pxa25x-nssp.1", NULL),
200 INIT_CLKREG(&clk_pxa25x_assp, "pxa25x-nssp.2", NULL),
201 INIT_CLKREG(&clk_pxa25x_pwm0, "pxa25x-pwm.0", NULL),
202 INIT_CLKREG(&clk_pxa25x_pwm1, "pxa25x-pwm.1", NULL),
203 INIT_CLKREG(&clk_pxa25x_i2s, "pxa2xx-i2s", NULL),
204 INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-ir", "UARTCLK"),
205 INIT_CLKREG(&clk_pxa25x_ficp, "pxa2xx-ir", "FICPCLK"),
206 INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
207 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
208 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
200}; 209};
201 210
202#ifdef CONFIG_PM 211#ifdef CONFIG_PM
@@ -304,13 +313,21 @@ void __init pxa25x_init_irq(void)
304 pxa_init_gpio(85, pxa25x_set_wake); 313 pxa_init_gpio(85, pxa25x_set_wake);
305} 314}
306 315
316#ifdef CONFIG_CPU_PXA26x
317void __init pxa26x_init_irq(void)
318{
319 pxa_init_irq(32, pxa25x_set_wake);
320 pxa_init_gpio(90, pxa25x_set_wake);
321}
322#endif
323
307static struct platform_device *pxa25x_devices[] __initdata = { 324static struct platform_device *pxa25x_devices[] __initdata = {
308 &pxa25x_device_udc, 325 &pxa25x_device_udc,
309 &pxa_device_ffuart, 326 &pxa_device_ffuart,
310 &pxa_device_btuart, 327 &pxa_device_btuart,
311 &pxa_device_stuart, 328 &pxa_device_stuart,
312 &pxa_device_i2s, 329 &pxa_device_i2s,
313 &pxa_device_rtc, 330 &sa1100_device_rtc,
314 &pxa25x_device_ssp, 331 &pxa25x_device_ssp,
315 &pxa25x_device_nssp, 332 &pxa25x_device_nssp,
316 &pxa25x_device_assp, 333 &pxa25x_device_assp,
@@ -336,7 +353,7 @@ static int __init pxa25x_init(void)
336 353
337 reset_status = RCSR; 354 reset_status = RCSR;
338 355
339 clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks)); 356 clks_register(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs));
340 357
341 if ((ret = pxa_init_dma(16))) 358 if ((ret = pxa_init_dma(16)))
342 return ret; 359 return ret;
@@ -356,8 +373,8 @@ static int __init pxa25x_init(void)
356 } 373 }
357 374
358 /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */ 375 /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
359 if (cpu_is_pxa255() || cpu_is_pxa26x()) { 376 if (cpu_is_pxa255()) {
360 clks_register(&pxa25x_hwuart_clk, 1); 377 clks_register(&pxa25x_hwuart_clkreg, 1);
361 ret = platform_device_register(&pxa_device_hwuart); 378 ret = platform_device_register(&pxa_device_hwuart);
362 } 379 }
363 380
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 3e4ab2279c99..411bec54fdc4 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -144,40 +144,59 @@ static const struct clkops clk_pxa27x_lcd_ops = {
144 .getrate = clk_pxa27x_lcd_getrate, 144 .getrate = clk_pxa27x_lcd_getrate,
145}; 145};
146 146
147static struct clk pxa27x_clks[] = { 147static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
148 INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops, &pxa_device_fb.dev), 148static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
149 INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL), 149static DEFINE_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);
150 150static DEFINE_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
151 INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev), 151static DEFINE_CKEN(pxa27x_stuart, STUART, 14857000, 1);
152 INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev), 152static DEFINE_CKEN(pxa27x_i2s, I2S, 14682000, 0);
153 INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL), 153static DEFINE_CKEN(pxa27x_i2c, I2C, 32842000, 0);
154 154static DEFINE_CKEN(pxa27x_usb, USB, 48000000, 5);
155 INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev), 155static DEFINE_CKEN(pxa27x_mmc, MMC, 19500000, 0);
156 INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), 156static DEFINE_CKEN(pxa27x_ficp, FICP, 48000000, 0);
157 INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa27x_device_udc.dev), 157static DEFINE_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
158 INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev), 158static DEFINE_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
159 INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev), 159static DEFINE_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
160 160static DEFINE_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
161 INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev), 161static DEFINE_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
162 INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev), 162static DEFINE_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
163 INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev), 163static DEFINE_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
164 164static DEFINE_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
165 INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), 165static DEFINE_CKEN(pxa27x_ac97, AC97, 24576000, 0);
166 INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), 166static DEFINE_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
167 INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), 167static DEFINE_CKEN(pxa27x_msl, MSL, 48000000, 0);
168 INIT_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev), 168static DEFINE_CKEN(pxa27x_usim, USIM, 48000000, 0);
169 INIT_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev), 169static DEFINE_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
170 170static DEFINE_CKEN(pxa27x_im, IM, 0, 0);
171 INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL), 171static DEFINE_CKEN(pxa27x_memc, MEMC, 0, 0);
172 INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL), 172
173 173static struct clk_lookup pxa27x_clkregs[] = {
174 /* 174 INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
175 INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL), 175 INIT_CLKREG(&clk_pxa27x_camera, "pxa27x-camera.0", NULL),
176 INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL), 176 INIT_CLKREG(&clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL),
177 INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL), 177 INIT_CLKREG(&clk_pxa27x_btuart, "pxa2xx-uart.1", NULL),
178 INIT_CKEN("IMCLK", IM, 0, 0, NULL), 178 INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-uart.2", NULL),
179 INIT_CKEN("MEMCLK", MEMC, 0, 0, NULL), 179 INIT_CLKREG(&clk_pxa27x_i2s, "pxa2xx-i2s", NULL),
180 */ 180 INIT_CLKREG(&clk_pxa27x_i2c, "pxa2xx-i2c.0", NULL),
181 INIT_CLKREG(&clk_pxa27x_usb, "pxa27x-udc", NULL),
182 INIT_CLKREG(&clk_pxa27x_mmc, "pxa2xx-mci.0", NULL),
183 INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-ir", "UARTCLK"),
184 INIT_CLKREG(&clk_pxa27x_ficp, "pxa2xx-ir", "FICPCLK"),
185 INIT_CLKREG(&clk_pxa27x_usbhost, "pxa27x-ohci", NULL),
186 INIT_CLKREG(&clk_pxa27x_pwri2c, "pxa2xx-i2c.1", NULL),
187 INIT_CLKREG(&clk_pxa27x_keypad, "pxa27x-keypad", NULL),
188 INIT_CLKREG(&clk_pxa27x_ssp1, "pxa27x-ssp.0", NULL),
189 INIT_CLKREG(&clk_pxa27x_ssp2, "pxa27x-ssp.1", NULL),
190 INIT_CLKREG(&clk_pxa27x_ssp3, "pxa27x-ssp.2", NULL),
191 INIT_CLKREG(&clk_pxa27x_pwm0, "pxa27x-pwm.0", NULL),
192 INIT_CLKREG(&clk_pxa27x_pwm1, "pxa27x-pwm.1", NULL),
193 INIT_CLKREG(&clk_pxa27x_ac97, NULL, "AC97CLK"),
194 INIT_CLKREG(&clk_pxa27x_ac97conf, NULL, "AC97CONFCLK"),
195 INIT_CLKREG(&clk_pxa27x_msl, NULL, "MSLCLK"),
196 INIT_CLKREG(&clk_pxa27x_usim, NULL, "USIMCLK"),
197 INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
198 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
199 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
181}; 200};
182 201
183#ifdef CONFIG_PM 202#ifdef CONFIG_PM
@@ -313,38 +332,18 @@ static int pxa27x_set_wake(unsigned int irq, unsigned int on)
313void __init pxa27x_init_irq(void) 332void __init pxa27x_init_irq(void)
314{ 333{
315 pxa_init_irq(34, pxa27x_set_wake); 334 pxa_init_irq(34, pxa27x_set_wake);
316 pxa_init_gpio(128, pxa27x_set_wake); 335 pxa_init_gpio(121, pxa27x_set_wake);
317} 336}
318 337
319/* 338/*
320 * device registration specific to PXA27x. 339 * device registration specific to PXA27x.
321 */ 340 */
322
323static struct resource i2c_power_resources[] = {
324 {
325 .start = 0x40f00180,
326 .end = 0x40f001a3,
327 .flags = IORESOURCE_MEM,
328 }, {
329 .start = IRQ_PWRI2C,
330 .end = IRQ_PWRI2C,
331 .flags = IORESOURCE_IRQ,
332 },
333};
334
335struct platform_device pxa27x_device_i2c_power = {
336 .name = "pxa2xx-i2c",
337 .id = 1,
338 .resource = i2c_power_resources,
339 .num_resources = ARRAY_SIZE(i2c_power_resources),
340};
341
342void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info) 341void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
343{ 342{
344 local_irq_disable(); 343 local_irq_disable();
345 PCFR |= PCFR_PI2CEN; 344 PCFR |= PCFR_PI2CEN;
346 local_irq_enable(); 345 local_irq_enable();
347 pxa27x_device_i2c_power.dev.platform_data = info; 346 pxa_register_device(&pxa27x_device_i2c_power, info);
348} 347}
349 348
350static struct platform_device *devices[] __initdata = { 349static struct platform_device *devices[] __initdata = {
@@ -353,8 +352,8 @@ static struct platform_device *devices[] __initdata = {
353 &pxa_device_btuart, 352 &pxa_device_btuart,
354 &pxa_device_stuart, 353 &pxa_device_stuart,
355 &pxa_device_i2s, 354 &pxa_device_i2s,
355 &sa1100_device_rtc,
356 &pxa_device_rtc, 356 &pxa_device_rtc,
357 &pxa27x_device_i2c_power,
358 &pxa27x_device_ssp1, 357 &pxa27x_device_ssp1,
359 &pxa27x_device_ssp2, 358 &pxa27x_device_ssp2,
360 &pxa27x_device_ssp3, 359 &pxa27x_device_ssp3,
@@ -380,7 +379,7 @@ static int __init pxa27x_init(void)
380 379
381 reset_status = RCSR; 380 reset_status = RCSR;
382 381
383 clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks)); 382 clks_register(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs));
384 383
385 if ((ret = pxa_init_dma(32))) 384 if ((ret = pxa_init_dma(32)))
386 return ret; 385 return ret;
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 9adc7fc4618a..f735e58e6669 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -85,14 +85,16 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
85 MFP_ADDR_END, 85 MFP_ADDR_END,
86}; 86};
87 87
88static struct clk common_clks[] = { 88static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);
89 PXA3xx_CKEN("NANDCLK", NAND, 156000000, 0, &pxa3xx_device_nand.dev), 89
90static struct clk_lookup common_clkregs[] = {
91 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", "NANDCLK"),
90}; 92};
91 93
92static struct clk pxa310_clks[] = { 94static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
93#ifdef CONFIG_CPU_PXA310 95
94 PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev), 96static struct clk_lookup pxa310_clkregs[] = {
95#endif 97 INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", "MMCCLK"),
96}; 98};
97 99
98static int __init pxa300_init(void) 100static int __init pxa300_init(void)
@@ -100,12 +102,12 @@ static int __init pxa300_init(void)
100 if (cpu_is_pxa300() || cpu_is_pxa310()) { 102 if (cpu_is_pxa300() || cpu_is_pxa310()) {
101 pxa3xx_init_mfp(); 103 pxa3xx_init_mfp();
102 pxa3xx_mfp_init_addr(pxa300_mfp_addr_map); 104 pxa3xx_mfp_init_addr(pxa300_mfp_addr_map);
103 clks_register(ARRAY_AND_SIZE(common_clks)); 105 clks_register(ARRAY_AND_SIZE(common_clkregs));
104 } 106 }
105 107
106 if (cpu_is_pxa310()) { 108 if (cpu_is_pxa310()) {
107 pxa3xx_mfp_init_addr(pxa310_mfp_addr_map); 109 pxa3xx_mfp_init_addr(pxa310_mfp_addr_map);
108 clks_register(ARRAY_AND_SIZE(pxa310_clks)); 110 clks_register(ARRAY_AND_SIZE(pxa310_clkregs));
109 } 111 }
110 112
111 return 0; 113 return 0;
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 016eb18f01a3..effe408c186f 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -80,8 +80,10 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
80 MFP_ADDR_END, 80 MFP_ADDR_END,
81}; 81};
82 82
83static struct clk pxa320_clks[] = { 83static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
84 PXA3xx_CKEN("NANDCLK", NAND, 104000000, 0, &pxa3xx_device_nand.dev), 84
85static struct clk_lookup pxa320_clkregs[] = {
86 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", "NANDCLK"),
85}; 87};
86 88
87static int __init pxa320_init(void) 89static int __init pxa320_init(void)
@@ -89,7 +91,7 @@ static int __init pxa320_init(void)
89 if (cpu_is_pxa320()) { 91 if (cpu_is_pxa320()) {
90 pxa3xx_init_mfp(); 92 pxa3xx_init_mfp();
91 pxa3xx_mfp_init_addr(pxa320_mfp_addr_map); 93 pxa3xx_mfp_init_addr(pxa320_mfp_addr_map);
92 clks_register(ARRAY_AND_SIZE(pxa320_clks)); 94 clks_register(ARRAY_AND_SIZE(pxa320_clkregs));
93 } 95 }
94 96
95 return 0; 97 return 0;
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index b3cd5d0b0f35..490893824e78 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -29,6 +29,7 @@
29#include <mach/pm.h> 29#include <mach/pm.h>
30#include <mach/dma.h> 30#include <mach/dma.h>
31#include <mach/ssp.h> 31#include <mach/ssp.h>
32#include <mach/i2c.h>
32 33
33#include "generic.h" 34#include "generic.h"
34#include "devices.h" 35#include "devices.h"
@@ -216,43 +217,58 @@ static const struct clkops clk_dummy_ops = {
216 .disable = clk_dummy_disable, 217 .disable = clk_dummy_disable,
217}; 218};
218 219
219static struct clk pxa3xx_clks[] = { 220static struct clk clk_pxa3xx_pout = {
220 { 221 .ops = &clk_pout_ops,
221 .name = "CLK_POUT", 222 .rate = 13000000,
222 .ops = &clk_pout_ops, 223 .delay = 70,
223 .rate = 13000000, 224};
224 .delay = 70,
225 },
226
227 /* Power I2C clock is always on */
228 {
229 .name = "I2CCLK",
230 .ops = &clk_dummy_ops,
231 .dev = &pxa3xx_device_i2c_power.dev,
232 },
233
234 PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
235 PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),
236 PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops, NULL),
237
238 PXA3xx_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
239 PXA3xx_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
240 PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
241
242 PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
243 PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa27x_device_udc.dev),
244 PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev),
245 PXA3xx_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
246 225
247 PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), 226static struct clk clk_dummy = {
248 PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), 227 .ops = &clk_dummy_ops,
249 PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), 228};
250 PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
251 PXA3xx_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
252 PXA3xx_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
253 229
254 PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev), 230static DEFINE_PXA3_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
255 PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev), 231static DEFINE_PXA3_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
232static DEFINE_PXA3_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
233static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1);
234static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1);
235static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);
236static DEFINE_PXA3_CKEN(pxa3xx_i2c, I2C, 32842000, 0);
237static DEFINE_PXA3_CKEN(pxa3xx_udc, UDC, 48000000, 5);
238static DEFINE_PXA3_CKEN(pxa3xx_usbh, USBH, 48000000, 0);
239static DEFINE_PXA3_CKEN(pxa3xx_keypad, KEYPAD, 32768, 0);
240static DEFINE_PXA3_CKEN(pxa3xx_ssp1, SSP1, 13000000, 0);
241static DEFINE_PXA3_CKEN(pxa3xx_ssp2, SSP2, 13000000, 0);
242static DEFINE_PXA3_CKEN(pxa3xx_ssp3, SSP3, 13000000, 0);
243static DEFINE_PXA3_CKEN(pxa3xx_ssp4, SSP4, 13000000, 0);
244static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
245static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
246static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
247static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
248
249static struct clk_lookup pxa3xx_clkregs[] = {
250 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
251 /* Power I2C clock is always on */
252 INIT_CLKREG(&clk_dummy, "pxa2xx-i2c.1", NULL),
253 INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
254 INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
255 INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
256 INIT_CLKREG(&clk_pxa3xx_ffuart, "pxa2xx-uart.0", NULL),
257 INIT_CLKREG(&clk_pxa3xx_btuart, "pxa2xx-uart.1", NULL),
258 INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-uart.2", NULL),
259 INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-ir", "UARTCLK"),
260 INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL),
261 INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL),
262 INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL),
263 INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL),
264 INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL),
265 INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL),
266 INIT_CLKREG(&clk_pxa3xx_ssp3, "pxa27x-ssp.2", NULL),
267 INIT_CLKREG(&clk_pxa3xx_ssp4, "pxa27x-ssp.3", NULL),
268 INIT_CLKREG(&clk_pxa3xx_pwm0, "pxa27x-pwm.0", NULL),
269 INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL),
270 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
271 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
256}; 272};
257 273
258#ifdef CONFIG_PM 274#ifdef CONFIG_PM
@@ -529,28 +545,9 @@ void __init pxa3xx_init_irq(void)
529 * device registration specific to PXA3xx. 545 * device registration specific to PXA3xx.
530 */ 546 */
531 547
532static struct resource i2c_power_resources[] = {
533 {
534 .start = 0x40f500c0,
535 .end = 0x40f500d3,
536 .flags = IORESOURCE_MEM,
537 }, {
538 .start = IRQ_PWRI2C,
539 .end = IRQ_PWRI2C,
540 .flags = IORESOURCE_IRQ,
541 },
542};
543
544struct platform_device pxa3xx_device_i2c_power = {
545 .name = "pxa2xx-i2c",
546 .id = 1,
547 .resource = i2c_power_resources,
548 .num_resources = ARRAY_SIZE(i2c_power_resources),
549};
550
551void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info) 548void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
552{ 549{
553 pxa3xx_device_i2c_power.dev.platform_data = info; 550 pxa_register_device(&pxa3xx_device_i2c_power, info);
554} 551}
555 552
556static struct platform_device *devices[] __initdata = { 553static struct platform_device *devices[] __initdata = {
@@ -559,6 +556,7 @@ static struct platform_device *devices[] __initdata = {
559 &pxa_device_btuart, 556 &pxa_device_btuart,
560 &pxa_device_stuart, 557 &pxa_device_stuart,
561 &pxa_device_i2s, 558 &pxa_device_i2s,
559 &sa1100_device_rtc,
562 &pxa_device_rtc, 560 &pxa_device_rtc,
563 &pxa27x_device_ssp1, 561 &pxa27x_device_ssp1,
564 &pxa27x_device_ssp2, 562 &pxa27x_device_ssp2,
@@ -566,7 +564,6 @@ static struct platform_device *devices[] __initdata = {
566 &pxa3xx_device_ssp4, 564 &pxa3xx_device_ssp4,
567 &pxa27x_device_pwm0, 565 &pxa27x_device_pwm0,
568 &pxa27x_device_pwm1, 566 &pxa27x_device_pwm1,
569 &pxa3xx_device_i2c_power,
570}; 567};
571 568
572static struct sys_device pxa3xx_sysdev[] = { 569static struct sys_device pxa3xx_sysdev[] = {
@@ -595,7 +592,7 @@ static int __init pxa3xx_init(void)
595 */ 592 */
596 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); 593 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
597 594
598 clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks)); 595 clks_register(pxa3xx_clkregs, ARRAY_SIZE(pxa3xx_clkregs));
599 596
600 if ((ret = pxa_init_dma(32))) 597 if ((ret = pxa_init_dma(32)))
601 return ret; 598 return ret;
diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c
index ad346addc028..d6f6904132a6 100644
--- a/arch/arm/mach-pxa/smemc.c
+++ b/arch/arm/mach-pxa/smemc.c
@@ -8,6 +8,8 @@
8#include <linux/io.h> 8#include <linux/io.h>
9#include <linux/sysdev.h> 9#include <linux/sysdev.h>
10 10
11#include <mach/hardware.h>
12
11#define SMEMC_PHYS_BASE (0x4A000000) 13#define SMEMC_PHYS_BASE (0x4A000000)
12#define SMEMC_PHYS_SIZE (0x90) 14#define SMEMC_PHYS_SIZE (0x90)
13 15
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 3be76ee2bdbf..7299d87a1cb3 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -22,6 +22,7 @@
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/leds.h> 23#include <linux/leds.h>
24#include <linux/mmc/host.h> 24#include <linux/mmc/host.h>
25#include <linux/mtd/physmap.h>
25#include <linux/pm.h> 26#include <linux/pm.h>
26#include <linux/backlight.h> 27#include <linux/backlight.h>
27#include <linux/io.h> 28#include <linux/io.h>
@@ -122,6 +123,10 @@ static unsigned long spitz_pin_config[] __initdata = {
122 GPIO105_GPIO, /* SPITZ_GPIO_CF_IRQ */ 123 GPIO105_GPIO, /* SPITZ_GPIO_CF_IRQ */
123 GPIO106_GPIO, /* SPITZ_GPIO_CF2_IRQ */ 124 GPIO106_GPIO, /* SPITZ_GPIO_CF2_IRQ */
124 125
126 /* I2C */
127 GPIO117_I2C_SCL,
128 GPIO118_I2C_SDA,
129
125 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, 130 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
126}; 131};
127 132
@@ -609,10 +614,41 @@ static struct pxafb_mach_info spitz_pxafb_info = {
609}; 614};
610 615
611 616
617static struct mtd_partition sharpsl_rom_parts[] = {
618 {
619 .name ="Boot PROM Filesystem",
620 .offset = 0x00140000,
621 .size = MTDPART_SIZ_FULL,
622 },
623};
624
625static struct physmap_flash_data sharpsl_rom_data = {
626 .width = 2,
627 .nr_parts = ARRAY_SIZE(sharpsl_rom_parts),
628 .parts = sharpsl_rom_parts,
629};
630
631static struct resource sharpsl_rom_resources[] = {
632 {
633 .start = 0x00000000,
634 .end = 0x007fffff,
635 .flags = IORESOURCE_MEM,
636 },
637};
638
639static struct platform_device sharpsl_rom_device = {
640 .name = "physmap-flash",
641 .id = -1,
642 .resource = sharpsl_rom_resources,
643 .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
644 .dev.platform_data = &sharpsl_rom_data,
645};
646
612static struct platform_device *devices[] __initdata = { 647static struct platform_device *devices[] __initdata = {
613 &spitzscoop_device, 648 &spitzscoop_device,
614 &spitzkbd_device, 649 &spitzkbd_device,
615 &spitzled_device, 650 &spitzled_device,
651 &sharpsl_rom_device,
616}; 652};
617 653
618static void spitz_poweroff(void) 654static void spitz_poweroff(void)
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 2c31ec725688..6f42004db3ed 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -356,7 +356,7 @@ static int __devinit ssp_probe(struct platform_device *pdev, int type)
356 } 356 }
357 ssp->pdev = pdev; 357 ssp->pdev = pdev;
358 358
359 ssp->clk = clk_get(&pdev->dev, "SSPCLK"); 359 ssp->clk = clk_get(&pdev->dev, NULL);
360 if (IS_ERR(ssp->clk)) { 360 if (IS_ERR(ssp->clk)) {
361 ret = PTR_ERR(ssp->clk); 361 ret = PTR_ERR(ssp->clk);
362 goto err_free; 362 goto err_free;
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index f8a9a62959e5..ef4ddf9d5040 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -22,6 +22,7 @@
22#include <asm/div64.h> 22#include <asm/div64.h>
23#include <asm/mach/irq.h> 23#include <asm/mach/irq.h>
24#include <asm/mach/time.h> 24#include <asm/mach/time.h>
25#include <mach/hardware.h>
25#include <mach/pxa-regs.h> 26#include <mach/pxa-regs.h>
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
27 28
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 224897a67d15..3332e5d0356c 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -25,6 +25,7 @@
25#include <linux/mfd/tmio.h> 25#include <linux/mfd/tmio.h>
26#include <linux/mtd/nand.h> 26#include <linux/mtd/nand.h>
27#include <linux/mtd/partitions.h> 27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h>
28#include <linux/pm.h> 29#include <linux/pm.h>
29#include <linux/gpio_keys.h> 30#include <linux/gpio_keys.h>
30#include <linux/input.h> 31#include <linux/input.h>
@@ -733,6 +734,45 @@ static void tosa_tc6393xb_teardown(struct platform_device *dev)
733 gpio_free(TOSA_GPIO_CARD_VCC_ON); 734 gpio_free(TOSA_GPIO_CARD_VCC_ON);
734} 735}
735 736
737#ifdef CONFIG_MFD_TC6393XB
738static struct fb_videomode tosa_tc6393xb_lcd_mode[] = {
739 {
740 .xres = 480,
741 .yres = 640,
742 .pixclock = 0x002cdf00,/* PLL divisor */
743 .left_margin = 0x004c,
744 .right_margin = 0x005b,
745 .upper_margin = 0x0001,
746 .lower_margin = 0x000d,
747 .hsync_len = 0x0002,
748 .vsync_len = 0x0001,
749 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
750 .vmode = FB_VMODE_NONINTERLACED,
751 },{
752 .xres = 240,
753 .yres = 320,
754 .pixclock = 0x00e7f203,/* PLL divisor */
755 .left_margin = 0x0024,
756 .right_margin = 0x002f,
757 .upper_margin = 0x0001,
758 .lower_margin = 0x000d,
759 .hsync_len = 0x0002,
760 .vsync_len = 0x0001,
761 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
762 .vmode = FB_VMODE_NONINTERLACED,
763 }
764};
765
766static struct tmio_fb_data tosa_tc6393xb_fb_config = {
767 .lcd_set_power = tc6393xb_lcd_set_power,
768 .lcd_mode = tc6393xb_lcd_mode,
769 .num_modes = ARRAY_SIZE(tosa_tc6393xb_lcd_mode),
770 .modes = &tosa_tc6393xb_lcd_mode[0],
771 .height = 82,
772 .width = 60,
773};
774#endif
775
736static struct tc6393xb_platform_data tosa_tc6393xb_data = { 776static struct tc6393xb_platform_data tosa_tc6393xb_data = {
737 .scr_pll2cr = 0x0cc1, 777 .scr_pll2cr = 0x0cc1,
738 .scr_gper = 0x3300, 778 .scr_gper = 0x3300,
@@ -748,6 +788,9 @@ static struct tc6393xb_platform_data tosa_tc6393xb_data = {
748 .resume = tosa_tc6393xb_resume, 788 .resume = tosa_tc6393xb_resume,
749 789
750 .nand_data = &tosa_tc6393xb_nand_config, 790 .nand_data = &tosa_tc6393xb_nand_config,
791#ifdef CONFIG_MFD_TC6393XB
792 .fb_data = &tosa_tc6393xb_fb_config,
793#endif
751 794
752 .resume_restore = 1, 795 .resume_restore = 1,
753}; 796};
@@ -789,6 +832,36 @@ static struct spi_board_info spi_board_info[] __initdata = {
789 }, 832 },
790}; 833};
791 834
835static struct mtd_partition sharpsl_rom_parts[] = {
836 {
837 .name ="Boot PROM Filesystem",
838 .offset = 0x00160000,
839 .size = MTDPART_SIZ_FULL,
840 },
841};
842
843static struct physmap_flash_data sharpsl_rom_data = {
844 .width = 2,
845 .nr_parts = ARRAY_SIZE(sharpsl_rom_parts),
846 .parts = sharpsl_rom_parts,
847};
848
849static struct resource sharpsl_rom_resources[] = {
850 {
851 .start = 0x00000000,
852 .end = 0x007fffff,
853 .flags = IORESOURCE_MEM,
854 },
855};
856
857static struct platform_device sharpsl_rom_device = {
858 .name = "physmap-flash",
859 .id = -1,
860 .resource = sharpsl_rom_resources,
861 .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
862 .dev.platform_data = &sharpsl_rom_data,
863};
864
792static struct platform_device *devices[] __initdata = { 865static struct platform_device *devices[] __initdata = {
793 &tosascoop_device, 866 &tosascoop_device,
794 &tosascoop_jc_device, 867 &tosascoop_jc_device,
@@ -798,6 +871,7 @@ static struct platform_device *devices[] __initdata = {
798 &tosa_gpio_keys_device, 871 &tosa_gpio_keys_device,
799 &tosaled_device, 872 &tosaled_device,
800 &tosa_bt_device, 873 &tosa_bt_device,
874 &sharpsl_rom_device,
801}; 875};
802 876
803static void tosa_poweroff(void) 877static void tosa_poweroff(void)
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 813804433466..218d2001f1df 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -18,6 +18,7 @@
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/gpio.h>
21#include <linux/pwm_backlight.h> 22#include <linux/pwm_backlight.h>
22#include <linux/smc91x.h> 23#include <linux/smc91x.h>
23 24
@@ -25,7 +26,6 @@
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <mach/audio.h> 28#include <mach/audio.h>
28#include <mach/gpio.h>
29#include <mach/pxafb.h> 29#include <mach/pxafb.h>
30#include <mach/zylonite.h> 30#include <mach/zylonite.h>
31#include <mach/mmc.h> 31#include <mach/mmc.h>
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c
index 0f244744daae..28e4e623780b 100644
--- a/arch/arm/mach-pxa/zylonite_pxa320.c
+++ b/arch/arm/mach-pxa/zylonite_pxa320.c
@@ -16,8 +16,8 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/gpio.h>
19 20
20#include <mach/gpio.h>
21#include <mach/mfp-pxa320.h> 21#include <mach/mfp-pxa320.h>
22#include <mach/zylonite.h> 22#include <mach/zylonite.h>
23 23
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 5ccde7cf39e8..ad911854eb4c 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -7,9 +7,17 @@ config MACH_REALVIEW_EB
7 help 7 help
8 Include support for the ARM(R) RealView Emulation Baseboard platform. 8 Include support for the ARM(R) RealView Emulation Baseboard platform.
9 9
10config REALVIEW_EB_A9MP
11 bool "Support Multicore Cortex-A9"
12 depends on MACH_REALVIEW_EB
13 select CPU_V7
14 help
15 Enable support for the Cortex-A9MPCore tile on the Realview platform.
16
10config REALVIEW_EB_ARM11MP 17config REALVIEW_EB_ARM11MP
11 bool "Support ARM11MPCore tile" 18 bool "Support ARM11MPCore tile"
12 depends on MACH_REALVIEW_EB 19 depends on MACH_REALVIEW_EB
20 select CPU_V6
13 help 21 help
14 Enable support for the ARM11MPCore tile on the Realview platform. 22 Enable support for the ARM11MPCore tile on the Realview platform.
15 23
@@ -25,6 +33,7 @@ config REALVIEW_EB_ARM11MP_REVB
25 33
26config MACH_REALVIEW_PB11MP 34config MACH_REALVIEW_PB11MP
27 bool "Support RealView/PB11MPCore platform" 35 bool "Support RealView/PB11MPCore platform"
36 select CPU_V6
28 select ARM_GIC 37 select ARM_GIC
29 help 38 help
30 Include support for the ARM(R) RealView MPCore Platform Baseboard. 39 Include support for the ARM(R) RealView MPCore Platform Baseboard.
@@ -33,8 +42,29 @@ config MACH_REALVIEW_PB11MP
33 42
34config MACH_REALVIEW_PB1176 43config MACH_REALVIEW_PB1176
35 bool "Support RealView/PB1176 platform" 44 bool "Support RealView/PB1176 platform"
45 select CPU_V6
36 select ARM_GIC 46 select ARM_GIC
37 help 47 help
38 Include support for the ARM(R) RealView ARM1176 Platform Baseboard. 48 Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
39 49
50config MACH_REALVIEW_PBA8
51 bool "Support RealView/PB-A8 platform"
52 select CPU_V7
53 select ARM_GIC
54 help
55 Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard.
56 PB-A8 is a platform with an on-board Cortex-A8 and has support for
57 PCI-E and Compact Flash.
58
59config REALVIEW_HIGH_PHYS_OFFSET
60 bool "High physical base address for the RealView platform"
61 depends on !MACH_REALVIEW_PB1176
62 default y
63 help
64 RealView boards other than PB1176 have the RAM available at
65 0x70000000, 256MB of which being mirrored at 0x00000000. If
66 the board supports 512MB of RAM, this option allows the
67 memory to be accessed contiguously at the high physical
68 offset.
69
40endmenu 70endmenu
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index d2ae077431dd..7bea8ffc4b59 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -6,5 +6,6 @@ obj-y := core.o clock.o
6obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o 6obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o
7obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o 7obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o 8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
9obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o
9obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o 10obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
10obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 11obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/arm/mach-realview/Makefile.boot b/arch/arm/mach-realview/Makefile.boot
index c7e75acfe6c9..d97e003d3df4 100644
--- a/arch/arm/mach-realview/Makefile.boot
+++ b/arch/arm/mach-realview/Makefile.boot
@@ -1,4 +1,9 @@
1ifeq ($(CONFIG_REALVIEW_HIGH_PHYS_OFFSET),y)
2 zreladdr-y := 0x70008000
3params_phys-y := 0x70000100
4initrd_phys-y := 0x70800000
5else
1 zreladdr-y := 0x00008000 6 zreladdr-y := 0x00008000
2params_phys-y := 0x00000100 7params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000 8initrd_phys-y := 0x00800000
4 9endif
diff --git a/arch/arm/mach-realview/clock.c b/arch/arm/mach-realview/clock.c
index 3347c4236a60..a7043115de72 100644
--- a/arch/arm/mach-realview/clock.c
+++ b/arch/arm/mach-realview/clock.c
@@ -10,9 +10,11 @@
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/device.h>
13#include <linux/list.h> 14#include <linux/list.h>
14#include <linux/errno.h> 15#include <linux/errno.h>
15#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/string.h>
16#include <linux/clk.h> 18#include <linux/clk.h>
17#include <linux/mutex.h> 19#include <linux/mutex.h>
18 20
@@ -20,32 +22,6 @@
20 22
21#include "clock.h" 23#include "clock.h"
22 24
23static LIST_HEAD(clocks);
24static DEFINE_MUTEX(clocks_mutex);
25
26struct clk *clk_get(struct device *dev, const char *id)
27{
28 struct clk *p, *clk = ERR_PTR(-ENOENT);
29
30 mutex_lock(&clocks_mutex);
31 list_for_each_entry(p, &clocks, node) {
32 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
33 clk = p;
34 break;
35 }
36 }
37 mutex_unlock(&clocks_mutex);
38
39 return clk;
40}
41EXPORT_SYMBOL(clk_get);
42
43void clk_put(struct clk *clk)
44{
45 module_put(clk->owner);
46}
47EXPORT_SYMBOL(clk_put);
48
49int clk_enable(struct clk *clk) 25int clk_enable(struct clk *clk)
50{ 26{
51 return 0; 27 return 0;
@@ -65,7 +41,9 @@ EXPORT_SYMBOL(clk_get_rate);
65 41
66long clk_round_rate(struct clk *clk, unsigned long rate) 42long clk_round_rate(struct clk *clk, unsigned long rate)
67{ 43{
68 return rate; 44 struct icst307_vco vco;
45 vco = icst307_khz_to_vco(clk->params, rate / 1000);
46 return icst307_khz(clk->params, vco) * 1000;
69} 47}
70EXPORT_SYMBOL(clk_round_rate); 48EXPORT_SYMBOL(clk_round_rate);
71 49
@@ -78,57 +56,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
78 56
79 vco = icst307_khz_to_vco(clk->params, rate / 1000); 57 vco = icst307_khz_to_vco(clk->params, rate / 1000);
80 clk->rate = icst307_khz(clk->params, vco) * 1000; 58 clk->rate = icst307_khz(clk->params, vco) * 1000;
81
82 printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
83 clk->name, vco.s, vco.r, vco.v);
84
85 clk->setvco(clk, vco); 59 clk->setvco(clk, vco);
86 ret = 0; 60 ret = 0;
87 } 61 }
88 return ret; 62 return ret;
89} 63}
90EXPORT_SYMBOL(clk_set_rate); 64EXPORT_SYMBOL(clk_set_rate);
91
92/*
93 * These are fixed clocks.
94 */
95static struct clk kmi_clk = {
96 .name = "KMIREFCLK",
97 .rate = 24000000,
98};
99
100static struct clk uart_clk = {
101 .name = "UARTCLK",
102 .rate = 24000000,
103};
104
105static struct clk mmci_clk = {
106 .name = "MCLK",
107 .rate = 24000000,
108};
109
110int clk_register(struct clk *clk)
111{
112 mutex_lock(&clocks_mutex);
113 list_add(&clk->node, &clocks);
114 mutex_unlock(&clocks_mutex);
115 return 0;
116}
117EXPORT_SYMBOL(clk_register);
118
119void clk_unregister(struct clk *clk)
120{
121 mutex_lock(&clocks_mutex);
122 list_del(&clk->node);
123 mutex_unlock(&clocks_mutex);
124}
125EXPORT_SYMBOL(clk_unregister);
126
127static int __init clk_init(void)
128{
129 clk_register(&kmi_clk);
130 clk_register(&uart_clk);
131 clk_register(&mmci_clk);
132 return 0;
133}
134arch_initcall(clk_init);
diff --git a/arch/arm/mach-realview/clock.h b/arch/arm/mach-realview/clock.h
index dadba695e181..ebbb0f06b600 100644
--- a/arch/arm/mach-realview/clock.h
+++ b/arch/arm/mach-realview/clock.h
@@ -12,14 +12,8 @@ struct module;
12struct icst307_params; 12struct icst307_params;
13 13
14struct clk { 14struct clk {
15 struct list_head node;
16 unsigned long rate; 15 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 const struct icst307_params *params; 16 const struct icst307_params *params;
20 void *data; 17 void *data;
21 void (*setvco)(struct clk *, struct icst307_vco vco); 18 void (*setvco)(struct clk *, struct icst307_vco vco);
22}; 19};
23
24int clk_register(struct clk *clk);
25void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 2f04d54711e7..5f1d55963ced 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -28,11 +28,14 @@
28#include <linux/clocksource.h> 28#include <linux/clocksource.h>
29#include <linux/clockchips.h> 29#include <linux/clockchips.h>
30#include <linux/io.h> 30#include <linux/io.h>
31#include <linux/smc911x.h>
31 32
33#include <asm/clkdev.h>
32#include <asm/system.h> 34#include <asm/system.h>
33#include <mach/hardware.h> 35#include <mach/hardware.h>
34#include <asm/irq.h> 36#include <asm/irq.h>
35#include <asm/leds.h> 37#include <asm/leds.h>
38#include <asm/mach-types.h>
36#include <asm/hardware/arm_timer.h> 39#include <asm/hardware/arm_timer.h>
37#include <asm/hardware/icst307.h> 40#include <asm/hardware/icst307.h>
38 41
@@ -49,7 +52,7 @@
49 52
50#define REALVIEW_REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET) 53#define REALVIEW_REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
51 54
52/* used by entry-macro.S */ 55/* used by entry-macro.S and platsmp.c */
53void __iomem *gic_cpu_base_addr; 56void __iomem *gic_cpu_base_addr;
54 57
55/* 58/*
@@ -124,6 +127,29 @@ int realview_flash_register(struct resource *res, u32 num)
124 return platform_device_register(&realview_flash_device); 127 return platform_device_register(&realview_flash_device);
125} 128}
126 129
130static struct smc911x_platdata realview_smc911x_platdata = {
131 .flags = SMC911X_USE_32BIT,
132 .irq_flags = IRQF_SHARED,
133 .irq_polarity = 1,
134};
135
136static struct platform_device realview_eth_device = {
137 .name = "smc911x",
138 .id = 0,
139 .num_resources = 2,
140};
141
142int realview_eth_register(const char *name, struct resource *res)
143{
144 if (name)
145 realview_eth_device.name = name;
146 realview_eth_device.resource = res;
147 if (strcmp(realview_eth_device.name, "smc911x") == 0)
148 realview_eth_device.dev.platform_data = &realview_smc911x_platdata;
149
150 return platform_device_register(&realview_eth_device);
151}
152
127static struct resource realview_i2c_resource = { 153static struct resource realview_i2c_resource = {
128 .start = REALVIEW_I2C_BASE, 154 .start = REALVIEW_I2C_BASE,
129 .end = REALVIEW_I2C_BASE + SZ_4K - 1, 155 .end = REALVIEW_I2C_BASE + SZ_4K - 1,
@@ -177,9 +203,14 @@ static const struct icst307_params realview_oscvco_params = {
177static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco) 203static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
178{ 204{
179 void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET; 205 void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
180 void __iomem *sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET; 206 void __iomem *sys_osc;
181 u32 val; 207 u32 val;
182 208
209 if (machine_is_realview_pb1176())
210 sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
211 else
212 sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
213
183 val = readl(sys_osc) & ~0x7ffff; 214 val = readl(sys_osc) & ~0x7ffff;
184 val |= vco.v | (vco.r << 9) | (vco.s << 16); 215 val |= vco.v | (vco.r << 9) | (vco.s << 16);
185 216
@@ -188,13 +219,60 @@ static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
188 writel(0, sys_lock); 219 writel(0, sys_lock);
189} 220}
190 221
191struct clk realview_clcd_clk = { 222static struct clk oscvco_clk = {
192 .name = "CLCDCLK",
193 .params = &realview_oscvco_params, 223 .params = &realview_oscvco_params,
194 .setvco = realview_oscvco_set, 224 .setvco = realview_oscvco_set,
195}; 225};
196 226
197/* 227/*
228 * These are fixed clocks.
229 */
230static struct clk ref24_clk = {
231 .rate = 24000000,
232};
233
234static struct clk_lookup lookups[] = {
235 { /* UART0 */
236 .dev_id = "dev:f1",
237 .clk = &ref24_clk,
238 }, { /* UART1 */
239 .dev_id = "dev:f2",
240 .clk = &ref24_clk,
241 }, { /* UART2 */
242 .dev_id = "dev:f3",
243 .clk = &ref24_clk,
244 }, { /* UART3 */
245 .dev_id = "fpga:09",
246 .clk = &ref24_clk,
247 }, { /* KMI0 */
248 .dev_id = "fpga:06",
249 .clk = &ref24_clk,
250 }, { /* KMI1 */
251 .dev_id = "fpga:07",
252 .clk = &ref24_clk,
253 }, { /* MMC0 */
254 .dev_id = "fpga:05",
255 .clk = &ref24_clk,
256 }, { /* EB:CLCD */
257 .dev_id = "dev:20",
258 .clk = &oscvco_clk,
259 }, { /* PB:CLCD */
260 .dev_id = "issp:20",
261 .clk = &oscvco_clk,
262 }
263};
264
265static int __init clk_init(void)
266{
267 int i;
268
269 for (i = 0; i < ARRAY_SIZE(lookups); i++)
270 clkdev_add(&lookups[i]);
271 return 0;
272}
273arch_initcall(clk_init);
274
275/*
198 * CLCD support. 276 * CLCD support.
199 */ 277 */
200#define SYS_CLCD_NLCDIOON (1 << 2) 278#define SYS_CLCD_NLCDIOON (1 << 2)
@@ -226,7 +304,30 @@ static struct clcd_panel vga = {
226 .width = -1, 304 .width = -1,
227 .height = -1, 305 .height = -1,
228 .tim2 = TIM2_BCD | TIM2_IPC, 306 .tim2 = TIM2_BCD | TIM2_IPC,
229 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 307 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
308 .bpp = 16,
309};
310
311static struct clcd_panel xvga = {
312 .mode = {
313 .name = "XVGA",
314 .refresh = 60,
315 .xres = 1024,
316 .yres = 768,
317 .pixclock = 15748,
318 .left_margin = 152,
319 .right_margin = 48,
320 .upper_margin = 23,
321 .lower_margin = 3,
322 .hsync_len = 104,
323 .vsync_len = 4,
324 .sync = 0,
325 .vmode = FB_VMODE_NONINTERLACED,
326 },
327 .width = -1,
328 .height = -1,
329 .tim2 = TIM2_BCD | TIM2_IPC,
330 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
230 .bpp = 16, 331 .bpp = 16,
231}; 332};
232 333
@@ -249,7 +350,7 @@ static struct clcd_panel sanyo_3_8_in = {
249 .width = -1, 350 .width = -1,
250 .height = -1, 351 .height = -1,
251 .tim2 = TIM2_BCD, 352 .tim2 = TIM2_BCD,
252 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 353 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
253 .bpp = 16, 354 .bpp = 16,
254}; 355};
255 356
@@ -272,7 +373,7 @@ static struct clcd_panel sanyo_2_5_in = {
272 .width = -1, 373 .width = -1,
273 .height = -1, 374 .height = -1,
274 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC, 375 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
275 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 376 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
276 .bpp = 16, 377 .bpp = 16,
277}; 378};
278 379
@@ -295,7 +396,7 @@ static struct clcd_panel epson_2_2_in = {
295 .width = -1, 396 .width = -1,
296 .height = -1, 397 .height = -1,
297 .tim2 = TIM2_BCD | TIM2_IPC, 398 .tim2 = TIM2_BCD | TIM2_IPC,
298 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 399 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
299 .bpp = 16, 400 .bpp = 16,
300}; 401};
301 402
@@ -308,9 +409,15 @@ static struct clcd_panel epson_2_2_in = {
308static struct clcd_panel *realview_clcd_panel(void) 409static struct clcd_panel *realview_clcd_panel(void)
309{ 410{
310 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; 411 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
311 struct clcd_panel *panel = &vga; 412 struct clcd_panel *vga_panel;
413 struct clcd_panel *panel;
312 u32 val; 414 u32 val;
313 415
416 if (machine_is_realview_eb())
417 vga_panel = &vga;
418 else
419 vga_panel = &xvga;
420
314 val = readl(sys_clcd) & SYS_CLCD_ID_MASK; 421 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
315 if (val == SYS_CLCD_ID_SANYO_3_8) 422 if (val == SYS_CLCD_ID_SANYO_3_8)
316 panel = &sanyo_3_8_in; 423 panel = &sanyo_3_8_in;
@@ -319,11 +426,11 @@ static struct clcd_panel *realview_clcd_panel(void)
319 else if (val == SYS_CLCD_ID_EPSON_2_2) 426 else if (val == SYS_CLCD_ID_EPSON_2_2)
320 panel = &epson_2_2_in; 427 panel = &epson_2_2_in;
321 else if (val == SYS_CLCD_ID_VGA) 428 else if (val == SYS_CLCD_ID_VGA)
322 panel = &vga; 429 panel = vga_panel;
323 else { 430 else {
324 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n", 431 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
325 val); 432 val);
326 panel = &vga; 433 panel = vga_panel;
327 } 434 }
328 435
329 return panel; 436 return panel;
@@ -358,12 +465,18 @@ static void realview_clcd_enable(struct clcd_fb *fb)
358 writel(val, sys_clcd); 465 writel(val, sys_clcd);
359} 466}
360 467
361static unsigned long framesize = SZ_1M;
362
363static int realview_clcd_setup(struct clcd_fb *fb) 468static int realview_clcd_setup(struct clcd_fb *fb)
364{ 469{
470 unsigned long framesize;
365 dma_addr_t dma; 471 dma_addr_t dma;
366 472
473 if (machine_is_realview_eb())
474 /* VGA, 16bpp */
475 framesize = 640 * 480 * 2;
476 else
477 /* XVGA, 16bpp */
478 framesize = 1024 * 768 * 2;
479
367 fb->panel = realview_clcd_panel(); 480 fb->panel = realview_clcd_panel();
368 481
369 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, 482 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
@@ -588,7 +701,7 @@ void __init realview_timer_init(unsigned int timer_irq)
588 * The dummy clock device has to be registered before the main device 701 * The dummy clock device has to be registered before the main device
589 * so that the latter will broadcast the clock events 702 * so that the latter will broadcast the clock events
590 */ 703 */
591 local_timer_setup(smp_processor_id()); 704 local_timer_setup();
592#endif 705#endif
593 706
594 /* 707 /*
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 3cea92c70d8f..63be2abdc19c 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -48,12 +48,10 @@ extern struct platform_device realview_flash_device;
48extern struct platform_device realview_i2c_device; 48extern struct platform_device realview_i2c_device;
49extern struct mmc_platform_data realview_mmc0_plat_data; 49extern struct mmc_platform_data realview_mmc0_plat_data;
50extern struct mmc_platform_data realview_mmc1_plat_data; 50extern struct mmc_platform_data realview_mmc1_plat_data;
51extern struct clk realview_clcd_clk;
52extern struct clcd_board clcd_plat_data; 51extern struct clcd_board clcd_plat_data;
53extern void __iomem *gic_cpu_base_addr; 52extern void __iomem *gic_cpu_base_addr;
54#ifdef CONFIG_LOCAL_TIMERS 53#ifdef CONFIG_LOCAL_TIMERS
55extern void __iomem *twd_base_addr; 54extern void __iomem *twd_base;
56extern unsigned int twd_size;
57#endif 55#endif
58extern void __iomem *timer0_va_base; 56extern void __iomem *timer0_va_base;
59extern void __iomem *timer1_va_base; 57extern void __iomem *timer1_va_base;
@@ -63,5 +61,6 @@ extern void __iomem *timer3_va_base;
63extern void realview_leds_event(led_event_t ledevt); 61extern void realview_leds_event(led_event_t ledevt);
64extern void realview_timer_init(unsigned int timer_irq); 62extern void realview_timer_init(unsigned int timer_irq);
65extern int realview_flash_register(struct resource *res, u32 num); 63extern int realview_flash_register(struct resource *res, u32 num);
64extern int realview_eth_register(const char *name, struct resource *res);
66 65
67#endif 66#endif
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
index 09748cbcd10e..be048e3e8799 100644
--- a/arch/arm/mach-realview/hotplug.c
+++ b/arch/arm/mach-realview/hotplug.c
@@ -13,6 +13,8 @@
13#include <linux/smp.h> 13#include <linux/smp.h>
14#include <linux/completion.h> 14#include <linux/completion.h>
15 15
16#include <asm/cacheflush.h>
17
16extern volatile int pen_release; 18extern volatile int pen_release;
17 19
18static DECLARE_COMPLETION(cpu_killed); 20static DECLARE_COMPLETION(cpu_killed);
@@ -21,7 +23,8 @@ static inline void cpu_enter_lowpower(void)
21{ 23{
22 unsigned int v; 24 unsigned int v;
23 25
24 asm volatile( "mcr p15, 0, %1, c7, c14, 0\n" 26 flush_cache_all();
27 asm volatile(
25 " mcr p15, 0, %1, c7, c5, 0\n" 28 " mcr p15, 0, %1, c7, c5, 0\n"
26 " mcr p15, 0, %1, c7, c10, 4\n" 29 " mcr p15, 0, %1, c7, c10, 4\n"
27 /* 30 /*
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 8d699fd324d0..268d7701fa9b 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -49,16 +49,14 @@
49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB 49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ 50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ 51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
52#define REALVIEW_EB11MP_TWD_BASE 0x10100700 52#define REALVIEW_EB11MP_TWD_BASE 0x10100600
53#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
54#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ 53#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
55#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ 54#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
56#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ 55#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
57#else 56#else
58#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ 57#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
59#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */ 58#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
60#define REALVIEW_EB11MP_TWD_BASE 0x1F000700 59#define REALVIEW_EB11MP_TWD_BASE 0x1F000600
61#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
62#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */ 60#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
63#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ 61#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
64#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ 62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
@@ -163,7 +161,7 @@
163#define NR_IRQS NR_IRQS_EB 161#define NR_IRQS NR_IRQS_EB
164#endif 162#endif
165 163
166#if defined(CONFIG_REALVIEW_EB_ARM11MP) \ 164#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
167 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP)) 165 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
168#undef MAX_GIC_NR 166#undef MAX_GIC_NR
169#define MAX_GIC_NR NR_GIC_EB11MP 167#define MAX_GIC_NR NR_GIC_EB11MP
@@ -177,6 +175,7 @@
177#define REALVIEW_EB_PROC_ARM9 0x02000000 175#define REALVIEW_EB_PROC_ARM9 0x02000000
178#define REALVIEW_EB_PROC_ARM11 0x04000000 176#define REALVIEW_EB_PROC_ARM11 0x04000000
179#define REALVIEW_EB_PROC_ARM11MP 0x06000000 177#define REALVIEW_EB_PROC_ARM11MP 0x06000000
178#define REALVIEW_EB_PROC_A9MP 0x0C000000
180 179
181#define check_eb_proc(proc_type) \ 180#define check_eb_proc(proc_type) \
182 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \ 181 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
@@ -188,4 +187,13 @@
188#define core_tile_eb11mp() 0 187#define core_tile_eb11mp() 0
189#endif 188#endif
190 189
190#ifdef CONFIG_REALVIEW_EB_A9MP
191#define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP)
192#else
193#define core_tile_a9mp() 0
194#endif
195
196#define machine_is_realview_eb_mp() \
197 (machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))
198
191#endif /* __ASM_ARCH_BOARD_EB_H */ 199#endif /* __ASM_ARCH_BOARD_EB_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index ecd80e58631e..53ea0e7a1267 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -77,8 +77,7 @@
77 */ 77 */
78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ 78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ 79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
80#define REALVIEW_TC11MP_TWD_BASE 0x1F000700 80#define REALVIEW_TC11MP_TWD_BASE 0x1F000600
81#define REALVIEW_TC11MP_TWD_SIZE 0x00000100
82#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ 81#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
83#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ 82#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
84 83
diff --git a/arch/arm/mach-realview/include/mach/board-pba8.h b/arch/arm/mach-realview/include/mach/board-pba8.h
new file mode 100644
index 000000000000..c8bed8f58bab
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/board-pba8.h
@@ -0,0 +1,152 @@
1/*
2 * include/asm-arm/arch-realview/board-pba8.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __ASM_ARCH_BOARD_PBA8_H
22#define __ASM_ARCH_BOARD_PBA8_H
23
24#include <mach/platform.h>
25
26/*
27 * Peripheral addresses
28 */
29#define REALVIEW_PBA8_UART0_BASE 0x10009000 /* UART 0 */
30#define REALVIEW_PBA8_UART1_BASE 0x1000A000 /* UART 1 */
31#define REALVIEW_PBA8_UART2_BASE 0x1000B000 /* UART 2 */
32#define REALVIEW_PBA8_UART3_BASE 0x1000C000 /* UART 3 */
33#define REALVIEW_PBA8_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
34#define REALVIEW_PBA8_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
35#define REALVIEW_PBA8_WATCHDOG_BASE 0x10010000 /* watchdog interface */
36#define REALVIEW_PBA8_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
37#define REALVIEW_PBA8_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
38#define REALVIEW_PBA8_GPIO0_BASE 0x10013000 /* GPIO port 0 */
39#define REALVIEW_PBA8_RTC_BASE 0x10017000 /* Real Time Clock */
40#define REALVIEW_PBA8_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
41#define REALVIEW_PBA8_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
42#define REALVIEW_PBA8_SCTL_BASE 0x1001A000 /* System Controller */
43#define REALVIEW_PBA8_CLCD_BASE 0x10020000 /* CLCD */
44#define REALVIEW_PBA8_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
45#define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */
46#define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */
47#define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */
48#define REALVIEW_PBA8_CF_BASE 0x18000000 /* Compact flash */
49#define REALVIEW_PBA8_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */
50#define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
51#define REALVIEW_PBA8_FLASH0_BASE 0x40000000
52#define REALVIEW_PBA8_FLASH0_SIZE SZ_64M
53#define REALVIEW_PBA8_FLASH1_BASE 0x44000000
54#define REALVIEW_PBA8_FLASH1_SIZE SZ_64M
55#define REALVIEW_PBA8_ETH_BASE 0x4E000000 /* Ethernet */
56#define REALVIEW_PBA8_USB_BASE 0x4F000000 /* USB */
57#define REALVIEW_PBA8_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
58#define REALVIEW_PBA8_LT_BASE 0xC0000000 /* Logic Tile expansion */
59#define REALVIEW_PBA8_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
60#define REALVIEW_PBA8_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
61
62#define REALVIEW_PBA8_SYS_PLD_CTRL1 0x74
63
64/*
65 * PBA8 PCI regions
66 */
67#define REALVIEW_PBA8_PCI_BASE 0x90040000 /* PCI-X Unit base */
68#define REALVIEW_PBA8_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
69#define REALVIEW_PBA8_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
70
71#define REALVIEW_PBA8_PCI_BASE_SIZE 0x10000 /* 16 Kb */
72#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
73#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
74
75/*
76 * Irqs
77 */
78#define IRQ_PBA8_GIC_START 32
79
80/* L220
81#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
82#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
83#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
84*/
85
86/*
87 * PB-A8 on-board gic irq sources
88 */
89#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
90#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
91#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
92#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
93#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
94#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
95#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
96#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
97#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
98 /* 9 reserved */
99#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
100#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
101#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
102#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
103#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
104#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
105#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
106#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
107#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
108#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
109#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
110#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
111#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
112#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
113#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
114#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
115#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
116#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
117#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
118#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
119#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
120#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
121
122/* ... */
123#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
124#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
125#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
126#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
127
128#define IRQ_PBA8_SMC -1
129#define IRQ_PBA8_SCTL -1
130
131#define NR_GIC_PBA8 1
132
133/*
134 * Only define NR_IRQS if less than NR_IRQS_PBA8
135 */
136#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
137
138#if defined(CONFIG_MACH_REALVIEW_PBA8)
139
140#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
141#undef NR_IRQS
142#define NR_IRQS NR_IRQS_PBA8
143#endif
144
145#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
146#undef MAX_GIC_NR
147#define MAX_GIC_NR NR_GIC_PBA8
148#endif
149
150#endif /* CONFIG_MACH_REALVIEW_PBA8 */
151
152#endif /* __ASM_ARCH_BOARD_PBA8_H */
diff --git a/arch/arm/mach-realview/include/mach/clkdev.h b/arch/arm/mach-realview/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif
diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S
index 7196bcadff0c..92dbcb9e1792 100644
--- a/arch/arm/mach-realview/include/mach/debug-macro.S
+++ b/arch/arm/mach-realview/include/mach/debug-macro.S
@@ -8,15 +8,36 @@
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 */
12*/ 12
13#if defined(CONFIG_MACH_REALVIEW_EB) || \
14 defined(CONFIG_MACH_REALVIEW_PB11MP) || \
15 defined(CONFIG_MACH_REALVIEW_PBA8)
16#ifndef DEBUG_LL_UART_OFFSET
17#define DEBUG_LL_UART_OFFSET 0x00009000
18#elif DEBUG_LL_UART_OFFSET != 0x00009000
19#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
20#endif
21#endif
22
23#ifdef CONFIG_MACH_REALVIEW_PB1176
24#ifndef DEBUG_LL_UART_OFFSET
25#define DEBUG_LL_UART_OFFSET 0x0010c000
26#elif DEBUG_LL_UART_OFFSET != 0x0010c000
27#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
28#endif
29#endif
30
31#ifndef DEBUG_LL_UART_OFFSET
32#error "Unknown RealView platform"
33#endif
13 34
14 .macro addruart,rx 35 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0 36 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled? 37 tst \rx, #1 @ MMU enabled?
17 moveq \rx, #0x10000000 38 moveq \rx, #0x10000000
18 movne \rx, #0xf0000000 @ virtual base 39 movne \rx, #0xfb000000 @ virtual base
19 orr \rx, \rx, #0x00009000 40 orr \rx, \rx, #DEBUG_LL_UART_OFFSET
20 .endm 41 .endm
21 42
22#include <asm/hardware/debug-pl01x.S> 43#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-realview/include/mach/dma.h b/arch/arm/mach-realview/include/mach/dma.h
deleted file mode 100644
index f1a5a1a10952..000000000000
--- a/arch/arm/mach-realview/include/mach/dma.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-realview/include/mach/dma.h
3 *
4 * Copyright (C) 2003 ARM Limited.
5 * Copyright (C) 1997,1998 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
diff --git a/arch/arm/mach-realview/include/mach/hardware.h b/arch/arm/mach-realview/include/mach/hardware.h
index 79a93b3dfca9..b42c14f89acb 100644
--- a/arch/arm/mach-realview/include/mach/hardware.h
+++ b/arch/arm/mach-realview/include/mach/hardware.h
@@ -25,7 +25,14 @@
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26 26
27/* macro to get at IO space when running virtually */ 27/* macro to get at IO space when running virtually */
28#define IO_ADDRESS(x) (((x) & 0x0fffffff) + 0xf0000000) 28/*
29 * Statically mapped addresses:
30 *
31 * 10xx xxxx -> fbxx xxxx
32 * 1exx xxxx -> fdxx xxxx
33 * 1fxx xxxx -> fexx xxxx
34 */
35#define IO_ADDRESS(x) (((x) & 0x03ffffff) + 0xfb000000)
29#define __io_address(n) __io(IO_ADDRESS(n)) 36#define __io_address(n) __io(IO_ADDRESS(n))
30 37
31#endif 38#endif
diff --git a/arch/arm/mach-realview/include/mach/io.h b/arch/arm/mach-realview/include/mach/io.h
index aa069424d310..f05bcdf605d8 100644
--- a/arch/arm/mach-realview/include/mach/io.h
+++ b/arch/arm/mach-realview/include/mach/io.h
@@ -22,12 +22,7 @@
22 22
23#define IO_SPACE_LIMIT 0xffffffff 23#define IO_SPACE_LIMIT 0xffffffff
24 24
25static inline void __iomem *__io(unsigned long addr) 25#define __io(a) __typesafe_io(a)
26{ 26#define __mem_pci(a) (a)
27 return (void __iomem *)addr;
28}
29
30#define __io(a) __io(a)
31#define __mem_pci(a) (a)
32 27
33#endif 28#endif
diff --git a/arch/arm/mach-realview/include/mach/irqs.h b/arch/arm/mach-realview/include/mach/irqs.h
index 02a918529db3..fe5cb987aa21 100644
--- a/arch/arm/mach-realview/include/mach/irqs.h
+++ b/arch/arm/mach-realview/include/mach/irqs.h
@@ -25,6 +25,7 @@
25#include <mach/board-eb.h> 25#include <mach/board-eb.h>
26#include <mach/board-pb11mp.h> 26#include <mach/board-pb11mp.h>
27#include <mach/board-pb1176.h> 27#include <mach/board-pb1176.h>
28#include <mach/board-pba8.h>
28 29
29#define IRQ_LOCALTIMER 29 30#define IRQ_LOCALTIMER 29
30#define IRQ_LOCALWDOG 30 31#define IRQ_LOCALWDOG 30
diff --git a/arch/arm/mach-realview/include/mach/memory.h b/arch/arm/mach-realview/include/mach/memory.h
index 0e673483a141..293c30025e7e 100644
--- a/arch/arm/mach-realview/include/mach/memory.h
+++ b/arch/arm/mach-realview/include/mach/memory.h
@@ -23,16 +23,10 @@
23/* 23/*
24 * Physical DRAM offset. 24 * Physical DRAM offset.
25 */ 25 */
26#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
27#define PHYS_OFFSET UL(0x70000000)
28#else
26#define PHYS_OFFSET UL(0x00000000) 29#define PHYS_OFFSET UL(0x00000000)
27 30#endif
28/*
29 * Virtual view <-> DMA view memory address translations
30 * virt_to_bus: Used to translate the virtual address to an
31 * address suitable to be passed to set_dma_addr
32 * bus_to_virt: Used to convert an address for DMA operations
33 * to an address that the kernel can use.
34 */
35#define __virt_to_bus(x) ((x) - PAGE_OFFSET)
36#define __bus_to_virt(x) ((x) + PAGE_OFFSET)
37 31
38#endif 32#endif
diff --git a/arch/arm/mach-realview/include/mach/uncompress.h b/arch/arm/mach-realview/include/mach/uncompress.h
index 79f50f218e77..415d634d52ab 100644
--- a/arch/arm/mach-realview/include/mach/uncompress.h
+++ b/arch/arm/mach-realview/include/mach/uncompress.h
@@ -23,6 +23,7 @@
23#include <mach/board-eb.h> 23#include <mach/board-eb.h>
24#include <mach/board-pb11mp.h> 24#include <mach/board-pb11mp.h>
25#include <mach/board-pb1176.h> 25#include <mach/board-pb1176.h>
26#include <mach/board-pba8.h>
26 27
27#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) 28#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
28#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c)) 29#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
@@ -40,6 +41,8 @@ static inline unsigned long get_uart_base(void)
40 return REALVIEW_PB11MP_UART0_BASE; 41 return REALVIEW_PB11MP_UART0_BASE;
41 else if (machine_is_realview_pb1176()) 42 else if (machine_is_realview_pb1176())
42 return REALVIEW_PB1176_UART0_BASE; 43 return REALVIEW_PB1176_UART0_BASE;
44 else if (machine_is_realview_pba8())
45 return REALVIEW_PBA8_UART0_BASE;
43 else 46 else
44 return 0; 47 return 0;
45} 48}
diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h
index 48cbcc873db2..fe0de1b507ac 100644
--- a/arch/arm/mach-realview/include/mach/vmalloc.h
+++ b/arch/arm/mach-realview/include/mach/vmalloc.h
@@ -18,4 +18,4 @@
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21#define VMALLOC_END (PAGE_OFFSET + 0x18000000) 21#define VMALLOC_END 0xf8000000
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
index 44d178cd5733..9019ef2e5611 100644
--- a/arch/arm/mach-realview/localtimer.c
+++ b/arch/arm/mach-realview/localtimer.c
@@ -38,18 +38,14 @@ void local_timer_interrupt(void)
38 38
39#ifdef CONFIG_LOCAL_TIMERS 39#ifdef CONFIG_LOCAL_TIMERS
40 40
41#define TWD_BASE(cpu) (twd_base_addr + (cpu) * twd_size)
42
43/* set up by the platform code */ 41/* set up by the platform code */
44void __iomem *twd_base_addr; 42void __iomem *twd_base;
45unsigned int twd_size;
46 43
47static unsigned long mpcore_timer_rate; 44static unsigned long mpcore_timer_rate;
48 45
49static void local_timer_set_mode(enum clock_event_mode mode, 46static void local_timer_set_mode(enum clock_event_mode mode,
50 struct clock_event_device *clk) 47 struct clock_event_device *clk)
51{ 48{
52 void __iomem *base = TWD_BASE(smp_processor_id());
53 unsigned long ctrl; 49 unsigned long ctrl;
54 50
55 switch(mode) { 51 switch(mode) {
@@ -68,17 +64,16 @@ static void local_timer_set_mode(enum clock_event_mode mode,
68 ctrl = 0; 64 ctrl = 0;
69 } 65 }
70 66
71 __raw_writel(ctrl, base + TWD_TIMER_CONTROL); 67 __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
72} 68}
73 69
74static int local_timer_set_next_event(unsigned long evt, 70static int local_timer_set_next_event(unsigned long evt,
75 struct clock_event_device *unused) 71 struct clock_event_device *unused)
76{ 72{
77 void __iomem *base = TWD_BASE(smp_processor_id()); 73 unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
78 unsigned long ctrl = __raw_readl(base + TWD_TIMER_CONTROL);
79 74
80 __raw_writel(evt, base + TWD_TIMER_COUNTER); 75 __raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
81 __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, base + TWD_TIMER_CONTROL); 76 __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, twd_base + TWD_TIMER_CONTROL);
82 77
83 return 0; 78 return 0;
84} 79}
@@ -91,19 +86,16 @@ static int local_timer_set_next_event(unsigned long evt,
91 */ 86 */
92int local_timer_ack(void) 87int local_timer_ack(void)
93{ 88{
94 void __iomem *base = TWD_BASE(smp_processor_id()); 89 if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
95 90 __raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
96 if (__raw_readl(base + TWD_TIMER_INTSTAT)) {
97 __raw_writel(1, base + TWD_TIMER_INTSTAT);
98 return 1; 91 return 1;
99 } 92 }
100 93
101 return 0; 94 return 0;
102} 95}
103 96
104static void __cpuinit twd_calibrate_rate(unsigned int cpu) 97static void __cpuinit twd_calibrate_rate(void)
105{ 98{
106 void __iomem *base = TWD_BASE(cpu);
107 unsigned long load, count; 99 unsigned long load, count;
108 u64 waitjiffies; 100 u64 waitjiffies;
109 101
@@ -124,15 +116,15 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
124 waitjiffies += 5; 116 waitjiffies += 5;
125 117
126 /* enable, no interrupt or reload */ 118 /* enable, no interrupt or reload */
127 __raw_writel(0x1, base + TWD_TIMER_CONTROL); 119 __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
128 120
129 /* maximum value */ 121 /* maximum value */
130 __raw_writel(0xFFFFFFFFU, base + TWD_TIMER_COUNTER); 122 __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
131 123
132 while (get_jiffies_64() < waitjiffies) 124 while (get_jiffies_64() < waitjiffies)
133 udelay(10); 125 udelay(10);
134 126
135 count = __raw_readl(base + TWD_TIMER_COUNTER); 127 count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
136 128
137 mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); 129 mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
138 130
@@ -142,18 +134,19 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
142 134
143 load = mpcore_timer_rate / HZ; 135 load = mpcore_timer_rate / HZ;
144 136
145 __raw_writel(load, base + TWD_TIMER_LOAD); 137 __raw_writel(load, twd_base + TWD_TIMER_LOAD);
146} 138}
147 139
148/* 140/*
149 * Setup the local clock events for a CPU. 141 * Setup the local clock events for a CPU.
150 */ 142 */
151void __cpuinit local_timer_setup(unsigned int cpu) 143void __cpuinit local_timer_setup(void)
152{ 144{
145 unsigned int cpu = smp_processor_id();
153 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); 146 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
154 unsigned long flags; 147 unsigned long flags;
155 148
156 twd_calibrate_rate(cpu); 149 twd_calibrate_rate();
157 150
158 clk->name = "local_timer"; 151 clk->name = "local_timer";
159 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 152 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
@@ -178,9 +171,9 @@ void __cpuinit local_timer_setup(unsigned int cpu)
178/* 171/*
179 * take a local timer down 172 * take a local timer down
180 */ 173 */
181void __cpuexit local_timer_stop(unsigned int cpu) 174void __cpuexit local_timer_stop(void)
182{ 175{
183 __raw_writel(0, TWD_BASE(cpu) + TWD_TIMER_CONTROL); 176 __raw_writel(0, twd_base + TWD_TIMER_CONTROL);
184} 177}
185 178
186#else /* CONFIG_LOCAL_TIMERS */ 179#else /* CONFIG_LOCAL_TIMERS */
@@ -190,8 +183,9 @@ static void dummy_timer_set_mode(enum clock_event_mode mode,
190{ 183{
191} 184}
192 185
193void __cpuinit local_timer_setup(unsigned int cpu) 186void __cpuinit local_timer_setup(void)
194{ 187{
188 unsigned int cpu = smp_processor_id();
195 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); 189 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
196 190
197 clk->name = "dummy_timer"; 191 clk->name = "dummy_timer";
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index e102aeb0f76e..8fce85f33033 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -23,6 +23,8 @@
23#include <mach/board-pb11mp.h> 23#include <mach/board-pb11mp.h>
24#include <mach/scu.h> 24#include <mach/scu.h>
25 25
26#include "core.h"
27
26extern void realview_secondary_startup(void); 28extern void realview_secondary_startup(void);
27 29
28/* 30/*
@@ -31,15 +33,20 @@ extern void realview_secondary_startup(void);
31 */ 33 */
32volatile int __cpuinitdata pen_release = -1; 34volatile int __cpuinitdata pen_release = -1;
33 35
36static void __iomem *scu_base_addr(void)
37{
38 if (machine_is_realview_eb_mp())
39 return __io_address(REALVIEW_EB11MP_SCU_BASE);
40 else if (machine_is_realview_pb11mp())
41 return __io_address(REALVIEW_TC11MP_SCU_BASE);
42 else
43 return (void __iomem *)0;
44}
45
34static unsigned int __init get_core_count(void) 46static unsigned int __init get_core_count(void)
35{ 47{
36 unsigned int ncores; 48 unsigned int ncores;
37 void __iomem *scu_base = 0; 49 void __iomem *scu_base = scu_base_addr();
38
39 if (machine_is_realview_eb() && core_tile_eb11mp())
40 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
41 else if (machine_is_realview_pb11mp())
42 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
43 50
44 if (scu_base) { 51 if (scu_base) {
45 ncores = __raw_readl(scu_base + SCU_CONFIG); 52 ncores = __raw_readl(scu_base + SCU_CONFIG);
@@ -56,14 +63,7 @@ static unsigned int __init get_core_count(void)
56static void scu_enable(void) 63static void scu_enable(void)
57{ 64{
58 u32 scu_ctrl; 65 u32 scu_ctrl;
59 void __iomem *scu_base; 66 void __iomem *scu_base = scu_base_addr();
60
61 if (machine_is_realview_eb() && core_tile_eb11mp())
62 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
63 else if (machine_is_realview_pb11mp())
64 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
65 else
66 BUG();
67 67
68 scu_ctrl = __raw_readl(scu_base + SCU_CTRL); 68 scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
69 scu_ctrl |= 1; 69 scu_ctrl |= 1;
@@ -88,10 +88,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
88 * core (e.g. timer irq), then they will not have been enabled 88 * core (e.g. timer irq), then they will not have been enabled
89 * for us: do so 89 * for us: do so
90 */ 90 */
91 if (machine_is_realview_eb() && core_tile_eb11mp()) 91 gic_cpu_init(0, gic_cpu_base_addr);
92 gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
93 else if (machine_is_realview_pb11mp())
94 gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
95 92
96 /* 93 /*
97 * let the primary processor know we're out of the 94 * let the primary processor know we're out of the
@@ -232,9 +229,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
232 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in 229 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
233 * realview_timer_init 230 * realview_timer_init
234 */ 231 */
235 if ((machine_is_realview_eb() && core_tile_eb11mp()) || 232 local_timer_setup();
236 machine_is_realview_pb11mp())
237 local_timer_setup(cpu);
238#endif 233#endif
239 234
240 /* 235 /*
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index eb829eb1ebe2..bed39ed97613 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -108,7 +108,7 @@ static struct map_desc realview_eb11mp_io_desc[] __initdata = {
108static void __init realview_eb_map_io(void) 108static void __init realview_eb_map_io(void)
109{ 109{
110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc)); 110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
111 if (core_tile_eb11mp()) 111 if (core_tile_eb11mp() || core_tile_a9mp())
112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc)); 112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
113} 113}
114 114
@@ -242,12 +242,6 @@ static struct resource realview_eb_eth_resources[] = {
242 }, 242 },
243}; 243};
244 244
245static struct platform_device realview_eb_eth_device = {
246 .id = 0,
247 .num_resources = ARRAY_SIZE(realview_eb_eth_resources),
248 .resource = realview_eb_eth_resources,
249};
250
251/* 245/*
252 * Detect and register the correct Ethernet device. RealView/EB rev D 246 * Detect and register the correct Ethernet device. RealView/EB rev D
253 * platforms use the newer SMSC LAN9118 Ethernet chip 247 * platforms use the newer SMSC LAN9118 Ethernet chip
@@ -255,26 +249,24 @@ static struct platform_device realview_eb_eth_device = {
255static int eth_device_register(void) 249static int eth_device_register(void)
256{ 250{
257 void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K); 251 void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
252 const char *name = NULL;
258 u32 idrev; 253 u32 idrev;
259 254
260 if (!eth_addr) 255 if (!eth_addr)
261 return -ENOMEM; 256 return -ENOMEM;
262 257
263 idrev = readl(eth_addr + 0x50); 258 idrev = readl(eth_addr + 0x50);
264 if ((idrev & 0xFFFF0000) == 0x01180000) 259 if ((idrev & 0xFFFF0000) != 0x01180000)
265 /* SMSC LAN9118 chip present */ 260 /* SMSC LAN9118 not present, use LAN91C111 instead */
266 realview_eb_eth_device.name = "smc911x"; 261 name = "smc91x";
267 else
268 /* SMSC 91C111 chip present */
269 realview_eb_eth_device.name = "smc91x";
270 262
271 iounmap(eth_addr); 263 iounmap(eth_addr);
272 return platform_device_register(&realview_eb_eth_device); 264 return realview_eth_register(name, realview_eb_eth_resources);
273} 265}
274 266
275static void __init gic_init_irq(void) 267static void __init gic_init_irq(void)
276{ 268{
277 if (core_tile_eb11mp()) { 269 if (core_tile_eb11mp() || core_tile_a9mp()) {
278 unsigned int pldctrl; 270 unsigned int pldctrl;
279 271
280 /* new irq mode */ 272 /* new irq mode */
@@ -342,10 +334,9 @@ static void __init realview_eb_timer_init(void)
342 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE); 334 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
343 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20; 335 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
344 336
345 if (core_tile_eb11mp()) { 337 if (core_tile_eb11mp() || core_tile_a9mp()) {
346#ifdef CONFIG_LOCAL_TIMERS 338#ifdef CONFIG_LOCAL_TIMERS
347 twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE); 339 twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
348 twd_size = REALVIEW_EB11MP_TWD_SIZE;
349#endif 340#endif
350 timer_irq = IRQ_EB11MP_TIMER0_1; 341 timer_irq = IRQ_EB11MP_TIMER0_1;
351 } else 342 } else
@@ -362,7 +353,7 @@ static void __init realview_eb_init(void)
362{ 353{
363 int i; 354 int i;
364 355
365 if (core_tile_eb11mp()) { 356 if (core_tile_eb11mp() || core_tile_a9mp()) {
366 realview_eb11mp_fixup(); 357 realview_eb11mp_fixup();
367 358
368#ifdef CONFIG_CACHE_L2X0 359#ifdef CONFIG_CACHE_L2X0
@@ -372,8 +363,6 @@ static void __init realview_eb_init(void)
372#endif 363#endif
373 } 364 }
374 365
375 clk_register(&realview_clcd_clk);
376
377 realview_flash_register(&realview_eb_flash_resource, 1); 366 realview_flash_register(&realview_eb_flash_resource, 1);
378 platform_device_register(&realview_i2c_device); 367 platform_device_register(&realview_i2c_device);
379 eth_device_register(); 368 eth_device_register();
@@ -392,7 +381,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
392 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 381 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
393 .phys_io = REALVIEW_EB_UART0_BASE, 382 .phys_io = REALVIEW_EB_UART0_BASE,
394 .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc, 383 .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
395 .boot_params = 0x00000100, 384 .boot_params = PHYS_OFFSET + 0x00000100,
396 .map_io = realview_eb_map_io, 385 .map_io = realview_eb_map_io,
397 .init_irq = gic_init_irq, 386 .init_irq = gic_init_irq,
398 .timer = &realview_eb_timer, 387 .timer = &realview_eb_timer,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index cccdb3eb90fe..8f0683c22140 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -222,13 +222,6 @@ static struct resource realview_pb1176_smsc911x_resources[] = {
222 }, 222 },
223}; 223};
224 224
225static struct platform_device realview_pb1176_smsc911x_device = {
226 .name = "smc911x",
227 .id = 0,
228 .num_resources = ARRAY_SIZE(realview_pb1176_smsc911x_resources),
229 .resource = realview_pb1176_smsc911x_resources,
230};
231
232static void __init gic_init_irq(void) 225static void __init gic_init_irq(void)
233{ 226{
234 /* ARM1176 DevChip GIC, primary */ 227 /* ARM1176 DevChip GIC, primary */
@@ -265,10 +258,8 @@ static void __init realview_pb1176_init(void)
265 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff); 258 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
266#endif 259#endif
267 260
268 clk_register(&realview_clcd_clk);
269
270 realview_flash_register(&realview_pb1176_flash_resource, 1); 261 realview_flash_register(&realview_pb1176_flash_resource, 1);
271 platform_device_register(&realview_pb1176_smsc911x_device); 262 realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
272 263
273 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 264 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
274 struct amba_device *d = amba_devs[i]; 265 struct amba_device *d = amba_devs[i];
@@ -284,7 +275,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
284 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 275 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
285 .phys_io = REALVIEW_PB1176_UART0_BASE, 276 .phys_io = REALVIEW_PB1176_UART0_BASE,
286 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc, 277 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
287 .boot_params = 0x00000100, 278 .boot_params = PHYS_OFFSET + 0x00000100,
288 .map_io = realview_pb1176_map_io, 279 .map_io = realview_pb1176_map_io,
289 .init_irq = gic_init_irq, 280 .init_irq = gic_init_irq,
290 .timer = &realview_pb1176_timer, 281 .timer = &realview_pb1176_timer,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 8b863148ec18..3ebdb2dadd6f 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -230,13 +230,6 @@ static struct resource realview_pb11mp_smsc911x_resources[] = {
230 }, 230 },
231}; 231};
232 232
233static struct platform_device realview_pb11mp_smsc911x_device = {
234 .name = "smc911x",
235 .id = 0,
236 .num_resources = ARRAY_SIZE(realview_pb11mp_smsc911x_resources),
237 .resource = realview_pb11mp_smsc911x_resources,
238};
239
240struct resource realview_pb11mp_cf_resources[] = { 233struct resource realview_pb11mp_cf_resources[] = {
241 [0] = { 234 [0] = {
242 .start = REALVIEW_PB11MP_CF_BASE, 235 .start = REALVIEW_PB11MP_CF_BASE,
@@ -292,8 +285,7 @@ static void __init realview_pb11mp_timer_init(void)
292 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20; 285 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
293 286
294#ifdef CONFIG_LOCAL_TIMERS 287#ifdef CONFIG_LOCAL_TIMERS
295 twd_base_addr = __io_address(REALVIEW_TC11MP_TWD_BASE); 288 twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
296 twd_size = REALVIEW_TC11MP_TWD_SIZE;
297#endif 289#endif
298 realview_timer_init(IRQ_TC11MP_TIMER0_1); 290 realview_timer_init(IRQ_TC11MP_TIMER0_1);
299} 291}
@@ -312,11 +304,9 @@ static void __init realview_pb11mp_init(void)
312 l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff); 304 l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
313#endif 305#endif
314 306
315 clk_register(&realview_clcd_clk);
316
317 realview_flash_register(realview_pb11mp_flash_resource, 307 realview_flash_register(realview_pb11mp_flash_resource,
318 ARRAY_SIZE(realview_pb11mp_flash_resource)); 308 ARRAY_SIZE(realview_pb11mp_flash_resource));
319 platform_device_register(&realview_pb11mp_smsc911x_device); 309 realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
320 platform_device_register(&realview_i2c_device); 310 platform_device_register(&realview_i2c_device);
321 platform_device_register(&realview_pb11mp_cf_device); 311 platform_device_register(&realview_pb11mp_cf_device);
322 312
@@ -334,7 +324,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
334 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 324 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
335 .phys_io = REALVIEW_PB11MP_UART0_BASE, 325 .phys_io = REALVIEW_PB11MP_UART0_BASE,
336 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc, 326 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
337 .boot_params = 0x00000100, 327 .boot_params = PHYS_OFFSET + 0x00000100,
338 .map_io = realview_pb11mp_map_io, 328 .map_io = realview_pb11mp_map_io,
339 .init_irq = gic_init_irq, 329 .init_irq = gic_init_irq,
340 .timer = &realview_pb11mp_timer, 330 .timer = &realview_pb11mp_timer,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
new file mode 100644
index 000000000000..34c94435d2d8
--- /dev/null
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -0,0 +1,300 @@
1/*
2 * linux/arch/arm/mach-realview/realview_pba8.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/sysdev.h>
25#include <linux/amba/bus.h>
26#include <linux/io.h>
27
28#include <asm/irq.h>
29#include <asm/leds.h>
30#include <asm/mach-types.h>
31#include <asm/hardware/gic.h>
32#include <asm/hardware/icst307.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/map.h>
36#include <asm/mach/mmc.h>
37#include <asm/mach/time.h>
38
39#include <mach/hardware.h>
40#include <mach/board-pba8.h>
41#include <mach/irqs.h>
42
43#include "core.h"
44#include "clock.h"
45
46static struct map_desc realview_pba8_io_desc[] __initdata = {
47 {
48 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
49 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
50 .length = SZ_4K,
51 .type = MT_DEVICE,
52 }, {
53 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
54 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
55 .length = SZ_4K,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
59 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
60 .length = SZ_4K,
61 .type = MT_DEVICE,
62 }, {
63 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
64 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
65 .length = SZ_4K,
66 .type = MT_DEVICE,
67 }, {
68 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
69 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
70 .length = SZ_4K,
71 .type = MT_DEVICE,
72 }, {
73 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
74 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
75 .length = SZ_4K,
76 .type = MT_DEVICE,
77 },
78#ifdef CONFIG_PCI
79 {
80 .virtual = PCIX_UNIT_BASE,
81 .pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
82 .length = REALVIEW_PBA8_PCI_BASE_SIZE,
83 .type = MT_DEVICE
84 },
85#endif
86#ifdef CONFIG_DEBUG_LL
87 {
88 .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
89 .pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
90 .length = SZ_4K,
91 .type = MT_DEVICE,
92 },
93#endif
94};
95
96static void __init realview_pba8_map_io(void)
97{
98 iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
99}
100
101/*
102 * RealView PBA8Core AMBA devices
103 */
104
105#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
106#define GPIO2_DMA { 0, 0 }
107#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
108#define GPIO3_DMA { 0, 0 }
109#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
110#define AACI_DMA { 0x80, 0x81 }
111#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
112#define MMCI0_DMA { 0x84, 0 }
113#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
114#define KMI0_DMA { 0, 0 }
115#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
116#define KMI1_DMA { 0, 0 }
117#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
118#define PBA8_SMC_DMA { 0, 0 }
119#define MPMC_IRQ { NO_IRQ, NO_IRQ }
120#define MPMC_DMA { 0, 0 }
121#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
122#define PBA8_CLCD_DMA { 0, 0 }
123#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
124#define DMAC_DMA { 0, 0 }
125#define SCTL_IRQ { NO_IRQ, NO_IRQ }
126#define SCTL_DMA { 0, 0 }
127#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
128#define PBA8_WATCHDOG_DMA { 0, 0 }
129#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
130#define PBA8_GPIO0_DMA { 0, 0 }
131#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
132#define GPIO1_DMA { 0, 0 }
133#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
134#define PBA8_RTC_DMA { 0, 0 }
135#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
136#define SCI_DMA { 7, 6 }
137#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
138#define PBA8_UART0_DMA { 15, 14 }
139#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
140#define PBA8_UART1_DMA { 13, 12 }
141#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
142#define PBA8_UART2_DMA { 11, 10 }
143#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
144#define PBA8_UART3_DMA { 0x86, 0x87 }
145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
146#define PBA8_SSP_DMA { 9, 8 }
147
148/* FPGA Primecells */
149AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
150AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
151AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
152AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
153AMBA_DEVICE(uart3, "fpga:09", PBA8_UART3, NULL);
154
155/* DevChip Primecells */
156AMBA_DEVICE(smc, "dev:00", PBA8_SMC, NULL);
157AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
158AMBA_DEVICE(wdog, "dev:e1", PBA8_WATCHDOG, NULL);
159AMBA_DEVICE(gpio0, "dev:e4", PBA8_GPIO0, NULL);
160AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
161AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
162AMBA_DEVICE(rtc, "dev:e8", PBA8_RTC, NULL);
163AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
164AMBA_DEVICE(uart0, "dev:f1", PBA8_UART0, NULL);
165AMBA_DEVICE(uart1, "dev:f2", PBA8_UART1, NULL);
166AMBA_DEVICE(uart2, "dev:f3", PBA8_UART2, NULL);
167AMBA_DEVICE(ssp0, "dev:f4", PBA8_SSP, NULL);
168
169/* Primecells on the NEC ISSP chip */
170AMBA_DEVICE(clcd, "issp:20", PBA8_CLCD, &clcd_plat_data);
171AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
172
173static struct amba_device *amba_devs[] __initdata = {
174 &dmac_device,
175 &uart0_device,
176 &uart1_device,
177 &uart2_device,
178 &uart3_device,
179 &smc_device,
180 &clcd_device,
181 &sctl_device,
182 &wdog_device,
183 &gpio0_device,
184 &gpio1_device,
185 &gpio2_device,
186 &rtc_device,
187 &sci0_device,
188 &ssp0_device,
189 &aaci_device,
190 &mmc0_device,
191 &kmi0_device,
192 &kmi1_device,
193};
194
195/*
196 * RealView PB-A8 platform devices
197 */
198static struct resource realview_pba8_flash_resource[] = {
199 [0] = {
200 .start = REALVIEW_PBA8_FLASH0_BASE,
201 .end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
202 .flags = IORESOURCE_MEM,
203 },
204 [1] = {
205 .start = REALVIEW_PBA8_FLASH1_BASE,
206 .end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
207 .flags = IORESOURCE_MEM,
208 },
209};
210
211static struct resource realview_pba8_smsc911x_resources[] = {
212 [0] = {
213 .start = REALVIEW_PBA8_ETH_BASE,
214 .end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
215 .flags = IORESOURCE_MEM,
216 },
217 [1] = {
218 .start = IRQ_PBA8_ETH,
219 .end = IRQ_PBA8_ETH,
220 .flags = IORESOURCE_IRQ,
221 },
222};
223
224struct resource realview_pba8_cf_resources[] = {
225 [0] = {
226 .start = REALVIEW_PBA8_CF_BASE,
227 .end = REALVIEW_PBA8_CF_BASE + SZ_4K - 1,
228 .flags = IORESOURCE_MEM,
229 },
230 [1] = {
231 .start = REALVIEW_PBA8_CF_MEM_BASE,
232 .end = REALVIEW_PBA8_CF_MEM_BASE + SZ_4K - 1,
233 .flags = IORESOURCE_MEM,
234 },
235 [2] = {
236 .start = -1, /* FIXME: Find correct irq */
237 .end = -1,
238 .flags = IORESOURCE_IRQ,
239 },
240};
241
242struct platform_device realview_pba8_cf_device = {
243 .name = "compactflash",
244 .id = 0,
245 .num_resources = ARRAY_SIZE(realview_pba8_cf_resources),
246 .resource = realview_pba8_cf_resources,
247};
248
249static void __init gic_init_irq(void)
250{
251 /* ARM PB-A8 on-board GIC */
252 gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
253 gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
254 gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
255}
256
257static void __init realview_pba8_timer_init(void)
258{
259 timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
260 timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
261 timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
262 timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
263
264 realview_timer_init(IRQ_PBA8_TIMER0_1);
265}
266
267static struct sys_timer realview_pba8_timer = {
268 .init = realview_pba8_timer_init,
269};
270
271static void __init realview_pba8_init(void)
272{
273 int i;
274
275 realview_flash_register(realview_pba8_flash_resource,
276 ARRAY_SIZE(realview_pba8_flash_resource));
277 realview_eth_register(NULL, realview_pba8_smsc911x_resources);
278 platform_device_register(&realview_i2c_device);
279 platform_device_register(&realview_pba8_cf_device);
280
281 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
282 struct amba_device *d = amba_devs[i];
283 amba_device_register(d, &iomem_resource);
284 }
285
286#ifdef CONFIG_LEDS
287 leds_event = realview_leds_event;
288#endif
289}
290
291MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
292 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
293 .phys_io = REALVIEW_PBA8_UART0_BASE,
294 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
295 .boot_params = PHYS_OFFSET + 0x00000100,
296 .map_io = realview_pba8_map_io,
297 .init_irq = gic_init_irq,
298 .timer = &realview_pba8_timer,
299 .init_machine = realview_pba8_init,
300MACHINE_END
diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h
index 9f0553b7ec28..20da7f486e51 100644
--- a/arch/arm/mach-rpc/include/mach/io.h
+++ b/arch/arm/mach-rpc/include/mach/io.h
@@ -18,49 +18,6 @@
18#define IO_SPACE_LIMIT 0xffffffff 18#define IO_SPACE_LIMIT 0xffffffff
19 19
20/* 20/*
21 * GCC is totally crap at loading/storing data. We try to persuade it
22 * to do the right thing by using these whereever possible instead of
23 * the above.
24 */
25#define __arch_base_getb(b,o) \
26 ({ \
27 unsigned int __v, __r = (b); \
28 __asm__ __volatile__( \
29 "ldrb %0, [%1, %2]" \
30 : "=r" (__v) \
31 : "r" (__r), "Ir" (o)); \
32 __v; \
33 })
34
35#define __arch_base_getl(b,o) \
36 ({ \
37 unsigned int __v, __r = (b); \
38 __asm__ __volatile__( \
39 "ldr %0, [%1, %2]" \
40 : "=r" (__v) \
41 : "r" (__r), "Ir" (o)); \
42 __v; \
43 })
44
45#define __arch_base_putb(v,b,o) \
46 ({ \
47 unsigned int __r = (b); \
48 __asm__ __volatile__( \
49 "strb %0, [%1, %2]" \
50 : \
51 : "r" (v), "r" (__r), "Ir" (o));\
52 })
53
54#define __arch_base_putl(v,b,o) \
55 ({ \
56 unsigned int __r = (b); \
57 __asm__ __volatile__( \
58 "str %0, [%1, %2]" \
59 : \
60 : "r" (v), "r" (__r), "Ir" (o));\
61 })
62
63/*
64 * We use two different types of addressing - PC style addresses, and ARM 21 * We use two different types of addressing - PC style addresses, and ARM
65 * addresses. PC style accesses the PC hardware with the normal PC IO 22 * addresses. PC style accesses the PC hardware with the normal PC IO
66 * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ 23 * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
@@ -232,15 +189,13 @@ DECLARE_IO(int,l,"")
232 result; \ 189 result; \
233}) 190})
234 191
235#define __ioaddrc(port) __ioaddr(port)
236
237#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) 192#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
238#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) 193#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
239#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) 194#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
240#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) 195#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
241#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) 196#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
242#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) 197#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
243#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) 198
244/* the following macro is deprecated */ 199/* the following macro is deprecated */
245#define ioaddr(port) ((unsigned long)__ioaddr((port))) 200#define ioaddr(port) ((unsigned long)__ioaddr((port)))
246 201
diff --git a/arch/arm/mach-rpc/include/mach/irqs.h b/arch/arm/mach-rpc/include/mach/irqs.h
index 4ce6ca97f669..3d2037496e38 100644
--- a/arch/arm/mach-rpc/include/mach/irqs.h
+++ b/arch/arm/mach-rpc/include/mach/irqs.h
@@ -44,3 +44,4 @@
44 44
45#define IRQ_TIMER IRQ_TIMER0 45#define IRQ_TIMER IRQ_TIMER0
46 46
47#define NR_IRQS 128
diff --git a/arch/arm/mach-rpc/include/mach/dma.h b/arch/arm/mach-rpc/include/mach/isa-dma.h
index 360b56f8f29f..bad720548587 100644
--- a/arch/arm/mach-rpc/include/mach/dma.h
+++ b/arch/arm/mach-rpc/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-rpc/include/mach/dma.h 2 * arch/arm/mach-rpc/include/mach/isa-dma.h
3 * 3 *
4 * Copyright (C) 1997 Russell King 4 * Copyright (C) 1997 Russell King
5 * 5 *
@@ -10,12 +10,6 @@
10#ifndef __ASM_ARCH_DMA_H 10#ifndef __ASM_ARCH_DMA_H
11#define __ASM_ARCH_DMA_H 11#define __ASM_ARCH_DMA_H
12 12
13/*
14 * This is the maximum DMA address that can be DMAd to.
15 * There should not be more than (0xd0000000 - 0xc0000000)
16 * bytes of RAM.
17 */
18#define MAX_DMA_ADDRESS 0xd0000000
19#define MAX_DMA_CHANNELS 8 13#define MAX_DMA_CHANNELS 8
20 14
21#define DMA_0 0 15#define DMA_0 0
diff --git a/arch/arm/mach-rpc/include/mach/memory.h b/arch/arm/mach-rpc/include/mach/memory.h
index 9bf7e43e2863..78191bf25192 100644
--- a/arch/arm/mach-rpc/include/mach/memory.h
+++ b/arch/arm/mach-rpc/include/mach/memory.h
@@ -24,13 +24,6 @@
24#define PHYS_OFFSET UL(0x10000000) 24#define PHYS_OFFSET UL(0x10000000)
25 25
26/* 26/*
27 * These are exactly the same on the RiscPC as the
28 * physical memory view.
29 */
30#define __virt_to_bus(x) __virt_to_phys(x)
31#define __bus_to_virt(x) __phys_to_virt(x)
32
33/*
34 * Cache flushing area - ROM 27 * Cache flushing area - ROM
35 */ 28 */
36#define FLUSH_BASE_PHYS 0x00000000 29#define FLUSH_BASE_PHYS 0x00000000
diff --git a/arch/arm/mach-s3c2400/include/mach/memory.h b/arch/arm/mach-s3c2400/include/mach/memory.h
index 8f4878e4f591..cf5901ffd385 100644
--- a/arch/arm/mach-s3c2400/include/mach/memory.h
+++ b/arch/arm/mach-s3c2400/include/mach/memory.h
@@ -17,7 +17,4 @@
17 17
18#define PHYS_OFFSET UL(0x0C000000) 18#define PHYS_OFFSET UL(0x0C000000)
19 19
20#define __virt_to_bus(x) __virt_to_phys(x)
21#define __bus_to_virt(x) __phys_to_virt(x)
22
23#endif 20#endif
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 99fdc736698c..7315569fbfd7 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -7,6 +7,7 @@
7config CPU_S3C2410 7config CPU_S3C2410
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select CPU_ARM920T
10 select S3C2410_CLOCK 11 select S3C2410_CLOCK
11 select S3C2410_GPIO 12 select S3C2410_GPIO
12 select CPU_LLSERIAL_S3C2410 13 select CPU_LLSERIAL_S3C2410
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 7d914a470b6c..552b4c778fdc 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -17,7 +17,6 @@
17#include <linux/sysdev.h> 17#include <linux/sysdev.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19 19
20#include <asm/dma.h>
21#include <mach/dma.h> 20#include <mach/dma.h>
22 21
23#include <plat/cpu.h> 22#include <plat/cpu.h>
@@ -25,12 +24,12 @@
25 24
26#include <plat/regs-serial.h> 25#include <plat/regs-serial.h>
27#include <mach/regs-gpio.h> 26#include <mach/regs-gpio.h>
28#include <asm/plat-s3c/regs-ac97.h> 27#include <plat/regs-ac97.h>
29#include <mach/regs-mem.h> 28#include <mach/regs-mem.h>
30#include <mach/regs-lcd.h> 29#include <mach/regs-lcd.h>
31#include <mach/regs-sdi.h> 30#include <mach/regs-sdi.h>
32#include <asm/plat-s3c24xx/regs-iis.h> 31#include <asm/plat-s3c24xx/regs-iis.h>
33#include <asm/plat-s3c24xx/regs-spi.h> 32#include <plat/regs-spi.h>
34 33
35static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { 34static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
36 [DMACH_XD0] = { 35 [DMACH_XD0] = {
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h
index 891b53cd69b8..13358ce2128c 100644
--- a/arch/arm/mach-s3c2410/include/mach/dma.h
+++ b/arch/arm/mach-s3c2410/include/mach/dma.h
@@ -16,11 +16,6 @@
16#include <linux/sysdev.h> 16#include <linux/sysdev.h>
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18 18
19/*
20 * This is the maximum DMA address(physical address) that can be DMAd to.
21 *
22 */
23#define MAX_DMA_ADDRESS 0x40000000
24#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ 19#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */
25 20
26/* We use `virtual` dma channels to hide the fact we have only a limited 21/* We use `virtual` dma channels to hide the fact we have only a limited
@@ -254,7 +249,7 @@ typedef unsigned long dma_device_t;
254 * request a dma channel exclusivley 249 * request a dma channel exclusivley
255*/ 250*/
256 251
257extern int s3c2410_dma_request(dmach_t channel, 252extern int s3c2410_dma_request(unsigned int channel,
258 struct s3c2410_dma_client *, void *dev); 253 struct s3c2410_dma_client *, void *dev);
259 254
260 255
@@ -263,14 +258,14 @@ extern int s3c2410_dma_request(dmach_t channel,
263 * change the state of the dma channel 258 * change the state of the dma channel
264*/ 259*/
265 260
266extern int s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op); 261extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op);
267 262
268/* s3c2410_dma_setflags 263/* s3c2410_dma_setflags
269 * 264 *
270 * set the channel's flags to a given state 265 * set the channel's flags to a given state
271*/ 266*/
272 267
273extern int s3c2410_dma_setflags(dmach_t channel, 268extern int s3c2410_dma_setflags(unsigned int channel,
274 unsigned int flags); 269 unsigned int flags);
275 270
276/* s3c2410_dma_free 271/* s3c2410_dma_free
@@ -278,7 +273,7 @@ extern int s3c2410_dma_setflags(dmach_t channel,
278 * free the dma channel (will also abort any outstanding operations) 273 * free the dma channel (will also abort any outstanding operations)
279*/ 274*/
280 275
281extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *); 276extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *);
282 277
283/* s3c2410_dma_enqueue 278/* s3c2410_dma_enqueue
284 * 279 *
@@ -287,7 +282,7 @@ extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *);
287 * drained before the buffer is given to the DMA system. 282 * drained before the buffer is given to the DMA system.
288*/ 283*/
289 284
290extern int s3c2410_dma_enqueue(dmach_t channel, void *id, 285extern int s3c2410_dma_enqueue(unsigned int channel, void *id,
291 dma_addr_t data, int size); 286 dma_addr_t data, int size);
292 287
293/* s3c2410_dma_config 288/* s3c2410_dma_config
@@ -295,7 +290,7 @@ extern int s3c2410_dma_enqueue(dmach_t channel, void *id,
295 * configure the dma channel 290 * configure the dma channel
296*/ 291*/
297 292
298extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon); 293extern int s3c2410_dma_config(unsigned int channel, int xferunit, int dcon);
299 294
300/* s3c2410_dma_devconfig 295/* s3c2410_dma_devconfig
301 * 296 *
@@ -310,11 +305,11 @@ extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
310 * get the position that the dma transfer is currently at 305 * get the position that the dma transfer is currently at
311*/ 306*/
312 307
313extern int s3c2410_dma_getposition(dmach_t channel, 308extern int s3c2410_dma_getposition(unsigned int channel,
314 dma_addr_t *src, dma_addr_t *dest); 309 dma_addr_t *src, dma_addr_t *dest);
315 310
316extern int s3c2410_dma_set_opfn(dmach_t, s3c2410_dma_opfn_t rtn); 311extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn);
317extern int s3c2410_dma_set_buffdone_fn(dmach_t, s3c2410_dma_cbfn_t rtn); 312extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn);
318 313
319/* DMA Register definitions */ 314/* DMA Register definitions */
320 315
diff --git a/arch/arm/mach-s3c2410/include/mach/memory.h b/arch/arm/mach-s3c2410/include/mach/memory.h
index 93782628a786..6f1e5871ae4b 100644
--- a/arch/arm/mach-s3c2410/include/mach/memory.h
+++ b/arch/arm/mach-s3c2410/include/mach/memory.h
@@ -13,7 +13,4 @@
13 13
14#define PHYS_OFFSET UL(0x30000000) 14#define PHYS_OFFSET UL(0x30000000)
15 15
16#define __virt_to_bus(x) __virt_to_phys(x)
17#define __bus_to_virt(x) __phys_to_virt(x)
18
19#endif 16#endif
diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h
index 43535a0e7186..7613d0a384ba 100644
--- a/arch/arm/mach-s3c2410/include/mach/system-reset.h
+++ b/arch/arm/mach-s3c2410/include/mach/system-reset.h
@@ -13,7 +13,7 @@
13#include <mach/hardware.h> 13#include <mach/hardware.h>
14#include <linux/io.h> 14#include <linux/io.h>
15 15
16#include <asm/plat-s3c/regs-watchdog.h> 16#include <plat/regs-watchdog.h>
17#include <mach/regs-clock.h> 17#include <mach/regs-clock.h>
18 18
19#include <linux/clk.h> 19#include <linux/clk.h>
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 8db9c700e3c2..c04c24444e0d 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -44,8 +44,8 @@
44#include <mach/regs-mem.h> 44#include <mach/regs-mem.h>
45#include <mach/regs-lcd.h> 45#include <mach/regs-lcd.h>
46 46
47#include <asm/plat-s3c/nand.h> 47#include <plat/nand.h>
48#include <asm/plat-s3c/iic.h> 48#include <plat/iic.h>
49#include <mach/fb.h> 49#include <mach/fb.h>
50 50
51#include <linux/mtd/mtd.h> 51#include <linux/mtd/mtd.h>
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 98716d0108e9..32d550fcff4d 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -38,7 +38,7 @@
38#include <mach/h1940.h> 38#include <mach/h1940.h>
39#include <mach/h1940-latch.h> 39#include <mach/h1940-latch.h>
40#include <mach/fb.h> 40#include <mach/fb.h>
41#include <asm/plat-s3c24xx/udc.h> 41#include <plat/udc.h>
42 42
43#include <plat/clock.h> 43#include <plat/clock.h>
44#include <plat/devs.h> 44#include <plat/devs.h>
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 82505517846c..7a7c45d28fe7 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -40,14 +40,14 @@
40#include <asm/mach/irq.h> 40#include <asm/mach/irq.h>
41#include <asm/mach/map.h> 41#include <asm/mach/map.h>
42 42
43#include <asm/plat-s3c/iic.h> 43#include <plat/iic.h>
44#include <plat/regs-serial.h> 44#include <plat/regs-serial.h>
45 45
46#include <plat/clock.h> 46#include <plat/clock.h>
47#include <plat/cpu.h> 47#include <plat/cpu.h>
48#include <plat/devs.h> 48#include <plat/devs.h>
49#include <plat/s3c2410.h> 49#include <plat/s3c2410.h>
50#include <asm/plat-s3c24xx/udc.h> 50#include <plat/udc.h>
51 51
52static struct map_desc n30_iodesc[] __initdata = { 52static struct map_desc n30_iodesc[] __initdata = {
53 /* nothing here yet */ 53 /* nothing here yet */
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 661807e14e8a..ef868472f6a4 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -50,8 +50,8 @@
50#include <mach/leds-gpio.h> 50#include <mach/leds-gpio.h>
51#include <plat/regs-serial.h> 51#include <plat/regs-serial.h>
52#include <mach/fb.h> 52#include <mach/fb.h>
53#include <asm/plat-s3c/nand.h> 53#include <plat/nand.h>
54#include <asm/plat-s3c24xx/udc.h> 54#include <plat/udc.h>
55#include <mach/spi.h> 55#include <mach/spi.h>
56#include <mach/spi-gpio.h> 56#include <mach/spi-gpio.h>
57 57
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index c59a9d2ee9a6..ca99564ae4b5 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -7,6 +7,7 @@
7config CPU_S3C2412 7config CPU_S3C2412
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select CPU_ARM926T
10 select CPU_LLSERIAL_S3C2440 11 select CPU_LLSERIAL_S3C2440
11 select S3C2412_PM if PM 12 select S3C2412_PM if PM
12 select S3C2412_DMA if S3C2410_DMA 13 select S3C2412_DMA if S3C2410_DMA
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index ba0591e71f32..919856c9433f 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -18,7 +18,6 @@
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include <asm/dma.h>
22#include <mach/dma.h> 21#include <mach/dma.h>
23 22
24#include <plat/dma.h> 23#include <plat/dma.h>
@@ -26,13 +25,13 @@
26 25
27#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
28#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
29#include <asm/plat-s3c/regs-ac97.h> 28#include <plat/regs-ac97.h>
30#include <mach/regs-mem.h> 29#include <mach/regs-mem.h>
31#include <mach/regs-lcd.h> 30#include <mach/regs-lcd.h>
32#include <mach/regs-sdi.h> 31#include <mach/regs-sdi.h>
33#include <asm/plat-s3c24xx/regs-s3c2412-iis.h> 32#include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
34#include <asm/plat-s3c24xx/regs-iis.h> 33#include <asm/plat-s3c24xx/regs-iis.h>
35#include <asm/plat-s3c24xx/regs-spi.h> 34#include <plat/regs-spi.h>
36 35
37#define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID } 36#define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
38 37
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index b08f18c8c47a..25ff1ec9f8ad 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -31,8 +31,8 @@
31#include <asm/mach/irq.h> 31#include <asm/mach/irq.h>
32 32
33#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
34#include <asm/plat-s3c/nand.h> 34#include <plat/nand.h>
35#include <asm/plat-s3c/iic.h> 35#include <plat/iic.h>
36 36
37#include <mach/regs-power.h> 37#include <mach/regs-power.h>
38#include <mach/regs-gpio.h> 38#include <mach/regs-gpio.h>
@@ -52,7 +52,7 @@
52#include <plat/devs.h> 52#include <plat/devs.h>
53#include <plat/cpu.h> 53#include <plat/cpu.h>
54#include <plat/pm.h> 54#include <plat/pm.h>
55#include <asm/plat-s3c24xx/udc.h> 55#include <plat/udc.h>
56 56
57static struct map_desc jive_iodesc[] __initdata = { 57static struct map_desc jive_iodesc[] __initdata = {
58}; 58};
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index c719b5a740a9..8fd17b8d5679 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -37,7 +37,7 @@
37#include <mach/regs-lcd.h> 37#include <mach/regs-lcd.h>
38 38
39#include <mach/idle.h> 39#include <mach/idle.h>
40#include <asm/plat-s3c24xx/udc.h> 40#include <plat/udc.h>
41#include <mach/fb.h> 41#include <mach/fb.h>
42 42
43#include <plat/s3c2410.h> 43#include <plat/s3c2410.h>
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index 4cfa19ad9be0..da32a6cb17ae 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -39,7 +39,7 @@
39#include <mach/idle.h> 39#include <mach/idle.h>
40#include <mach/fb.h> 40#include <mach/fb.h>
41 41
42#include <asm/plat-s3c/nand.h> 42#include <plat/nand.h>
43 43
44#include <plat/s3c2410.h> 44#include <plat/s3c2410.h>
45#include <plat/s3c2412.h> 45#include <plat/s3c2412.h>
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 313759c3da69..a086818e117e 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -39,7 +39,7 @@
39#include <mach/regs-gpio.h> 39#include <mach/regs-gpio.h>
40#include <mach/regs-gpioj.h> 40#include <mach/regs-gpioj.h>
41#include <mach/regs-dsc.h> 41#include <mach/regs-dsc.h>
42#include <asm/plat-s3c24xx/regs-spi.h> 42#include <plat/regs-spi.h>
43#include <mach/regs-s3c2412.h> 43#include <mach/regs-s3c2412.h>
44 44
45#include <plat/s3c2412.h> 45#include <plat/s3c2412.h>
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 25de042ab996..0429d255b0d8 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -7,6 +7,7 @@
7config CPU_S3C2440 7config CPU_S3C2440
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select CPU_ARM920T
10 select S3C2410_CLOCK 11 select S3C2410_CLOCK
11 select S3C2410_PM if PM 12 select S3C2410_PM if PM
12 select S3C2410_GPIO 13 select S3C2410_GPIO
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index 32303f6a8321..5b5ee0b8f4e0 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -17,7 +17,6 @@
17#include <linux/sysdev.h> 17#include <linux/sysdev.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19 19
20#include <asm/dma.h>
21#include <mach/dma.h> 20#include <mach/dma.h>
22 21
23#include <plat/dma.h> 22#include <plat/dma.h>
@@ -25,12 +24,12 @@
25 24
26#include <plat/regs-serial.h> 25#include <plat/regs-serial.h>
27#include <mach/regs-gpio.h> 26#include <mach/regs-gpio.h>
28#include <asm/plat-s3c/regs-ac97.h> 27#include <plat/regs-ac97.h>
29#include <mach/regs-mem.h> 28#include <mach/regs-mem.h>
30#include <mach/regs-lcd.h> 29#include <mach/regs-lcd.h>
31#include <mach/regs-sdi.h> 30#include <mach/regs-sdi.h>
32#include <asm/plat-s3c24xx/regs-iis.h> 31#include <asm/plat-s3c24xx/regs-iis.h>
33#include <asm/plat-s3c24xx/regs-spi.h> 32#include <plat/regs-spi.h>
34 33
35static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { 34static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
36 [DMACH_XD0] = { 35 [DMACH_XD0] = {
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index e2beca470484..334379bdfc6e 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -39,7 +39,7 @@
39#include <mach/regs-gpio.h> 39#include <mach/regs-gpio.h>
40#include <mach/regs-mem.h> 40#include <mach/regs-mem.h>
41#include <mach/regs-lcd.h> 41#include <mach/regs-lcd.h>
42#include <asm/plat-s3c/nand.h> 42#include <plat/nand.h>
43 43
44#include <linux/mtd/mtd.h> 44#include <linux/mtd/mtd.h>
45#include <linux/mtd/nand.h> 45#include <linux/mtd/nand.h>
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index 66876c6f2f1c..07b42a0207d1 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -35,7 +35,7 @@
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36#include <mach/regs-mem.h> 36#include <mach/regs-mem.h>
37#include <mach/regs-lcd.h> 37#include <mach/regs-lcd.h>
38#include <asm/plat-s3c/nand.h> 38#include <plat/nand.h>
39 39
40#include <linux/mtd/mtd.h> 40#include <linux/mtd/mtd.h>
41#include <linux/mtd/nand.h> 41#include <linux/mtd/nand.h>
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 2361d606abc5..884a3c7ae75f 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -37,7 +37,7 @@
37#include <mach/regs-gpio.h> 37#include <mach/regs-gpio.h>
38#include <mach/regs-mem.h> 38#include <mach/regs-mem.h>
39#include <mach/regs-lcd.h> 39#include <mach/regs-lcd.h>
40#include <asm/plat-s3c/nand.h> 40#include <plat/nand.h>
41 41
42#include <linux/mtd/mtd.h> 42#include <linux/mtd/mtd.h>
43#include <linux/mtd/nand.h> 43#include <linux/mtd/nand.h>
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 4d14c7cff892..fbd081de592f 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -42,7 +42,7 @@
42#include <mach/regs-lcd.h> 42#include <mach/regs-lcd.h>
43 43
44#include <mach/h1940.h> 44#include <mach/h1940.h>
45#include <asm/plat-s3c/nand.h> 45#include <plat/nand.h>
46#include <mach/fb.h> 46#include <mach/fb.h>
47 47
48#include <plat/clock.h> 48#include <plat/clock.h>
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
index 26d131a77074..b289d198020e 100644
--- a/arch/arm/mach-s3c2442/Kconfig
+++ b/arch/arm/mach-s3c2442/Kconfig
@@ -7,6 +7,7 @@
7config CPU_S3C2442 7config CPU_S3C2442
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select CPU_ARM920T
10 select S3C2410_CLOCK 11 select S3C2410_CLOCK
11 select S3C2410_GPIO 12 select S3C2410_GPIO
12 select S3C2410_PM if PM 13 select S3C2410_PM if PM
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index f73ccb25ff94..2a58a4d5aa5a 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -18,7 +18,6 @@
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include <asm/dma.h>
22#include <mach/dma.h> 21#include <mach/dma.h>
23 22
24#include <plat/dma.h> 23#include <plat/dma.h>
@@ -26,12 +25,12 @@
26 25
27#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
28#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
29#include <asm/plat-s3c/regs-ac97.h> 28#include <plat/regs-ac97.h>
30#include <mach/regs-mem.h> 29#include <mach/regs-mem.h>
31#include <mach/regs-lcd.h> 30#include <mach/regs-lcd.h>
32#include <mach/regs-sdi.h> 31#include <mach/regs-sdi.h>
33#include <asm/plat-s3c24xx/regs-iis.h> 32#include <asm/plat-s3c24xx/regs-iis.h>
34#include <asm/plat-s3c24xx/regs-spi.h> 33#include <plat/regs-spi.h>
35 34
36#define MAP(x) { \ 35#define MAP(x) { \
37 [0] = (x) | DMA_CH_VALID, \ 36 [0] = (x) | DMA_CH_VALID, \
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index 43c30f84abf2..dab3c6347a8f 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -3,6 +3,7 @@
3 */ 3 */
4#include <linux/module.h> 4#include <linux/module.h>
5#include <linux/kernel.h> 5#include <linux/kernel.h>
6#include <linux/device.h>
6#include <linux/list.h> 7#include <linux/list.h>
7#include <linux/errno.h> 8#include <linux/errno.h>
8#include <linux/err.h> 9#include <linux/err.h>
@@ -14,36 +15,39 @@
14#include <mach/hardware.h> 15#include <mach/hardware.h>
15 16
16/* 17/*
17 * Very simple clock implementation - we only have one clock to 18 * Very simple clock implementation - we only have one clock to deal with.
18 * deal with at the moment, so we only match using the "name".
19 */ 19 */
20struct clk { 20struct clk {
21 struct list_head node;
22 unsigned long rate;
23 const char *name;
24 unsigned int enabled; 21 unsigned int enabled;
25 void (*enable)(void);
26 void (*disable)(void);
27}; 22};
28 23
29static LIST_HEAD(clocks); 24static void clk_gpio27_enable(void)
30static DEFINE_MUTEX(clocks_mutex); 25{
26 /*
27 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
28 * (SA-1110 Developer's Manual, section 9.1.2.1)
29 */
30 GAFR |= GPIO_32_768kHz;
31 GPDR |= GPIO_32_768kHz;
32 TUCR = TUCR_3_6864MHz;
33}
34
35static void clk_gpio27_disable(void)
36{
37 TUCR = 0;
38 GPDR &= ~GPIO_32_768kHz;
39 GAFR &= ~GPIO_32_768kHz;
40}
41
42static struct clk clk_gpio27;
43
31static DEFINE_SPINLOCK(clocks_lock); 44static DEFINE_SPINLOCK(clocks_lock);
32 45
33struct clk *clk_get(struct device *dev, const char *id) 46struct clk *clk_get(struct device *dev, const char *id)
34{ 47{
35 struct clk *p, *clk = ERR_PTR(-ENOENT); 48 const char *devname = dev_name(dev);
36
37 mutex_lock(&clocks_mutex);
38 list_for_each_entry(p, &clocks, node) {
39 if (strcmp(id, p->name) == 0) {
40 clk = p;
41 break;
42 }
43 }
44 mutex_unlock(&clocks_mutex);
45 49
46 return clk; 50 return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
47} 51}
48EXPORT_SYMBOL(clk_get); 52EXPORT_SYMBOL(clk_get);
49 53
@@ -58,7 +62,7 @@ int clk_enable(struct clk *clk)
58 62
59 spin_lock_irqsave(&clocks_lock, flags); 63 spin_lock_irqsave(&clocks_lock, flags);
60 if (clk->enabled++ == 0) 64 if (clk->enabled++ == 0)
61 clk->enable(); 65 clk_gpio27_enable();
62 spin_unlock_irqrestore(&clocks_lock, flags); 66 spin_unlock_irqrestore(&clocks_lock, flags);
63 return 0; 67 return 0;
64} 68}
@@ -72,63 +76,13 @@ void clk_disable(struct clk *clk)
72 76
73 spin_lock_irqsave(&clocks_lock, flags); 77 spin_lock_irqsave(&clocks_lock, flags);
74 if (--clk->enabled == 0) 78 if (--clk->enabled == 0)
75 clk->disable(); 79 clk_gpio27_disable();
76 spin_unlock_irqrestore(&clocks_lock, flags); 80 spin_unlock_irqrestore(&clocks_lock, flags);
77} 81}
78EXPORT_SYMBOL(clk_disable); 82EXPORT_SYMBOL(clk_disable);
79 83
80unsigned long clk_get_rate(struct clk *clk) 84unsigned long clk_get_rate(struct clk *clk)
81{ 85{
82 return clk->rate; 86 return 3686400;
83} 87}
84EXPORT_SYMBOL(clk_get_rate); 88EXPORT_SYMBOL(clk_get_rate);
85
86
87static void clk_gpio27_enable(void)
88{
89 /*
90 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
91 * (SA-1110 Developer's Manual, section 9.1.2.1)
92 */
93 GAFR |= GPIO_32_768kHz;
94 GPDR |= GPIO_32_768kHz;
95 TUCR = TUCR_3_6864MHz;
96}
97
98static void clk_gpio27_disable(void)
99{
100 TUCR = 0;
101 GPDR &= ~GPIO_32_768kHz;
102 GAFR &= ~GPIO_32_768kHz;
103}
104
105static struct clk clk_gpio27 = {
106 .name = "SA1111_CLK",
107 .rate = 3686400,
108 .enable = clk_gpio27_enable,
109 .disable = clk_gpio27_disable,
110};
111
112int clk_register(struct clk *clk)
113{
114 mutex_lock(&clocks_mutex);
115 list_add(&clk->node, &clocks);
116 mutex_unlock(&clocks_mutex);
117 return 0;
118}
119EXPORT_SYMBOL(clk_register);
120
121void clk_unregister(struct clk *clk)
122{
123 mutex_lock(&clocks_mutex);
124 list_del(&clk->node);
125 mutex_unlock(&clocks_mutex);
126}
127EXPORT_SYMBOL(clk_unregister);
128
129static int __init clk_init(void)
130{
131 clk_register(&clk_gpio27);
132 return 0;
133}
134arch_initcall(clk_init);
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index fe289997cfaf..2052eb88c961 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -68,23 +68,22 @@ struct platform_device colliescoop_device = {
68}; 68};
69 69
70static struct scoop_pcmcia_dev collie_pcmcia_scoop[] = { 70static struct scoop_pcmcia_dev collie_pcmcia_scoop[] = {
71{ 71 {
72 .dev = &colliescoop_device.dev, 72 .dev = &colliescoop_device.dev,
73 .irq = COLLIE_IRQ_GPIO_CF_IRQ, 73 .irq = COLLIE_IRQ_GPIO_CF_IRQ,
74 .cd_irq = COLLIE_IRQ_GPIO_CF_CD, 74 .cd_irq = COLLIE_IRQ_GPIO_CF_CD,
75 .cd_irq_str = "PCMCIA0 CD", 75 .cd_irq_str = "PCMCIA0 CD",
76}, 76 },
77}; 77};
78 78
79static struct scoop_pcmcia_config collie_pcmcia_config = { 79static struct scoop_pcmcia_config collie_pcmcia_config = {
80 .devs = &collie_pcmcia_scoop[0], 80 .devs = &collie_pcmcia_scoop[0],
81 .num_devs = 1, 81 .num_devs = 1,
82}; 82};
83 83
84
85static struct mcp_plat_data collie_mcp_data = { 84static struct mcp_plat_data collie_mcp_data = {
86 .mccr0 = MCCR0_ADM | MCCR0_ExtClk, 85 .mccr0 = MCCR0_ADM | MCCR0_ExtClk,
87 .sclk_rate = 9216000, 86 .sclk_rate = 9216000,
88}; 87};
89 88
90#ifdef CONFIG_SHARP_LOCOMO 89#ifdef CONFIG_SHARP_LOCOMO
@@ -95,14 +94,14 @@ struct platform_device collie_locomo_device;
95 94
96static void collie_uart_set_mctrl(struct uart_port *port, u_int mctrl) 95static void collie_uart_set_mctrl(struct uart_port *port, u_int mctrl)
97{ 96{
98 if (mctrl & TIOCM_RTS) 97 if (mctrl & TIOCM_RTS)
99 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 0); 98 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 0);
100 else 99 else
101 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 1); 100 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 1);
102 101
103 if (mctrl & TIOCM_DTR) 102 if (mctrl & TIOCM_DTR)
104 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 0); 103 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 0);
105 else 104 else
106 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 1); 105 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 1);
107} 106}
108 107
diff --git a/arch/arm/mach-sa1100/collie_pm.c b/arch/arm/mach-sa1100/collie_pm.c
index b1161fc80602..b39307f26b52 100644
--- a/arch/arm/mach-sa1100/collie_pm.c
+++ b/arch/arm/mach-sa1100/collie_pm.c
@@ -26,7 +26,7 @@
26#include <asm/irq.h> 26#include <asm/irq.h>
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <asm/hardware/scoop.h> 28#include <asm/hardware/scoop.h>
29#include <asm/dma.h> 29#include <mach/dma.h>
30#include <mach/collie.h> 30#include <mach/collie.h>
31#include <asm/mach/sharpsl_param.h> 31#include <asm/mach/sharpsl_param.h>
32#include <asm/hardware/sharpsl_pm.h> 32#include <asm/hardware/sharpsl_pm.h>
@@ -263,24 +263,24 @@ static int __init collie_pm_ucb_add(struct ucb1x00_dev *pdev)
263} 263}
264 264
265static struct ucb1x00_driver collie_pm_ucb_driver = { 265static struct ucb1x00_driver collie_pm_ucb_driver = {
266 .add = collie_pm_ucb_add, 266 .add = collie_pm_ucb_add,
267}; 267};
268 268
269static struct platform_device *collie_pm_device; 269static struct platform_device *collie_pm_device;
270 270
271static int __init collie_pm_init(void) 271static int __init collie_pm_init(void)
272{ 272{
273 int ret; 273 int ret;
274 274
275 collie_pm_device = platform_device_alloc("sharpsl-pm", -1); 275 collie_pm_device = platform_device_alloc("sharpsl-pm", -1);
276 if (!collie_pm_device) 276 if (!collie_pm_device)
277 return -ENOMEM; 277 return -ENOMEM;
278 278
279 collie_pm_device->dev.platform_data = &collie_pm_machinfo; 279 collie_pm_device->dev.platform_data = &collie_pm_machinfo;
280 ret = platform_device_add(collie_pm_device); 280 ret = platform_device_add(collie_pm_device);
281 281
282 if (ret) 282 if (ret)
283 platform_device_put(collie_pm_device); 283 platform_device_put(collie_pm_device);
284 284
285 if (!ret) 285 if (!ret)
286 ret = ucb1x00_register_driver(&collie_pm_ucb_driver); 286 ret = ucb1x00_register_driver(&collie_pm_ucb_driver);
@@ -291,7 +291,7 @@ static int __init collie_pm_init(void)
291static void __exit collie_pm_exit(void) 291static void __exit collie_pm_exit(void)
292{ 292{
293 ucb1x00_unregister_driver(&collie_pm_ucb_driver); 293 ucb1x00_unregister_driver(&collie_pm_ucb_driver);
294 platform_device_unregister(collie_pm_device); 294 platform_device_unregister(collie_pm_device);
295} 295}
296 296
297module_init(collie_pm_init); 297module_init(collie_pm_init);
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c
index 244d5956312c..ef817876a5d6 100644
--- a/arch/arm/mach-sa1100/cpu-sa1100.c
+++ b/arch/arm/mach-sa1100/cpu-sa1100.c
@@ -3,17 +3,17 @@
3 * 3 *
4 * Copyright (C) 2000 2001, The Delft University of Technology 4 * Copyright (C) 2000 2001, The Delft University of Technology
5 * 5 *
6 * Authors: 6 * Authors:
7 * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version 7 * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
8 * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl): 8 * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
9 * - major rewrite for linux-2.3.99 9 * - major rewrite for linux-2.3.99
10 * - rewritten for the more generic power management scheme in 10 * - rewritten for the more generic power management scheme in
11 * linux-2.4.5-rmk1 11 * linux-2.4.5-rmk1
12 * 12 *
13 * This software has been developed while working on the LART 13 * This software has been developed while working on the LART
14 * computing board (http://www.lartmaker.nl/), which is 14 * computing board (http://www.lartmaker.nl/), which is
15 * sponsored by the Mobile Multi-media Communications 15 * sponsored by the Mobile Multi-media Communications
16 * (http://www.mmc.tudelft.nl/) and Ubiquitous Communications 16 * (http://www.mmc.tudelft.nl/) and Ubiquitous Communications
17 * (http://www.ubicom.tudelft.nl/) projects. 17 * (http://www.ubicom.tudelft.nl/) projects.
18 * 18 *
19 * The authors can be reached at: 19 * The authors can be reached at:
@@ -36,7 +36,7 @@
36 * but WITHOUT ANY WARRANTY; without even the implied warranty of 36 * but WITHOUT ANY WARRANTY; without even the implied warranty of
37 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 37 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
38 * GNU General Public License for more details. 38 * GNU General Public License for more details.
39 * 39 *
40 * You should have received a copy of the GNU General Public License 40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software 41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 42 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -44,7 +44,7 @@
44 * 44 *
45 * Theory of operations 45 * Theory of operations
46 * ==================== 46 * ====================
47 * 47 *
48 * Clock scaling can be used to lower the power consumption of the CPU 48 * Clock scaling can be used to lower the power consumption of the CPU
49 * core. This will give you a somewhat longer running time. 49 * core. This will give you a somewhat longer running time.
50 * 50 *
@@ -58,11 +58,11 @@
58 * MDCNFG 0xA0000000 DRAM config 58 * MDCNFG 0xA0000000 DRAM config
59 * MDCAS0 0xA0000004 Access waveform 59 * MDCAS0 0xA0000004 Access waveform
60 * MDCAS1 0xA0000008 Access waveform 60 * MDCAS1 0xA0000008 Access waveform
61 * MDCAS2 0xA000000C Access waveform 61 * MDCAS2 0xA000000C Access waveform
62 * 62 *
63 * Care must be taken to change the DRAM parameters the correct way, 63 * Care must be taken to change the DRAM parameters the correct way,
64 * because otherwise the DRAM becomes unusable and the kernel will 64 * because otherwise the DRAM becomes unusable and the kernel will
65 * crash. 65 * crash.
66 * 66 *
67 * The simple solution to avoid a kernel crash is to put the actual 67 * The simple solution to avoid a kernel crash is to put the actual
68 * clock change in ROM and jump to that code from the kernel. The main 68 * clock change in ROM and jump to that code from the kernel. The main
@@ -75,7 +75,7 @@
75 * as long as all re-configuration steps yield a valid DRAM 75 * as long as all re-configuration steps yield a valid DRAM
76 * configuration. The advantages are clear: it will run on all SA-1100 76 * configuration. The advantages are clear: it will run on all SA-1100
77 * platforms, and the code is very simple. 77 * platforms, and the code is very simple.
78 * 78 *
79 * If you really want to understand what is going on in 79 * If you really want to understand what is going on in
80 * sa1100_update_dram_timings(), you'll have to read sections 8.2, 80 * sa1100_update_dram_timings(), you'll have to read sections 8.2,
81 * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor 81 * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
@@ -97,7 +97,7 @@
97typedef struct { 97typedef struct {
98 int speed; 98 int speed;
99 u32 mdcnfg; 99 u32 mdcnfg;
100 u32 mdcas0; 100 u32 mdcas0;
101 u32 mdcas1; 101 u32 mdcas1;
102 u32 mdcas2; 102 u32 mdcas2;
103} sa1100_dram_regs_t; 103} sa1100_dram_regs_t;
@@ -147,7 +147,7 @@ static void sa1100_update_dram_timings(int current_speed, int new_speed)
147 /* No risk, no fun: run with interrupts on! */ 147 /* No risk, no fun: run with interrupts on! */
148 if (new_speed > current_speed) { 148 if (new_speed > current_speed) {
149 /* We're going FASTER, so first relax the memory 149 /* We're going FASTER, so first relax the memory
150 * timings before changing the core frequency 150 * timings before changing the core frequency
151 */ 151 */
152 152
153 /* Half the memory access clock */ 153 /* Half the memory access clock */
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c
index 3e4fb214eada..63b32b68b296 100644
--- a/arch/arm/mach-sa1100/cpu-sa1110.c
+++ b/arch/arm/mach-sa1100/cpu-sa1110.c
@@ -81,14 +81,14 @@ static struct sdram_params sdram_tbl[] __initdata = {
81 .twr = 9, 81 .twr = 9,
82 .refresh = 64000, 82 .refresh = 64000,
83 .cas_latency = 3, 83 .cas_latency = 3,
84 }, { /* Samsung K4S281632B-1H */ 84 }, { /* Samsung K4S281632B-1H */
85 .name = "K4S281632B-1H", 85 .name = "K4S281632B-1H",
86 .rows = 12, 86 .rows = 12,
87 .tck = 10, 87 .tck = 10,
88 .trp = 20, 88 .trp = 20,
89 .twr = 10, 89 .twr = 10,
90 .refresh = 64000, 90 .refresh = 64000,
91 .cas_latency = 3, 91 .cas_latency = 3,
92 }, { /* Samsung KM416S4030CT */ 92 }, { /* Samsung KM416S4030CT */
93 .name = "KM416S4030CT", 93 .name = "KM416S4030CT",
94 .rows = 13, 94 .rows = 13,
@@ -220,7 +220,7 @@ sdram_update_refresh(u_int cpu_khz, struct sdram_params *sdram)
220} 220}
221 221
222/* 222/*
223 * Ok, set the CPU frequency. 223 * Ok, set the CPU frequency.
224 */ 224 */
225static int sa1110_target(struct cpufreq_policy *policy, 225static int sa1110_target(struct cpufreq_policy *policy,
226 unsigned int target_freq, 226 unsigned int target_freq,
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c
index f990a3e85846..95f9c5a6d6d5 100644
--- a/arch/arm/mach-sa1100/dma.c
+++ b/arch/arm/mach-sa1100/dma.c
@@ -19,7 +19,7 @@
19#include <asm/system.h> 19#include <asm/system.h>
20#include <asm/irq.h> 20#include <asm/irq.h>
21#include <mach/hardware.h> 21#include <mach/hardware.h>
22#include <asm/dma.h> 22#include <mach/dma.h>
23 23
24 24
25#undef DEBUG 25#undef DEBUG
@@ -113,10 +113,10 @@ int sa1100_request_dma (dma_device_t device, const char *device_id,
113 } 113 }
114 } 114 }
115 if (!err) { 115 if (!err) {
116 if (dma) 116 if (dma)
117 dma->device = device; 117 dma->device = device;
118 else 118 else
119 err = -ENOSR; 119 err = -ENOSR;
120 } 120 }
121 spin_unlock(&dma_list_lock); 121 spin_unlock(&dma_list_lock);
122 if (err) 122 if (err)
diff --git a/arch/arm/mach-sa1100/include/mach/h3600.h b/arch/arm/mach-sa1100/include/mach/h3600.h
index 3ca0ecf095e6..9cc47fddb335 100644
--- a/arch/arm/mach-sa1100/include/mach/h3600.h
+++ b/arch/arm/mach-sa1100/include/mach/h3600.h
@@ -32,14 +32,14 @@ typedef int __bitwise pm_request_t;
32#define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800()) 32#define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800())
33 33
34/* Physical memory regions corresponding to chip selects */ 34/* Physical memory regions corresponding to chip selects */
35#define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000) 35#define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000)
36#define H3600_BANK_2_PHYS SA1100_CS2_PHYS 36#define H3600_BANK_2_PHYS SA1100_CS2_PHYS
37#define H3600_BANK_4_PHYS SA1100_CS4_PHYS 37#define H3600_BANK_4_PHYS SA1100_CS4_PHYS
38 38
39/* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */ 39/* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */
40#define H3600_EGPIO_VIRT 0xf0000000 40#define H3600_EGPIO_VIRT 0xf0000000
41#define H3600_BANK_2_VIRT 0xf1000000 41#define H3600_BANK_2_VIRT 0xf1000000
42#define H3600_BANK_4_VIRT 0xf3800000 42#define H3600_BANK_4_VIRT 0xf3800000
43 43
44/* 44/*
45 Machine-independent GPIO definitions 45 Machine-independent GPIO definitions
diff --git a/arch/arm/mach-sa1100/include/mach/io.h b/arch/arm/mach-sa1100/include/mach/io.h
index 0c070a6149bc..d8b43f3dcd2d 100644
--- a/arch/arm/mach-sa1100/include/mach/io.h
+++ b/arch/arm/mach-sa1100/include/mach/io.h
@@ -16,11 +16,7 @@
16 * We don't actually have real ISA nor PCI buses, but there is so many 16 * We don't actually have real ISA nor PCI buses, but there is so many
17 * drivers out there that might just work if we fake them... 17 * drivers out there that might just work if we fake them...
18 */ 18 */
19static inline void __iomem *__io(unsigned long addr) 19#define __io(a) __typesafe_io(a)
20{ 20#define __mem_pci(a) (a)
21 return (void __iomem *)addr;
22}
23#define __io(a) __io(a)
24#define __mem_pci(a) (a)
25 21
26#endif 22#endif
diff --git a/arch/arm/mach-sa1100/include/mach/memory.h b/arch/arm/mach-sa1100/include/mach/memory.h
index 1c127b68581d..e9f8eed900f5 100644
--- a/arch/arm/mach-sa1100/include/mach/memory.h
+++ b/arch/arm/mach-sa1100/include/mach/memory.h
@@ -23,23 +23,12 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
23 sa1111_adjust_zones(node, size, holes) 23 sa1111_adjust_zones(node, size, holes)
24 24
25#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_1M - 1) 25#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_1M - 1)
26#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_1M)
26 27
27#endif 28#endif
28#endif 29#endif
29 30
30/* 31/*
31 * Virtual view <-> DMA view memory address translations
32 * virt_to_bus: Used to translate the virtual address to an
33 * address suitable to be passed to set_dma_addr
34 * bus_to_virt: Used to convert an address for DMA operations
35 * to an address that the kernel can use.
36 *
37 * On the SA1100, bus addresses are equivalent to physical addresses.
38 */
39#define __virt_to_bus(x) __virt_to_phys(x)
40#define __bus_to_virt(x) __phys_to_virt(x)
41
42/*
43 * Because of the wide memory address space between physical RAM banks on the 32 * Because of the wide memory address space between physical RAM banks on the
44 * SA1100, it's much convenient to use Linux's SparseMEM support to implement 33 * SA1100, it's much convenient to use Linux's SparseMEM support to implement
45 * our memory map representation. Assuming all memory nodes have equal access 34 * our memory map representation. Assuming all memory nodes have equal access
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index e45d3a1890bc..e1458bc1868e 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -122,12 +122,12 @@ static void __init pleb_map_io(void)
122 sa1100_map_io(); 122 sa1100_map_io();
123 123
124 sa1100_register_uart(0, 3); 124 sa1100_register_uart(0, 3);
125 sa1100_register_uart(1, 1); 125 sa1100_register_uart(1, 1);
126 126
127 GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); 127 GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
128 GPDR |= GPIO_UART_TXD; 128 GPDR |= GPIO_UART_TXD;
129 GPDR &= ~GPIO_UART_RXD; 129 GPDR &= ~GPIO_UART_RXD;
130 PPAR |= PPAR_UPR; 130 PPAR |= PPAR_UPR;
131 131
132 /* 132 /*
133 * Fix expansion memory timing for network card 133 * Fix expansion memory timing for network card
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 9ccdd09cf69f..ddd917d1083d 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -33,7 +33,7 @@ static struct mtd_partition shannon_partitions[] = {
33 .offset = MTDPART_OFS_APPEND, 33 .offset = MTDPART_OFS_APPEND,
34 .size = 0xe0000 34 .size = 0xe0000
35 }, 35 },
36 { 36 {
37 .name = "initrd", 37 .name = "initrd",
38 .offset = MTDPART_OFS_APPEND, 38 .offset = MTDPART_OFS_APPEND,
39 .size = MTDPART_SIZ_FULL 39 .size = MTDPART_SIZ_FULL
diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S
index 171441f96710..80f31bad707c 100644
--- a/arch/arm/mach-sa1100/sleep.S
+++ b/arch/arm/mach-sa1100/sleep.S
@@ -100,36 +100,36 @@ ENTRY(sa1100_cpu_suspend)
100 ldr r1, =MSC1 100 ldr r1, =MSC1
101 ldr r2, =MSC2 101 ldr r2, =MSC2
102 102
103 ldr r3, [r0] 103 ldr r3, [r0]
104 bic r3, r3, #FMsk(MSC_RT) 104 bic r3, r3, #FMsk(MSC_RT)
105 bic r3, r3, #FMsk(MSC_RT)<<16 105 bic r3, r3, #FMsk(MSC_RT)<<16
106 106
107 ldr r4, [r1] 107 ldr r4, [r1]
108 bic r4, r4, #FMsk(MSC_RT) 108 bic r4, r4, #FMsk(MSC_RT)
109 bic r4, r4, #FMsk(MSC_RT)<<16 109 bic r4, r4, #FMsk(MSC_RT)<<16
110 110
111 ldr r5, [r2] 111 ldr r5, [r2]
112 bic r5, r5, #FMsk(MSC_RT) 112 bic r5, r5, #FMsk(MSC_RT)
113 bic r5, r5, #FMsk(MSC_RT)<<16 113 bic r5, r5, #FMsk(MSC_RT)<<16
114 114
115 ldr r6, =MDREFR 115 ldr r6, =MDREFR
116 116
117 ldr r7, [r6] 117 ldr r7, [r6]
118 bic r7, r7, #0x0000FF00 118bic r7, r7, #0x0000FF00
119 bic r7, r7, #0x000000F0 119bic r7, r7, #0x000000F0
120 orr r8, r7, #MDREFR_SLFRSH 120orr r8, r7, #MDREFR_SLFRSH
121 121
122 ldr r9, =MDCNFG 122 ldr r9, =MDCNFG
123 ldr r10, [r9] 123 ldr r10, [r9]
124 bic r10, r10, #(MDCNFG_DE0+MDCNFG_DE1) 124 bic r10, r10, #(MDCNFG_DE0+MDCNFG_DE1)
125 bic r10, r10, #(MDCNFG_DE2+MDCNFG_DE3) 125 bic r10, r10, #(MDCNFG_DE2+MDCNFG_DE3)
126 126
127 bic r11, r8, #MDREFR_SLFRSH 127 bic r11, r8, #MDREFR_SLFRSH
128 bic r11, r11, #MDREFR_E1PIN 128 bic r11, r11, #MDREFR_E1PIN
129 129
130 ldr r12, =PMCR 130 ldr r12, =PMCR
131 131
132 mov r13, #PMCR_SF 132 mov r13, #PMCR_SF
133 133
134 b sa1110_sdram_controller_fix 134 b sa1110_sdram_controller_fix
135 135
@@ -188,10 +188,10 @@ ENTRY(sa1100_cpu_resume)
188 mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs 188 mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs
189 mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache 189 mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache
190 mcr p15, 0, r1, c9, c0, 0 @ invalidate RB 190 mcr p15, 0, r1, c9, c0, 0 @ invalidate RB
191 mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB 191 mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB
192 192
193 mcr p15, 0, r4, c3, c0, 0 @ domain ID 193 mcr p15, 0, r4, c3, c0, 0 @ domain ID
194 mcr p15, 0, r5, c2, c0, 0 @ translation table base addr 194 mcr p15, 0, r5, c2, c0, 0 @ translation table base addr
195 mcr p15, 0, r6, c13, c0, 0 @ PID 195 mcr p15, 0, r6, c13, c0, 0 @ PID
196 b resume_turn_on_mmu @ cache align execution 196 b resume_turn_on_mmu @ cache align execution
197 197
@@ -209,7 +209,7 @@ sleep_save_sp:
209 209
210 .text 210 .text
211resume_after_mmu: 211resume_after_mmu:
212 mcr p15, 0, r1, c15, c1, 2 @ enable clock switching 212 mcr p15, 0, r1, c15, c1, 2 @ enable clock switching
213 ldmfd sp!, {r4 - r12, pc} @ return to caller 213 ldmfd sp!, {r4 - r12, pc} @ return to caller
214 214
215 215
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 24c0a4bae850..8c5e727f3b75 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -2,8 +2,8 @@
2 * linux/arch/arm/mach-sa1100/time.c 2 * linux/arch/arm/mach-sa1100/time.c
3 * 3 *
4 * Copyright (C) 1998 Deborah Wallach. 4 * Copyright (C) 1998 Deborah Wallach.
5 * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com> 5 * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com>
6 * 6 *
7 * 2000/03/29 (C) Nicolas Pitre <nico@cam.org> 7 * 2000/03/29 (C) Nicolas Pitre <nico@cam.org>
8 * Rewritten: big cleanup, much simpler, better HZ accuracy. 8 * Rewritten: big cleanup, much simpler, better HZ accuracy.
9 * 9 *
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index a9400d984451..a23fd3d0163a 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -16,6 +16,8 @@
16#include <asm/leds.h> 16#include <asm/leds.h>
17#include <asm/param.h> 17#include <asm/param.h>
18 18
19#include <mach/hardware.h>
20
19#include <asm/mach/map.h> 21#include <asm/mach/map.h>
20#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
21#include <asm/mach/time.h> 23#include <asm/mach/time.h>
diff --git a/arch/arm/mach-shark/include/mach/hardware.h b/arch/arm/mach-shark/include/mach/hardware.h
index cb0ee2943c1a..01bf76099ce5 100644
--- a/arch/arm/mach-shark/include/mach/hardware.h
+++ b/arch/arm/mach-shark/include/mach/hardware.h
@@ -28,8 +28,6 @@
28#define ROMCARD_SIZE 0x08000000 28#define ROMCARD_SIZE 0x08000000
29#define ROMCARD_START 0x10000000 29#define ROMCARD_START 0x10000000
30 30
31#define PCIO_BASE 0xe0000000
32
33 31
34/* defines for the Framebuffer */ 32/* defines for the Framebuffer */
35#define FB_START 0x06000000 33#define FB_START 0x06000000
diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h
index 92475922c068..c5cee829fc87 100644
--- a/arch/arm/mach-shark/include/mach/io.h
+++ b/arch/arm/mach-shark/include/mach/io.h
@@ -11,46 +11,10 @@
11#ifndef __ASM_ARM_ARCH_IO_H 11#ifndef __ASM_ARM_ARCH_IO_H
12#define __ASM_ARM_ARCH_IO_H 12#define __ASM_ARM_ARCH_IO_H
13 13
14#include <mach/hardware.h> 14#define PCIO_BASE 0xe0000000
15#define IO_SPACE_LIMIT 0xffffffff
15 16
16#define IO_SPACE_LIMIT 0xffffffff 17#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
17 18#define __mem_pci(addr) (addr)
18/*
19 * We use two different types of addressing - PC style addresses, and ARM
20 * addresses. PC style accesses the PC hardware with the normal PC IO
21 * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
22 * and are translated to the start of IO.
23 */
24#define __PORT_PCIO(x) (!((x) & 0x80000000))
25
26#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
27
28
29static inline unsigned int __ioaddr (unsigned int port) \
30{ \
31 if (__PORT_PCIO(port)) \
32 return (unsigned int)(PCIO_BASE + (port)); \
33 else \
34 return (unsigned int)(IO_BASE + (port)); \
35}
36
37#define __mem_pci(addr) (addr)
38
39/*
40 * Translated address IO functions
41 *
42 * IO address has already been translated to a virtual address
43 */
44#define outb_t(v,p) \
45 (*(volatile unsigned char *)(p) = (v))
46
47#define inb_t(p) \
48 (*(volatile unsigned char *)(p))
49
50#define outl_t(v,p) \
51 (*(volatile unsigned long *)(p) = (v))
52
53#define inl_t(p) \
54 (*(volatile unsigned long *)(p))
55 19
56#endif 20#endif
diff --git a/arch/arm/mach-shark/include/mach/dma.h b/arch/arm/mach-shark/include/mach/isa-dma.h
index c0a29bd2a74f..864298ff3927 100644
--- a/arch/arm/mach-shark/include/mach/dma.h
+++ b/arch/arm/mach-shark/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-shark/include/mach/dma.h 2 * arch/arm/mach-shark/include/mach/isa-dma.h
3 * 3 *
4 * by Alexander Schulz 4 * by Alexander Schulz
5 */ 5 */
@@ -10,7 +10,6 @@
10 * The rest is not DMAable. See dev / .properties 10 * The rest is not DMAable. See dev / .properties
11 * in OpenFirmware. 11 * in OpenFirmware.
12 */ 12 */
13#define MAX_DMA_ADDRESS 0xC0400000
14#define MAX_DMA_CHANNELS 8 13#define MAX_DMA_CHANNELS 8
15#define DMA_ISA_CASCADE 4 14#define DMA_ISA_CASCADE 4
16 15
diff --git a/arch/arm/mach-shark/include/mach/memory.h b/arch/arm/mach-shark/include/mach/memory.h
index b7874ad9f9f6..c5ab038925d6 100644
--- a/arch/arm/mach-shark/include/mach/memory.h
+++ b/arch/arm/mach-shark/include/mach/memory.h
@@ -33,12 +33,10 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig
33 __arch_adjust_zones(node, size, holes) 33 __arch_adjust_zones(node, size, holes)
34 34
35#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_4M - 1) 35#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_4M - 1)
36#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_4M)
36 37
37#endif 38#endif
38 39
39#define __virt_to_bus(x) __virt_to_phys(x)
40#define __bus_to_virt(x) __phys_to_virt(x)
41
42/* 40/*
43 * Cache flushing area 41 * Cache flushing area
44 */ 42 */
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
index 95096afd5271..c781f30c8368 100644
--- a/arch/arm/mach-versatile/Kconfig
+++ b/arch/arm/mach-versatile/Kconfig
@@ -3,12 +3,14 @@ menu "Versatile platform type"
3 3
4config ARCH_VERSATILE_PB 4config ARCH_VERSATILE_PB
5 bool "Support Versatile/PB platform" 5 bool "Support Versatile/PB platform"
6 select CPU_ARM926T
6 default y 7 default y
7 help 8 help
8 Include support for the ARM(R) Versatile/PB platform. 9 Include support for the ARM(R) Versatile/PB platform.
9 10
10config MACH_VERSATILE_AB 11config MACH_VERSATILE_AB
11 bool "Support Versatile/AB platform" 12 bool "Support Versatile/AB platform"
13 select CPU_ARM926T
12 help 14 help
13 Include support for the ARM(R) Versatile/AP platform. 15 Include support for the ARM(R) Versatile/AP platform.
14 16
diff --git a/arch/arm/mach-versatile/clock.c b/arch/arm/mach-versatile/clock.c
index 58937f1fb38c..c50a44ea7ee6 100644
--- a/arch/arm/mach-versatile/clock.c
+++ b/arch/arm/mach-versatile/clock.c
@@ -10,6 +10,7 @@
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/device.h>
13#include <linux/list.h> 14#include <linux/list.h>
14#include <linux/errno.h> 15#include <linux/errno.h>
15#include <linux/err.h> 16#include <linux/err.h>
@@ -17,36 +18,11 @@
17#include <linux/clk.h> 18#include <linux/clk.h>
18#include <linux/mutex.h> 19#include <linux/mutex.h>
19 20
21#include <asm/clkdev.h>
20#include <asm/hardware/icst307.h> 22#include <asm/hardware/icst307.h>
21 23
22#include "clock.h" 24#include "clock.h"
23 25
24static LIST_HEAD(clocks);
25static DEFINE_MUTEX(clocks_mutex);
26
27struct clk *clk_get(struct device *dev, const char *id)
28{
29 struct clk *p, *clk = ERR_PTR(-ENOENT);
30
31 mutex_lock(&clocks_mutex);
32 list_for_each_entry(p, &clocks, node) {
33 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
34 clk = p;
35 break;
36 }
37 }
38 mutex_unlock(&clocks_mutex);
39
40 return clk;
41}
42EXPORT_SYMBOL(clk_get);
43
44void clk_put(struct clk *clk)
45{
46 module_put(clk->owner);
47}
48EXPORT_SYMBOL(clk_put);
49
50int clk_enable(struct clk *clk) 26int clk_enable(struct clk *clk)
51{ 27{
52 return 0; 28 return 0;
@@ -66,7 +42,9 @@ EXPORT_SYMBOL(clk_get_rate);
66 42
67long clk_round_rate(struct clk *clk, unsigned long rate) 43long clk_round_rate(struct clk *clk, unsigned long rate)
68{ 44{
69 return rate; 45 struct icst307_vco vco;
46 vco = icst307_khz_to_vco(clk->params, rate / 1000);
47 return icst307_khz(clk->params, vco) * 1000;
70} 48}
71EXPORT_SYMBOL(clk_round_rate); 49EXPORT_SYMBOL(clk_round_rate);
72 50
@@ -79,57 +57,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
79 57
80 vco = icst307_khz_to_vco(clk->params, rate / 1000); 58 vco = icst307_khz_to_vco(clk->params, rate / 1000);
81 clk->rate = icst307_khz(clk->params, vco) * 1000; 59 clk->rate = icst307_khz(clk->params, vco) * 1000;
82
83 printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
84 clk->name, vco.s, vco.r, vco.v);
85
86 clk->setvco(clk, vco); 60 clk->setvco(clk, vco);
87 ret = 0; 61 ret = 0;
88 } 62 }
89 return ret; 63 return ret;
90} 64}
91EXPORT_SYMBOL(clk_set_rate); 65EXPORT_SYMBOL(clk_set_rate);
92
93/*
94 * These are fixed clocks.
95 */
96static struct clk kmi_clk = {
97 .name = "KMIREFCLK",
98 .rate = 24000000,
99};
100
101static struct clk uart_clk = {
102 .name = "UARTCLK",
103 .rate = 24000000,
104};
105
106static struct clk mmci_clk = {
107 .name = "MCLK",
108 .rate = 24000000,
109};
110
111int clk_register(struct clk *clk)
112{
113 mutex_lock(&clocks_mutex);
114 list_add(&clk->node, &clocks);
115 mutex_unlock(&clocks_mutex);
116 return 0;
117}
118EXPORT_SYMBOL(clk_register);
119
120void clk_unregister(struct clk *clk)
121{
122 mutex_lock(&clocks_mutex);
123 list_del(&clk->node);
124 mutex_unlock(&clocks_mutex);
125}
126EXPORT_SYMBOL(clk_unregister);
127
128static int __init clk_init(void)
129{
130 clk_register(&kmi_clk);
131 clk_register(&uart_clk);
132 clk_register(&mmci_clk);
133 return 0;
134}
135arch_initcall(clk_init);
diff --git a/arch/arm/mach-versatile/clock.h b/arch/arm/mach-versatile/clock.h
index 8b0b61dd17e4..03468fdc3e58 100644
--- a/arch/arm/mach-versatile/clock.h
+++ b/arch/arm/mach-versatile/clock.h
@@ -12,14 +12,9 @@ struct module;
12struct icst307_params; 12struct icst307_params;
13 13
14struct clk { 14struct clk {
15 struct list_head node;
16 unsigned long rate; 15 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 const struct icst307_params *params; 16 const struct icst307_params *params;
17 u32 oscoff;
20 void *data; 18 void *data;
21 void (*setvco)(struct clk *, struct icst307_vco vco); 19 void (*setvco)(struct clk *, struct icst307_vco vco);
22}; 20};
23
24int clk_register(struct clk *clk);
25void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 565e0ba0d67e..df25aa138509 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -31,6 +31,7 @@
31#include <linux/cnt32_to_63.h> 31#include <linux/cnt32_to_63.h>
32#include <linux/io.h> 32#include <linux/io.h>
33 33
34#include <asm/clkdev.h>
34#include <asm/system.h> 35#include <asm/system.h>
35#include <mach/hardware.h> 36#include <mach/hardware.h>
36#include <asm/irq.h> 37#include <asm/irq.h>
@@ -373,22 +374,60 @@ static const struct icst307_params versatile_oscvco_params = {
373 374
374static void versatile_oscvco_set(struct clk *clk, struct icst307_vco vco) 375static void versatile_oscvco_set(struct clk *clk, struct icst307_vco vco)
375{ 376{
376 void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET; 377 void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
377 void __iomem *sys_osc = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET; 378 void __iomem *sys_lock = sys + VERSATILE_SYS_LOCK_OFFSET;
378 u32 val; 379 u32 val;
379 380
380 val = readl(sys_osc) & ~0x7ffff; 381 val = readl(sys + clk->oscoff) & ~0x7ffff;
381 val |= vco.v | (vco.r << 9) | (vco.s << 16); 382 val |= vco.v | (vco.r << 9) | (vco.s << 16);
382 383
383 writel(0xa05f, sys_lock); 384 writel(0xa05f, sys_lock);
384 writel(val, sys_osc); 385 writel(val, sys + clk->oscoff);
385 writel(0, sys_lock); 386 writel(0, sys_lock);
386} 387}
387 388
388static struct clk versatile_clcd_clk = { 389static struct clk osc4_clk = {
389 .name = "CLCDCLK",
390 .params = &versatile_oscvco_params, 390 .params = &versatile_oscvco_params,
391 .setvco = versatile_oscvco_set, 391 .oscoff = VERSATILE_SYS_OSCCLCD_OFFSET,
392 .setvco = versatile_oscvco_set,
393};
394
395/*
396 * These are fixed clocks.
397 */
398static struct clk ref24_clk = {
399 .rate = 24000000,
400};
401
402static struct clk_lookup lookups[] __initdata = {
403 { /* UART0 */
404 .dev_id = "dev:f1",
405 .clk = &ref24_clk,
406 }, { /* UART1 */
407 .dev_id = "dev:f2",
408 .clk = &ref24_clk,
409 }, { /* UART2 */
410 .dev_id = "dev:f3",
411 .clk = &ref24_clk,
412 }, { /* UART3 */
413 .dev_id = "fpga:09",
414 .clk = &ref24_clk,
415 }, { /* KMI0 */
416 .dev_id = "fpga:06",
417 .clk = &ref24_clk,
418 }, { /* KMI1 */
419 .dev_id = "fpga:07",
420 .clk = &ref24_clk,
421 }, { /* MMC0 */
422 .dev_id = "fpga:05",
423 .clk = &ref24_clk,
424 }, { /* MMC1 */
425 .dev_id = "fpga:0b",
426 .clk = &ref24_clk,
427 }, { /* CLCD */
428 .dev_id = "dev:20",
429 .clk = &osc4_clk,
430 }
392}; 431};
393 432
394/* 433/*
@@ -786,7 +825,8 @@ void __init versatile_init(void)
786{ 825{
787 int i; 826 int i;
788 827
789 clk_register(&versatile_clcd_clk); 828 for (i = 0; i < ARRAY_SIZE(lookups); i++)
829 clkdev_add(&lookups[i]);
790 830
791 platform_device_register(&versatile_flash_device); 831 platform_device_register(&versatile_flash_device);
792 platform_device_register(&versatile_i2c_device); 832 platform_device_register(&versatile_i2c_device);
diff --git a/arch/arm/mach-versatile/include/mach/clkdev.h b/arch/arm/mach-versatile/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-versatile/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif
diff --git a/arch/arm/mach-versatile/include/mach/dma.h b/arch/arm/mach-versatile/include/mach/dma.h
deleted file mode 100644
index 0aabf12c8834..000000000000
--- a/arch/arm/mach-versatile/include/mach/dma.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-versatile/include/mach/dma.h
3 *
4 * Copyright (C) 2003 ARM Limited.
5 * Copyright (C) 1997,1998 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h
index c0b9dd1d0257..f067c14c7182 100644
--- a/arch/arm/mach-versatile/include/mach/io.h
+++ b/arch/arm/mach-versatile/include/mach/io.h
@@ -22,11 +22,7 @@
22 22
23#define IO_SPACE_LIMIT 0xffffffff 23#define IO_SPACE_LIMIT 0xffffffff
24 24
25static inline void __iomem *__io(unsigned long addr) 25#define __io(a) __typesafe_io(a)
26{ 26#define __mem_pci(a) (a)
27 return (void __iomem *)addr;
28}
29#define __io(a) __io(a)
30#define __mem_pci(a) (a)
31 27
32#endif 28#endif
diff --git a/arch/arm/mach-versatile/include/mach/irqs.h b/arch/arm/mach-versatile/include/mach/irqs.h
index 216a1312e62e..9bfdb30e1f3f 100644
--- a/arch/arm/mach-versatile/include/mach/irqs.h
+++ b/arch/arm/mach-versatile/include/mach/irqs.h
@@ -60,39 +60,6 @@
60#define IRQ_VICSOURCE31 (IRQ_VIC_START + INT_VICSOURCE31) 60#define IRQ_VICSOURCE31 (IRQ_VIC_START + INT_VICSOURCE31)
61#define IRQ_VIC_END (IRQ_VIC_START + 31) 61#define IRQ_VIC_END (IRQ_VIC_START + 31)
62 62
63#define IRQMASK_WDOGINT INTMASK_WDOGINT
64#define IRQMASK_SOFTINT INTMASK_SOFTINT
65#define IRQMASK_COMMRx INTMASK_COMMRx
66#define IRQMASK_COMMTx INTMASK_COMMTx
67#define IRQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1
68#define IRQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3
69#define IRQMASK_GPIOINT0 INTMASK_GPIOINT0
70#define IRQMASK_GPIOINT1 INTMASK_GPIOINT1
71#define IRQMASK_GPIOINT2 INTMASK_GPIOINT2
72#define IRQMASK_GPIOINT3 INTMASK_GPIOINT3
73#define IRQMASK_RTCINT INTMASK_RTCINT
74#define IRQMASK_SSPINT INTMASK_SSPINT
75#define IRQMASK_UARTINT0 INTMASK_UARTINT0
76#define IRQMASK_UARTINT1 INTMASK_UARTINT1
77#define IRQMASK_UARTINT2 INTMASK_UARTINT2
78#define IRQMASK_SCIINT INTMASK_SCIINT
79#define IRQMASK_CLCDINT INTMASK_CLCDINT
80#define IRQMASK_DMAINT INTMASK_DMAINT
81#define IRQMASK_PWRFAILINT INTMASK_PWRFAILINT
82#define IRQMASK_MBXINT INTMASK_MBXINT
83#define IRQMASK_GNDINT INTMASK_GNDINT
84#define IRQMASK_VICSOURCE21 INTMASK_VICSOURCE21
85#define IRQMASK_VICSOURCE22 INTMASK_VICSOURCE22
86#define IRQMASK_VICSOURCE23 INTMASK_VICSOURCE23
87#define IRQMASK_VICSOURCE24 INTMASK_VICSOURCE24
88#define IRQMASK_VICSOURCE25 INTMASK_VICSOURCE25
89#define IRQMASK_VICSOURCE26 INTMASK_VICSOURCE26
90#define IRQMASK_VICSOURCE27 INTMASK_VICSOURCE27
91#define IRQMASK_VICSOURCE28 INTMASK_VICSOURCE28
92#define IRQMASK_VICSOURCE29 INTMASK_VICSOURCE29
93#define IRQMASK_VICSOURCE30 INTMASK_VICSOURCE30
94#define IRQMASK_VICSOURCE31 INTMASK_VICSOURCE31
95
96/* 63/*
97 * FIQ interrupts definitions are the same as the INT definitions. 64 * FIQ interrupts definitions are the same as the INT definitions.
98 */ 65 */
@@ -130,39 +97,6 @@
130#define FIQ_VICSOURCE31 INT_VICSOURCE31 97#define FIQ_VICSOURCE31 INT_VICSOURCE31
131 98
132 99
133#define FIQMASK_WDOGINT INTMASK_WDOGINT
134#define FIQMASK_SOFTINT INTMASK_SOFTINT
135#define FIQMASK_COMMRx INTMASK_COMMRx
136#define FIQMASK_COMMTx INTMASK_COMMTx
137#define FIQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1
138#define FIQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3
139#define FIQMASK_GPIOINT0 INTMASK_GPIOINT0
140#define FIQMASK_GPIOINT1 INTMASK_GPIOINT1
141#define FIQMASK_GPIOINT2 INTMASK_GPIOINT2
142#define FIQMASK_GPIOINT3 INTMASK_GPIOINT3
143#define FIQMASK_RTCINT INTMASK_RTCINT
144#define FIQMASK_SSPINT INTMASK_SSPINT
145#define FIQMASK_UARTINT0 INTMASK_UARTINT0
146#define FIQMASK_UARTINT1 INTMASK_UARTINT1
147#define FIQMASK_UARTINT2 INTMASK_UARTINT2
148#define FIQMASK_SCIINT INTMASK_SCIINT
149#define FIQMASK_CLCDINT INTMASK_CLCDINT
150#define FIQMASK_DMAINT INTMASK_DMAINT
151#define FIQMASK_PWRFAILINT INTMASK_PWRFAILINT
152#define FIQMASK_MBXINT INTMASK_MBXINT
153#define FIQMASK_GNDINT INTMASK_GNDINT
154#define FIQMASK_VICSOURCE21 INTMASK_VICSOURCE21
155#define FIQMASK_VICSOURCE22 INTMASK_VICSOURCE22
156#define FIQMASK_VICSOURCE23 INTMASK_VICSOURCE23
157#define FIQMASK_VICSOURCE24 INTMASK_VICSOURCE24
158#define FIQMASK_VICSOURCE25 INTMASK_VICSOURCE25
159#define FIQMASK_VICSOURCE26 INTMASK_VICSOURCE26
160#define FIQMASK_VICSOURCE27 INTMASK_VICSOURCE27
161#define FIQMASK_VICSOURCE28 INTMASK_VICSOURCE28
162#define FIQMASK_VICSOURCE29 INTMASK_VICSOURCE29
163#define FIQMASK_VICSOURCE30 INTMASK_VICSOURCE30
164#define FIQMASK_VICSOURCE31 INTMASK_VICSOURCE31
165
166/* 100/*
167 * Secondary interrupt controller 101 * Secondary interrupt controller
168 */ 102 */
@@ -188,24 +122,4 @@
188#define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3) 122#define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3)
189#define IRQ_SIC_END 63 123#define IRQ_SIC_END 63
190 124
191#define SIC_IRQMASK_MMCI0B SIC_INTMASK_MMCI0B
192#define SIC_IRQMASK_MMCI1B SIC_INTMASK_MMCI1B
193#define SIC_IRQMASK_KMI0 SIC_INTMASK_KMI0
194#define SIC_IRQMASK_KMI1 SIC_INTMASK_KMI1
195#define SIC_IRQMASK_SCI3 SIC_INTMASK_SCI3
196#define SIC_IRQMASK_UART3 SIC_INTMASK_UART3
197#define SIC_IRQMASK_CLCD SIC_INTMASK_CLCD
198#define SIC_IRQMASK_TOUCH SIC_INTMASK_TOUCH
199#define SIC_IRQMASK_KEYPAD SIC_INTMASK_KEYPAD
200#define SIC_IRQMASK_DoC SIC_INTMASK_DoC
201#define SIC_IRQMASK_MMCI0A SIC_INTMASK_MMCI0A
202#define SIC_IRQMASK_MMCI1A SIC_INTMASK_MMCI1A
203#define SIC_IRQMASK_AACI SIC_INTMASK_AACI
204#define SIC_IRQMASK_ETH SIC_INTMASK_ETH
205#define SIC_IRQMASK_USB SIC_INTMASK_USB
206#define SIC_IRQMASK_PCI0 SIC_INTMASK_PCI0
207#define SIC_IRQMASK_PCI1 SIC_INTMASK_PCI1
208#define SIC_IRQMASK_PCI2 SIC_INTMASK_PCI2
209#define SIC_IRQMASK_PCI3 SIC_INTMASK_PCI3
210
211#define NR_IRQS 64 125#define NR_IRQS 64
diff --git a/arch/arm/mach-versatile/include/mach/memory.h b/arch/arm/mach-versatile/include/mach/memory.h
index b6315c0602ac..79aeab86b903 100644
--- a/arch/arm/mach-versatile/include/mach/memory.h
+++ b/arch/arm/mach-versatile/include/mach/memory.h
@@ -25,14 +25,4 @@
25 */ 25 */
26#define PHYS_OFFSET UL(0x00000000) 26#define PHYS_OFFSET UL(0x00000000)
27 27
28/*
29 * Virtual view <-> DMA view memory address translations
30 * virt_to_bus: Used to translate the virtual address to an
31 * address suitable to be passed to set_dma_addr
32 * bus_to_virt: Used to convert an address for DMA operations
33 * to an address that the kernel can use.
34 */
35#define __virt_to_bus(x) ((x) - PAGE_OFFSET)
36#define __bus_to_virt(x) ((x) + PAGE_OFFSET)
37
38#endif 28#endif
diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h
index f91ba930ca8a..83207395191a 100644
--- a/arch/arm/mach-versatile/include/mach/platform.h
+++ b/arch/arm/mach-versatile/include/mach/platform.h
@@ -347,44 +347,6 @@
347#define INT_VICSOURCE30 30 /* PCI 3 */ 347#define INT_VICSOURCE30 30 /* PCI 3 */
348#define INT_VICSOURCE31 31 /* SIC source */ 348#define INT_VICSOURCE31 31 /* SIC source */
349 349
350/*
351 * Interrupt bit positions
352 *
353 */
354#define INTMASK_WDOGINT (1 << INT_WDOGINT)
355#define INTMASK_SOFTINT (1 << INT_SOFTINT)
356#define INTMASK_COMMRx (1 << INT_COMMRx)
357#define INTMASK_COMMTx (1 << INT_COMMTx)
358#define INTMASK_TIMERINT0_1 (1 << INT_TIMERINT0_1)
359#define INTMASK_TIMERINT2_3 (1 << INT_TIMERINT2_3)
360#define INTMASK_GPIOINT0 (1 << INT_GPIOINT0)
361#define INTMASK_GPIOINT1 (1 << INT_GPIOINT1)
362#define INTMASK_GPIOINT2 (1 << INT_GPIOINT2)
363#define INTMASK_GPIOINT3 (1 << INT_GPIOINT3)
364#define INTMASK_RTCINT (1 << INT_RTCINT)
365#define INTMASK_SSPINT (1 << INT_SSPINT)
366#define INTMASK_UARTINT0 (1 << INT_UARTINT0)
367#define INTMASK_UARTINT1 (1 << INT_UARTINT1)
368#define INTMASK_UARTINT2 (1 << INT_UARTINT2)
369#define INTMASK_SCIINT (1 << INT_SCIINT)
370#define INTMASK_CLCDINT (1 << INT_CLCDINT)
371#define INTMASK_DMAINT (1 << INT_DMAINT)
372#define INTMASK_PWRFAILINT (1 << INT_PWRFAILINT)
373#define INTMASK_MBXINT (1 << INT_MBXINT)
374#define INTMASK_GNDINT (1 << INT_GNDINT)
375#define INTMASK_VICSOURCE21 (1 << INT_VICSOURCE21)
376#define INTMASK_VICSOURCE22 (1 << INT_VICSOURCE22)
377#define INTMASK_VICSOURCE23 (1 << INT_VICSOURCE23)
378#define INTMASK_VICSOURCE24 (1 << INT_VICSOURCE24)
379#define INTMASK_VICSOURCE25 (1 << INT_VICSOURCE25)
380#define INTMASK_VICSOURCE26 (1 << INT_VICSOURCE26)
381#define INTMASK_VICSOURCE27 (1 << INT_VICSOURCE27)
382#define INTMASK_VICSOURCE28 (1 << INT_VICSOURCE28)
383#define INTMASK_VICSOURCE29 (1 << INT_VICSOURCE29)
384#define INTMASK_VICSOURCE30 (1 << INT_VICSOURCE30)
385#define INTMASK_VICSOURCE31 (1 << INT_VICSOURCE31)
386
387
388#define VERSATILE_SC_VALID_INT 0x003FFFFF 350#define VERSATILE_SC_VALID_INT 0x003FFFFF
389 351
390#define MAXIRQNUM 31 352#define MAXIRQNUM 31
@@ -417,26 +379,6 @@
417#define SIC_INT_PCI3 30 379#define SIC_INT_PCI3 30
418 380
419 381
420#define SIC_INTMASK_MMCI0B (1 << SIC_INT_MMCI0B)
421#define SIC_INTMASK_MMCI1B (1 << SIC_INT_MMCI1B)
422#define SIC_INTMASK_KMI0 (1 << SIC_INT_KMI0)
423#define SIC_INTMASK_KMI1 (1 << SIC_INT_KMI1)
424#define SIC_INTMASK_SCI3 (1 << SIC_INT_SCI3)
425#define SIC_INTMASK_UART3 (1 << SIC_INT_UART3)
426#define SIC_INTMASK_CLCD (1 << SIC_INT_CLCD)
427#define SIC_INTMASK_TOUCH (1 << SIC_INT_TOUCH)
428#define SIC_INTMASK_KEYPAD (1 << SIC_INT_KEYPAD)
429#define SIC_INTMASK_DoC (1 << SIC_INT_DoC)
430#define SIC_INTMASK_MMCI0A (1 << SIC_INT_MMCI0A)
431#define SIC_INTMASK_MMCI1A (1 << SIC_INT_MMCI1A)
432#define SIC_INTMASK_AACI (1 << SIC_INT_AACI)
433#define SIC_INTMASK_ETH (1 << SIC_INT_ETH)
434#define SIC_INTMASK_USB (1 << SIC_INT_USB)
435#define SIC_INTMASK_PCI0 (1 << SIC_INT_PCI0)
436#define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1)
437#define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2)
438#define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3)
439
440/* 382/*
441 * Clean base - dummy 383 * Clean base - dummy
442 * 384 *
diff --git a/arch/arm/mach-w90x900/Kconfig b/arch/arm/mach-w90x900/Kconfig
new file mode 100644
index 000000000000..8e4178fe5ec2
--- /dev/null
+++ b/arch/arm/mach-w90x900/Kconfig
@@ -0,0 +1,19 @@
1if ARCH_W90X900
2
3config CPU_W90P910
4 bool
5 help
6 Support for W90P910 of Nuvoton W90X900 CPUs.
7
8menu "W90P910 Machines"
9
10config MACH_W90P910EVB
11 bool "Nuvoton W90P910 Evaluation Board"
12 default y
13 select CPU_W90P910
14 help
15 Say Y here if you are using the Nuvoton W90P910EVB
16
17endmenu
18
19endif
diff --git a/arch/arm/mach-w90x900/Makefile b/arch/arm/mach-w90x900/Makefile
new file mode 100644
index 000000000000..0c0c1d63f1c7
--- /dev/null
+++ b/arch/arm/mach-w90x900/Makefile
@@ -0,0 +1,15 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Object file lists.
6
7obj-y := irq.o time.o
8
9# W90X900 CPU support files
10
11obj-$(CONFIG_CPU_W90P910) += w90p910.o
12
13# machine support
14
15obj-$(CONFIG_MACH_W90P910EVB) += mach-w90p910evb.o
diff --git a/arch/arm/mach-w90x900/Makefile.boot b/arch/arm/mach-w90x900/Makefile.boot
new file mode 100644
index 000000000000..a057b546b6e5
--- /dev/null
+++ b/arch/arm/mach-w90x900/Makefile.boot
@@ -0,0 +1,3 @@
1zreladdr-y := 0x00008000
2params_phys-y := 0x00000100
3
diff --git a/arch/arm/mach-w90x900/cpu.h b/arch/arm/mach-w90x900/cpu.h
new file mode 100644
index 000000000000..40ff40845df0
--- /dev/null
+++ b/arch/arm/mach-w90x900/cpu.h
@@ -0,0 +1,77 @@
1/*
2 * arch/arm/mach-w90x900/cpu.h
3 *
4 * Based on linux/include/asm-arm/plat-s3c24xx/cpu.h by Ben Dooks
5 *
6 * Copyright (c) 2008 Nuvoton technology corporation
7 * All rights reserved.
8 *
9 * Header file for W90X900 CPU support
10 *
11 * Wan ZongShun <mcuos.com@gmail.com>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 */
18
19#define IODESC_ENT(y) \
20{ \
21 .virtual = (unsigned long)W90X900_VA_##y, \
22 .pfn = __phys_to_pfn(W90X900_PA_##y), \
23 .length = W90X900_SZ_##y, \
24 .type = MT_DEVICE, \
25}
26
27/*Cpu identifier register*/
28
29#define W90X900PDID W90X900_VA_GCR
30#define W90P910_CPUID 0x02900910
31#define W90P920_CPUID 0x02900920
32#define W90P950_CPUID 0x02900950
33#define W90N960_CPUID 0x02900960
34
35struct w90x900_uartcfg;
36struct map_desc;
37struct sys_timer;
38
39/* core initialisation functions */
40
41extern void w90x900_init_irq(void);
42extern void w90p910_init_io(struct map_desc *mach_desc, int size);
43extern void w90p910_init_uarts(struct w90x900_uartcfg *cfg, int no);
44extern void w90p910_init_clocks(int xtal);
45extern void w90p910_map_io(struct map_desc *mach_desc, int size);
46extern struct sys_timer w90x900_timer;
47
48#define W90X900_RES(name) \
49struct resource w90x900_##name##_resource[] = { \
50 [0] = { \
51 .start = name##_PA, \
52 .end = name##_PA + 0x0ff, \
53 .flags = IORESOURCE_MEM, \
54 }, \
55 [1] = { \
56 .start = IRQ_##name, \
57 .end = IRQ_##name, \
58 .flags = IORESOURCE_IRQ, \
59 } \
60}
61
62#define W90X900_DEVICE(devname, regname, devid, platdevname) \
63struct platform_device w90x900_##devname = { \
64 .name = platdevname, \
65 .id = devid, \
66 .num_resources = ARRAY_SIZE(w90x900_##regname##_resource), \
67 .resource = w90x900_##regname##_resource, \
68}
69
70#define W90X900_UARTCFG(port, flag, uc, ulc, ufc) \
71{ \
72 .hwport = port, \
73 .flags = flag, \
74 .ucon = uc, \
75 .ulcon = ulc, \
76 .ufcon = ufc, \
77}
diff --git a/arch/arm/mach-w90x900/include/mach/entry-macro.S b/arch/arm/mach-w90x900/include/mach/entry-macro.S
new file mode 100644
index 000000000000..d39aca5be9ee
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/entry-macro.S
@@ -0,0 +1,34 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for W90P910-based platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 *
10 */
11
12#include <mach/hardware.h>
13#include <mach/regs-irq.h>
14
15 .macro get_irqnr_preamble, base, tmp
16 .endm
17
18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
20
21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
22
23 mov \base, #AIC_BA
24
25 ldr \irqnr, [ \base, #AIC_IPER]
26 ldr \irqnr, [ \base, #AIC_ISNR]
27 cmp \irqnr, #0
28
29 .endm
30
31 /* currently don't need an disable_fiq macro */
32
33 .macro disable_fiq
34 .endm
diff --git a/arch/arm/mach-w90x900/include/mach/hardware.h b/arch/arm/mach-w90x900/include/mach/hardware.h
new file mode 100644
index 000000000000..fe3c6265a466
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/hardware.h
@@ -0,0 +1,24 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/hardware.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/hardware.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARCH_HARDWARE_H
19#define __ASM_ARCH_HARDWARE_H
20
21#include <asm/sizes.h>
22#include <mach/map.h>
23
24#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-w90x900/include/mach/io.h b/arch/arm/mach-w90x900/include/mach/io.h
new file mode 100644
index 000000000000..d96ab99df05b
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/io.h
@@ -0,0 +1,30 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/io.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/io.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARM_ARCH_IO_H
19#define __ASM_ARM_ARCH_IO_H
20
21#define IO_SPACE_LIMIT 0xffffffff
22
23/*
24 * 1:1 mapping for ioremapped regions.
25 */
26
27#define __mem_pci(a) (a)
28#define __io(a) __typesafe_io(a)
29
30#endif
diff --git a/arch/arm/mach-w90x900/include/mach/irqs.h b/arch/arm/mach-w90x900/include/mach/irqs.h
new file mode 100644
index 000000000000..1c583f9cbcde
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/irqs.h
@@ -0,0 +1,45 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/irqs.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/irqs.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARCH_IRQS_H
19#define __ASM_ARCH_IRQS_H
20
21/*
22 * we keep the first set of CPU IRQs out of the range of
23 * the ISA space, so that the PC104 has them to itself
24 * and we don't end up having to do horrible things to the
25 * standard ISA drivers....
26 *
27 */
28
29#define W90X900_IRQ(x) (x)
30
31/* Main cpu interrupts */
32
33#define IRQ_WDT W90X900_IRQ(1)
34#define IRQ_UART0 W90X900_IRQ(7)
35#define IRQ_UART1 W90X900_IRQ(8)
36#define IRQ_UART2 W90X900_IRQ(9)
37#define IRQ_UART3 W90X900_IRQ(10)
38#define IRQ_UART4 W90X900_IRQ(11)
39#define IRQ_TIMER0 W90X900_IRQ(12)
40#define IRQ_TIMER1 W90X900_IRQ(13)
41#define IRQ_T_INT_GROUP W90X900_IRQ(14)
42#define IRQ_ADC W90X900_IRQ(31)
43#define NR_IRQS (IRQ_ADC+1)
44
45#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-w90x900/include/mach/map.h b/arch/arm/mach-w90x900/include/mach/map.h
new file mode 100644
index 000000000000..79320ebe614b
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/map.h
@@ -0,0 +1,76 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/map.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/map.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARCH_MAP_H
19#define __ASM_ARCH_MAP_H
20
21#ifndef __ASSEMBLY__
22#define W90X900_ADDR(x) ((void __iomem *)(0xF0000000 + (x)))
23#else
24#define W90X900_ADDR(x) (0xF0000000 + (x))
25#endif
26
27#define AHB_IO_BASE 0xB0000000
28#define APB_IO_BASE 0xB8000000
29#define CLOCKPW_BASE (APB_IO_BASE+0x200)
30#define AIC_IO_BASE (APB_IO_BASE+0x2000)
31#define TIMER_IO_BASE (APB_IO_BASE+0x1000)
32
33/*
34 * interrupt controller is the first thing we put in, to make
35 * the assembly code for the irq detection easier
36 */
37
38#define W90X900_VA_IRQ W90X900_ADDR(0x00000000)
39#define W90X900_PA_IRQ (0xB8002000)
40#define W90X900_SZ_IRQ SZ_4K
41
42#define W90X900_VA_GCR W90X900_ADDR(0x08002000)
43#define W90X900_PA_GCR (0xB0000000)
44#define W90X900_SZ_GCR SZ_4K
45
46/* Clock and Power management */
47
48#define W90X900_VA_CLKPWR (W90X900_VA_GCR+0x200)
49#define W90X900_PA_CLKPWR (0xB0000200)
50#define W90X900_SZ_CLKPWR SZ_4K
51
52/* EBI management */
53
54#define W90X900_VA_EBI W90X900_ADDR(0x00001000)
55#define W90X900_PA_EBI (0xB0001000)
56#define W90X900_SZ_EBI SZ_4K
57
58/* UARTs */
59
60#define W90X900_VA_UART W90X900_ADDR(0x08000000)
61#define W90X900_PA_UART (0xB8000000)
62#define W90X900_SZ_UART SZ_4K
63
64/* Timers */
65
66#define W90X900_VA_TIMER W90X900_ADDR(0x08001000)
67#define W90X900_PA_TIMER (0xB8001000)
68#define W90X900_SZ_TIMER SZ_4K
69
70/* GPIO ports */
71
72#define W90X900_VA_GPIO W90X900_ADDR(0x08003000)
73#define W90X900_PA_GPIO (0xB8003000)
74#define W90X900_SZ_GPIO SZ_4K
75
76#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-w90x900/include/mach/memory.h b/arch/arm/mach-w90x900/include/mach/memory.h
new file mode 100644
index 000000000000..971b80702c27
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/memory.h
@@ -0,0 +1,23 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/memory.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/memory.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARCH_MEMORY_H
19#define __ASM_ARCH_MEMORY_H
20
21#define PHYS_OFFSET UL(0x00000000)
22
23#endif
diff --git a/arch/arm/mach-w90x900/include/mach/regs-irq.h b/arch/arm/mach-w90x900/include/mach/regs-irq.h
new file mode 100644
index 000000000000..8a3185fbc9cf
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-irq.h
@@ -0,0 +1,51 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/regs-irq.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/regs-irq.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef ___ASM_ARCH_REGS_IRQ_H
19#define ___ASM_ARCH_REGS_IRQ_H
20
21/* Advance Interrupt Controller (AIC) Registers */
22
23#define AIC_BA W90X900_VA_IRQ
24
25#define REG_AIC_IRQSC (AIC_BA+0x80)
26#define REG_AIC_GEN (AIC_BA+0x84)
27#define REG_AIC_GASR (AIC_BA+0x88)
28#define REG_AIC_GSCR (AIC_BA+0x8C)
29#define REG_AIC_IRSR (AIC_BA+0x100)
30#define REG_AIC_IASR (AIC_BA+0x104)
31#define REG_AIC_ISR (AIC_BA+0x108)
32#define REG_AIC_IPER (AIC_BA+0x10C)
33#define REG_AIC_ISNR (AIC_BA+0x110)
34#define REG_AIC_IMR (AIC_BA+0x114)
35#define REG_AIC_OISR (AIC_BA+0x118)
36#define REG_AIC_MECR (AIC_BA+0x120)
37#define REG_AIC_MDCR (AIC_BA+0x124)
38#define REG_AIC_SSCR (AIC_BA+0x128)
39#define REG_AIC_SCCR (AIC_BA+0x12C)
40#define REG_AIC_EOSCR (AIC_BA+0x130)
41#define AIC_IPER (0x10C)
42#define AIC_ISNR (0x110)
43
44/*16-18 bits of REG_AIC_GEN define irq(2-4) group*/
45
46#define TIMER2_IRQ (1 << 16)
47#define TIMER3_IRQ (1 << 17)
48#define TIMER4_IRQ (1 << 18)
49#define TIME_GROUP_IRQ (TIMER2_IRQ|TIMER3_IRQ|TIMER4_IRQ)
50
51#endif /* ___ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-w90x900/include/mach/regs-serial.h b/arch/arm/mach-w90x900/include/mach/regs-serial.h
new file mode 100644
index 000000000000..f08fa0d75e11
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-serial.h
@@ -0,0 +1,59 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/regs-serial.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/regs-serial.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARM_REGS_SERIAL_H
19#define __ASM_ARM_REGS_SERIAL_H
20
21#define UART0_BA W90X900_VA_UART
22#define UART1_BA (W90X900_VA_UART+0x100)
23#define UART2_BA (W90X900_VA_UART+0x200)
24#define UART3_BA (W90X900_VA_UART+0x300)
25#define UART4_BA (W90X900_VA_UART+0x400)
26
27#define UART0_PA W90X900_PA_UART
28#define UART1_PA (W90X900_PA_UART+0x100)
29#define UART2_PA (W90X900_PA_UART+0x200)
30#define UART3_PA (W90X900_PA_UART+0x300)
31#define UART4_PA (W90X900_PA_UART+0x400)
32
33#ifndef __ASSEMBLY__
34
35struct w90x900_uart_clksrc {
36 const char *name;
37 unsigned int divisor;
38 unsigned int min_baud;
39 unsigned int max_baud;
40};
41
42struct w90x900_uartcfg {
43 unsigned char hwport;
44 unsigned char unused;
45 unsigned short flags;
46 unsigned long uart_flags;
47
48 unsigned long ucon;
49 unsigned long ulcon;
50 unsigned long ufcon;
51
52 struct w90x900_uart_clksrc *clocks;
53 unsigned int clocks_size;
54};
55
56#endif /* __ASSEMBLY__ */
57
58#endif /* __ASM_ARM_REGS_SERIAL_H */
59
diff --git a/arch/arm/mach-w90x900/include/mach/regs-timer.h b/arch/arm/mach-w90x900/include/mach/regs-timer.h
new file mode 100644
index 000000000000..8f390620c0e4
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-timer.h
@@ -0,0 +1,42 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/regs-timer.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/regs-timer.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARCH_REGS_TIMER_H
19#define __ASM_ARCH_REGS_TIMER_H
20
21/* Timer Registers */
22
23#define TMR_BA W90X900_VA_TIMER
24#define REG_TCSR0 (TMR_BA+0x00)
25#define REG_TCSR1 (TMR_BA+0x04)
26#define REG_TICR0 (TMR_BA+0x08)
27#define REG_TICR1 (TMR_BA+0x0C)
28#define REG_TDR0 (TMR_BA+0x10)
29#define REG_TDR1 (TMR_BA+0x14)
30#define REG_TISR (TMR_BA+0x18)
31#define REG_WTCR (TMR_BA+0x1C)
32#define REG_TCSR2 (TMR_BA+0x20)
33#define REG_TCSR3 (TMR_BA+0x24)
34#define REG_TICR2 (TMR_BA+0x28)
35#define REG_TICR3 (TMR_BA+0x2C)
36#define REG_TDR2 (TMR_BA+0x30)
37#define REG_TDR3 (TMR_BA+0x34)
38#define REG_TCSR4 (TMR_BA+0x40)
39#define REG_TICR4 (TMR_BA+0x48)
40#define REG_TDR4 (TMR_BA+0x50)
41
42#endif /* __ASM_ARCH_REGS_TIMER_H */
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
new file mode 100644
index 000000000000..93753f922618
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/system.h
@@ -0,0 +1,28 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/system.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/system.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#include <asm/proc-fns.h>
19
20static void arch_idle(void)
21{
22}
23
24static void arch_reset(char mode)
25{
26 cpu_reset(0);
27}
28
diff --git a/arch/arm/mach-w90x900/include/mach/timex.h b/arch/arm/mach-w90x900/include/mach/timex.h
new file mode 100644
index 000000000000..164dce0b64db
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/timex.h
@@ -0,0 +1,25 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/timex.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/timex.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARCH_TIMEX_H
19#define __ASM_ARCH_TIMEX_H
20
21/* CLOCK_TICK_RATE Now, I don't use it. */
22
23#define CLOCK_TICK_RATE 15000000
24
25#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-w90x900/include/mach/uncompress.h b/arch/arm/mach-w90x900/include/mach/uncompress.h
new file mode 100644
index 000000000000..050d9fe5ae1b
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/uncompress.h
@@ -0,0 +1,40 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/uncompress.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/uncompress.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARCH_UNCOMPRESS_H
19#define __ASM_ARCH_UNCOMPRESS_H
20
21/* Defines for UART registers */
22
23#include <mach/regs-serial.h>
24#include <mach/map.h>
25
26#define arch_decomp_wdog()
27
28static void putc(int ch)
29{
30}
31
32static inline void flush(void)
33{
34}
35
36static void arch_decomp_setup(void)
37{
38}
39
40#endif/* __ASM_W90X900_UNCOMPRESS_H */
diff --git a/arch/arm/mach-w90x900/include/mach/vmalloc.h b/arch/arm/mach-w90x900/include/mach/vmalloc.h
new file mode 100644
index 000000000000..2f9dfb928533
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/vmalloc.h
@@ -0,0 +1,23 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/vmalloc.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/vmalloc.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARCH_VMALLOC_H
19#define __ASM_ARCH_VMALLOC_H
20
21#define VMALLOC_END (0xE0000000)
22
23#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
new file mode 100644
index 000000000000..0b4fc194729c
--- /dev/null
+++ b/arch/arm/mach-w90x900/irq.c
@@ -0,0 +1,76 @@
1/*
2 * linux/arch/arm/mach-w90x900/irq.c
3 *
4 * based on linux/arch/arm/plat-s3c24xx/irq.c by Ben Dooks
5 *
6 * Copyright (c) 2008 Nuvoton technology corporation
7 * All rights reserved.
8 *
9 * Wan ZongShun <mcuos.com@gmail.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#include <linux/init.h>
19#include <linux/module.h>
20#include <linux/interrupt.h>
21#include <linux/ioport.h>
22#include <linux/ptrace.h>
23#include <linux/sysdev.h>
24#include <linux/io.h>
25
26#include <asm/irq.h>
27#include <asm/mach/irq.h>
28
29#include <mach/hardware.h>
30#include <mach/regs-irq.h>
31
32static void w90x900_irq_mask(unsigned int irq)
33{
34 __raw_writel(1 << irq, REG_AIC_MDCR);
35}
36
37/*
38 * By the w90p910 spec,any irq,only write 1
39 * to REG_AIC_EOSCR for ACK
40 */
41
42static void w90x900_irq_ack(unsigned int irq)
43{
44 __raw_writel(0x01, REG_AIC_EOSCR);
45}
46
47static void w90x900_irq_unmask(unsigned int irq)
48{
49 unsigned long mask;
50
51 if (irq == IRQ_T_INT_GROUP) {
52 mask = __raw_readl(REG_AIC_GEN);
53 __raw_writel(TIME_GROUP_IRQ | mask, REG_AIC_GEN);
54 __raw_writel(1 << IRQ_T_INT_GROUP, REG_AIC_MECR);
55 }
56 __raw_writel(1 << irq, REG_AIC_MECR);
57}
58
59static struct irq_chip w90x900_irq_chip = {
60 .ack = w90x900_irq_ack,
61 .mask = w90x900_irq_mask,
62 .unmask = w90x900_irq_unmask,
63};
64
65void __init w90x900_init_irq(void)
66{
67 int irqno;
68
69 __raw_writel(0xFFFFFFFE, REG_AIC_MDCR);
70
71 for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) {
72 set_irq_chip(irqno, &w90x900_irq_chip);
73 set_irq_handler(irqno, handle_level_irq);
74 set_irq_flags(irqno, IRQF_VALID);
75 }
76}
diff --git a/arch/arm/mach-w90x900/mach-w90p910evb.c b/arch/arm/mach-w90x900/mach-w90p910evb.c
new file mode 100644
index 000000000000..9307a2475438
--- /dev/null
+++ b/arch/arm/mach-w90x900/mach-w90p910evb.c
@@ -0,0 +1,72 @@
1/*
2 * linux/arch/arm/mach-w90x900/mach-w90p910evb.c
3 *
4 * Based on mach-s3c2410/mach-smdk2410.c by Jonas Dietsche
5 *
6 * Copyright (C) 2008 Nuvoton technology corporation
7 * All rights reserved.
8 *
9 * Wan ZongShun <mcuos.com@gmail.com>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/types.h>
20#include <linux/interrupt.h>
21#include <linux/list.h>
22#include <linux/timer.h>
23#include <linux/init.h>
24#include <linux/platform_device.h>
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29#include <asm/mach-types.h>
30
31#include <mach/regs-serial.h>
32
33#include "cpu.h"
34
35static struct map_desc w90p910_iodesc[] __initdata = {
36};
37
38static struct w90x900_uartcfg w90p910_uartcfgs[] = {
39 W90X900_UARTCFG(0, 0, 0, 0, 0),
40 W90X900_UARTCFG(1, 0, 0, 0, 0),
41 W90X900_UARTCFG(2, 0, 0, 0, 0),
42 W90X900_UARTCFG(3, 0, 0, 0, 0),
43 W90X900_UARTCFG(4, 0, 0, 0, 0),
44};
45
46/*Here should be your evb resourse,such as LCD*/
47
48static struct platform_device *w90p910evb_dev[] __initdata = {
49};
50
51static void __init w90p910evb_map_io(void)
52{
53 w90p910_map_io(w90p910_iodesc, ARRAY_SIZE(w90p910_iodesc));
54 w90p910_init_clocks(0);
55 w90p910_init_uarts(w90p910_uartcfgs, ARRAY_SIZE(w90p910_uartcfgs));
56}
57
58static void __init w90p910evb_init(void)
59{
60 platform_add_devices(w90p910evb_dev, ARRAY_SIZE(w90p910evb_dev));
61}
62
63MACHINE_START(W90P910EVB, "W90P910EVB")
64 /* Maintainer: Wan ZongShun */
65 .phys_io = W90X900_PA_UART,
66 .io_pg_offst = (((u32)W90X900_VA_UART) >> 18) & 0xfffc,
67 .boot_params = 0,
68 .map_io = w90p910evb_map_io,
69 .init_irq = w90x900_init_irq,
70 .init_machine = w90p910evb_init,
71 .timer = &w90x900_timer,
72MACHINE_END
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
new file mode 100644
index 000000000000..3a69e381f316
--- /dev/null
+++ b/arch/arm/mach-w90x900/time.c
@@ -0,0 +1,80 @@
1/*
2 * linux/arch/arm/mach-w90x900/time.c
3 *
4 * Based on linux/arch/arm/plat-s3c24xx/time.c by Ben Dooks
5 *
6 * Copyright (c) 2008 Nuvoton technology corporation
7 * All rights reserved.
8 *
9 * Wan ZongShun <mcuos.com@gmail.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/err.h>
23#include <linux/clk.h>
24#include <linux/io.h>
25#include <linux/leds.h>
26
27#include <asm/mach-types.h>
28#include <asm/mach/irq.h>
29#include <asm/mach/time.h>
30
31#include <mach/system.h>
32#include <mach/map.h>
33#include <mach/regs-timer.h>
34
35static unsigned long w90x900_gettimeoffset(void)
36{
37 return 0;
38}
39
40/*IRQ handler for the timer*/
41
42static irqreturn_t
43w90x900_timer_interrupt(int irq, void *dev_id)
44{
45 timer_tick();
46 __raw_writel(0x01, REG_TISR); /* clear TIF0 */
47 return IRQ_HANDLED;
48}
49
50static struct irqaction w90x900_timer_irq = {
51 .name = "w90x900 Timer Tick",
52 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
53 .handler = w90x900_timer_interrupt,
54};
55
56/*Set up timer reg.*/
57
58static void w90x900_timer_setup(void)
59{
60 __raw_writel(0, REG_TCSR0);
61 __raw_writel(0, REG_TCSR1);
62 __raw_writel(0, REG_TCSR2);
63 __raw_writel(0, REG_TCSR3);
64 __raw_writel(0, REG_TCSR4);
65 __raw_writel(0x1F, REG_TISR);
66 __raw_writel(15000000/(100 * 100), REG_TICR0);
67 __raw_writel(0x68000063, REG_TCSR0);
68}
69
70static void __init w90x900_timer_init(void)
71{
72 w90x900_timer_setup();
73 setup_irq(IRQ_TIMER0, &w90x900_timer_irq);
74}
75
76struct sys_timer w90x900_timer = {
77 .init = w90x900_timer_init,
78 .offset = w90x900_gettimeoffset,
79 .resume = w90x900_timer_setup
80};
diff --git a/arch/arm/mach-w90x900/w90p910.c b/arch/arm/mach-w90x900/w90p910.c
new file mode 100644
index 000000000000..aa783bc94310
--- /dev/null
+++ b/arch/arm/mach-w90x900/w90p910.c
@@ -0,0 +1,134 @@
1/*
2 * linux/arch/arm/mach-w90x900/w90p910.c
3 *
4 * Based on linux/arch/arm/plat-s3c24xx/s3c244x.c by Ben Dooks
5 *
6 * Copyright (c) 2008 Nuvoton technology corporation
7 * All rights reserved.
8 *
9 * Wan ZongShun <mcuos.com@gmail.com>
10 *
11 * W90P910 cpu support
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/types.h>
22#include <linux/interrupt.h>
23#include <linux/list.h>
24#include <linux/timer.h>
25#include <linux/init.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31#include <asm/mach/irq.h>
32#include <asm/irq.h>
33
34#include <mach/hardware.h>
35#include <mach/regs-serial.h>
36
37#include "cpu.h"
38
39/*W90P910 has five uarts*/
40
41#define MAX_UART_COUNT 5
42static int uart_count;
43static struct platform_device *uart_devs[MAX_UART_COUNT-1];
44
45/* Initial IO mappings */
46
47static struct map_desc w90p910_iodesc[] __initdata = {
48 IODESC_ENT(IRQ),
49 IODESC_ENT(GCR),
50 IODESC_ENT(UART),
51 IODESC_ENT(TIMER),
52 IODESC_ENT(EBI),
53 /*IODESC_ENT(LCD),*/
54};
55
56/*Init the dev resource*/
57
58static W90X900_RES(UART0);
59static W90X900_RES(UART1);
60static W90X900_RES(UART2);
61static W90X900_RES(UART3);
62static W90X900_RES(UART4);
63static W90X900_DEVICE(uart0, UART0, 0, "w90x900-uart");
64static W90X900_DEVICE(uart1, UART1, 1, "w90x900-uart");
65static W90X900_DEVICE(uart2, UART2, 2, "w90x900-uart");
66static W90X900_DEVICE(uart3, UART3, 3, "w90x900-uart");
67static W90X900_DEVICE(uart4, UART4, 4, "w90x900-uart");
68
69static struct platform_device *uart_devices[] __initdata = {
70 &w90x900_uart0,
71 &w90x900_uart1,
72 &w90x900_uart2,
73 &w90x900_uart3,
74 &w90x900_uart4
75};
76
77/*Init W90P910 uart device*/
78
79void __init w90p910_init_uarts(struct w90x900_uartcfg *cfg, int no)
80{
81 struct platform_device *platdev;
82 int uart, uartdev;
83
84 /*By min() to judge count of uart be used indeed*/
85
86 uartdev = ARRAY_SIZE(uart_devices);
87 no = min(uartdev, no);
88
89 for (uart = 0; uart < no; uart++, cfg++) {
90 if (cfg->hwport != uart)
91 printk(KERN_ERR "w90x900_uartcfg[%d] error\n", uart);
92 platdev = uart_devices[cfg->hwport];
93 uart_devs[uart] = platdev;
94 platdev->dev.platform_data = cfg;
95 }
96 uart_count = uart;
97}
98
99/*Init W90P910 evb io*/
100
101void __init w90p910_map_io(struct map_desc *mach_desc, int mach_size)
102{
103 unsigned long idcode = 0x0;
104
105 iotable_init(w90p910_iodesc, ARRAY_SIZE(w90p910_iodesc));
106
107 idcode = __raw_readl(W90X900PDID);
108 if (idcode != W90P910_CPUID)
109 printk(KERN_ERR "CPU type 0x%08lx is not W90P910\n", idcode);
110}
111
112/*Init W90P910 clock*/
113
114void __init w90p910_init_clocks(int xtal)
115{
116}
117
118static int __init w90p910_init_cpu(void)
119{
120 return 0;
121}
122
123static int __init w90x900_arch_init(void)
124{
125 int ret;
126
127 ret = w90p910_init_cpu();
128 if (ret != 0)
129 return ret;
130
131 return platform_add_devices(uart_devs, uart_count);
132
133}
134arch_initcall(w90x900_arch_init);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index ab5f7a21350b..d490f3773c01 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -10,8 +10,7 @@ config CPU_32
10 10
11# ARM610 11# ARM610
12config CPU_ARM610 12config CPU_ARM610
13 bool "Support ARM610 processor" 13 bool "Support ARM610 processor" if ARCH_RPC
14 depends on ARCH_RPC
15 select CPU_32v3 14 select CPU_32v3
16 select CPU_CACHE_V3 15 select CPU_CACHE_V3
17 select CPU_CACHE_VIVT 16 select CPU_CACHE_VIVT
@@ -43,8 +42,7 @@ config CPU_ARM7TDMI
43 42
44# ARM710 43# ARM710
45config CPU_ARM710 44config CPU_ARM710
46 bool "Support ARM710 processor" if !ARCH_CLPS7500 && ARCH_RPC 45 bool "Support ARM710 processor" if ARCH_RPC
47 default y if ARCH_CLPS7500
48 select CPU_32v3 46 select CPU_32v3
49 select CPU_CACHE_V3 47 select CPU_CACHE_V3
50 select CPU_CACHE_VIVT 48 select CPU_CACHE_VIVT
@@ -63,8 +61,7 @@ config CPU_ARM710
63 61
64# ARM720T 62# ARM720T
65config CPU_ARM720T 63config CPU_ARM720T
66 bool "Support ARM720T processor" if !ARCH_CLPS711X && !ARCH_L7200 && !ARCH_CDB89712 && ARCH_INTEGRATOR 64 bool "Support ARM720T processor" if ARCH_INTEGRATOR
67 default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X
68 select CPU_32v4T 65 select CPU_32v4T
69 select CPU_ABRT_LV4T 66 select CPU_ABRT_LV4T
70 select CPU_PABRT_NOIFAR 67 select CPU_PABRT_NOIFAR
@@ -114,9 +111,7 @@ config CPU_ARM9TDMI
114 111
115# ARM920T 112# ARM920T
116config CPU_ARM920T 113config CPU_ARM920T
117 bool "Support ARM920T processor" 114 bool "Support ARM920T processor" if ARCH_INTEGRATOR
118 depends on ARCH_EP93XX || ARCH_INTEGRATOR || CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200
119 default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200
120 select CPU_32v4T 115 select CPU_32v4T
121 select CPU_ABRT_EV4T 116 select CPU_ABRT_EV4T
122 select CPU_PABRT_NOIFAR 117 select CPU_PABRT_NOIFAR
@@ -138,8 +133,6 @@ config CPU_ARM920T
138# ARM922T 133# ARM922T
139config CPU_ARM922T 134config CPU_ARM922T
140 bool "Support ARM922T processor" if ARCH_INTEGRATOR 135 bool "Support ARM922T processor" if ARCH_INTEGRATOR
141 depends on ARCH_LH7A40X || ARCH_INTEGRATOR || ARCH_KS8695
142 default y if ARCH_LH7A40X || ARCH_KS8695
143 select CPU_32v4T 136 select CPU_32v4T
144 select CPU_ABRT_EV4T 137 select CPU_ABRT_EV4T
145 select CPU_PABRT_NOIFAR 138 select CPU_PABRT_NOIFAR
@@ -159,8 +152,6 @@ config CPU_ARM922T
159# ARM925T 152# ARM925T
160config CPU_ARM925T 153config CPU_ARM925T
161 bool "Support ARM925T processor" if ARCH_OMAP1 154 bool "Support ARM925T processor" if ARCH_OMAP1
162 depends on ARCH_OMAP15XX
163 default y if ARCH_OMAP15XX
164 select CPU_32v4T 155 select CPU_32v4T
165 select CPU_ABRT_EV4T 156 select CPU_ABRT_EV4T
166 select CPU_PABRT_NOIFAR 157 select CPU_PABRT_NOIFAR
@@ -179,22 +170,7 @@ config CPU_ARM925T
179 170
180# ARM926T 171# ARM926T
181config CPU_ARM926T 172config CPU_ARM926T
182 bool "Support ARM926T processor" 173 bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
183 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || \
184 MACH_VERSATILE_AB || ARCH_OMAP730 || \
185 ARCH_OMAP16XX || MACH_REALVIEW_EB || \
186 ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \
187 ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \
188 ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \
189 ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \
190 ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2
191 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || \
192 ARCH_OMAP730 || ARCH_OMAP16XX || \
193 ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \
194 ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \
195 ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \
196 ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \
197 ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2
198 select CPU_32v5 174 select CPU_32v5
199 select CPU_ABRT_EV5TJ 175 select CPU_ABRT_EV5TJ
200 select CPU_PABRT_NOIFAR 176 select CPU_PABRT_NOIFAR
@@ -247,8 +223,7 @@ config CPU_ARM946E
247 223
248# ARM1020 - needs validating 224# ARM1020 - needs validating
249config CPU_ARM1020 225config CPU_ARM1020
250 bool "Support ARM1020T (rev 0) processor" 226 bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR
251 depends on ARCH_INTEGRATOR
252 select CPU_32v5 227 select CPU_32v5
253 select CPU_ABRT_EV4T 228 select CPU_ABRT_EV4T
254 select CPU_PABRT_NOIFAR 229 select CPU_PABRT_NOIFAR
@@ -266,8 +241,7 @@ config CPU_ARM1020
266 241
267# ARM1020E - needs validating 242# ARM1020E - needs validating
268config CPU_ARM1020E 243config CPU_ARM1020E
269 bool "Support ARM1020E processor" 244 bool "Support ARM1020E processor" if ARCH_INTEGRATOR
270 depends on ARCH_INTEGRATOR
271 select CPU_32v5 245 select CPU_32v5
272 select CPU_ABRT_EV4T 246 select CPU_ABRT_EV4T
273 select CPU_PABRT_NOIFAR 247 select CPU_PABRT_NOIFAR
@@ -280,8 +254,7 @@ config CPU_ARM1020E
280 254
281# ARM1022E 255# ARM1022E
282config CPU_ARM1022 256config CPU_ARM1022
283 bool "Support ARM1022E processor" 257 bool "Support ARM1022E processor" if ARCH_INTEGRATOR
284 depends on ARCH_INTEGRATOR
285 select CPU_32v5 258 select CPU_32v5
286 select CPU_ABRT_EV4T 259 select CPU_ABRT_EV4T
287 select CPU_PABRT_NOIFAR 260 select CPU_PABRT_NOIFAR
@@ -299,8 +272,7 @@ config CPU_ARM1022
299 272
300# ARM1026EJ-S 273# ARM1026EJ-S
301config CPU_ARM1026 274config CPU_ARM1026
302 bool "Support ARM1026EJ-S processor" 275 bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR
303 depends on ARCH_INTEGRATOR
304 select CPU_32v5 276 select CPU_32v5
305 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 277 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
306 select CPU_PABRT_NOIFAR 278 select CPU_PABRT_NOIFAR
@@ -317,8 +289,7 @@ config CPU_ARM1026
317 289
318# SA110 290# SA110
319config CPU_SA110 291config CPU_SA110
320 bool "Support StrongARM(R) SA-110 processor" if !ARCH_EBSA110 && !FOOTBRIDGE && !ARCH_TBOX && !ARCH_SHARK && !ARCH_NEXUSPCI && ARCH_RPC 292 bool "Support StrongARM(R) SA-110 processor" if ARCH_RPC
321 default y if ARCH_EBSA110 || FOOTBRIDGE || ARCH_TBOX || ARCH_SHARK || ARCH_NEXUSPCI
322 select CPU_32v3 if ARCH_RPC 293 select CPU_32v3 if ARCH_RPC
323 select CPU_32v4 if !ARCH_RPC 294 select CPU_32v4 if !ARCH_RPC
324 select CPU_ABRT_EV4 295 select CPU_ABRT_EV4
@@ -340,8 +311,6 @@ config CPU_SA110
340# SA1100 311# SA1100
341config CPU_SA1100 312config CPU_SA1100
342 bool 313 bool
343 depends on ARCH_SA1100
344 default y
345 select CPU_32v4 314 select CPU_32v4
346 select CPU_ABRT_EV4 315 select CPU_ABRT_EV4
347 select CPU_PABRT_NOIFAR 316 select CPU_PABRT_NOIFAR
@@ -353,8 +322,6 @@ config CPU_SA1100
353# XScale 322# XScale
354config CPU_XSCALE 323config CPU_XSCALE
355 bool 324 bool
356 depends on ARCH_IOP32X || ARCH_IOP33X || PXA25x || PXA27x || ARCH_IXP4XX || ARCH_IXP2000
357 default y
358 select CPU_32v5 325 select CPU_32v5
359 select CPU_ABRT_EV5T 326 select CPU_ABRT_EV5T
360 select CPU_PABRT_NOIFAR 327 select CPU_PABRT_NOIFAR
@@ -365,8 +332,6 @@ config CPU_XSCALE
365# XScale Core Version 3 332# XScale Core Version 3
366config CPU_XSC3 333config CPU_XSC3
367 bool 334 bool
368 depends on ARCH_IXP23XX || ARCH_IOP13XX || PXA3xx
369 default y
370 select CPU_32v5 335 select CPU_32v5
371 select CPU_ABRT_EV5T 336 select CPU_ABRT_EV5T
372 select CPU_PABRT_NOIFAR 337 select CPU_PABRT_NOIFAR
@@ -378,8 +343,6 @@ config CPU_XSC3
378# Feroceon 343# Feroceon
379config CPU_FEROCEON 344config CPU_FEROCEON
380 bool 345 bool
381 depends on ARCH_ORION5X || ARCH_LOKI || ARCH_KIRKWOOD || ARCH_MV78XX0
382 default y
383 select CPU_32v5 346 select CPU_32v5
384 select CPU_ABRT_EV5T 347 select CPU_ABRT_EV5T
385 select CPU_PABRT_NOIFAR 348 select CPU_PABRT_NOIFAR
@@ -399,10 +362,7 @@ config CPU_FEROCEON_OLD_ID
399 362
400# ARMv6 363# ARMv6
401config CPU_V6 364config CPU_V6
402 bool "Support ARM V6 processor" 365 bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
403 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
404 default y if ARCH_MX3
405 default y if ARCH_MSM
406 select CPU_32v6 366 select CPU_32v6
407 select CPU_ABRT_EV6 367 select CPU_ABRT_EV6
408 select CPU_PABRT_NOIFAR 368 select CPU_PABRT_NOIFAR
@@ -427,8 +387,7 @@ config CPU_32v6K
427 387
428# ARMv7 388# ARMv7
429config CPU_V7 389config CPU_V7
430 bool "Support ARM V7 processor" 390 bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
431 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP3
432 select CPU_32v6K 391 select CPU_32v6K
433 select CPU_32v7 392 select CPU_32v7
434 select CPU_ABRT_EV7 393 select CPU_ABRT_EV7
@@ -745,7 +704,7 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
745 704
746config CACHE_L2X0 705config CACHE_L2X0
747 bool "Enable the L2x0 outer cache controller" 706 bool "Enable the L2x0 outer cache controller"
748 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 707 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || REALVIEW_EB_A9MP
749 default y 708 default y
750 select OUTER_CACHE 709 select OUTER_CACHE
751 help 710 help
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 133e65d166b3..c5a57fbf095d 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -17,6 +17,7 @@
17#include <linux/string.h> 17#include <linux/string.h>
18#include <linux/proc_fs.h> 18#include <linux/proc_fs.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/sched.h>
20#include <linux/uaccess.h> 21#include <linux/uaccess.h>
21 22
22#include <asm/unaligned.h> 23#include <asm/unaligned.h>
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
index 3b3639eb7ca5..8a4abebc478a 100644
--- a/arch/arm/mm/cache-v3.S
+++ b/arch/arm/mm/cache-v3.S
@@ -9,7 +9,6 @@
9 */ 9 */
10#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <mach/hardware.h>
13#include <asm/page.h> 12#include <asm/page.h>
14#include "proc-macros.S" 13#include "proc-macros.S"
15 14
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S
index 5786adf10040..3668611cb400 100644
--- a/arch/arm/mm/cache-v4.S
+++ b/arch/arm/mm/cache-v4.S
@@ -9,7 +9,6 @@
9 */ 9 */
10#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <mach/hardware.h>
13#include <asm/page.h> 12#include <asm/page.h>
14#include "proc-macros.S" 13#include "proc-macros.S"
15 14
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S
index 51a9b0b273b6..c54fa2cc40e6 100644
--- a/arch/arm/mm/cache-v4wt.S
+++ b/arch/arm/mm/cache-v4wt.S
@@ -13,7 +13,6 @@
13 */ 13 */
14#include <linux/linkage.h> 14#include <linux/linkage.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <mach/hardware.h>
17#include <asm/page.h> 16#include <asm/page.h>
18#include "proc-macros.S" 17#include "proc-macros.S"
19 18
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index d19c2bec2b1f..be93ff02a98d 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -26,6 +26,7 @@
26 * - mm - mm_struct describing address space 26 * - mm - mm_struct describing address space
27 */ 27 */
28ENTRY(v7_flush_dcache_all) 28ENTRY(v7_flush_dcache_all)
29 dmb @ ensure ordering with previous memory accesses
29 mrc p15, 1, r0, c0, c0, 1 @ read clidr 30 mrc p15, 1, r0, c0, c0, 1 @ read clidr
30 ands r3, r0, #0x7000000 @ extract loc from clidr 31 ands r3, r0, #0x7000000 @ extract loc from clidr
31 mov r3, r3, lsr #23 @ left align loc bit field 32 mov r3, r3, lsr #23 @ left align loc bit field
@@ -64,6 +65,7 @@ skip:
64finished: 65finished:
65 mov r10, #0 @ swith back to cache level 0 66 mov r10, #0 @ swith back to cache level 0
66 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr 67 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
68 dsb
67 isb 69 isb
68 mov pc, lr 70 mov pc, lr
69ENDPROC(v7_flush_dcache_all) 71ENDPROC(v7_flush_dcache_all)
diff --git a/arch/arm/mm/copypage-feroceon.S b/arch/arm/mm/copypage-feroceon.S
deleted file mode 100644
index 7eb0d320d240..000000000000
--- a/arch/arm/mm/copypage-feroceon.S
+++ /dev/null
@@ -1,95 +0,0 @@
1/*
2 * linux/arch/arm/lib/copypage-feroceon.S
3 *
4 * Copyright (C) 2008 Marvell Semiconductors
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This handles copy_user_page and clear_user_page on Feroceon
11 * more optimally than the generic implementations.
12 */
13#include <linux/linkage.h>
14#include <linux/init.h>
15#include <asm/asm-offsets.h>
16
17 .text
18 .align 5
19
20ENTRY(feroceon_copy_user_page)
21 stmfd sp!, {r4-r9, lr}
22 mov ip, #PAGE_SZ
231: mov lr, r1
24 ldmia r1!, {r2 - r9}
25 pld [lr, #32]
26 pld [lr, #64]
27 pld [lr, #96]
28 pld [lr, #128]
29 pld [lr, #160]
30 pld [lr, #192]
31 pld [lr, #224]
32 stmia r0, {r2 - r9}
33 ldmia r1!, {r2 - r9}
34 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
35 add r0, r0, #32
36 stmia r0, {r2 - r9}
37 ldmia r1!, {r2 - r9}
38 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
39 add r0, r0, #32
40 stmia r0, {r2 - r9}
41 ldmia r1!, {r2 - r9}
42 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
43 add r0, r0, #32
44 stmia r0, {r2 - r9}
45 ldmia r1!, {r2 - r9}
46 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
47 add r0, r0, #32
48 stmia r0, {r2 - r9}
49 ldmia r1!, {r2 - r9}
50 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
51 add r0, r0, #32
52 stmia r0, {r2 - r9}
53 ldmia r1!, {r2 - r9}
54 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
55 add r0, r0, #32
56 stmia r0, {r2 - r9}
57 ldmia r1!, {r2 - r9}
58 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
59 add r0, r0, #32
60 stmia r0, {r2 - r9}
61 subs ip, ip, #(32 * 8)
62 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
63 add r0, r0, #32
64 bne 1b
65 mcr p15, 0, ip, c7, c10, 4 @ drain WB
66 ldmfd sp!, {r4-r9, pc}
67
68 .align 5
69
70ENTRY(feroceon_clear_user_page)
71 stmfd sp!, {r4-r7, lr}
72 mov r1, #PAGE_SZ/32
73 mov r2, #0
74 mov r3, #0
75 mov r4, #0
76 mov r5, #0
77 mov r6, #0
78 mov r7, #0
79 mov ip, #0
80 mov lr, #0
811: stmia r0, {r2-r7, ip, lr}
82 subs r1, r1, #1
83 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
84 add r0, r0, #32
85 bne 1b
86 mcr p15, 0, r1, c7, c10, 4 @ drain WB
87 ldmfd sp!, {r4-r7, pc}
88
89 __INITDATA
90
91 .type feroceon_user_fns, #object
92ENTRY(feroceon_user_fns)
93 .long feroceon_clear_user_page
94 .long feroceon_copy_user_page
95 .size feroceon_user_fns, . - feroceon_user_fns
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
new file mode 100644
index 000000000000..c3ba6a94da0c
--- /dev/null
+++ b/arch/arm/mm/copypage-feroceon.c
@@ -0,0 +1,111 @@
1/*
2 * linux/arch/arm/mm/copypage-feroceon.S
3 *
4 * Copyright (C) 2008 Marvell Semiconductors
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This handles copy_user_highpage and clear_user_page on Feroceon
11 * more optimally than the generic implementations.
12 */
13#include <linux/init.h>
14#include <linux/highmem.h>
15
16static void __attribute__((naked))
17feroceon_copy_user_page(void *kto, const void *kfrom)
18{
19 asm("\
20 stmfd sp!, {r4-r9, lr} \n\
21 mov ip, %0 \n\
221: mov lr, r1 \n\
23 ldmia r1!, {r2 - r9} \n\
24 pld [lr, #32] \n\
25 pld [lr, #64] \n\
26 pld [lr, #96] \n\
27 pld [lr, #128] \n\
28 pld [lr, #160] \n\
29 pld [lr, #192] \n\
30 pld [lr, #224] \n\
31 stmia r0, {r2 - r9} \n\
32 ldmia r1!, {r2 - r9} \n\
33 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
34 add r0, r0, #32 \n\
35 stmia r0, {r2 - r9} \n\
36 ldmia r1!, {r2 - r9} \n\
37 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
38 add r0, r0, #32 \n\
39 stmia r0, {r2 - r9} \n\
40 ldmia r1!, {r2 - r9} \n\
41 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
42 add r0, r0, #32 \n\
43 stmia r0, {r2 - r9} \n\
44 ldmia r1!, {r2 - r9} \n\
45 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
46 add r0, r0, #32 \n\
47 stmia r0, {r2 - r9} \n\
48 ldmia r1!, {r2 - r9} \n\
49 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
50 add r0, r0, #32 \n\
51 stmia r0, {r2 - r9} \n\
52 ldmia r1!, {r2 - r9} \n\
53 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
54 add r0, r0, #32 \n\
55 stmia r0, {r2 - r9} \n\
56 ldmia r1!, {r2 - r9} \n\
57 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
58 add r0, r0, #32 \n\
59 stmia r0, {r2 - r9} \n\
60 subs ip, ip, #(32 * 8) \n\
61 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
62 add r0, r0, #32 \n\
63 bne 1b \n\
64 mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\
65 ldmfd sp!, {r4-r9, pc}"
66 :
67 : "I" (PAGE_SIZE));
68}
69
70void feroceon_copy_user_highpage(struct page *to, struct page *from,
71 unsigned long vaddr)
72{
73 void *kto, *kfrom;
74
75 kto = kmap_atomic(to, KM_USER0);
76 kfrom = kmap_atomic(from, KM_USER1);
77 feroceon_copy_user_page(kto, kfrom);
78 kunmap_atomic(kfrom, KM_USER1);
79 kunmap_atomic(kto, KM_USER0);
80}
81
82void feroceon_clear_user_highpage(struct page *page, unsigned long vaddr)
83{
84 void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
85 asm volatile ("\
86 mov r1, %2 \n\
87 mov r2, #0 \n\
88 mov r3, #0 \n\
89 mov r4, #0 \n\
90 mov r5, #0 \n\
91 mov r6, #0 \n\
92 mov r7, #0 \n\
93 mov ip, #0 \n\
94 mov lr, #0 \n\
951: stmia %0, {r2-r7, ip, lr} \n\
96 subs r1, r1, #1 \n\
97 mcr p15, 0, %0, c7, c14, 1 @ clean and invalidate D line\n\
98 add %0, %0, #32 \n\
99 bne 1b \n\
100 mcr p15, 0, r1, c7, c10, 4 @ drain WB"
101 : "=r" (ptr)
102 : "0" (kaddr), "I" (PAGE_SIZE / 32)
103 : "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ip", "lr");
104 kunmap_atomic(kaddr, KM_USER0);
105}
106
107struct cpu_user_fns feroceon_user_fns __initdata = {
108 .cpu_clear_user_highpage = feroceon_clear_user_highpage,
109 .cpu_copy_user_highpage = feroceon_copy_user_highpage,
110};
111
diff --git a/arch/arm/mm/copypage-v3.S b/arch/arm/mm/copypage-v3.S
deleted file mode 100644
index 2ee394b11bcb..000000000000
--- a/arch/arm/mm/copypage-v3.S
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * linux/arch/arm/lib/copypage.S
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * ASM optimised string functions
11 */
12#include <linux/linkage.h>
13#include <linux/init.h>
14#include <asm/assembler.h>
15#include <asm/asm-offsets.h>
16
17 .text
18 .align 5
19/*
20 * ARMv3 optimised copy_user_page
21 *
22 * FIXME: do we need to handle cache stuff...
23 */
24ENTRY(v3_copy_user_page)
25 stmfd sp!, {r4, lr} @ 2
26 mov r2, #PAGE_SZ/64 @ 1
27 ldmia r1!, {r3, r4, ip, lr} @ 4+1
281: stmia r0!, {r3, r4, ip, lr} @ 4
29 ldmia r1!, {r3, r4, ip, lr} @ 4+1
30 stmia r0!, {r3, r4, ip, lr} @ 4
31 ldmia r1!, {r3, r4, ip, lr} @ 4+1
32 stmia r0!, {r3, r4, ip, lr} @ 4
33 ldmia r1!, {r3, r4, ip, lr} @ 4
34 subs r2, r2, #1 @ 1
35 stmia r0!, {r3, r4, ip, lr} @ 4
36 ldmneia r1!, {r3, r4, ip, lr} @ 4
37 bne 1b @ 1
38 ldmfd sp!, {r4, pc} @ 3
39
40 .align 5
41/*
42 * ARMv3 optimised clear_user_page
43 *
44 * FIXME: do we need to handle cache stuff...
45 */
46ENTRY(v3_clear_user_page)
47 str lr, [sp, #-4]!
48 mov r1, #PAGE_SZ/64 @ 1
49 mov r2, #0 @ 1
50 mov r3, #0 @ 1
51 mov ip, #0 @ 1
52 mov lr, #0 @ 1
531: stmia r0!, {r2, r3, ip, lr} @ 4
54 stmia r0!, {r2, r3, ip, lr} @ 4
55 stmia r0!, {r2, r3, ip, lr} @ 4
56 stmia r0!, {r2, r3, ip, lr} @ 4
57 subs r1, r1, #1 @ 1
58 bne 1b @ 1
59 ldr pc, [sp], #4
60
61 __INITDATA
62
63 .type v3_user_fns, #object
64ENTRY(v3_user_fns)
65 .long v3_clear_user_page
66 .long v3_copy_user_page
67 .size v3_user_fns, . - v3_user_fns
diff --git a/arch/arm/mm/copypage-v3.c b/arch/arm/mm/copypage-v3.c
new file mode 100644
index 000000000000..70ed96c8af8e
--- /dev/null
+++ b/arch/arm/mm/copypage-v3.c
@@ -0,0 +1,81 @@
1/*
2 * linux/arch/arm/mm/copypage-v3.c
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/init.h>
11#include <linux/highmem.h>
12
13/*
14 * ARMv3 optimised copy_user_highpage
15 *
16 * FIXME: do we need to handle cache stuff...
17 */
18static void __attribute__((naked))
19v3_copy_user_page(void *kto, const void *kfrom)
20{
21 asm("\n\
22 stmfd sp!, {r4, lr} @ 2\n\
23 mov r2, %2 @ 1\n\
24 ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
251: stmia %1!, {r3, r4, ip, lr} @ 4\n\
26 ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
27 stmia %1!, {r3, r4, ip, lr} @ 4\n\
28 ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
29 stmia %1!, {r3, r4, ip, lr} @ 4\n\
30 ldmia %0!, {r3, r4, ip, lr} @ 4\n\
31 subs r2, r2, #1 @ 1\n\
32 stmia %1!, {r3, r4, ip, lr} @ 4\n\
33 ldmneia %0!, {r3, r4, ip, lr} @ 4\n\
34 bne 1b @ 1\n\
35 ldmfd sp!, {r4, pc} @ 3"
36 :
37 : "r" (kfrom), "r" (kto), "I" (PAGE_SIZE / 64));
38}
39
40void v3_copy_user_highpage(struct page *to, struct page *from,
41 unsigned long vaddr)
42{
43 void *kto, *kfrom;
44
45 kto = kmap_atomic(to, KM_USER0);
46 kfrom = kmap_atomic(from, KM_USER1);
47 v3_copy_user_page(kto, kfrom);
48 kunmap_atomic(kfrom, KM_USER1);
49 kunmap_atomic(kto, KM_USER0);
50}
51
52/*
53 * ARMv3 optimised clear_user_page
54 *
55 * FIXME: do we need to handle cache stuff...
56 */
57void v3_clear_user_highpage(struct page *page, unsigned long vaddr)
58{
59 void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
60 asm volatile("\n\
61 mov r1, %2 @ 1\n\
62 mov r2, #0 @ 1\n\
63 mov r3, #0 @ 1\n\
64 mov ip, #0 @ 1\n\
65 mov lr, #0 @ 1\n\
661: stmia %0!, {r2, r3, ip, lr} @ 4\n\
67 stmia %0!, {r2, r3, ip, lr} @ 4\n\
68 stmia %0!, {r2, r3, ip, lr} @ 4\n\
69 stmia %0!, {r2, r3, ip, lr} @ 4\n\
70 subs r1, r1, #1 @ 1\n\
71 bne 1b @ 1"
72 : "=r" (ptr)
73 : "0" (kaddr), "I" (PAGE_SIZE / 64)
74 : "r1", "r2", "r3", "ip", "lr");
75 kunmap_atomic(kaddr, KM_USER0);
76}
77
78struct cpu_user_fns v3_user_fns __initdata = {
79 .cpu_clear_user_highpage = v3_clear_user_highpage,
80 .cpu_copy_user_highpage = v3_copy_user_highpage,
81};
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index 8d33e2549344..bdb5fd983b15 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -15,8 +15,8 @@
15 */ 15 */
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/highmem.h>
18 19
19#include <asm/page.h>
20#include <asm/pgtable.h> 20#include <asm/pgtable.h>
21#include <asm/tlbflush.h> 21#include <asm/tlbflush.h>
22#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
@@ -33,7 +33,7 @@
33static DEFINE_SPINLOCK(minicache_lock); 33static DEFINE_SPINLOCK(minicache_lock);
34 34
35/* 35/*
36 * ARMv4 mini-dcache optimised copy_user_page 36 * ARMv4 mini-dcache optimised copy_user_highpage
37 * 37 *
38 * We flush the destination cache lines just before we write the data into the 38 * We flush the destination cache lines just before we write the data into the
39 * corresponding address. Since the Dcache is read-allocate, this removes the 39 * corresponding address. Since the Dcache is read-allocate, this removes the
@@ -42,7 +42,7 @@ static DEFINE_SPINLOCK(minicache_lock);
42 * 42 *
43 * Note: We rely on all ARMv4 processors implementing the "invalidate D line" 43 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
44 * instruction. If your processor does not supply this, you have to write your 44 * instruction. If your processor does not supply this, you have to write your
45 * own copy_user_page that does the right thing. 45 * own copy_user_highpage that does the right thing.
46 */ 46 */
47static void __attribute__((naked)) 47static void __attribute__((naked))
48mc_copy_user_page(void *from, void *to) 48mc_copy_user_page(void *from, void *to)
@@ -68,50 +68,53 @@ mc_copy_user_page(void *from, void *to)
68 : "r" (from), "r" (to), "I" (PAGE_SIZE / 64)); 68 : "r" (from), "r" (to), "I" (PAGE_SIZE / 64));
69} 69}
70 70
71void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr) 71void v4_mc_copy_user_highpage(struct page *from, struct page *to,
72 unsigned long vaddr)
72{ 73{
73 struct page *page = virt_to_page(kfrom); 74 void *kto = kmap_atomic(to, KM_USER1);
74 75
75 if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) 76 if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
76 __flush_dcache_page(page_mapping(page), page); 77 __flush_dcache_page(page_mapping(from), from);
77 78
78 spin_lock(&minicache_lock); 79 spin_lock(&minicache_lock);
79 80
80 set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0); 81 set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
81 flush_tlb_kernel_page(0xffff8000); 82 flush_tlb_kernel_page(0xffff8000);
82 83
83 mc_copy_user_page((void *)0xffff8000, kto); 84 mc_copy_user_page((void *)0xffff8000, kto);
84 85
85 spin_unlock(&minicache_lock); 86 spin_unlock(&minicache_lock);
87
88 kunmap_atomic(kto, KM_USER1);
86} 89}
87 90
88/* 91/*
89 * ARMv4 optimised clear_user_page 92 * ARMv4 optimised clear_user_page
90 */ 93 */
91void __attribute__((naked)) 94void v4_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
92v4_mc_clear_user_page(void *kaddr, unsigned long vaddr)
93{ 95{
94 asm volatile( 96 void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
95 "str lr, [sp, #-4]!\n\ 97 asm volatile("\
96 mov r1, %0 @ 1\n\ 98 mov r1, %2 @ 1\n\
97 mov r2, #0 @ 1\n\ 99 mov r2, #0 @ 1\n\
98 mov r3, #0 @ 1\n\ 100 mov r3, #0 @ 1\n\
99 mov ip, #0 @ 1\n\ 101 mov ip, #0 @ 1\n\
100 mov lr, #0 @ 1\n\ 102 mov lr, #0 @ 1\n\
1011: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ 1031: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\
102 stmia r0!, {r2, r3, ip, lr} @ 4\n\ 104 stmia %0!, {r2, r3, ip, lr} @ 4\n\
103 stmia r0!, {r2, r3, ip, lr} @ 4\n\ 105 stmia %0!, {r2, r3, ip, lr} @ 4\n\
104 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ 106 mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\
105 stmia r0!, {r2, r3, ip, lr} @ 4\n\ 107 stmia %0!, {r2, r3, ip, lr} @ 4\n\
106 stmia r0!, {r2, r3, ip, lr} @ 4\n\ 108 stmia %0!, {r2, r3, ip, lr} @ 4\n\
107 subs r1, r1, #1 @ 1\n\ 109 subs r1, r1, #1 @ 1\n\
108 bne 1b @ 1\n\ 110 bne 1b @ 1"
109 ldr pc, [sp], #4" 111 : "=r" (ptr)
110 : 112 : "0" (kaddr), "I" (PAGE_SIZE / 64)
111 : "I" (PAGE_SIZE / 64)); 113 : "r1", "r2", "r3", "ip", "lr");
114 kunmap_atomic(kaddr, KM_USER0);
112} 115}
113 116
114struct cpu_user_fns v4_mc_user_fns __initdata = { 117struct cpu_user_fns v4_mc_user_fns __initdata = {
115 .cpu_clear_user_page = v4_mc_clear_user_page, 118 .cpu_clear_user_highpage = v4_mc_clear_user_highpage,
116 .cpu_copy_user_page = v4_mc_copy_user_page, 119 .cpu_copy_user_highpage = v4_mc_copy_user_highpage,
117}; 120};
diff --git a/arch/arm/mm/copypage-v4wb.S b/arch/arm/mm/copypage-v4wb.S
deleted file mode 100644
index 83117354b1cd..000000000000
--- a/arch/arm/mm/copypage-v4wb.S
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * linux/arch/arm/lib/copypage.S
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * ASM optimised string functions
11 */
12#include <linux/linkage.h>
13#include <linux/init.h>
14#include <asm/asm-offsets.h>
15
16 .text
17 .align 5
18/*
19 * ARMv4 optimised copy_user_page
20 *
21 * We flush the destination cache lines just before we write the data into the
22 * corresponding address. Since the Dcache is read-allocate, this removes the
23 * Dcache aliasing issue. The writes will be forwarded to the write buffer,
24 * and merged as appropriate.
25 *
26 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
27 * instruction. If your processor does not supply this, you have to write your
28 * own copy_user_page that does the right thing.
29 */
30ENTRY(v4wb_copy_user_page)
31 stmfd sp!, {r4, lr} @ 2
32 mov r2, #PAGE_SZ/64 @ 1
33 ldmia r1!, {r3, r4, ip, lr} @ 4
341: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
35 stmia r0!, {r3, r4, ip, lr} @ 4
36 ldmia r1!, {r3, r4, ip, lr} @ 4+1
37 stmia r0!, {r3, r4, ip, lr} @ 4
38 ldmia r1!, {r3, r4, ip, lr} @ 4
39 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
40 stmia r0!, {r3, r4, ip, lr} @ 4
41 ldmia r1!, {r3, r4, ip, lr} @ 4
42 subs r2, r2, #1 @ 1
43 stmia r0!, {r3, r4, ip, lr} @ 4
44 ldmneia r1!, {r3, r4, ip, lr} @ 4
45 bne 1b @ 1
46 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB
47 ldmfd sp!, {r4, pc} @ 3
48
49 .align 5
50/*
51 * ARMv4 optimised clear_user_page
52 *
53 * Same story as above.
54 */
55ENTRY(v4wb_clear_user_page)
56 str lr, [sp, #-4]!
57 mov r1, #PAGE_SZ/64 @ 1
58 mov r2, #0 @ 1
59 mov r3, #0 @ 1
60 mov ip, #0 @ 1
61 mov lr, #0 @ 1
621: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
63 stmia r0!, {r2, r3, ip, lr} @ 4
64 stmia r0!, {r2, r3, ip, lr} @ 4
65 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
66 stmia r0!, {r2, r3, ip, lr} @ 4
67 stmia r0!, {r2, r3, ip, lr} @ 4
68 subs r1, r1, #1 @ 1
69 bne 1b @ 1
70 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB
71 ldr pc, [sp], #4
72
73 __INITDATA
74
75 .type v4wb_user_fns, #object
76ENTRY(v4wb_user_fns)
77 .long v4wb_clear_user_page
78 .long v4wb_copy_user_page
79 .size v4wb_user_fns, . - v4wb_user_fns
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c
new file mode 100644
index 000000000000..3ec93dab7656
--- /dev/null
+++ b/arch/arm/mm/copypage-v4wb.c
@@ -0,0 +1,94 @@
1/*
2 * linux/arch/arm/mm/copypage-v4wb.c
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/init.h>
11#include <linux/highmem.h>
12
13/*
14 * ARMv4 optimised copy_user_highpage
15 *
16 * We flush the destination cache lines just before we write the data into the
17 * corresponding address. Since the Dcache is read-allocate, this removes the
18 * Dcache aliasing issue. The writes will be forwarded to the write buffer,
19 * and merged as appropriate.
20 *
21 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
22 * instruction. If your processor does not supply this, you have to write your
23 * own copy_user_highpage that does the right thing.
24 */
25static void __attribute__((naked))
26v4wb_copy_user_page(void *kto, const void *kfrom)
27{
28 asm("\
29 stmfd sp!, {r4, lr} @ 2\n\
30 mov r2, %0 @ 1\n\
31 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
321: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
33 stmia r0!, {r3, r4, ip, lr} @ 4\n\
34 ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
35 stmia r0!, {r3, r4, ip, lr} @ 4\n\
36 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
37 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
38 stmia r0!, {r3, r4, ip, lr} @ 4\n\
39 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
40 subs r2, r2, #1 @ 1\n\
41 stmia r0!, {r3, r4, ip, lr} @ 4\n\
42 ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
43 bne 1b @ 1\n\
44 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
45 ldmfd sp!, {r4, pc} @ 3"
46 :
47 : "I" (PAGE_SIZE / 64));
48}
49
50void v4wb_copy_user_highpage(struct page *to, struct page *from,
51 unsigned long vaddr)
52{
53 void *kto, *kfrom;
54
55 kto = kmap_atomic(to, KM_USER0);
56 kfrom = kmap_atomic(from, KM_USER1);
57 v4wb_copy_user_page(kto, kfrom);
58 kunmap_atomic(kfrom, KM_USER1);
59 kunmap_atomic(kto, KM_USER0);
60}
61
62/*
63 * ARMv4 optimised clear_user_page
64 *
65 * Same story as above.
66 */
67void v4wb_clear_user_highpage(struct page *page, unsigned long vaddr)
68{
69 void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
70 asm volatile("\
71 mov r1, %2 @ 1\n\
72 mov r2, #0 @ 1\n\
73 mov r3, #0 @ 1\n\
74 mov ip, #0 @ 1\n\
75 mov lr, #0 @ 1\n\
761: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\
77 stmia %0!, {r2, r3, ip, lr} @ 4\n\
78 stmia %0!, {r2, r3, ip, lr} @ 4\n\
79 mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\
80 stmia %0!, {r2, r3, ip, lr} @ 4\n\
81 stmia %0!, {r2, r3, ip, lr} @ 4\n\
82 subs r1, r1, #1 @ 1\n\
83 bne 1b @ 1\n\
84 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB"
85 : "=r" (ptr)
86 : "0" (kaddr), "I" (PAGE_SIZE / 64)
87 : "r1", "r2", "r3", "ip", "lr");
88 kunmap_atomic(kaddr, KM_USER0);
89}
90
91struct cpu_user_fns v4wb_user_fns __initdata = {
92 .cpu_clear_user_highpage = v4wb_clear_user_highpage,
93 .cpu_copy_user_highpage = v4wb_copy_user_highpage,
94};
diff --git a/arch/arm/mm/copypage-v4wt.S b/arch/arm/mm/copypage-v4wt.S
deleted file mode 100644
index e1f2af28d549..000000000000
--- a/arch/arm/mm/copypage-v4wt.S
+++ /dev/null
@@ -1,73 +0,0 @@
1/*
2 * linux/arch/arm/lib/copypage-v4.S
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * ASM optimised string functions
11 *
12 * This is for CPUs with a writethrough cache and 'flush ID cache' is
13 * the only supported cache operation.
14 */
15#include <linux/linkage.h>
16#include <linux/init.h>
17#include <asm/asm-offsets.h>
18
19 .text
20 .align 5
21/*
22 * ARMv4 optimised copy_user_page
23 *
24 * Since we have writethrough caches, we don't have to worry about
25 * dirty data in the cache. However, we do have to ensure that
26 * subsequent reads are up to date.
27 */
28ENTRY(v4wt_copy_user_page)
29 stmfd sp!, {r4, lr} @ 2
30 mov r2, #PAGE_SZ/64 @ 1
31 ldmia r1!, {r3, r4, ip, lr} @ 4
321: stmia r0!, {r3, r4, ip, lr} @ 4
33 ldmia r1!, {r3, r4, ip, lr} @ 4+1
34 stmia r0!, {r3, r4, ip, lr} @ 4
35 ldmia r1!, {r3, r4, ip, lr} @ 4
36 stmia r0!, {r3, r4, ip, lr} @ 4
37 ldmia r1!, {r3, r4, ip, lr} @ 4
38 subs r2, r2, #1 @ 1
39 stmia r0!, {r3, r4, ip, lr} @ 4
40 ldmneia r1!, {r3, r4, ip, lr} @ 4
41 bne 1b @ 1
42 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache
43 ldmfd sp!, {r4, pc} @ 3
44
45 .align 5
46/*
47 * ARMv4 optimised clear_user_page
48 *
49 * Same story as above.
50 */
51ENTRY(v4wt_clear_user_page)
52 str lr, [sp, #-4]!
53 mov r1, #PAGE_SZ/64 @ 1
54 mov r2, #0 @ 1
55 mov r3, #0 @ 1
56 mov ip, #0 @ 1
57 mov lr, #0 @ 1
581: stmia r0!, {r2, r3, ip, lr} @ 4
59 stmia r0!, {r2, r3, ip, lr} @ 4
60 stmia r0!, {r2, r3, ip, lr} @ 4
61 stmia r0!, {r2, r3, ip, lr} @ 4
62 subs r1, r1, #1 @ 1
63 bne 1b @ 1
64 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache
65 ldr pc, [sp], #4
66
67 __INITDATA
68
69 .type v4wt_user_fns, #object
70ENTRY(v4wt_user_fns)
71 .long v4wt_clear_user_page
72 .long v4wt_copy_user_page
73 .size v4wt_user_fns, . - v4wt_user_fns
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c
new file mode 100644
index 000000000000..0f1188efae45
--- /dev/null
+++ b/arch/arm/mm/copypage-v4wt.c
@@ -0,0 +1,88 @@
1/*
2 * linux/arch/arm/mm/copypage-v4wt.S
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This is for CPUs with a writethrough cache and 'flush ID cache' is
11 * the only supported cache operation.
12 */
13#include <linux/init.h>
14#include <linux/highmem.h>
15
16/*
17 * ARMv4 optimised copy_user_highpage
18 *
19 * Since we have writethrough caches, we don't have to worry about
20 * dirty data in the cache. However, we do have to ensure that
21 * subsequent reads are up to date.
22 */
23static void __attribute__((naked))
24v4wt_copy_user_page(void *kto, const void *kfrom)
25{
26 asm("\
27 stmfd sp!, {r4, lr} @ 2\n\
28 mov r2, %0 @ 1\n\
29 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
301: stmia r0!, {r3, r4, ip, lr} @ 4\n\
31 ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
32 stmia r0!, {r3, r4, ip, lr} @ 4\n\
33 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
34 stmia r0!, {r3, r4, ip, lr} @ 4\n\
35 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
36 subs r2, r2, #1 @ 1\n\
37 stmia r0!, {r3, r4, ip, lr} @ 4\n\
38 ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
39 bne 1b @ 1\n\
40 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
41 ldmfd sp!, {r4, pc} @ 3"
42 :
43 : "I" (PAGE_SIZE / 64));
44}
45
46void v4wt_copy_user_highpage(struct page *to, struct page *from,
47 unsigned long vaddr)
48{
49 void *kto, *kfrom;
50
51 kto = kmap_atomic(to, KM_USER0);
52 kfrom = kmap_atomic(from, KM_USER1);
53 v4wt_copy_user_page(kto, kfrom);
54 kunmap_atomic(kfrom, KM_USER1);
55 kunmap_atomic(kto, KM_USER0);
56}
57
58/*
59 * ARMv4 optimised clear_user_page
60 *
61 * Same story as above.
62 */
63void v4wt_clear_user_highpage(struct page *page, unsigned long vaddr)
64{
65 void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
66 asm volatile("\
67 mov r1, %2 @ 1\n\
68 mov r2, #0 @ 1\n\
69 mov r3, #0 @ 1\n\
70 mov ip, #0 @ 1\n\
71 mov lr, #0 @ 1\n\
721: stmia %0!, {r2, r3, ip, lr} @ 4\n\
73 stmia %0!, {r2, r3, ip, lr} @ 4\n\
74 stmia %0!, {r2, r3, ip, lr} @ 4\n\
75 stmia %0!, {r2, r3, ip, lr} @ 4\n\
76 subs r1, r1, #1 @ 1\n\
77 bne 1b @ 1\n\
78 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache"
79 : "=r" (ptr)
80 : "0" (kaddr), "I" (PAGE_SIZE / 64)
81 : "r1", "r2", "r3", "ip", "lr");
82 kunmap_atomic(kaddr, KM_USER0);
83}
84
85struct cpu_user_fns v4wt_user_fns __initdata = {
86 .cpu_clear_user_highpage = v4wt_clear_user_highpage,
87 .cpu_copy_user_highpage = v4wt_copy_user_highpage,
88};
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 0e21c0767580..4127a7bddfe5 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -10,8 +10,8 @@
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/spinlock.h> 11#include <linux/spinlock.h>
12#include <linux/mm.h> 12#include <linux/mm.h>
13#include <linux/highmem.h>
13 14
14#include <asm/page.h>
15#include <asm/pgtable.h> 15#include <asm/pgtable.h>
16#include <asm/shmparam.h> 16#include <asm/shmparam.h>
17#include <asm/tlbflush.h> 17#include <asm/tlbflush.h>
@@ -33,41 +33,56 @@ static DEFINE_SPINLOCK(v6_lock);
33 * Copy the user page. No aliasing to deal with so we can just 33 * Copy the user page. No aliasing to deal with so we can just
34 * attack the kernel's existing mapping of these pages. 34 * attack the kernel's existing mapping of these pages.
35 */ 35 */
36static void v6_copy_user_page_nonaliasing(void *kto, const void *kfrom, unsigned long vaddr) 36static void v6_copy_user_highpage_nonaliasing(struct page *to,
37 struct page *from, unsigned long vaddr)
37{ 38{
39 void *kto, *kfrom;
40
41 kfrom = kmap_atomic(from, KM_USER0);
42 kto = kmap_atomic(to, KM_USER1);
38 copy_page(kto, kfrom); 43 copy_page(kto, kfrom);
44 kunmap_atomic(kto, KM_USER1);
45 kunmap_atomic(kfrom, KM_USER0);
39} 46}
40 47
41/* 48/*
42 * Clear the user page. No aliasing to deal with so we can just 49 * Clear the user page. No aliasing to deal with so we can just
43 * attack the kernel's existing mapping of this page. 50 * attack the kernel's existing mapping of this page.
44 */ 51 */
45static void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr) 52static void v6_clear_user_highpage_nonaliasing(struct page *page, unsigned long vaddr)
46{ 53{
54 void *kaddr = kmap_atomic(page, KM_USER0);
47 clear_page(kaddr); 55 clear_page(kaddr);
56 kunmap_atomic(kaddr, KM_USER0);
48} 57}
49 58
50/* 59/*
51 * Copy the page, taking account of the cache colour. 60 * Discard data in the kernel mapping for the new page.
61 * FIXME: needs this MCRR to be supported.
52 */ 62 */
53static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr) 63static void discard_old_kernel_data(void *kto)
54{ 64{
55 unsigned int offset = CACHE_COLOUR(vaddr);
56 unsigned long from, to;
57 struct page *page = virt_to_page(kfrom);
58
59 if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
60 __flush_dcache_page(page_mapping(page), page);
61
62 /*
63 * Discard data in the kernel mapping for the new page.
64 * FIXME: needs this MCRR to be supported.
65 */
66 __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06" 65 __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06"
67 : 66 :
68 : "r" (kto), 67 : "r" (kto),
69 "r" ((unsigned long)kto + PAGE_SIZE - L1_CACHE_BYTES) 68 "r" ((unsigned long)kto + PAGE_SIZE - L1_CACHE_BYTES)
70 : "cc"); 69 : "cc");
70}
71
72/*
73 * Copy the page, taking account of the cache colour.
74 */
75static void v6_copy_user_highpage_aliasing(struct page *to,
76 struct page *from, unsigned long vaddr)
77{
78 unsigned int offset = CACHE_COLOUR(vaddr);
79 unsigned long kfrom, kto;
80
81 if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
82 __flush_dcache_page(page_mapping(from), from);
83
84 /* FIXME: not highmem safe */
85 discard_old_kernel_data(page_address(to));
71 86
72 /* 87 /*
73 * Now copy the page using the same cache colour as the 88 * Now copy the page using the same cache colour as the
@@ -75,16 +90,16 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
75 */ 90 */
76 spin_lock(&v6_lock); 91 spin_lock(&v6_lock);
77 92
78 set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, PAGE_KERNEL), 0); 93 set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
79 set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, PAGE_KERNEL), 0); 94 set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
80 95
81 from = from_address + (offset << PAGE_SHIFT); 96 kfrom = from_address + (offset << PAGE_SHIFT);
82 to = to_address + (offset << PAGE_SHIFT); 97 kto = to_address + (offset << PAGE_SHIFT);
83 98
84 flush_tlb_kernel_page(from); 99 flush_tlb_kernel_page(kfrom);
85 flush_tlb_kernel_page(to); 100 flush_tlb_kernel_page(kto);
86 101
87 copy_page((void *)to, (void *)from); 102 copy_page((void *)kto, (void *)kfrom);
88 103
89 spin_unlock(&v6_lock); 104 spin_unlock(&v6_lock);
90} 105}
@@ -94,20 +109,13 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
94 * so remap the kernel page into the same cache colour as the user 109 * so remap the kernel page into the same cache colour as the user
95 * page. 110 * page.
96 */ 111 */
97static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr) 112static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr)
98{ 113{
99 unsigned int offset = CACHE_COLOUR(vaddr); 114 unsigned int offset = CACHE_COLOUR(vaddr);
100 unsigned long to = to_address + (offset << PAGE_SHIFT); 115 unsigned long to = to_address + (offset << PAGE_SHIFT);
101 116
102 /* 117 /* FIXME: not highmem safe */
103 * Discard data in the kernel mapping for the new page 118 discard_old_kernel_data(page_address(page));
104 * FIXME: needs this MCRR to be supported.
105 */
106 __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06"
107 :
108 : "r" (kaddr),
109 "r" ((unsigned long)kaddr + PAGE_SIZE - L1_CACHE_BYTES)
110 : "cc");
111 119
112 /* 120 /*
113 * Now clear the page using the same cache colour as 121 * Now clear the page using the same cache colour as
@@ -115,7 +123,7 @@ static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
115 */ 123 */
116 spin_lock(&v6_lock); 124 spin_lock(&v6_lock);
117 125
118 set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, PAGE_KERNEL), 0); 126 set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
119 flush_tlb_kernel_page(to); 127 flush_tlb_kernel_page(to);
120 clear_page((void *)to); 128 clear_page((void *)to);
121 129
@@ -123,15 +131,15 @@ static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
123} 131}
124 132
125struct cpu_user_fns v6_user_fns __initdata = { 133struct cpu_user_fns v6_user_fns __initdata = {
126 .cpu_clear_user_page = v6_clear_user_page_nonaliasing, 134 .cpu_clear_user_highpage = v6_clear_user_highpage_nonaliasing,
127 .cpu_copy_user_page = v6_copy_user_page_nonaliasing, 135 .cpu_copy_user_highpage = v6_copy_user_highpage_nonaliasing,
128}; 136};
129 137
130static int __init v6_userpage_init(void) 138static int __init v6_userpage_init(void)
131{ 139{
132 if (cache_is_vipt_aliasing()) { 140 if (cache_is_vipt_aliasing()) {
133 cpu_user.cpu_clear_user_page = v6_clear_user_page_aliasing; 141 cpu_user.cpu_clear_user_highpage = v6_clear_user_highpage_aliasing;
134 cpu_user.cpu_copy_user_page = v6_copy_user_page_aliasing; 142 cpu_user.cpu_copy_user_highpage = v6_copy_user_highpage_aliasing;
135 } 143 }
136 144
137 return 0; 145 return 0;
diff --git a/arch/arm/mm/copypage-xsc3.S b/arch/arm/mm/copypage-xsc3.S
deleted file mode 100644
index 9a2cb4332b4c..000000000000
--- a/arch/arm/mm/copypage-xsc3.S
+++ /dev/null
@@ -1,97 +0,0 @@
1/*
2 * linux/arch/arm/lib/copypage-xsc3.S
3 *
4 * Copyright (C) 2004 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Adapted for 3rd gen XScale core, no more mini-dcache
11 * Author: Matt Gilbert (matthew.m.gilbert@intel.com)
12 */
13
14#include <linux/linkage.h>
15#include <linux/init.h>
16#include <asm/asm-offsets.h>
17
18/*
19 * General note:
20 * We don't really want write-allocate cache behaviour for these functions
21 * since that will just eat through 8K of the cache.
22 */
23
24 .text
25 .align 5
26/*
27 * XSC3 optimised copy_user_page
28 * r0 = destination
29 * r1 = source
30 * r2 = virtual user address of ultimate destination page
31 *
32 * The source page may have some clean entries in the cache already, but we
33 * can safely ignore them - break_cow() will flush them out of the cache
34 * if we eventually end up using our copied page.
35 *
36 */
37ENTRY(xsc3_mc_copy_user_page)
38 stmfd sp!, {r4, r5, lr}
39 mov lr, #PAGE_SZ/64-1
40
41 pld [r1, #0]
42 pld [r1, #32]
431: pld [r1, #64]
44 pld [r1, #96]
45
462: ldrd r2, [r1], #8
47 mov ip, r0
48 ldrd r4, [r1], #8
49 mcr p15, 0, ip, c7, c6, 1 @ invalidate
50 strd r2, [r0], #8
51 ldrd r2, [r1], #8
52 strd r4, [r0], #8
53 ldrd r4, [r1], #8
54 strd r2, [r0], #8
55 strd r4, [r0], #8
56 ldrd r2, [r1], #8
57 mov ip, r0
58 ldrd r4, [r1], #8
59 mcr p15, 0, ip, c7, c6, 1 @ invalidate
60 strd r2, [r0], #8
61 ldrd r2, [r1], #8
62 subs lr, lr, #1
63 strd r4, [r0], #8
64 ldrd r4, [r1], #8
65 strd r2, [r0], #8
66 strd r4, [r0], #8
67 bgt 1b
68 beq 2b
69
70 ldmfd sp!, {r4, r5, pc}
71
72 .align 5
73/*
74 * XScale optimised clear_user_page
75 * r0 = destination
76 * r1 = virtual user address of ultimate destination page
77 */
78ENTRY(xsc3_mc_clear_user_page)
79 mov r1, #PAGE_SZ/32
80 mov r2, #0
81 mov r3, #0
821: mcr p15, 0, r0, c7, c6, 1 @ invalidate line
83 strd r2, [r0], #8
84 strd r2, [r0], #8
85 strd r2, [r0], #8
86 strd r2, [r0], #8
87 subs r1, r1, #1
88 bne 1b
89 mov pc, lr
90
91 __INITDATA
92
93 .type xsc3_mc_user_fns, #object
94ENTRY(xsc3_mc_user_fns)
95 .long xsc3_mc_clear_user_page
96 .long xsc3_mc_copy_user_page
97 .size xsc3_mc_user_fns, . - xsc3_mc_user_fns
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c
new file mode 100644
index 000000000000..39a994542cad
--- /dev/null
+++ b/arch/arm/mm/copypage-xsc3.c
@@ -0,0 +1,113 @@
1/*
2 * linux/arch/arm/mm/copypage-xsc3.S
3 *
4 * Copyright (C) 2004 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Adapted for 3rd gen XScale core, no more mini-dcache
11 * Author: Matt Gilbert (matthew.m.gilbert@intel.com)
12 */
13#include <linux/init.h>
14#include <linux/highmem.h>
15
16/*
17 * General note:
18 * We don't really want write-allocate cache behaviour for these functions
19 * since that will just eat through 8K of the cache.
20 */
21
22/*
23 * XSC3 optimised copy_user_highpage
24 * r0 = destination
25 * r1 = source
26 *
27 * The source page may have some clean entries in the cache already, but we
28 * can safely ignore them - break_cow() will flush them out of the cache
29 * if we eventually end up using our copied page.
30 *
31 */
32static void __attribute__((naked))
33xsc3_mc_copy_user_page(void *kto, const void *kfrom)
34{
35 asm("\
36 stmfd sp!, {r4, r5, lr} \n\
37 mov lr, %0 \n\
38 \n\
39 pld [r1, #0] \n\
40 pld [r1, #32] \n\
411: pld [r1, #64] \n\
42 pld [r1, #96] \n\
43 \n\
442: ldrd r2, [r1], #8 \n\
45 mov ip, r0 \n\
46 ldrd r4, [r1], #8 \n\
47 mcr p15, 0, ip, c7, c6, 1 @ invalidate\n\
48 strd r2, [r0], #8 \n\
49 ldrd r2, [r1], #8 \n\
50 strd r4, [r0], #8 \n\
51 ldrd r4, [r1], #8 \n\
52 strd r2, [r0], #8 \n\
53 strd r4, [r0], #8 \n\
54 ldrd r2, [r1], #8 \n\
55 mov ip, r0 \n\
56 ldrd r4, [r1], #8 \n\
57 mcr p15, 0, ip, c7, c6, 1 @ invalidate\n\
58 strd r2, [r0], #8 \n\
59 ldrd r2, [r1], #8 \n\
60 subs lr, lr, #1 \n\
61 strd r4, [r0], #8 \n\
62 ldrd r4, [r1], #8 \n\
63 strd r2, [r0], #8 \n\
64 strd r4, [r0], #8 \n\
65 bgt 1b \n\
66 beq 2b \n\
67 \n\
68 ldmfd sp!, {r4, r5, pc}"
69 :
70 : "I" (PAGE_SIZE / 64 - 1));
71}
72
73void xsc3_mc_copy_user_highpage(struct page *to, struct page *from,
74 unsigned long vaddr)
75{
76 void *kto, *kfrom;
77
78 kto = kmap_atomic(to, KM_USER0);
79 kfrom = kmap_atomic(from, KM_USER1);
80 xsc3_mc_copy_user_page(kto, kfrom);
81 kunmap_atomic(kfrom, KM_USER1);
82 kunmap_atomic(kto, KM_USER0);
83}
84
85/*
86 * XScale optimised clear_user_page
87 * r0 = destination
88 * r1 = virtual user address of ultimate destination page
89 */
90void xsc3_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
91{
92 void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
93 asm volatile ("\
94 mov r1, %2 \n\
95 mov r2, #0 \n\
96 mov r3, #0 \n\
971: mcr p15, 0, %0, c7, c6, 1 @ invalidate line\n\
98 strd r2, [%0], #8 \n\
99 strd r2, [%0], #8 \n\
100 strd r2, [%0], #8 \n\
101 strd r2, [%0], #8 \n\
102 subs r1, r1, #1 \n\
103 bne 1b"
104 : "=r" (ptr)
105 : "0" (kaddr), "I" (PAGE_SIZE / 32)
106 : "r1", "r2", "r3");
107 kunmap_atomic(kaddr, KM_USER0);
108}
109
110struct cpu_user_fns xsc3_mc_user_fns __initdata = {
111 .cpu_clear_user_highpage = xsc3_mc_clear_user_highpage,
112 .cpu_copy_user_highpage = xsc3_mc_copy_user_highpage,
113};
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index bad49331bbf9..d18f2397ee2d 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -15,8 +15,8 @@
15 */ 15 */
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/highmem.h>
18 19
19#include <asm/page.h>
20#include <asm/pgtable.h> 20#include <asm/pgtable.h>
21#include <asm/tlbflush.h> 21#include <asm/tlbflush.h>
22#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
@@ -35,7 +35,7 @@
35static DEFINE_SPINLOCK(minicache_lock); 35static DEFINE_SPINLOCK(minicache_lock);
36 36
37/* 37/*
38 * XScale mini-dcache optimised copy_user_page 38 * XScale mini-dcache optimised copy_user_highpage
39 * 39 *
40 * We flush the destination cache lines just before we write the data into the 40 * We flush the destination cache lines just before we write the data into the
41 * corresponding address. Since the Dcache is read-allocate, this removes the 41 * corresponding address. Since the Dcache is read-allocate, this removes the
@@ -90,48 +90,53 @@ mc_copy_user_page(void *from, void *to)
90 : "r" (from), "r" (to), "I" (PAGE_SIZE / 64 - 1)); 90 : "r" (from), "r" (to), "I" (PAGE_SIZE / 64 - 1));
91} 91}
92 92
93void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr) 93void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
94 unsigned long vaddr)
94{ 95{
95 struct page *page = virt_to_page(kfrom); 96 void *kto = kmap_atomic(to, KM_USER1);
96 97
97 if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) 98 if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
98 __flush_dcache_page(page_mapping(page), page); 99 __flush_dcache_page(page_mapping(from), from);
99 100
100 spin_lock(&minicache_lock); 101 spin_lock(&minicache_lock);
101 102
102 set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0); 103 set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
103 flush_tlb_kernel_page(COPYPAGE_MINICACHE); 104 flush_tlb_kernel_page(COPYPAGE_MINICACHE);
104 105
105 mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto); 106 mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
106 107
107 spin_unlock(&minicache_lock); 108 spin_unlock(&minicache_lock);
109
110 kunmap_atomic(kto, KM_USER1);
108} 111}
109 112
110/* 113/*
111 * XScale optimised clear_user_page 114 * XScale optimised clear_user_page
112 */ 115 */
113void __attribute__((naked)) 116void
114xscale_mc_clear_user_page(void *kaddr, unsigned long vaddr) 117xscale_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
115{ 118{
119 void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
116 asm volatile( 120 asm volatile(
117 "mov r1, %0 \n\ 121 "mov r1, %2 \n\
118 mov r2, #0 \n\ 122 mov r2, #0 \n\
119 mov r3, #0 \n\ 123 mov r3, #0 \n\
1201: mov ip, r0 \n\ 1241: mov ip, %0 \n\
121 strd r2, [r0], #8 \n\ 125 strd r2, [%0], #8 \n\
122 strd r2, [r0], #8 \n\ 126 strd r2, [%0], #8 \n\
123 strd r2, [r0], #8 \n\ 127 strd r2, [%0], #8 \n\
124 strd r2, [r0], #8 \n\ 128 strd r2, [%0], #8 \n\
125 mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\ 129 mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\
126 subs r1, r1, #1 \n\ 130 subs r1, r1, #1 \n\
127 mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\ 131 mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\
128 bne 1b \n\ 132 bne 1b"
129 mov pc, lr" 133 : "=r" (ptr)
130 : 134 : "0" (kaddr), "I" (PAGE_SIZE / 32)
131 : "I" (PAGE_SIZE / 32)); 135 : "r1", "r2", "r3", "ip");
136 kunmap_atomic(kaddr, KM_USER0);
132} 137}
133 138
134struct cpu_user_fns xscale_mc_user_fns __initdata = { 139struct cpu_user_fns xscale_mc_user_fns __initdata = {
135 .cpu_clear_user_page = xscale_mc_clear_user_page, 140 .cpu_clear_user_highpage = xscale_mc_clear_user_highpage,
136 .cpu_copy_user_page = xscale_mc_copy_user_page, 141 .cpu_copy_user_highpage = xscale_mc_copy_user_highpage,
137}; 142};
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 2df8d9facf57..ffd8b228a139 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/kprobes.h> 15#include <linux/kprobes.h>
16#include <linux/uaccess.h> 16#include <linux/uaccess.h>
17#include <linux/page-flags.h>
17 18
18#include <asm/system.h> 19#include <asm/system.h>
19#include <asm/pgtable.h> 20#include <asm/pgtable.h>
@@ -83,13 +84,14 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
83 break; 84 break;
84 } 85 }
85 86
86#ifndef CONFIG_HIGHMEM
87 /* We must not map this if we have highmem enabled */ 87 /* We must not map this if we have highmem enabled */
88 if (PageHighMem(pfn_to_page(pmd_val(*pmd) >> PAGE_SHIFT)))
89 break;
90
88 pte = pte_offset_map(pmd, addr); 91 pte = pte_offset_map(pmd, addr);
89 printk(", *pte=%08lx", pte_val(*pte)); 92 printk(", *pte=%08lx", pte_val(*pte));
90 printk(", *ppte=%08lx", pte_val(pte[-PTRS_PER_PTE])); 93 printk(", *ppte=%08lx", pte_val(pte[-PTRS_PER_PTE]));
91 pte_unmap(pte); 94 pte_unmap(pte);
92#endif
93 } while(0); 95 } while(0);
94 96
95 printk("\n"); 97 printk("\n");
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 82c4b4217989..34df4d9d03a6 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -17,6 +17,7 @@
17#include <linux/initrd.h> 17#include <linux/initrd.h>
18 18
19#include <asm/mach-types.h> 19#include <asm/mach-types.h>
20#include <asm/sections.h>
20#include <asm/setup.h> 21#include <asm/setup.h>
21#include <asm/sizes.h> 22#include <asm/sizes.h>
22#include <asm/tlb.h> 23#include <asm/tlb.h>
@@ -64,10 +65,11 @@ static int __init parse_tag_initrd2(const struct tag *tag)
64__tagtable(ATAG_INITRD2, parse_tag_initrd2); 65__tagtable(ATAG_INITRD2, parse_tag_initrd2);
65 66
66/* 67/*
67 * This is used to pass memory configuration data from paging_init 68 * This keeps memory configuration data used by a couple memory
68 * to mem_init, and by show_mem() to skip holes in the memory map. 69 * initialization functions, as well as show_mem() for the skipping
70 * of holes in the memory map. It is populated by arm_add_memory().
69 */ 71 */
70static struct meminfo meminfo = { 0, }; 72struct meminfo meminfo;
71 73
72void show_mem(void) 74void show_mem(void)
73{ 75{
@@ -128,7 +130,7 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
128{ 130{
129 unsigned int start_pfn, i, bootmap_pfn; 131 unsigned int start_pfn, i, bootmap_pfn;
130 132
131 start_pfn = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT; 133 start_pfn = PAGE_ALIGN(__pa(_end)) >> PAGE_SHIFT;
132 bootmap_pfn = 0; 134 bootmap_pfn = 0;
133 135
134 for_each_nodebank(i, mi, node) { 136 for_each_nodebank(i, mi, node) {
@@ -331,13 +333,12 @@ static void __init bootmem_free_node(int node, struct meminfo *mi)
331 free_area_init_node(node, zone_size, start_pfn, zhole_size); 333 free_area_init_node(node, zone_size, start_pfn, zhole_size);
332} 334}
333 335
334void __init bootmem_init(struct meminfo *mi) 336void __init bootmem_init(void)
335{ 337{
338 struct meminfo *mi = &meminfo;
336 unsigned long memend_pfn = 0; 339 unsigned long memend_pfn = 0;
337 int node, initrd_node; 340 int node, initrd_node;
338 341
339 memcpy(&meminfo, mi, sizeof(meminfo));
340
341 /* 342 /*
342 * Locate which node contains the ramdisk image, if any. 343 * Locate which node contains the ramdisk image, if any.
343 */ 344 */
@@ -394,20 +395,22 @@ void __init bootmem_init(struct meminfo *mi)
394 max_pfn = max_low_pfn = memend_pfn - PHYS_PFN_OFFSET; 395 max_pfn = max_low_pfn = memend_pfn - PHYS_PFN_OFFSET;
395} 396}
396 397
397static inline void free_area(unsigned long addr, unsigned long end, char *s) 398static inline int free_area(unsigned long pfn, unsigned long end, char *s)
398{ 399{
399 unsigned int size = (end - addr) >> 10; 400 unsigned int pages = 0, size = (end - pfn) << (PAGE_SHIFT - 10);
400 401
401 for (; addr < end; addr += PAGE_SIZE) { 402 for (; pfn < end; pfn++) {
402 struct page *page = virt_to_page(addr); 403 struct page *page = pfn_to_page(pfn);
403 ClearPageReserved(page); 404 ClearPageReserved(page);
404 init_page_count(page); 405 init_page_count(page);
405 free_page(addr); 406 __free_page(page);
406 totalram_pages++; 407 pages++;
407 } 408 }
408 409
409 if (size && s) 410 if (size && s)
410 printk(KERN_INFO "Freeing %s memory: %dK\n", s, size); 411 printk(KERN_INFO "Freeing %s memory: %dK\n", s, size);
412
413 return pages;
411} 414}
412 415
413static inline void 416static inline void
@@ -478,13 +481,9 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi)
478 */ 481 */
479void __init mem_init(void) 482void __init mem_init(void)
480{ 483{
481 unsigned int codepages, datapages, initpages; 484 unsigned int codesize, datasize, initsize;
482 int i, node; 485 int i, node;
483 486
484 codepages = &_etext - &_text;
485 datapages = &_end - &__data_start;
486 initpages = &__init_end - &__init_begin;
487
488#ifndef CONFIG_DISCONTIGMEM 487#ifndef CONFIG_DISCONTIGMEM
489 max_mapnr = virt_to_page(high_memory) - mem_map; 488 max_mapnr = virt_to_page(high_memory) - mem_map;
490#endif 489#endif
@@ -501,7 +500,8 @@ void __init mem_init(void)
501 500
502#ifdef CONFIG_SA1111 501#ifdef CONFIG_SA1111
503 /* now that our DMA memory is actually so designated, we can free it */ 502 /* now that our DMA memory is actually so designated, we can free it */
504 free_area(PAGE_OFFSET, (unsigned long)swapper_pg_dir, NULL); 503 totalram_pages += free_area(PHYS_PFN_OFFSET,
504 __phys_to_pfn(__pa(swapper_pg_dir)), NULL);
505#endif 505#endif
506 506
507 /* 507 /*
@@ -509,18 +509,21 @@ void __init mem_init(void)
509 * real number of pages we have in this system 509 * real number of pages we have in this system
510 */ 510 */
511 printk(KERN_INFO "Memory:"); 511 printk(KERN_INFO "Memory:");
512
513 num_physpages = 0; 512 num_physpages = 0;
514 for (i = 0; i < meminfo.nr_banks; i++) { 513 for (i = 0; i < meminfo.nr_banks; i++) {
515 num_physpages += bank_pfn_size(&meminfo.bank[i]); 514 num_physpages += bank_pfn_size(&meminfo.bank[i]);
516 printk(" %ldMB", bank_phys_size(&meminfo.bank[i]) >> 20); 515 printk(" %ldMB", bank_phys_size(&meminfo.bank[i]) >> 20);
517 } 516 }
518
519 printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT)); 517 printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT));
518
519 codesize = _etext - _text;
520 datasize = _end - _data;
521 initsize = __init_end - __init_begin;
522
520 printk(KERN_NOTICE "Memory: %luKB available (%dK code, " 523 printk(KERN_NOTICE "Memory: %luKB available (%dK code, "
521 "%dK data, %dK init)\n", 524 "%dK data, %dK init)\n",
522 (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), 525 (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
523 codepages >> 10, datapages >> 10, initpages >> 10); 526 codesize >> 10, datasize >> 10, initsize >> 10);
524 527
525 if (PAGE_SIZE >= 16384 && num_physpages <= 128) { 528 if (PAGE_SIZE >= 16384 && num_physpages <= 128) {
526 extern int sysctl_overcommit_memory; 529 extern int sysctl_overcommit_memory;
@@ -535,11 +538,10 @@ void __init mem_init(void)
535 538
536void free_initmem(void) 539void free_initmem(void)
537{ 540{
538 if (!machine_is_integrator() && !machine_is_cintegrator()) { 541 if (!machine_is_integrator() && !machine_is_cintegrator())
539 free_area((unsigned long)(&__init_begin), 542 totalram_pages += free_area(__phys_to_pfn(__pa(__init_begin)),
540 (unsigned long)(&__init_end), 543 __phys_to_pfn(__pa(__init_end)),
541 "init"); 544 "init");
542 }
543} 545}
544 546
545#ifdef CONFIG_BLK_DEV_INITRD 547#ifdef CONFIG_BLK_DEV_INITRD
@@ -549,7 +551,9 @@ static int keep_initrd;
549void free_initrd_mem(unsigned long start, unsigned long end) 551void free_initrd_mem(unsigned long start, unsigned long end)
550{ 552{
551 if (!keep_initrd) 553 if (!keep_initrd)
552 free_area(start, end, "initrd"); 554 totalram_pages += free_area(__phys_to_pfn(__pa(start)),
555 __phys_to_pfn(__pa(end)),
556 "initrd");
553} 557}
554 558
555static int __init keepinitrd_setup(char *__unused) 559static int __init keepinitrd_setup(char *__unused)
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 5d9f53907b4e..95bbe112965e 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -32,7 +32,5 @@ struct meminfo;
32struct pglist_data; 32struct pglist_data;
33 33
34void __init create_mapping(struct map_desc *md); 34void __init create_mapping(struct map_desc *md);
35void __init bootmem_init(struct meminfo *mi); 35void __init bootmem_init(void);
36void reserve_node_zero(struct pglist_data *pgdat); 36void reserve_node_zero(struct pglist_data *pgdat);
37
38extern void _text, _stext, _etext, __data_start, _end, __init_begin, __init_end;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 7f36c825718d..2ab5f962a053 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -17,6 +17,7 @@
17 17
18#include <asm/cputype.h> 18#include <asm/cputype.h>
19#include <asm/mach-types.h> 19#include <asm/mach-types.h>
20#include <asm/sections.h>
20#include <asm/setup.h> 21#include <asm/setup.h>
21#include <asm/sizes.h> 22#include <asm/sizes.h>
22#include <asm/tlb.h> 23#include <asm/tlb.h>
@@ -646,61 +647,79 @@ static void __init early_vmalloc(char **arg)
646 "vmalloc area too small, limiting to %luMB\n", 647 "vmalloc area too small, limiting to %luMB\n",
647 vmalloc_reserve >> 20); 648 vmalloc_reserve >> 20);
648 } 649 }
650
651 if (vmalloc_reserve > VMALLOC_END - (PAGE_OFFSET + SZ_32M)) {
652 vmalloc_reserve = VMALLOC_END - (PAGE_OFFSET + SZ_32M);
653 printk(KERN_WARNING
654 "vmalloc area is too big, limiting to %luMB\n",
655 vmalloc_reserve >> 20);
656 }
649} 657}
650__early_param("vmalloc=", early_vmalloc); 658__early_param("vmalloc=", early_vmalloc);
651 659
652#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve) 660#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve)
653 661
654static int __init check_membank_valid(struct membank *mb) 662static void __init sanity_check_meminfo(void)
655{ 663{
656 /* 664 int i, j;
657 * Check whether this memory region has non-zero size or
658 * invalid node number.
659 */
660 if (mb->size == 0 || mb->node >= MAX_NUMNODES)
661 return 0;
662
663 /*
664 * Check whether this memory region would entirely overlap
665 * the vmalloc area.
666 */
667 if (phys_to_virt(mb->start) >= VMALLOC_MIN) {
668 printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "
669 "(vmalloc region overlap).\n",
670 mb->start, mb->start + mb->size - 1);
671 return 0;
672 }
673
674 /*
675 * Check whether this memory region would partially overlap
676 * the vmalloc area.
677 */
678 if (phys_to_virt(mb->start + mb->size) < phys_to_virt(mb->start) ||
679 phys_to_virt(mb->start + mb->size) > VMALLOC_MIN) {
680 unsigned long newsize = VMALLOC_MIN - phys_to_virt(mb->start);
681
682 printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx "
683 "to -%.8lx (vmalloc region overlap).\n",
684 mb->start, mb->start + mb->size - 1,
685 mb->start + newsize - 1);
686 mb->size = newsize;
687 }
688 665
689 return 1; 666 for (i = 0, j = 0; i < meminfo.nr_banks; i++) {
690} 667 struct membank *bank = &meminfo.bank[j];
668 *bank = meminfo.bank[i];
691 669
692static void __init sanity_check_meminfo(struct meminfo *mi) 670#ifdef CONFIG_HIGHMEM
693{ 671 /*
694 int i, j; 672 * Split those memory banks which are partially overlapping
673 * the vmalloc area greatly simplifying things later.
674 */
675 if (__va(bank->start) < VMALLOC_MIN &&
676 bank->size > VMALLOC_MIN - __va(bank->start)) {
677 if (meminfo.nr_banks >= NR_BANKS) {
678 printk(KERN_CRIT "NR_BANKS too low, "
679 "ignoring high memory\n");
680 } else {
681 memmove(bank + 1, bank,
682 (meminfo.nr_banks - i) * sizeof(*bank));
683 meminfo.nr_banks++;
684 i++;
685 bank[1].size -= VMALLOC_MIN - __va(bank->start);
686 bank[1].start = __pa(VMALLOC_MIN - 1) + 1;
687 j++;
688 }
689 bank->size = VMALLOC_MIN - __va(bank->start);
690 }
691#else
692 /*
693 * Check whether this memory bank would entirely overlap
694 * the vmalloc area.
695 */
696 if (__va(bank->start) >= VMALLOC_MIN) {
697 printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "
698 "(vmalloc region overlap).\n",
699 bank->start, bank->start + bank->size - 1);
700 continue;
701 }
695 702
696 for (i = 0, j = 0; i < mi->nr_banks; i++) { 703 /*
697 if (check_membank_valid(&mi->bank[i])) 704 * Check whether this memory bank would partially overlap
698 mi->bank[j++] = mi->bank[i]; 705 * the vmalloc area.
706 */
707 if (__va(bank->start + bank->size) > VMALLOC_MIN ||
708 __va(bank->start + bank->size) < __va(bank->start)) {
709 unsigned long newsize = VMALLOC_MIN - __va(bank->start);
710 printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx "
711 "to -%.8lx (vmalloc region overlap).\n",
712 bank->start, bank->start + bank->size - 1,
713 bank->start + newsize - 1);
714 bank->size = newsize;
715 }
716#endif
717 j++;
699 } 718 }
700 mi->nr_banks = j; 719 meminfo.nr_banks = j;
701} 720}
702 721
703static inline void prepare_page_table(struct meminfo *mi) 722static inline void prepare_page_table(void)
704{ 723{
705 unsigned long addr; 724 unsigned long addr;
706 725
@@ -712,7 +731,7 @@ static inline void prepare_page_table(struct meminfo *mi)
712 731
713#ifdef CONFIG_XIP_KERNEL 732#ifdef CONFIG_XIP_KERNEL
714 /* The XIP kernel is mapped in the module area -- skip over it */ 733 /* The XIP kernel is mapped in the module area -- skip over it */
715 addr = ((unsigned long)&_etext + PGDIR_SIZE - 1) & PGDIR_MASK; 734 addr = ((unsigned long)_etext + PGDIR_SIZE - 1) & PGDIR_MASK;
716#endif 735#endif
717 for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE) 736 for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
718 pmd_clear(pmd_off_k(addr)); 737 pmd_clear(pmd_off_k(addr));
@@ -721,7 +740,7 @@ static inline void prepare_page_table(struct meminfo *mi)
721 * Clear out all the kernel space mappings, except for the first 740 * Clear out all the kernel space mappings, except for the first
722 * memory bank, up to the end of the vmalloc region. 741 * memory bank, up to the end of the vmalloc region.
723 */ 742 */
724 for (addr = __phys_to_virt(mi->bank[0].start + mi->bank[0].size); 743 for (addr = __phys_to_virt(bank_phys_end(&meminfo.bank[0]));
725 addr < VMALLOC_END; addr += PGDIR_SIZE) 744 addr < VMALLOC_END; addr += PGDIR_SIZE)
726 pmd_clear(pmd_off_k(addr)); 745 pmd_clear(pmd_off_k(addr));
727} 746}
@@ -738,10 +757,10 @@ void __init reserve_node_zero(pg_data_t *pgdat)
738 * Note that this can only be in node 0. 757 * Note that this can only be in node 0.
739 */ 758 */
740#ifdef CONFIG_XIP_KERNEL 759#ifdef CONFIG_XIP_KERNEL
741 reserve_bootmem_node(pgdat, __pa(&__data_start), &_end - &__data_start, 760 reserve_bootmem_node(pgdat, __pa(_data), _end - _data,
742 BOOTMEM_DEFAULT); 761 BOOTMEM_DEFAULT);
743#else 762#else
744 reserve_bootmem_node(pgdat, __pa(&_stext), &_end - &_stext, 763 reserve_bootmem_node(pgdat, __pa(_stext), _end - _stext,
745 BOOTMEM_DEFAULT); 764 BOOTMEM_DEFAULT);
746#endif 765#endif
747 766
@@ -820,7 +839,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
820#ifdef CONFIG_XIP_KERNEL 839#ifdef CONFIG_XIP_KERNEL
821 map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK); 840 map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK);
822 map.virtual = MODULES_VADDR; 841 map.virtual = MODULES_VADDR;
823 map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK; 842 map.length = ((unsigned long)_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK;
824 map.type = MT_ROM; 843 map.type = MT_ROM;
825 create_mapping(&map); 844 create_mapping(&map);
826#endif 845#endif
@@ -880,14 +899,14 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
880 * paging_init() sets up the page tables, initialises the zone memory 899 * paging_init() sets up the page tables, initialises the zone memory
881 * maps, and sets up the zero page, bad page and bad page tables. 900 * maps, and sets up the zero page, bad page and bad page tables.
882 */ 901 */
883void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc) 902void __init paging_init(struct machine_desc *mdesc)
884{ 903{
885 void *zero_page; 904 void *zero_page;
886 905
887 build_mem_type_table(); 906 build_mem_type_table();
888 sanity_check_meminfo(mi); 907 sanity_check_meminfo();
889 prepare_page_table(mi); 908 prepare_page_table();
890 bootmem_init(mi); 909 bootmem_init();
891 devicemaps_init(mdesc); 910 devicemaps_init(mdesc);
892 911
893 top_pmd = pmd_off_k(0xffff0000); 912 top_pmd = pmd_off_k(0xffff0000);
@@ -896,7 +915,7 @@ void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
896 * allocate the zero page. Note that we count on this going ok. 915 * allocate the zero page. Note that we count on this going ok.
897 */ 916 */
898 zero_page = alloc_bootmem_low_pages(PAGE_SIZE); 917 zero_page = alloc_bootmem_low_pages(PAGE_SIZE);
899 memzero(zero_page, PAGE_SIZE); 918 memset(zero_page, 0, PAGE_SIZE);
900 empty_zero_page = virt_to_page(zero_page); 919 empty_zero_page = virt_to_page(zero_page);
901 flush_dcache_page(empty_zero_page); 920 flush_dcache_page(empty_zero_page);
902} 921}
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 07b62b238979..ad7bacc693b2 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -10,6 +10,7 @@
10#include <linux/io.h> 10#include <linux/io.h>
11 11
12#include <asm/cacheflush.h> 12#include <asm/cacheflush.h>
13#include <asm/sections.h>
13#include <asm/page.h> 14#include <asm/page.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15 16
@@ -25,10 +26,10 @@ void __init reserve_node_zero(pg_data_t *pgdat)
25 * Note that this can only be in node 0. 26 * Note that this can only be in node 0.
26 */ 27 */
27#ifdef CONFIG_XIP_KERNEL 28#ifdef CONFIG_XIP_KERNEL
28 reserve_bootmem_node(pgdat, __pa(&__data_start), &_end - &__data_start, 29 reserve_bootmem_node(pgdat, __pa(_data), _end - _data,
29 BOOTMEM_DEFAULT); 30 BOOTMEM_DEFAULT);
30#else 31#else
31 reserve_bootmem_node(pgdat, __pa(&_stext), &_end - &_stext, 32 reserve_bootmem_node(pgdat, __pa(_stext), _end - _stext,
32 BOOTMEM_DEFAULT); 33 BOOTMEM_DEFAULT);
33#endif 34#endif
34 35
@@ -41,27 +42,13 @@ void __init reserve_node_zero(pg_data_t *pgdat)
41 BOOTMEM_DEFAULT); 42 BOOTMEM_DEFAULT);
42} 43}
43 44
44static void __init sanity_check_meminfo(struct meminfo *mi)
45{
46 int i, j;
47
48 for (i = 0, j = 0; i < mi->nr_banks; i++) {
49 struct membank *mb = &mi->bank[i];
50
51 if (mb->size != 0 && mb->node < MAX_NUMNODES)
52 mi->bank[j++] = mi->bank[i];
53 }
54 mi->nr_banks = j;
55}
56
57/* 45/*
58 * paging_init() sets up the page tables, initialises the zone memory 46 * paging_init() sets up the page tables, initialises the zone memory
59 * maps, and sets up the zero page, bad page and bad page tables. 47 * maps, and sets up the zero page, bad page and bad page tables.
60 */ 48 */
61void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc) 49void __init paging_init(struct machine_desc *mdesc)
62{ 50{
63 sanity_check_meminfo(mi); 51 bootmem_init();
64 bootmem_init(mi);
65} 52}
66 53
67/* 54/*
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index e0f19ab91163..2690146161ba 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -31,7 +31,7 @@ pgd_t *get_pgd_slow(struct mm_struct *mm)
31 if (!new_pgd) 31 if (!new_pgd)
32 goto no_pgd; 32 goto no_pgd;
33 33
34 memzero(new_pgd, FIRST_KERNEL_PGD_NR * sizeof(pgd_t)); 34 memset(new_pgd, 0, FIRST_KERNEL_PGD_NR * sizeof(pgd_t));
35 35
36 /* 36 /*
37 * Copy over the kernel and IO PGD entries 37 * Copy over the kernel and IO PGD entries
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index 2b5ba396e3a6..4ad3bf291ad3 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -33,8 +33,8 @@ EXPORT_SYMBOL(cpu_cache);
33 33
34#ifdef CONFIG_MMU 34#ifdef CONFIG_MMU
35#ifndef MULTI_USER 35#ifndef MULTI_USER
36EXPORT_SYMBOL(__cpu_clear_user_page); 36EXPORT_SYMBOL(__cpu_clear_user_highpage);
37EXPORT_SYMBOL(__cpu_copy_user_page); 37EXPORT_SYMBOL(__cpu_copy_user_highpage);
38#else 38#else
39EXPORT_SYMBOL(cpu_user); 39EXPORT_SYMBOL(cpu_user);
40#endif 40#endif
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 294943b85973..f0cc599facb7 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -71,6 +71,8 @@ ENTRY(cpu_v6_reset)
71 * IRQs are already disabled. 71 * IRQs are already disabled.
72 */ 72 */
73ENTRY(cpu_v6_do_idle) 73ENTRY(cpu_v6_do_idle)
74 mov r1, #0
75 mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
74 mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt 76 mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt
75 mov pc, lr 77 mov pc, lr
76 78
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 4d3c0a73e7fb..d1ebec42521d 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -20,9 +20,17 @@
20 20
21#define TTB_C (1 << 0) 21#define TTB_C (1 << 0)
22#define TTB_S (1 << 1) 22#define TTB_S (1 << 1)
23#define TTB_RGN_NC (0 << 3)
24#define TTB_RGN_OC_WBWA (1 << 3)
23#define TTB_RGN_OC_WT (2 << 3) 25#define TTB_RGN_OC_WT (2 << 3)
24#define TTB_RGN_OC_WB (3 << 3) 26#define TTB_RGN_OC_WB (3 << 3)
25 27
28#ifndef CONFIG_SMP
29#define TTB_FLAGS TTB_C|TTB_RGN_OC_WB @ mark PTWs cacheable, outer WB
30#else
31#define TTB_FLAGS TTB_C|TTB_S|TTB_RGN_OC_WBWA @ mark PTWs cacheable and shared, outer WBWA
32#endif
33
26ENTRY(cpu_v7_proc_init) 34ENTRY(cpu_v7_proc_init)
27 mov pc, lr 35 mov pc, lr
28ENDPROC(cpu_v7_proc_init) 36ENDPROC(cpu_v7_proc_init)
@@ -55,6 +63,7 @@ ENDPROC(cpu_v7_reset)
55 * IRQs are already disabled. 63 * IRQs are already disabled.
56 */ 64 */
57ENTRY(cpu_v7_do_idle) 65ENTRY(cpu_v7_do_idle)
66 dsb @ WFI may enter a low-power mode
58 wfi 67 wfi
59 mov pc, lr 68 mov pc, lr
60ENDPROC(cpu_v7_do_idle) 69ENDPROC(cpu_v7_do_idle)
@@ -85,7 +94,7 @@ ENTRY(cpu_v7_switch_mm)
85#ifdef CONFIG_MMU 94#ifdef CONFIG_MMU
86 mov r2, #0 95 mov r2, #0
87 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id 96 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id
88 orr r0, r0, #TTB_RGN_OC_WB @ mark PTWs outer cacheable, WB 97 orr r0, r0, #TTB_FLAGS
89 mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID 98 mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID
90 isb 99 isb
911: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 1001: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
@@ -162,6 +171,11 @@ cpu_v7_name:
162 * - cache type register is implemented 171 * - cache type register is implemented
163 */ 172 */
164__v7_setup: 173__v7_setup:
174#ifdef CONFIG_SMP
175 mrc p15, 0, r0, c1, c0, 1 @ Enable SMP/nAMP mode
176 orr r0, r0, #(0x1 << 6)
177 mcr p15, 0, r0, c1, c0, 1
178#endif
165 adr r12, __v7_setup_stack @ the local stack 179 adr r12, __v7_setup_stack @ the local stack
166 stmia r12, {r0-r5, r7, r9, r11, lr} 180 stmia r12, {r0-r5, r7, r9, r11, lr}
167 bl v7_flush_dcache_all 181 bl v7_flush_dcache_all
@@ -174,8 +188,7 @@ __v7_setup:
174#ifdef CONFIG_MMU 188#ifdef CONFIG_MMU
175 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs 189 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs
176 mcr p15, 0, r10, c2, c0, 2 @ TTB control register 190 mcr p15, 0, r10, c2, c0, 2 @ TTB control register
177 orr r4, r4, #TTB_RGN_OC_WB @ mark PTWs outer cacheable, WB 191 orr r4, r4, #TTB_FLAGS
178 mcr p15, 0, r4, c2, c0, 0 @ load TTB0
179 mcr p15, 0, r4, c2, c0, 1 @ load TTB1 192 mcr p15, 0, r4, c2, c0, 1 @ load TTB1
180 mov r10, #0x1f @ domains 0, 1 = manager 193 mov r10, #0x1f @ domains 0, 1 = manager
181 mcr p15, 0, r10, c3, c0, 0 @ load domain access register 194 mcr p15, 0, r10, c3, c0, 0 @ load domain access register
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 8f6cf56c11c0..33515c214b92 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -481,3 +481,28 @@ __xsc3_proc_info:
481 .long xsc3_mc_user_fns 481 .long xsc3_mc_user_fns
482 .long xsc3_cache_fns 482 .long xsc3_cache_fns
483 .size __xsc3_proc_info, . - __xsc3_proc_info 483 .size __xsc3_proc_info, . - __xsc3_proc_info
484
485/* Note: PXA935 changed its implementor ID from Intel to Marvell */
486
487 .type __xsc3_pxa935_proc_info,#object
488__xsc3_pxa935_proc_info:
489 .long 0x56056000
490 .long 0xffffe000
491 .long PMD_TYPE_SECT | \
492 PMD_SECT_BUFFERABLE | \
493 PMD_SECT_CACHEABLE | \
494 PMD_SECT_AP_WRITE | \
495 PMD_SECT_AP_READ
496 .long PMD_TYPE_SECT | \
497 PMD_SECT_AP_WRITE | \
498 PMD_SECT_AP_READ
499 b __xsc3_setup
500 .long cpu_arch_name
501 .long cpu_elf_name
502 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
503 .long cpu_xsc3_name
504 .long xsc3_processor_functions
505 .long v4wbi_tlb_fns
506 .long xsc3_mc_user_fns
507 .long xsc3_cache_fns
508 .size __xsc3_pxa935_proc_info, . - __xsc3_pxa935_proc_info
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b2a7e3fad117..a1612958a59e 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -8,11 +8,13 @@ choice
8 8
9config ARCH_MX2 9config ARCH_MX2
10 bool "MX2-based" 10 bool "MX2-based"
11 select CPU_ARM926T
11 help 12 help
12 This enables support for systems based on the Freescale i.MX2 family 13 This enables support for systems based on the Freescale i.MX2 family
13 14
14config ARCH_MX3 15config ARCH_MX3
15 bool "MX3-based" 16 bool "MX3-based"
17 select CPU_V6
16 help 18 help
17 This enables support for systems based on the Freescale i.MX3 family 19 This enables support for systems based on the Freescale i.MX3 family
18 20
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c
index b296f19fd89a..214274344442 100644
--- a/arch/arm/plat-mxc/dma-mx1-mx2.c
+++ b/arch/arm/plat-mxc/dma-mx1-mx2.c
@@ -34,7 +34,7 @@
34#include <asm/system.h> 34#include <asm/system.h>
35#include <asm/irq.h> 35#include <asm/irq.h>
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <asm/dma.h> 37#include <mach/dma.h>
38#include <mach/dma-mx1-mx2.h> 38#include <mach/dma-mx1-mx2.h>
39 39
40#define DMA_DCR 0x00 /* Control Register */ 40#define DMA_DCR 0x00 /* Control Register */
diff --git a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
index e85fd946116c..6cc6f0c8cb25 100644
--- a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
+++ b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
@@ -22,7 +22,7 @@
22 * MA 02110-1301, USA. 22 * MA 02110-1301, USA.
23 */ 23 */
24 24
25#include <asm/dma.h> 25#include <mach/dma.h>
26 26
27#ifndef __ASM_ARCH_MXC_DMA_H 27#ifndef __ASM_ARCH_MXC_DMA_H
28#define __ASM_ARCH_MXC_DMA_H 28#define __ASM_ARCH_MXC_DMA_H
diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h
deleted file mode 100644
index c822d569a05e..000000000000
--- a/arch/arm/plat-mxc/include/mach/dma.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_DMA_H__
12#define __ASM_ARCH_MXC_DMA_H__
13
14#endif
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h
index 5d4cb1196441..c0cb267e7403 100644
--- a/arch/arm/plat-mxc/include/mach/io.h
+++ b/arch/arm/plat-mxc/include/mach/io.h
@@ -35,8 +35,8 @@ __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
35#endif 35#endif
36 36
37/* io address mapping macro */ 37/* io address mapping macro */
38#define __io(a) ((void __iomem *)(a)) 38#define __io(a) __typesafe_io(a)
39 39
40#define __mem_pci(a) (a) 40#define __mem_pci(a) (a)
41 41
42#endif 42#endif
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
index d7a8d3ebed57..203688e6164e 100644
--- a/arch/arm/plat-mxc/include/mach/memory.h
+++ b/arch/arm/plat-mxc/include/mach/memory.h
@@ -13,17 +13,4 @@
13 13
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15 15
16/*
17 * Virtual view <-> DMA view memory address translations
18 * This macro is used to translate the virtual address to an address
19 * suitable to be passed to set_dma_addr()
20 */
21#define __virt_to_bus(a) __virt_to_phys(a)
22
23/*
24 * Used to convert an address for DMA operations to an address that the
25 * kernel can use.
26 */
27#define __bus_to_virt(a) __phys_to_virt(a)
28
29#endif /* __ASM_ARCH_MXC_MEMORY_H__ */ 16#endif /* __ASM_ARCH_MXC_MEMORY_H__ */
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index a94f0c44ebc8..46d3b0b9ce69 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -14,9 +14,11 @@ config ARCH_OMAP1
14 14
15config ARCH_OMAP2 15config ARCH_OMAP2
16 bool "TI OMAP2" 16 bool "TI OMAP2"
17 select CPU_V6
17 18
18config ARCH_OMAP3 19config ARCH_OMAP3
19 bool "TI OMAP3" 20 bool "TI OMAP3"
21 select CPU_V7
20 22
21endchoice 23endchoice
22 24
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 50f8b4ad9a09..7686b9fa53f2 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -29,7 +29,7 @@
29 29
30#include <asm/system.h> 30#include <asm/system.h>
31#include <mach/hardware.h> 31#include <mach/hardware.h>
32#include <asm/dma.h> 32#include <mach/dma.h>
33 33
34#include <mach/tc.h> 34#include <mach/tc.h>
35 35
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index adc83b7b8205..d92bf7964481 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -42,8 +42,8 @@
42 * We don't actually have real ISA nor PCI buses, but there is so many 42 * We don't actually have real ISA nor PCI buses, but there is so many
43 * drivers out there that might just work if we fake them... 43 * drivers out there that might just work if we fake them...
44 */ 44 */
45#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) 45#define __io(a) __typesafe_io(a)
46#define __mem_pci(a) (a) 46#define __mem_pci(a) (a)
47 47
48/* 48/*
49 * ---------------------------------------------------------------------------- 49 * ----------------------------------------------------------------------------
@@ -51,8 +51,6 @@
51 * ---------------------------------------------------------------------------- 51 * ----------------------------------------------------------------------------
52 */ 52 */
53 53
54#define PCIO_BASE 0
55
56#if defined(CONFIG_ARCH_OMAP1) 54#if defined(CONFIG_ARCH_OMAP1)
57 55
58#define IO_PHYS 0xFFFB0000 56#define IO_PHYS 0xFFFB0000
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
index d40cac60b959..211c9f6619e9 100644
--- a/arch/arm/plat-omap/include/mach/memory.h
+++ b/arch/arm/plat-omap/include/mach/memory.h
@@ -43,18 +43,7 @@
43#endif 43#endif
44 44
45/* 45/*
46 * Conversion between SDRAM and fake PCI bus, used by USB
47 * NOTE: Physical address must be converted to Local Bus address
48 * on OMAP-1510 only
49 */
50
51/*
52 * Bus address is physical address, except for OMAP-1510 Local Bus. 46 * Bus address is physical address, except for OMAP-1510 Local Bus.
53 */
54#define __virt_to_bus(x) __virt_to_phys(x)
55#define __bus_to_virt(x) __phys_to_virt(x)
56
57/*
58 * OMAP-1510 bus address is translated into a Local Bus address if the 47 * OMAP-1510 bus address is translated into a Local Bus address if the
59 * OMAP bus type is lbus. We do the address translation based on the 48 * OMAP bus type is lbus. We do the address translation based on the
60 * device overriding the defaults used in the dma-mapping API. 49 * device overriding the defaults used in the dma-mapping API.
@@ -74,16 +63,16 @@
74 63
75#define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \ 64#define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \
76 (dma_addr_t)virt_to_lbus(page_address(page)) : \ 65 (dma_addr_t)virt_to_lbus(page_address(page)) : \
77 (dma_addr_t)__virt_to_bus(page_address(page));}) 66 (dma_addr_t)__virt_to_phys(page_address(page));})
78 67
79#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ 68#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \
80 lbus_to_virt(addr) : \ 69 lbus_to_virt(addr) : \
81 __bus_to_virt(addr)); }) 70 __phys_to_virt(addr)); })
82 71
83#define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ 72#define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \
84 (dma_addr_t) (is_lbus_device(dev) ? \ 73 (dma_addr_t) (is_lbus_device(dev) ? \
85 virt_to_lbus(__addr) : \ 74 virt_to_lbus(__addr) : \
86 __virt_to_bus(__addr)); }) 75 __virt_to_phys(__addr)); })
87 76
88#endif /* CONFIG_ARCH_OMAP15XX */ 77#endif /* CONFIG_ARCH_OMAP15XX */
89 78
diff --git a/include/asm-arm/plat-s3c/iic.h b/arch/arm/plat-s3c/include/plat/iic.h
index 5106acaa1d0e..5106acaa1d0e 100644
--- a/include/asm-arm/plat-s3c/iic.h
+++ b/arch/arm/plat-s3c/include/plat/iic.h
diff --git a/include/asm-arm/plat-s3c/nand.h b/arch/arm/plat-s3c/include/plat/nand.h
index f4dcd14af059..f4dcd14af059 100644
--- a/include/asm-arm/plat-s3c/nand.h
+++ b/arch/arm/plat-s3c/include/plat/nand.h
diff --git a/include/asm-arm/plat-s3c/regs-ac97.h b/arch/arm/plat-s3c/include/plat/regs-ac97.h
index c3878f7acb83..c3878f7acb83 100644
--- a/include/asm-arm/plat-s3c/regs-ac97.h
+++ b/arch/arm/plat-s3c/include/plat/regs-ac97.h
diff --git a/include/asm-arm/plat-s3c/regs-iic.h b/arch/arm/plat-s3c/include/plat/regs-iic.h
index 2f7c17de8ac8..2f7c17de8ac8 100644
--- a/include/asm-arm/plat-s3c/regs-iic.h
+++ b/arch/arm/plat-s3c/include/plat/regs-iic.h
diff --git a/include/asm-arm/plat-s3c/regs-nand.h b/arch/arm/plat-s3c/include/plat/regs-nand.h
index b2caa4bca270..b2caa4bca270 100644
--- a/include/asm-arm/plat-s3c/regs-nand.h
+++ b/arch/arm/plat-s3c/include/plat/regs-nand.h
diff --git a/include/asm-arm/plat-s3c/regs-rtc.h b/arch/arm/plat-s3c/include/plat/regs-rtc.h
index d5837cf8e402..d5837cf8e402 100644
--- a/include/asm-arm/plat-s3c/regs-rtc.h
+++ b/arch/arm/plat-s3c/include/plat/regs-rtc.h
diff --git a/include/asm-arm/plat-s3c/regs-watchdog.h b/arch/arm/plat-s3c/include/plat/regs-watchdog.h
index 4938492470f7..4938492470f7 100644
--- a/include/asm-arm/plat-s3c/regs-watchdog.h
+++ b/arch/arm/plat-s3c/include/plat/regs-watchdog.h
diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h
index 4df006b9cc10..8a8a927292e0 100644
--- a/arch/arm/plat-s3c/include/plat/uncompress.h
+++ b/arch/arm/plat-s3c/include/plat/uncompress.h
@@ -28,7 +28,7 @@ static void arch_detect_cpu(void);
28/* defines for UART registers */ 28/* defines for UART registers */
29 29
30#include <plat/regs-serial.h> 30#include <plat/regs-serial.h>
31#include <asm/plat-s3c/regs-watchdog.h> 31#include <plat/regs-watchdog.h>
32 32
33/* working in physical space... */ 33/* working in physical space... */
34#undef S3C2410_WDOGREG 34#undef S3C2410_WDOGREG
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c
index 3098736c65d9..3d4837021ac7 100644
--- a/arch/arm/plat-s3c24xx/common-smdk.c
+++ b/arch/arm/plat-s3c24xx/common-smdk.c
@@ -38,7 +38,7 @@
38#include <mach/regs-gpio.h> 38#include <mach/regs-gpio.h>
39#include <mach/leds-gpio.h> 39#include <mach/leds-gpio.h>
40 40
41#include <asm/plat-s3c/nand.h> 41#include <plat/nand.h>
42 42
43#include <plat/common-smdk.h> 43#include <plat/common-smdk.h>
44#include <plat/devs.h> 44#include <plat/devs.h>
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index e93f8bf6d338..adf535aaf43a 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -29,11 +29,11 @@
29#include <asm/irq.h> 29#include <asm/irq.h>
30 30
31#include <plat/regs-serial.h> 31#include <plat/regs-serial.h>
32#include <asm/plat-s3c24xx/udc.h> 32#include <plat/udc.h>
33 33
34#include <plat/devs.h> 34#include <plat/devs.h>
35#include <plat/cpu.h> 35#include <plat/cpu.h>
36#include <asm/plat-s3c24xx/regs-spi.h> 36#include <plat/regs-spi.h>
37 37
38/* Serial port registrations */ 38/* Serial port registrations */
39 39
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 1baf941d1930..63bb22b973e3 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -31,9 +31,8 @@
31#include <asm/system.h> 31#include <asm/system.h>
32#include <asm/irq.h> 32#include <asm/irq.h>
33#include <mach/hardware.h> 33#include <mach/hardware.h>
34#include <asm/dma.h> 34#include <mach/dma.h>
35 35
36#include <asm/mach/dma.h>
37#include <mach/map.h> 36#include <mach/map.h>
38 37
39#include <plat/dma.h> 38#include <plat/dma.h>
@@ -804,7 +803,7 @@ EXPORT_SYMBOL(s3c2410_dma_request);
804 * allowed to go through. 803 * allowed to go through.
805*/ 804*/
806 805
807int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client) 806int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *client)
808{ 807{
809 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); 808 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
810 unsigned long flags; 809 unsigned long flags;
@@ -995,7 +994,7 @@ static int s3c2410_dma_started(struct s3c2410_dma_chan *chan)
995} 994}
996 995
997int 996int
998s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op) 997s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op)
999{ 998{
1000 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); 999 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
1001 1000
@@ -1043,7 +1042,7 @@ EXPORT_SYMBOL(s3c2410_dma_ctrl);
1043 * dcon: base value of the DCONx register 1042 * dcon: base value of the DCONx register
1044*/ 1043*/
1045 1044
1046int s3c2410_dma_config(dmach_t channel, 1045int s3c2410_dma_config(unsigned int channel,
1047 int xferunit, 1046 int xferunit,
1048 int dcon) 1047 int dcon)
1049{ 1048{
@@ -1092,7 +1091,7 @@ int s3c2410_dma_config(dmach_t channel,
1092 1091
1093EXPORT_SYMBOL(s3c2410_dma_config); 1092EXPORT_SYMBOL(s3c2410_dma_config);
1094 1093
1095int s3c2410_dma_setflags(dmach_t channel, unsigned int flags) 1094int s3c2410_dma_setflags(unsigned int channel, unsigned int flags)
1096{ 1095{
1097 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); 1096 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
1098 1097
@@ -1113,7 +1112,7 @@ EXPORT_SYMBOL(s3c2410_dma_setflags);
1113 * irq? 1112 * irq?
1114*/ 1113*/
1115 1114
1116int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn) 1115int s3c2410_dma_set_opfn(unsigned int channel, s3c2410_dma_opfn_t rtn)
1117{ 1116{
1118 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); 1117 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
1119 1118
@@ -1129,7 +1128,7 @@ int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn)
1129 1128
1130EXPORT_SYMBOL(s3c2410_dma_set_opfn); 1129EXPORT_SYMBOL(s3c2410_dma_set_opfn);
1131 1130
1132int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn) 1131int s3c2410_dma_set_buffdone_fn(unsigned int channel, s3c2410_dma_cbfn_t rtn)
1133{ 1132{
1134 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); 1133 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
1135 1134
@@ -1219,7 +1218,7 @@ EXPORT_SYMBOL(s3c2410_dma_devconfig);
1219 * returns the current transfer points for the dma source and destination 1218 * returns the current transfer points for the dma source and destination
1220*/ 1219*/
1221 1220
1222int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst) 1221int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *dst)
1223{ 1222{
1224 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); 1223 struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
1225 1224
diff --git a/include/asm-arm/plat-s3c24xx/mci.h b/arch/arm/plat-s3c24xx/include/plat/mci.h
index 2d0852ac3b27..2d0852ac3b27 100644
--- a/include/asm-arm/plat-s3c24xx/mci.h
+++ b/arch/arm/plat-s3c24xx/include/plat/mci.h
diff --git a/include/asm-arm/plat-s3c24xx/regs-spi.h b/arch/arm/plat-s3c24xx/include/plat/regs-spi.h
index 2b35479ee35c..2b35479ee35c 100644
--- a/include/asm-arm/plat-s3c24xx/regs-spi.h
+++ b/arch/arm/plat-s3c24xx/include/plat/regs-spi.h
diff --git a/include/asm-arm/plat-s3c24xx/regs-udc.h b/arch/arm/plat-s3c24xx/include/plat/regs-udc.h
index f0dd4a41b37b..f0dd4a41b37b 100644
--- a/include/asm-arm/plat-s3c24xx/regs-udc.h
+++ b/arch/arm/plat-s3c24xx/include/plat/regs-udc.h
diff --git a/include/asm-arm/plat-s3c24xx/udc.h b/arch/arm/plat-s3c24xx/include/plat/udc.h
index 546bb4008f49..546bb4008f49 100644
--- a/include/asm-arm/plat-s3c24xx/udc.h
+++ b/arch/arm/plat-s3c24xx/include/plat/udc.h
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 43aa2020f85c..fd23c0e9e698 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Thu Sep 25 10:10:50 2008 15# Last update: Sun Nov 30 16:39:36 2008
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -1380,7 +1380,7 @@ holon MACH_HOLON HOLON 1377
1380olip8 MACH_OLIP8 OLIP8 1378 1380olip8 MACH_OLIP8 OLIP8 1378
1381ghi270hg MACH_GHI270HG GHI270HG 1379 1381ghi270hg MACH_GHI270HG GHI270HG 1379
1382davinci_dm6467_evm MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM 1380 1382davinci_dm6467_evm MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM 1380
1383davinci_dm355_evm MACH_DAVINCI_DM350_EVM DAVINCI_DM350_EVM 1381 1383davinci_dm355_evm MACH_DAVINCI_DM355_EVM DAVINCI_DM355_EVM 1381
1384blackriver MACH_BLACKRIVER BLACKRIVER 1383 1384blackriver MACH_BLACKRIVER BLACKRIVER 1383
1385sandgate_wp MACH_SANDGATEWP SANDGATEWP 1384 1385sandgate_wp MACH_SANDGATEWP SANDGATEWP 1384
1386cdotbwsg MACH_CDOTBWSG CDOTBWSG 1385 1386cdotbwsg MACH_CDOTBWSG CDOTBWSG 1385
@@ -1771,7 +1771,7 @@ axs_ultrax MACH_AXS_ULTRAX AXS_ULTRAX 1779
1771at572d940deb MACH_AT572D940DEB AT572D940DEB 1780 1771at572d940deb MACH_AT572D940DEB AT572D940DEB 1780
1772davinci_da8xx_evm MACH_DAVINCI_DA8XX_EVM DAVINCI_DA8XX_EVM 1781 1772davinci_da8xx_evm MACH_DAVINCI_DA8XX_EVM DAVINCI_DA8XX_EVM 1781
1773ep9302 MACH_EP9302 EP9302 1782 1773ep9302 MACH_EP9302 EP9302 1782
1774at572d940hfeb MACH_AT572D940HFEB AT572D940HFEB 1783 1774at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783
1775cybook3 MACH_CYBOOK3 CYBOOK3 1784 1775cybook3 MACH_CYBOOK3 CYBOOK3 1784
1776wdg002 MACH_WDG002 WDG002 1785 1776wdg002 MACH_WDG002 WDG002 1785
1777sg560adsl MACH_SG560ADSL SG560ADSL 1786 1777sg560adsl MACH_SG560ADSL SG560ADSL 1786
@@ -1899,3 +1899,98 @@ rut100 MACH_RUT100 RUT100 1908
1899asusp535 MACH_ASUSP535 ASUSP535 1909 1899asusp535 MACH_ASUSP535 ASUSP535 1909
1900htcraphael MACH_HTCRAPHAEL HTCRAPHAEL 1910 1900htcraphael MACH_HTCRAPHAEL HTCRAPHAEL 1910
1901sygdg1 MACH_SYGDG1 SYGDG1 1911 1901sygdg1 MACH_SYGDG1 SYGDG1 1911
1902sygdg2 MACH_SYGDG2 SYGDG2 1912
1903seoul MACH_SEOUL SEOUL 1913
1904salerno MACH_SALERNO SALERNO 1914
1905ucn_s3c64xx MACH_UCN_S3C64XX UCN_S3C64XX 1915
1906msm7201a MACH_MSM7201A MSM7201A 1916
1907lpr1 MACH_LPR1 LPR1 1917
1908armadillo500fx MACH_ARMADILLO500FX ARMADILLO500FX 1918
1909g3evm MACH_G3EVM G3EVM 1919
1910z3_dm355 MACH_Z3_DM355 Z3_DM355 1920
1911w90p910evb MACH_W90P910EVB W90P910EVB 1921
1912w90p920evb MACH_W90P920EVB W90P920EVB 1922
1913w90p950evb MACH_W90P950EVB W90P950EVB 1923
1914w90n960evb MACH_W90N960EVB W90N960EVB 1924
1915camhd MACH_CAMHD CAMHD 1925
1916mvc100 MACH_MVC100 MVC100 1926
1917electrum_200 MACH_ELECTRUM_200 ELECTRUM_200 1927
1918htcjade MACH_HTCJADE HTCJADE 1928
1919memphis MACH_MEMPHIS MEMPHIS 1929
1920imx27sbc MACH_IMX27SBC IMX27SBC 1930
1921lextar MACH_LEXTAR LEXTAR 1931
1922mv88f6281gtw_ge MACH_MV88F6281GTW_GE MV88F6281GTW_GE 1932
1923ncp MACH_NCP NCP 1933
1924z32an_series MACH_Z32AN Z32AN 1934
1925tmq_capd MACH_TMQ_CAPD TMQ_CAPD 1935
1926omap3_wl MACH_OMAP3_WL OMAP3_WL 1936
1927chumby MACH_CHUMBY CHUMBY 1937
1928atsarm9 MACH_ATSARM9 ATSARM9 1938
1929davinci_dm365_evm MACH_DAVINCI_DM365_EVM DAVINCI_DM365_EVM 1939
1930bahamas MACH_BAHAMAS BAHAMAS 1940
1931das MACH_DAS DAS 1941
1932minidas MACH_MINIDAS MINIDAS 1942
1933vk1000 MACH_VK1000 VK1000 1943
1934centro MACH_CENTRO CENTRO 1944
1935ctera_2bay MACH_CTERA_2BAY CTERA_2BAY 1945
1936edgeconnect MACH_EDGECONNECT EDGECONNECT 1946
1937nd27000 MACH_ND27000 ND27000 1947
1938cobra MACH_GEMALTO_COBRA GEMALTO_COBRA 1948
1939ingelabs_comet MACH_INGELABS_COMET INGELABS_COMET 1949
1940pollux_wiz MACH_POLLUX_WIZ POLLUX_WIZ 1950
1941blackstone MACH_BLACKSTONE BLACKSTONE 1951
1942topaz MACH_TOPAZ TOPAZ 1952
1943aixle MACH_AIXLE AIXLE 1953
1944mw998 MACH_MW998 MW998 1954
1945nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955
1946vsc5605ev MACH_VSC5605EV VSC5605EV 1956
1947nt98700dk MACH_NT98700DK NT98700DK 1957
1948icontact MACH_ICONTACT ICONTACT 1958
1949swarco_frcpu MACH_SWARCO_FRCPU SWARCO_FRCPU 1959
1950swarco_scpu MACH_SWARCO_SCPU SWARCO_SCPU 1960
1951bbox_p16 MACH_BBOX_P16 BBOX_P16 1961
1952bstd MACH_BSTD BSTD 1962
1953sbc2440ii MACH_SBC2440II SBC2440II 1963
1954pcm034 MACH_PCM034 PCM034 1964
1955neso MACH_NESO NESO 1965
1956wlnx_9g20 MACH_WLNX_9G20 WLNX_9G20 1966
1957omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967
1958totemnova MACH_TOTEMNOVA TOTEMNOVA 1968
1959c5000 MACH_C5000 C5000 1969
1960unipo_at91sam9263 MACH_UNIPO_AT91SAM9263 UNIPO_AT91SAM9263 1970
1961ethernut5 MACH_ETHERNUT5 ETHERNUT5 1971
1962arm11 MACH_ARM11 ARM11 1972
1963cpuat9260 MACH_CPUAT9260 CPUAT9260 1973
1964cpupxa255 MACH_CPUPXA255 CPUPXA255 1974
1965cpuimx27 MACH_CPUIMX27 CPUIMX27 1975
1966cheflux MACH_CHEFLUX CHEFLUX 1976
1967eb_cpux9k2 MACH_EB_CPUX9K2 EB_CPUX9K2 1977
1968opcotec MACH_OPCOTEC OPCOTEC 1978
1969yt MACH_YT YT 1979
1970motoq MACH_MOTOQ MOTOQ 1980
1971bsb1 MACH_BSB1 BSB1 1981
1972acs5k MACH_ACS5K ACS5K 1982
1973milan MACH_MILAN MILAN 1983
1974quartzv2 MACH_QUARTZV2 QUARTZV2 1984
1975rsvp MACH_RSVP RSVP 1985
1976rmp200 MACH_RMP200 RMP200 1986
1977snapper_9260 MACH_SNAPPER_9260 SNAPPER_9260 1987
1978dsm320 MACH_DSM320 DSM320 1988
1979adsgcm MACH_ADSGCM ADSGCM 1989
1980ase2_400 MACH_ASE2_400 ASE2_400 1990
1981pizza MACH_PIZZA PIZZA 1991
1982spot_ngpl MACH_SPOT_NGPL SPOT_NGPL 1992
1983armata MACH_ARMATA ARMATA 1993
1984exeda MACH_EXEDA EXEDA 1994
1985mx31sf005 MACH_MX31SF005 MX31SF005 1995
1986f5d8231_4_v2 MACH_F5D8231_4_V2 F5D8231_4_V2 1996
1987q2440 MACH_Q2440 Q2440 1997
1988qq2440 MACH_QQ2440 QQ2440 1998
1989mini2440 MACH_MINI2440 MINI2440 1999
1990colibri300 MACH_COLIBRI300 COLIBRI300 2000
1991jades MACH_JADES JADES 2001
1992spark MACH_SPARK SPARK 2002
1993benzina MACH_BENZINA BENZINA 2003
1994blaze MACH_BLAZE BLAZE 2004
1995linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005
1996htcvenus MACH_HTCVENUS HTCVENUS 2006
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index a62dcf7098ba..3c73aafe3e01 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -101,9 +101,12 @@ ENTRY(vfp_support_entry)
101 VFPFSTMIA r4, r5 @ save the working registers 101 VFPFSTMIA r4, r5 @ save the working registers
102 VFPFMRX r5, FPSCR @ current status 102 VFPFMRX r5, FPSCR @ current status
103 tst r1, #FPEXC_EX @ is there additional state to save? 103 tst r1, #FPEXC_EX @ is there additional state to save?
104 VFPFMRX r6, FPINST, NE @ FPINST (only if FPEXC.EX is set) 104 beq 1f
105 tstne r1, #FPEXC_FP2V @ is there an FPINST2 to read? 105 VFPFMRX r6, FPINST @ FPINST (only if FPEXC.EX is set)
106 VFPFMRX r8, FPINST2, NE @ FPINST2 if needed (and present) 106 tst r1, #FPEXC_FP2V @ is there an FPINST2 to read?
107 beq 1f
108 VFPFMRX r8, FPINST2 @ FPINST2 if needed (and present)
1091:
107 stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 110 stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
108 @ and point r4 at the word at the 111 @ and point r4 at the word at the
109 @ start of the register dump 112 @ start of the register dump
@@ -117,9 +120,12 @@ no_old_VFP_process:
117 @ FPEXC is in a safe state 120 @ FPEXC is in a safe state
118 ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2 121 ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
119 tst r1, #FPEXC_EX @ is there additional state to restore? 122 tst r1, #FPEXC_EX @ is there additional state to restore?
120 VFPFMXR FPINST, r6, NE @ restore FPINST (only if FPEXC.EX is set) 123 beq 1f
121 tstne r1, #FPEXC_FP2V @ is there an FPINST2 to write? 124 VFPFMXR FPINST, r6 @ restore FPINST (only if FPEXC.EX is set)
122 VFPFMXR FPINST2, r8, NE @ FPINST2 if needed (and present) 125 tst r1, #FPEXC_FP2V @ is there an FPINST2 to write?
126 beq 1f
127 VFPFMXR FPINST2, r8 @ FPINST2 if needed (and present)
1281:
123 VFPFMXR FPSCR, r5 @ restore status 129 VFPFMXR FPSCR, r5 @ restore status
124 130
125check_for_exception: 131check_for_exception:
@@ -175,9 +181,12 @@ ENTRY(vfp_save_state)
175 VFPFSTMIA r0, r2 @ save the working registers 181 VFPFSTMIA r0, r2 @ save the working registers
176 VFPFMRX r2, FPSCR @ current status 182 VFPFMRX r2, FPSCR @ current status
177 tst r1, #FPEXC_EX @ is there additional state to save? 183 tst r1, #FPEXC_EX @ is there additional state to save?
178 VFPFMRX r3, FPINST, NE @ FPINST (only if FPEXC.EX is set) 184 beq 1f
179 tstne r1, #FPEXC_FP2V @ is there an FPINST2 to read? 185 VFPFMRX r3, FPINST @ FPINST (only if FPEXC.EX is set)
180 VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present) 186 tst r1, #FPEXC_FP2V @ is there an FPINST2 to read?
187 beq 1f
188 VFPFMRX r12, FPINST2 @ FPINST2 if needed (and present)
1891:
181 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 190 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
182 mov pc, lr 191 mov pc, lr
183ENDPROC(vfp_save_state) 192ENDPROC(vfp_save_state)
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index c0d2c9bb952b..67ca340a7c85 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -371,6 +371,15 @@ static int __init vfp_init(void)
371 * in place; report VFP support to userspace. 371 * in place; report VFP support to userspace.
372 */ 372 */
373 elf_hwcap |= HWCAP_VFP; 373 elf_hwcap |= HWCAP_VFP;
374#ifdef CONFIG_NEON
375 /*
376 * Check for the presence of the Advanced SIMD
377 * load/store instructions, integer and single
378 * precision floating point operations.
379 */
380 if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
381 elf_hwcap |= HWCAP_NEON;
382#endif
374 } 383 }
375 return 0; 384 return 0;
376} 385}
diff --git a/drivers/char/ds1620.c b/drivers/char/ds1620.c
index 74e9cd81b5b2..61f0146e215d 100644
--- a/drivers/char/ds1620.c
+++ b/drivers/char/ds1620.c
@@ -43,52 +43,51 @@ static const char *fan_state[] = { "off", "on", "on (hardwired)" };
43 * chance that the WaveArtist driver could touch these bits to 43 * chance that the WaveArtist driver could touch these bits to
44 * enable or disable the speaker. 44 * enable or disable the speaker.
45 */ 45 */
46extern spinlock_t gpio_lock;
47extern unsigned int system_rev; 46extern unsigned int system_rev;
48 47
49static inline void netwinder_ds1620_set_clk(int clk) 48static inline void netwinder_ds1620_set_clk(int clk)
50{ 49{
51 gpio_modify_op(GPIO_DSCLK, clk ? GPIO_DSCLK : 0); 50 nw_gpio_modify_op(GPIO_DSCLK, clk ? GPIO_DSCLK : 0);
52} 51}
53 52
54static inline void netwinder_ds1620_set_data(int dat) 53static inline void netwinder_ds1620_set_data(int dat)
55{ 54{
56 gpio_modify_op(GPIO_DATA, dat ? GPIO_DATA : 0); 55 nw_gpio_modify_op(GPIO_DATA, dat ? GPIO_DATA : 0);
57} 56}
58 57
59static inline int netwinder_ds1620_get_data(void) 58static inline int netwinder_ds1620_get_data(void)
60{ 59{
61 return gpio_read() & GPIO_DATA; 60 return nw_gpio_read() & GPIO_DATA;
62} 61}
63 62
64static inline void netwinder_ds1620_set_data_dir(int dir) 63static inline void netwinder_ds1620_set_data_dir(int dir)
65{ 64{
66 gpio_modify_io(GPIO_DATA, dir ? GPIO_DATA : 0); 65 nw_gpio_modify_io(GPIO_DATA, dir ? GPIO_DATA : 0);
67} 66}
68 67
69static inline void netwinder_ds1620_reset(void) 68static inline void netwinder_ds1620_reset(void)
70{ 69{
71 cpld_modify(CPLD_DS_ENABLE, 0); 70 nw_cpld_modify(CPLD_DS_ENABLE, 0);
72 cpld_modify(CPLD_DS_ENABLE, CPLD_DS_ENABLE); 71 nw_cpld_modify(CPLD_DS_ENABLE, CPLD_DS_ENABLE);
73} 72}
74 73
75static inline void netwinder_lock(unsigned long *flags) 74static inline void netwinder_lock(unsigned long *flags)
76{ 75{
77 spin_lock_irqsave(&gpio_lock, *flags); 76 spin_lock_irqsave(&nw_gpio_lock, *flags);
78} 77}
79 78
80static inline void netwinder_unlock(unsigned long *flags) 79static inline void netwinder_unlock(unsigned long *flags)
81{ 80{
82 spin_unlock_irqrestore(&gpio_lock, *flags); 81 spin_unlock_irqrestore(&nw_gpio_lock, *flags);
83} 82}
84 83
85static inline void netwinder_set_fan(int i) 84static inline void netwinder_set_fan(int i)
86{ 85{
87 unsigned long flags; 86 unsigned long flags;
88 87
89 spin_lock_irqsave(&gpio_lock, flags); 88 spin_lock_irqsave(&nw_gpio_lock, flags);
90 gpio_modify_op(GPIO_FAN, i ? GPIO_FAN : 0); 89 nw_gpio_modify_op(GPIO_FAN, i ? GPIO_FAN : 0);
91 spin_unlock_irqrestore(&gpio_lock, flags); 90 spin_unlock_irqrestore(&nw_gpio_lock, flags);
92} 91}
93 92
94static inline int netwinder_get_fan(void) 93static inline int netwinder_get_fan(void)
@@ -96,7 +95,7 @@ static inline int netwinder_get_fan(void)
96 if ((system_rev & 0xf000) == 0x4000) 95 if ((system_rev & 0xf000) == 0x4000)
97 return FAN_ALWAYS_ON; 96 return FAN_ALWAYS_ON;
98 97
99 return (gpio_read() & GPIO_FAN) ? FAN_ON : FAN_OFF; 98 return (nw_gpio_read() & GPIO_FAN) ? FAN_ON : FAN_OFF;
100} 99}
101 100
102/* 101/*
diff --git a/drivers/char/nwflash.c b/drivers/char/nwflash.c
index 006be92ee3f3..8c7df5ba088f 100644
--- a/drivers/char/nwflash.c
+++ b/drivers/char/nwflash.c
@@ -58,8 +58,6 @@ static volatile unsigned char *FLASH_BASE;
58static int gbFlashSize = KFLASH_SIZE; 58static int gbFlashSize = KFLASH_SIZE;
59static DEFINE_MUTEX(nwflash_mutex); 59static DEFINE_MUTEX(nwflash_mutex);
60 60
61extern spinlock_t gpio_lock;
62
63static int get_flash_id(void) 61static int get_flash_id(void)
64{ 62{
65 volatile unsigned int c1, c2; 63 volatile unsigned int c1, c2;
@@ -616,9 +614,9 @@ static void kick_open(void)
616 * we want to write a bit pattern XXX1 to Xilinx to enable 614 * we want to write a bit pattern XXX1 to Xilinx to enable
617 * the write gate, which will be open for about the next 2ms. 615 * the write gate, which will be open for about the next 2ms.
618 */ 616 */
619 spin_lock_irqsave(&gpio_lock, flags); 617 spin_lock_irqsave(&nw_gpio_lock, flags);
620 cpld_modify(1, 1); 618 nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
621 spin_unlock_irqrestore(&gpio_lock, flags); 619 spin_unlock_irqrestore(&nw_gpio_lock, flags);
622 620
623 /* 621 /*
624 * let the ISA bus to catch on... 622 * let the ISA bus to catch on...
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index 906f9b9d715d..587f5b2380d4 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -1016,7 +1016,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1016 snprintf(i2c->adap.name, sizeof(i2c->adap.name), "pxa_i2c-i2c.%u", 1016 snprintf(i2c->adap.name, sizeof(i2c->adap.name), "pxa_i2c-i2c.%u",
1017 i2c->adap.nr); 1017 i2c->adap.nr);
1018 1018
1019 i2c->clk = clk_get(&dev->dev, "I2CCLK"); 1019 i2c->clk = clk_get(&dev->dev, NULL);
1020 if (IS_ERR(i2c->clk)) { 1020 if (IS_ERR(i2c->clk)) {
1021 ret = PTR_ERR(i2c->clk); 1021 ret = PTR_ERR(i2c->clk);
1022 goto eclk; 1022 goto eclk;
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 1fac4e233133..fdebd930408e 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -40,8 +40,8 @@
40#include <asm/io.h> 40#include <asm/io.h>
41 41
42#include <mach/regs-gpio.h> 42#include <mach/regs-gpio.h>
43#include <asm/plat-s3c/regs-iic.h> 43#include <plat/regs-iic.h>
44#include <asm/plat-s3c/iic.h> 44#include <plat/iic.h>
45 45
46/* i2c controller state */ 46/* i2c controller state */
47 47
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index 6d7401772a8f..57630402ea67 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -732,7 +732,7 @@ config BLK_DEV_IDE_TX4939
732 732
733config IDE_ARM 733config IDE_ARM
734 tristate "ARM IDE support" 734 tristate "ARM IDE support"
735 depends on ARM && (ARCH_CLPS7500 || ARCH_RPC || ARCH_SHARK) 735 depends on ARM && (ARCH_RPC || ARCH_SHARK)
736 default y 736 default y
737 737
738config BLK_DEV_IDE_ICSIDE 738config BLK_DEV_IDE_ICSIDE
diff --git a/drivers/ide/ide_arm.c b/drivers/ide/ide_arm.c
index f728f2927b5a..bdcac94d7c1f 100644
--- a/drivers/ide/ide_arm.c
+++ b/drivers/ide/ide_arm.c
@@ -15,15 +15,8 @@
15 15
16#define DRV_NAME "ide_arm" 16#define DRV_NAME "ide_arm"
17 17
18#ifdef CONFIG_ARCH_CLPS7500 18#define IDE_ARM_IO 0x1f0
19# include <mach/hardware.h> 19#define IDE_ARM_IRQ IRQ_HARDDISK
20#
21# define IDE_ARM_IO (ISASLOT_IO + 0x1f0)
22# define IDE_ARM_IRQ IRQ_ISA_14
23#else
24# define IDE_ARM_IO 0x1f0
25# define IDE_ARM_IRQ IRQ_HARDDISK
26#endif
27 20
28static int __init ide_arm_init(void) 21static int __init ide_arm_init(void)
29{ 22{
diff --git a/drivers/input/keyboard/pxa27x_keypad.c b/drivers/input/keyboard/pxa27x_keypad.c
index 6d30c6d334c3..0d2fc64a5e1c 100644
--- a/drivers/input/keyboard/pxa27x_keypad.c
+++ b/drivers/input/keyboard/pxa27x_keypad.c
@@ -475,7 +475,7 @@ static int __devinit pxa27x_keypad_probe(struct platform_device *pdev)
475 goto failed_free_mem; 475 goto failed_free_mem;
476 } 476 }
477 477
478 keypad->clk = clk_get(&pdev->dev, "KBDCLK"); 478 keypad->clk = clk_get(&pdev->dev, NULL);
479 if (IS_ERR(keypad->clk)) { 479 if (IS_ERR(keypad->clk)) {
480 dev_err(&pdev->dev, "failed to get keypad clock\n"); 480 dev_err(&pdev->dev, "failed to get keypad clock\n");
481 error = PTR_ERR(keypad->clk); 481 error = PTR_ERR(keypad->clk);
diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
index 27d70d326ff3..da3c3a5d2689 100644
--- a/drivers/input/serio/Kconfig
+++ b/drivers/input/serio/Kconfig
@@ -79,7 +79,7 @@ config SERIO_PARKBD
79 79
80config SERIO_RPCKBD 80config SERIO_RPCKBD
81 tristate "Acorn RiscPC keyboard controller" 81 tristate "Acorn RiscPC keyboard controller"
82 depends on ARCH_ACORN || ARCH_CLPS7500 82 depends on ARCH_ACORN
83 default y 83 default y
84 help 84 help
85 Say Y here if you have the Acorn RiscPC and want to use an AT 85 Say Y here if you have the Acorn RiscPC and want to use an AT
diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c b/drivers/input/touchscreen/mainstone-wm97xx.c
index ba648750a8d9..1d11e2be9ef8 100644
--- a/drivers/input/touchscreen/mainstone-wm97xx.c
+++ b/drivers/input/touchscreen/mainstone-wm97xx.c
@@ -31,7 +31,7 @@
31#include <linux/interrupt.h> 31#include <linux/interrupt.h>
32#include <linux/wm97xx.h> 32#include <linux/wm97xx.h>
33#include <linux/io.h> 33#include <linux/io.h>
34#include <mach/pxa-regs.h> 34#include <mach/regs-ac97.h>
35 35
36#define VERSION "0.13" 36#define VERSION "0.13"
37 37
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c
index eb6be5802928..70a77625107d 100644
--- a/drivers/media/video/pxa_camera.c
+++ b/drivers/media/video/pxa_camera.c
@@ -39,6 +39,8 @@
39#include <mach/pxa-regs.h> 39#include <mach/pxa-regs.h>
40#include <mach/camera.h> 40#include <mach/camera.h>
41 41
42#include "pxa_camera.h"
43
42#define PXA_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5) 44#define PXA_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5)
43#define PXA_CAM_DRV_NAME "pxa27x-camera" 45#define PXA_CAM_DRV_NAME "pxa27x-camera"
44 46
@@ -1071,7 +1073,7 @@ static int pxa_camera_probe(struct platform_device *pdev)
1071 goto exit; 1073 goto exit;
1072 } 1074 }
1073 1075
1074 pcdev->clk = clk_get(&pdev->dev, "CAMCLK"); 1076 pcdev->clk = clk_get(&pdev->dev, NULL);
1075 if (IS_ERR(pcdev->clk)) { 1077 if (IS_ERR(pcdev->clk)) {
1076 err = PTR_ERR(pcdev->clk); 1078 err = PTR_ERR(pcdev->clk);
1077 goto exit_kfree; 1079 goto exit_kfree;
diff --git a/drivers/media/video/pxa_camera.h b/drivers/media/video/pxa_camera.h
new file mode 100644
index 000000000000..89cbfc9a35c5
--- /dev/null
+++ b/drivers/media/video/pxa_camera.h
@@ -0,0 +1,95 @@
1/* Camera Interface */
2#define CICR0 __REG(0x50000000)
3#define CICR1 __REG(0x50000004)
4#define CICR2 __REG(0x50000008)
5#define CICR3 __REG(0x5000000C)
6#define CICR4 __REG(0x50000010)
7#define CISR __REG(0x50000014)
8#define CIFR __REG(0x50000018)
9#define CITOR __REG(0x5000001C)
10#define CIBR0 __REG(0x50000028)
11#define CIBR1 __REG(0x50000030)
12#define CIBR2 __REG(0x50000038)
13
14#define CICR0_DMAEN (1 << 31) /* DMA request enable */
15#define CICR0_PAR_EN (1 << 30) /* Parity enable */
16#define CICR0_SL_CAP_EN (1 << 29) /* Capture enable for slave mode */
17#define CICR0_ENB (1 << 28) /* Camera interface enable */
18#define CICR0_DIS (1 << 27) /* Camera interface disable */
19#define CICR0_SIM (0x7 << 24) /* Sensor interface mode mask */
20#define CICR0_TOM (1 << 9) /* Time-out mask */
21#define CICR0_RDAVM (1 << 8) /* Receive-data-available mask */
22#define CICR0_FEM (1 << 7) /* FIFO-empty mask */
23#define CICR0_EOLM (1 << 6) /* End-of-line mask */
24#define CICR0_PERRM (1 << 5) /* Parity-error mask */
25#define CICR0_QDM (1 << 4) /* Quick-disable mask */
26#define CICR0_CDM (1 << 3) /* Disable-done mask */
27#define CICR0_SOFM (1 << 2) /* Start-of-frame mask */
28#define CICR0_EOFM (1 << 1) /* End-of-frame mask */
29#define CICR0_FOM (1 << 0) /* FIFO-overrun mask */
30
31#define CICR1_TBIT (1 << 31) /* Transparency bit */
32#define CICR1_RGBT_CONV (0x3 << 29) /* RGBT conversion mask */
33#define CICR1_PPL (0x7ff << 15) /* Pixels per line mask */
34#define CICR1_RGB_CONV (0x7 << 12) /* RGB conversion mask */
35#define CICR1_RGB_F (1 << 11) /* RGB format */
36#define CICR1_YCBCR_F (1 << 10) /* YCbCr format */
37#define CICR1_RGB_BPP (0x7 << 7) /* RGB bis per pixel mask */
38#define CICR1_RAW_BPP (0x3 << 5) /* Raw bis per pixel mask */
39#define CICR1_COLOR_SP (0x3 << 3) /* Color space mask */
40#define CICR1_DW (0x7 << 0) /* Data width mask */
41
42#define CICR2_BLW (0xff << 24) /* Beginning-of-line pixel clock
43 wait count mask */
44#define CICR2_ELW (0xff << 16) /* End-of-line pixel clock
45 wait count mask */
46#define CICR2_HSW (0x3f << 10) /* Horizontal sync pulse width mask */
47#define CICR2_BFPW (0x3f << 3) /* Beginning-of-frame pixel clock
48 wait count mask */
49#define CICR2_FSW (0x7 << 0) /* Frame stabilization
50 wait count mask */
51
52#define CICR3_BFW (0xff << 24) /* Beginning-of-frame line clock
53 wait count mask */
54#define CICR3_EFW (0xff << 16) /* End-of-frame line clock
55 wait count mask */
56#define CICR3_VSW (0x3f << 10) /* Vertical sync pulse width mask */
57#define CICR3_BFPW (0x3f << 3) /* Beginning-of-frame pixel clock
58 wait count mask */
59#define CICR3_LPF (0x7ff << 0) /* Lines per frame mask */
60
61#define CICR4_MCLK_DLY (0x3 << 24) /* MCLK Data Capture Delay mask */
62#define CICR4_PCLK_EN (1 << 23) /* Pixel clock enable */
63#define CICR4_PCP (1 << 22) /* Pixel clock polarity */
64#define CICR4_HSP (1 << 21) /* Horizontal sync polarity */
65#define CICR4_VSP (1 << 20) /* Vertical sync polarity */
66#define CICR4_MCLK_EN (1 << 19) /* MCLK enable */
67#define CICR4_FR_RATE (0x7 << 8) /* Frame rate mask */
68#define CICR4_DIV (0xff << 0) /* Clock divisor mask */
69
70#define CISR_FTO (1 << 15) /* FIFO time-out */
71#define CISR_RDAV_2 (1 << 14) /* Channel 2 receive data available */
72#define CISR_RDAV_1 (1 << 13) /* Channel 1 receive data available */
73#define CISR_RDAV_0 (1 << 12) /* Channel 0 receive data available */
74#define CISR_FEMPTY_2 (1 << 11) /* Channel 2 FIFO empty */
75#define CISR_FEMPTY_1 (1 << 10) /* Channel 1 FIFO empty */
76#define CISR_FEMPTY_0 (1 << 9) /* Channel 0 FIFO empty */
77#define CISR_EOL (1 << 8) /* End of line */
78#define CISR_PAR_ERR (1 << 7) /* Parity error */
79#define CISR_CQD (1 << 6) /* Camera interface quick disable */
80#define CISR_CDD (1 << 5) /* Camera interface disable done */
81#define CISR_SOF (1 << 4) /* Start of frame */
82#define CISR_EOF (1 << 3) /* End of frame */
83#define CISR_IFO_2 (1 << 2) /* FIFO overrun for Channel 2 */
84#define CISR_IFO_1 (1 << 1) /* FIFO overrun for Channel 1 */
85#define CISR_IFO_0 (1 << 0) /* FIFO overrun for Channel 0 */
86
87#define CIFR_FLVL2 (0x7f << 23) /* FIFO 2 level mask */
88#define CIFR_FLVL1 (0x7f << 16) /* FIFO 1 level mask */
89#define CIFR_FLVL0 (0xff << 8) /* FIFO 0 level mask */
90#define CIFR_THL_0 (0x3 << 4) /* Threshold Level for Channel 0 FIFO */
91#define CIFR_RESET_F (1 << 3) /* Reset input FIFOs */
92#define CIFR_FEN2 (1 << 2) /* FIFO enable for channel 2 */
93#define CIFR_FEN1 (1 << 1) /* FIFO enable for channel 1 */
94#define CIFR_FEN0 (1 << 0) /* FIFO enable for channel 0 */
95
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index e4c0db4dc7b1..9e485459f63b 100644
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -474,9 +474,9 @@ static __init int asic3_gpio_probe(struct platform_device *pdev,
474 u16 dir_reg[ASIC3_NUM_GPIO_BANKS]; 474 u16 dir_reg[ASIC3_NUM_GPIO_BANKS];
475 int i; 475 int i;
476 476
477 memzero(alt_reg, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); 477 memset(alt_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16));
478 memzero(out_reg, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); 478 memset(out_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16));
479 memzero(dir_reg, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); 479 memset(dir_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16));
480 480
481 /* Enable all GPIOs */ 481 /* Enable all GPIOs */
482 asic3_write_register(asic, ASIC3_GPIO_OFFSET(A, MASK), 0xffff); 482 asic3_write_register(asic, ASIC3_GPIO_OFFSET(A, MASK), 0xffff);
diff --git a/drivers/mfd/mcp-core.c b/drivers/mfd/mcp-core.c
index b4ed57e02729..6063dc2b52e8 100644
--- a/drivers/mfd/mcp-core.c
+++ b/drivers/mfd/mcp-core.c
@@ -18,7 +18,7 @@
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/string.h> 19#include <linux/string.h>
20 20
21#include <asm/dma.h> 21#include <mach/dma.h>
22#include <asm/system.h> 22#include <asm/system.h>
23 23
24#include "mcp.h" 24#include "mcp.h"
diff --git a/drivers/mfd/mcp-sa11x0.c b/drivers/mfd/mcp-sa11x0.c
index 28380b20bc70..62b32dabf629 100644
--- a/drivers/mfd/mcp-sa11x0.c
+++ b/drivers/mfd/mcp-sa11x0.c
@@ -20,7 +20,7 @@
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22 22
23#include <asm/dma.h> 23#include <mach/dma.h>
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <asm/mach-types.h> 25#include <asm/mach-types.h>
26#include <asm/system.h> 26#include <asm/system.h>
diff --git a/drivers/mfd/ucb1x00-assabet.c b/drivers/mfd/ucb1x00-assabet.c
index 61aeaf79640d..86fed4870f93 100644
--- a/drivers/mfd/ucb1x00-assabet.c
+++ b/drivers/mfd/ucb1x00-assabet.c
@@ -15,7 +15,7 @@
15#include <linux/proc_fs.h> 15#include <linux/proc_fs.h>
16#include <linux/device.h> 16#include <linux/device.h>
17 17
18#include <asm/dma.h> 18#include <mach/dma.h>
19 19
20#include "ucb1x00.h" 20#include "ucb1x00.h"
21 21
diff --git a/drivers/mfd/ucb1x00-core.c b/drivers/mfd/ucb1x00-core.c
index a316f1b75933..6860c924f364 100644
--- a/drivers/mfd/ucb1x00-core.c
+++ b/drivers/mfd/ucb1x00-core.c
@@ -25,7 +25,7 @@
25#include <linux/device.h> 25#include <linux/device.h>
26#include <linux/mutex.h> 26#include <linux/mutex.h>
27 27
28#include <asm/dma.h> 28#include <mach/dma.h>
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30 30
31#include "ucb1x00.h" 31#include "ucb1x00.h"
diff --git a/drivers/mfd/ucb1x00-ts.c b/drivers/mfd/ucb1x00-ts.c
index 44762ca86a8d..61b7d3eb9a2f 100644
--- a/drivers/mfd/ucb1x00-ts.c
+++ b/drivers/mfd/ucb1x00-ts.c
@@ -31,7 +31,7 @@
31#include <linux/slab.h> 31#include <linux/slab.h>
32#include <linux/kthread.h> 32#include <linux/kthread.h>
33 33
34#include <asm/dma.h> 34#include <mach/dma.h>
35#include <mach/collie.h> 35#include <mach/collie.h>
36#include <asm/mach-types.h> 36#include <asm/mach-types.h>
37 37
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 2fadf323c696..1bcbdd6763ac 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -500,7 +500,7 @@ static int mmci_probe(struct amba_device *dev, void *id)
500 } 500 }
501 501
502 host = mmc_priv(mmc); 502 host = mmc_priv(mmc);
503 host->clk = clk_get(&dev->dev, "MCLK"); 503 host->clk = clk_get(&dev->dev, NULL);
504 if (IS_ERR(host->clk)) { 504 if (IS_ERR(host->clk)) {
505 ret = PTR_ERR(host->clk); 505 ret = PTR_ERR(host->clk);
506 host->clk = NULL; 506 host->clk = NULL;
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index ebfaa9960939..f88cc7406354 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -26,11 +26,12 @@
26#include <linux/clk.h> 26#include <linux/clk.h>
27#include <linux/err.h> 27#include <linux/err.h>
28#include <linux/mmc/host.h> 28#include <linux/mmc/host.h>
29#include <linux/io.h>
29 30
30#include <asm/dma.h>
31#include <asm/io.h>
32#include <asm/sizes.h> 31#include <asm/sizes.h>
33 32
33#include <mach/dma.h>
34#include <mach/hardware.h>
34#include <mach/pxa-regs.h> 35#include <mach/pxa-regs.h>
35#include <mach/mmc.h> 36#include <mach/mmc.h>
36 37
@@ -533,7 +534,7 @@ static int pxamci_probe(struct platform_device *pdev)
533 host->pdata = pdev->dev.platform_data; 534 host->pdata = pdev->dev.platform_data;
534 host->clkrt = CLKRT_OFF; 535 host->clkrt = CLKRT_OFF;
535 536
536 host->clk = clk_get(&pdev->dev, "MMCCLK"); 537 host->clk = clk_get(&pdev->dev, NULL);
537 if (IS_ERR(host->clk)) { 538 if (IS_ERR(host->clk)) {
538 ret = PTR_ERR(host->clk); 539 ret = PTR_ERR(host->clk);
539 host->clk = NULL; 540 host->clk = NULL;
diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c
index 3b2085b57769..fcc98a4cce3c 100644
--- a/drivers/mmc/host/s3cmci.c
+++ b/drivers/mmc/host/s3cmci.c
@@ -25,7 +25,7 @@
25#include <mach/regs-sdi.h> 25#include <mach/regs-sdi.h>
26#include <mach/regs-gpio.h> 26#include <mach/regs-gpio.h>
27 27
28#include <asm/plat-s3c24xx/mci.h> 28#include <plat/mci.h>
29 29
30#include "s3cmci.h" 30#include "s3cmci.h"
31 31
diff --git a/drivers/mtd/maps/dc21285.c b/drivers/mtd/maps/dc21285.c
index 3aa018c092f8..42969fe051b2 100644
--- a/drivers/mtd/maps/dc21285.c
+++ b/drivers/mtd/maps/dc21285.c
@@ -32,16 +32,15 @@ static struct mtd_info *dc21285_mtd;
32 */ 32 */
33static void nw_en_write(void) 33static void nw_en_write(void)
34{ 34{
35 extern spinlock_t gpio_lock;
36 unsigned long flags; 35 unsigned long flags;
37 36
38 /* 37 /*
39 * we want to write a bit pattern XXX1 to Xilinx to enable 38 * we want to write a bit pattern XXX1 to Xilinx to enable
40 * the write gate, which will be open for about the next 2ms. 39 * the write gate, which will be open for about the next 2ms.
41 */ 40 */
42 spin_lock_irqsave(&gpio_lock, flags); 41 spin_lock_irqsave(&nw_gpio_lock, flags);
43 cpld_modify(1, 1); 42 nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
44 spin_unlock_irqrestore(&gpio_lock, flags); 43 spin_unlock_irqrestore(&nw_gpio_lock, flags);
45 44
46 /* 45 /*
47 * let the ISA bus to catch on... 46 * let the ISA bus to catch on...
diff --git a/drivers/mtd/maps/ixp2000.c b/drivers/mtd/maps/ixp2000.c
index dcdb1f17577d..3ea1de9be720 100644
--- a/drivers/mtd/maps/ixp2000.c
+++ b/drivers/mtd/maps/ixp2000.c
@@ -170,7 +170,7 @@ static int ixp2000_flash_probe(struct platform_device *dev)
170 err = -ENOMEM; 170 err = -ENOMEM;
171 goto Error; 171 goto Error;
172 } 172 }
173 memzero(info, sizeof(struct ixp2000_flash_info)); 173 memset(info, 0, sizeof(struct ixp2000_flash_info));
174 174
175 platform_set_drvdata(dev, info); 175 platform_set_drvdata(dev, info);
176 176
diff --git a/drivers/mtd/maps/ixp4xx.c b/drivers/mtd/maps/ixp4xx.c
index 9c7a5fbd4e51..16555cbeaea4 100644
--- a/drivers/mtd/maps/ixp4xx.c
+++ b/drivers/mtd/maps/ixp4xx.c
@@ -201,7 +201,7 @@ static int ixp4xx_flash_probe(struct platform_device *dev)
201 err = -ENOMEM; 201 err = -ENOMEM;
202 goto Error; 202 goto Error;
203 } 203 }
204 memzero(info, sizeof(struct ixp4xx_flash_info)); 204 memset(info, 0, sizeof(struct ixp4xx_flash_info));
205 205
206 platform_set_drvdata(dev, info); 206 platform_set_drvdata(dev, info);
207 207
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index c0fa9c9edf08..ce5752ab579d 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -20,8 +20,8 @@
20#include <linux/mtd/partitions.h> 20#include <linux/mtd/partitions.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <asm/dma.h>
24 23
24#include <mach/dma.h>
25#include <mach/pxa-regs.h> 25#include <mach/pxa-regs.h>
26#include <mach/pxa3xx_nand.h> 26#include <mach/pxa3xx_nand.h>
27 27
@@ -1079,7 +1079,7 @@ static int pxa3xx_nand_probe(struct platform_device *pdev)
1079 this = &info->nand_chip; 1079 this = &info->nand_chip;
1080 mtd->priv = info; 1080 mtd->priv = info;
1081 1081
1082 info->clk = clk_get(&pdev->dev, "NANDCLK"); 1082 info->clk = clk_get(&pdev->dev, NULL);
1083 if (IS_ERR(info->clk)) { 1083 if (IS_ERR(info->clk)) {
1084 dev_err(&pdev->dev, "failed to get nand clock\n"); 1084 dev_err(&pdev->dev, "failed to get nand clock\n");
1085 ret = PTR_ERR(info->clk); 1085 ret = PTR_ERR(info->clk);
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 556139ed1fdf..8e375d5fe231 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -45,8 +45,8 @@
45 45
46#include <asm/io.h> 46#include <asm/io.h>
47 47
48#include <asm/plat-s3c/regs-nand.h> 48#include <plat/regs-nand.h>
49#include <asm/plat-s3c/nand.h> 49#include <plat/nand.h>
50 50
51#ifdef CONFIG_MTD_NAND_S3C2410_HWECC 51#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
52static int hardware_ecc = 1; 52static int hardware_ecc = 1;
@@ -818,7 +818,7 @@ static int s3c24xx_nand_probe(struct platform_device *pdev,
818 goto exit_error; 818 goto exit_error;
819 } 819 }
820 820
821 memzero(info, sizeof(*info)); 821 memset(info, 0, sizeof(*info));
822 platform_set_drvdata(pdev, info); 822 platform_set_drvdata(pdev, info);
823 823
824 spin_lock_init(&info->controller.lock); 824 spin_lock_init(&info->controller.lock);
@@ -883,7 +883,7 @@ static int s3c24xx_nand_probe(struct platform_device *pdev,
883 goto exit_error; 883 goto exit_error;
884 } 884 }
885 885
886 memzero(info->mtds, size); 886 memset(info->mtds, 0, size);
887 887
888 /* initialise all possible chips */ 888 /* initialise all possible chips */
889 889
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c
index 7107620f615d..0b729f7d91fc 100644
--- a/drivers/net/cs89x0.c
+++ b/drivers/net/cs89x0.c
@@ -170,11 +170,7 @@ static char version[] __initdata =
170/* The cs8900 has 4 IRQ pins, software selectable. cs8900_irq_map maps 170/* The cs8900 has 4 IRQ pins, software selectable. cs8900_irq_map maps
171 them to system IRQ numbers. This mapping is card specific and is set to 171 them to system IRQ numbers. This mapping is card specific and is set to
172 the configuration of the Cirrus Eval board for this chip. */ 172 the configuration of the Cirrus Eval board for this chip. */
173#ifdef CONFIG_ARCH_CLPS7500 173#if defined(CONFIG_SH_HICOSH4)
174static unsigned int netcard_portlist[] __used __initdata =
175 { 0x80090303, 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};
176static unsigned int cs8900_irq_map[] = {12,0,0,0};
177#elif defined(CONFIG_SH_HICOSH4)
178static unsigned int netcard_portlist[] __used __initdata = 174static unsigned int netcard_portlist[] __used __initdata =
179 { 0x0300, 0}; 175 { 0x0300, 0};
180static unsigned int cs8900_irq_map[] = {1,0,0,0}; 176static unsigned int cs8900_irq_map[] = {1,0,0,0};
diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c
index c5b02b66f756..0e081292f4f7 100644
--- a/drivers/net/irda/pxaficp_ir.c
+++ b/drivers/net/irda/pxaficp_ir.c
@@ -22,9 +22,53 @@
22#include <net/irda/wrapper.h> 22#include <net/irda/wrapper.h>
23#include <net/irda/irda_device.h> 23#include <net/irda/irda_device.h>
24 24
25#include <asm/dma.h> 25#include <mach/dma.h>
26#include <mach/irda.h> 26#include <mach/irda.h>
27#include <mach/hardware.h>
27#include <mach/pxa-regs.h> 28#include <mach/pxa-regs.h>
29#include <mach/regs-uart.h>
30
31#define FICP __REG(0x40800000) /* Start of FICP area */
32#define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */
33#define ICCR1 __REG(0x40800004) /* ICP Control Register 1 */
34#define ICCR2 __REG(0x40800008) /* ICP Control Register 2 */
35#define ICDR __REG(0x4080000c) /* ICP Data Register */
36#define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */
37#define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */
38
39#define ICCR0_AME (1 << 7) /* Address match enable */
40#define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */
41#define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */
42#define ICCR0_RXE (1 << 4) /* Receive enable */
43#define ICCR0_TXE (1 << 3) /* Transmit enable */
44#define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */
45#define ICCR0_LBM (1 << 1) /* Loopback mode */
46#define ICCR0_ITR (1 << 0) /* IrDA transmission */
47
48#define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */
49#define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */
50#define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */
51#define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */
52#define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */
53#define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */
54
55#ifdef CONFIG_PXA27x
56#define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */
57#endif
58#define ICSR0_FRE (1 << 5) /* Framing error */
59#define ICSR0_RFS (1 << 4) /* Receive FIFO service request */
60#define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */
61#define ICSR0_RAB (1 << 2) /* Receiver abort */
62#define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */
63#define ICSR0_EIF (1 << 0) /* End/Error in FIFO */
64
65#define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */
66#define ICSR1_CRE (1 << 5) /* CRC error */
67#define ICSR1_EOF (1 << 4) /* End of frame */
68#define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */
69#define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */
70#define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */
71#define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */
28 72
29#define IrSR_RXPL_NEG_IS_ZERO (1<<4) 73#define IrSR_RXPL_NEG_IS_ZERO (1<<4)
30#define IrSR_RXPL_POS_IS_ZERO 0x0 74#define IrSR_RXPL_POS_IS_ZERO 0x0
diff --git a/drivers/net/irda/sa1100_ir.c b/drivers/net/irda/sa1100_ir.c
index a95188948de7..0813b5295f52 100644
--- a/drivers/net/irda/sa1100_ir.c
+++ b/drivers/net/irda/sa1100_ir.c
@@ -36,7 +36,7 @@
36#include <net/irda/irda_device.h> 36#include <net/irda/irda_device.h>
37 37
38#include <asm/irq.h> 38#include <asm/irq.h>
39#include <asm/dma.h> 39#include <mach/dma.h>
40#include <mach/hardware.h> 40#include <mach/hardware.h>
41#include <asm/mach/irda.h> 41#include <asm/mach/irda.h>
42 42
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h
index cc7d85bdfb3e..870b4c33f108 100644
--- a/drivers/net/smc911x.h
+++ b/drivers/net/smc911x.h
@@ -200,6 +200,9 @@ static inline void SMC_outsl(struct smc911x_local *lp, int reg,
200 200
201 201
202#ifdef SMC_USE_PXA_DMA 202#ifdef SMC_USE_PXA_DMA
203
204#include <mach/dma.h>
205
203/* 206/*
204 * Define the request and free functions 207 * Define the request and free functions
205 * These are unfortunately architecture specific as no generic allocation 208 * These are unfortunately architecture specific as no generic allocation
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index a07cc9351c6b..37e2cb4f4f88 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -527,7 +527,8 @@ struct smc_local {
527 * as RX which can overrun memory and lose packets. 527 * as RX which can overrun memory and lose packets.
528 */ 528 */
529#include <linux/dma-mapping.h> 529#include <linux/dma-mapping.h>
530#include <asm/dma.h> 530#include <mach/dma.h>
531#include <mach/hardware.h>
531#include <mach/pxa-regs.h> 532#include <mach/pxa-regs.h>
532 533
533#ifdef SMC_insl 534#ifdef SMC_insl
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c
index 2133f37906f2..d5e4e637ddec 100644
--- a/drivers/rtc/rtc-at91sam9.c
+++ b/drivers/rtc/rtc-at91sam9.c
@@ -21,6 +21,7 @@
21 21
22#include <mach/board.h> 22#include <mach/board.h>
23#include <mach/at91_rtt.h> 23#include <mach/at91_rtt.h>
24#include <mach/cpu.h>
24 25
25 26
26/* 27/*
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index f59277bbedaa..7a568beba3f0 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -26,7 +26,7 @@
26#include <asm/uaccess.h> 26#include <asm/uaccess.h>
27#include <asm/io.h> 27#include <asm/io.h>
28#include <asm/irq.h> 28#include <asm/irq.h>
29#include <asm/plat-s3c/regs-rtc.h> 29#include <plat/regs-rtc.h>
30 30
31/* I have yet to find an S3C implementation with more than one 31/* I have yet to find an S3C implementation with more than one
32 * of these rtc blocks in */ 32 * of these rtc blocks in */
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 71562689116f..e3a5ad5ef1d6 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -692,7 +692,7 @@ static int pl010_probe(struct amba_device *dev, void *id)
692 goto free; 692 goto free;
693 } 693 }
694 694
695 uap->clk = clk_get(&dev->dev, "UARTCLK"); 695 uap->clk = clk_get(&dev->dev, NULL);
696 if (IS_ERR(uap->clk)) { 696 if (IS_ERR(uap->clk)) {
697 ret = PTR_ERR(uap->clk); 697 ret = PTR_ERR(uap->clk);
698 goto unmap; 698 goto unmap;
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c
index b7180046f8db..8b2b9700f3e4 100644
--- a/drivers/serial/amba-pl011.c
+++ b/drivers/serial/amba-pl011.c
@@ -756,7 +756,7 @@ static int pl011_probe(struct amba_device *dev, void *id)
756 goto free; 756 goto free;
757 } 757 }
758 758
759 uap->clk = clk_get(&dev->dev, "UARTCLK"); 759 uap->clk = clk_get(&dev->dev, NULL);
760 if (IS_ERR(uap->clk)) { 760 if (IS_ERR(uap->clk)) {
761 ret = PTR_ERR(uap->clk); 761 ret = PTR_ERR(uap->clk);
762 goto unmap; 762 goto unmap;
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c
index abc00be55433..f6e3b86bb0be 100644
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -48,6 +48,7 @@
48#include <mach/hardware.h> 48#include <mach/hardware.h>
49#include <asm/irq.h> 49#include <asm/irq.h>
50#include <mach/pxa-regs.h> 50#include <mach/pxa-regs.h>
51#include <mach/regs-uart.h>
51 52
52 53
53struct uart_pxa_port { 54struct uart_pxa_port {
@@ -766,7 +767,7 @@ static int serial_pxa_probe(struct platform_device *dev)
766 if (!sport) 767 if (!sport)
767 return -ENOMEM; 768 return -ENOMEM;
768 769
769 sport->clk = clk_get(&dev->dev, "UARTCLK"); 770 sport->clk = clk_get(&dev->dev, NULL);
770 if (IS_ERR(sport->clk)) { 771 if (IS_ERR(sport->clk)) {
771 ret = PTR_ERR(sport->clk); 772 ret = PTR_ERR(sport->clk);
772 goto err_free; 773 goto err_free;
diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c
index 61dc8b3daa26..a7bf024a8286 100644
--- a/drivers/serial/serial_lh7a40x.c
+++ b/drivers/serial/serial_lh7a40x.c
@@ -41,9 +41,10 @@
41#include <linux/tty_flip.h> 41#include <linux/tty_flip.h>
42#include <linux/serial_core.h> 42#include <linux/serial_core.h>
43#include <linux/serial.h> 43#include <linux/serial.h>
44#include <linux/io.h>
44 45
45#include <asm/io.h>
46#include <asm/irq.h> 46#include <asm/irq.h>
47#include <mach/hardware.h>
47 48
48#define DEV_MAJOR 204 49#define DEV_MAJOR 204
49#define DEV_MINOR 16 50#define DEV_MINOR 16
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index cf12f2d84be2..6104f461a3cd 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -32,8 +32,8 @@
32#include <asm/io.h> 32#include <asm/io.h>
33#include <asm/irq.h> 33#include <asm/irq.h>
34#include <asm/delay.h> 34#include <asm/delay.h>
35#include <asm/dma.h>
36 35
36#include <mach/dma.h>
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/pxa-regs.h> 38#include <mach/pxa-regs.h>
39#include <mach/regs-ssp.h> 39#include <mach/regs-ssp.h>
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index c252cbac00f1..256d18395a23 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -28,7 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29 29
30#include <mach/regs-gpio.h> 30#include <mach/regs-gpio.h>
31#include <asm/plat-s3c24xx/regs-spi.h> 31#include <plat/regs-spi.h>
32#include <mach/spi.h> 32#include <mach/spi.h>
33 33
34struct s3c24xx_spi { 34struct s3c24xx_spi {
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index 2dbc0db0b46c..8c5026be79d4 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -2145,7 +2145,7 @@ static int __init pxa25x_udc_probe(struct platform_device *pdev)
2145 if (irq < 0) 2145 if (irq < 0)
2146 return -ENODEV; 2146 return -ENODEV;
2147 2147
2148 dev->clk = clk_get(&pdev->dev, "UDCCLK"); 2148 dev->clk = clk_get(&pdev->dev, NULL);
2149 if (IS_ERR(dev->clk)) { 2149 if (IS_ERR(dev->clk)) {
2150 retval = PTR_ERR(dev->clk); 2150 retval = PTR_ERR(dev->clk);
2151 goto err_clk; 2151 goto err_clk;
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c
index caa37c95802c..944e4ff641df 100644
--- a/drivers/usb/gadget/pxa27x_udc.c
+++ b/drivers/usb/gadget/pxa27x_udc.c
@@ -2226,7 +2226,7 @@ static int __init pxa_udc_probe(struct platform_device *pdev)
2226 udc->dev = &pdev->dev; 2226 udc->dev = &pdev->dev;
2227 udc->mach = pdev->dev.platform_data; 2227 udc->mach = pdev->dev.platform_data;
2228 2228
2229 udc->clk = clk_get(&pdev->dev, "UDCCLK"); 2229 udc->clk = clk_get(&pdev->dev, NULL);
2230 if (IS_ERR(udc->clk)) { 2230 if (IS_ERR(udc->clk)) {
2231 retval = PTR_ERR(udc->clk); 2231 retval = PTR_ERR(udc->clk);
2232 goto err_clk; 2232 goto err_clk;
diff --git a/drivers/usb/gadget/s3c2410_udc.c b/drivers/usb/gadget/s3c2410_udc.c
index 00ba06b44752..8d8d65165983 100644
--- a/drivers/usb/gadget/s3c2410_udc.c
+++ b/drivers/usb/gadget/s3c2410_udc.c
@@ -53,8 +53,8 @@
53#include <mach/hardware.h> 53#include <mach/hardware.h>
54#include <mach/regs-gpio.h> 54#include <mach/regs-gpio.h>
55 55
56#include <asm/plat-s3c24xx/regs-udc.h> 56#include <plat/regs-udc.h>
57#include <asm/plat-s3c24xx/udc.h> 57#include <plat/udc.h>
58 58
59 59
60#include "s3c2410_udc.h" 60#include "s3c2410_udc.h"
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
index e294d430733b..e44dc2cbca24 100644
--- a/drivers/usb/host/ohci-pxa27x.c
+++ b/drivers/usb/host/ohci-pxa27x.c
@@ -296,7 +296,7 @@ int usb_hcd_pxa27x_probe (const struct hc_driver *driver, struct platform_device
296 return -ENXIO; 296 return -ENXIO;
297 } 297 }
298 298
299 usb_clk = clk_get(&pdev->dev, "USBCLK"); 299 usb_clk = clk_get(&pdev->dev, NULL);
300 if (IS_ERR(usb_clk)) 300 if (IS_ERR(usb_clk))
301 return PTR_ERR(usb_clk); 301 return PTR_ERR(usb_clk);
302 302
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3f3ce13fef43..237301849075 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -362,7 +362,7 @@ endchoice
362 362
363config FB_ACORN 363config FB_ACORN
364 bool "Acorn VIDC support" 364 bool "Acorn VIDC support"
365 depends on (FB = y) && ARM && (ARCH_ACORN || ARCH_CLPS7500) 365 depends on (FB = y) && ARM && ARCH_ACORN
366 select FB_CFB_FILLRECT 366 select FB_CFB_FILLRECT
367 select FB_CFB_COPYAREA 367 select FB_CFB_COPYAREA
368 select FB_CFB_IMAGEBLIT 368 select FB_CFB_IMAGEBLIT
diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c
index a7a1c891bfa2..2ac52fd8cc11 100644
--- a/drivers/video/amba-clcd.c
+++ b/drivers/video/amba-clcd.c
@@ -343,14 +343,14 @@ static int clcdfb_register(struct clcd_fb *fb)
343{ 343{
344 int ret; 344 int ret;
345 345
346 fb->clk = clk_get(&fb->dev->dev, "CLCDCLK"); 346 fb->clk = clk_get(&fb->dev->dev, NULL);
347 if (IS_ERR(fb->clk)) { 347 if (IS_ERR(fb->clk)) {
348 ret = PTR_ERR(fb->clk); 348 ret = PTR_ERR(fb->clk);
349 goto out; 349 goto out;
350 } 350 }
351 351
352 fb->fb.fix.mmio_start = fb->dev->res.start; 352 fb->fb.fix.mmio_start = fb->dev->res.start;
353 fb->fb.fix.mmio_len = SZ_4K; 353 fb->fb.fix.mmio_len = 4096;
354 354
355 fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len); 355 fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
356 if (!fb->regs) { 356 if (!fb->regs) {
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index cc59c52e1103..afe7a65c5603 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -69,9 +69,6 @@
69#define LCCR3_INVALID_CONFIG_MASK (LCCR3_HSP | LCCR3_VSP |\ 69#define LCCR3_INVALID_CONFIG_MASK (LCCR3_HSP | LCCR3_VSP |\
70 LCCR3_PCD | LCCR3_BPP) 70 LCCR3_PCD | LCCR3_BPP)
71 71
72static void (*pxafb_backlight_power)(int);
73static void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
74
75static int pxafb_activate_var(struct fb_var_screeninfo *var, 72static int pxafb_activate_var(struct fb_var_screeninfo *var,
76 struct pxafb_info *); 73 struct pxafb_info *);
77static void set_ctrlr_state(struct pxafb_info *fbi, u_int state); 74static void set_ctrlr_state(struct pxafb_info *fbi, u_int state);
@@ -814,6 +811,7 @@ static int pxafb_smart_init(struct pxafb_info *fbi)
814 __func__); 811 __func__);
815 return PTR_ERR(fbi->smart_thread); 812 return PTR_ERR(fbi->smart_thread);
816 } 813 }
814
817 return 0; 815 return 0;
818} 816}
819#else 817#else
@@ -976,16 +974,16 @@ static inline void __pxafb_backlight_power(struct pxafb_info *fbi, int on)
976{ 974{
977 pr_debug("pxafb: backlight o%s\n", on ? "n" : "ff"); 975 pr_debug("pxafb: backlight o%s\n", on ? "n" : "ff");
978 976
979 if (pxafb_backlight_power) 977 if (fbi->backlight_power)
980 pxafb_backlight_power(on); 978 fbi->backlight_power(on);
981} 979}
982 980
983static inline void __pxafb_lcd_power(struct pxafb_info *fbi, int on) 981static inline void __pxafb_lcd_power(struct pxafb_info *fbi, int on)
984{ 982{
985 pr_debug("pxafb: LCD power o%s\n", on ? "n" : "ff"); 983 pr_debug("pxafb: LCD power o%s\n", on ? "n" : "ff");
986 984
987 if (pxafb_lcd_power) 985 if (fbi->lcd_power)
988 pxafb_lcd_power(on, &fbi->fb.var); 986 fbi->lcd_power(on, &fbi->fb.var);
989} 987}
990 988
991static void pxafb_setup_gpio(struct pxafb_info *fbi) 989static void pxafb_setup_gpio(struct pxafb_info *fbi)
@@ -1429,7 +1427,7 @@ static struct pxafb_info * __devinit pxafb_init_fbinfo(struct device *dev)
1429 memset(fbi, 0, sizeof(struct pxafb_info)); 1427 memset(fbi, 0, sizeof(struct pxafb_info));
1430 fbi->dev = dev; 1428 fbi->dev = dev;
1431 1429
1432 fbi->clk = clk_get(dev, "LCDCLK"); 1430 fbi->clk = clk_get(dev, NULL);
1433 if (IS_ERR(fbi->clk)) { 1431 if (IS_ERR(fbi->clk)) {
1434 kfree(fbi); 1432 kfree(fbi);
1435 return NULL; 1433 return NULL;
@@ -1748,8 +1746,7 @@ static int __devinit pxafb_probe(struct platform_device *dev)
1748 ret = -EINVAL; 1746 ret = -EINVAL;
1749 goto failed; 1747 goto failed;
1750 } 1748 }
1751 pxafb_backlight_power = inf->pxafb_backlight_power; 1749
1752 pxafb_lcd_power = inf->pxafb_lcd_power;
1753 fbi = pxafb_init_fbinfo(&dev->dev); 1750 fbi = pxafb_init_fbinfo(&dev->dev);
1754 if (!fbi) { 1751 if (!fbi) {
1755 /* only reason for pxafb_init_fbinfo to fail is kmalloc */ 1752 /* only reason for pxafb_init_fbinfo to fail is kmalloc */
@@ -1758,6 +1755,9 @@ static int __devinit pxafb_probe(struct platform_device *dev)
1758 goto failed; 1755 goto failed;
1759 } 1756 }
1760 1757
1758 fbi->backlight_power = inf->pxafb_backlight_power;
1759 fbi->lcd_power = inf->pxafb_lcd_power;
1760
1761 r = platform_get_resource(dev, IORESOURCE_MEM, 0); 1761 r = platform_get_resource(dev, IORESOURCE_MEM, 0);
1762 if (r == NULL) { 1762 if (r == NULL) {
1763 dev_err(&dev->dev, "no I/O memory resource defined\n"); 1763 dev_err(&dev->dev, "no I/O memory resource defined\n");
diff --git a/drivers/video/pxafb.h b/drivers/video/pxafb.h
index 31541b86f13d..d8eb93fa03a3 100644
--- a/drivers/video/pxafb.h
+++ b/drivers/video/pxafb.h
@@ -124,6 +124,9 @@ struct pxafb_info {
124 struct notifier_block freq_transition; 124 struct notifier_block freq_transition;
125 struct notifier_block freq_policy; 125 struct notifier_block freq_policy;
126#endif 126#endif
127
128 void (*lcd_power)(int, struct fb_var_screeninfo *);
129 void (*backlight_power)(int);
127}; 130};
128 131
129#define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member) 132#define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member)
diff --git a/drivers/video/sa1100fb.c b/drivers/video/sa1100fb.c
index c052bd4c0b06..076f946fa0f5 100644
--- a/drivers/video/sa1100fb.c
+++ b/drivers/video/sa1100fb.c
@@ -114,7 +114,7 @@
114 * - convert dma address types to dma_addr_t 114 * - convert dma address types to dma_addr_t
115 * - remove unused 'montype' stuff 115 * - remove unused 'montype' stuff
116 * - remove redundant zero inits of init_var after the initial 116 * - remove redundant zero inits of init_var after the initial
117 * memzero. 117 * memset.
118 * - remove allow_modeset (acornfb idea does not belong here) 118 * - remove allow_modeset (acornfb idea does not belong here)
119 * 119 *
120 * 2001/05/28: <rmk@arm.linux.org.uk> 120 * 2001/05/28: <rmk@arm.linux.org.uk>
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index f7f6ce82a5e2..e31925ee8346 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -42,7 +42,7 @@
42#undef S3C_VA_WATCHDOG 42#undef S3C_VA_WATCHDOG
43#define S3C_VA_WATCHDOG (0) 43#define S3C_VA_WATCHDOG (0)
44 44
45#include <asm/plat-s3c/regs-watchdog.h> 45#include <plat/regs-watchdog.h>
46 46
47#define PFX "s3c2410-wdt: " 47#define PFX "s3c2410-wdt: "
48 48
diff --git a/drivers/watchdog/sa1100_wdt.c b/drivers/watchdog/sa1100_wdt.c
index ed01e4c2beff..d6fbb4657210 100644
--- a/drivers/watchdog/sa1100_wdt.c
+++ b/drivers/watchdog/sa1100_wdt.c
@@ -27,6 +27,7 @@
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/bitops.h> 28#include <linux/bitops.h>
29#include <linux/uaccess.h> 29#include <linux/uaccess.h>
30#include <linux/timex.h>
30 31
31#ifdef CONFIG_ARCH_PXA 32#ifdef CONFIG_ARCH_PXA
32#include <mach/pxa-regs.h> 33#include <mach/pxa-regs.h>
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c
index 34c1d94f921e..ef6539eea579 100644
--- a/sound/arm/pxa2xx-ac97-lib.c
+++ b/sound/arm/pxa2xx-ac97-lib.c
@@ -22,7 +22,7 @@
22 22
23#include <asm/irq.h> 23#include <asm/irq.h>
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <mach/pxa-regs.h> 25#include <mach/regs-ac97.h>
26#include <mach/pxa2xx-gpio.h> 26#include <mach/pxa2xx-gpio.h>
27#include <mach/audio.h> 27#include <mach/audio.h>
28 28
diff --git a/sound/arm/pxa2xx-ac97.c b/sound/arm/pxa2xx-ac97.c
index c2635beb4c88..85cf591d4e11 100644
--- a/sound/arm/pxa2xx-ac97.c
+++ b/sound/arm/pxa2xx-ac97.c
@@ -22,6 +22,7 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/pxa-regs.h> 24#include <mach/pxa-regs.h>
25#include <mach/regs-ac97.h>
25#include <mach/audio.h> 26#include <mach/audio.h>
26 27
27#include "pxa2xx-pcm.h" 28#include "pxa2xx-pcm.h"
diff --git a/sound/arm/pxa2xx-pcm.h b/sound/arm/pxa2xx-pcm.h
index 5c4a4d38a083..65f86b56ba42 100644
--- a/sound/arm/pxa2xx-pcm.h
+++ b/sound/arm/pxa2xx-pcm.h
@@ -9,7 +9,7 @@
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12#include <asm/dma.h> 12#include <mach/dma.h>
13 13
14struct pxa2xx_runtime_data { 14struct pxa2xx_runtime_data {
15 int dma_ch; 15 int dma_ch;
diff --git a/sound/oss/waveartist.c b/sound/oss/waveartist.c
index c47842fad657..2c63bb9da74a 100644
--- a/sound/oss/waveartist.c
+++ b/sound/oss/waveartist.c
@@ -1483,16 +1483,14 @@ static void __exit unload_waveartist(struct address_info *hw)
1483#define VNC_HANDSET_DETECT 0x40 1483#define VNC_HANDSET_DETECT 0x40
1484#define VNC_DISABLE_AUTOSWITCH 0x80 1484#define VNC_DISABLE_AUTOSWITCH 0x80
1485 1485
1486extern spinlock_t gpio_lock;
1487
1488static inline void 1486static inline void
1489vnc_mute_spkr(wavnc_info *devc) 1487vnc_mute_spkr(wavnc_info *devc)
1490{ 1488{
1491 unsigned long flags; 1489 unsigned long flags;
1492 1490
1493 spin_lock_irqsave(&gpio_lock, flags); 1491 spin_lock_irqsave(&nw_gpio_lock, flags);
1494 cpld_modify(CPLD_UNMUTE, devc->spkr_mute_state ? 0 : CPLD_UNMUTE); 1492 nw_cpld_modify(CPLD_UNMUTE, devc->spkr_mute_state ? 0 : CPLD_UNMUTE);
1495 spin_unlock_irqrestore(&gpio_lock, flags); 1493 spin_unlock_irqrestore(&nw_gpio_lock, flags);
1496} 1494}
1497 1495
1498static void 1496static void
diff --git a/sound/soc/pxa/pxa2xx-ac97.c b/sound/soc/pxa/pxa2xx-ac97.c
index a7a3a9c5c6ff..5e727393cfd4 100644
--- a/sound/soc/pxa/pxa2xx-ac97.c
+++ b/sound/soc/pxa/pxa2xx-ac97.c
@@ -21,6 +21,7 @@
21 21
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <mach/pxa-regs.h> 23#include <mach/pxa-regs.h>
24#include <mach/regs-ac97.h>
24 25
25#include "pxa2xx-pcm.h" 26#include "pxa2xx-pcm.h"
26#include "pxa2xx-ac97.h" 27#include "pxa2xx-ac97.h"
diff --git a/sound/soc/s3c24xx/s3c2443-ac97.c b/sound/soc/s3c24xx/s3c2443-ac97.c
index 19c5c3cf5d8c..c473a3b97b55 100644
--- a/sound/soc/s3c24xx/s3c2443-ac97.c
+++ b/sound/soc/s3c24xx/s3c2443-ac97.c
@@ -28,7 +28,7 @@
28#include <sound/soc.h> 28#include <sound/soc.h>
29 29
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <asm/plat-s3c/regs-ac97.h> 31#include <plat/regs-ac97.h>
32#include <mach/regs-gpio.h> 32#include <mach/regs-gpio.h>
33#include <mach/regs-clock.h> 33#include <mach/regs-clock.h>
34#include <mach/audio.h> 34#include <mach/audio.h>