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-rw-r--r--arch/sparc64/kernel/head.S12
-rw-r--r--arch/sparc64/kernel/vmlinux.lds.S3
-rw-r--r--arch/sparc64/mm/tsb.c8
-rw-r--r--include/asm-sparc64/tsb.h13
4 files changed, 16 insertions, 20 deletions
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index 2988be85147c..7840271d7aae 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -484,16 +484,16 @@ sparc64_boot_end:
484/* 484/*
485 * The following skip makes sure the trap table in ttable.S is aligned 485 * The following skip makes sure the trap table in ttable.S is aligned
486 * on a 32K boundary as required by the v9 specs for TBA register. 486 * on a 32K boundary as required by the v9 specs for TBA register.
487 *
488 * We align to a 32K boundary, then we have the 32K kernel TSB,
489 * then the 32K aligned trap table.
487 */ 490 */
4881: 4911:
489 .skip 0x4000 + _start - 1b 492 .skip 0x4000 + _start - 1b
490 493
491#ifdef CONFIG_SBUS 494 .globl swapper_tsb
492/* This is just a hack to fool make depend config.h discovering 495swapper_tsb:
493 strategy: As the .S files below need config.h, but 496 .skip (32 * 1024)
494 make depend does not find it for them, we include config.h
495 in head.S */
496#endif
497 497
498! 0x0000000000408000 498! 0x0000000000408000
499 499
diff --git a/arch/sparc64/kernel/vmlinux.lds.S b/arch/sparc64/kernel/vmlinux.lds.S
index f018aaf45486..467d13a0d5c1 100644
--- a/arch/sparc64/kernel/vmlinux.lds.S
+++ b/arch/sparc64/kernel/vmlinux.lds.S
@@ -44,9 +44,6 @@ SECTIONS
44 __stop___ex_table = .; 44 __stop___ex_table = .;
45 45
46 . = ALIGN(8192); 46 . = ALIGN(8192);
47 swapper_tsb = .;
48 . += 8192;
49 . = ALIGN(8192);
50 __init_begin = .; 47 __init_begin = .;
51 .init.text : { 48 .init.text : {
52 _sinittext = .; 49 _sinittext = .;
diff --git a/arch/sparc64/mm/tsb.c b/arch/sparc64/mm/tsb.c
index e605478217c2..1c4e5c2dfc53 100644
--- a/arch/sparc64/mm/tsb.c
+++ b/arch/sparc64/mm/tsb.c
@@ -12,14 +12,6 @@
12#include <asm/pgtable.h> 12#include <asm/pgtable.h>
13#include <asm/tsb.h> 13#include <asm/tsb.h>
14 14
15/* We use an 8K TSB for the whole kernel, this allows to
16 * handle about 4MB of modules and vmalloc mappings without
17 * incurring many hash conflicts.
18 */
19#define KERNEL_TSB_SIZE_BYTES 8192
20#define KERNEL_TSB_NENTRIES \
21 (KERNEL_TSB_SIZE_BYTES / sizeof(struct tsb))
22
23extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES]; 15extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
24 16
25static inline unsigned long tsb_hash(unsigned long vaddr, unsigned long nentries) 17static inline unsigned long tsb_hash(unsigned long vaddr, unsigned long nentries)
diff --git a/include/asm-sparc64/tsb.h b/include/asm-sparc64/tsb.h
index 09ab3aaa8d20..1addd91d7200 100644
--- a/include/asm-sparc64/tsb.h
+++ b/include/asm-sparc64/tsb.h
@@ -143,6 +143,14 @@
143 add REG1, (3 * 8), REG1; \ 143 add REG1, (3 * 8), REG1; \
14499: 14499:
145 145
146 /* We use a 32K TSB for the whole kernel, this allows to
147 * handle about 16MB of modules and vmalloc mappings without
148 * incurring many hash conflicts.
149 */
150#define KERNEL_TSB_SIZE_BYTES (32 * 1024)
151#define KERNEL_TSB_NENTRIES \
152 (KERNEL_TSB_SIZE_BYTES / 16)
153
146 /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL 154 /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL
147 * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries 155 * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries
148 * and the found TTE will be left in REG1. REG3 and REG4 must 156 * and the found TTE will be left in REG1. REG3 and REG4 must
@@ -150,12 +158,11 @@
150 * 158 *
151 * VADDR and TAG will be preserved and not clobbered by this macro. 159 * VADDR and TAG will be preserved and not clobbered by this macro.
152 */ 160 */
153 /* XXX non-8K base page size support... */
154#define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ 161#define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
155 sethi %hi(swapper_tsb), REG1; \ 162 sethi %hi(swapper_tsb), REG1; \
156 or REG1, %lo(swapper_tsb), REG1; \ 163 or REG1, %lo(swapper_tsb), REG1; \
157 srlx VADDR, 13, REG2; \ 164 srlx VADDR, PAGE_SHIFT, REG2; \
158 and REG2, (512 - 1), REG2; \ 165 and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \
159 sllx REG2, 4, REG2; \ 166 sllx REG2, 4, REG2; \
160 add REG1, REG2, REG2; \ 167 add REG1, REG2, REG2; \
161 ldda [REG2] ASI_NUCLEUS_QUAD_LDD, REG3; \ 168 ldda [REG2] ASI_NUCLEUS_QUAD_LDD, REG3; \