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-rw-r--r--drivers/net/wireless/ath5k/ath5k.h1
-rw-r--r--drivers/net/wireless/ath5k/base.c1
-rw-r--r--drivers/net/wireless/ath5k/hw.c20
-rw-r--r--drivers/net/wireless/ath5k/initvals.c234
-rw-r--r--drivers/net/wireless/ath5k/phy.c123
5 files changed, 365 insertions, 14 deletions
diff --git a/drivers/net/wireless/ath5k/ath5k.h b/drivers/net/wireless/ath5k/ath5k.h
index b21830771ea5..d0d70b32e78b 100644
--- a/drivers/net/wireless/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath5k/ath5k.h
@@ -142,6 +142,7 @@ enum ath5k_radio {
142 AR5K_RF5112 = 2, 142 AR5K_RF5112 = 2,
143 AR5K_RF2413 = 3, 143 AR5K_RF2413 = 3,
144 AR5K_RF5413 = 4, 144 AR5K_RF5413 = 4,
145 AR5K_RF2425 = 5,
145}; 146};
146 147
147/* 148/*
diff --git a/drivers/net/wireless/ath5k/base.c b/drivers/net/wireless/ath5k/base.c
index 8862d245c82b..dfd202ddcff3 100644
--- a/drivers/net/wireless/ath5k/base.c
+++ b/drivers/net/wireless/ath5k/base.c
@@ -126,6 +126,7 @@ static struct ath5k_srev_name srev_names[] = {
126 { "5414", AR5K_VERSION_VER, AR5K_SREV_VER_AR5414 }, 126 { "5414", AR5K_VERSION_VER, AR5K_SREV_VER_AR5414 },
127 { "5416", AR5K_VERSION_VER, AR5K_SREV_VER_AR5416 }, 127 { "5416", AR5K_VERSION_VER, AR5K_SREV_VER_AR5416 },
128 { "5418", AR5K_VERSION_VER, AR5K_SREV_VER_AR5418 }, 128 { "5418", AR5K_VERSION_VER, AR5K_SREV_VER_AR5418 },
129 { "2425", AR5K_VERSION_VER, AR5K_SREV_VER_AR2425 },
129 { "xxxxx", AR5K_VERSION_VER, AR5K_SREV_UNKNOWN }, 130 { "xxxxx", AR5K_VERSION_VER, AR5K_SREV_UNKNOWN },
130 { "5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 }, 131 { "5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 },
131 { "5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 }, 132 { "5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 },
diff --git a/drivers/net/wireless/ath5k/hw.c b/drivers/net/wireless/ath5k/hw.c
index ff579a223621..9e16bc09f1fd 100644
--- a/drivers/net/wireless/ath5k/hw.c
+++ b/drivers/net/wireless/ath5k/hw.c
@@ -204,15 +204,16 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version)
204 CHANNEL_2GHZ); 204 CHANNEL_2GHZ);
205 205
206 /* Return on unsuported chips (unsupported eeprom etc) */ 206 /* Return on unsuported chips (unsupported eeprom etc) */
207 if(srev >= AR5K_SREV_VER_AR5416){ 207 if (srev >= AR5K_SREV_VER_AR5416) {
208 ATH5K_ERR(sc, "Device not yet supported.\n"); 208 ATH5K_ERR(sc, "Device not yet supported.\n");
209 ret = -ENODEV; 209 ret = -ENODEV;
210 goto err_free; 210 goto err_free;
211 } 211 }
212 212
213 /* Identify single chip solutions */ 213 /* Identify single chip solutions */
214 if((srev <= AR5K_SREV_VER_AR5414) && 214 if (((srev <= AR5K_SREV_VER_AR5414) &&
215 (srev >= AR5K_SREV_VER_AR2413)) { 215 (srev >= AR5K_SREV_VER_AR2413)) ||
216 (srev == AR5K_SREV_VER_AR2425)) {
216 ah->ah_single_chip = true; 217 ah->ah_single_chip = true;
217 } else { 218 } else {
218 ah->ah_single_chip = false; 219 ah->ah_single_chip = false;
@@ -241,19 +242,19 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version)
241 } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC1) { 242 } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC1) {
242 ah->ah_radio = AR5K_RF2413; 243 ah->ah_radio = AR5K_RF2413;
243 ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A; 244 ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A;
244 } else { 245 } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC2) {
245 246
246 ah->ah_radio = AR5K_RF5413; 247 ah->ah_radio = AR5K_RF5413;
247 248
248 if (ah->ah_mac_srev <= AR5K_SREV_VER_AR5424 && 249 if (ah->ah_mac_srev <= AR5K_SREV_VER_AR5424 &&
249 ah->ah_mac_srev >= AR5K_SREV_VER_AR2424) 250 ah->ah_mac_srev >= AR5K_SREV_VER_AR2424)
250 ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5424; 251 ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5424;
251 else if (ah->ah_mac_srev >= AR5K_SREV_VER_AR2425)
252 ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112;
253 else 252 else
254 ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A; 253 ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A;
255 254
256 255 } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5133) {
256 ah->ah_radio = AR5K_RF2425;
257 ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112;
257 } 258 }
258 259
259 ah->ah_phy = AR5K_PHY(0); 260 ah->ah_phy = AR5K_PHY(0);
@@ -391,7 +392,7 @@ static int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
391 ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU | 392 ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU |
392 AR5K_RESET_CTL_BASEBAND | bus_flags); 393 AR5K_RESET_CTL_BASEBAND | bus_flags);
393 if (ret) { 394 if (ret) {
394 ATH5K_ERR(ah->ah_sc, "failed to reset the MAC Chip + PCI\n"); 395 ATH5K_ERR(ah->ah_sc, "failed to reset the MAC Chip\n");
395 return -EIO; 396 return -EIO;
396 } 397 }
397 398
@@ -655,7 +656,8 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
655 if (ah->ah_radio != AR5K_RF5111 && 656 if (ah->ah_radio != AR5K_RF5111 &&
656 ah->ah_radio != AR5K_RF5112 && 657 ah->ah_radio != AR5K_RF5112 &&
657 ah->ah_radio != AR5K_RF5413 && 658 ah->ah_radio != AR5K_RF5413 &&
658 ah->ah_radio != AR5K_RF2413) { 659 ah->ah_radio != AR5K_RF2413 &&
660 ah->ah_radio != AR5K_RF2425) {
659 ATH5K_ERR(ah->ah_sc, 661 ATH5K_ERR(ah->ah_sc,
660 "invalid phy radio: %u\n", ah->ah_radio); 662 "invalid phy radio: %u\n", ah->ah_radio);
661 return -EINVAL; 663 return -EINVAL;
diff --git a/drivers/net/wireless/ath5k/initvals.c b/drivers/net/wireless/ath5k/initvals.c
index fdbab2f08178..04c84e9da89d 100644
--- a/drivers/net/wireless/ath5k/initvals.c
+++ b/drivers/net/wireless/ath5k/initvals.c
@@ -1282,6 +1282,213 @@ static const struct ath5k_ini_mode rf2413_ini_mode_end[] = {
1282 { 0xf3307ff0, 0xf3307ff0, 0xf3307ff0 } }, 1282 { 0xf3307ff0, 0xf3307ff0, 0xf3307ff0 } },
1283}; 1283};
1284 1284
1285/* Initial mode-specific settings for RF2425 (Written after ar5212_ini) */
1286/* XXX: No dumps for turbog yet, so turbog is the same with g here with some
1287 * minor tweaking based on dumps from other chips */
1288static const struct ath5k_ini_mode rf2425_ini_mode_end[] = {
1289 { AR5K_TXCFG,
1290 /* g gTurbo */
1291 { 0x00000015, 0x00000015 } },
1292 { AR5K_USEC_5211,
1293 { 0x12e013ab, 0x098813cf } },
1294 { AR5K_PHY_TURBO,
1295 { 0x00000000, 0x00000003 } },
1296 { AR5K_PHY(10),
1297 { 0x0a020001, 0x0a020001 } },
1298 { AR5K_PHY(13),
1299 { 0x00000e0e, 0x00000e0e } },
1300 { AR5K_PHY(14),
1301 { 0x0000000b, 0x0000000b } },
1302 { AR5K_PHY(17),
1303 { 0x13721422, 0x13721422 } },
1304 { AR5K_PHY(18),
1305 { 0x00199a65, 0x00199a65 } },
1306 { AR5K_PHY(20),
1307 { 0x0c98b0da, 0x0c98b0da } },
1308 { AR5K_PHY_SIG,
1309 { 0x7ec80d2e, 0x7ec80d2e } },
1310 { AR5K_PHY_AGCCOARSE,
1311 { 0x3139605e, 0x3139605e } },
1312 { AR5K_PHY(27),
1313 { 0x050cb081, 0x050cb081 } },
1314 { AR5K_PHY_RX_DELAY,
1315 { 0x00000898, 0x000007d0 } },
1316 { AR5K_PHY_FRAME_CTL_5211,
1317 { 0xf7b81000, 0xf7b81000 } },
1318 { AR5K_PHY_CCKTXCTL,
1319 { 0x00000000, 0x00000000 } },
1320 { AR5K_PHY(642),
1321 { 0xd03e6788, 0xd03e6788 } },
1322 { AR5K_PHY_GAIN_2GHZ,
1323 { 0x0052c140, 0x0052c140 } },
1324 { 0xa21c,
1325 { 0x1883800a, 0x1883800a } },
1326 { 0xa324,
1327 { 0xa7cfa7cf, 0xa7cfa7cf } },
1328 { 0xa328,
1329 { 0xa7cfa7cf, 0xa7cfa7cf } },
1330 { 0xa32c,
1331 { 0xa7cfa7cf, 0xa7cfa7cf } },
1332 { 0xa330,
1333 { 0xa7cfa7cf, 0xa7cfa7cf } },
1334 { 0xa334,
1335 { 0xa7cfa7cf, 0xa7cfa7cf } },
1336 { AR5K_DCU_FP,
1337 { 0x000003e0, 0x000003e0 } },
1338 { 0x8060,
1339 { 0x0000000f, 0x0000000f } },
1340 { 0x809c,
1341 { 0x00000000, 0x00000000 } },
1342 { 0x80a0,
1343 { 0x00000000, 0x00000000 } },
1344 { 0x8118,
1345 { 0x00000000, 0x00000000 } },
1346 { 0x811c,
1347 { 0x00000000, 0x00000000 } },
1348 { 0x8120,
1349 { 0x00000000, 0x00000000 } },
1350 { 0x8124,
1351 { 0x00000000, 0x00000000 } },
1352 { 0x8128,
1353 { 0x00000000, 0x00000000 } },
1354 { 0x812c,
1355 { 0x00000000, 0x00000000 } },
1356 { 0x8130,
1357 { 0x00000000, 0x00000000 } },
1358 { 0x8134,
1359 { 0x00000000, 0x00000000 } },
1360 { 0x8138,
1361 { 0x00000000, 0x00000000 } },
1362 { 0x813c,
1363 { 0x00000000, 0x00000000 } },
1364 { 0x8140,
1365 { 0x800003f9, 0x800003f9 } },
1366 { 0x8144,
1367 { 0x00000000, 0x00000000 } },
1368 { AR5K_PHY_AGC,
1369 { 0x00000000, 0x00000000 } },
1370 { AR5K_PHY(11),
1371 { 0x0000a000, 0x0000a000 } },
1372 { AR5K_PHY(15),
1373 { 0x00200400, 0x00200400 } },
1374 { AR5K_PHY(19),
1375 { 0x1284233c, 0x1284233c } },
1376 { AR5K_PHY_SCR,
1377 { 0x0000001f, 0x0000001f } },
1378 { AR5K_PHY_SLMT,
1379 { 0x00000080, 0x00000080 } },
1380 { AR5K_PHY_SCAL,
1381 { 0x0000000e, 0x0000000e } },
1382 { AR5K_PHY(86),
1383 { 0x00081fff, 0x00081fff } },
1384 { AR5K_PHY(96),
1385 { 0x00000000, 0x00000000 } },
1386 { AR5K_PHY(97),
1387 { 0x02800000, 0x02800000 } },
1388 { AR5K_PHY(104),
1389 { 0x00000000, 0x00000000 } },
1390 { AR5K_PHY(119),
1391 { 0xfebadbe8, 0xfebadbe8 } },
1392 { AR5K_PHY(120),
1393 { 0x00000000, 0x00000000 } },
1394 { AR5K_PHY(121),
1395 { 0xaaaaaaaa, 0xaaaaaaaa } },
1396 { AR5K_PHY(122),
1397 { 0x3c466478, 0x3c466478 } },
1398 { AR5K_PHY(123),
1399 { 0x000000aa, 0x000000aa } },
1400 { AR5K_PHY_SCLOCK,
1401 { 0x0000000c, 0x0000000c } },
1402 { AR5K_PHY_SDELAY,
1403 { 0x000000ff, 0x000000ff } },
1404 { AR5K_PHY_SPENDING,
1405 { 0x00000014, 0x00000014 } },
1406 { 0xa228,
1407 { 0x000009b5, 0x000009b5 } },
1408 { AR5K_PHY_TXPOWER_RATE3,
1409 { 0x20202020, 0x20202020 } },
1410 { AR5K_PHY_TXPOWER_RATE4,
1411 { 0x20202020, 0x20202020 } },
1412 { 0xa23c,
1413 { 0x93c889af, 0x93c889af } },
1414 { 0xa24c,
1415 { 0x00000001, 0x00000001 } },
1416 { 0xa250,
1417 { 0x0000a000, 0x0000a000 } },
1418 { 0xa254,
1419 { 0x00000000, 0x00000000 } },
1420 { 0xa258,
1421 { 0x0cc75380, 0x0cc75380 } },
1422 { 0xa25c,
1423 { 0x0f0f0f01, 0x0f0f0f01 } },
1424 { 0xa260,
1425 { 0x5f690f01, 0x5f690f01 } },
1426 { 0xa264,
1427 { 0x00418a11, 0x00418a11 } },
1428 { 0xa268,
1429 { 0x00000000, 0x00000000 } },
1430 { 0xa26c,
1431 { 0x0c30c166, 0x0c30c166 } },
1432 { 0xa270,
1433 { 0x00820820, 0x00820820 } },
1434 { 0xa274,
1435 { 0x081a3caa, 0x081a3caa } },
1436 { 0xa278,
1437 { 0x1ce739ce, 0x1ce739ce } },
1438 { 0xa27c,
1439 { 0x051701ce, 0x051701ce } },
1440 { 0xa300,
1441 { 0x16010000, 0x16010000 } },
1442 { 0xa304,
1443 { 0x2c032402, 0x2c032402 } },
1444 { 0xa308,
1445 { 0x48433e42, 0x48433e42 } },
1446 { 0xa30c,
1447 { 0x5a0f500b, 0x5a0f500b } },
1448 { 0xa310,
1449 { 0x6c4b624a, 0x6c4b624a } },
1450 { 0xa314,
1451 { 0x7e8b748a, 0x7e8b748a } },
1452 { 0xa318,
1453 { 0x96cf8ccb, 0x96cf8ccb } },
1454 { 0xa31c,
1455 { 0xa34f9d0f, 0xa34f9d0f } },
1456 { 0xa320,
1457 { 0xa7cfa58f, 0xa7cfa58f } },
1458 { 0xa348,
1459 { 0x3fffffff, 0x3fffffff } },
1460 { 0xa34c,
1461 { 0x3fffffff, 0x3fffffff } },
1462 { 0xa350,
1463 { 0x3fffffff, 0x3fffffff } },
1464 { 0xa354,
1465 { 0x0003ffff, 0x0003ffff } },
1466 { 0xa358,
1467 { 0x79a8aa1f, 0x79a8aa1f } },
1468 { 0xa35c,
1469 { 0x066c420f, 0x066c420f } },
1470 { 0xa360,
1471 { 0x0f282207, 0x0f282207 } },
1472 { 0xa364,
1473 { 0x17601685, 0x17601685 } },
1474 { 0xa368,
1475 { 0x1f801104, 0x1f801104 } },
1476 { 0xa36c,
1477 { 0x37a00c03, 0x37a00c03 } },
1478 { 0xa370,
1479 { 0x3fc40883, 0x3fc40883 } },
1480 { 0xa374,
1481 { 0x57c00803, 0x57c00803 } },
1482 { 0xa378,
1483 { 0x5fd80682, 0x5fd80682 } },
1484 { 0xa37c,
1485 { 0x7fe00482, 0x7fe00482 } },
1486 { 0xa380,
1487 { 0x7f3c7bba, 0x7f3c7bba } },
1488 { 0xa384,
1489 { 0xf3307ff0, 0xf3307ff0 } },
1490};
1491
1285/* 1492/*
1286 * Initial BaseBand Gain settings for RF5111/5112 (AR5210 comes with 1493 * Initial BaseBand Gain settings for RF5111/5112 (AR5210 comes with
1287 * RF5110 only so initial BB Gain settings are included in AR5K_AR5210_INI) 1494 * RF5110 only so initial BB Gain settings are included in AR5K_AR5210_INI)
@@ -1542,7 +1749,34 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel)
1542 ARRAY_SIZE(rf5112_ini_bbgain), 1749 ARRAY_SIZE(rf5112_ini_bbgain),
1543 rf5112_ini_bbgain, change_channel); 1750 rf5112_ini_bbgain, change_channel);
1544 1751
1752 } else if (ah->ah_radio == AR5K_RF2425) {
1753
1754 if (mode < 2) {
1755 ATH5K_ERR(ah->ah_sc,
1756 "unsupported channel mode: %d\n", mode);
1757 return -EINVAL;
1758 }
1759
1760 /* Map b to g */
1761 if (mode == 2)
1762 mode = 0;
1763 else
1764 mode = mode - 3;
1765
1766 /* Override a setting from ar5212_ini */
1767 ath5k_hw_reg_write(ah, 0x018830c6, AR5K_PHY(648));
1768
1769 ath5k_hw_ini_mode_registers(ah,
1770 ARRAY_SIZE(rf2425_ini_mode_end),
1771 rf2425_ini_mode_end, mode);
1772
1773 /* Baseband gain table */
1774 ath5k_hw_ini_registers(ah,
1775 ARRAY_SIZE(rf5112_ini_bbgain),
1776 rf5112_ini_bbgain, change_channel);
1777
1545 } 1778 }
1779
1546 /* For AR5211 */ 1780 /* For AR5211 */
1547 } else if (ah->ah_version == AR5K_AR5211) { 1781 } else if (ah->ah_version == AR5K_AR5211) {
1548 1782
diff --git a/drivers/net/wireless/ath5k/phy.c b/drivers/net/wireless/ath5k/phy.c
index 890ecce8bedc..afd8689e5c03 100644
--- a/drivers/net/wireless/ath5k/phy.c
+++ b/drivers/net/wireless/ath5k/phy.c
@@ -669,6 +669,7 @@ static const struct ath5k_ini_rf rfregs_5413[] = {
669/* RF2413/2414 mode-specific init registers */ 669/* RF2413/2414 mode-specific init registers */
670static const struct ath5k_ini_rf rfregs_2413[] = { 670static const struct ath5k_ini_rf rfregs_2413[] = {
671 { 1, AR5K_RF_BUFFER_CONTROL_4, 671 { 1, AR5K_RF_BUFFER_CONTROL_4,
672 /* mode b mode g mode gTurbo */
672 { 0x00000020, 0x00000020, 0x00000020 } }, 673 { 0x00000020, 0x00000020, 0x00000020 } },
673 { 2, AR5K_RF_BUFFER_CONTROL_3, 674 { 2, AR5K_RF_BUFFER_CONTROL_3,
674 { 0x02001408, 0x02001408, 0x02001408 } }, 675 { 0x02001408, 0x02001408, 0x02001408 } },
@@ -736,6 +737,83 @@ static const struct ath5k_ini_rf rfregs_2413[] = {
736 { 0x0000000e, 0x0000000e, 0x0000000e } }, 737 { 0x0000000e, 0x0000000e, 0x0000000e } },
737}; 738};
738 739
740/* RF2425 mode-specific init registers */
741static const struct ath5k_ini_rf rfregs_2425[] = {
742 { 1, AR5K_RF_BUFFER_CONTROL_4,
743 /* mode g mode gTurbo */
744 { 0x00000020, 0x00000020 } },
745 { 2, AR5K_RF_BUFFER_CONTROL_3,
746 { 0x02001408, 0x02001408 } },
747 { 3, AR5K_RF_BUFFER_CONTROL_6,
748 { 0x00e020c0, 0x00e020c0 } },
749 { 6, AR5K_RF_BUFFER,
750 { 0x10000000, 0x10000000 } },
751 { 6, AR5K_RF_BUFFER,
752 { 0x00000000, 0x00000000 } },
753 { 6, AR5K_RF_BUFFER,
754 { 0x00000000, 0x00000000 } },
755 { 6, AR5K_RF_BUFFER,
756 { 0x00000000, 0x00000000 } },
757 { 6, AR5K_RF_BUFFER,
758 { 0x00000000, 0x00000000 } },
759 { 6, AR5K_RF_BUFFER,
760 { 0x00000000, 0x00000000 } },
761 { 6, AR5K_RF_BUFFER,
762 { 0x00000000, 0x00000000 } },
763 { 6, AR5K_RF_BUFFER,
764 { 0x00000000, 0x00000000 } },
765 { 6, AR5K_RF_BUFFER,
766 { 0x00000000, 0x00000000 } },
767 { 6, AR5K_RF_BUFFER,
768 { 0x00000000, 0x00000000 } },
769 { 6, AR5K_RF_BUFFER,
770 { 0x00000000, 0x00000000 } },
771 { 6, AR5K_RF_BUFFER,
772 { 0x002a0000, 0x002a0000 } },
773 { 6, AR5K_RF_BUFFER,
774 { 0x00000000, 0x00000000 } },
775 { 6, AR5K_RF_BUFFER,
776 { 0x00000000, 0x00000000 } },
777 { 6, AR5K_RF_BUFFER,
778 { 0x00100000, 0x00100000 } },
779 { 6, AR5K_RF_BUFFER,
780 { 0x00020000, 0x00020000 } },
781 { 6, AR5K_RF_BUFFER,
782 { 0x00730000, 0x00730000 } },
783 { 6, AR5K_RF_BUFFER,
784 { 0x00f80000, 0x00f80000 } },
785 { 6, AR5K_RF_BUFFER,
786 { 0x00e70000, 0x00e70000 } },
787 { 6, AR5K_RF_BUFFER,
788 { 0x00140000, 0x00140000 } },
789 { 6, AR5K_RF_BUFFER,
790 { 0x00910040, 0x00910040 } },
791 { 6, AR5K_RF_BUFFER,
792 { 0x0007001a, 0x0007001a } },
793 { 6, AR5K_RF_BUFFER,
794 { 0x00410000, 0x00410000 } },
795 { 6, AR5K_RF_BUFFER,
796 { 0x00810060, 0x00810060 } },
797 { 6, AR5K_RF_BUFFER,
798 { 0x00020803, 0x00020803 } },
799 { 6, AR5K_RF_BUFFER,
800 { 0x00000000, 0x00000000 } },
801 { 6, AR5K_RF_BUFFER,
802 { 0x00000000, 0x00000000 } },
803 { 6, AR5K_RF_BUFFER,
804 { 0x00001660, 0x00001660 } },
805 { 6, AR5K_RF_BUFFER,
806 { 0x00001688, 0x00001688 } },
807 { 6, AR5K_RF_BUFFER_CONTROL_1,
808 { 0x00000001, 0x00000001 } },
809 { 7, AR5K_RF_BUFFER,
810 { 0x00006400, 0x00006400 } },
811 { 7, AR5K_RF_BUFFER,
812 { 0x00000800, 0x00000800 } },
813 { 7, AR5K_RF_BUFFER_CONTROL_2,
814 { 0x0000000e, 0x0000000e } },
815};
816
739/* Initial RF Gain settings for RF5112 */ 817/* Initial RF Gain settings for RF5112 */
740static const struct ath5k_ini_rfgain rfgain_5112[] = { 818static const struct ath5k_ini_rfgain rfgain_5112[] = {
741 /* 5Ghz 2Ghz */ 819 /* 5Ghz 2Ghz */
@@ -1348,7 +1426,8 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
1348} 1426}
1349 1427
1350/* 1428/*
1351 * Initialize RF5413/5414 1429 * Initialize RF5413/5414 and future chips
1430 * (until we come up with a better solution)
1352 */ 1431 */
1353static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah, 1432static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah,
1354 struct ieee80211_channel *channel, unsigned int mode) 1433 struct ieee80211_channel *channel, unsigned int mode)
@@ -1362,19 +1441,41 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah,
1362 1441
1363 rf = ah->ah_rf_banks; 1442 rf = ah->ah_rf_banks;
1364 1443
1365 if (ah->ah_radio == AR5K_RF5413) { 1444 switch (ah->ah_radio) {
1445 case AR5K_RF5413:
1366 rf_ini = rfregs_5413; 1446 rf_ini = rfregs_5413;
1367 rf_size = ARRAY_SIZE(rfregs_5413); 1447 rf_size = ARRAY_SIZE(rfregs_5413);
1368 } else if (ah->ah_radio == AR5K_RF2413) { 1448 break;
1449 case AR5K_RF2413:
1369 rf_ini = rfregs_2413; 1450 rf_ini = rfregs_2413;
1370 rf_size = ARRAY_SIZE(rfregs_2413); 1451 rf_size = ARRAY_SIZE(rfregs_2413);
1452
1371 if (mode < 2) { 1453 if (mode < 2) {
1372 ATH5K_ERR(ah->ah_sc, 1454 ATH5K_ERR(ah->ah_sc,
1373 "invalid channel mode: %i\n", mode); 1455 "invalid channel mode: %i\n", mode);
1374 return -EINVAL; 1456 return -EINVAL;
1375 } 1457 }
1458
1376 mode = mode - 2; 1459 mode = mode - 2;
1377 } else { 1460 break;
1461 case AR5K_RF2425:
1462 rf_ini = rfregs_2425;
1463 rf_size = ARRAY_SIZE(rfregs_2425);
1464
1465 if (mode < 2) {
1466 ATH5K_ERR(ah->ah_sc,
1467 "invalid channel mode: %i\n", mode);
1468 return -EINVAL;
1469 }
1470
1471 /* Map b to g */
1472 if (mode == 2)
1473 mode = 0;
1474 else
1475 mode = mode - 3;
1476
1477 break;
1478 default:
1378 return -EINVAL; 1479 return -EINVAL;
1379 } 1480 }
1380 1481
@@ -1439,6 +1540,10 @@ int ath5k_hw_rfregs(struct ath5k_hw *ah, struct ieee80211_channel *channel,
1439 ah->ah_rf_banks_size = sizeof(rfregs_2413); 1540 ah->ah_rf_banks_size = sizeof(rfregs_2413);
1440 func = ath5k_hw_rf5413_rfregs; 1541 func = ath5k_hw_rf5413_rfregs;
1441 break; 1542 break;
1543 case AR5K_RF2425:
1544 ah->ah_rf_banks_size = sizeof(rfregs_2425);
1545 func = ath5k_hw_rf5413_rfregs;
1546 break;
1442 default: 1547 default:
1443 return -EINVAL; 1548 return -EINVAL;
1444 } 1549 }
@@ -1482,6 +1587,11 @@ int ath5k_hw_rfgain(struct ath5k_hw *ah, unsigned int freq)
1482 size = ARRAY_SIZE(rfgain_2413); 1587 size = ARRAY_SIZE(rfgain_2413);
1483 freq = 0; /* only 2Ghz */ 1588 freq = 0; /* only 2Ghz */
1484 break; 1589 break;
1590 case AR5K_RF2425:
1591 ath5k_rfg = rfgain_2413;
1592 size = ARRAY_SIZE(rfgain_2413);
1593 freq = 0; /* only 2Ghz */
1594 break;
1485 default: 1595 default:
1486 return -EINVAL; 1596 return -EINVAL;
1487 } 1597 }
@@ -2181,8 +2291,11 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel,
2181 * transmit anything if we call 2291 * transmit anything if we call
2182 * this funtion, so we skip it 2292 * this funtion, so we skip it
2183 * until we fix txpower. 2293 * until we fix txpower.
2294 *
2295 * XXX: Assume same for RF2425
2296 * to be safe.
2184 */ 2297 */
2185 if (ah->ah_radio == AR5K_RF2413) 2298 if ((ah->ah_radio == AR5K_RF2413) || (ah->ah_radio == AR5K_RF2425))
2186 return 0; 2299 return 0;
2187 2300
2188 /* Reset TX power values */ 2301 /* Reset TX power values */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 07:03:10 -0500