3 files changed, 119 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 894cc355818a..a2e915639b72 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -513,6 +513,47 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
                        omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
                }
        }
+        if (cpu_is_omap3430()) {
+                if (controller_nr == 0) {
+                        omap_cfg_reg(N28_3430_MMC1_CLK);
+                        omap_cfg_reg(M27_3430_MMC1_CMD);
+                        omap_cfg_reg(N27_3430_MMC1_DAT0);
+                        if (mmc_controller->slots[0].wires == 4 ||
+                                mmc_controller->slots[0].wires == 8) {
+                                omap_cfg_reg(N26_3430_MMC1_DAT1);
+                                omap_cfg_reg(N25_3430_MMC1_DAT2);
+                                omap_cfg_reg(P28_3430_MMC1_DAT3);
+                        }
+                        if (mmc_controller->slots[0].wires == 8) {
+                                omap_cfg_reg(P27_3430_MMC1_DAT4);
+                                omap_cfg_reg(P26_3430_MMC1_DAT5);
+                                omap_cfg_reg(R27_3430_MMC1_DAT6);
+                                omap_cfg_reg(R25_3430_MMC1_DAT7);
+                        }
+                }
+                if (controller_nr == 1) {
+                        /* MMC2 */
+                        omap_cfg_reg(AE2_3430_MMC2_CLK);
+                        omap_cfg_reg(AG5_3430_MMC2_CMD);
+                        omap_cfg_reg(AH5_3430_MMC2_DAT0);
+                        /*
+                         * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
+                         * in the board-*.c files
+                         */
+                        if (mmc_controller->slots[0].wires == 4 ||
+                                mmc_controller->slots[0].wires == 8) {
+                                omap_cfg_reg(AH4_3430_MMC2_DAT1);
+                                omap_cfg_reg(AG4_3430_MMC2_DAT2);
+                                omap_cfg_reg(AF4_3430_MMC2_DAT3);
+                        }
+                }
+                /*
+                 * For MMC3 the pins need to be muxed in the board-*.c files
+                 */
+        }
 }
 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 43d6b92b65f2..f63f3a237825 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -492,6 +492,56 @@ MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262,
                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
 MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264,
                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
+/* MMC1 */
+MUX_CFG_34XX("N28_3430_MMC1_CLK", 0x144,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("M27_3430_MMC1_CMD", 0x146,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("N27_3430_MMC1_DAT0", 0x148,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("N26_3430_MMC1_DAT1", 0x14a,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("N25_3430_MMC1_DAT2", 0x14c,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("P28_3430_MMC1_DAT3", 0x14e,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("P27_3430_MMC1_DAT4", 0x150,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("P26_3430_MMC1_DAT5", 0x152,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("R27_3430_MMC1_DAT6", 0x154,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("R25_3430_MMC1_DAT7", 0x156,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+/* MMC2 */
+MUX_CFG_34XX("AE2_3430_MMC2_CLK", 0x158,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AG5_3430_MMC2_CMD", 0x15A,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AH5_3430_MMC2_DAT0", 0x15c,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AH4_3430_MMC2_DAT1", 0x15e,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+/* MMC3 */
+MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AC3_3430_MMC3_CMD", 0x1d0,
+                OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AE11_3430_MMC3_DAT0", 0x5e4,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AH9_3430_MMC3_DAT1", 0x5e6,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AF13_3430_MMC3_DAT2", 0x5e8,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
 };
 #define OMAP34XX_PINS_SZ        ARRAY_SIZE(omap34xx_pins)
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 80281c458baf..2c57bad65b02 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -857,6 +857,34 @@ enum omap34xx_index {
        /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
        H16_34XX_SDRC_CKE0,
        H17_34XX_SDRC_CKE1,
+        /* MMC1 */
+        N28_3430_MMC1_CLK,
+        M27_3430_MMC1_CMD,
+        N27_3430_MMC1_DAT0,
+        N26_3430_MMC1_DAT1,
+        N25_3430_MMC1_DAT2,
+        P28_3430_MMC1_DAT3,
+        P27_3430_MMC1_DAT4,
+        P26_3430_MMC1_DAT5,
+        R27_3430_MMC1_DAT6,
+        R25_3430_MMC1_DAT7,
+        /* MMC2 */
+        AE2_3430_MMC2_CLK,
+        AG5_3430_MMC2_CMD,
+        AH5_3430_MMC2_DAT0,
+        AH4_3430_MMC2_DAT1,
+        AG4_3430_MMC2_DAT2,
+        AF4_3430_MMC2_DAT3,
+        /* MMC3 */
+        AF10_3430_MMC3_CLK,
+        AC3_3430_MMC3_CMD,
+        AE11_3430_MMC3_DAT0,
+        AH9_3430_MMC3_DAT1,
+        AF13_3430_MMC3_DAT2,
+        AF13_3430_MMC3_DAT3,
 };
 struct omap_mux_cfg {

diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 894cc355818a..a2e915639b72 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c
@@ -513,6 +513,47 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
513	omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);	513	omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
514	}	514	}
515	}	515	}
		516
		517	if (cpu_is_omap3430()) {
		518	if (controller_nr == 0) {
		519	omap_cfg_reg(N28_3430_MMC1_CLK);
		520	omap_cfg_reg(M27_3430_MMC1_CMD);
		521	omap_cfg_reg(N27_3430_MMC1_DAT0);
		522	if (mmc_controller->slots[0].wires == 4 \|\|
		523	mmc_controller->slots[0].wires == 8) {
		524	omap_cfg_reg(N26_3430_MMC1_DAT1);
		525	omap_cfg_reg(N25_3430_MMC1_DAT2);
		526	omap_cfg_reg(P28_3430_MMC1_DAT3);
		527	}
		528	if (mmc_controller->slots[0].wires == 8) {
		529	omap_cfg_reg(P27_3430_MMC1_DAT4);
		530	omap_cfg_reg(P26_3430_MMC1_DAT5);
		531	omap_cfg_reg(R27_3430_MMC1_DAT6);
		532	omap_cfg_reg(R25_3430_MMC1_DAT7);
		533	}
		534	}
		535	if (controller_nr == 1) {
		536	/* MMC2 */
		537	omap_cfg_reg(AE2_3430_MMC2_CLK);
		538	omap_cfg_reg(AG5_3430_MMC2_CMD);
		539	omap_cfg_reg(AH5_3430_MMC2_DAT0);
		540
		541	/*
		542	* For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
		543	* in the board-*.c files
		544	*/
		545	if (mmc_controller->slots[0].wires == 4 \|\|
		546	mmc_controller->slots[0].wires == 8) {
		547	omap_cfg_reg(AH4_3430_MMC2_DAT1);
		548	omap_cfg_reg(AG4_3430_MMC2_DAT2);
		549	omap_cfg_reg(AF4_3430_MMC2_DAT3);
		550	}
		551	}
		552
		553	/*
		554	* For MMC3 the pins need to be muxed in the board-*.c files
		555	*/
		556	}
516	}	557	}
517		558
518	void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,	559	void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,


diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 43d6b92b65f2..f63f3a237825 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c
@@ -492,6 +492,56 @@ MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262,
492	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_OUTPUT)	492	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_OUTPUT)
493	MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264,	493	MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264,
494	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_OUTPUT)	494	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_OUTPUT)
		495
		496	/* MMC1 */
		497	MUX_CFG_34XX("N28_3430_MMC1_CLK", 0x144,
		498	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		499	MUX_CFG_34XX("M27_3430_MMC1_CMD", 0x146,
		500	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		501	MUX_CFG_34XX("N27_3430_MMC1_DAT0", 0x148,
		502	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		503	MUX_CFG_34XX("N26_3430_MMC1_DAT1", 0x14a,
		504	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		505	MUX_CFG_34XX("N25_3430_MMC1_DAT2", 0x14c,
		506	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		507	MUX_CFG_34XX("P28_3430_MMC1_DAT3", 0x14e,
		508	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		509	MUX_CFG_34XX("P27_3430_MMC1_DAT4", 0x150,
		510	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		511	MUX_CFG_34XX("P26_3430_MMC1_DAT5", 0x152,
		512	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		513	MUX_CFG_34XX("R27_3430_MMC1_DAT6", 0x154,
		514	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		515	MUX_CFG_34XX("R25_3430_MMC1_DAT7", 0x156,
		516	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		517
		518	/* MMC2 */
		519	MUX_CFG_34XX("AE2_3430_MMC2_CLK", 0x158,
		520	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		521	MUX_CFG_34XX("AG5_3430_MMC2_CMD", 0x15A,
		522	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		523	MUX_CFG_34XX("AH5_3430_MMC2_DAT0", 0x15c,
		524	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		525	MUX_CFG_34XX("AH4_3430_MMC2_DAT1", 0x15e,
		526	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		527	MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160,
		528	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		529	MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162,
		530	OMAP34XX_MUX_MODE0 \| OMAP34XX_PIN_INPUT_PULLUP)
		531
		532	/* MMC3 */
		533	MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8,
		534	OMAP34XX_MUX_MODE2 \| OMAP34XX_PIN_INPUT_PULLUP)
		535	MUX_CFG_34XX("AC3_3430_MMC3_CMD", 0x1d0,
		536	OMAP34XX_MUX_MODE3 \| OMAP34XX_PIN_INPUT_PULLUP)
		537	MUX_CFG_34XX("AE11_3430_MMC3_DAT0", 0x5e4,
		538	OMAP34XX_MUX_MODE2 \| OMAP34XX_PIN_INPUT_PULLUP)
		539	MUX_CFG_34XX("AH9_3430_MMC3_DAT1", 0x5e6,
		540	OMAP34XX_MUX_MODE2 \| OMAP34XX_PIN_INPUT_PULLUP)
		541	MUX_CFG_34XX("AF13_3430_MMC3_DAT2", 0x5e8,
		542	OMAP34XX_MUX_MODE2 \| OMAP34XX_PIN_INPUT_PULLUP)
		543	MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2,
		544	OMAP34XX_MUX_MODE2 \| OMAP34XX_PIN_INPUT_PULLUP)
495	};	545	};
496		546
497	#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)	547	#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)


diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h index 80281c458baf..2c57bad65b02 100644 --- a/arch/arm/plat-omap/include/mach/mux.h +++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -857,6 +857,34 @@ enum omap34xx_index {
857	/* OMAP3 SDRC CKE signals to SDR/DDR ram chips */	857	/* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
858	H16_34XX_SDRC_CKE0,	858	H16_34XX_SDRC_CKE0,
859	H17_34XX_SDRC_CKE1,	859	H17_34XX_SDRC_CKE1,
		860
		861	/* MMC1 */
		862	N28_3430_MMC1_CLK,
		863	M27_3430_MMC1_CMD,
		864	N27_3430_MMC1_DAT0,
		865	N26_3430_MMC1_DAT1,
		866	N25_3430_MMC1_DAT2,
		867	P28_3430_MMC1_DAT3,
		868	P27_3430_MMC1_DAT4,
		869	P26_3430_MMC1_DAT5,
		870	R27_3430_MMC1_DAT6,
		871	R25_3430_MMC1_DAT7,
		872
		873	/* MMC2 */
		874	AE2_3430_MMC2_CLK,
		875	AG5_3430_MMC2_CMD,
		876	AH5_3430_MMC2_DAT0,
		877	AH4_3430_MMC2_DAT1,
		878	AG4_3430_MMC2_DAT2,
		879	AF4_3430_MMC2_DAT3,
		880
		881	/* MMC3 */
		882	AF10_3430_MMC3_CLK,
		883	AC3_3430_MMC3_CMD,
		884	AE11_3430_MMC3_DAT0,
		885	AH9_3430_MMC3_DAT1,
		886	AF13_3430_MMC3_DAT2,
		887	AF13_3430_MMC3_DAT3,
860	};	888	};
861		889
862	struct omap_mux_cfg {	890	struct omap_mux_cfg {