diff options
-rw-r--r-- | arch/mips/kernel/traps.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index a53b1ed7b386..d06db5f8115f 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -736,16 +736,12 @@ static inline void parity_protection_init(void) | |||
736 | { | 736 | { |
737 | switch (current_cpu_data.cputype) { | 737 | switch (current_cpu_data.cputype) { |
738 | case CPU_24K: | 738 | case CPU_24K: |
739 | /* 24K cache parity not currently implemented in FPGA */ | ||
740 | printk(KERN_INFO "Disable cache parity protection for " | ||
741 | "MIPS 24K CPU.\n"); | ||
742 | write_c0_ecc(read_c0_ecc() & ~0x80000000); | ||
743 | break; | ||
744 | case CPU_5KC: | 739 | case CPU_5KC: |
745 | /* Set the PE bit (bit 31) in the c0_ecc register. */ | 740 | write_c0_ecc(0x80000000); |
746 | printk(KERN_INFO "Enable cache parity protection for " | 741 | back_to_back_c0_hazard(); |
747 | "MIPS 5KC/24K CPUs.\n"); | 742 | /* Set the PE bit (bit 31) in the c0_errctl register. */ |
748 | write_c0_ecc(read_c0_ecc() | 0x80000000); | 743 | printk(KERN_INFO "Cache parity protection %sabled\n", |
744 | (read_c0_ecc() & 0x80000000) ? "en" : "dis"); | ||
749 | break; | 745 | break; |
750 | case CPU_20KC: | 746 | case CPU_20KC: |
751 | case CPU_25KF: | 747 | case CPU_25KF: |